1 /* Instruction printing code for the ARM
2 Copyright (C) 1994, 95, 96, 97, 98, 1999 Free Software Foundation, Inc.
3 Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org)
4 Modification by James G. Smith (jsmith@cygnus.co.uk)
6 This file is part of libopcodes.
8 This program is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2 of the License, or (at your option)
13 This program is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
25 #include "coff/internal.h"
29 /* FIXME: This shouldn't be done here */
31 #include "elf/internal.h"
34 static char * arm_conditional[] =
35 {"eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc",
36 "hi", "ls", "ge", "lt", "gt", "le", "", "nv"};
38 static char * arm_regnames_raw[] =
39 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
40 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"};
42 static char * arm_regnames_standard[] =
43 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
44 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc"};
46 static char * arm_regnames_apcs[] =
47 {"a1", "a2", "a3", "a4", "v1", "v2", "v3", "v4",
48 "v5", "v6", "sl", "fp", "ip", "sp", "lr", "pc"};
50 /* Choose which register name set to use. */
51 static char ** arm_regnames = arm_regnames_standard;
53 static char * arm_fp_const[] =
54 {"0.0", "1.0", "2.0", "3.0", "4.0", "5.0", "0.5", "10.0"};
56 static char * arm_shift[] =
57 {"lsl", "lsr", "asr", "ror"};
59 static int print_insn_arm
60 PARAMS ((bfd_vma, struct disassemble_info *, long));
63 arm_decode_shift (given, func, stream)
68 func (stream, "%s", arm_regnames[given & 0xf]);
70 if ((given & 0xff0) != 0)
72 if ((given & 0x10) == 0)
74 int amount = (given & 0xf80) >> 7;
75 int shift = (given & 0x60) >> 5;
81 func (stream, ", rrx");
88 func (stream, ", %s #%d", arm_shift[shift], amount);
91 func (stream, ", %s %s", arm_shift[(given & 0x60) >> 5],
92 arm_regnames[(given & 0xf00) >> 8]);
96 /* Print one instruction from PC on INFO->STREAM.
97 Return the size of the instruction (always 4 on ARM). */
100 print_insn_arm (pc, info, given)
102 struct disassemble_info * info;
105 struct arm_opcode * insn;
106 void * stream = info->stream;
107 fprintf_ftype func = info->fprintf_func;
109 for (insn = arm_opcodes; insn->assembler; insn++)
111 if ((given & insn->mask) == insn->value)
115 for (c = insn->assembler; *c; c++)
126 if (((given & 0x000f0000) == 0x000f0000)
127 && ((given & 0x02000000) == 0))
129 int offset = given & 0xfff;
131 func (stream, "[pc");
133 if (given & 0x01000000)
135 if ((given & 0x00800000) == 0)
139 func (stream, ", #%x]", offset);
143 /* Cope with the possibility of write-back being used.
144 Probably a very dangerous thing for the programmer
145 to do, but who are we to argue ? */
146 if (given & 0x00200000)
152 func (stream, "], #%x", offset);
154 offset = pc + 8; /* ie ignore the offset */
157 func (stream, "\t; ");
158 info->print_address_func (offset, info);
163 arm_regnames[(given >> 16) & 0xf]);
164 if ((given & 0x01000000) != 0)
166 if ((given & 0x02000000) == 0)
168 int offset = given & 0xfff;
170 func (stream, ", %s#%d",
171 (((given & 0x00800000) == 0)
172 ? "-" : ""), offset);
176 func (stream, ", %s",
177 (((given & 0x00800000) == 0)
179 arm_decode_shift (given, func, stream);
183 ((given & 0x00200000) != 0) ? "!" : "");
187 if ((given & 0x02000000) == 0)
189 int offset = given & 0xfff;
191 func (stream, "], %s#%d",
192 (((given & 0x00800000) == 0)
193 ? "-" : ""), offset);
199 func (stream, "], %s",
200 (((given & 0x00800000) == 0)
202 arm_decode_shift (given, func, stream);
209 if ((given & 0x004f0000) == 0x004f0000)
211 /* PC relative with immediate offset */
212 int offset = ((given & 0xf00) >> 4) | (given & 0xf);
214 if ((given & 0x00800000) == 0)
217 func (stream, "[pc, #%x]\t; ", offset);
219 (*info->print_address_func)
220 (offset + pc + 8, info);
225 arm_regnames[(given >> 16) & 0xf]);
226 if ((given & 0x01000000) != 0)
229 if ((given & 0x00400000) == 0x00400000)
232 int offset = ((given & 0xf00) >> 4) | (given & 0xf);
234 func (stream, ", %s#%d",
235 (((given & 0x00800000) == 0)
236 ? "-" : ""), offset);
241 func (stream, ", %s%s",
242 (((given & 0x00800000) == 0)
244 arm_regnames[given & 0xf]);
248 ((given & 0x00200000) != 0) ? "!" : "");
253 if ((given & 0x00400000) == 0x00400000)
256 int offset = ((given & 0xf00) >> 4) | (given & 0xf);
258 func (stream, "], %s#%d",
259 (((given & 0x00800000) == 0)
260 ? "-" : ""), offset);
267 func (stream, "], %s%s",
268 (((given & 0x00800000) == 0)
270 arm_regnames[given & 0xf]);
277 (*info->print_address_func)
278 (BDISP (given) * 4 + pc + 8, info);
283 arm_conditional [(given >> 28) & 0xf]);
292 for (reg = 0; reg < 16; reg++)
293 if ((given & (1 << reg)) != 0)
298 func (stream, "%s", arm_regnames[reg]);
305 if ((given & 0x02000000) != 0)
307 int rotate = (given & 0xf00) >> 7;
308 int immed = (given & 0xff);
310 ((immed << (32 - rotate))
311 | (immed >> rotate)) & 0xffffffff);
314 arm_decode_shift (given, func, stream);
318 if ((given & 0x0000f000) == 0x0000f000)
323 if ((given & 0x01200000) == 0x00200000)
328 if ((given & 0x00000020) == 0x00000020)
335 func (stream, "[%s", arm_regnames [(given >> 16) & 0xf]);
336 if ((given & 0x01000000) != 0)
338 int offset = given & 0xff;
340 func (stream, ", %s#%d]%s",
341 ((given & 0x00800000) == 0 ? "-" : ""),
343 ((given & 0x00200000) != 0 ? "!" : ""));
349 int offset = given & 0xff;
351 func (stream, "], %s#%d",
352 ((given & 0x00800000) == 0 ? "-" : ""),
360 switch (given & 0x00090000)
363 func (stream, "_???");
366 func (stream, "_all");
369 func (stream, "_ctl");
372 func (stream, "_flg");
378 switch (given & 0x00408000)
395 switch (given & 0x00080080)
407 func (stream, _("<illegal precision>"));
412 switch (given & 0x00408000)
429 switch (given & 0x60)
445 case '0': case '1': case '2': case '3': case '4':
446 case '5': case '6': case '7': case '8': case '9':
448 int bitstart = *c++ - '0';
450 while (*c >= '0' && *c <= '9')
451 bitstart = (bitstart * 10) + *c++ - '0';
457 while (*c >= '0' && *c <= '9')
458 bitend = (bitend * 10) + *c++ - '0';
466 reg = given >> bitstart;
467 reg &= (2 << (bitend - bitstart)) - 1;
468 func (stream, "%s", arm_regnames[reg]);
474 reg = given >> bitstart;
475 reg &= (2 << (bitend - bitstart)) - 1;
476 func (stream, "%d", reg);
482 reg = given >> bitstart;
483 reg &= (2 << (bitend - bitstart)) - 1;
484 func (stream, "0x%08x", reg);
486 /* Some SWI instructions have special meanings. */
487 if ((given & 0x0fffffff) == 0x0FF00000)
488 func (stream, "\t; IMB");
489 else if ((given & 0x0fffffff) == 0x0FF00001)
490 func (stream, "\t; IMBRange");
496 reg = given >> bitstart;
497 reg &= (2 << (bitend - bitstart)) - 1;
500 arm_fp_const[reg & 7]);
502 func (stream, "f%d", reg);
511 if ((given & (1 << bitstart)) == 0)
512 func (stream, "%c", *c);
516 if ((given & (1 << bitstart)) != 0)
517 func (stream, "%c", *c);
521 if ((given & (1 << bitstart)) != 0)
522 func (stream, "%c", *c++);
524 func (stream, "%c", *++c);
537 func (stream, "%c", *c);
545 /* Print one instruction from PC on INFO->STREAM.
546 Return the size of the instruction. */
549 print_insn_thumb (pc, info, given)
551 struct disassemble_info * info;
554 struct thumb_opcode * insn;
555 void * stream = info->stream;
556 fprintf_ftype func = info->fprintf_func;
558 for (insn = thumb_opcodes; insn->assembler; insn++)
560 if ((given & insn->mask) == insn->value)
562 char * c = insn->assembler;
564 /* Special processing for Thumb 2 instruction BL sequence: */
565 if (!*c) /* check for empty (not NULL) assembler string */
567 info->bytes_per_chunk = 4;
568 info->bytes_per_line = 4;
570 func (stream, "%04x\tbl\t", given & 0xffff);
571 (*info->print_address_func)
572 (BDISP23 (given) * 2 + pc + 4, info);
577 info->bytes_per_chunk = 2;
578 info->bytes_per_line = 4;
581 func (stream, "%04x\t", given);
599 reg = (given >> 3) & 0x7;
600 if (given & (1 << 6))
602 func (stream, "%s", arm_regnames[reg]);
611 if (given & (1 << 7))
613 func (stream, "%s", arm_regnames[reg]);
619 arm_conditional [(given >> 8) & 0xf]);
623 if (given & (1 << 8))
627 if (*c == 'O' && (given & (1 << 8)))
636 /* It would be nice if we could spot
637 ranges, and generate the rS-rE format: */
638 for (reg = 0; (reg < 8); reg++)
639 if ((given & (1 << reg)) != 0)
644 func (stream, "%s", arm_regnames[reg]);
667 case '0': case '1': case '2': case '3': case '4':
668 case '5': case '6': case '7': case '8': case '9':
670 int bitstart = *c++ - '0';
673 while (*c >= '0' && *c <= '9')
674 bitstart = (bitstart * 10) + *c++ - '0';
683 while (*c >= '0' && *c <= '9')
684 bitend = (bitend * 10) + *c++ - '0';
687 reg = given >> bitstart;
688 reg &= (2 << (bitend - bitstart)) - 1;
692 func (stream, "%s", arm_regnames[reg]);
696 func (stream, "%d", reg);
700 func (stream, "%d", reg << 1);
704 func (stream, "%d", reg << 2);
708 /* PC-relative address -- the bottom two
709 bits of the address are dropped before
711 info->print_address_func
712 (((pc + 4) & ~3) + (reg << 2), info);
716 func (stream, "0x%04x", reg);
720 reg = ((reg ^ (1 << bitend)) - (1 << bitend));
721 func (stream, "%d", reg);
725 reg = ((reg ^ (1 << bitend)) - (1 << bitend));
726 (*info->print_address_func)
727 (reg * 2 + pc + 4, info);
738 if ((given & (1 << bitstart)) != 0)
739 func (stream, "%c", *c);
744 if ((given & (1 << bitstart)) != 0)
745 func (stream, "%c", *c++);
747 func (stream, "%c", *++c);
761 func (stream, "%c", *c);
772 /* Select a different register name set.
773 Returns true if the name set selected is the APCS name set. */
775 arm_toggle_regnames ()
777 if (arm_regnames == arm_regnames_standard)
778 arm_regnames = arm_regnames_apcs;
780 arm_regnames = arm_regnames_standard;
782 return arm_regnames == arm_regnames_apcs;
786 parse_disassembler_options (options)
792 if (strncmp (options, "reg-names-", 10) == 0)
796 if (strcmp (options, "std") == 0)
797 arm_regnames = arm_regnames_standard;
798 else if (strcmp (options, "apcs") == 0)
799 arm_regnames = arm_regnames_apcs;
800 else if (strcmp (options, "raw") == 0)
801 arm_regnames = arm_regnames_raw;
803 fprintf (stderr, "Unrecognised register name set: %s\n", options);
806 fprintf (stderr, "Unrecognised disassembler option: %s\n", options);
811 /* NOTE: There are no checks in these routines that the relevant number of data bytes exist */
814 print_insn_big_arm (pc, info)
816 struct disassemble_info * info;
821 coff_symbol_type * cs;
822 elf_symbol_type * es;
825 if (info->disassembler_options)
827 parse_disassembler_options (info->disassembler_options);
829 /* To avoid repeated parsing of this option, we remove it here. */
830 info->disassembler_options = NULL;
834 if (info->symbols != NULL)
836 if (bfd_asymbol_flavour (*info->symbols) == bfd_target_coff_flavour)
838 cs = coffsymbol (*info->symbols);
839 is_thumb = ( cs->native->u.syment.n_sclass == C_THUMBEXT
840 || cs->native->u.syment.n_sclass == C_THUMBSTAT
841 || cs->native->u.syment.n_sclass == C_THUMBLABEL
842 || cs->native->u.syment.n_sclass == C_THUMBEXTFUNC
843 || cs->native->u.syment.n_sclass == C_THUMBSTATFUNC);
845 else if (bfd_asymbol_flavour (*info->symbols) == bfd_target_elf_flavour)
847 es = *(elf_symbol_type **)(info->symbols);
848 is_thumb = ELF_ST_TYPE (es->internal_elf_sym.st_info) ==
853 info->bytes_per_chunk = 4;
854 info->display_endian = BFD_ENDIAN_BIG;
856 /* Always fetch word aligned values. */
858 status = (*info->read_memory_func) (pc & ~ 0x3, (bfd_byte *) &b[0], 4, info);
861 (*info->memory_error_func) (status, pc, info);
869 given = (b[2] << 8) | b[3];
871 status = info->read_memory_func ((pc + 4) & ~ 0x3, (bfd_byte *) b, 4, info);
874 info->memory_error_func (status, pc + 4, info);
878 given |= (b[0] << 24) | (b[1] << 16);
881 given = (b[0] << 8) | b[1] | (b[2] << 24) | (b[3] << 16);
884 given = (b[0] << 24) | (b[1] << 16) | (b[2] << 8) | (b[3]);
887 status = print_insn_thumb (pc, info, given);
889 status = print_insn_arm (pc, info, given);
895 print_insn_little_arm (pc, info)
897 struct disassemble_info * info;
902 coff_symbol_type * cs;
903 elf_symbol_type * es;
906 if (info->disassembler_options)
908 parse_disassembler_options (info->disassembler_options);
910 /* To avoid repeated parsing of this option, we remove it here. */
911 info->disassembler_options = NULL;
916 if (info->symbols != NULL)
918 if (bfd_asymbol_flavour (*info->symbols) == bfd_target_coff_flavour)
920 cs = coffsymbol (*info->symbols);
921 is_thumb = ( cs->native->u.syment.n_sclass == C_THUMBEXT
922 || cs->native->u.syment.n_sclass == C_THUMBSTAT
923 || cs->native->u.syment.n_sclass == C_THUMBLABEL
924 || cs->native->u.syment.n_sclass == C_THUMBEXTFUNC
925 || cs->native->u.syment.n_sclass == C_THUMBSTATFUNC);
927 else if (bfd_asymbol_flavour (*info->symbols) == bfd_target_elf_flavour)
929 es = *(elf_symbol_type **)(info->symbols);
930 is_thumb = ELF_ST_TYPE (es->internal_elf_sym.st_info) ==
935 info->bytes_per_chunk = 4;
936 info->display_endian = BFD_ENDIAN_LITTLE;
938 status = (*info->read_memory_func) (pc, (bfd_byte *) &b[0], 4, info);
939 if (status != 0 && is_thumb)
941 info->bytes_per_chunk = 2;
943 status = info->read_memory_func (pc, (bfd_byte *) b, 2, info);
948 (*info->memory_error_func) (status, pc, info);
952 given = (b[0]) | (b[1] << 8) | (b[2] << 16) | (b[3] << 24);
955 status = print_insn_thumb (pc, info, given);
957 status = print_insn_arm (pc, info, given);