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Add toppers-jsp/ in nxtOSEK_v205b0.zip. They are licensed under TOPPERS license.
[nxt-jsp/etrobo-atk.git] / nxtOSEK / toppers_jsp / config / armv4 / cpu_config.h
1 /*
2  *  TOPPERS/JSP Kernel
3  *      Toyohashi Open Platform for Embedded Real-Time Systems/
4  *      Just Standard Profile Kernel
5  * 
6  *  Copyright (C) 2000-2004 by Embedded and Real-Time Systems Laboratory
7  *                              Toyohashi Univ. of Technology, JAPAN
8  *  Copyright (C) 2007-     by Monami Software Limited Partnership, JAPAN
9  * 
10  *  ¾åµ­Ãøºî¸¢¼Ô¤Ï¡¤°Ê²¼¤Î (1)¡Á(4) ¤Î¾ò·ï¤«¡¤Free Software Foundation 
11  *  ¤Ë¤è¤Ã¤Æ¸øɽ¤µ¤ì¤Æ¤¤¤ë GNU General Public License ¤Î Version 2 ¤Ëµ­
12  *  ½Ò¤µ¤ì¤Æ¤¤¤ë¾ò·ï¤òËþ¤¿¤¹¾ì¹ç¤Ë¸Â¤ê¡¤ËÜ¥½¥Õ¥È¥¦¥§¥¢¡ÊËÜ¥½¥Õ¥È¥¦¥§¥¢
13  *  ¤ò²þÊѤ·¤¿¤â¤Î¤ò´Þ¤à¡¥°Ê²¼Æ±¤¸¡Ë¤ò»ÈÍÑ¡¦Ê£À½¡¦²þÊÑ¡¦ºÆÇÛÉۡʰʲ¼¡¤
14  *  ÍøÍѤȸƤ֡ˤ¹¤ë¤³¤È¤ò̵½þ¤ÇµöÂú¤¹¤ë¡¥
15  *  (1) ËÜ¥½¥Õ¥È¥¦¥§¥¢¤ò¥½¡¼¥¹¥³¡¼¥É¤Î·Á¤ÇÍøÍѤ¹¤ë¾ì¹ç¤Ë¤Ï¡¤¾åµ­¤ÎÃøºî
16  *      ¸¢É½¼¨¡¤¤³¤ÎÍøÍѾò·ï¤ª¤è¤Ó²¼µ­¤Î̵Êݾڵ¬Ä꤬¡¤¤½¤Î¤Þ¤Þ¤Î·Á¤Ç¥½¡¼
17  *      ¥¹¥³¡¼¥ÉÃæ¤Ë´Þ¤Þ¤ì¤Æ¤¤¤ë¤³¤È¡¥
18  *  (2) ËÜ¥½¥Õ¥È¥¦¥§¥¢¤ò¡¤¥é¥¤¥Ö¥é¥ê·Á¼°¤Ê¤É¡¤Â¾¤Î¥½¥Õ¥È¥¦¥§¥¢³«È¯¤Ë»È
19  *      ÍѤǤ­¤ë·Á¤ÇºÆÇÛÉÛ¤¹¤ë¾ì¹ç¤Ë¤Ï¡¤ºÆÇÛÉÛ¤Ëȼ¤¦¥É¥­¥å¥á¥ó¥È¡ÊÍøÍÑ
20  *      ¼Ô¥Þ¥Ë¥å¥¢¥ë¤Ê¤É¡Ë¤Ë¡¤¾åµ­¤ÎÃøºî¸¢É½¼¨¡¤¤³¤ÎÍøÍѾò·ï¤ª¤è¤Ó²¼µ­
21  *      ¤Î̵Êݾڵ¬Äê¤ò·ÇºÜ¤¹¤ë¤³¤È¡¥
22  *  (3) ËÜ¥½¥Õ¥È¥¦¥§¥¢¤ò¡¤µ¡´ï¤ËÁȤ߹þ¤à¤Ê¤É¡¤Â¾¤Î¥½¥Õ¥È¥¦¥§¥¢³«È¯¤Ë»È
23  *      ÍѤǤ­¤Ê¤¤·Á¤ÇºÆÇÛÉÛ¤¹¤ë¾ì¹ç¤Ë¤Ï¡¤¼¡¤Î¤¤¤º¤ì¤«¤Î¾ò·ï¤òËþ¤¿¤¹¤³
24  *      ¤È¡¥
25  *    (a) ºÆÇÛÉÛ¤Ëȼ¤¦¥É¥­¥å¥á¥ó¥È¡ÊÍøÍѼԥޥ˥奢¥ë¤Ê¤É¡Ë¤Ë¡¤¾åµ­¤ÎÃø
26  *        ºî¸¢É½¼¨¡¤¤³¤ÎÍøÍѾò·ï¤ª¤è¤Ó²¼µ­¤Î̵Êݾڵ¬Äê¤ò·ÇºÜ¤¹¤ë¤³¤È¡¥
27  *    (b) ºÆÇÛÉۤηÁÂÖ¤ò¡¤Ê̤ËÄê¤á¤ëÊýË¡¤Ë¤è¤Ã¤Æ¡¤TOPPERS¥×¥í¥¸¥§¥¯¥È¤Ë
28  *        Êó¹ð¤¹¤ë¤³¤È¡¥
29  *  (4) ËÜ¥½¥Õ¥È¥¦¥§¥¢¤ÎÍøÍѤˤè¤êľÀÜŪ¤Þ¤¿¤Ï´ÖÀÜŪ¤ËÀ¸¤¸¤ë¤¤¤«¤Ê¤ë»
30  *      ³²¤«¤é¤â¡¤¾åµ­Ãøºî¸¢¼Ô¤ª¤è¤ÓTOPPERS¥×¥í¥¸¥§¥¯¥È¤òÌÈÀÕ¤¹¤ë¤³¤È¡¥
31  * 
32  *  ËÜ¥½¥Õ¥È¥¦¥§¥¢¤Ï¡¤ÌµÊݾڤÇÄ󶡤µ¤ì¤Æ¤¤¤ë¤â¤Î¤Ç¤¢¤ë¡¥¾åµ­Ãøºî¸¢¼Ô¤ª
33  *  ¤è¤ÓTOPPERS¥×¥í¥¸¥§¥¯¥È¤Ï¡¤ËÜ¥½¥Õ¥È¥¦¥§¥¢¤Ë´Ø¤·¤Æ¡¤¤½¤ÎŬÍѲÄǽÀ­¤â
34  *  ´Þ¤á¤Æ¡¤¤¤¤«¤Ê¤ëÊݾڤâ¹Ô¤ï¤Ê¤¤¡¥¤Þ¤¿¡¤ËÜ¥½¥Õ¥È¥¦¥§¥¢¤ÎÍøÍѤˤè¤êľ
35  *  ÀÜŪ¤Þ¤¿¤Ï´ÖÀÜŪ¤ËÀ¸¤¸¤¿¤¤¤«¤Ê¤ë»³²¤Ë´Ø¤·¤Æ¤â¡¤¤½¤ÎÀÕǤ¤òÉé¤ï¤Ê¤¤¡¥
36  * 
37  *  @(#) $Id: cpu_config.h,v 1.19 2004/09/17 13:45:55 honda Exp $
38  */
39
40 /*
41  *  ¥×¥í¥»¥Ã¥µ°Í¸¥â¥¸¥å¡¼¥ë¡ÊARM4vTÍÑ¡Ë
42  *
43  *  ¤³¤Î¥¤¥ó¥¯¥ë¡¼¥É¥Õ¥¡¥¤¥ë¤Ï¡¤t_config.h ¤Î¤ß¤«¤é¥¤¥ó¥¯¥ë¡¼¥É¤µ¤ì¤ë¡¥
44  *  Â¾¤Î¥Õ¥¡¥¤¥ë¤«¤éľÀÜ¥¤¥ó¥¯¥ë¡¼¥É¤·¤Æ¤Ï¤Ê¤é¤Ê¤¤¡¥
45  */
46
47 #ifndef _CPU_CONFIG_H_
48 #define _CPU_CONFIG_H_
49
50 /*
51  *  ¥«¡¼¥Í¥ëÆâÉô¼±ÊÌ̾¤Î¥ê¥Í¡¼¥à
52  */
53 #include "cpu_rename.h"
54
55 /*
56  *  ¥×¥í¥»¥Ã¥µ¤ÎÆüìÌ¿Îá¤Î¥¤¥ó¥é¥¤¥ó´Ø¿ôÄêµÁ
57  */
58 #ifndef _MACRO_ONLY
59 #include <cpu_insn.h>
60 #endif /* _MACRO_ONLY */
61
62 /*
63  * ¥·¥¹¥Æ¥à¸ÄÊÌÀßÄê
64  */
65 #include "sys_defs.h"
66
67 /*
68  *  TCB ´ØÏ¢¤ÎÄêµÁ
69  *
70  *  cpu_context.h ¤ËÆþ¤ì¤ëÊý¤¬¥¨¥ì¥¬¥ó¥È¤À¤¬¡¤»²¾È¤Î°Í¸À­¤Î´Ø·¸¤Ç¡¤
71  *  cpu_context.h ¤Ë¤ÏÆþ¤ì¤é¤ì¤Ê¤¤¡¥
72  */
73
74 /*
75  *  TCB Ãæ¤Î¥Õ¥£¡¼¥ë¥É¤Î¥Ó¥Ã¥ÈÉý¤ÎÄêµÁ
76  */
77 #define    TBIT_TCB_TSTAT       8    /* tstat ¥Õ¥£¡¼¥ë¥É¤Î¥Ó¥Ã¥ÈÉý */
78 #define    TBIT_TCB_PRIORITY    8    /* priority ¥Õ¥£¡¼¥ë¥É¤Î¥Ó¥Ã¥ÈÉý */
79
80 #ifndef _MACRO_ONLY
81 /*
82  *  ¥¿¥¹¥¯¥³¥ó¥Æ¥­¥¹¥È¥Ö¥í¥Ã¥¯¤ÎÄêµÁ
83  */
84 typedef struct task_context_block {
85     VP    sp;        /* ¥¹¥¿¥Ã¥¯¥Ý¥¤¥ó¥¿ */
86     FP    pc;        /* ¥×¥í¥°¥é¥à¥«¥¦¥ó¥¿ */
87 } CTXB;
88
89 /*
90  * ³ä¤ê¹þ¤ß¤Î¥Í¥¹¥È²ó¿ô¤Î¥«¥¦¥ó¥È
91  */
92 extern UW interrupt_count;
93
94
95 /*
96  *  ¥·¥¹¥Æ¥à¾õÂÖ»²¾È
97  */
98 Inline UB
99 current_mode()
100 {
101     return(current_sr() & CPSR_MODE_MASK);
102 }
103
104 Inline BOOL
105 sense_context()
106 {
107     return(interrupt_count > 0);
108 }
109
110 Inline BOOL
111 sense_lock()
112 {
113     return(current_sr() & CPSR_IRQ_BIT);
114 }
115
116 #define t_sense_lock    sense_lock
117 #define i_sense_lock    sense_lock
118
119
120 /*
121  *  CPU¥í¥Ã¥¯¤È¤½¤Î²ò½ü
122  *
123  */
124
125 #define t_lock_cpu      lock_cpu
126 #define i_lock_cpu      lock_cpu
127 #define t_unlock_cpu    unlock_cpu
128 #define i_unlock_cpu    unlock_cpu
129
130
131 Inline void
132 lock_cpu()
133 {
134     disint();
135 }
136
137 Inline void
138 unlock_cpu()
139 {
140     enaint();
141 }
142
143
144 /*
145  *  ¥¿¥¹¥¯¥Ç¥£¥¹¥Ñ¥Ã¥Á¥ã
146  */
147
148 /*
149  *  ºÇ¹âÍ¥Àè½ç°Ì¥¿¥¹¥¯¤Ø¤Î¥Ç¥£¥¹¥Ñ¥Ã¥Á¡Êcpu_support.S¡Ë
150  *
151  *  dispatch ¤Ï¡¤¥¿¥¹¥¯¥³¥ó¥Æ¥­¥¹¥È¤«¤é¸Æ¤Ó½Ð¤µ¤ì¤¿¥µ¡¼¥Ó¥¹¥³¡¼¥ë½èÍý
152  *  Æâ¤Ç¡¤CPU¥í¥Ã¥¯¾õÂ֤ǸƤӽФµ¤Ê¤±¤ì¤Ð¤Ê¤é¤Ê¤¤¡¥
153  */
154 extern void    dispatch(void);
155
156
157 /*
158  *  ¸½ºß¤Î¥³¥ó¥Æ¥­¥¹¥È¤ò¼Î¤Æ¤Æ¥Ç¥£¥¹¥Ñ¥Ã¥Á¡Êcpu_support.S¡Ë
159  *
160  *  exit_and_dispatch ¤Ï¡¤CPU¥í¥Ã¥¯¾õÂ֤ǸƤӽФµ¤Ê¤±¤ì¤Ð¤Ê¤é¤Ê¤¤¡¥
161  */
162 extern void    exit_and_dispatch(void);
163
164
165 #ifndef VECTOR_IN_ROM
166 /*
167  * Îã³°¥Ù¥¯¥¿¤Ë½ñ¤­¹þ¤Þ¤ì¤¿¥¸¥ã¥ó¥×Ì¿Î᤬»²¾È¤¹¤ë¥¢¥É¥ì¥¹
168  */
169 extern UW * arm_vector_add[8];
170
171
172 /*
173  * Îã³°¤Ë±þ¤¸¤¿¥Ï¥ó¥É¥é¤Îµ¯Æ°ÈÖÃÏ
174  */
175 extern UW arm_handler_add[8];
176 #endif /* VECTOR_IN_ROM */
177
178 /*
179  *  CPUÎã³°¥Ï¥ó¥É¥é¤ÎÀßÄê
180  */
181 extern void define_exc(EXCNO excno, FP exchdr);
182
183
184 #ifndef VECTOR_IN_ROM
185 Inline void
186 arm_install_handler(EXCNO excno, FP exchdr)
187 {
188     *arm_vector_add[excno] = (UW)exchdr;
189 }
190 #endif /* VECTOR_IN_ROM */
191
192 /*
193  *  CPUÎã³°¥Ï¥ó¥É¥é¤Î½ÐÆþ¸ý½èÍý
194  */
195
196
197 /*
198  *  CPUÎã³°¥Ï¥ó¥É¥é¤Î½ÐÆþ¸ý½èÍý¤ÎÀ¸À®¥Þ¥¯¥í
199  *
200  */
201 #define __EXCHDR_ENTRY(exchdr, stacktop)    \
202 extern void exchdr##_entry(VP sp);          \
203 asm(".text                             \n"  \
204 #exchdr "_entry:                       \n"  \
205 "       ldr   sp,.int_stack_"#exchdr"  \n"  /* ¥¹¥¿¥Ã¥¯¤ÎÀÚ¤êÂؤ¨        */\
206 "       sub   lr,lr,#4                 \n"  /* undef¤Ç¤â¤³¤ì¤Ç¤¤¤¤¤«?    */\
207 "       stmfd sp!, {r0 - r2,lr}        \n"  /* °ì»þŪ¤Ëint_stack¤ËÂÔÈò   */ \
208 "       mrs   r1, spsr                 \n"  /* SVC¥â¡¼¥É¤ËÀÚ¤êÂؤ¨¤ë¤¿¤á */ \
209 "       mov   r0, sp                   \n"  /* Êݸ¤¹¤ë                  */ \
210 "       mov   r2,#0xd3                 \n"  /* CPSR¤Î½ñ¤­´¹¤¨(SVC¥â¡¼¥É¤Ø)*/ \
211 "       msr   cpsr,r2                  \n" \
212 "       ldr   r2,[r0,#0x0C]            \n"     /* load  PC            */\
213 "       stmfd sp!,{r2}                 \n"     /* Store PC            */\
214 "       stmfd sp!,{r3,ip,lr}           \n"     /* Store r3,ip,lr      */\
215 "       ldmfd r0!,{r2,ip,lr}           \n"     /* load  r0,r1,r2      */\
216 "       stmfd sp!,{r1,r2,ip,lr}        \n"     /* SPSR,Store r0,r1,r2 */\
217 "       ldr   r2, .interrupt_count_"#exchdr"\n" /* Â¿½Å³ä¤ê¹þ¤ß¤«È½Äê  */\
218 "       ldr   r3, [r2]                 \n" \
219 "       add   r0,r3,#1                 \n" \
220 "       str   r0, [r2]                 \n" \
221 "       mov   r0,sp                    \n" /* Îã³°¥Ï¥ó¥É¥é¤Ø¤Î°ú¿ô */\
222 "       cmp   r3, #0x00                \n" \
223 "       ldreq   sp,stack_"#exchdr"     \n" /* ¥¹¥¿¥Ã¥¯¤ÎÊѹ¹       */\
224 "       stmeqfd sp!,{r0}               \n" /* ¥¿¥¹¥¯¥¹¥¿¥Ã¥¯¤ÎÊݸ */\
225 "       and   r2, r1, #0xc0            \n" /* Î㳰ȯÀ¸»þ¤ÎCPU¥í¥Ã¥¯¾õÂÖ(IRQ) */\
226 "       orr   r2, r2, #0x13            \n" /* ¤ÈFIQ¤ò·Ñ¾µ. SVC¥â¡¼¥É */\
227 "       msr   cpsr,r2                  \n" \
228 "       bl    "#exchdr"                \n" /* ¥Ï¥ó¥É¥é¸Æ¤Ó½Ð¤·     */\
229 "       mrs   r2, cpsr                 \n" /* FIQ¤ò·Ñ¾µ            */\
230 "       and   r2, r2, #0x40            \n" /*                      */\
231 "       orr   r2, r2, #0x93            \n" /* ³ä¤ê¹þ¤ß¶Ø»ß         */\
232 "       msr   cpsr,r2                  \n" \
233 "       ldr   r2,.interrupt_count_"#exchdr" \n"/* ³ä¤ê¹þ¤ß²ó¿ô¤ò   */\
234 "       ldr   r1, [r2]                 \n"     /* ¥Ç¥¯¥ê¥á¥ó¥È     */\
235 "       sub   r3,r1,#1                 \n"\
236 "       str   r3, [r2]                 \n"\
237 "       cmp   r3,#0x00                 \n" /* ³ä¤ê¹þ¤ß¥Í¥¹¥È¿ô?    */\
238 "       bne   return_to_task_"#exchdr" \n" \
239 "       ldmfd sp!,{r0}                 \n" /* ¥¿¥¹¥¯¥¹¥¿¥Ã¥¯¤ÎÉüµ¢ */\
240 "       mov   sp, r0                   \n"\
241 "       ldr   r1, reqflg_"#exchdr"     \n" /* Check reqflg         */\
242 "       ldr   r0,[r1]                  \n"\
243 "       cmp   r0,#0                    \n"\
244 "       beq   return_to_task_"#exchdr" \n"\
245 "       mov   r0,#0                    \n"\
246 "       str   r0,[r1]                  \n" /* Clear reqflg   */\
247 "       b     _kernel_ret_exc          \n" /* ret_int¤Ø      */\
248 "return_to_task_"#exchdr":             \n" \
249 "       ldmfd sp!,{r1}                 \n" /* CPSR¤ÎÉüµ¢½èÍý r1 <- cpsr*/\
250 "       mrs   r2, cpsr                 \n" /* FIQ¤ò·Ñ¾µ            */\
251 "       and   r2, r2, #0x40            \n" /*                      */\
252 "       and   r1, r1, #~0x40           \n" /*                      */\
253 "       orr   r1, r1, r2               \n" /*                      */\
254 "       msr   spsr, r1                 \n" /* ³ä¤ê¹þ¤ßµö²Ä   */\
255 "       ldmfd sp!,{r0-r3,ip,lr,pc}^    \n"\
256 "       .align 4                       \n"\
257 ".int_stack_"#exchdr":                 \n"\
258 "       .long _kernel_int_stack + 6 * 4 \n"\
259 "reqflg_"#exchdr":                     \n"\
260 "       .long     _kernel_reqflg       \n"\
261 "stack_"#exchdr":                      \n"\
262 "       .long   " #stacktop "          \n"\
263 ".interrupt_count_"#exchdr":            \n"\
264 "       .long   _kernel_interrupt_count \n")
265
266
267 #define _EXCHDR_ENTRY(exchdr, stacktop)    __EXCHDR_ENTRY(exchdr, stacktop)
268
269 #define EXCHDR_ENTRY(exchdr)    _EXCHDR_ENTRY(exchdr, STACKTOP)
270
271 #define EXC_ENTRY(exchdr) exchdr##_entry
272
273
274 /*
275  *  CPUÎã³°¤ÎȯÀ¸¤·¤¿»þ¤Î¥·¥¹¥Æ¥à¾õÂ֤λ²¾È
276  */
277
278 /*
279  *  CPUÎã³°¤ÎȯÀ¸¤·¤¿»þ¤Î¥Ç¥£¥¹¥Ñ¥Ã¥Á
280  */
281 Inline BOOL
282 exc_sense_context(VP p_excinf)
283 {
284     return(interrupt_count > 1);    
285 }
286
287
288 /*
289  *  CPUÎã³°¤ÎȯÀ¸¤·¤¿»þ¤ÎCPU¥í¥Ã¥¯¾õÂ֤λ²¾È
290  */
291 Inline BOOL
292 exc_sense_lock(VP p_excinf)
293 {
294     return((*((UW *)p_excinf) & CPSR_IRQ_BIT) == CPSR_IRQ_BIT );
295 }
296
297
298 /*
299  * Ì¤ÄêµÁ¤ÎÎã³°¤¬Æþ¤Ã¤¿¾ì¹ç
300  */
301 extern void undef_exception();
302 extern void swi_exception();
303 extern void prefetch_exception();
304 extern void data_abort_exception();
305 extern void irq_abort_exception();
306 extern void fiq_abort_exception();
307
308
309 /*
310  *  ¥×¥í¥»¥Ã¥µ°Í¸¤Î½é´ü²½
311  */
312 extern void    cpu_initialize(void);
313
314
315 /*
316  *  ¥×¥í¥»¥Ã¥µ°Í¸¤Î½ªÎ»»þ½èÍý
317  */
318 extern void    cpu_terminate(void);
319
320
321 /*
322  * CPU/³ä¹þ¤ß¥Ï¥ó¥É¥é¤Î½ÐÆþ¤ê¸ý½èÍý¤Ç°ì»þŪ¤Ë»ÈÍѤ¹¤ë¥¹¥¿¥Ã¥¯
323  */
324 #define INT_STACK_SIZE 6
325 extern UW int_stack[INT_STACK_SIZE];
326
327
328 #endif /* _MACRO_ONLY */
329 #if 0
330 #else /* patch */
331 #define COPYRIGHT_CPU \
332 "Copyright (C) 2007-     by Monami Software Limited Partnership, JAPAN\n"
333 #endif
334 #endif /* _CPU_CONFIG_H_ */
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