2 The problem here is that the ia64 scheduler saw a sequence of L L M type
3 insns, and messed up its internal state on which slot it was issuing
6 /* { dg-do compile { target ia64-*-* } } */
7 /* { dg-options "-O2 -mconstant-gp" } */
9 typedef unsigned long __u64;
10 typedef unsigned int __u32;
11 typedef struct { } spinlock_t;
18 __u64 irq_and_bh_counts;
20 __u32 softirq_pending;
21 } __attribute__ ((aligned ((1UL << 14)))) ;
44 unsigned int data_len;
48 static inline int skb_is_nonlinear(const struct sk_buff *skb)
52 static inline int skb_tailroom(const struct sk_buff *skb)
54 return skb_is_nonlinear(skb) ? 0 : skb->end-skb->tail;
58 unsigned short rta_len;
59 unsigned short rta_type;
61 int qdisc_copy_stats(struct sk_buff *skb, struct tc_stats *st)
63 do { do { (((struct cpuinfo_ia64 *) (0xa000000000000000 + 2*(1UL << 14)))->irq_stat.f.bh_count)++; __asm__ __volatile__("": : :"memory"); } while (0); (void)(st->lock); } while (0);
64 ({ if (skb_tailroom(skb) < (int)( (((( ((sizeof(struct rtattr))+4 -1) & ~(4 -1) ) + ((char*)&st->lock - (char*)st)))+4 -1) & ~(4 -1) )) goto rtattr_failure; __rta_fill(skb, TCA_STATS, (char*)&st->lock - (char*)st, st); });
65 do { do { } while(0); do { do { __asm__ __volatile__("": : :"memory"); (((struct cpuinfo_ia64 *) (0xa000000000000000 + 2*(1UL << 14)))->irq_stat.f.bh_count)--; } while (0); if (__builtin_expect((((struct cpuinfo_ia64 *) (0xa000000000000000 + 2*(1UL << 14)))->softirq_pending), 0) && (((struct cpuinfo_ia64 *) (0xa000000000000000 + 2*(1UL << 14)))->irq_stat.f.bh_count) == 0) do_softirq(); } while (0); } while (0);
68 do { do { } while(0); do { do { __asm__ __volatile__("": : :"memory"); (((struct cpuinfo_ia64 *) (0xa000000000000000 + 2*(1UL << 14)))->irq_stat.f.bh_count)--; } while (0); if (__builtin_expect((((struct cpuinfo_ia64 *) (0xa000000000000000 + 2*(1UL << 14)))->softirq_pending), 0) && (((struct cpuinfo_ia64 *) (0xa000000000000000 + 2*(1UL << 14)))->irq_stat.f.bh_count) == 0) do_softirq(); } while (0); } while (0);