1 /* RTL simplification functions for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
25 #include "coretypes.h"
31 #include "hard-reg-set.h"
34 #include "insn-config.h"
43 /* Simplification and canonicalization of RTL. */
45 /* Much code operates on (low, high) pairs; the low value is an
46 unsigned wide int, the high value a signed wide int. We
47 occasionally need to sign extend from low to high as if low were a
49 #define HWI_SIGN_EXTEND(low) \
50 ((((HOST_WIDE_INT) low) < 0) ? ((HOST_WIDE_INT) -1) : ((HOST_WIDE_INT) 0))
52 static rtx neg_const_int PARAMS ((enum machine_mode, rtx));
53 static int simplify_plus_minus_op_data_cmp PARAMS ((const void *,
55 static rtx simplify_plus_minus PARAMS ((enum rtx_code,
56 enum machine_mode, rtx,
59 /* Negate a CONST_INT rtx, truncating (because a conversion from a
60 maximally negative number can overflow). */
62 neg_const_int (mode, i)
63 enum machine_mode mode;
66 return gen_int_mode (- INTVAL (i), mode);
70 /* Make a binary operation by properly ordering the operands and
71 seeing if the expression folds. */
74 simplify_gen_binary (code, mode, op0, op1)
76 enum machine_mode mode;
81 /* Put complex operands first and constants second if commutative. */
82 if (GET_RTX_CLASS (code) == 'c'
83 && swap_commutative_operands_p (op0, op1))
84 tem = op0, op0 = op1, op1 = tem;
86 /* If this simplifies, do it. */
87 tem = simplify_binary_operation (code, mode, op0, op1);
91 /* Handle addition and subtraction specially. Otherwise, just form
94 if (code == PLUS || code == MINUS)
96 tem = simplify_plus_minus (code, mode, op0, op1, 1);
101 return gen_rtx_fmt_ee (code, mode, op0, op1);
104 /* If X is a MEM referencing the constant pool, return the real value.
105 Otherwise return X. */
107 avoid_constant_pool_reference (x)
111 enum machine_mode cmode;
113 switch (GET_CODE (x))
119 /* Handle float extensions of constant pool references. */
121 c = avoid_constant_pool_reference (tmp);
122 if (c != tmp && GET_CODE (c) == CONST_DOUBLE)
126 REAL_VALUE_FROM_CONST_DOUBLE (d, c);
127 return CONST_DOUBLE_FROM_REAL_VALUE (d, GET_MODE (x));
137 /* Call target hook to avoid the effects of -fpic etc... */
138 addr = (*targetm.delegitimize_address) (addr);
140 if (GET_CODE (addr) == LO_SUM)
141 addr = XEXP (addr, 1);
143 if (GET_CODE (addr) != SYMBOL_REF
144 || ! CONSTANT_POOL_ADDRESS_P (addr))
147 c = get_pool_constant (addr);
148 cmode = get_pool_mode (addr);
150 /* If we're accessing the constant in a different mode than it was
151 originally stored, attempt to fix that up via subreg simplifications.
152 If that fails we have no choice but to return the original memory. */
153 if (cmode != GET_MODE (x))
155 c = simplify_subreg (GET_MODE (x), c, cmode, 0);
162 /* Make a unary operation by first seeing if it folds and otherwise making
163 the specified operation. */
166 simplify_gen_unary (code, mode, op, op_mode)
168 enum machine_mode mode;
170 enum machine_mode op_mode;
174 /* If this simplifies, use it. */
175 if ((tem = simplify_unary_operation (code, mode, op, op_mode)) != 0)
178 return gen_rtx_fmt_e (code, mode, op);
181 /* Likewise for ternary operations. */
184 simplify_gen_ternary (code, mode, op0_mode, op0, op1, op2)
186 enum machine_mode mode, op0_mode;
191 /* If this simplifies, use it. */
192 if (0 != (tem = simplify_ternary_operation (code, mode, op0_mode,
196 return gen_rtx_fmt_eee (code, mode, op0, op1, op2);
199 /* Likewise, for relational operations.
200 CMP_MODE specifies mode comparison is done in.
204 simplify_gen_relational (code, mode, cmp_mode, op0, op1)
206 enum machine_mode mode;
207 enum machine_mode cmp_mode;
212 if ((tem = simplify_relational_operation (code, cmp_mode, op0, op1)) != 0)
215 /* For the following tests, ensure const0_rtx is op1. */
216 if (op0 == const0_rtx && swap_commutative_operands_p (op0, op1))
217 tem = op0, op0 = op1, op1 = tem, code = swap_condition (code);
219 /* If op0 is a compare, extract the comparison arguments from it. */
220 if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
221 op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
223 /* If op0 is a comparison, extract the comparison arguments form it. */
224 if (code == NE && op1 == const0_rtx
225 && GET_RTX_CLASS (GET_CODE (op0)) == '<')
227 else if (code == EQ && op1 == const0_rtx)
229 /* The following tests GET_RTX_CLASS (GET_CODE (op0)) == '<'. */
230 enum rtx_code new = reversed_comparison_code (op0, NULL_RTX);
240 /* Put complex operands first and constants second. */
241 if (swap_commutative_operands_p (op0, op1))
242 tem = op0, op0 = op1, op1 = tem, code = swap_condition (code);
244 return gen_rtx_fmt_ee (code, mode, op0, op1);
247 /* Replace all occurrences of OLD in X with NEW and try to simplify the
248 resulting RTX. Return a new RTX which is as simplified as possible. */
251 simplify_replace_rtx (x, old, new)
256 enum rtx_code code = GET_CODE (x);
257 enum machine_mode mode = GET_MODE (x);
259 /* If X is OLD, return NEW. Otherwise, if this is an expression, try
260 to build a new expression substituting recursively. If we can't do
261 anything, return our input. */
266 switch (GET_RTX_CLASS (code))
270 enum machine_mode op_mode = GET_MODE (XEXP (x, 0));
271 rtx op = (XEXP (x, 0) == old
272 ? new : simplify_replace_rtx (XEXP (x, 0), old, new));
274 return simplify_gen_unary (code, mode, op, op_mode);
280 simplify_gen_binary (code, mode,
281 simplify_replace_rtx (XEXP (x, 0), old, new),
282 simplify_replace_rtx (XEXP (x, 1), old, new));
285 enum machine_mode op_mode = (GET_MODE (XEXP (x, 0)) != VOIDmode
286 ? GET_MODE (XEXP (x, 0))
287 : GET_MODE (XEXP (x, 1)));
288 rtx op0 = simplify_replace_rtx (XEXP (x, 0), old, new);
289 rtx op1 = simplify_replace_rtx (XEXP (x, 1), old, new);
292 simplify_gen_relational (code, mode,
295 : GET_MODE (op0) != VOIDmode
304 enum machine_mode op_mode = GET_MODE (XEXP (x, 0));
305 rtx op0 = simplify_replace_rtx (XEXP (x, 0), old, new);
308 simplify_gen_ternary (code, mode,
313 simplify_replace_rtx (XEXP (x, 1), old, new),
314 simplify_replace_rtx (XEXP (x, 2), old, new));
318 /* The only case we try to handle is a SUBREG. */
322 exp = simplify_gen_subreg (GET_MODE (x),
323 simplify_replace_rtx (SUBREG_REG (x),
325 GET_MODE (SUBREG_REG (x)),
334 return replace_equiv_address_nv (x,
335 simplify_replace_rtx (XEXP (x, 0),
337 else if (code == LO_SUM)
339 rtx op0 = simplify_replace_rtx (XEXP (x, 0), old, new);
340 rtx op1 = simplify_replace_rtx (XEXP (x, 1), old, new);
342 /* (lo_sum (high x) x) -> x */
343 if (GET_CODE (op0) == HIGH && rtx_equal_p (XEXP (op0, 0), op1))
346 return gen_rtx_LO_SUM (mode, op0, op1);
348 else if (code == REG)
350 if (REG_P (old) && REGNO (x) == REGNO (old))
362 /* Try to simplify a unary operation CODE whose output mode is to be
363 MODE with input operand OP whose mode was originally OP_MODE.
364 Return zero if no simplification can be made. */
366 simplify_unary_operation (code, mode, op, op_mode)
368 enum machine_mode mode;
370 enum machine_mode op_mode;
372 unsigned int width = GET_MODE_BITSIZE (mode);
373 rtx trueop = avoid_constant_pool_reference (op);
375 /* The order of these tests is critical so that, for example, we don't
376 check the wrong mode (input vs. output) for a conversion operation,
377 such as FIX. At some point, this should be simplified. */
379 if (code == FLOAT && GET_MODE (trueop) == VOIDmode
380 && (GET_CODE (trueop) == CONST_DOUBLE || GET_CODE (trueop) == CONST_INT))
382 HOST_WIDE_INT hv, lv;
385 if (GET_CODE (trueop) == CONST_INT)
386 lv = INTVAL (trueop), hv = HWI_SIGN_EXTEND (lv);
388 lv = CONST_DOUBLE_LOW (trueop), hv = CONST_DOUBLE_HIGH (trueop);
390 REAL_VALUE_FROM_INT (d, lv, hv, mode);
391 d = real_value_truncate (mode, d);
392 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
394 else if (code == UNSIGNED_FLOAT && GET_MODE (trueop) == VOIDmode
395 && (GET_CODE (trueop) == CONST_DOUBLE
396 || GET_CODE (trueop) == CONST_INT))
398 HOST_WIDE_INT hv, lv;
401 if (GET_CODE (trueop) == CONST_INT)
402 lv = INTVAL (trueop), hv = HWI_SIGN_EXTEND (lv);
404 lv = CONST_DOUBLE_LOW (trueop), hv = CONST_DOUBLE_HIGH (trueop);
406 if (op_mode == VOIDmode)
408 /* We don't know how to interpret negative-looking numbers in
409 this case, so don't try to fold those. */
413 else if (GET_MODE_BITSIZE (op_mode) >= HOST_BITS_PER_WIDE_INT * 2)
416 hv = 0, lv &= GET_MODE_MASK (op_mode);
418 REAL_VALUE_FROM_UNSIGNED_INT (d, lv, hv, mode);
419 d = real_value_truncate (mode, d);
420 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
423 if (GET_CODE (trueop) == CONST_INT
424 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
426 HOST_WIDE_INT arg0 = INTVAL (trueop);
440 val = (arg0 >= 0 ? arg0 : - arg0);
444 /* Don't use ffs here. Instead, get low order bit and then its
445 number. If arg0 is zero, this will return 0, as desired. */
446 arg0 &= GET_MODE_MASK (mode);
447 val = exact_log2 (arg0 & (- arg0)) + 1;
451 arg0 &= GET_MODE_MASK (mode);
452 if (arg0 == 0 && CLZ_DEFINED_VALUE_AT_ZERO (mode, val))
455 val = GET_MODE_BITSIZE (mode) - floor_log2 (arg0) - 1;
459 arg0 &= GET_MODE_MASK (mode);
462 /* Even if the value at zero is undefined, we have to come
463 up with some replacement. Seems good enough. */
464 if (! CTZ_DEFINED_VALUE_AT_ZERO (mode, val))
465 val = GET_MODE_BITSIZE (mode);
468 val = exact_log2 (arg0 & -arg0);
472 arg0 &= GET_MODE_MASK (mode);
475 val++, arg0 &= arg0 - 1;
479 arg0 &= GET_MODE_MASK (mode);
482 val++, arg0 &= arg0 - 1;
491 /* When zero-extending a CONST_INT, we need to know its
493 if (op_mode == VOIDmode)
495 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
497 /* If we were really extending the mode,
498 we would have to distinguish between zero-extension
499 and sign-extension. */
500 if (width != GET_MODE_BITSIZE (op_mode))
504 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
505 val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
511 if (op_mode == VOIDmode)
513 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
515 /* If we were really extending the mode,
516 we would have to distinguish between zero-extension
517 and sign-extension. */
518 if (width != GET_MODE_BITSIZE (op_mode))
522 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
525 = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
527 & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1)))
528 val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
545 val = trunc_int_for_mode (val, mode);
547 return GEN_INT (val);
550 /* We can do some operations on integer CONST_DOUBLEs. Also allow
551 for a DImode operation on a CONST_INT. */
552 else if (GET_MODE (trueop) == VOIDmode
553 && width <= HOST_BITS_PER_WIDE_INT * 2
554 && (GET_CODE (trueop) == CONST_DOUBLE
555 || GET_CODE (trueop) == CONST_INT))
557 unsigned HOST_WIDE_INT l1, lv;
558 HOST_WIDE_INT h1, hv;
560 if (GET_CODE (trueop) == CONST_DOUBLE)
561 l1 = CONST_DOUBLE_LOW (trueop), h1 = CONST_DOUBLE_HIGH (trueop);
563 l1 = INTVAL (trueop), h1 = HWI_SIGN_EXTEND (l1);
573 neg_double (l1, h1, &lv, &hv);
578 neg_double (l1, h1, &lv, &hv);
590 lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & -h1) + 1;
593 lv = exact_log2 (l1 & -l1) + 1;
599 lv = GET_MODE_BITSIZE (mode) - floor_log2 (l1) - 1;
601 lv = GET_MODE_BITSIZE (mode) - floor_log2 (h1) - 1
602 - HOST_BITS_PER_WIDE_INT;
610 lv = GET_MODE_BITSIZE (mode);
612 lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & -h1);
615 lv = exact_log2 (l1 & -l1);
638 /* This is just a change-of-mode, so do nothing. */
643 if (op_mode == VOIDmode)
646 if (GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
650 lv = l1 & GET_MODE_MASK (op_mode);
654 if (op_mode == VOIDmode
655 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
659 lv = l1 & GET_MODE_MASK (op_mode);
660 if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT
661 && (lv & ((HOST_WIDE_INT) 1
662 << (GET_MODE_BITSIZE (op_mode) - 1))) != 0)
663 lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
665 hv = HWI_SIGN_EXTEND (lv);
676 return immed_double_const (lv, hv, mode);
679 else if (GET_CODE (trueop) == CONST_DOUBLE
680 && GET_MODE_CLASS (mode) == MODE_FLOAT)
682 REAL_VALUE_TYPE d, t;
683 REAL_VALUE_FROM_CONST_DOUBLE (d, trueop);
688 if (HONOR_SNANS (mode) && real_isnan (&d))
690 real_sqrt (&t, mode, &d);
694 d = REAL_VALUE_ABS (d);
697 d = REAL_VALUE_NEGATE (d);
700 d = real_value_truncate (mode, d);
703 /* All this does is change the mode. */
706 real_arithmetic (&d, FIX_TRUNC_EXPR, &d, NULL);
712 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
715 else if (GET_CODE (trueop) == CONST_DOUBLE
716 && GET_MODE_CLASS (GET_MODE (trueop)) == MODE_FLOAT
717 && GET_MODE_CLASS (mode) == MODE_INT
718 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
722 REAL_VALUE_FROM_CONST_DOUBLE (d, trueop);
725 case FIX: i = REAL_VALUE_FIX (d); break;
726 case UNSIGNED_FIX: i = REAL_VALUE_UNSIGNED_FIX (d); break;
730 return gen_int_mode (i, mode);
733 /* This was formerly used only for non-IEEE float.
734 eggert@twinsun.com says it is safe for IEEE also. */
737 enum rtx_code reversed;
738 /* There are some simplifications we can do even if the operands
743 /* (not (not X)) == X. */
744 if (GET_CODE (op) == NOT)
747 /* (not (eq X Y)) == (ne X Y), etc. */
748 if (mode == BImode && GET_RTX_CLASS (GET_CODE (op)) == '<'
749 && ((reversed = reversed_comparison_code (op, NULL_RTX))
751 return gen_rtx_fmt_ee (reversed,
752 op_mode, XEXP (op, 0), XEXP (op, 1));
756 /* (neg (neg X)) == X. */
757 if (GET_CODE (op) == NEG)
762 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
763 becomes just the MINUS if its mode is MODE. This allows
764 folding switch statements on machines using casesi (such as
766 if (GET_CODE (op) == TRUNCATE
767 && GET_MODE (XEXP (op, 0)) == mode
768 && GET_CODE (XEXP (op, 0)) == MINUS
769 && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF
770 && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF)
773 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
774 if (! POINTERS_EXTEND_UNSIGNED
775 && mode == Pmode && GET_MODE (op) == ptr_mode
777 || (GET_CODE (op) == SUBREG
778 && GET_CODE (SUBREG_REG (op)) == REG
779 && REG_POINTER (SUBREG_REG (op))
780 && GET_MODE (SUBREG_REG (op)) == Pmode)))
781 return convert_memory_address (Pmode, op);
785 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
787 if (POINTERS_EXTEND_UNSIGNED > 0
788 && mode == Pmode && GET_MODE (op) == ptr_mode
790 || (GET_CODE (op) == SUBREG
791 && GET_CODE (SUBREG_REG (op)) == REG
792 && REG_POINTER (SUBREG_REG (op))
793 && GET_MODE (SUBREG_REG (op)) == Pmode)))
794 return convert_memory_address (Pmode, op);
806 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
807 and OP1. Return 0 if no simplification is possible.
809 Don't use this for relational operations such as EQ or LT.
810 Use simplify_relational_operation instead. */
812 simplify_binary_operation (code, mode, op0, op1)
814 enum machine_mode mode;
817 HOST_WIDE_INT arg0, arg1, arg0s, arg1s;
819 unsigned int width = GET_MODE_BITSIZE (mode);
821 rtx trueop0 = avoid_constant_pool_reference (op0);
822 rtx trueop1 = avoid_constant_pool_reference (op1);
824 /* Relational operations don't work here. We must know the mode
825 of the operands in order to do the comparison correctly.
826 Assuming a full word can give incorrect results.
827 Consider comparing 128 with -128 in QImode. */
829 if (GET_RTX_CLASS (code) == '<')
832 /* Make sure the constant is second. */
833 if (GET_RTX_CLASS (code) == 'c'
834 && swap_commutative_operands_p (trueop0, trueop1))
836 tem = op0, op0 = op1, op1 = tem;
837 tem = trueop0, trueop0 = trueop1, trueop1 = tem;
840 if (GET_MODE_CLASS (mode) == MODE_FLOAT
841 && GET_CODE (trueop0) == CONST_DOUBLE
842 && GET_CODE (trueop1) == CONST_DOUBLE
843 && mode == GET_MODE (op0) && mode == GET_MODE (op1))
845 REAL_VALUE_TYPE f0, f1, value;
847 REAL_VALUE_FROM_CONST_DOUBLE (f0, trueop0);
848 REAL_VALUE_FROM_CONST_DOUBLE (f1, trueop1);
849 f0 = real_value_truncate (mode, f0);
850 f1 = real_value_truncate (mode, f1);
853 && !MODE_HAS_INFINITIES (mode)
854 && REAL_VALUES_EQUAL (f1, dconst0))
857 REAL_ARITHMETIC (value, rtx_to_tree_code (code), f0, f1);
859 value = real_value_truncate (mode, value);
860 return CONST_DOUBLE_FROM_REAL_VALUE (value, mode);
863 /* We can fold some multi-word operations. */
864 if (GET_MODE_CLASS (mode) == MODE_INT
865 && width == HOST_BITS_PER_WIDE_INT * 2
866 && (GET_CODE (trueop0) == CONST_DOUBLE
867 || GET_CODE (trueop0) == CONST_INT)
868 && (GET_CODE (trueop1) == CONST_DOUBLE
869 || GET_CODE (trueop1) == CONST_INT))
871 unsigned HOST_WIDE_INT l1, l2, lv;
872 HOST_WIDE_INT h1, h2, hv;
874 if (GET_CODE (trueop0) == CONST_DOUBLE)
875 l1 = CONST_DOUBLE_LOW (trueop0), h1 = CONST_DOUBLE_HIGH (trueop0);
877 l1 = INTVAL (trueop0), h1 = HWI_SIGN_EXTEND (l1);
879 if (GET_CODE (trueop1) == CONST_DOUBLE)
880 l2 = CONST_DOUBLE_LOW (trueop1), h2 = CONST_DOUBLE_HIGH (trueop1);
882 l2 = INTVAL (trueop1), h2 = HWI_SIGN_EXTEND (l2);
887 /* A - B == A + (-B). */
888 neg_double (l2, h2, &lv, &hv);
891 /* .. fall through ... */
894 add_double (l1, h1, l2, h2, &lv, &hv);
898 mul_double (l1, h1, l2, h2, &lv, &hv);
901 case DIV: case MOD: case UDIV: case UMOD:
902 /* We'd need to include tree.h to do this and it doesn't seem worth
907 lv = l1 & l2, hv = h1 & h2;
911 lv = l1 | l2, hv = h1 | h2;
915 lv = l1 ^ l2, hv = h1 ^ h2;
921 && ((unsigned HOST_WIDE_INT) l1
922 < (unsigned HOST_WIDE_INT) l2)))
931 && ((unsigned HOST_WIDE_INT) l1
932 > (unsigned HOST_WIDE_INT) l2)))
939 if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2
941 && ((unsigned HOST_WIDE_INT) l1
942 < (unsigned HOST_WIDE_INT) l2)))
949 if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2
951 && ((unsigned HOST_WIDE_INT) l1
952 > (unsigned HOST_WIDE_INT) l2)))
958 case LSHIFTRT: case ASHIFTRT:
960 case ROTATE: case ROTATERT:
961 #ifdef SHIFT_COUNT_TRUNCATED
962 if (SHIFT_COUNT_TRUNCATED)
963 l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0;
966 if (h2 != 0 || l2 >= GET_MODE_BITSIZE (mode))
969 if (code == LSHIFTRT || code == ASHIFTRT)
970 rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
972 else if (code == ASHIFT)
973 lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 1);
974 else if (code == ROTATE)
975 lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
976 else /* code == ROTATERT */
977 rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
984 return immed_double_const (lv, hv, mode);
987 if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT
988 || width > HOST_BITS_PER_WIDE_INT || width == 0)
990 /* Even if we can't compute a constant result,
991 there are some cases worth simplifying. */
996 /* Maybe simplify x + 0 to x. The two expressions are equivalent
997 when x is NaN, infinite, or finite and nonzero. They aren't
998 when x is -0 and the rounding mode is not towards -infinity,
999 since (-0) + 0 is then 0. */
1000 if (!HONOR_SIGNED_ZEROS (mode) && trueop1 == CONST0_RTX (mode))
1003 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)). These
1004 transformations are safe even for IEEE. */
1005 if (GET_CODE (op0) == NEG)
1006 return simplify_gen_binary (MINUS, mode, op1, XEXP (op0, 0));
1007 else if (GET_CODE (op1) == NEG)
1008 return simplify_gen_binary (MINUS, mode, op0, XEXP (op1, 0));
1010 /* (~a) + 1 -> -a */
1011 if (INTEGRAL_MODE_P (mode)
1012 && GET_CODE (op0) == NOT
1013 && trueop1 == const1_rtx)
1014 return gen_rtx_NEG (mode, XEXP (op0, 0));
1016 /* Handle both-operands-constant cases. We can only add
1017 CONST_INTs to constants since the sum of relocatable symbols
1018 can't be handled by most assemblers. Don't add CONST_INT
1019 to CONST_INT since overflow won't be computed properly if wider
1020 than HOST_BITS_PER_WIDE_INT. */
1022 if (CONSTANT_P (op0) && GET_MODE (op0) != VOIDmode
1023 && GET_CODE (op1) == CONST_INT)
1024 return plus_constant (op0, INTVAL (op1));
1025 else if (CONSTANT_P (op1) && GET_MODE (op1) != VOIDmode
1026 && GET_CODE (op0) == CONST_INT)
1027 return plus_constant (op1, INTVAL (op0));
1029 /* See if this is something like X * C - X or vice versa or
1030 if the multiplication is written as a shift. If so, we can
1031 distribute and make a new multiply, shift, or maybe just
1032 have X (if C is 2 in the example above). But don't make
1033 real multiply if we didn't have one before. */
1035 if (! FLOAT_MODE_P (mode))
1037 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
1038 rtx lhs = op0, rhs = op1;
1041 if (GET_CODE (lhs) == NEG)
1042 coeff0 = -1, lhs = XEXP (lhs, 0);
1043 else if (GET_CODE (lhs) == MULT
1044 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
1046 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
1049 else if (GET_CODE (lhs) == ASHIFT
1050 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
1051 && INTVAL (XEXP (lhs, 1)) >= 0
1052 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
1054 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
1055 lhs = XEXP (lhs, 0);
1058 if (GET_CODE (rhs) == NEG)
1059 coeff1 = -1, rhs = XEXP (rhs, 0);
1060 else if (GET_CODE (rhs) == MULT
1061 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
1063 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
1066 else if (GET_CODE (rhs) == ASHIFT
1067 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
1068 && INTVAL (XEXP (rhs, 1)) >= 0
1069 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
1071 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
1072 rhs = XEXP (rhs, 0);
1075 if (rtx_equal_p (lhs, rhs))
1077 tem = simplify_gen_binary (MULT, mode, lhs,
1078 GEN_INT (coeff0 + coeff1));
1079 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
1083 /* If one of the operands is a PLUS or a MINUS, see if we can
1084 simplify this by the associative law.
1085 Don't use the associative law for floating point.
1086 The inaccuracy makes it nonassociative,
1087 and subtle programs can break if operations are associated. */
1089 if (INTEGRAL_MODE_P (mode)
1090 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
1091 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS
1092 || (GET_CODE (op0) == CONST
1093 && GET_CODE (XEXP (op0, 0)) == PLUS)
1094 || (GET_CODE (op1) == CONST
1095 && GET_CODE (XEXP (op1, 0)) == PLUS))
1096 && (tem = simplify_plus_minus (code, mode, op0, op1, 0)) != 0)
1102 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
1103 using cc0, in which case we want to leave it as a COMPARE
1104 so we can distinguish it from a register-register-copy.
1106 In IEEE floating point, x-0 is not the same as x. */
1108 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
1109 || ! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations)
1110 && trueop1 == CONST0_RTX (mode))
1114 /* Convert (compare (gt (flags) 0) (lt (flags) 0)) to (flags). */
1115 if (((GET_CODE (op0) == GT && GET_CODE (op1) == LT)
1116 || (GET_CODE (op0) == GTU && GET_CODE (op1) == LTU))
1117 && XEXP (op0, 1) == const0_rtx && XEXP (op1, 1) == const0_rtx)
1119 rtx xop00 = XEXP (op0, 0);
1120 rtx xop10 = XEXP (op1, 0);
1123 if (GET_CODE (xop00) == CC0 && GET_CODE (xop10) == CC0)
1125 if (GET_CODE (xop00) == REG && GET_CODE (xop10) == REG
1126 && GET_MODE (xop00) == GET_MODE (xop10)
1127 && REGNO (xop00) == REGNO (xop10)
1128 && GET_MODE_CLASS (GET_MODE (xop00)) == MODE_CC
1129 && GET_MODE_CLASS (GET_MODE (xop10)) == MODE_CC)
1136 /* We can't assume x-x is 0 even with non-IEEE floating point,
1137 but since it is zero except in very strange circumstances, we
1138 will treat it as zero with -funsafe-math-optimizations. */
1139 if (rtx_equal_p (trueop0, trueop1)
1140 && ! side_effects_p (op0)
1141 && (! FLOAT_MODE_P (mode) || flag_unsafe_math_optimizations))
1142 return CONST0_RTX (mode);
1144 /* Change subtraction from zero into negation. (0 - x) is the
1145 same as -x when x is NaN, infinite, or finite and nonzero.
1146 But if the mode has signed zeros, and does not round towards
1147 -infinity, then 0 - 0 is 0, not -0. */
1148 if (!HONOR_SIGNED_ZEROS (mode) && trueop0 == CONST0_RTX (mode))
1149 return gen_rtx_NEG (mode, op1);
1151 /* (-1 - a) is ~a. */
1152 if (trueop0 == constm1_rtx)
1153 return gen_rtx_NOT (mode, op1);
1155 /* Subtracting 0 has no effect unless the mode has signed zeros
1156 and supports rounding towards -infinity. In such a case,
1158 if (!(HONOR_SIGNED_ZEROS (mode)
1159 && HONOR_SIGN_DEPENDENT_ROUNDING (mode))
1160 && trueop1 == CONST0_RTX (mode))
1163 /* See if this is something like X * C - X or vice versa or
1164 if the multiplication is written as a shift. If so, we can
1165 distribute and make a new multiply, shift, or maybe just
1166 have X (if C is 2 in the example above). But don't make
1167 real multiply if we didn't have one before. */
1169 if (! FLOAT_MODE_P (mode))
1171 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
1172 rtx lhs = op0, rhs = op1;
1175 if (GET_CODE (lhs) == NEG)
1176 coeff0 = -1, lhs = XEXP (lhs, 0);
1177 else if (GET_CODE (lhs) == MULT
1178 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
1180 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
1183 else if (GET_CODE (lhs) == ASHIFT
1184 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
1185 && INTVAL (XEXP (lhs, 1)) >= 0
1186 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
1188 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
1189 lhs = XEXP (lhs, 0);
1192 if (GET_CODE (rhs) == NEG)
1193 coeff1 = - 1, rhs = XEXP (rhs, 0);
1194 else if (GET_CODE (rhs) == MULT
1195 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
1197 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
1200 else if (GET_CODE (rhs) == ASHIFT
1201 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
1202 && INTVAL (XEXP (rhs, 1)) >= 0
1203 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
1205 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
1206 rhs = XEXP (rhs, 0);
1209 if (rtx_equal_p (lhs, rhs))
1211 tem = simplify_gen_binary (MULT, mode, lhs,
1212 GEN_INT (coeff0 - coeff1));
1213 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
1217 /* (a - (-b)) -> (a + b). True even for IEEE. */
1218 if (GET_CODE (op1) == NEG)
1219 return simplify_gen_binary (PLUS, mode, op0, XEXP (op1, 0));
1221 /* If one of the operands is a PLUS or a MINUS, see if we can
1222 simplify this by the associative law.
1223 Don't use the associative law for floating point.
1224 The inaccuracy makes it nonassociative,
1225 and subtle programs can break if operations are associated. */
1227 if (INTEGRAL_MODE_P (mode)
1228 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
1229 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS
1230 || (GET_CODE (op0) == CONST
1231 && GET_CODE (XEXP (op0, 0)) == PLUS)
1232 || (GET_CODE (op1) == CONST
1233 && GET_CODE (XEXP (op1, 0)) == PLUS))
1234 && (tem = simplify_plus_minus (code, mode, op0, op1, 0)) != 0)
1237 /* Don't let a relocatable value get a negative coeff. */
1238 if (GET_CODE (op1) == CONST_INT && GET_MODE (op0) != VOIDmode)
1239 return simplify_gen_binary (PLUS, mode,
1241 neg_const_int (mode, op1));
1243 /* (x - (x & y)) -> (x & ~y) */
1244 if (GET_CODE (op1) == AND)
1246 if (rtx_equal_p (op0, XEXP (op1, 0)))
1247 return simplify_gen_binary (AND, mode, op0,
1248 gen_rtx_NOT (mode, XEXP (op1, 1)));
1249 if (rtx_equal_p (op0, XEXP (op1, 1)))
1250 return simplify_gen_binary (AND, mode, op0,
1251 gen_rtx_NOT (mode, XEXP (op1, 0)));
1256 if (trueop1 == constm1_rtx)
1258 tem = simplify_unary_operation (NEG, mode, op0, mode);
1260 return tem ? tem : gen_rtx_NEG (mode, op0);
1263 /* Maybe simplify x * 0 to 0. The reduction is not valid if
1264 x is NaN, since x * 0 is then also NaN. Nor is it valid
1265 when the mode has signed zeros, since multiplying a negative
1266 number by 0 will give -0, not 0. */
1267 if (!HONOR_NANS (mode)
1268 && !HONOR_SIGNED_ZEROS (mode)
1269 && trueop1 == CONST0_RTX (mode)
1270 && ! side_effects_p (op0))
1273 /* In IEEE floating point, x*1 is not equivalent to x for
1275 if (!HONOR_SNANS (mode)
1276 && trueop1 == CONST1_RTX (mode))
1279 /* Convert multiply by constant power of two into shift unless
1280 we are still generating RTL. This test is a kludge. */
1281 if (GET_CODE (trueop1) == CONST_INT
1282 && (val = exact_log2 (INTVAL (trueop1))) >= 0
1283 /* If the mode is larger than the host word size, and the
1284 uppermost bit is set, then this isn't a power of two due
1285 to implicit sign extension. */
1286 && (width <= HOST_BITS_PER_WIDE_INT
1287 || val != HOST_BITS_PER_WIDE_INT - 1)
1288 && ! rtx_equal_function_value_matters)
1289 return gen_rtx_ASHIFT (mode, op0, GEN_INT (val));
1291 /* x*2 is x+x and x*(-1) is -x */
1292 if (GET_CODE (trueop1) == CONST_DOUBLE
1293 && GET_MODE_CLASS (GET_MODE (trueop1)) == MODE_FLOAT
1294 && GET_MODE (op0) == mode)
1297 REAL_VALUE_FROM_CONST_DOUBLE (d, trueop1);
1299 if (REAL_VALUES_EQUAL (d, dconst2))
1300 return gen_rtx_PLUS (mode, op0, copy_rtx (op0));
1302 if (REAL_VALUES_EQUAL (d, dconstm1))
1303 return gen_rtx_NEG (mode, op0);
1308 if (trueop1 == const0_rtx)
1310 if (GET_CODE (trueop1) == CONST_INT
1311 && ((INTVAL (trueop1) & GET_MODE_MASK (mode))
1312 == GET_MODE_MASK (mode)))
1314 if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
1316 /* A | (~A) -> -1 */
1317 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
1318 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
1319 && ! side_effects_p (op0)
1320 && GET_MODE_CLASS (mode) != MODE_CC)
1325 if (trueop1 == const0_rtx)
1327 if (GET_CODE (trueop1) == CONST_INT
1328 && ((INTVAL (trueop1) & GET_MODE_MASK (mode))
1329 == GET_MODE_MASK (mode)))
1330 return gen_rtx_NOT (mode, op0);
1331 if (trueop0 == trueop1 && ! side_effects_p (op0)
1332 && GET_MODE_CLASS (mode) != MODE_CC)
1337 if (trueop1 == const0_rtx && ! side_effects_p (op0))
1339 if (GET_CODE (trueop1) == CONST_INT
1340 && ((INTVAL (trueop1) & GET_MODE_MASK (mode))
1341 == GET_MODE_MASK (mode)))
1343 if (trueop0 == trueop1 && ! side_effects_p (op0)
1344 && GET_MODE_CLASS (mode) != MODE_CC)
1347 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
1348 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
1349 && ! side_effects_p (op0)
1350 && GET_MODE_CLASS (mode) != MODE_CC)
1355 /* Convert divide by power of two into shift (divide by 1 handled
1357 if (GET_CODE (trueop1) == CONST_INT
1358 && (arg1 = exact_log2 (INTVAL (trueop1))) > 0)
1359 return gen_rtx_LSHIFTRT (mode, op0, GEN_INT (arg1));
1361 /* ... fall through ... */
1364 if (trueop1 == CONST1_RTX (mode))
1366 /* On some platforms DIV uses narrower mode than its
1368 rtx x = gen_lowpart_common (mode, op0);
1371 else if (mode != GET_MODE (op0) && GET_MODE (op0) != VOIDmode)
1372 return gen_lowpart_SUBREG (mode, op0);
1377 /* Maybe change 0 / x to 0. This transformation isn't safe for
1378 modes with NaNs, since 0 / 0 will then be NaN rather than 0.
1379 Nor is it safe for modes with signed zeros, since dividing
1380 0 by a negative number gives -0, not 0. */
1381 if (!HONOR_NANS (mode)
1382 && !HONOR_SIGNED_ZEROS (mode)
1383 && trueop0 == CONST0_RTX (mode)
1384 && ! side_effects_p (op1))
1387 /* Change division by a constant into multiplication. Only do
1388 this with -funsafe-math-optimizations. */
1389 else if (GET_CODE (trueop1) == CONST_DOUBLE
1390 && GET_MODE_CLASS (GET_MODE (trueop1)) == MODE_FLOAT
1391 && trueop1 != CONST0_RTX (mode)
1392 && flag_unsafe_math_optimizations)
1395 REAL_VALUE_FROM_CONST_DOUBLE (d, trueop1);
1397 if (! REAL_VALUES_EQUAL (d, dconst0))
1399 REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d);
1400 return gen_rtx_MULT (mode, op0,
1401 CONST_DOUBLE_FROM_REAL_VALUE (d, mode));
1407 /* Handle modulus by power of two (mod with 1 handled below). */
1408 if (GET_CODE (trueop1) == CONST_INT
1409 && exact_log2 (INTVAL (trueop1)) > 0)
1410 return gen_rtx_AND (mode, op0, GEN_INT (INTVAL (op1) - 1));
1412 /* ... fall through ... */
1415 if ((trueop0 == const0_rtx || trueop1 == const1_rtx)
1416 && ! side_effects_p (op0) && ! side_effects_p (op1))
1423 /* Rotating ~0 always results in ~0. */
1424 if (GET_CODE (trueop0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT
1425 && (unsigned HOST_WIDE_INT) INTVAL (trueop0) == GET_MODE_MASK (mode)
1426 && ! side_effects_p (op1))
1429 /* ... fall through ... */
1433 if (trueop1 == const0_rtx)
1435 if (trueop0 == const0_rtx && ! side_effects_p (op1))
1440 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (trueop1) == CONST_INT
1441 && INTVAL (trueop1) == (HOST_WIDE_INT) 1 << (width -1)
1442 && ! side_effects_p (op0))
1444 else if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
1449 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (trueop1) == CONST_INT
1450 && ((unsigned HOST_WIDE_INT) INTVAL (trueop1)
1451 == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1)
1452 && ! side_effects_p (op0))
1454 else if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
1459 if (trueop1 == const0_rtx && ! side_effects_p (op0))
1461 else if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
1466 if (trueop1 == constm1_rtx && ! side_effects_p (op0))
1468 else if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
1476 /* ??? There are simplifications that can be done. */
1486 /* Get the integer argument values in two forms:
1487 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
1489 arg0 = INTVAL (trueop0);
1490 arg1 = INTVAL (trueop1);
1492 if (width < HOST_BITS_PER_WIDE_INT)
1494 arg0 &= ((HOST_WIDE_INT) 1 << width) - 1;
1495 arg1 &= ((HOST_WIDE_INT) 1 << width) - 1;
1498 if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1)))
1499 arg0s |= ((HOST_WIDE_INT) (-1) << width);
1502 if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1)))
1503 arg1s |= ((HOST_WIDE_INT) (-1) << width);
1511 /* Compute the value of the arithmetic. */
1516 val = arg0s + arg1s;
1520 val = arg0s - arg1s;
1524 val = arg0s * arg1s;
1529 || (arg0s == (HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
1532 val = arg0s / arg1s;
1537 || (arg0s == (HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
1540 val = arg0s % arg1s;
1545 || (arg0s == (HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
1548 val = (unsigned HOST_WIDE_INT) arg0 / arg1;
1553 || (arg0s == (HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1)
1556 val = (unsigned HOST_WIDE_INT) arg0 % arg1;
1572 /* If shift count is undefined, don't fold it; let the machine do
1573 what it wants. But truncate it if the machine will do that. */
1577 #ifdef SHIFT_COUNT_TRUNCATED
1578 if (SHIFT_COUNT_TRUNCATED)
1582 val = ((unsigned HOST_WIDE_INT) arg0) >> arg1;
1589 #ifdef SHIFT_COUNT_TRUNCATED
1590 if (SHIFT_COUNT_TRUNCATED)
1594 val = ((unsigned HOST_WIDE_INT) arg0) << arg1;
1601 #ifdef SHIFT_COUNT_TRUNCATED
1602 if (SHIFT_COUNT_TRUNCATED)
1606 val = arg0s >> arg1;
1608 /* Bootstrap compiler may not have sign extended the right shift.
1609 Manually extend the sign to insure bootstrap cc matches gcc. */
1610 if (arg0s < 0 && arg1 > 0)
1611 val |= ((HOST_WIDE_INT) -1) << (HOST_BITS_PER_WIDE_INT - arg1);
1620 val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1))
1621 | (((unsigned HOST_WIDE_INT) arg0) >> arg1));
1629 val = ((((unsigned HOST_WIDE_INT) arg0) << arg1)
1630 | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1)));
1634 /* Do nothing here. */
1638 val = arg0s <= arg1s ? arg0s : arg1s;
1642 val = ((unsigned HOST_WIDE_INT) arg0
1643 <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
1647 val = arg0s > arg1s ? arg0s : arg1s;
1651 val = ((unsigned HOST_WIDE_INT) arg0
1652 > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
1659 val = trunc_int_for_mode (val, mode);
1661 return GEN_INT (val);
1664 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
1667 Rather than test for specific case, we do this by a brute-force method
1668 and do all possible simplifications until no more changes occur. Then
1669 we rebuild the operation.
1671 If FORCE is true, then always generate the rtx. This is used to
1672 canonicalize stuff emitted from simplify_gen_binary. Note that this
1673 can still fail if the rtx is too complex. It won't fail just because
1674 the result is not 'simpler' than the input, however. */
1676 struct simplify_plus_minus_op_data
1683 simplify_plus_minus_op_data_cmp (p1, p2)
1687 const struct simplify_plus_minus_op_data *d1 = p1;
1688 const struct simplify_plus_minus_op_data *d2 = p2;
1690 return (commutative_operand_precedence (d2->op)
1691 - commutative_operand_precedence (d1->op));
1695 simplify_plus_minus (code, mode, op0, op1, force)
1697 enum machine_mode mode;
1701 struct simplify_plus_minus_op_data ops[8];
1703 int n_ops = 2, input_ops = 2, input_consts = 0, n_consts;
1704 int first, negate, changed;
1707 memset ((char *) ops, 0, sizeof ops);
1709 /* Set up the two operands and then expand them until nothing has been
1710 changed. If we run out of room in our array, give up; this should
1711 almost never happen. */
1716 ops[1].neg = (code == MINUS);
1722 for (i = 0; i < n_ops; i++)
1724 rtx this_op = ops[i].op;
1725 int this_neg = ops[i].neg;
1726 enum rtx_code this_code = GET_CODE (this_op);
1735 ops[n_ops].op = XEXP (this_op, 1);
1736 ops[n_ops].neg = (this_code == MINUS) ^ this_neg;
1739 ops[i].op = XEXP (this_op, 0);
1745 ops[i].op = XEXP (this_op, 0);
1746 ops[i].neg = ! this_neg;
1752 && GET_CODE (XEXP (this_op, 0)) == PLUS
1753 && CONSTANT_P (XEXP (XEXP (this_op, 0), 0))
1754 && CONSTANT_P (XEXP (XEXP (this_op, 0), 1)))
1756 ops[i].op = XEXP (XEXP (this_op, 0), 0);
1757 ops[n_ops].op = XEXP (XEXP (this_op, 0), 1);
1758 ops[n_ops].neg = this_neg;
1766 /* ~a -> (-a - 1) */
1769 ops[n_ops].op = constm1_rtx;
1770 ops[n_ops++].neg = this_neg;
1771 ops[i].op = XEXP (this_op, 0);
1772 ops[i].neg = !this_neg;
1780 ops[i].op = neg_const_int (mode, this_op);
1793 /* If we only have two operands, we can't do anything. */
1794 if (n_ops <= 2 && !force)
1797 /* Count the number of CONSTs we didn't split above. */
1798 for (i = 0; i < n_ops; i++)
1799 if (GET_CODE (ops[i].op) == CONST)
1802 /* Now simplify each pair of operands until nothing changes. The first
1803 time through just simplify constants against each other. */
1810 for (i = 0; i < n_ops - 1; i++)
1811 for (j = i + 1; j < n_ops; j++)
1813 rtx lhs = ops[i].op, rhs = ops[j].op;
1814 int lneg = ops[i].neg, rneg = ops[j].neg;
1816 if (lhs != 0 && rhs != 0
1817 && (! first || (CONSTANT_P (lhs) && CONSTANT_P (rhs))))
1819 enum rtx_code ncode = PLUS;
1825 tem = lhs, lhs = rhs, rhs = tem;
1827 else if (swap_commutative_operands_p (lhs, rhs))
1828 tem = lhs, lhs = rhs, rhs = tem;
1830 tem = simplify_binary_operation (ncode, mode, lhs, rhs);
1832 /* Reject "simplifications" that just wrap the two
1833 arguments in a CONST. Failure to do so can result
1834 in infinite recursion with simplify_binary_operation
1835 when it calls us to simplify CONST operations. */
1837 && ! (GET_CODE (tem) == CONST
1838 && GET_CODE (XEXP (tem, 0)) == ncode
1839 && XEXP (XEXP (tem, 0), 0) == lhs
1840 && XEXP (XEXP (tem, 0), 1) == rhs)
1841 /* Don't allow -x + -1 -> ~x simplifications in the
1842 first pass. This allows us the chance to combine
1843 the -1 with other constants. */
1845 && GET_CODE (tem) == NOT
1846 && XEXP (tem, 0) == rhs))
1849 if (GET_CODE (tem) == NEG)
1850 tem = XEXP (tem, 0), lneg = !lneg;
1851 if (GET_CODE (tem) == CONST_INT && lneg)
1852 tem = neg_const_int (mode, tem), lneg = 0;
1856 ops[j].op = NULL_RTX;
1866 /* Pack all the operands to the lower-numbered entries. */
1867 for (i = 0, j = 0; j < n_ops; j++)
1872 /* Sort the operations based on swap_commutative_operands_p. */
1873 qsort (ops, n_ops, sizeof (*ops), simplify_plus_minus_op_data_cmp);
1875 /* We suppressed creation of trivial CONST expressions in the
1876 combination loop to avoid recursion. Create one manually now.
1877 The combination loop should have ensured that there is exactly
1878 one CONST_INT, and the sort will have ensured that it is last
1879 in the array and that any other constant will be next-to-last. */
1882 && GET_CODE (ops[n_ops - 1].op) == CONST_INT
1883 && CONSTANT_P (ops[n_ops - 2].op))
1885 rtx value = ops[n_ops - 1].op;
1886 if (ops[n_ops - 1].neg ^ ops[n_ops - 2].neg)
1887 value = neg_const_int (mode, value);
1888 ops[n_ops - 2].op = plus_constant (ops[n_ops - 2].op, INTVAL (value));
1892 /* Count the number of CONSTs that we generated. */
1894 for (i = 0; i < n_ops; i++)
1895 if (GET_CODE (ops[i].op) == CONST)
1898 /* Give up if we didn't reduce the number of operands we had. Make
1899 sure we count a CONST as two operands. If we have the same
1900 number of operands, but have made more CONSTs than before, this
1901 is also an improvement, so accept it. */
1903 && (n_ops + n_consts > input_ops
1904 || (n_ops + n_consts == input_ops && n_consts <= input_consts)))
1907 /* Put a non-negated operand first. If there aren't any, make all
1908 operands positive and negate the whole thing later. */
1911 for (i = 0; i < n_ops && ops[i].neg; i++)
1915 for (i = 0; i < n_ops; i++)
1927 /* Now make the result by performing the requested operations. */
1929 for (i = 1; i < n_ops; i++)
1930 result = gen_rtx_fmt_ee (ops[i].neg ? MINUS : PLUS,
1931 mode, result, ops[i].op);
1933 return negate ? gen_rtx_NEG (mode, result) : result;
1936 /* Like simplify_binary_operation except used for relational operators.
1937 MODE is the mode of the operands, not that of the result. If MODE
1938 is VOIDmode, both operands must also be VOIDmode and we compare the
1939 operands in "infinite precision".
1941 If no simplification is possible, this function returns zero. Otherwise,
1942 it returns either const_true_rtx or const0_rtx. */
1945 simplify_relational_operation (code, mode, op0, op1)
1947 enum machine_mode mode;
1950 int equal, op0lt, op0ltu, op1lt, op1ltu;
1955 if (mode == VOIDmode
1956 && (GET_MODE (op0) != VOIDmode
1957 || GET_MODE (op1) != VOIDmode))
1960 /* If op0 is a compare, extract the comparison arguments from it. */
1961 if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
1962 op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
1964 trueop0 = avoid_constant_pool_reference (op0);
1965 trueop1 = avoid_constant_pool_reference (op1);
1967 /* We can't simplify MODE_CC values since we don't know what the
1968 actual comparison is. */
1969 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC
1976 /* Make sure the constant is second. */
1977 if (swap_commutative_operands_p (trueop0, trueop1))
1979 tem = op0, op0 = op1, op1 = tem;
1980 tem = trueop0, trueop0 = trueop1, trueop1 = tem;
1981 code = swap_condition (code);
1984 /* For integer comparisons of A and B maybe we can simplify A - B and can
1985 then simplify a comparison of that with zero. If A and B are both either
1986 a register or a CONST_INT, this can't help; testing for these cases will
1987 prevent infinite recursion here and speed things up.
1989 If CODE is an unsigned comparison, then we can never do this optimization,
1990 because it gives an incorrect result if the subtraction wraps around zero.
1991 ANSI C defines unsigned operations such that they never overflow, and
1992 thus such cases can not be ignored. */
1994 if (INTEGRAL_MODE_P (mode) && trueop1 != const0_rtx
1995 && ! ((GET_CODE (op0) == REG || GET_CODE (trueop0) == CONST_INT)
1996 && (GET_CODE (op1) == REG || GET_CODE (trueop1) == CONST_INT))
1997 && 0 != (tem = simplify_binary_operation (MINUS, mode, op0, op1))
1998 && code != GTU && code != GEU && code != LTU && code != LEU)
1999 return simplify_relational_operation (signed_condition (code),
2000 mode, tem, const0_rtx);
2002 if (flag_unsafe_math_optimizations && code == ORDERED)
2003 return const_true_rtx;
2005 if (flag_unsafe_math_optimizations && code == UNORDERED)
2008 /* For modes without NaNs, if the two operands are equal, we know the
2010 if (!HONOR_NANS (GET_MODE (trueop0)) && rtx_equal_p (trueop0, trueop1))
2011 equal = 1, op0lt = 0, op0ltu = 0, op1lt = 0, op1ltu = 0;
2013 /* If the operands are floating-point constants, see if we can fold
2015 else if (GET_CODE (trueop0) == CONST_DOUBLE
2016 && GET_CODE (trueop1) == CONST_DOUBLE
2017 && GET_MODE_CLASS (GET_MODE (trueop0)) == MODE_FLOAT)
2019 REAL_VALUE_TYPE d0, d1;
2021 REAL_VALUE_FROM_CONST_DOUBLE (d0, trueop0);
2022 REAL_VALUE_FROM_CONST_DOUBLE (d1, trueop1);
2024 /* Comparisons are unordered iff at least one of the values is NaN. */
2025 if (REAL_VALUE_ISNAN (d0) || REAL_VALUE_ISNAN (d1))
2035 return const_true_rtx;
2048 equal = REAL_VALUES_EQUAL (d0, d1);
2049 op0lt = op0ltu = REAL_VALUES_LESS (d0, d1);
2050 op1lt = op1ltu = REAL_VALUES_LESS (d1, d0);
2053 /* Otherwise, see if the operands are both integers. */
2054 else if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode)
2055 && (GET_CODE (trueop0) == CONST_DOUBLE
2056 || GET_CODE (trueop0) == CONST_INT)
2057 && (GET_CODE (trueop1) == CONST_DOUBLE
2058 || GET_CODE (trueop1) == CONST_INT))
2060 int width = GET_MODE_BITSIZE (mode);
2061 HOST_WIDE_INT l0s, h0s, l1s, h1s;
2062 unsigned HOST_WIDE_INT l0u, h0u, l1u, h1u;
2064 /* Get the two words comprising each integer constant. */
2065 if (GET_CODE (trueop0) == CONST_DOUBLE)
2067 l0u = l0s = CONST_DOUBLE_LOW (trueop0);
2068 h0u = h0s = CONST_DOUBLE_HIGH (trueop0);
2072 l0u = l0s = INTVAL (trueop0);
2073 h0u = h0s = HWI_SIGN_EXTEND (l0s);
2076 if (GET_CODE (trueop1) == CONST_DOUBLE)
2078 l1u = l1s = CONST_DOUBLE_LOW (trueop1);
2079 h1u = h1s = CONST_DOUBLE_HIGH (trueop1);
2083 l1u = l1s = INTVAL (trueop1);
2084 h1u = h1s = HWI_SIGN_EXTEND (l1s);
2087 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
2088 we have to sign or zero-extend the values. */
2089 if (width != 0 && width < HOST_BITS_PER_WIDE_INT)
2091 l0u &= ((HOST_WIDE_INT) 1 << width) - 1;
2092 l1u &= ((HOST_WIDE_INT) 1 << width) - 1;
2094 if (l0s & ((HOST_WIDE_INT) 1 << (width - 1)))
2095 l0s |= ((HOST_WIDE_INT) (-1) << width);
2097 if (l1s & ((HOST_WIDE_INT) 1 << (width - 1)))
2098 l1s |= ((HOST_WIDE_INT) (-1) << width);
2100 if (width != 0 && width <= HOST_BITS_PER_WIDE_INT)
2101 h0u = h1u = 0, h0s = HWI_SIGN_EXTEND (l0s), h1s = HWI_SIGN_EXTEND (l1s);
2103 equal = (h0u == h1u && l0u == l1u);
2104 op0lt = (h0s < h1s || (h0s == h1s && l0u < l1u));
2105 op1lt = (h1s < h0s || (h1s == h0s && l1u < l0u));
2106 op0ltu = (h0u < h1u || (h0u == h1u && l0u < l1u));
2107 op1ltu = (h1u < h0u || (h1u == h0u && l1u < l0u));
2110 /* Otherwise, there are some code-specific tests we can make. */
2116 if (trueop1 == const0_rtx && nonzero_address_p (op0))
2121 if (trueop1 == const0_rtx && nonzero_address_p (op0))
2122 return const_true_rtx;
2126 /* Unsigned values are never negative. */
2127 if (trueop1 == const0_rtx)
2128 return const_true_rtx;
2132 if (trueop1 == const0_rtx)
2137 /* Unsigned values are never greater than the largest
2139 if (GET_CODE (trueop1) == CONST_INT
2140 && (unsigned HOST_WIDE_INT) INTVAL (trueop1) == GET_MODE_MASK (mode)
2141 && INTEGRAL_MODE_P (mode))
2142 return const_true_rtx;
2146 if (GET_CODE (trueop1) == CONST_INT
2147 && (unsigned HOST_WIDE_INT) INTVAL (trueop1) == GET_MODE_MASK (mode)
2148 && INTEGRAL_MODE_P (mode))
2153 /* Optimize abs(x) < 0.0. */
2154 if (trueop1 == CONST0_RTX (mode) && !HONOR_SNANS (mode))
2156 tem = GET_CODE (trueop0) == FLOAT_EXTEND ? XEXP (trueop0, 0)
2158 if (GET_CODE (tem) == ABS)
2164 /* Optimize abs(x) >= 0.0. */
2165 if (trueop1 == CONST0_RTX (mode) && !HONOR_NANS (mode))
2167 tem = GET_CODE (trueop0) == FLOAT_EXTEND ? XEXP (trueop0, 0)
2169 if (GET_CODE (tem) == ABS)
2181 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
2187 return equal ? const_true_rtx : const0_rtx;
2190 return ! equal ? const_true_rtx : const0_rtx;
2193 return op0lt ? const_true_rtx : const0_rtx;
2196 return op1lt ? const_true_rtx : const0_rtx;
2198 return op0ltu ? const_true_rtx : const0_rtx;
2200 return op1ltu ? const_true_rtx : const0_rtx;
2203 return equal || op0lt ? const_true_rtx : const0_rtx;
2206 return equal || op1lt ? const_true_rtx : const0_rtx;
2208 return equal || op0ltu ? const_true_rtx : const0_rtx;
2210 return equal || op1ltu ? const_true_rtx : const0_rtx;
2212 return const_true_rtx;
2220 /* Simplify CODE, an operation with result mode MODE and three operands,
2221 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
2222 a constant. Return 0 if no simplifications is possible. */
2225 simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2)
2227 enum machine_mode mode, op0_mode;
2230 unsigned int width = GET_MODE_BITSIZE (mode);
2232 /* VOIDmode means "infinite" precision. */
2234 width = HOST_BITS_PER_WIDE_INT;
2240 if (GET_CODE (op0) == CONST_INT
2241 && GET_CODE (op1) == CONST_INT
2242 && GET_CODE (op2) == CONST_INT
2243 && ((unsigned) INTVAL (op1) + (unsigned) INTVAL (op2) <= width)
2244 && width <= (unsigned) HOST_BITS_PER_WIDE_INT)
2246 /* Extracting a bit-field from a constant */
2247 HOST_WIDE_INT val = INTVAL (op0);
2249 if (BITS_BIG_ENDIAN)
2250 val >>= (GET_MODE_BITSIZE (op0_mode)
2251 - INTVAL (op2) - INTVAL (op1));
2253 val >>= INTVAL (op2);
2255 if (HOST_BITS_PER_WIDE_INT != INTVAL (op1))
2257 /* First zero-extend. */
2258 val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1;
2259 /* If desired, propagate sign bit. */
2260 if (code == SIGN_EXTRACT
2261 && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1))))
2262 val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1);
2265 /* Clear the bits that don't belong in our mode,
2266 unless they and our sign bit are all one.
2267 So we get either a reasonable negative value or a reasonable
2268 unsigned value for this mode. */
2269 if (width < HOST_BITS_PER_WIDE_INT
2270 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
2271 != ((HOST_WIDE_INT) (-1) << (width - 1))))
2272 val &= ((HOST_WIDE_INT) 1 << width) - 1;
2274 return GEN_INT (val);
2279 if (GET_CODE (op0) == CONST_INT)
2280 return op0 != const0_rtx ? op1 : op2;
2282 /* Convert a == b ? b : a to "a". */
2283 if (GET_CODE (op0) == NE && ! side_effects_p (op0)
2284 && !HONOR_NANS (mode)
2285 && rtx_equal_p (XEXP (op0, 0), op1)
2286 && rtx_equal_p (XEXP (op0, 1), op2))
2288 else if (GET_CODE (op0) == EQ && ! side_effects_p (op0)
2289 && !HONOR_NANS (mode)
2290 && rtx_equal_p (XEXP (op0, 1), op1)
2291 && rtx_equal_p (XEXP (op0, 0), op2))
2293 else if (GET_RTX_CLASS (GET_CODE (op0)) == '<' && ! side_effects_p (op0))
2295 enum machine_mode cmp_mode = (GET_MODE (XEXP (op0, 0)) == VOIDmode
2296 ? GET_MODE (XEXP (op0, 1))
2297 : GET_MODE (XEXP (op0, 0)));
2299 if (cmp_mode == VOIDmode)
2300 cmp_mode = op0_mode;
2301 temp = simplify_relational_operation (GET_CODE (op0), cmp_mode,
2302 XEXP (op0, 0), XEXP (op0, 1));
2304 /* See if any simplifications were possible. */
2305 if (temp == const0_rtx)
2307 else if (temp == const1_rtx)
2312 /* Look for happy constants in op1 and op2. */
2313 if (GET_CODE (op1) == CONST_INT && GET_CODE (op2) == CONST_INT)
2315 HOST_WIDE_INT t = INTVAL (op1);
2316 HOST_WIDE_INT f = INTVAL (op2);
2318 if (t == STORE_FLAG_VALUE && f == 0)
2319 code = GET_CODE (op0);
2320 else if (t == 0 && f == STORE_FLAG_VALUE)
2323 tmp = reversed_comparison_code (op0, NULL_RTX);
2331 return gen_rtx_fmt_ee (code, mode, XEXP (op0, 0), XEXP (op0, 1));
2343 /* Simplify SUBREG:OUTERMODE(OP:INNERMODE, BYTE)
2344 Return 0 if no simplifications is possible. */
2346 simplify_subreg (outermode, op, innermode, byte)
2349 enum machine_mode outermode, innermode;
2351 /* Little bit of sanity checking. */
2352 if (innermode == VOIDmode || outermode == VOIDmode
2353 || innermode == BLKmode || outermode == BLKmode)
2356 if (GET_MODE (op) != innermode
2357 && GET_MODE (op) != VOIDmode)
2360 if (byte % GET_MODE_SIZE (outermode)
2361 || byte >= GET_MODE_SIZE (innermode))
2364 if (outermode == innermode && !byte)
2367 /* Simplify subregs of vector constants. */
2368 if (GET_CODE (op) == CONST_VECTOR)
2370 int elt_size = GET_MODE_SIZE (GET_MODE_INNER (innermode));
2371 const unsigned int offset = byte / elt_size;
2374 if (GET_MODE_INNER (innermode) == outermode)
2376 elt = CONST_VECTOR_ELT (op, offset);
2378 /* ?? We probably don't need this copy_rtx because constants
2379 can be shared. ?? */
2381 return copy_rtx (elt);
2383 else if (GET_MODE_INNER (innermode) == GET_MODE_INNER (outermode)
2384 && GET_MODE_SIZE (innermode) > GET_MODE_SIZE (outermode))
2386 return (gen_rtx_CONST_VECTOR
2388 gen_rtvec_v (GET_MODE_NUNITS (outermode),
2389 &CONST_VECTOR_ELT (op, offset))));
2391 else if (GET_MODE_CLASS (outermode) == MODE_INT
2392 && (GET_MODE_SIZE (outermode) % elt_size == 0))
2394 /* This happens when the target register size is smaller then
2395 the vector mode, and we synthesize operations with vectors
2396 of elements that are smaller than the register size. */
2397 HOST_WIDE_INT sum = 0, high = 0;
2398 unsigned n_elts = (GET_MODE_SIZE (outermode) / elt_size);
2399 unsigned i = BYTES_BIG_ENDIAN ? offset : offset + n_elts - 1;
2400 unsigned step = BYTES_BIG_ENDIAN ? 1 : -1;
2401 int shift = BITS_PER_UNIT * elt_size;
2403 for (; n_elts--; i += step)
2405 elt = CONST_VECTOR_ELT (op, i);
2406 if (GET_CODE (elt) == CONST_DOUBLE
2407 && GET_MODE_CLASS (GET_MODE (elt)) == MODE_FLOAT)
2409 elt = gen_lowpart_common (int_mode_for_mode (GET_MODE (elt)),
2414 if (GET_CODE (elt) != CONST_INT)
2416 high = high << shift | sum >> (HOST_BITS_PER_WIDE_INT - shift);
2417 sum = (sum << shift) + INTVAL (elt);
2419 if (GET_MODE_BITSIZE (outermode) <= HOST_BITS_PER_WIDE_INT)
2420 return GEN_INT (trunc_int_for_mode (sum, outermode));
2421 else if (GET_MODE_BITSIZE (outermode) == 2* HOST_BITS_PER_WIDE_INT)
2422 return immed_double_const (high, sum, outermode);
2426 else if (GET_MODE_CLASS (outermode) == MODE_INT
2427 && (elt_size % GET_MODE_SIZE (outermode) == 0))
2429 enum machine_mode new_mode
2430 = int_mode_for_mode (GET_MODE_INNER (innermode));
2431 int subbyte = byte % elt_size;
2433 op = simplify_subreg (new_mode, op, innermode, byte - subbyte);
2436 return simplify_subreg (outermode, op, new_mode, subbyte);
2438 else if (GET_MODE_CLASS (outermode) == MODE_INT)
2439 /* This shouldn't happen, but let's not do anything stupid. */
2443 /* Attempt to simplify constant to non-SUBREG expression. */
2444 if (CONSTANT_P (op))
2447 unsigned HOST_WIDE_INT val = 0;
2449 if (GET_MODE_CLASS (outermode) == MODE_VECTOR_INT
2450 || GET_MODE_CLASS (outermode) == MODE_VECTOR_FLOAT)
2452 /* Construct a CONST_VECTOR from individual subregs. */
2453 enum machine_mode submode = GET_MODE_INNER (outermode);
2454 int subsize = GET_MODE_UNIT_SIZE (outermode);
2455 int i, elts = GET_MODE_NUNITS (outermode);
2456 rtvec v = rtvec_alloc (elts);
2459 for (i = 0; i < elts; i++, byte += subsize)
2461 /* This might fail, e.g. if taking a subreg from a SYMBOL_REF. */
2462 /* ??? It would be nice if we could actually make such subregs
2463 on targets that allow such relocations. */
2464 if (byte >= GET_MODE_UNIT_SIZE (innermode))
2465 elt = CONST0_RTX (submode);
2467 elt = simplify_subreg (submode, op, innermode, byte);
2470 RTVEC_ELT (v, i) = elt;
2472 return gen_rtx_CONST_VECTOR (outermode, v);
2475 /* ??? This code is partly redundant with code below, but can handle
2476 the subregs of floats and similar corner cases.
2477 Later it we should move all simplification code here and rewrite
2478 GEN_LOWPART_IF_POSSIBLE, GEN_HIGHPART, OPERAND_SUBWORD and friends
2479 using SIMPLIFY_SUBREG. */
2480 if (subreg_lowpart_offset (outermode, innermode) == byte
2481 && GET_CODE (op) != CONST_VECTOR)
2483 rtx new = gen_lowpart_if_possible (outermode, op);
2488 /* Similar comment as above apply here. */
2489 if (GET_MODE_SIZE (outermode) == UNITS_PER_WORD
2490 && GET_MODE_SIZE (innermode) > UNITS_PER_WORD
2491 && GET_MODE_CLASS (outermode) == MODE_INT)
2493 rtx new = constant_subword (op,
2494 (byte / UNITS_PER_WORD),
2500 if (GET_MODE_CLASS (outermode) != MODE_INT
2501 && GET_MODE_CLASS (outermode) != MODE_CC)
2503 enum machine_mode new_mode = int_mode_for_mode (outermode);
2505 if (new_mode != innermode || byte != 0)
2507 op = simplify_subreg (new_mode, op, innermode, byte);
2510 return simplify_subreg (outermode, op, new_mode, 0);
2514 offset = byte * BITS_PER_UNIT;
2515 switch (GET_CODE (op))
2518 if (GET_MODE (op) != VOIDmode)
2521 /* We can't handle this case yet. */
2522 if (GET_MODE_BITSIZE (outermode) >= HOST_BITS_PER_WIDE_INT)
2525 part = offset >= HOST_BITS_PER_WIDE_INT;
2526 if ((BITS_PER_WORD > HOST_BITS_PER_WIDE_INT
2527 && BYTES_BIG_ENDIAN)
2528 || (BITS_PER_WORD <= HOST_BITS_PER_WIDE_INT
2529 && WORDS_BIG_ENDIAN))
2531 val = part ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op);
2532 offset %= HOST_BITS_PER_WIDE_INT;
2534 /* We've already picked the word we want from a double, so
2535 pretend this is actually an integer. */
2536 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
2540 if (GET_CODE (op) == CONST_INT)
2543 /* We don't handle synthesizing of non-integral constants yet. */
2544 if (GET_MODE_CLASS (outermode) != MODE_INT)
2547 if (BYTES_BIG_ENDIAN || WORDS_BIG_ENDIAN)
2549 if (WORDS_BIG_ENDIAN)
2550 offset = (GET_MODE_BITSIZE (innermode)
2551 - GET_MODE_BITSIZE (outermode) - offset);
2552 if (BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN
2553 && GET_MODE_SIZE (outermode) < UNITS_PER_WORD)
2554 offset = (offset + BITS_PER_WORD - GET_MODE_BITSIZE (outermode)
2555 - 2 * (offset % BITS_PER_WORD));
2558 if (offset >= HOST_BITS_PER_WIDE_INT)
2559 return ((HOST_WIDE_INT) val < 0) ? constm1_rtx : const0_rtx;
2563 if (GET_MODE_BITSIZE (outermode) < HOST_BITS_PER_WIDE_INT)
2564 val = trunc_int_for_mode (val, outermode);
2565 return GEN_INT (val);
2572 /* Changing mode twice with SUBREG => just change it once,
2573 or not at all if changing back op starting mode. */
2574 if (GET_CODE (op) == SUBREG)
2576 enum machine_mode innermostmode = GET_MODE (SUBREG_REG (op));
2577 int final_offset = byte + SUBREG_BYTE (op);
2580 if (outermode == innermostmode
2581 && byte == 0 && SUBREG_BYTE (op) == 0)
2582 return SUBREG_REG (op);
2584 /* The SUBREG_BYTE represents offset, as if the value were stored
2585 in memory. Irritating exception is paradoxical subreg, where
2586 we define SUBREG_BYTE to be 0. On big endian machines, this
2587 value should be negative. For a moment, undo this exception. */
2588 if (byte == 0 && GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
2590 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
2591 if (WORDS_BIG_ENDIAN)
2592 final_offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2593 if (BYTES_BIG_ENDIAN)
2594 final_offset += difference % UNITS_PER_WORD;
2596 if (SUBREG_BYTE (op) == 0
2597 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
2599 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
2600 if (WORDS_BIG_ENDIAN)
2601 final_offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2602 if (BYTES_BIG_ENDIAN)
2603 final_offset += difference % UNITS_PER_WORD;
2606 /* See whether resulting subreg will be paradoxical. */
2607 if (GET_MODE_SIZE (innermostmode) > GET_MODE_SIZE (outermode))
2609 /* In nonparadoxical subregs we can't handle negative offsets. */
2610 if (final_offset < 0)
2612 /* Bail out in case resulting subreg would be incorrect. */
2613 if (final_offset % GET_MODE_SIZE (outermode)
2614 || (unsigned) final_offset >= GET_MODE_SIZE (innermostmode))
2620 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (outermode));
2622 /* In paradoxical subreg, see if we are still looking on lower part.
2623 If so, our SUBREG_BYTE will be 0. */
2624 if (WORDS_BIG_ENDIAN)
2625 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2626 if (BYTES_BIG_ENDIAN)
2627 offset += difference % UNITS_PER_WORD;
2628 if (offset == final_offset)
2634 /* Recurse for futher possible simplifications. */
2635 new = simplify_subreg (outermode, SUBREG_REG (op),
2636 GET_MODE (SUBREG_REG (op)),
2640 return gen_rtx_SUBREG (outermode, SUBREG_REG (op), final_offset);
2643 /* SUBREG of a hard register => just change the register number
2644 and/or mode. If the hard register is not valid in that mode,
2645 suppress this simplification. If the hard register is the stack,
2646 frame, or argument pointer, leave this as a SUBREG. */
2649 && (! REG_FUNCTION_VALUE_P (op)
2650 || ! rtx_equal_function_value_matters)
2651 && REGNO (op) < FIRST_PSEUDO_REGISTER
2652 #ifdef CANNOT_CHANGE_MODE_CLASS
2653 && ! (REG_CANNOT_CHANGE_MODE_P (REGNO (op), innermode, outermode)
2654 && GET_MODE_CLASS (innermode) != MODE_COMPLEX_INT
2655 && GET_MODE_CLASS (innermode) != MODE_COMPLEX_FLOAT)
2657 && ((reload_completed && !frame_pointer_needed)
2658 || (REGNO (op) != FRAME_POINTER_REGNUM
2659 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
2660 && REGNO (op) != HARD_FRAME_POINTER_REGNUM
2663 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
2664 && REGNO (op) != ARG_POINTER_REGNUM
2666 && REGNO (op) != STACK_POINTER_REGNUM)
2668 int final_regno = subreg_hard_regno (gen_rtx_SUBREG (outermode, op, byte),
2671 /* ??? We do allow it if the current REG is not valid for
2672 its mode. This is a kludge to work around how float/complex
2673 arguments are passed on 32-bit SPARC and should be fixed. */
2674 if (HARD_REGNO_MODE_OK (final_regno, outermode)
2675 || ! HARD_REGNO_MODE_OK (REGNO (op), innermode))
2677 rtx x = gen_rtx_REG_offset (op, outermode, final_regno, byte);
2679 /* Propagate original regno. We don't have any way to specify
2680 the offset inside original regno, so do so only for lowpart.
2681 The information is used only by alias analysis that can not
2682 grog partial register anyway. */
2684 if (subreg_lowpart_offset (outermode, innermode) == byte)
2685 ORIGINAL_REGNO (x) = ORIGINAL_REGNO (op);
2690 /* If we have a SUBREG of a register that we are replacing and we are
2691 replacing it with a MEM, make a new MEM and try replacing the
2692 SUBREG with it. Don't do this if the MEM has a mode-dependent address
2693 or if we would be widening it. */
2695 if (GET_CODE (op) == MEM
2696 && ! mode_dependent_address_p (XEXP (op, 0))
2697 /* Allow splitting of volatile memory references in case we don't
2698 have instruction to move the whole thing. */
2699 && (! MEM_VOLATILE_P (op)
2700 || ! have_insn_for (SET, innermode))
2701 && GET_MODE_SIZE (outermode) <= GET_MODE_SIZE (GET_MODE (op)))
2702 return adjust_address_nv (op, outermode, byte);
2704 /* Handle complex values represented as CONCAT
2705 of real and imaginary part. */
2706 if (GET_CODE (op) == CONCAT)
2708 int is_realpart = byte < GET_MODE_UNIT_SIZE (innermode);
2709 rtx part = is_realpart ? XEXP (op, 0) : XEXP (op, 1);
2710 unsigned int final_offset;
2713 final_offset = byte % (GET_MODE_UNIT_SIZE (innermode));
2714 res = simplify_subreg (outermode, part, GET_MODE (part), final_offset);
2717 /* We can at least simplify it by referring directly to the relevant part. */
2718 return gen_rtx_SUBREG (outermode, part, final_offset);
2723 /* Make a SUBREG operation or equivalent if it folds. */
2726 simplify_gen_subreg (outermode, op, innermode, byte)
2729 enum machine_mode outermode, innermode;
2732 /* Little bit of sanity checking. */
2733 if (innermode == VOIDmode || outermode == VOIDmode
2734 || innermode == BLKmode || outermode == BLKmode)
2737 if (GET_MODE (op) != innermode
2738 && GET_MODE (op) != VOIDmode)
2741 if (byte % GET_MODE_SIZE (outermode)
2742 || byte >= GET_MODE_SIZE (innermode))
2745 if (GET_CODE (op) == QUEUED)
2748 new = simplify_subreg (outermode, op, innermode, byte);
2752 if (GET_CODE (op) == SUBREG || GET_MODE (op) == VOIDmode)
2755 return gen_rtx_SUBREG (outermode, op, byte);
2757 /* Simplify X, an rtx expression.
2759 Return the simplified expression or NULL if no simplifications
2762 This is the preferred entry point into the simplification routines;
2763 however, we still allow passes to call the more specific routines.
2765 Right now GCC has three (yes, three) major bodies of RTL simplification
2766 code that need to be unified.
2768 1. fold_rtx in cse.c. This code uses various CSE specific
2769 information to aid in RTL simplification.
2771 2. simplify_rtx in combine.c. Similar to fold_rtx, except that
2772 it uses combine specific information to aid in RTL
2775 3. The routines in this file.
2778 Long term we want to only have one body of simplification code; to
2779 get to that state I recommend the following steps:
2781 1. Pour over fold_rtx & simplify_rtx and move any simplifications
2782 which are not pass dependent state into these routines.
2784 2. As code is moved by #1, change fold_rtx & simplify_rtx to
2785 use this routine whenever possible.
2787 3. Allow for pass dependent state to be provided to these
2788 routines and add simplifications based on the pass dependent
2789 state. Remove code from cse.c & combine.c that becomes
2792 It will take time, but ultimately the compiler will be easier to
2793 maintain and improve. It's totally silly that when we add a
2794 simplification that it needs to be added to 4 places (3 for RTL
2795 simplification and 1 for tree simplification. */
2801 enum rtx_code code = GET_CODE (x);
2802 enum machine_mode mode = GET_MODE (x);
2804 switch (GET_RTX_CLASS (code))
2807 return simplify_unary_operation (code, mode,
2808 XEXP (x, 0), GET_MODE (XEXP (x, 0)));
2810 if (swap_commutative_operands_p (XEXP (x, 0), XEXP (x, 1)))
2815 XEXP (x, 0) = XEXP (x, 1);
2817 return simplify_binary_operation (code, mode,
2818 XEXP (x, 0), XEXP (x, 1));
2822 return simplify_binary_operation (code, mode, XEXP (x, 0), XEXP (x, 1));
2826 return simplify_ternary_operation (code, mode, GET_MODE (XEXP (x, 0)),
2827 XEXP (x, 0), XEXP (x, 1),
2831 return simplify_relational_operation (code,
2832 ((GET_MODE (XEXP (x, 0))
2834 ? GET_MODE (XEXP (x, 0))
2835 : GET_MODE (XEXP (x, 1))),
2836 XEXP (x, 0), XEXP (x, 1));
2839 return simplify_gen_subreg (mode, SUBREG_REG (x),
2840 GET_MODE (SUBREG_REG (x)),
2842 if (code == CONSTANT_P_RTX)
2844 if (CONSTANT_P (XEXP (x,0)))