1 /* Instruction scheduling pass.
2 Copyright (C) 1992, 93-97, 1998 Free Software Foundation, Inc.
3 Contributed by Michael Tiemann (tiemann@cygnus.com)
4 Enhanced by, and currently maintained by, Jim Wilson (wilson@cygnus.com)
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
23 /* Instruction scheduling pass.
25 This pass implements list scheduling within basic blocks. It is
26 run after flow analysis, but before register allocation. The
27 scheduler works as follows:
29 We compute insn priorities based on data dependencies. Flow
30 analysis only creates a fraction of the data-dependencies we must
31 observe: namely, only those dependencies which the combiner can be
32 expected to use. For this pass, we must therefore create the
33 remaining dependencies we need to observe: register dependencies,
34 memory dependencies, dependencies to keep function calls in order,
35 and the dependence between a conditional branch and the setting of
36 condition codes are all dealt with here.
38 The scheduler first traverses the data flow graph, starting with
39 the last instruction, and proceeding to the first, assigning
40 values to insn_priority as it goes. This sorts the instructions
41 topologically by data dependence.
43 Once priorities have been established, we order the insns using
44 list scheduling. This works as follows: starting with a list of
45 all the ready insns, and sorted according to priority number, we
46 schedule the insn from the end of the list by placing its
47 predecessors in the list according to their priority order. We
48 consider this insn scheduled by setting the pointer to the "end" of
49 the list to point to the previous insn. When an insn has no
50 predecessors, we either queue it until sufficient time has elapsed
51 or add it to the ready list. As the instructions are scheduled or
52 when stalls are introduced, the queue advances and dumps insns into
53 the ready list. When all insns down to the lowest priority have
54 been scheduled, the critical path of the basic block has been made
55 as short as possible. The remaining insns are then scheduled in
58 Function unit conflicts are resolved during reverse list scheduling
59 by tracking the time when each insn is committed to the schedule
60 and from that, the time the function units it uses must be free.
61 As insns on the ready list are considered for scheduling, those
62 that would result in a blockage of the already committed insns are
63 queued until no blockage will result. Among the remaining insns on
64 the ready list to be considered, the first one with the largest
65 potential for causing a subsequent blockage is chosen.
67 The following list shows the order in which we want to break ties
68 among insns in the ready list:
70 1. choose insn with lowest conflict cost, ties broken by
71 2. choose insn with the longest path to end of bb, ties broken by
72 3. choose insn that kills the most registers, ties broken by
73 4. choose insn that conflicts with the most ready insns, or finally
74 5. choose insn with lowest UID.
76 Memory references complicate matters. Only if we can be certain
77 that memory references are not part of the data dependency graph
78 (via true, anti, or output dependence), can we move operations past
79 memory references. To first approximation, reads can be done
80 independently, while writes introduce dependencies. Better
81 approximations will yield fewer dependencies.
83 Dependencies set up by memory references are treated in exactly the
84 same way as other dependencies, by using LOG_LINKS.
86 Having optimized the critical path, we may have also unduly
87 extended the lifetimes of some registers. If an operation requires
88 that constants be loaded into registers, it is certainly desirable
89 to load those constants as early as necessary, but no earlier.
90 I.e., it will not do to load up a bunch of registers at the
91 beginning of a basic block only to use them at the end, if they
92 could be loaded later, since this may result in excessive register
95 Note that since branches are never in basic blocks, but only end
96 basic blocks, this pass will not do any branch scheduling. But
97 that is ok, since we can use GNU's delayed branch scheduling
98 pass to take care of this case.
100 Also note that no further optimizations based on algebraic identities
101 are performed, so this pass would be a good one to perform instruction
102 splitting, such as breaking up a multiply instruction into shifts
103 and adds where that is profitable.
105 Given the memory aliasing analysis that this pass should perform,
106 it should be possible to remove redundant stores to memory, and to
107 load values from registers instead of hitting memory.
109 This pass must update information that subsequent passes expect to be
110 correct. Namely: reg_n_refs, reg_n_sets, reg_n_deaths,
111 reg_n_calls_crossed, and reg_live_length. Also, basic_block_head,
114 The information in the line number notes is carefully retained by
115 this pass. Notes that refer to the starting and ending of
116 exception regions are also carefully retained by this pass. All
117 other NOTE insns are grouped in their same relative order at the
118 beginning of basic blocks that have been scheduled. */
126 #include "basic-block.h"
128 #include "hard-reg-set.h"
130 #include "insn-config.h"
131 #include "insn-attr.h"
133 extern char *reg_known_equiv_p;
134 extern rtx *reg_known_value;
136 #ifdef INSN_SCHEDULING
137 /* Arrays set up by scheduling for the same respective purposes as
138 similar-named arrays set up by flow analysis. We work with these
139 arrays during the scheduling pass so we can compare values against
142 Values of these arrays are copied at the end of this pass into the
143 arrays set up by flow analysis. */
144 static int *sched_reg_n_calls_crossed;
145 static int *sched_reg_live_length;
147 /* Element N is the next insn that sets (hard or pseudo) register
148 N within the current basic block; or zero, if there is no
149 such insn. Needed for new registers which may be introduced
150 by splitting insns. */
151 static rtx *reg_last_uses;
152 static rtx *reg_last_sets;
153 static regset reg_pending_sets;
154 static int reg_pending_sets_all;
156 /* Vector indexed by INSN_UID giving the original ordering of the insns. */
157 static int *insn_luid;
158 #define INSN_LUID(INSN) (insn_luid[INSN_UID (INSN)])
160 /* Vector indexed by INSN_UID giving each instruction a priority. */
161 static int *insn_priority;
162 #define INSN_PRIORITY(INSN) (insn_priority[INSN_UID (INSN)])
164 static short *insn_costs;
165 #define INSN_COST(INSN) insn_costs[INSN_UID (INSN)]
167 /* Vector indexed by INSN_UID giving an encoding of the function units
169 static short *insn_units;
170 #define INSN_UNIT(INSN) insn_units[INSN_UID (INSN)]
172 /* Vector indexed by INSN_UID giving an encoding of the blockage range
173 function. The unit and the range are encoded. */
174 static unsigned int *insn_blockage;
175 #define INSN_BLOCKAGE(INSN) insn_blockage[INSN_UID (INSN)]
177 #define BLOCKAGE_MASK ((1 << BLOCKAGE_BITS) - 1)
178 #define ENCODE_BLOCKAGE(U,R) \
179 ((((U) << UNIT_BITS) << BLOCKAGE_BITS \
180 | MIN_BLOCKAGE_COST (R)) << BLOCKAGE_BITS \
181 | MAX_BLOCKAGE_COST (R))
182 #define UNIT_BLOCKED(B) ((B) >> (2 * BLOCKAGE_BITS))
183 #define BLOCKAGE_RANGE(B) \
184 (((((B) >> BLOCKAGE_BITS) & BLOCKAGE_MASK) << (HOST_BITS_PER_INT / 2)) \
185 | ((B) & BLOCKAGE_MASK))
187 /* Encodings of the `<name>_unit_blockage_range' function. */
188 #define MIN_BLOCKAGE_COST(R) ((R) >> (HOST_BITS_PER_INT / 2))
189 #define MAX_BLOCKAGE_COST(R) ((R) & ((1 << (HOST_BITS_PER_INT / 2)) - 1))
191 #define DONE_PRIORITY -1
192 #define MAX_PRIORITY 0x7fffffff
193 #define TAIL_PRIORITY 0x7ffffffe
194 #define LAUNCH_PRIORITY 0x7f000001
195 #define DONE_PRIORITY_P(INSN) (INSN_PRIORITY (INSN) < 0)
196 #define LOW_PRIORITY_P(INSN) ((INSN_PRIORITY (INSN) & 0x7f000000) == 0)
198 /* Vector indexed by INSN_UID giving number of insns referring to this insn. */
199 static int *insn_ref_count;
200 #define INSN_REF_COUNT(INSN) (insn_ref_count[INSN_UID (INSN)])
202 /* Vector indexed by INSN_UID giving line-number note in effect for each
203 insn. For line-number notes, this indicates whether the note may be
205 static rtx *line_note;
206 #define LINE_NOTE(INSN) (line_note[INSN_UID (INSN)])
208 /* Vector indexed by basic block number giving the starting line-number
209 for each basic block. */
210 static rtx *line_note_head;
212 /* List of important notes we must keep around. This is a pointer to the
213 last element in the list. */
214 static rtx note_list;
216 /* Regsets telling whether a given register is live or dead before the last
217 scheduled insn. Must scan the instructions once before scheduling to
218 determine what registers are live or dead at the end of the block. */
219 static regset bb_dead_regs;
220 static regset bb_live_regs;
222 /* Regset telling whether a given register is live after the insn currently
223 being scheduled. Before processing an insn, this is equal to bb_live_regs
224 above. This is used so that we can find registers that are newly born/dead
225 after processing an insn. */
226 static regset old_live_regs;
228 /* The chain of REG_DEAD notes. REG_DEAD notes are removed from all insns
229 during the initial scan and reused later. If there are not exactly as
230 many REG_DEAD notes in the post scheduled code as there were in the
231 prescheduled code then we trigger an abort because this indicates a bug. */
232 static rtx dead_notes;
236 /* An instruction is ready to be scheduled when all insns following it
237 have already been scheduled. It is important to ensure that all
238 insns which use its result will not be executed until its result
239 has been computed. An insn is maintained in one of four structures:
241 (P) the "Pending" set of insns which cannot be scheduled until
242 their dependencies have been satisfied.
243 (Q) the "Queued" set of insns that can be scheduled when sufficient
245 (R) the "Ready" list of unscheduled, uncommitted insns.
246 (S) the "Scheduled" list of insns.
248 Initially, all insns are either "Pending" or "Ready" depending on
249 whether their dependencies are satisfied.
251 Insns move from the "Ready" list to the "Scheduled" list as they
252 are committed to the schedule. As this occurs, the insns in the
253 "Pending" list have their dependencies satisfied and move to either
254 the "Ready" list or the "Queued" set depending on whether
255 sufficient time has passed to make them ready. As time passes,
256 insns move from the "Queued" set to the "Ready" list. Insns may
257 move from the "Ready" list to the "Queued" set if they are blocked
258 due to a function unit conflict.
260 The "Pending" list (P) are the insns in the LOG_LINKS of the unscheduled
261 insns, i.e., those that are ready, queued, and pending.
262 The "Queued" set (Q) is implemented by the variable `insn_queue'.
263 The "Ready" list (R) is implemented by the variables `ready' and
265 The "Scheduled" list (S) is the new insn chain built by this pass.
267 The transition (R->S) is implemented in the scheduling loop in
268 `schedule_block' when the best insn to schedule is chosen.
269 The transition (R->Q) is implemented in `schedule_select' when an
270 insn is found to to have a function unit conflict with the already
272 The transitions (P->R and P->Q) are implemented in `schedule_insn' as
273 insns move from the ready list to the scheduled list.
274 The transition (Q->R) is implemented at the top of the scheduling
275 loop in `schedule_block' as time passes or stalls are introduced. */
277 /* Implement a circular buffer to delay instructions until sufficient
278 time has passed. INSN_QUEUE_SIZE is a power of two larger than
279 MAX_BLOCKAGE and MAX_READY_COST computed by genattr.c. This is the
280 longest time an isnsn may be queued. */
281 static rtx insn_queue[INSN_QUEUE_SIZE];
282 static int q_ptr = 0;
283 static int q_size = 0;
284 #define NEXT_Q(X) (((X)+1) & (INSN_QUEUE_SIZE-1))
285 #define NEXT_Q_AFTER(X,C) (((X)+C) & (INSN_QUEUE_SIZE-1))
287 /* Vector indexed by INSN_UID giving the minimum clock tick at which
288 the insn becomes ready. This is used to note timing constraints for
289 insns in the pending list. */
290 static int *insn_tick;
291 #define INSN_TICK(INSN) (insn_tick[INSN_UID (INSN)])
293 /* Data structure for keeping track of register information
294 during that register's life. */
303 /* Forward declarations. */
304 static void add_dependence PROTO((rtx, rtx, enum reg_note));
305 static void remove_dependence PROTO((rtx, rtx));
306 static rtx find_insn_list PROTO((rtx, rtx));
307 static int insn_unit PROTO((rtx));
308 static unsigned int blockage_range PROTO((int, rtx));
309 static void clear_units PROTO((void));
310 static void prepare_unit PROTO((int));
311 static int actual_hazard_this_instance PROTO((int, int, rtx, int, int));
312 static void schedule_unit PROTO((int, rtx, int));
313 static int actual_hazard PROTO((int, rtx, int, int));
314 static int potential_hazard PROTO((int, rtx, int));
315 static int insn_cost PROTO((rtx, rtx, rtx));
316 static int priority PROTO((rtx));
317 static void free_pending_lists PROTO((void));
318 static void add_insn_mem_dependence PROTO((rtx *, rtx *, rtx, rtx));
319 static void flush_pending_lists PROTO((rtx, int));
320 static void sched_analyze_1 PROTO((rtx, rtx));
321 static void sched_analyze_2 PROTO((rtx, rtx));
322 static void sched_analyze_insn PROTO((rtx, rtx, rtx));
323 static int sched_analyze PROTO((rtx, rtx));
324 static void sched_note_set PROTO((int, rtx, int));
325 static int rank_for_schedule PROTO((rtx *, rtx *));
326 static void swap_sort PROTO((rtx *, int));
327 static void queue_insn PROTO((rtx, int));
328 static int birthing_insn_p PROTO((rtx));
329 static void adjust_priority PROTO((rtx));
330 static int schedule_insn PROTO((rtx, rtx *, int, int));
331 static int schedule_select PROTO((rtx *, int, int, FILE *));
332 static void create_reg_dead_note PROTO((rtx, rtx));
333 static void attach_deaths PROTO((rtx, rtx, int));
334 static void attach_deaths_insn PROTO((rtx));
335 static rtx unlink_notes PROTO((rtx, rtx));
336 static int new_sometimes_live PROTO((struct sometimes *, int, int));
337 static void finish_sometimes_live PROTO((struct sometimes *, int));
338 static rtx reemit_notes PROTO((rtx, rtx));
339 static void schedule_block PROTO((int, FILE *));
340 static rtx regno_use_in PROTO((int, rtx));
341 static void split_hard_reg_notes PROTO((rtx, rtx, rtx, rtx));
342 static void new_insn_dead_notes PROTO((rtx, rtx, rtx, rtx));
343 static void update_n_sets PROTO((rtx, int));
344 static void update_flow_info PROTO((rtx, rtx, rtx, rtx));
346 /* Main entry point of this file. */
347 void schedule_insns PROTO((FILE *));
349 #endif /* INSN_SCHEDULING */
351 #define SIZE_FOR_MODE(X) (GET_MODE_SIZE (GET_MODE (X)))
353 /* Helper functions for instruction scheduling. */
355 /* Add ELEM wrapped in an INSN_LIST with reg note kind DEP_TYPE to the
356 LOG_LINKS of INSN, if not already there. DEP_TYPE indicates the type
357 of dependence that this link represents. */
360 add_dependence (insn, elem, dep_type)
363 enum reg_note dep_type;
367 /* Don't depend an insn on itself. */
371 /* If elem is part of a sequence that must be scheduled together, then
372 make the dependence point to the last insn of the sequence.
373 When HAVE_cc0, it is possible for NOTEs to exist between users and
374 setters of the condition codes, so we must skip past notes here.
375 Otherwise, NOTEs are impossible here. */
377 next = NEXT_INSN (elem);
380 while (next && GET_CODE (next) == NOTE)
381 next = NEXT_INSN (next);
384 if (next && SCHED_GROUP_P (next)
385 && GET_CODE (next) != CODE_LABEL)
387 /* Notes will never intervene here though, so don't bother checking
389 /* We must reject CODE_LABELs, so that we don't get confused by one
390 that has LABEL_PRESERVE_P set, which is represented by the same
391 bit in the rtl as SCHED_GROUP_P. A CODE_LABEL can never be
393 while (NEXT_INSN (next) && SCHED_GROUP_P (NEXT_INSN (next))
394 && GET_CODE (NEXT_INSN (next)) != CODE_LABEL)
395 next = NEXT_INSN (next);
397 /* Again, don't depend an insn on itself. */
401 /* Make the dependence to NEXT, the last insn of the group, instead
402 of the original ELEM. */
406 /* Check that we don't already have this dependence. */
407 for (link = LOG_LINKS (insn); link; link = XEXP (link, 1))
408 if (XEXP (link, 0) == elem)
410 /* If this is a more restrictive type of dependence than the existing
411 one, then change the existing dependence to this type. */
412 if ((int) dep_type < (int) REG_NOTE_KIND (link))
413 PUT_REG_NOTE_KIND (link, dep_type);
416 /* Might want to check one level of transitivity to save conses. */
418 link = rtx_alloc (INSN_LIST);
419 /* Insn dependency, not data dependency. */
420 PUT_REG_NOTE_KIND (link, dep_type);
421 XEXP (link, 0) = elem;
422 XEXP (link, 1) = LOG_LINKS (insn);
423 LOG_LINKS (insn) = link;
426 /* Remove ELEM wrapped in an INSN_LIST from the LOG_LINKS
427 of INSN. Abort if not found. */
430 remove_dependence (insn, elem)
437 for (prev = 0, link = LOG_LINKS (insn); link; link = XEXP (link, 1))
439 if (XEXP (link, 0) == elem)
441 RTX_INTEGRATED_P (link) = 1;
443 XEXP (prev, 1) = XEXP (link, 1);
445 LOG_LINKS (insn) = XEXP (link, 1);
457 #ifndef INSN_SCHEDULING
459 schedule_insns (dump_file)
468 /* Computation of memory dependencies. */
470 /* The *_insns and *_mems are paired lists. Each pending memory operation
471 will have a pointer to the MEM rtx on one list and a pointer to the
472 containing insn on the other list in the same place in the list. */
474 /* We can't use add_dependence like the old code did, because a single insn
475 may have multiple memory accesses, and hence needs to be on the list
476 once for each memory access. Add_dependence won't let you add an insn
477 to a list more than once. */
479 /* An INSN_LIST containing all insns with pending read operations. */
480 static rtx pending_read_insns;
482 /* An EXPR_LIST containing all MEM rtx's which are pending reads. */
483 static rtx pending_read_mems;
485 /* An INSN_LIST containing all insns with pending write operations. */
486 static rtx pending_write_insns;
488 /* An EXPR_LIST containing all MEM rtx's which are pending writes. */
489 static rtx pending_write_mems;
491 /* Indicates the combined length of the two pending lists. We must prevent
492 these lists from ever growing too large since the number of dependencies
493 produced is at least O(N*N), and execution time is at least O(4*N*N), as
494 a function of the length of these pending lists. */
496 static int pending_lists_length;
498 /* An INSN_LIST containing all INSN_LISTs allocated but currently unused. */
500 static rtx unused_insn_list;
502 /* An EXPR_LIST containing all EXPR_LISTs allocated but currently unused. */
504 static rtx unused_expr_list;
506 /* The last insn upon which all memory references must depend.
507 This is an insn which flushed the pending lists, creating a dependency
508 between it and all previously pending memory references. This creates
509 a barrier (or a checkpoint) which no memory reference is allowed to cross.
511 This includes all non constant CALL_INSNs. When we do interprocedural
512 alias analysis, this restriction can be relaxed.
513 This may also be an INSN that writes memory if the pending lists grow
516 static rtx last_pending_memory_flush;
518 /* The last function call we have seen. All hard regs, and, of course,
519 the last function call, must depend on this. */
521 static rtx last_function_call;
523 /* The LOG_LINKS field of this is a list of insns which use a pseudo register
524 that does not already cross a call. We create dependencies between each
525 of those insn and the next call insn, to ensure that they won't cross a call
526 after scheduling is done. */
528 static rtx sched_before_next_call;
530 /* Pointer to the last instruction scheduled. Used by rank_for_schedule,
531 so that insns independent of the last scheduled insn will be preferred
532 over dependent instructions. */
534 static rtx last_scheduled_insn;
536 /* Process an insn's memory dependencies. There are four kinds of
539 (0) read dependence: read follows read
540 (1) true dependence: read follows write
541 (2) anti dependence: write follows read
542 (3) output dependence: write follows write
544 We are careful to build only dependencies which actually exist, and
545 use transitivity to avoid building too many links. */
547 /* Return the INSN_LIST containing INSN in LIST, or NULL
548 if LIST does not contain INSN. */
551 find_insn_list (insn, list)
557 if (XEXP (list, 0) == insn)
559 list = XEXP (list, 1);
564 /* Compute the function units used by INSN. This caches the value
565 returned by function_units_used. A function unit is encoded as the
566 unit number if the value is non-negative and the compliment of a
567 mask if the value is negative. A function unit index is the
568 non-negative encoding. */
574 register int unit = INSN_UNIT (insn);
578 recog_memoized (insn);
580 /* A USE insn, or something else we don't need to understand.
581 We can't pass these directly to function_units_used because it will
582 trigger a fatal error for unrecognizable insns. */
583 if (INSN_CODE (insn) < 0)
587 unit = function_units_used (insn);
588 /* Increment non-negative values so we can cache zero. */
589 if (unit >= 0) unit++;
591 /* We only cache 16 bits of the result, so if the value is out of
592 range, don't cache it. */
593 if (FUNCTION_UNITS_SIZE < HOST_BITS_PER_SHORT
595 || (~unit & ((1 << (HOST_BITS_PER_SHORT - 1)) - 1)) == 0)
596 INSN_UNIT (insn) = unit;
598 return (unit > 0 ? unit - 1 : unit);
601 /* Compute the blockage range for executing INSN on UNIT. This caches
602 the value returned by the blockage_range_function for the unit.
603 These values are encoded in an int where the upper half gives the
604 minimum value and the lower half gives the maximum value. */
606 __inline static unsigned int
607 blockage_range (unit, insn)
611 unsigned int blockage = INSN_BLOCKAGE (insn);
614 if (UNIT_BLOCKED (blockage) != unit + 1)
616 range = function_units[unit].blockage_range_function (insn);
617 /* We only cache the blockage range for one unit and then only if
619 if (HOST_BITS_PER_INT >= UNIT_BITS + 2 * BLOCKAGE_BITS)
620 INSN_BLOCKAGE (insn) = ENCODE_BLOCKAGE (unit + 1, range);
623 range = BLOCKAGE_RANGE (blockage);
628 /* A vector indexed by function unit instance giving the last insn to use
629 the unit. The value of the function unit instance index for unit U
630 instance I is (U + I * FUNCTION_UNITS_SIZE). */
631 static rtx unit_last_insn[FUNCTION_UNITS_SIZE * MAX_MULTIPLICITY];
633 /* A vector indexed by function unit instance giving the minimum time when
634 the unit will unblock based on the maximum blockage cost. */
635 static int unit_tick[FUNCTION_UNITS_SIZE * MAX_MULTIPLICITY];
637 /* A vector indexed by function unit number giving the number of insns
638 that remain to use the unit. */
639 static int unit_n_insns[FUNCTION_UNITS_SIZE];
641 /* Reset the function unit state to the null state. */
646 bzero ((char *) unit_last_insn, sizeof (unit_last_insn));
647 bzero ((char *) unit_tick, sizeof (unit_tick));
648 bzero ((char *) unit_n_insns, sizeof (unit_n_insns));
651 /* Record an insn as one that will use the units encoded by UNIT. */
660 unit_n_insns[unit]++;
662 for (i = 0, unit = ~unit; unit; i++, unit >>= 1)
667 /* Return the actual hazard cost of executing INSN on the unit UNIT,
668 instance INSTANCE at time CLOCK if the previous actual hazard cost
672 actual_hazard_this_instance (unit, instance, insn, clock, cost)
673 int unit, instance, clock, cost;
676 int tick = unit_tick[instance];
678 if (tick - clock > cost)
680 /* The scheduler is operating in reverse, so INSN is the executing
681 insn and the unit's last insn is the candidate insn. We want a
682 more exact measure of the blockage if we execute INSN at CLOCK
683 given when we committed the execution of the unit's last insn.
685 The blockage value is given by either the unit's max blockage
686 constant, blockage range function, or blockage function. Use
687 the most exact form for the given unit. */
689 if (function_units[unit].blockage_range_function)
691 if (function_units[unit].blockage_function)
692 tick += (function_units[unit].blockage_function
693 (insn, unit_last_insn[instance])
694 - function_units[unit].max_blockage);
696 tick += ((int) MAX_BLOCKAGE_COST (blockage_range (unit, insn))
697 - function_units[unit].max_blockage);
699 if (tick - clock > cost)
705 /* Record INSN as having begun execution on the units encoded by UNIT at
709 schedule_unit (unit, insn, clock)
718 #if MAX_MULTIPLICITY > 1
719 /* Find the first free instance of the function unit and use that
720 one. We assume that one is free. */
721 for (i = function_units[unit].multiplicity - 1; i > 0; i--)
723 if (! actual_hazard_this_instance (unit, instance, insn, clock, 0))
725 instance += FUNCTION_UNITS_SIZE;
728 unit_last_insn[instance] = insn;
729 unit_tick[instance] = (clock + function_units[unit].max_blockage);
732 for (i = 0, unit = ~unit; unit; i++, unit >>= 1)
734 schedule_unit (i, insn, clock);
737 /* Return the actual hazard cost of executing INSN on the units encoded by
738 UNIT at time CLOCK if the previous actual hazard cost was COST. */
741 actual_hazard (unit, insn, clock, cost)
742 int unit, clock, cost;
749 /* Find the instance of the function unit with the minimum hazard. */
751 int best_cost = actual_hazard_this_instance (unit, instance, insn,
753 #if MAX_MULTIPLICITY > 1
756 if (best_cost > cost)
758 for (i = function_units[unit].multiplicity - 1; i > 0; i--)
760 instance += FUNCTION_UNITS_SIZE;
761 this_cost = actual_hazard_this_instance (unit, instance, insn,
763 if (this_cost < best_cost)
765 best_cost = this_cost;
766 if (this_cost <= cost)
772 cost = MAX (cost, best_cost);
775 for (i = 0, unit = ~unit; unit; i++, unit >>= 1)
777 cost = actual_hazard (i, insn, clock, cost);
782 /* Return the potential hazard cost of executing an instruction on the
783 units encoded by UNIT if the previous potential hazard cost was COST.
784 An insn with a large blockage time is chosen in preference to one
785 with a smaller time; an insn that uses a unit that is more likely
786 to be used is chosen in preference to one with a unit that is less
787 used. We are trying to minimize a subsequent actual hazard. */
790 potential_hazard (unit, insn, cost)
795 unsigned int minb, maxb;
799 minb = maxb = function_units[unit].max_blockage;
802 if (function_units[unit].blockage_range_function)
804 maxb = minb = blockage_range (unit, insn);
805 maxb = MAX_BLOCKAGE_COST (maxb);
806 minb = MIN_BLOCKAGE_COST (minb);
811 /* Make the number of instructions left dominate. Make the
812 minimum delay dominate the maximum delay. If all these
813 are the same, use the unit number to add an arbitrary
814 ordering. Other terms can be added. */
815 ncost = minb * 0x40 + maxb;
816 ncost *= (unit_n_insns[unit] - 1) * 0x1000 + unit;
823 for (i = 0, unit = ~unit; unit; i++, unit >>= 1)
825 cost = potential_hazard (i, insn, cost);
830 /* Compute cost of executing INSN given the dependence LINK on the insn USED.
831 This is the number of virtual cycles taken between instruction issue and
832 instruction results. */
835 insn_cost (insn, link, used)
836 rtx insn, link, used;
838 register int cost = INSN_COST (insn);
842 recog_memoized (insn);
844 /* A USE insn, or something else we don't need to understand.
845 We can't pass these directly to result_ready_cost because it will
846 trigger a fatal error for unrecognizable insns. */
847 if (INSN_CODE (insn) < 0)
849 INSN_COST (insn) = 1;
854 cost = result_ready_cost (insn);
859 INSN_COST (insn) = cost;
863 /* A USE insn should never require the value used to be computed. This
864 allows the computation of a function's result and parameter values to
865 overlap the return and call. */
866 recog_memoized (used);
867 if (INSN_CODE (used) < 0)
868 LINK_COST_FREE (link) = 1;
870 /* If some dependencies vary the cost, compute the adjustment. Most
871 commonly, the adjustment is complete: either the cost is ignored
872 (in the case of an output- or anti-dependence), or the cost is
873 unchanged. These values are cached in the link as LINK_COST_FREE
874 and LINK_COST_ZERO. */
876 if (LINK_COST_FREE (link))
879 else if (! LINK_COST_ZERO (link))
883 ADJUST_COST (used, link, insn, ncost);
885 LINK_COST_FREE (link) = ncost = 1;
887 LINK_COST_ZERO (link) = 1;
894 /* Compute the priority number for INSN. */
900 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i')
904 int this_priority = INSN_PRIORITY (insn);
907 if (this_priority > 0)
908 return this_priority;
912 /* Nonzero if these insns must be scheduled together. */
913 if (SCHED_GROUP_P (insn))
916 while (SCHED_GROUP_P (prev))
918 prev = PREV_INSN (prev);
919 INSN_REF_COUNT (prev) += 1;
923 for (prev = LOG_LINKS (insn); prev; prev = XEXP (prev, 1))
925 rtx x = XEXP (prev, 0);
927 /* If this was a duplicate of a dependence we already deleted,
929 if (RTX_INTEGRATED_P (prev))
932 /* A dependence pointing to a note or deleted insn is always
933 obsolete, because sched_analyze_insn will have created any
934 necessary new dependences which replace it. Notes and deleted
935 insns can be created when instructions are deleted by insn
936 splitting, or by register allocation. */
937 if (GET_CODE (x) == NOTE || INSN_DELETED_P (x))
939 remove_dependence (insn, x);
943 /* Clear the link cost adjustment bits. */
944 LINK_COST_FREE (prev) = 0;
946 LINK_COST_ZERO (prev) = 0;
949 /* This priority calculation was chosen because it results in the
950 least instruction movement, and does not hurt the performance
951 of the resulting code compared to the old algorithm.
952 This makes the sched algorithm more stable, which results
953 in better code, because there is less register pressure,
954 cross jumping is more likely to work, and debugging is easier.
956 When all instructions have a latency of 1, there is no need to
957 move any instructions. Subtracting one here ensures that in such
958 cases all instructions will end up with a priority of one, and
959 hence no scheduling will be done.
961 The original code did not subtract the one, and added the
962 insn_cost of the current instruction to its priority (e.g.
963 move the insn_cost call down to the end). */
965 prev_priority = priority (x) + insn_cost (x, prev, insn) - 1;
967 if (prev_priority > max_priority)
968 max_priority = prev_priority;
969 INSN_REF_COUNT (x) += 1;
972 prepare_unit (insn_unit (insn));
973 INSN_PRIORITY (insn) = max_priority;
974 return INSN_PRIORITY (insn);
979 /* Remove all INSN_LISTs and EXPR_LISTs from the pending lists and add
980 them to the unused_*_list variables, so that they can be reused. */
983 free_pending_lists ()
985 register rtx link, prev_link;
987 if (pending_read_insns)
989 prev_link = pending_read_insns;
990 link = XEXP (prev_link, 1);
995 link = XEXP (link, 1);
998 XEXP (prev_link, 1) = unused_insn_list;
999 unused_insn_list = pending_read_insns;
1000 pending_read_insns = 0;
1003 if (pending_write_insns)
1005 prev_link = pending_write_insns;
1006 link = XEXP (prev_link, 1);
1011 link = XEXP (link, 1);
1014 XEXP (prev_link, 1) = unused_insn_list;
1015 unused_insn_list = pending_write_insns;
1016 pending_write_insns = 0;
1019 if (pending_read_mems)
1021 prev_link = pending_read_mems;
1022 link = XEXP (prev_link, 1);
1027 link = XEXP (link, 1);
1030 XEXP (prev_link, 1) = unused_expr_list;
1031 unused_expr_list = pending_read_mems;
1032 pending_read_mems = 0;
1035 if (pending_write_mems)
1037 prev_link = pending_write_mems;
1038 link = XEXP (prev_link, 1);
1043 link = XEXP (link, 1);
1046 XEXP (prev_link, 1) = unused_expr_list;
1047 unused_expr_list = pending_write_mems;
1048 pending_write_mems = 0;
1052 /* Add an INSN and MEM reference pair to a pending INSN_LIST and MEM_LIST.
1053 The MEM is a memory reference contained within INSN, which we are saving
1054 so that we can do memory aliasing on it. */
1057 add_insn_mem_dependence (insn_list, mem_list, insn, mem)
1058 rtx *insn_list, *mem_list, insn, mem;
1062 if (unused_insn_list)
1064 link = unused_insn_list;
1065 unused_insn_list = XEXP (link, 1);
1068 link = rtx_alloc (INSN_LIST);
1069 XEXP (link, 0) = insn;
1070 XEXP (link, 1) = *insn_list;
1073 if (unused_expr_list)
1075 link = unused_expr_list;
1076 unused_expr_list = XEXP (link, 1);
1079 link = rtx_alloc (EXPR_LIST);
1080 XEXP (link, 0) = mem;
1081 XEXP (link, 1) = *mem_list;
1084 pending_lists_length++;
1087 /* Make a dependency between every memory reference on the pending lists
1088 and INSN, thus flushing the pending lists. If ONLY_WRITE, don't flush
1092 flush_pending_lists (insn, only_write)
1098 while (pending_read_insns && ! only_write)
1100 add_dependence (insn, XEXP (pending_read_insns, 0), REG_DEP_ANTI);
1102 link = pending_read_insns;
1103 pending_read_insns = XEXP (pending_read_insns, 1);
1104 XEXP (link, 1) = unused_insn_list;
1105 unused_insn_list = link;
1107 link = pending_read_mems;
1108 pending_read_mems = XEXP (pending_read_mems, 1);
1109 XEXP (link, 1) = unused_expr_list;
1110 unused_expr_list = link;
1112 while (pending_write_insns)
1114 add_dependence (insn, XEXP (pending_write_insns, 0), REG_DEP_ANTI);
1116 link = pending_write_insns;
1117 pending_write_insns = XEXP (pending_write_insns, 1);
1118 XEXP (link, 1) = unused_insn_list;
1119 unused_insn_list = link;
1121 link = pending_write_mems;
1122 pending_write_mems = XEXP (pending_write_mems, 1);
1123 XEXP (link, 1) = unused_expr_list;
1124 unused_expr_list = link;
1126 pending_lists_length = 0;
1128 if (last_pending_memory_flush)
1129 add_dependence (insn, last_pending_memory_flush, REG_DEP_ANTI);
1131 last_pending_memory_flush = insn;
1134 /* Analyze a single SET or CLOBBER rtx, X, creating all dependencies generated
1135 by the write to the destination of X, and reads of everything mentioned. */
1138 sched_analyze_1 (x, insn)
1143 register rtx dest = SET_DEST (x);
1148 while (GET_CODE (dest) == STRICT_LOW_PART || GET_CODE (dest) == SUBREG
1149 || GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
1151 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
1153 /* The second and third arguments are values read by this insn. */
1154 sched_analyze_2 (XEXP (dest, 1), insn);
1155 sched_analyze_2 (XEXP (dest, 2), insn);
1157 dest = SUBREG_REG (dest);
1160 if (GET_CODE (dest) == REG)
1164 regno = REGNO (dest);
1166 /* A hard reg in a wide mode may really be multiple registers.
1167 If so, mark all of them just like the first. */
1168 if (regno < FIRST_PSEUDO_REGISTER)
1170 i = HARD_REGNO_NREGS (regno, GET_MODE (dest));
1175 for (u = reg_last_uses[regno+i]; u; u = XEXP (u, 1))
1176 add_dependence (insn, XEXP (u, 0), REG_DEP_ANTI);
1177 reg_last_uses[regno + i] = 0;
1178 if (reg_last_sets[regno + i])
1179 add_dependence (insn, reg_last_sets[regno + i],
1181 SET_REGNO_REG_SET (reg_pending_sets, regno + i);
1182 if ((call_used_regs[i] || global_regs[i])
1183 && last_function_call)
1184 /* Function calls clobber all call_used regs. */
1185 add_dependence (insn, last_function_call, REG_DEP_ANTI);
1192 for (u = reg_last_uses[regno]; u; u = XEXP (u, 1))
1193 add_dependence (insn, XEXP (u, 0), REG_DEP_ANTI);
1194 reg_last_uses[regno] = 0;
1195 if (reg_last_sets[regno])
1196 add_dependence (insn, reg_last_sets[regno], REG_DEP_OUTPUT);
1197 SET_REGNO_REG_SET (reg_pending_sets, regno);
1199 /* Pseudos that are REG_EQUIV to something may be replaced
1200 by that during reloading. We need only add dependencies for
1201 the address in the REG_EQUIV note. */
1202 if (! reload_completed
1203 && reg_known_equiv_p[regno]
1204 && GET_CODE (reg_known_value[regno]) == MEM)
1205 sched_analyze_2 (XEXP (reg_known_value[regno], 0), insn);
1207 /* Don't let it cross a call after scheduling if it doesn't
1208 already cross one. */
1209 if (REG_N_CALLS_CROSSED (regno) == 0 && last_function_call)
1210 add_dependence (insn, last_function_call, REG_DEP_ANTI);
1213 else if (GET_CODE (dest) == MEM)
1215 /* Writing memory. */
1217 if (pending_lists_length > 32)
1219 /* Flush all pending reads and writes to prevent the pending lists
1220 from getting any larger. Insn scheduling runs too slowly when
1221 these lists get long. The number 32 was chosen because it
1222 seems like a reasonable number. When compiling GCC with itself,
1223 this flush occurs 8 times for sparc, and 10 times for m88k using
1225 flush_pending_lists (insn, 0);
1229 rtx pending, pending_mem;
1231 pending = pending_read_insns;
1232 pending_mem = pending_read_mems;
1235 /* If a dependency already exists, don't create a new one. */
1236 if (! find_insn_list (XEXP (pending, 0), LOG_LINKS (insn)))
1237 if (anti_dependence (XEXP (pending_mem, 0), dest))
1238 add_dependence (insn, XEXP (pending, 0), REG_DEP_ANTI);
1240 pending = XEXP (pending, 1);
1241 pending_mem = XEXP (pending_mem, 1);
1244 pending = pending_write_insns;
1245 pending_mem = pending_write_mems;
1248 /* If a dependency already exists, don't create a new one. */
1249 if (! find_insn_list (XEXP (pending, 0), LOG_LINKS (insn)))
1250 if (output_dependence (XEXP (pending_mem, 0), dest))
1251 add_dependence (insn, XEXP (pending, 0), REG_DEP_OUTPUT);
1253 pending = XEXP (pending, 1);
1254 pending_mem = XEXP (pending_mem, 1);
1257 if (last_pending_memory_flush)
1258 add_dependence (insn, last_pending_memory_flush, REG_DEP_ANTI);
1260 add_insn_mem_dependence (&pending_write_insns, &pending_write_mems,
1263 sched_analyze_2 (XEXP (dest, 0), insn);
1266 /* Analyze reads. */
1267 if (GET_CODE (x) == SET)
1268 sched_analyze_2 (SET_SRC (x), insn);
1271 /* Analyze the uses of memory and registers in rtx X in INSN. */
1274 sched_analyze_2 (x, insn)
1280 register enum rtx_code code;
1286 code = GET_CODE (x);
1295 /* Ignore constants. Note that we must handle CONST_DOUBLE here
1296 because it may have a cc0_rtx in its CONST_DOUBLE_CHAIN field, but
1297 this does not mean that this insn is using cc0. */
1305 /* User of CC0 depends on immediately preceding insn. */
1306 SCHED_GROUP_P (insn) = 1;
1308 /* There may be a note before this insn now, but all notes will
1309 be removed before we actually try to schedule the insns, so
1310 it won't cause a problem later. We must avoid it here though. */
1311 prev = prev_nonnote_insn (insn);
1313 /* Make a copy of all dependencies on the immediately previous insn,
1314 and add to this insn. This is so that all the dependencies will
1315 apply to the group. Remove an explicit dependence on this insn
1316 as SCHED_GROUP_P now represents it. */
1318 if (find_insn_list (prev, LOG_LINKS (insn)))
1319 remove_dependence (insn, prev);
1321 for (link = LOG_LINKS (prev); link; link = XEXP (link, 1))
1322 add_dependence (insn, XEXP (link, 0), REG_NOTE_KIND (link));
1330 int regno = REGNO (x);
1331 if (regno < FIRST_PSEUDO_REGISTER)
1335 i = HARD_REGNO_NREGS (regno, GET_MODE (x));
1338 reg_last_uses[regno + i]
1339 = gen_rtx_INSN_LIST (VOIDmode,
1340 insn, reg_last_uses[regno + i]);
1341 if (reg_last_sets[regno + i])
1342 add_dependence (insn, reg_last_sets[regno + i], 0);
1343 if ((call_used_regs[regno + i] || global_regs[regno + i])
1344 && last_function_call)
1345 /* Function calls clobber all call_used regs. */
1346 add_dependence (insn, last_function_call, REG_DEP_ANTI);
1351 reg_last_uses[regno]
1352 = gen_rtx_INSN_LIST (VOIDmode, insn, reg_last_uses[regno]);
1353 if (reg_last_sets[regno])
1354 add_dependence (insn, reg_last_sets[regno], 0);
1356 /* Pseudos that are REG_EQUIV to something may be replaced
1357 by that during reloading. We need only add dependencies for
1358 the address in the REG_EQUIV note. */
1359 if (! reload_completed
1360 && reg_known_equiv_p[regno]
1361 && GET_CODE (reg_known_value[regno]) == MEM)
1362 sched_analyze_2 (XEXP (reg_known_value[regno], 0), insn);
1364 /* If the register does not already cross any calls, then add this
1365 insn to the sched_before_next_call list so that it will still
1366 not cross calls after scheduling. */
1367 if (REG_N_CALLS_CROSSED (regno) == 0)
1368 add_dependence (sched_before_next_call, insn, REG_DEP_ANTI);
1375 /* Reading memory. */
1377 rtx pending, pending_mem;
1379 pending = pending_read_insns;
1380 pending_mem = pending_read_mems;
1383 /* If a dependency already exists, don't create a new one. */
1384 if (! find_insn_list (XEXP (pending, 0), LOG_LINKS (insn)))
1385 if (read_dependence (XEXP (pending_mem, 0), x))
1386 add_dependence (insn, XEXP (pending, 0), REG_DEP_ANTI);
1388 pending = XEXP (pending, 1);
1389 pending_mem = XEXP (pending_mem, 1);
1392 pending = pending_write_insns;
1393 pending_mem = pending_write_mems;
1396 /* If a dependency already exists, don't create a new one. */
1397 if (! find_insn_list (XEXP (pending, 0), LOG_LINKS (insn)))
1398 if (true_dependence (XEXP (pending_mem, 0), VOIDmode,
1400 add_dependence (insn, XEXP (pending, 0), 0);
1402 pending = XEXP (pending, 1);
1403 pending_mem = XEXP (pending_mem, 1);
1405 if (last_pending_memory_flush)
1406 add_dependence (insn, last_pending_memory_flush, REG_DEP_ANTI);
1408 /* Always add these dependencies to pending_reads, since
1409 this insn may be followed by a write. */
1410 add_insn_mem_dependence (&pending_read_insns, &pending_read_mems,
1413 /* Take advantage of tail recursion here. */
1414 sched_analyze_2 (XEXP (x, 0), insn);
1420 case UNSPEC_VOLATILE:
1425 /* Traditional and volatile asm instructions must be considered to use
1426 and clobber all hard registers, all pseudo-registers and all of
1427 memory. So must TRAP_IF and UNSPEC_VOLATILE operations.
1429 Consider for instance a volatile asm that changes the fpu rounding
1430 mode. An insn should not be moved across this even if it only uses
1431 pseudo-regs because it might give an incorrectly rounded result. */
1432 if (code != ASM_OPERANDS || MEM_VOLATILE_P (x))
1434 int max_reg = max_reg_num ();
1435 for (i = 0; i < max_reg; i++)
1437 for (u = reg_last_uses[i]; u; u = XEXP (u, 1))
1438 add_dependence (insn, XEXP (u, 0), REG_DEP_ANTI);
1439 reg_last_uses[i] = 0;
1440 if (reg_last_sets[i])
1441 add_dependence (insn, reg_last_sets[i], 0);
1443 reg_pending_sets_all = 1;
1445 flush_pending_lists (insn, 0);
1448 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
1449 We can not just fall through here since then we would be confused
1450 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
1451 traditional asms unlike their normal usage. */
1453 if (code == ASM_OPERANDS)
1455 for (j = 0; j < ASM_OPERANDS_INPUT_LENGTH (x); j++)
1456 sched_analyze_2 (ASM_OPERANDS_INPUT (x, j), insn);
1466 /* These both read and modify the result. We must handle them as writes
1467 to get proper dependencies for following instructions. We must handle
1468 them as reads to get proper dependencies from this to previous
1469 instructions. Thus we need to pass them to both sched_analyze_1
1470 and sched_analyze_2. We must call sched_analyze_2 first in order
1471 to get the proper antecedent for the read. */
1472 sched_analyze_2 (XEXP (x, 0), insn);
1473 sched_analyze_1 (x, insn);
1480 /* Other cases: walk the insn. */
1481 fmt = GET_RTX_FORMAT (code);
1482 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1485 sched_analyze_2 (XEXP (x, i), insn);
1486 else if (fmt[i] == 'E')
1487 for (j = 0; j < XVECLEN (x, i); j++)
1488 sched_analyze_2 (XVECEXP (x, i, j), insn);
1492 /* Analyze an INSN with pattern X to find all dependencies. */
1495 sched_analyze_insn (x, insn, loop_notes)
1499 register RTX_CODE code = GET_CODE (x);
1501 int maxreg = max_reg_num ();
1504 if (code == SET || code == CLOBBER)
1505 sched_analyze_1 (x, insn);
1506 else if (code == PARALLEL)
1509 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
1511 code = GET_CODE (XVECEXP (x, 0, i));
1512 if (code == SET || code == CLOBBER)
1513 sched_analyze_1 (XVECEXP (x, 0, i), insn);
1515 sched_analyze_2 (XVECEXP (x, 0, i), insn);
1519 sched_analyze_2 (x, insn);
1521 /* Mark registers CLOBBERED or used by called function. */
1522 if (GET_CODE (insn) == CALL_INSN)
1523 for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1))
1525 if (GET_CODE (XEXP (link, 0)) == CLOBBER)
1526 sched_analyze_1 (XEXP (link, 0), insn);
1528 sched_analyze_2 (XEXP (link, 0), insn);
1531 /* If there is a {LOOP,EHREGION}_{BEG,END} note in the middle of a basic block, then
1532 we must be sure that no instructions are scheduled across it.
1533 Otherwise, the reg_n_refs info (which depends on loop_depth) would
1534 become incorrect. */
1538 int max_reg = max_reg_num ();
1541 for (i = 0; i < max_reg; i++)
1544 for (u = reg_last_uses[i]; u; u = XEXP (u, 1))
1545 add_dependence (insn, XEXP (u, 0), REG_DEP_ANTI);
1546 reg_last_uses[i] = 0;
1547 if (reg_last_sets[i])
1548 add_dependence (insn, reg_last_sets[i], 0);
1550 reg_pending_sets_all = 1;
1552 flush_pending_lists (insn, 0);
1555 while (XEXP (link, 1))
1556 link = XEXP (link, 1);
1557 XEXP (link, 1) = REG_NOTES (insn);
1558 REG_NOTES (insn) = loop_notes;
1561 /* After reload, it is possible for an instruction to have a REG_DEAD note
1562 for a register that actually dies a few instructions earlier. For
1563 example, this can happen with SECONDARY_MEMORY_NEEDED reloads.
1564 In this case, we must consider the insn to use the register mentioned
1565 in the REG_DEAD note. Otherwise, we may accidentally move this insn
1566 after another insn that sets the register, thus getting obviously invalid
1567 rtl. This confuses reorg which believes that REG_DEAD notes are still
1570 ??? We would get better code if we fixed reload to put the REG_DEAD
1571 notes in the right places, but that may not be worth the effort. */
1573 if (reload_completed)
1577 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1578 if (REG_NOTE_KIND (note) == REG_DEAD)
1579 sched_analyze_2 (XEXP (note, 0), insn);
1582 EXECUTE_IF_SET_IN_REG_SET (reg_pending_sets, 0, i,
1584 reg_last_sets[i] = insn;
1586 CLEAR_REG_SET (reg_pending_sets);
1588 if (reg_pending_sets_all)
1590 for (i = 0; i < maxreg; i++)
1591 reg_last_sets[i] = insn;
1592 reg_pending_sets_all = 0;
1595 /* Handle function calls and function returns created by the epilogue
1597 if (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
1602 /* When scheduling instructions, we make sure calls don't lose their
1603 accompanying USE insns by depending them one on another in order.
1605 Also, we must do the same thing for returns created by the epilogue
1606 threading code. Note this code works only in this special case,
1607 because other passes make no guarantee that they will never emit
1608 an instruction between a USE and a RETURN. There is such a guarantee
1609 for USE instructions immediately before a call. */
1611 prev_dep_insn = insn;
1612 dep_insn = PREV_INSN (insn);
1613 while (GET_CODE (dep_insn) == INSN
1614 && GET_CODE (PATTERN (dep_insn)) == USE
1615 && GET_CODE (XEXP (PATTERN (dep_insn), 0)) == REG)
1617 SCHED_GROUP_P (prev_dep_insn) = 1;
1619 /* Make a copy of all dependencies on dep_insn, and add to insn.
1620 This is so that all of the dependencies will apply to the
1623 for (link = LOG_LINKS (dep_insn); link; link = XEXP (link, 1))
1624 add_dependence (insn, XEXP (link, 0), REG_NOTE_KIND (link));
1626 prev_dep_insn = dep_insn;
1627 dep_insn = PREV_INSN (dep_insn);
1632 /* Analyze every insn between HEAD and TAIL inclusive, creating LOG_LINKS
1633 for every dependency. */
1636 sched_analyze (head, tail)
1640 register int n_insns = 0;
1642 register int luid = 0;
1645 for (insn = head; ; insn = NEXT_INSN (insn))
1647 INSN_LUID (insn) = luid++;
1649 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
1651 sched_analyze_insn (PATTERN (insn), insn, loop_notes);
1655 else if (GET_CODE (insn) == CALL_INSN)
1660 /* Any instruction using a hard register which may get clobbered
1661 by a call needs to be marked as dependent on this call.
1662 This prevents a use of a hard return reg from being moved
1663 past a void call (i.e. it does not explicitly set the hard
1666 /* If this call is followed by a NOTE_INSN_SETJMP, then assume that
1667 all registers, not just hard registers, may be clobbered by this
1670 /* Insn, being a CALL_INSN, magically depends on
1671 `last_function_call' already. */
1673 if (NEXT_INSN (insn) && GET_CODE (NEXT_INSN (insn)) == NOTE
1674 && NOTE_LINE_NUMBER (NEXT_INSN (insn)) == NOTE_INSN_SETJMP)
1676 int max_reg = max_reg_num ();
1677 for (i = 0; i < max_reg; i++)
1679 for (u = reg_last_uses[i]; u; u = XEXP (u, 1))
1680 add_dependence (insn, XEXP (u, 0), REG_DEP_ANTI);
1681 reg_last_uses[i] = 0;
1682 if (reg_last_sets[i])
1683 add_dependence (insn, reg_last_sets[i], 0);
1685 reg_pending_sets_all = 1;
1687 /* Add a pair of fake REG_NOTEs which we will later
1688 convert back into a NOTE_INSN_SETJMP note. See
1689 reemit_notes for why we use a pair of of NOTEs. */
1691 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD,
1694 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD,
1695 GEN_INT (NOTE_INSN_SETJMP),
1700 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1701 if (call_used_regs[i] || global_regs[i])
1703 for (u = reg_last_uses[i]; u; u = XEXP (u, 1))
1704 add_dependence (insn, XEXP (u, 0), REG_DEP_ANTI);
1705 reg_last_uses[i] = 0;
1706 if (reg_last_sets[i])
1707 add_dependence (insn, reg_last_sets[i], REG_DEP_ANTI);
1708 SET_REGNO_REG_SET (reg_pending_sets, i);
1712 /* For each insn which shouldn't cross a call, add a dependence
1713 between that insn and this call insn. */
1714 x = LOG_LINKS (sched_before_next_call);
1717 add_dependence (insn, XEXP (x, 0), REG_DEP_ANTI);
1720 LOG_LINKS (sched_before_next_call) = 0;
1722 sched_analyze_insn (PATTERN (insn), insn, loop_notes);
1725 /* In the absence of interprocedural alias analysis, we must flush
1726 all pending reads and writes, and start new dependencies starting
1727 from here. But only flush writes for constant calls (which may
1728 be passed a pointer to something we haven't written yet). */
1729 flush_pending_lists (insn, CONST_CALL_P (insn));
1731 /* Depend this function call (actually, the user of this
1732 function call) on all hard register clobberage. */
1733 last_function_call = insn;
1737 /* See comments on reemit_notes as to why we do this. */
1738 else if (GET_CODE (insn) == NOTE
1739 && (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
1740 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END
1741 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_BEG
1742 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_END
1743 || (NOTE_LINE_NUMBER (insn) == NOTE_INSN_SETJMP
1744 && GET_CODE (PREV_INSN (insn)) != CALL_INSN)))
1746 loop_notes = gen_rtx_EXPR_LIST (REG_DEAD,
1747 GEN_INT (NOTE_BLOCK_NUMBER (insn)),
1749 loop_notes = gen_rtx_EXPR_LIST (REG_DEAD,
1750 GEN_INT (NOTE_LINE_NUMBER (insn)),
1752 CONST_CALL_P (loop_notes) = CONST_CALL_P (insn);
1762 /* Called when we see a set of a register. If death is true, then we are
1763 scanning backwards. Mark that register as unborn. If nobody says
1764 otherwise, that is how things will remain. If death is false, then we
1765 are scanning forwards. Mark that register as being born. */
1768 sched_note_set (b, x, death)
1774 register rtx reg = SET_DEST (x);
1780 while (GET_CODE (reg) == SUBREG || GET_CODE (reg) == STRICT_LOW_PART
1781 || GET_CODE (reg) == SIGN_EXTRACT || GET_CODE (reg) == ZERO_EXTRACT)
1783 /* Must treat modification of just one hardware register of a multi-reg
1784 value or just a byte field of a register exactly the same way that
1785 mark_set_1 in flow.c does, i.e. anything except a paradoxical subreg
1786 does not kill the entire register. */
1787 if (GET_CODE (reg) != SUBREG
1788 || REG_SIZE (SUBREG_REG (reg)) > REG_SIZE (reg))
1791 reg = SUBREG_REG (reg);
1794 if (GET_CODE (reg) != REG)
1797 /* Global registers are always live, so the code below does not apply
1800 regno = REGNO (reg);
1801 if (regno >= FIRST_PSEUDO_REGISTER || ! global_regs[regno])
1805 /* If we only set part of the register, then this set does not
1810 /* Try killing this register. */
1811 if (regno < FIRST_PSEUDO_REGISTER)
1813 int j = HARD_REGNO_NREGS (regno, GET_MODE (reg));
1816 CLEAR_REGNO_REG_SET (bb_live_regs, regno + j);
1817 SET_REGNO_REG_SET (bb_dead_regs, regno + j);
1822 CLEAR_REGNO_REG_SET (bb_live_regs, regno);
1823 SET_REGNO_REG_SET (bb_dead_regs, regno);
1828 /* Make the register live again. */
1829 if (regno < FIRST_PSEUDO_REGISTER)
1831 int j = HARD_REGNO_NREGS (regno, GET_MODE (reg));
1834 SET_REGNO_REG_SET (bb_live_regs, regno + j);
1835 CLEAR_REGNO_REG_SET (bb_dead_regs, regno + j);
1840 SET_REGNO_REG_SET (bb_live_regs, regno);
1841 CLEAR_REGNO_REG_SET (bb_dead_regs, regno);
1847 /* Macros and functions for keeping the priority queue sorted, and
1848 dealing with queueing and dequeueing of instructions. */
1850 #define SCHED_SORT(READY, NEW_READY, OLD_READY) \
1851 do { if ((NEW_READY) - (OLD_READY) == 1) \
1852 swap_sort (READY, NEW_READY); \
1853 else if ((NEW_READY) - (OLD_READY) > 1) \
1854 qsort (READY, NEW_READY, sizeof (rtx), rank_for_schedule); } \
1857 /* Returns a positive value if y is preferred; returns a negative value if
1858 x is preferred. Should never return 0, since that will make the sort
1862 rank_for_schedule (x, y)
1868 int tmp_class, tmp2_class;
1871 /* Choose the instruction with the highest priority, if different. */
1872 if ((value = INSN_PRIORITY (tmp) - INSN_PRIORITY (tmp2)))
1875 if (last_scheduled_insn)
1877 /* Classify the instructions into three classes:
1878 1) Data dependent on last schedule insn.
1879 2) Anti/Output dependent on last scheduled insn.
1880 3) Independent of last scheduled insn, or has latency of one.
1881 Choose the insn from the highest numbered class if different. */
1882 link = find_insn_list (tmp, LOG_LINKS (last_scheduled_insn));
1883 if (link == 0 || insn_cost (tmp, link, last_scheduled_insn) == 1)
1885 else if (REG_NOTE_KIND (link) == 0) /* Data dependence. */
1890 link = find_insn_list (tmp2, LOG_LINKS (last_scheduled_insn));
1891 if (link == 0 || insn_cost (tmp2, link, last_scheduled_insn) == 1)
1893 else if (REG_NOTE_KIND (link) == 0) /* Data dependence. */
1898 if ((value = tmp_class - tmp2_class))
1902 /* If insns are equally good, sort by INSN_LUID (original insn order),
1903 so that we make the sort stable. This minimizes instruction movement,
1904 thus minimizing sched's effect on debugging and cross-jumping. */
1905 return INSN_LUID (tmp) - INSN_LUID (tmp2);
1908 /* Resort the array A in which only element at index N may be out of order. */
1910 __inline static void
1918 while (i >= 0 && rank_for_schedule (a+i, &insn) >= 0)
1926 static int max_priority;
1928 /* Add INSN to the insn queue so that it fires at least N_CYCLES
1929 before the currently executing insn. */
1931 __inline static void
1932 queue_insn (insn, n_cycles)
1936 int next_q = NEXT_Q_AFTER (q_ptr, n_cycles);
1937 NEXT_INSN (insn) = insn_queue[next_q];
1938 insn_queue[next_q] = insn;
1942 /* Return nonzero if PAT is the pattern of an insn which makes a
1946 birthing_insn_p (pat)
1951 if (reload_completed == 1)
1954 if (GET_CODE (pat) == SET
1955 && GET_CODE (SET_DEST (pat)) == REG)
1957 rtx dest = SET_DEST (pat);
1958 int i = REGNO (dest);
1960 /* It would be more accurate to use refers_to_regno_p or
1961 reg_mentioned_p to determine when the dest is not live before this
1964 if (REGNO_REG_SET_P (bb_live_regs, i))
1965 return (REG_N_SETS (i) == 1);
1969 if (GET_CODE (pat) == PARALLEL)
1971 for (j = 0; j < XVECLEN (pat, 0); j++)
1972 if (birthing_insn_p (XVECEXP (pat, 0, j)))
1978 /* PREV is an insn that is ready to execute. Adjust its priority if that
1979 will help shorten register lifetimes. */
1981 __inline static void
1982 adjust_priority (prev)
1985 /* Trying to shorten register lives after reload has completed
1986 is useless and wrong. It gives inaccurate schedules. */
1987 if (reload_completed == 0)
1992 /* ??? This code has no effect, because REG_DEAD notes are removed
1993 before we ever get here. */
1994 for (note = REG_NOTES (prev); note; note = XEXP (note, 1))
1995 if (REG_NOTE_KIND (note) == REG_DEAD)
1998 /* Defer scheduling insns which kill registers, since that
1999 shortens register lives. Prefer scheduling insns which
2000 make registers live for the same reason. */
2004 INSN_PRIORITY (prev) >>= 3;
2007 INSN_PRIORITY (prev) >>= 2;
2011 INSN_PRIORITY (prev) >>= 1;
2014 if (birthing_insn_p (PATTERN (prev)))
2016 int max = max_priority;
2018 if (max > INSN_PRIORITY (prev))
2019 INSN_PRIORITY (prev) = max;
2023 #ifdef ADJUST_PRIORITY
2024 ADJUST_PRIORITY (prev);
2029 /* INSN is the "currently executing insn". Launch each insn which was
2030 waiting on INSN (in the backwards dataflow sense). READY is a
2031 vector of insns which are ready to fire. N_READY is the number of
2032 elements in READY. CLOCK is the current virtual cycle. */
2035 schedule_insn (insn, ready, n_ready, clock)
2042 int new_ready = n_ready;
2044 if (MAX_BLOCKAGE > 1)
2045 schedule_unit (insn_unit (insn), insn, clock);
2047 if (LOG_LINKS (insn) == 0)
2050 /* This is used by the function adjust_priority above. */
2052 max_priority = MAX (INSN_PRIORITY (ready[0]), INSN_PRIORITY (insn));
2054 max_priority = INSN_PRIORITY (insn);
2056 for (link = LOG_LINKS (insn); link != 0; link = XEXP (link, 1))
2058 rtx prev = XEXP (link, 0);
2059 int cost = insn_cost (prev, link, insn);
2061 if ((INSN_REF_COUNT (prev) -= 1) != 0)
2063 /* We satisfied one requirement to fire PREV. Record the earliest
2064 time when PREV can fire. No need to do this if the cost is 1,
2065 because PREV can fire no sooner than the next cycle. */
2067 INSN_TICK (prev) = MAX (INSN_TICK (prev), clock + cost);
2071 /* We satisfied the last requirement to fire PREV. Ensure that all
2072 timing requirements are satisfied. */
2073 if (INSN_TICK (prev) - clock > cost)
2074 cost = INSN_TICK (prev) - clock;
2076 /* Adjust the priority of PREV and either put it on the ready
2077 list or queue it. */
2078 adjust_priority (prev);
2080 ready[new_ready++] = prev;
2082 queue_insn (prev, cost);
2089 /* Given N_READY insns in the ready list READY at time CLOCK, queue
2090 those that are blocked due to function unit hazards and rearrange
2091 the remaining ones to minimize subsequent function unit hazards. */
2094 schedule_select (ready, n_ready, clock, file)
2099 int pri = INSN_PRIORITY (ready[0]);
2100 int i, j, k, q, cost, best_cost, best_insn = 0, new_ready = n_ready;
2103 /* Work down the ready list in groups of instructions with the same
2104 priority value. Queue insns in the group that are blocked and
2105 select among those that remain for the one with the largest
2106 potential hazard. */
2107 for (i = 0; i < n_ready; i = j)
2110 for (j = i + 1; j < n_ready; j++)
2111 if ((pri = INSN_PRIORITY (ready[j])) != opri)
2114 /* Queue insns in the group that are blocked. */
2115 for (k = i, q = 0; k < j; k++)
2118 if ((cost = actual_hazard (insn_unit (insn), insn, clock, 0)) != 0)
2122 queue_insn (insn, cost);
2124 fprintf (file, "\n;; blocking insn %d for %d cycles",
2125 INSN_UID (insn), cost);
2130 /* Check the next group if all insns were queued. */
2134 /* If more than one remains, select the first one with the largest
2135 potential hazard. */
2136 else if (j - i - q > 1)
2139 for (k = i; k < j; k++)
2141 if ((insn = ready[k]) == 0)
2143 if ((cost = potential_hazard (insn_unit (insn), insn, 0))
2151 /* We have found a suitable insn to schedule. */
2155 /* Move the best insn to be front of the ready list. */
2160 fprintf (file, ", now");
2161 for (i = 0; i < n_ready; i++)
2163 fprintf (file, " %d", INSN_UID (ready[i]));
2164 fprintf (file, "\n;; insn %d has a greater potential hazard",
2165 INSN_UID (ready[best_insn]));
2167 for (i = best_insn; i > 0; i--)
2170 ready[i-1] = ready[i];
2175 /* Compact the ready list. */
2176 if (new_ready < n_ready)
2177 for (i = j = 0; i < n_ready; i++)
2179 ready[j++] = ready[i];
2184 /* Add a REG_DEAD note for REG to INSN, reusing a REG_DEAD note from the
2188 create_reg_dead_note (reg, insn)
2193 /* The number of registers killed after scheduling must be the same as the
2194 number of registers killed before scheduling. The number of REG_DEAD
2195 notes may not be conserved, i.e. two SImode hard register REG_DEAD notes
2196 might become one DImode hard register REG_DEAD note, but the number of
2197 registers killed will be conserved.
2199 We carefully remove REG_DEAD notes from the dead_notes list, so that
2200 there will be none left at the end. If we run out early, then there
2201 is a bug somewhere in flow, combine and/or sched. */
2203 if (dead_notes == 0)
2208 link = rtx_alloc (EXPR_LIST);
2209 PUT_REG_NOTE_KIND (link, REG_DEAD);
2214 /* Number of regs killed by REG. */
2215 int regs_killed = (REGNO (reg) >= FIRST_PSEUDO_REGISTER ? 1
2216 : HARD_REGNO_NREGS (REGNO (reg), GET_MODE (reg)));
2217 /* Number of regs killed by REG_DEAD notes taken off the list. */
2221 reg_note_regs = (REGNO (XEXP (link, 0)) >= FIRST_PSEUDO_REGISTER ? 1
2222 : HARD_REGNO_NREGS (REGNO (XEXP (link, 0)),
2223 GET_MODE (XEXP (link, 0))));
2224 while (reg_note_regs < regs_killed)
2226 /* LINK might be zero if we killed more registers after scheduling
2227 than before, and the last hard register we kill is actually
2228 multiple hard regs. */
2229 if (link == NULL_RTX)
2232 link = XEXP (link, 1);
2233 reg_note_regs += (REGNO (XEXP (link, 0)) >= FIRST_PSEUDO_REGISTER ? 1
2234 : HARD_REGNO_NREGS (REGNO (XEXP (link, 0)),
2235 GET_MODE (XEXP (link, 0))));
2237 dead_notes = XEXP (link, 1);
2239 /* If we took too many regs kills off, put the extra ones back. */
2240 while (reg_note_regs > regs_killed)
2242 rtx temp_reg, temp_link;
2244 temp_reg = gen_rtx_REG (word_mode, 0);
2245 temp_link = rtx_alloc (EXPR_LIST);
2246 PUT_REG_NOTE_KIND (temp_link, REG_DEAD);
2247 XEXP (temp_link, 0) = temp_reg;
2248 XEXP (temp_link, 1) = dead_notes;
2249 dead_notes = temp_link;
2254 XEXP (link, 0) = reg;
2255 XEXP (link, 1) = REG_NOTES (insn);
2256 REG_NOTES (insn) = link;
2259 /* Subroutine on attach_deaths_insn--handles the recursive search
2260 through INSN. If SET_P is true, then x is being modified by the insn. */
2263 attach_deaths (x, insn, set_p)
2270 register enum rtx_code code;
2276 code = GET_CODE (x);
2288 /* Get rid of the easy cases first. */
2293 /* If the register dies in this insn, queue that note, and mark
2294 this register as needing to die. */
2295 /* This code is very similar to mark_used_1 (if set_p is false)
2296 and mark_set_1 (if set_p is true) in flow.c. */
2306 all_needed = some_needed = REGNO_REG_SET_P (old_live_regs, regno);
2307 if (regno < FIRST_PSEUDO_REGISTER)
2311 n = HARD_REGNO_NREGS (regno, GET_MODE (x));
2314 int needed = (REGNO_REG_SET_P (old_live_regs, regno + n));
2315 some_needed |= needed;
2316 all_needed &= needed;
2320 /* If it wasn't live before we started, then add a REG_DEAD note.
2321 We must check the previous lifetime info not the current info,
2322 because we may have to execute this code several times, e.g.
2323 once for a clobber (which doesn't add a note) and later
2324 for a use (which does add a note).
2326 Always make the register live. We must do this even if it was
2327 live before, because this may be an insn which sets and uses
2328 the same register, in which case the register has already been
2329 killed, so we must make it live again.
2331 Global registers are always live, and should never have a REG_DEAD
2332 note added for them, so none of the code below applies to them. */
2334 if (regno >= FIRST_PSEUDO_REGISTER || ! global_regs[regno])
2336 /* Never add REG_DEAD notes for the FRAME_POINTER_REGNUM or the
2337 STACK_POINTER_REGNUM, since these are always considered to be
2338 live. Similarly for ARG_POINTER_REGNUM if it is fixed. */
2339 if (regno != FRAME_POINTER_REGNUM
2340 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
2341 && ! (regno == HARD_FRAME_POINTER_REGNUM)
2343 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
2344 && ! (regno == ARG_POINTER_REGNUM && fixed_regs[regno])
2346 && regno != STACK_POINTER_REGNUM)
2348 /* ??? It is perhaps a dead_or_set_p bug that it does
2349 not check for REG_UNUSED notes itself. This is necessary
2350 for the case where the SET_DEST is a subreg of regno, as
2351 dead_or_set_p handles subregs specially. */
2352 if (! all_needed && ! dead_or_set_p (insn, x)
2353 && ! find_reg_note (insn, REG_UNUSED, x))
2355 /* Check for the case where the register dying partially
2356 overlaps the register set by this insn. */
2357 if (regno < FIRST_PSEUDO_REGISTER
2358 && HARD_REGNO_NREGS (regno, GET_MODE (x)) > 1)
2360 int n = HARD_REGNO_NREGS (regno, GET_MODE (x));
2362 some_needed |= dead_or_set_regno_p (insn, regno + n);
2365 /* If none of the words in X is needed, make a REG_DEAD
2366 note. Otherwise, we must make partial REG_DEAD
2369 create_reg_dead_note (x, insn);
2374 /* Don't make a REG_DEAD note for a part of a
2375 register that is set in the insn. */
2376 for (i = HARD_REGNO_NREGS (regno, GET_MODE (x)) - 1;
2378 if (! REGNO_REG_SET_P (old_live_regs, regno + i)
2379 && ! dead_or_set_regno_p (insn, regno + i))
2380 create_reg_dead_note (gen_rtx_REG (reg_raw_mode[regno + i],
2387 if (regno < FIRST_PSEUDO_REGISTER)
2389 int j = HARD_REGNO_NREGS (regno, GET_MODE (x));
2392 CLEAR_REGNO_REG_SET (bb_dead_regs, regno + j);
2393 SET_REGNO_REG_SET (bb_live_regs, regno + j);
2398 CLEAR_REGNO_REG_SET (bb_dead_regs, regno);
2399 SET_REGNO_REG_SET (bb_live_regs, regno);
2406 /* Handle tail-recursive case. */
2407 attach_deaths (XEXP (x, 0), insn, 0);
2411 case STRICT_LOW_PART:
2412 /* These two cases preserve the value of SET_P, so handle them
2414 attach_deaths (XEXP (x, 0), insn, set_p);
2419 /* This case preserves the value of SET_P for the first operand, but
2420 clears it for the other two. */
2421 attach_deaths (XEXP (x, 0), insn, set_p);
2422 attach_deaths (XEXP (x, 1), insn, 0);
2423 attach_deaths (XEXP (x, 2), insn, 0);
2427 /* Other cases: walk the insn. */
2428 fmt = GET_RTX_FORMAT (code);
2429 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2432 attach_deaths (XEXP (x, i), insn, 0);
2433 else if (fmt[i] == 'E')
2434 for (j = 0; j < XVECLEN (x, i); j++)
2435 attach_deaths (XVECEXP (x, i, j), insn, 0);
2440 /* After INSN has executed, add register death notes for each register
2441 that is dead after INSN. */
2444 attach_deaths_insn (insn)
2447 rtx x = PATTERN (insn);
2448 register RTX_CODE code = GET_CODE (x);
2453 attach_deaths (SET_SRC (x), insn, 0);
2455 /* A register might die here even if it is the destination, e.g.
2456 it is the target of a volatile read and is otherwise unused.
2457 Hence we must always call attach_deaths for the SET_DEST. */
2458 attach_deaths (SET_DEST (x), insn, 1);
2460 else if (code == PARALLEL)
2463 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
2465 code = GET_CODE (XVECEXP (x, 0, i));
2468 attach_deaths (SET_SRC (XVECEXP (x, 0, i)), insn, 0);
2470 attach_deaths (SET_DEST (XVECEXP (x, 0, i)), insn, 1);
2472 /* Flow does not add REG_DEAD notes to registers that die in
2473 clobbers, so we can't either. */
2474 else if (code != CLOBBER)
2475 attach_deaths (XVECEXP (x, 0, i), insn, 0);
2478 /* If this is a CLOBBER, only add REG_DEAD notes to registers inside a
2479 MEM being clobbered, just like flow. */
2480 else if (code == CLOBBER && GET_CODE (XEXP (x, 0)) == MEM)
2481 attach_deaths (XEXP (XEXP (x, 0), 0), insn, 0);
2482 /* Otherwise don't add a death note to things being clobbered. */
2483 else if (code != CLOBBER)
2484 attach_deaths (x, insn, 0);
2486 /* Make death notes for things used in the called function. */
2487 if (GET_CODE (insn) == CALL_INSN)
2488 for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1))
2489 attach_deaths (XEXP (XEXP (link, 0), 0), insn,
2490 GET_CODE (XEXP (link, 0)) == CLOBBER);
2493 /* Delete notes beginning with INSN and maybe put them in the chain
2494 of notes ended by NOTE_LIST.
2495 Returns the insn following the notes. */
2498 unlink_notes (insn, tail)
2501 rtx prev = PREV_INSN (insn);
2503 while (insn != tail && GET_CODE (insn) == NOTE)
2505 rtx next = NEXT_INSN (insn);
2506 /* Delete the note from its current position. */
2508 NEXT_INSN (prev) = next;
2510 PREV_INSN (next) = prev;
2512 if (write_symbols != NO_DEBUG && NOTE_LINE_NUMBER (insn) > 0)
2513 /* Record line-number notes so they can be reused. */
2514 LINE_NOTE (insn) = insn;
2516 /* Don't save away NOTE_INSN_SETJMPs, because they must remain
2517 immediately after the call they follow. We use a fake
2518 (REG_DEAD (const_int -1)) note to remember them.
2519 Likewise with NOTE_INSN_{LOOP,EHREGION}_{BEG, END}. */
2520 else if (NOTE_LINE_NUMBER (insn) != NOTE_INSN_SETJMP
2521 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG
2522 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_END
2523 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_EH_REGION_BEG
2524 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_EH_REGION_END)
2526 /* Insert the note at the end of the notes list. */
2527 PREV_INSN (insn) = note_list;
2529 NEXT_INSN (note_list) = insn;
2538 /* Constructor for `sometimes' data structure. */
2541 new_sometimes_live (regs_sometimes_live, regno, sometimes_max)
2542 struct sometimes *regs_sometimes_live;
2546 register struct sometimes *p;
2548 /* There should never be a register greater than max_regno here. If there
2549 is, it means that a define_split has created a new pseudo reg. This
2550 is not allowed, since there will not be flow info available for any
2551 new register, so catch the error here. */
2552 if (regno >= max_regno)
2555 p = ®s_sometimes_live[sometimes_max];
2558 p->calls_crossed = 0;
2560 return sometimes_max;
2563 /* Count lengths of all regs we are currently tracking,
2564 and find new registers no longer live. */
2567 finish_sometimes_live (regs_sometimes_live, sometimes_max)
2568 struct sometimes *regs_sometimes_live;
2573 for (i = 0; i < sometimes_max; i++)
2575 register struct sometimes *p = ®s_sometimes_live[i];
2576 int regno = p->regno;
2578 sched_reg_live_length[regno] += p->live_length;
2579 sched_reg_n_calls_crossed[regno] += p->calls_crossed;
2583 /* Search INSN for fake REG_DEAD note pairs for NOTE_INSN_SETJMP,
2584 NOTE_INSN_{LOOP,EHREGION}_{BEG,END}; and convert them back into
2585 NOTEs. The REG_DEAD note following first one is contains the saved
2586 value for NOTE_BLOCK_NUMBER which is useful for
2587 NOTE_INSN_EH_REGION_{BEG,END} NOTEs. LAST is the last instruction
2588 output by the instruction scheduler. Return the new value of LAST. */
2591 reemit_notes (insn, last)
2597 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2599 if (REG_NOTE_KIND (note) == REG_DEAD
2600 && GET_CODE (XEXP (note, 0)) == CONST_INT)
2602 if (INTVAL (XEXP (note, 0)) == NOTE_INSN_SETJMP)
2604 CONST_CALL_P (emit_note_after (INTVAL (XEXP (note, 0)), insn))
2605 = CONST_CALL_P (note);
2606 remove_note (insn, note);
2607 note = XEXP (note, 1);
2611 last = emit_note_before (INTVAL (XEXP (note, 0)), last);
2612 remove_note (insn, note);
2613 note = XEXP (note, 1);
2614 NOTE_BLOCK_NUMBER (last) = INTVAL (XEXP (note, 0));
2616 remove_note (insn, note);
2622 /* Use modified list scheduling to rearrange insns in basic block
2623 B. FILE, if nonzero, is where we dump interesting output about
2627 schedule_block (b, file)
2633 int i, j, n_ready = 0, new_ready, n_insns;
2634 int sched_n_insns = 0;
2636 #define NEED_NOTHING 0
2641 /* HEAD and TAIL delimit the region being scheduled. */
2642 rtx head = basic_block_head[b];
2643 rtx tail = basic_block_end[b];
2644 /* PREV_HEAD and NEXT_TAIL are the boundaries of the insns
2645 being scheduled. When the insns have been ordered,
2646 these insns delimit where the new insns are to be
2647 spliced back into the insn chain. */
2651 /* Keep life information accurate. */
2652 register struct sometimes *regs_sometimes_live;
2656 fprintf (file, ";;\t -- basic block number %d from %d to %d --\n",
2657 b, INSN_UID (basic_block_head[b]), INSN_UID (basic_block_end[b]));
2660 reg_last_uses = (rtx *) alloca (i * sizeof (rtx));
2661 bzero ((char *) reg_last_uses, i * sizeof (rtx));
2662 reg_last_sets = (rtx *) alloca (i * sizeof (rtx));
2663 bzero ((char *) reg_last_sets, i * sizeof (rtx));
2664 reg_pending_sets = ALLOCA_REG_SET ();
2665 CLEAR_REG_SET (reg_pending_sets);
2666 reg_pending_sets_all = 0;
2670 /* We used to have code to avoid getting parameters moved from hard
2671 argument registers into pseudos.
2673 However, it was removed when it proved to be of marginal benefit and
2674 caused problems because of different notions of what the "head" insn
2677 /* Remove certain insns at the beginning from scheduling,
2678 by advancing HEAD. */
2680 /* At the start of a function, before reload has run, don't delay getting
2681 parameters from hard registers into pseudo registers. */
2682 if (reload_completed == 0 && b == 0)
2685 && GET_CODE (head) == NOTE
2686 && NOTE_LINE_NUMBER (head) != NOTE_INSN_FUNCTION_BEG)
2687 head = NEXT_INSN (head);
2689 && GET_CODE (head) == INSN
2690 && GET_CODE (PATTERN (head)) == SET)
2692 rtx src = SET_SRC (PATTERN (head));
2693 while (GET_CODE (src) == SUBREG
2694 || GET_CODE (src) == SIGN_EXTEND
2695 || GET_CODE (src) == ZERO_EXTEND
2696 || GET_CODE (src) == SIGN_EXTRACT
2697 || GET_CODE (src) == ZERO_EXTRACT)
2698 src = XEXP (src, 0);
2699 if (GET_CODE (src) != REG
2700 || REGNO (src) >= FIRST_PSEUDO_REGISTER)
2702 /* Keep this insn from ever being scheduled. */
2703 INSN_REF_COUNT (head) = 1;
2704 head = NEXT_INSN (head);
2709 /* Don't include any notes or labels at the beginning of the
2710 basic block, or notes at the ends of basic blocks. */
2711 while (head != tail)
2713 if (GET_CODE (head) == NOTE)
2714 head = NEXT_INSN (head);
2715 else if (GET_CODE (tail) == NOTE)
2716 tail = PREV_INSN (tail);
2717 else if (GET_CODE (head) == CODE_LABEL)
2718 head = NEXT_INSN (head);
2721 /* If the only insn left is a NOTE or a CODE_LABEL, then there is no need
2722 to schedule this block. */
2724 && (GET_CODE (head) == NOTE || GET_CODE (head) == CODE_LABEL))
2728 /* This short-cut doesn't work. It does not count call insns crossed by
2729 registers in reg_sometimes_live. It does not mark these registers as
2730 dead if they die in this block. It does not mark these registers live
2731 (or create new reg_sometimes_live entries if necessary) if they are born
2734 The easy solution is to just always schedule a block. This block only
2735 has one insn, so this won't slow down this pass by much. */
2741 /* Now HEAD through TAIL are the insns actually to be rearranged;
2742 Let PREV_HEAD and NEXT_TAIL enclose them. */
2743 prev_head = PREV_INSN (head);
2744 next_tail = NEXT_INSN (tail);
2746 /* Initialize basic block data structures. */
2748 pending_read_insns = 0;
2749 pending_read_mems = 0;
2750 pending_write_insns = 0;
2751 pending_write_mems = 0;
2752 pending_lists_length = 0;
2753 last_pending_memory_flush = 0;
2754 last_function_call = 0;
2755 last_scheduled_insn = 0;
2757 LOG_LINKS (sched_before_next_call) = 0;
2759 n_insns = sched_analyze (head, tail);
2762 free_pending_lists ();
2766 /* Allocate vector to hold insns to be rearranged (except those
2767 insns which are controlled by an insn with SCHED_GROUP_P set).
2768 All these insns are included between ORIG_HEAD and ORIG_TAIL,
2769 as those variables ultimately are set up. */
2770 ready = (rtx *) alloca ((n_insns+1) * sizeof (rtx));
2772 /* TAIL is now the last of the insns to be rearranged.
2773 Put those insns into the READY vector. */
2776 /* For all branches, calls, uses, and cc0 setters, force them to remain
2777 in order at the end of the block by adding dependencies and giving
2778 the last a high priority. There may be notes present, and prev_head
2781 Branches must obviously remain at the end. Calls should remain at the
2782 end since moving them results in worse register allocation. Uses remain
2783 at the end to ensure proper register allocation. cc0 setters remaim
2784 at the end because they can't be moved away from their cc0 user. */
2786 while (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2787 || (GET_CODE (insn) == INSN
2788 && (GET_CODE (PATTERN (insn)) == USE
2790 || sets_cc0_p (PATTERN (insn))
2793 || GET_CODE (insn) == NOTE)
2795 if (GET_CODE (insn) != NOTE)
2800 ready[n_ready++] = insn;
2801 INSN_PRIORITY (insn) = TAIL_PRIORITY - i;
2802 INSN_REF_COUNT (insn) = 0;
2804 else if (! find_insn_list (insn, LOG_LINKS (last)))
2806 add_dependence (last, insn, REG_DEP_ANTI);
2807 INSN_REF_COUNT (insn)++;
2811 /* Skip over insns that are part of a group. */
2812 while (SCHED_GROUP_P (insn))
2814 insn = prev_nonnote_insn (insn);
2819 insn = PREV_INSN (insn);
2820 /* Don't overrun the bounds of the basic block. */
2821 if (insn == prev_head)
2825 /* Assign priorities to instructions. Also check whether they
2826 are in priority order already. If so then I will be nonnegative.
2827 We use this shortcut only before reloading. */
2829 i = reload_completed ? DONE_PRIORITY : MAX_PRIORITY;
2832 for (; insn != prev_head; insn = PREV_INSN (insn))
2834 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2837 if (INSN_REF_COUNT (insn) == 0)
2840 ready[n_ready++] = insn;
2843 /* Make this dependent on the last of the instructions
2844 that must remain in order at the end of the block. */
2845 add_dependence (last, insn, REG_DEP_ANTI);
2846 INSN_REF_COUNT (insn) = 1;
2849 if (SCHED_GROUP_P (insn))
2851 while (SCHED_GROUP_P (insn))
2853 insn = prev_nonnote_insn (insn);
2861 if (INSN_PRIORITY (insn) < i)
2862 i = INSN_PRIORITY (insn);
2863 else if (INSN_PRIORITY (insn) > i)
2870 /* This short-cut doesn't work. It does not count call insns crossed by
2871 registers in reg_sometimes_live. It does not mark these registers as
2872 dead if they die in this block. It does not mark these registers live
2873 (or create new reg_sometimes_live entries if necessary) if they are born
2876 The easy solution is to just always schedule a block. These blocks tend
2877 to be very short, so this doesn't slow down this pass by much. */
2879 /* If existing order is good, don't bother to reorder. */
2880 if (i != DONE_PRIORITY)
2883 fprintf (file, ";; already scheduled\n");
2885 if (reload_completed == 0)
2887 for (i = 0; i < sometimes_max; i++)
2888 regs_sometimes_live[i].live_length += n_insns;
2890 finish_sometimes_live (regs_sometimes_live, sometimes_max);
2892 free_pending_lists ();
2897 /* Scan all the insns to be scheduled, removing NOTE insns
2898 and register death notes.
2899 Line number NOTE insns end up in NOTE_LIST.
2900 Register death notes end up in DEAD_NOTES.
2902 Recreate the register life information for the end of this basic
2905 if (reload_completed == 0)
2907 COPY_REG_SET (bb_live_regs, basic_block_live_at_start[b]);
2908 CLEAR_REG_SET (bb_dead_regs);
2912 /* This is the first block in the function. There may be insns
2913 before head that we can't schedule. We still need to examine
2914 them though for accurate register lifetime analysis. */
2916 /* We don't want to remove any REG_DEAD notes as the code below
2919 for (insn = basic_block_head[b]; insn != head;
2920 insn = NEXT_INSN (insn))
2921 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2923 /* See if the register gets born here. */
2924 /* We must check for registers being born before we check for
2925 registers dying. It is possible for a register to be born
2926 and die in the same insn, e.g. reading from a volatile
2927 memory location into an otherwise unused register. Such
2928 a register must be marked as dead after this insn. */
2929 if (GET_CODE (PATTERN (insn)) == SET
2930 || GET_CODE (PATTERN (insn)) == CLOBBER)
2931 sched_note_set (b, PATTERN (insn), 0);
2932 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
2935 for (j = XVECLEN (PATTERN (insn), 0) - 1; j >= 0; j--)
2936 if (GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == SET
2937 || GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == CLOBBER)
2938 sched_note_set (b, XVECEXP (PATTERN (insn), 0, j), 0);
2940 /* ??? This code is obsolete and should be deleted. It
2941 is harmless though, so we will leave it in for now. */
2942 for (j = XVECLEN (PATTERN (insn), 0) - 1; j >= 0; j--)
2943 if (GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == USE)
2944 sched_note_set (b, XVECEXP (PATTERN (insn), 0, j), 0);
2947 /* Each call clobbers (makes live) all call-clobbered regs
2948 that are not global or fixed. Note that the function-value
2949 reg is a call_clobbered reg. */
2951 if (GET_CODE (insn) == CALL_INSN)
2954 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
2955 if (call_used_regs[j] && ! global_regs[j]
2958 SET_REGNO_REG_SET (bb_live_regs, j);
2959 CLEAR_REGNO_REG_SET (bb_dead_regs, j);
2963 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
2965 if ((REG_NOTE_KIND (link) == REG_DEAD
2966 || REG_NOTE_KIND (link) == REG_UNUSED)
2967 /* Verify that the REG_NOTE has a valid value. */
2968 && GET_CODE (XEXP (link, 0)) == REG)
2970 register int regno = REGNO (XEXP (link, 0));
2972 if (regno < FIRST_PSEUDO_REGISTER)
2974 int j = HARD_REGNO_NREGS (regno,
2975 GET_MODE (XEXP (link, 0)));
2978 CLEAR_REGNO_REG_SET (bb_live_regs, regno + j);
2979 SET_REGNO_REG_SET (bb_dead_regs, regno + j);
2984 CLEAR_REGNO_REG_SET (bb_live_regs, regno);
2985 SET_REGNO_REG_SET (bb_dead_regs, regno);
2993 /* If debugging information is being produced, keep track of the line
2994 number notes for each insn. */
2995 if (write_symbols != NO_DEBUG)
2997 /* We must use the true line number for the first insn in the block
2998 that was computed and saved at the start of this pass. We can't
2999 use the current line number, because scheduling of the previous
3000 block may have changed the current line number. */
3001 rtx line = line_note_head[b];
3003 for (insn = basic_block_head[b];
3005 insn = NEXT_INSN (insn))
3006 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
3009 LINE_NOTE (insn) = line;
3012 for (insn = head; insn != next_tail; insn = NEXT_INSN (insn))
3014 rtx prev, next, link;
3016 /* Farm out notes. This is needed to keep the debugger from
3017 getting completely deranged. */
3018 if (GET_CODE (insn) == NOTE)
3021 insn = unlink_notes (insn, next_tail);
3026 if (insn == next_tail)
3030 if (reload_completed == 0
3031 && GET_RTX_CLASS (GET_CODE (insn)) == 'i')
3033 /* See if the register gets born here. */
3034 /* We must check for registers being born before we check for
3035 registers dying. It is possible for a register to be born and
3036 die in the same insn, e.g. reading from a volatile memory
3037 location into an otherwise unused register. Such a register
3038 must be marked as dead after this insn. */
3039 if (GET_CODE (PATTERN (insn)) == SET
3040 || GET_CODE (PATTERN (insn)) == CLOBBER)
3041 sched_note_set (b, PATTERN (insn), 0);
3042 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
3045 for (j = XVECLEN (PATTERN (insn), 0) - 1; j >= 0; j--)
3046 if (GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == SET
3047 || GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == CLOBBER)
3048 sched_note_set (b, XVECEXP (PATTERN (insn), 0, j), 0);
3050 /* ??? This code is obsolete and should be deleted. It
3051 is harmless though, so we will leave it in for now. */
3052 for (j = XVECLEN (PATTERN (insn), 0) - 1; j >= 0; j--)
3053 if (GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == USE)
3054 sched_note_set (b, XVECEXP (PATTERN (insn), 0, j), 0);
3057 /* Each call clobbers (makes live) all call-clobbered regs that are
3058 not global or fixed. Note that the function-value reg is a
3059 call_clobbered reg. */
3061 if (GET_CODE (insn) == CALL_INSN)
3064 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
3065 if (call_used_regs[j] && ! global_regs[j]
3068 SET_REGNO_REG_SET (bb_live_regs, j);
3069 CLEAR_REGNO_REG_SET (bb_dead_regs, j);
3073 /* Need to know what registers this insn kills. */
3074 for (prev = 0, link = REG_NOTES (insn); link; link = next)
3076 next = XEXP (link, 1);
3077 if ((REG_NOTE_KIND (link) == REG_DEAD
3078 || REG_NOTE_KIND (link) == REG_UNUSED)
3079 /* Verify that the REG_NOTE has a valid value. */
3080 && GET_CODE (XEXP (link, 0)) == REG)
3082 register int regno = REGNO (XEXP (link, 0));
3084 /* Only unlink REG_DEAD notes; leave REG_UNUSED notes
3086 if (REG_NOTE_KIND (link) == REG_DEAD)
3089 XEXP (prev, 1) = next;
3091 REG_NOTES (insn) = next;
3092 XEXP (link, 1) = dead_notes;
3098 if (regno < FIRST_PSEUDO_REGISTER)
3100 int j = HARD_REGNO_NREGS (regno,
3101 GET_MODE (XEXP (link, 0)));
3104 CLEAR_REGNO_REG_SET (bb_live_regs, regno + j);
3105 SET_REGNO_REG_SET (bb_dead_regs, regno + j);
3110 CLEAR_REGNO_REG_SET (bb_live_regs, regno);
3111 SET_REGNO_REG_SET (bb_dead_regs, regno);
3120 if (reload_completed == 0)
3122 /* Keep track of register lives. */
3123 old_live_regs = ALLOCA_REG_SET ();
3125 = (struct sometimes *) alloca (max_regno * sizeof (struct sometimes));
3128 /* Start with registers live at end. */
3129 COPY_REG_SET (old_live_regs, bb_live_regs);
3130 EXECUTE_IF_SET_IN_REG_SET (bb_live_regs, 0, j,
3133 = new_sometimes_live (regs_sometimes_live,
3138 SCHED_SORT (ready, n_ready, 1);
3142 fprintf (file, ";; ready list initially:\n;; ");
3143 for (i = 0; i < n_ready; i++)
3144 fprintf (file, "%d ", INSN_UID (ready[i]));
3145 fprintf (file, "\n\n");
3147 for (insn = head; insn != next_tail; insn = NEXT_INSN (insn))
3148 if (INSN_PRIORITY (insn) > 0)
3149 fprintf (file, ";; insn[%4d]: priority = %4d, ref_count = %4d\n",
3150 INSN_UID (insn), INSN_PRIORITY (insn),
3151 INSN_REF_COUNT (insn));
3154 /* Now HEAD and TAIL are going to become disconnected
3155 entirely from the insn chain. */
3158 /* Q_SIZE will always be zero here. */
3159 q_ptr = 0; clock = 0;
3160 bzero ((char *) insn_queue, sizeof (insn_queue));
3162 /* Now, perform list scheduling. */
3164 /* Where we start inserting insns is after TAIL. */
3167 new_needs = (NEXT_INSN (prev_head) == basic_block_head[b]
3168 ? NEED_HEAD : NEED_NOTHING);
3169 if (PREV_INSN (next_tail) == basic_block_end[b])
3170 new_needs |= NEED_TAIL;
3172 new_ready = n_ready;
3173 while (sched_n_insns < n_insns)
3175 q_ptr = NEXT_Q (q_ptr); clock++;
3177 /* Add all pending insns that can be scheduled without stalls to the
3179 for (insn = insn_queue[q_ptr]; insn; insn = NEXT_INSN (insn))
3182 fprintf (file, ";; launching %d before %d with no stalls at T-%d\n",
3183 INSN_UID (insn), INSN_UID (last), clock);
3184 ready[new_ready++] = insn;
3187 insn_queue[q_ptr] = 0;
3189 /* If there are no ready insns, stall until one is ready and add all
3190 of the pending insns at that point to the ready list. */
3193 register int stalls;
3195 for (stalls = 1; stalls < INSN_QUEUE_SIZE; stalls++)
3196 if ((insn = insn_queue[NEXT_Q_AFTER (q_ptr, stalls)]))
3198 for (; insn; insn = NEXT_INSN (insn))
3201 fprintf (file, ";; launching %d before %d with %d stalls at T-%d\n",
3202 INSN_UID (insn), INSN_UID (last), stalls, clock);
3203 ready[new_ready++] = insn;
3206 insn_queue[NEXT_Q_AFTER (q_ptr, stalls)] = 0;
3210 q_ptr = NEXT_Q_AFTER (q_ptr, stalls); clock += stalls;
3213 /* There should be some instructions waiting to fire. */
3219 fprintf (file, ";; ready list at T-%d:", clock);
3220 for (i = 0; i < new_ready; i++)
3221 fprintf (file, " %d (%x)",
3222 INSN_UID (ready[i]), INSN_PRIORITY (ready[i]));
3225 /* Sort the ready list and choose the best insn to schedule. Select
3226 which insn should issue in this cycle and queue those that are
3227 blocked by function unit hazards.
3229 N_READY holds the number of items that were scheduled the last time,
3230 minus the one instruction scheduled on the last loop iteration; it
3231 is not modified for any other reason in this loop. */
3233 SCHED_SORT (ready, new_ready, n_ready);
3234 if (MAX_BLOCKAGE > 1)
3236 new_ready = schedule_select (ready, new_ready, clock, file);
3240 fprintf (file, "\n");
3241 /* We must set n_ready here, to ensure that sorting always
3242 occurs when we come back to the SCHED_SORT line above. */
3247 n_ready = new_ready;
3248 last_scheduled_insn = insn = ready[0];
3250 /* The first insn scheduled becomes the new tail. */
3256 fprintf (file, ", now");
3257 for (i = 0; i < n_ready; i++)
3258 fprintf (file, " %d", INSN_UID (ready[i]));
3259 fprintf (file, "\n");
3262 if (DONE_PRIORITY_P (insn))
3265 if (reload_completed == 0)
3267 /* Process this insn, and each insn linked to this one which must
3268 be immediately output after this insn. */
3271 /* First we kill registers set by this insn, and then we
3272 make registers used by this insn live. This is the opposite
3273 order used above because we are traversing the instructions
3276 /* Strictly speaking, we should scan REG_UNUSED notes and make
3277 every register mentioned there live, however, we will just
3278 kill them again immediately below, so there doesn't seem to
3279 be any reason why we bother to do this. */
3281 /* See if this is the last notice we must take of a register. */
3282 if (GET_CODE (PATTERN (insn)) == SET
3283 || GET_CODE (PATTERN (insn)) == CLOBBER)
3284 sched_note_set (b, PATTERN (insn), 1);
3285 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
3288 for (j = XVECLEN (PATTERN (insn), 0) - 1; j >= 0; j--)
3289 if (GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == SET
3290 || GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == CLOBBER)
3291 sched_note_set (b, XVECEXP (PATTERN (insn), 0, j), 1);
3294 /* This code keeps life analysis information up to date. */
3295 if (GET_CODE (insn) == CALL_INSN)
3297 register struct sometimes *p;
3299 /* A call kills all call used registers that are not
3300 global or fixed, except for those mentioned in the call
3301 pattern which will be made live again later. */
3302 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
3303 if (call_used_regs[i] && ! global_regs[i]
3306 CLEAR_REGNO_REG_SET (bb_live_regs, i);
3307 SET_REGNO_REG_SET (bb_dead_regs, i);
3310 /* Regs live at the time of a call instruction must not
3311 go in a register clobbered by calls. Record this for
3312 all regs now live. Note that insns which are born or
3313 die in a call do not cross a call, so this must be done
3314 after the killings (above) and before the births
3316 p = regs_sometimes_live;
3317 for (i = 0; i < sometimes_max; i++, p++)
3318 if (REGNO_REG_SET_P (bb_live_regs, p->regno))
3319 p->calls_crossed += 1;
3322 /* Make every register used live, and add REG_DEAD notes for
3323 registers which were not live before we started. */
3324 attach_deaths_insn (insn);
3326 /* Find registers now made live by that instruction. */
3327 EXECUTE_IF_AND_COMPL_IN_REG_SET (bb_live_regs, old_live_regs, 0, i,
3330 = new_sometimes_live (regs_sometimes_live,
3333 IOR_REG_SET (old_live_regs, bb_live_regs);
3335 /* Count lengths of all regs we are worrying about now,
3336 and handle registers no longer live. */
3338 for (i = 0; i < sometimes_max; i++)
3340 register struct sometimes *p = ®s_sometimes_live[i];
3341 int regno = p->regno;
3343 p->live_length += 1;
3345 if (!REGNO_REG_SET_P (bb_live_regs, p->regno))
3347 /* This is the end of one of this register's lifetime
3348 segments. Save the lifetime info collected so far,
3349 and clear its bit in the old_live_regs entry. */
3350 sched_reg_live_length[regno] += p->live_length;
3351 sched_reg_n_calls_crossed[regno] += p->calls_crossed;
3352 CLEAR_REGNO_REG_SET (old_live_regs, p->regno);
3354 /* Delete the reg_sometimes_live entry for this reg by
3355 copying the last entry over top of it. */
3356 *p = regs_sometimes_live[--sometimes_max];
3357 /* ...and decrement i so that this newly copied entry
3358 will be processed. */
3364 insn = PREV_INSN (insn);
3366 while (SCHED_GROUP_P (link));
3368 /* Set INSN back to the insn we are scheduling now. */
3372 /* Schedule INSN. Remove it from the ready list. */
3377 NEXT_INSN (insn) = last;
3378 PREV_INSN (last) = insn;
3380 /* Everything that precedes INSN now either becomes "ready", if
3381 it can execute immediately before INSN, or "pending", if
3382 there must be a delay. Give INSN high enough priority that
3383 at least one (maybe more) reg-killing insns can be launched
3384 ahead of all others. Mark INSN as scheduled by changing its
3386 INSN_PRIORITY (insn) = LAUNCH_PRIORITY;
3387 new_ready = schedule_insn (insn, ready, n_ready, clock);
3388 INSN_PRIORITY (insn) = DONE_PRIORITY;
3390 /* Schedule all prior insns that must not be moved. */
3391 if (SCHED_GROUP_P (insn))
3393 /* Disable these insns from being launched, in case one of the
3394 insns in the group has a dependency on an earlier one. */
3396 while (SCHED_GROUP_P (link))
3398 /* Disable these insns from being launched by anybody. */
3399 link = PREV_INSN (link);
3400 INSN_REF_COUNT (link) = 0;
3403 /* Now handle each group insn like the main insn was handled
3406 while (SCHED_GROUP_P (link))
3408 link = PREV_INSN (link);
3412 /* ??? Why don't we set LAUNCH_PRIORITY here? */
3413 new_ready = schedule_insn (link, ready, new_ready, clock);
3414 INSN_PRIORITY (link) = DONE_PRIORITY;
3418 /* Put back NOTE_INSN_SETJMP,
3419 NOTE_INSN_{LOOP,EHREGION}_{BEGIN,END} notes. */
3421 /* To prime the loop. We need to handle INSN and all the insns in the
3423 last = NEXT_INSN (insn);
3426 insn = PREV_INSN (last);
3428 /* Maintain a valid chain so emit_note_before works.
3429 This is necessary because PREV_INSN (insn) isn't valid
3430 (if ! SCHED_GROUP_P) and if it points to an insn already
3431 scheduled, a circularity will result. */
3432 if (! SCHED_GROUP_P (insn))
3434 NEXT_INSN (prev_head) = insn;
3435 PREV_INSN (insn) = prev_head;
3438 last = reemit_notes (insn, insn);
3440 while (SCHED_GROUP_P (insn));
3445 if (reload_completed == 0)
3446 finish_sometimes_live (regs_sometimes_live, sometimes_max);
3448 /* HEAD is now the first insn in the chain of insns that
3449 been scheduled by the loop above.
3450 TAIL is the last of those insns. */
3453 /* NOTE_LIST is the end of a chain of notes previously found
3454 among the insns. Insert them at the beginning of the insns. */
3457 rtx note_head = note_list;
3458 while (PREV_INSN (note_head))
3459 note_head = PREV_INSN (note_head);
3461 PREV_INSN (head) = note_list;
3462 NEXT_INSN (note_list) = head;
3466 /* There should be no REG_DEAD notes leftover at the end.
3467 In practice, this can occur as the result of bugs in flow, combine.c,
3468 and/or sched.c. The values of the REG_DEAD notes remaining are
3469 meaningless, because dead_notes is just used as a free list. */
3471 if (dead_notes != 0)
3475 if (new_needs & NEED_HEAD)
3476 basic_block_head[b] = head;
3477 PREV_INSN (head) = prev_head;
3478 NEXT_INSN (prev_head) = head;
3480 if (new_needs & NEED_TAIL)
3481 basic_block_end[b] = tail;
3482 NEXT_INSN (tail) = next_tail;
3483 PREV_INSN (next_tail) = tail;
3485 /* Restore the line-number notes of each insn. */
3486 if (write_symbols != NO_DEBUG)
3488 rtx line, note, prev, new;
3491 head = basic_block_head[b];
3492 next_tail = NEXT_INSN (basic_block_end[b]);
3494 /* Determine the current line-number. We want to know the current
3495 line number of the first insn of the block here, in case it is
3496 different from the true line number that was saved earlier. If
3497 different, then we need a line number note before the first insn
3498 of this block. If it happens to be the same, then we don't want to
3499 emit another line number note here. */
3500 for (line = head; line; line = PREV_INSN (line))
3501 if (GET_CODE (line) == NOTE && NOTE_LINE_NUMBER (line) > 0)
3504 /* Walk the insns keeping track of the current line-number and inserting
3505 the line-number notes as needed. */
3506 for (insn = head; insn != next_tail; insn = NEXT_INSN (insn))
3507 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
3509 /* This used to emit line number notes before every non-deleted note.
3510 However, this confuses a debugger, because line notes not separated
3511 by real instructions all end up at the same address. I can find no
3512 use for line number notes before other notes, so none are emitted. */
3513 else if (GET_CODE (insn) != NOTE
3514 && (note = LINE_NOTE (insn)) != 0
3517 || NOTE_LINE_NUMBER (note) != NOTE_LINE_NUMBER (line)
3518 || NOTE_SOURCE_FILE (note) != NOTE_SOURCE_FILE (line)))
3521 prev = PREV_INSN (insn);
3522 if (LINE_NOTE (note))
3524 /* Re-use the original line-number note. */
3525 LINE_NOTE (note) = 0;
3526 PREV_INSN (note) = prev;
3527 NEXT_INSN (prev) = note;
3528 PREV_INSN (insn) = note;
3529 NEXT_INSN (note) = insn;
3534 new = emit_note_after (NOTE_LINE_NUMBER (note), prev);
3535 NOTE_SOURCE_FILE (new) = NOTE_SOURCE_FILE (note);
3536 RTX_INTEGRATED_P (new) = RTX_INTEGRATED_P (note);
3540 fprintf (file, ";; added %d line-number notes\n", notes);
3545 fprintf (file, ";; total time = %d\n;; new basic block head = %d\n;; new basic block end = %d\n\n",
3546 clock, INSN_UID (basic_block_head[b]), INSN_UID (basic_block_end[b]));
3549 /* Yow! We're done! */
3550 free_pending_lists ();
3553 FREE_REG_SET (reg_pending_sets);
3554 FREE_REG_SET (old_live_regs);
3559 /* Subroutine of split_hard_reg_notes. Searches X for any reference to
3560 REGNO, returning the rtx of the reference found if any. Otherwise,
3564 regno_use_in (regno, x)
3572 if (GET_CODE (x) == REG && REGNO (x) == regno)
3575 fmt = GET_RTX_FORMAT (GET_CODE (x));
3576 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
3580 if ((tem = regno_use_in (regno, XEXP (x, i))))
3583 else if (fmt[i] == 'E')
3584 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3585 if ((tem = regno_use_in (regno , XVECEXP (x, i, j))))
3592 /* Subroutine of update_flow_info. Determines whether any new REG_NOTEs are
3593 needed for the hard register mentioned in the note. This can happen
3594 if the reference to the hard register in the original insn was split into
3595 several smaller hard register references in the split insns. */
3598 split_hard_reg_notes (note, first, last, orig_insn)
3599 rtx note, first, last, orig_insn;
3601 rtx reg, temp, link;
3602 int n_regs, i, new_reg;
3605 /* Assume that this is a REG_DEAD note. */
3606 if (REG_NOTE_KIND (note) != REG_DEAD)
3609 reg = XEXP (note, 0);
3611 n_regs = HARD_REGNO_NREGS (REGNO (reg), GET_MODE (reg));
3613 for (i = 0; i < n_regs; i++)
3615 new_reg = REGNO (reg) + i;
3617 /* Check for references to new_reg in the split insns. */
3618 for (insn = last; ; insn = PREV_INSN (insn))
3620 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
3621 && (temp = regno_use_in (new_reg, PATTERN (insn))))
3623 /* Create a new reg dead note here. */
3624 link = rtx_alloc (EXPR_LIST);
3625 PUT_REG_NOTE_KIND (link, REG_DEAD);
3626 XEXP (link, 0) = temp;
3627 XEXP (link, 1) = REG_NOTES (insn);
3628 REG_NOTES (insn) = link;
3630 /* If killed multiple registers here, then add in the excess. */
3631 i += HARD_REGNO_NREGS (REGNO (temp), GET_MODE (temp)) - 1;
3635 /* It isn't mentioned anywhere, so no new reg note is needed for
3643 /* Subroutine of update_flow_info. Determines whether a SET or CLOBBER in an
3644 insn created by splitting needs a REG_DEAD or REG_UNUSED note added. */
3647 new_insn_dead_notes (pat, insn, last, orig_insn)
3648 rtx pat, insn, last, orig_insn;
3652 /* PAT is either a CLOBBER or a SET here. */
3653 dest = XEXP (pat, 0);
3655 while (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SUBREG
3656 || GET_CODE (dest) == STRICT_LOW_PART
3657 || GET_CODE (dest) == SIGN_EXTRACT)
3658 dest = XEXP (dest, 0);
3660 if (GET_CODE (dest) == REG)
3662 for (tem = last; tem != insn; tem = PREV_INSN (tem))
3664 if (GET_RTX_CLASS (GET_CODE (tem)) == 'i'
3665 && reg_overlap_mentioned_p (dest, PATTERN (tem))
3666 && (set = single_set (tem)))
3668 rtx tem_dest = SET_DEST (set);
3670 while (GET_CODE (tem_dest) == ZERO_EXTRACT
3671 || GET_CODE (tem_dest) == SUBREG
3672 || GET_CODE (tem_dest) == STRICT_LOW_PART
3673 || GET_CODE (tem_dest) == SIGN_EXTRACT)
3674 tem_dest = XEXP (tem_dest, 0);
3676 if (! rtx_equal_p (tem_dest, dest))
3678 /* Use the same scheme as combine.c, don't put both REG_DEAD
3679 and REG_UNUSED notes on the same insn. */
3680 if (! find_regno_note (tem, REG_UNUSED, REGNO (dest))
3681 && ! find_regno_note (tem, REG_DEAD, REGNO (dest)))
3683 rtx note = rtx_alloc (EXPR_LIST);
3684 PUT_REG_NOTE_KIND (note, REG_DEAD);
3685 XEXP (note, 0) = dest;
3686 XEXP (note, 1) = REG_NOTES (tem);
3687 REG_NOTES (tem) = note;
3689 /* The reg only dies in one insn, the last one that uses
3693 else if (reg_overlap_mentioned_p (dest, SET_SRC (set)))
3694 /* We found an instruction that both uses the register,
3695 and sets it, so no new REG_NOTE is needed for this set. */
3699 /* If this is a set, it must die somewhere, unless it is the dest of
3700 the original insn, and hence is live after the original insn. Abort
3701 if it isn't supposed to be live after the original insn.
3703 If this is a clobber, then just add a REG_UNUSED note. */
3706 int live_after_orig_insn = 0;
3707 rtx pattern = PATTERN (orig_insn);
3710 if (GET_CODE (pat) == CLOBBER)
3712 rtx note = rtx_alloc (EXPR_LIST);
3713 PUT_REG_NOTE_KIND (note, REG_UNUSED);
3714 XEXP (note, 0) = dest;
3715 XEXP (note, 1) = REG_NOTES (insn);
3716 REG_NOTES (insn) = note;
3720 /* The original insn could have multiple sets, so search the
3721 insn for all sets. */
3722 if (GET_CODE (pattern) == SET)
3724 if (reg_overlap_mentioned_p (dest, SET_DEST (pattern)))
3725 live_after_orig_insn = 1;
3727 else if (GET_CODE (pattern) == PARALLEL)
3729 for (i = 0; i < XVECLEN (pattern, 0); i++)
3730 if (GET_CODE (XVECEXP (pattern, 0, i)) == SET
3731 && reg_overlap_mentioned_p (dest,
3732 SET_DEST (XVECEXP (pattern,
3734 live_after_orig_insn = 1;
3737 if (! live_after_orig_insn)
3743 /* Subroutine of update_flow_info. Update the value of reg_n_sets for all
3744 registers modified by X. INC is -1 if the containing insn is being deleted,
3745 and is 1 if the containing insn is a newly generated insn. */
3748 update_n_sets (x, inc)
3752 rtx dest = SET_DEST (x);
3754 while (GET_CODE (dest) == STRICT_LOW_PART || GET_CODE (dest) == SUBREG
3755 || GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
3756 dest = SUBREG_REG (dest);
3758 if (GET_CODE (dest) == REG)
3760 int regno = REGNO (dest);
3762 if (regno < FIRST_PSEUDO_REGISTER)
3765 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (dest));
3767 for (i = regno; i < endregno; i++)
3768 REG_N_SETS (i) += inc;
3771 REG_N_SETS (regno) += inc;
3775 /* Updates all flow-analysis related quantities (including REG_NOTES) for
3776 the insns from FIRST to LAST inclusive that were created by splitting
3777 ORIG_INSN. NOTES are the original REG_NOTES. */
3780 update_flow_info (notes, first, last, orig_insn)
3787 rtx orig_dest, temp;
3790 /* Get and save the destination set by the original insn. */
3792 orig_dest = single_set (orig_insn);
3794 orig_dest = SET_DEST (orig_dest);
3796 /* Move REG_NOTES from the original insn to where they now belong. */
3798 for (note = notes; note; note = next)
3800 next = XEXP (note, 1);
3801 switch (REG_NOTE_KIND (note))
3805 /* Move these notes from the original insn to the last new insn where
3806 the register is now set. */
3808 for (insn = last; ; insn = PREV_INSN (insn))
3810 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
3811 && reg_mentioned_p (XEXP (note, 0), PATTERN (insn)))
3813 /* If this note refers to a multiple word hard register, it
3814 may have been split into several smaller hard register
3815 references, so handle it specially. */
3816 temp = XEXP (note, 0);
3817 if (REG_NOTE_KIND (note) == REG_DEAD
3818 && GET_CODE (temp) == REG
3819 && REGNO (temp) < FIRST_PSEUDO_REGISTER
3820 && HARD_REGNO_NREGS (REGNO (temp), GET_MODE (temp)) > 1)
3821 split_hard_reg_notes (note, first, last, orig_insn);
3824 XEXP (note, 1) = REG_NOTES (insn);
3825 REG_NOTES (insn) = note;
3828 /* Sometimes need to convert REG_UNUSED notes to REG_DEAD
3830 /* ??? This won't handle multiple word registers correctly,
3831 but should be good enough for now. */
3832 if (REG_NOTE_KIND (note) == REG_UNUSED
3833 && GET_CODE (XEXP (note, 0)) != SCRATCH
3834 && ! dead_or_set_p (insn, XEXP (note, 0)))
3835 PUT_REG_NOTE_KIND (note, REG_DEAD);
3837 /* The reg only dies in one insn, the last one that uses
3841 /* It must die somewhere, fail it we couldn't find where it died.
3843 If this is a REG_UNUSED note, then it must be a temporary
3844 register that was not needed by this instantiation of the
3845 pattern, so we can safely ignore it. */
3848 /* After reload, REG_DEAD notes come sometimes an
3849 instruction after the register actually dies. */
3850 if (reload_completed && REG_NOTE_KIND (note) == REG_DEAD)
3852 XEXP (note, 1) = REG_NOTES (insn);
3853 REG_NOTES (insn) = note;
3857 if (REG_NOTE_KIND (note) != REG_UNUSED)
3866 /* If the insn that set the register to 0 was deleted, this
3867 note cannot be relied on any longer. The destination might
3868 even have been moved to memory.
3869 This was observed for SH4 with execute/920501-6.c compilation,
3870 -O2 -fomit-frame-pointer -finline-functions . */
3871 if (GET_CODE (XEXP (note, 0)) == NOTE
3872 || INSN_DELETED_P (XEXP (note, 0)))
3874 /* This note applies to the dest of the original insn. Find the
3875 first new insn that now has the same dest, and move the note
3881 for (insn = first; ; insn = NEXT_INSN (insn))
3883 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
3884 && (temp = single_set (insn))
3885 && rtx_equal_p (SET_DEST (temp), orig_dest))
3887 XEXP (note, 1) = REG_NOTES (insn);
3888 REG_NOTES (insn) = note;
3889 /* The reg is only zero before one insn, the first that
3893 /* If this note refers to a multiple word hard
3894 register, it may have been split into several smaller
3895 hard register references. We could split the notes,
3896 but simply dropping them is good enough. */
3897 if (GET_CODE (orig_dest) == REG
3898 && REGNO (orig_dest) < FIRST_PSEUDO_REGISTER
3899 && HARD_REGNO_NREGS (REGNO (orig_dest),
3900 GET_MODE (orig_dest)) > 1)
3902 /* It must be set somewhere, fail if we couldn't find where it
3911 /* A REG_EQUIV or REG_EQUAL note on an insn with more than one
3912 set is meaningless. Just drop the note. */
3916 case REG_NO_CONFLICT:
3917 /* These notes apply to the dest of the original insn. Find the last
3918 new insn that now has the same dest, and move the note there. */
3923 for (insn = last; ; insn = PREV_INSN (insn))
3925 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
3926 && (temp = single_set (insn))
3927 && rtx_equal_p (SET_DEST (temp), orig_dest))
3929 XEXP (note, 1) = REG_NOTES (insn);
3930 REG_NOTES (insn) = note;
3931 /* Only put this note on one of the new insns. */
3935 /* The original dest must still be set someplace. Abort if we
3936 couldn't find it. */
3939 /* However, if this note refers to a multiple word hard
3940 register, it may have been split into several smaller
3941 hard register references. We could split the notes,
3942 but simply dropping them is good enough. */
3943 if (GET_CODE (orig_dest) == REG
3944 && REGNO (orig_dest) < FIRST_PSEUDO_REGISTER
3945 && HARD_REGNO_NREGS (REGNO (orig_dest),
3946 GET_MODE (orig_dest)) > 1)
3948 /* Likewise for multi-word memory references. */
3949 if (GET_CODE (orig_dest) == MEM
3950 && SIZE_FOR_MODE (orig_dest) > MOVE_MAX)
3958 /* Move a REG_LIBCALL note to the first insn created, and update
3959 the corresponding REG_RETVAL note. */
3960 XEXP (note, 1) = REG_NOTES (first);
3961 REG_NOTES (first) = note;
3963 insn = XEXP (note, 0);
3964 note = find_reg_note (insn, REG_RETVAL, NULL_RTX);
3966 XEXP (note, 0) = first;
3969 case REG_EXEC_COUNT:
3970 /* Move a REG_EXEC_COUNT note to the first insn created. */
3971 XEXP (note, 1) = REG_NOTES (first);
3972 REG_NOTES (first) = note;
3976 /* Move a REG_RETVAL note to the last insn created, and update
3977 the corresponding REG_LIBCALL note. */
3978 XEXP (note, 1) = REG_NOTES (last);
3979 REG_NOTES (last) = note;
3981 insn = XEXP (note, 0);
3982 note = find_reg_note (insn, REG_LIBCALL, NULL_RTX);
3984 XEXP (note, 0) = last;
3989 /* This should be moved to whichever instruction is a JUMP_INSN. */
3991 for (insn = last; ; insn = PREV_INSN (insn))
3993 if (GET_CODE (insn) == JUMP_INSN)
3995 XEXP (note, 1) = REG_NOTES (insn);
3996 REG_NOTES (insn) = note;
3997 /* Only put this note on one of the new insns. */
4000 /* Fail if we couldn't find a JUMP_INSN. */
4007 /* reload sometimes leaves obsolete REG_INC notes around. */
4008 if (reload_completed)
4010 /* This should be moved to whichever instruction now has the
4011 increment operation. */
4015 /* Should be moved to the new insn(s) which use the label. */
4016 for (insn = first; insn != NEXT_INSN (last); insn = NEXT_INSN (insn))
4017 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
4018 && reg_mentioned_p (XEXP (note, 0), PATTERN (insn)))
4019 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL,
4026 /* These two notes will never appear until after reorg, so we don't
4027 have to handle them here. */
4033 /* Each new insn created, except the last, has a new set. If the destination
4034 is a register, then this reg is now live across several insns, whereas
4035 previously the dest reg was born and died within the same insn. To
4036 reflect this, we now need a REG_DEAD note on the insn where this
4039 Similarly, the new insns may have clobbers that need REG_UNUSED notes. */
4041 for (insn = first; insn != last; insn = NEXT_INSN (insn))
4046 pat = PATTERN (insn);
4047 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
4048 new_insn_dead_notes (pat, insn, last, orig_insn);
4049 else if (GET_CODE (pat) == PARALLEL)
4051 for (i = 0; i < XVECLEN (pat, 0); i++)
4052 if (GET_CODE (XVECEXP (pat, 0, i)) == SET
4053 || GET_CODE (XVECEXP (pat, 0, i)) == CLOBBER)
4054 new_insn_dead_notes (XVECEXP (pat, 0, i), insn, last, orig_insn);
4058 /* If any insn, except the last, uses the register set by the last insn,
4059 then we need a new REG_DEAD note on that insn. In this case, there
4060 would not have been a REG_DEAD note for this register in the original
4061 insn because it was used and set within one insn. */
4063 set = single_set (last);
4066 rtx dest = SET_DEST (set);
4068 while (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SUBREG
4069 || GET_CODE (dest) == STRICT_LOW_PART
4070 || GET_CODE (dest) == SIGN_EXTRACT)
4071 dest = XEXP (dest, 0);
4073 if (GET_CODE (dest) == REG
4074 /* Global registers are always live, so the code below does not
4076 && (REGNO (dest) >= FIRST_PSEUDO_REGISTER
4077 || ! global_regs[REGNO (dest)]))
4079 rtx stop_insn = PREV_INSN (first);
4081 /* If the last insn uses the register that it is setting, then
4082 we don't want to put a REG_DEAD note there. Search backwards
4083 to find the first insn that sets but does not use DEST. */
4086 if (reg_overlap_mentioned_p (dest, SET_SRC (set)))
4088 for (insn = PREV_INSN (insn); insn != first;
4089 insn = PREV_INSN (insn))
4091 if ((set = single_set (insn))
4092 && reg_mentioned_p (dest, SET_DEST (set))
4093 && ! reg_overlap_mentioned_p (dest, SET_SRC (set)))
4098 /* Now find the first insn that uses but does not set DEST. */
4100 for (insn = PREV_INSN (insn); insn != stop_insn;
4101 insn = PREV_INSN (insn))
4103 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
4104 && reg_mentioned_p (dest, PATTERN (insn))
4105 && (set = single_set (insn)))
4107 rtx insn_dest = SET_DEST (set);
4109 while (GET_CODE (insn_dest) == ZERO_EXTRACT
4110 || GET_CODE (insn_dest) == SUBREG
4111 || GET_CODE (insn_dest) == STRICT_LOW_PART
4112 || GET_CODE (insn_dest) == SIGN_EXTRACT)
4113 insn_dest = XEXP (insn_dest, 0);
4115 if (insn_dest != dest)
4117 note = rtx_alloc (EXPR_LIST);
4118 PUT_REG_NOTE_KIND (note, REG_DEAD);
4119 XEXP (note, 0) = dest;
4120 XEXP (note, 1) = REG_NOTES (insn);
4121 REG_NOTES (insn) = note;
4122 /* The reg only dies in one insn, the last one
4131 /* If the original dest is modifying a multiple register target, and the
4132 original instruction was split such that the original dest is now set
4133 by two or more SUBREG sets, then the split insns no longer kill the
4134 destination of the original insn.
4136 In this case, if there exists an instruction in the same basic block,
4137 before the split insn, which uses the original dest, and this use is
4138 killed by the original insn, then we must remove the REG_DEAD note on
4139 this insn, because it is now superfluous.
4141 This does not apply when a hard register gets split, because the code
4142 knows how to handle overlapping hard registers properly. */
4143 if (orig_dest && GET_CODE (orig_dest) == REG)
4145 int found_orig_dest = 0;
4146 int found_split_dest = 0;
4148 for (insn = first; ; insn = NEXT_INSN (insn))
4150 rtx pat = PATTERN (insn);
4151 int i = GET_CODE (pat) == PARALLEL ? XVECLEN (pat, 0) : 0;
4155 if (GET_CODE (set) == SET)
4157 if (GET_CODE (SET_DEST (set)) == REG
4158 && REGNO (SET_DEST (set)) == REGNO (orig_dest))
4160 found_orig_dest = 1;
4163 else if (GET_CODE (SET_DEST (set)) == SUBREG
4164 && SUBREG_REG (SET_DEST (set)) == orig_dest)
4166 found_split_dest = 1;
4172 set = XVECEXP (pat, 0, i);
4179 if (found_split_dest)
4181 /* Search backwards from FIRST, looking for the first insn that uses
4182 the original dest. Stop if we pass a CODE_LABEL or a JUMP_INSN.
4183 If we find an insn, and it has a REG_DEAD note, then delete the
4186 for (insn = first; insn; insn = PREV_INSN (insn))
4188 if (GET_CODE (insn) == CODE_LABEL
4189 || GET_CODE (insn) == JUMP_INSN)
4191 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
4192 && reg_mentioned_p (orig_dest, insn))
4194 note = find_regno_note (insn, REG_DEAD, REGNO (orig_dest));
4196 remove_note (insn, note);
4200 else if (! found_orig_dest)
4202 /* This should never happen. */
4207 /* Update reg_n_sets. This is necessary to prevent local alloc from
4208 converting REG_EQUAL notes to REG_EQUIV when splitting has modified
4209 a reg from set once to set multiple times. */
4212 rtx x = PATTERN (orig_insn);
4213 RTX_CODE code = GET_CODE (x);
4215 if (code == SET || code == CLOBBER)
4216 update_n_sets (x, -1);
4217 else if (code == PARALLEL)
4220 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
4222 code = GET_CODE (XVECEXP (x, 0, i));
4223 if (code == SET || code == CLOBBER)
4224 update_n_sets (XVECEXP (x, 0, i), -1);
4228 for (insn = first; ; insn = NEXT_INSN (insn))
4231 code = GET_CODE (x);
4233 if (code == SET || code == CLOBBER)
4234 update_n_sets (x, 1);
4235 else if (code == PARALLEL)
4238 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
4240 code = GET_CODE (XVECEXP (x, 0, i));
4241 if (code == SET || code == CLOBBER)
4242 update_n_sets (XVECEXP (x, 0, i), 1);
4252 /* The one entry point in this file. DUMP_FILE is the dump file for
4256 schedule_insns (dump_file)
4259 int max_uid = MAX_INSNS_PER_SPLIT * (get_max_uid () + 1);
4263 /* Taking care of this degenerate case makes the rest of
4264 this code simpler. */
4265 if (n_basic_blocks == 0)
4268 /* Create an insn here so that we can hang dependencies off of it later. */
4269 sched_before_next_call
4270 = gen_rtx_INSN (VOIDmode, 0, NULL_RTX, NULL_RTX,
4271 NULL_RTX, 0, NULL_RTX, NULL_RTX);
4273 /* Initialize the unused_*_lists. We can't use the ones left over from
4274 the previous function, because gcc has freed that memory. We can use
4275 the ones left over from the first sched pass in the second pass however,
4276 so only clear them on the first sched pass. The first pass is before
4277 reload if flag_schedule_insns is set, otherwise it is afterwards. */
4279 if (reload_completed == 0 || ! flag_schedule_insns)
4281 unused_insn_list = 0;
4282 unused_expr_list = 0;
4285 /* We create no insns here, only reorder them, so we
4286 remember how far we can cut back the stack on exit. */
4288 /* Allocate data for this pass. See comments, above,
4289 for what these vectors do. */
4290 insn_luid = (int *) alloca (max_uid * sizeof (int));
4291 insn_priority = (int *) alloca (max_uid * sizeof (int));
4292 insn_tick = (int *) alloca (max_uid * sizeof (int));
4293 insn_costs = (short *) alloca (max_uid * sizeof (short));
4294 insn_units = (short *) alloca (max_uid * sizeof (short));
4295 insn_blockage = (unsigned int *) alloca (max_uid * sizeof (unsigned int));
4296 insn_ref_count = (int *) alloca (max_uid * sizeof (int));
4298 if (reload_completed == 0)
4300 sched_reg_n_calls_crossed = (int *) alloca (max_regno * sizeof (int));
4301 sched_reg_live_length = (int *) alloca (max_regno * sizeof (int));
4302 bb_dead_regs = ALLOCA_REG_SET ();
4303 bb_live_regs = ALLOCA_REG_SET ();
4304 bzero ((char *) sched_reg_n_calls_crossed, max_regno * sizeof (int));
4305 bzero ((char *) sched_reg_live_length, max_regno * sizeof (int));
4309 sched_reg_n_calls_crossed = 0;
4310 sched_reg_live_length = 0;
4314 init_alias_analysis ();
4316 if (write_symbols != NO_DEBUG)
4320 line_note = (rtx *) alloca (max_uid * sizeof (rtx));
4321 bzero ((char *) line_note, max_uid * sizeof (rtx));
4322 line_note_head = (rtx *) alloca (n_basic_blocks * sizeof (rtx));
4323 bzero ((char *) line_note_head, n_basic_blocks * sizeof (rtx));
4325 /* Determine the line-number at the start of each basic block.
4326 This must be computed and saved now, because after a basic block's
4327 predecessor has been scheduled, it is impossible to accurately
4328 determine the correct line number for the first insn of the block. */
4330 for (b = 0; b < n_basic_blocks; b++)
4331 for (line = basic_block_head[b]; line; line = PREV_INSN (line))
4332 if (GET_CODE (line) == NOTE && NOTE_LINE_NUMBER (line) > 0)
4334 line_note_head[b] = line;
4339 bzero ((char *) insn_luid, max_uid * sizeof (int));
4340 bzero ((char *) insn_priority, max_uid * sizeof (int));
4341 bzero ((char *) insn_tick, max_uid * sizeof (int));
4342 bzero ((char *) insn_costs, max_uid * sizeof (short));
4343 bzero ((char *) insn_units, max_uid * sizeof (short));
4344 bzero ((char *) insn_blockage, max_uid * sizeof (unsigned int));
4345 bzero ((char *) insn_ref_count, max_uid * sizeof (int));
4347 /* Schedule each basic block, block by block. */
4349 /* ??? Add a NOTE after the last insn of the last basic block. It is not
4350 known why this is done. */
4351 /* ??? Perhaps it's done to ensure NEXT_TAIL in schedule_block is a
4354 insn = basic_block_end[n_basic_blocks-1];
4355 if (NEXT_INSN (insn) == 0
4356 || (GET_CODE (insn) != NOTE
4357 && GET_CODE (insn) != CODE_LABEL
4358 /* Don't emit a NOTE if it would end up between an unconditional
4359 jump and a BARRIER. */
4360 && ! (GET_CODE (insn) == JUMP_INSN
4361 && GET_CODE (NEXT_INSN (insn)) == BARRIER)))
4362 emit_note_after (NOTE_INSN_DELETED, basic_block_end[n_basic_blocks-1]);
4364 for (b = 0; b < n_basic_blocks; b++)
4370 for (insn = basic_block_head[b]; ; insn = next)
4375 /* Can't use `next_real_insn' because that
4376 might go across CODE_LABELS and short-out basic blocks. */
4377 next = NEXT_INSN (insn);
4378 if (GET_CODE (insn) != INSN)
4380 if (insn == basic_block_end[b])
4386 /* Don't split no-op move insns. These should silently disappear
4387 later in final. Splitting such insns would break the code
4388 that handles REG_NO_CONFLICT blocks. */
4389 set = single_set (insn);
4390 if (set && rtx_equal_p (SET_SRC (set), SET_DEST (set)))
4392 if (insn == basic_block_end[b])
4395 /* Nops get in the way while scheduling, so delete them now if
4396 register allocation has already been done. It is too risky
4397 to try to do this before register allocation, and there are
4398 unlikely to be very many nops then anyways. */
4399 if (reload_completed)
4401 PUT_CODE (insn, NOTE);
4402 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
4403 NOTE_SOURCE_FILE (insn) = 0;
4409 /* Split insns here to get max fine-grain parallelism. */
4410 prev = PREV_INSN (insn);
4411 /* It is probably not worthwhile to try to split again in the
4412 second pass. However, if flag_schedule_insns is not set,
4413 the first and only (if any) scheduling pass is after reload. */
4414 if (reload_completed == 0 || ! flag_schedule_insns)
4416 rtx last, first = PREV_INSN (insn);
4417 rtx notes = REG_NOTES (insn);
4419 last = try_split (PATTERN (insn), insn, 1);
4422 /* try_split returns the NOTE that INSN became. */
4423 first = NEXT_INSN (first);
4424 update_flow_info (notes, first, last, insn);
4426 PUT_CODE (insn, NOTE);
4427 NOTE_SOURCE_FILE (insn) = 0;
4428 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
4429 if (insn == basic_block_head[b])
4430 basic_block_head[b] = first;
4431 if (insn == basic_block_end[b])
4433 basic_block_end[b] = last;
4439 if (insn == basic_block_end[b])
4443 schedule_block (b, dump_file);
4450 /* Reposition the prologue and epilogue notes in case we moved the
4451 prologue/epilogue insns. */
4452 if (reload_completed)
4453 reposition_prologue_and_epilogue_notes (get_insns ());
4455 if (write_symbols != NO_DEBUG)
4458 rtx insn = get_insns ();
4459 int active_insn = 0;
4462 /* Walk the insns deleting redundant line-number notes. Many of these
4463 are already present. The remainder tend to occur at basic
4464 block boundaries. */
4465 for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
4466 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
4468 /* If there are no active insns following, INSN is redundant. */
4469 if (active_insn == 0)
4472 NOTE_SOURCE_FILE (insn) = 0;
4473 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
4475 /* If the line number is unchanged, LINE is redundant. */
4477 && NOTE_LINE_NUMBER (line) == NOTE_LINE_NUMBER (insn)
4478 && NOTE_SOURCE_FILE (line) == NOTE_SOURCE_FILE (insn))
4481 NOTE_SOURCE_FILE (line) = 0;
4482 NOTE_LINE_NUMBER (line) = NOTE_INSN_DELETED;
4489 else if (! ((GET_CODE (insn) == NOTE
4490 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED)
4491 || (GET_CODE (insn) == INSN
4492 && (GET_CODE (PATTERN (insn)) == USE
4493 || GET_CODE (PATTERN (insn)) == CLOBBER))))
4496 if (dump_file && notes)
4497 fprintf (dump_file, ";; deleted %d line-number notes\n", notes);
4500 if (reload_completed == 0)
4503 for (regno = 0; regno < max_regno; regno++)
4504 if (sched_reg_live_length[regno])
4508 if (REG_LIVE_LENGTH (regno) > sched_reg_live_length[regno])
4510 ";; register %d life shortened from %d to %d\n",
4511 regno, REG_LIVE_LENGTH (regno),
4512 sched_reg_live_length[regno]);
4513 /* Negative values are special; don't overwrite the current
4514 reg_live_length value if it is negative. */
4515 else if (REG_LIVE_LENGTH (regno) < sched_reg_live_length[regno]
4516 && REG_LIVE_LENGTH (regno) >= 0)
4518 ";; register %d life extended from %d to %d\n",
4519 regno, REG_LIVE_LENGTH (regno),
4520 sched_reg_live_length[regno]);
4522 if (! REG_N_CALLS_CROSSED (regno)
4523 && sched_reg_n_calls_crossed[regno])
4525 ";; register %d now crosses calls\n", regno);
4526 else if (REG_N_CALLS_CROSSED (regno)
4527 && ! sched_reg_n_calls_crossed[regno]
4528 && REG_BASIC_BLOCK (regno) != REG_BLOCK_GLOBAL)
4530 ";; register %d no longer crosses calls\n", regno);
4533 /* Negative values are special; don't overwrite the current
4534 reg_live_length value if it is negative. */
4535 if (REG_LIVE_LENGTH (regno) >= 0)
4536 REG_LIVE_LENGTH (regno) = sched_reg_live_length[regno];
4538 /* We can't change the value of reg_n_calls_crossed to zero for
4539 pseudos which are live in more than one block.
4541 This is because combine might have made an optimization which
4542 invalidated basic_block_live_at_start and reg_n_calls_crossed,
4543 but it does not update them. If we update reg_n_calls_crossed
4544 here, the two variables are now inconsistent, and this might
4545 confuse the caller-save code into saving a register that doesn't
4546 need to be saved. This is only a problem when we zero calls
4547 crossed for a pseudo live in multiple basic blocks.
4549 Alternatively, we could try to correctly update basic block live
4550 at start here in sched, but that seems complicated. */
4551 if (sched_reg_n_calls_crossed[regno]
4552 || REG_BASIC_BLOCK (regno) != REG_BLOCK_GLOBAL)
4553 REG_N_CALLS_CROSSED (regno) = sched_reg_n_calls_crossed[regno];
4557 if (reload_completed == 0)
4559 FREE_REG_SET (bb_dead_regs);
4560 FREE_REG_SET (bb_live_regs);
4564 #endif /* INSN_SCHEDULING */