1 /* Instruction scheduling pass. This file contains definitions used
2 internally in the scheduler.
3 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998,
4 1999, 2000, 2001, 2003, 2004 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
23 #ifndef GCC_SCHED_INT_H
24 #define GCC_SCHED_INT_H
27 #include "insn-attr.h"
28 /* For regset_head. */
29 #include "basic-block.h"
33 /* Pointer to data describing the current DFA state. */
34 extern state_t curr_state;
36 /* Forward declaration. */
39 /* Type to represent status of a dependence. A convinient short alias. */
40 typedef HOST_WIDE_INT ds_t;
42 /* Type to represent weakness of speculative dependence. */
45 /* Describe state of dependencies used during sched_analyze phase. */
48 /* The *_insns and *_mems are paired lists. Each pending memory operation
49 will have a pointer to the MEM rtx on one list and a pointer to the
50 containing insn on the other list in the same place in the list. */
52 /* We can't use add_dependence like the old code did, because a single insn
53 may have multiple memory accesses, and hence needs to be on the list
54 once for each memory access. Add_dependence won't let you add an insn
55 to a list more than once. */
57 /* An INSN_LIST containing all insns with pending read operations. */
58 rtx pending_read_insns;
60 /* An EXPR_LIST containing all MEM rtx's which are pending reads. */
61 rtx pending_read_mems;
63 /* An INSN_LIST containing all insns with pending write operations. */
64 rtx pending_write_insns;
66 /* An EXPR_LIST containing all MEM rtx's which are pending writes. */
67 rtx pending_write_mems;
69 /* Indicates the combined length of the two pending lists. We must prevent
70 these lists from ever growing too large since the number of dependencies
71 produced is at least O(N*N), and execution time is at least O(4*N*N), as
72 a function of the length of these pending lists. */
73 int pending_lists_length;
75 /* Length of the pending memory flush list. Large functions with no
76 calls may build up extremely large lists. */
77 int pending_flush_length;
79 /* The last insn upon which all memory references must depend.
80 This is an insn which flushed the pending lists, creating a dependency
81 between it and all previously pending memory references. This creates
82 a barrier (or a checkpoint) which no memory reference is allowed to cross.
84 This includes all non constant CALL_INSNs. When we do interprocedural
85 alias analysis, this restriction can be relaxed.
86 This may also be an INSN that writes memory if the pending lists grow
88 rtx last_pending_memory_flush;
90 /* A list of the last function calls we have seen. We use a list to
91 represent last function calls from multiple predecessor blocks.
92 Used to prevent register lifetimes from expanding unnecessarily. */
93 rtx last_function_call;
95 /* A list of insns which use a pseudo register that does not already
96 cross a call. We create dependencies between each of those insn
97 and the next call insn, to ensure that they won't cross a call after
98 scheduling is done. */
99 rtx sched_before_next_call;
101 /* Used to keep post-call pseudo/hard reg movements together with
103 enum { not_post_call, post_call, post_call_initial } in_post_call_group_p;
105 /* Set to the tail insn of the outermost libcall block.
107 When nonzero, we will mark each insn processed by sched_analyze_insn
108 with SCHED_GROUP_P to ensure libcalls are scheduled as a unit. */
109 rtx libcall_block_tail_insn;
111 /* The maximum register number for the following arrays. Before reload
112 this is max_reg_num; after reload it is FIRST_PSEUDO_REGISTER. */
115 /* Element N is the next insn that sets (hard or pseudo) register
116 N within the current basic block; or zero, if there is no
117 such insn. Needed for new registers which may be introduced
118 by splitting insns. */
128 /* Element N is set for each register that has any nonzero element
129 in reg_last[N].{uses,sets,clobbers}. */
130 regset_head reg_last_in_use;
132 /* Element N is set for each register that is conditionally set. */
133 regset_head reg_conditional_sets;
136 /* This structure holds some state of the current scheduling pass, and
137 contains some function pointers that abstract out some of the non-generic
138 functionality from functions such as schedule_block or schedule_insn.
139 There is one global variable, current_sched_info, which points to the
140 sched_info structure currently in use. */
143 /* Add all insns that are initially ready to the ready list. Called once
144 before scheduling a set of insns. */
145 void (*init_ready_list) (void);
146 /* Called after taking an insn from the ready list. Returns nonzero if
147 this insn can be scheduled, nonzero if we should silently discard it. */
148 int (*can_schedule_ready_p) (rtx);
149 /* Return nonzero if there are more insns that should be scheduled. */
150 int (*schedule_more_p) (void);
151 /* Called after an insn has all its dependencies resolved. Return nonzero
152 if it should be moved to the ready list or the queue, or zero if we
153 should silently discard it. */
154 int (*new_ready) (rtx);
155 /* Compare priority of two insns. Return a positive number if the second
156 insn is to be preferred for scheduling, and a negative one if the first
157 is to be preferred. Zero if they are equally good. */
158 int (*rank) (rtx, rtx);
159 /* Return a string that contains the insn uid and optionally anything else
160 necessary to identify this insn in an output. It's valid to use a
161 static buffer for this. The ALIGNED parameter should cause the string
162 to be formatted so that multiple output lines will line up nicely. */
163 const char *(*print_insn) (rtx, int);
164 /* Return nonzero if an insn should be included in priority
166 int (*contributes_to_priority) (rtx, rtx);
167 /* Called when computing dependencies for a JUMP_INSN. This function
168 should store the set of registers that must be considered as set by
169 the jump in the regset. */
170 void (*compute_jump_reg_dependencies) (rtx, regset, regset, regset);
172 /* The boundaries of the set of insns to be scheduled. */
173 rtx prev_head, next_tail;
175 /* Filled in after the schedule is finished; the first and last scheduled
179 /* If nonzero, enables an additional sanity check in schedule_block. */
180 unsigned int queue_must_finish_empty:1;
181 /* Nonzero if we should use cselib for better alias analysis. This
182 must be 0 if the dependency information is used after sched_analyze
183 has completed, e.g. if we're using it to initialize state for successor
184 blocks in region scheduling. */
185 unsigned int use_cselib:1;
187 /* Maximum priority that has been assigned to an insn. */
188 int sched_max_insns_priority;
190 /* ??? FIXME: should use straight bitfields inside sched_info instead of
195 extern struct sched_info *current_sched_info;
197 /* Indexed by INSN_UID, the collection of all data associated with
198 a single instruction. */
200 struct haifa_insn_data
202 /* A list of insns which depend on the instruction. Unlike LOG_LINKS,
203 it represents forward dependencies. */
206 /* A list of scheduled producers of the instruction. Links are being moved
207 from LOG_LINKS to RESOLVED_DEPS during scheduling. */
210 /* The line number note in effect for each insn. For line number
211 notes, this indicates whether the note may be reused. */
214 /* Logical uid gives the original ordering of the insns. */
217 /* A priority for each insn. */
220 /* The number of incoming edges in the forward dependency graph.
221 As scheduling proceeds, counts are decreased. An insn moves to
222 the ready queue when its counter reaches zero. */
225 /* Number of instructions referring to this insn. */
228 /* The minimum clock tick at which the insn becomes ready. This is
229 used to note timing constraints for the insns in the pending list. */
232 /* INTER_TICK is used to adjust INSN_TICKs of instructions from the
233 subsequent blocks in a region. */
236 /* See comment on QUEUE_INDEX macro in haifa-sched.c. */
241 /* This weight is an estimation of the insn's contribution to
242 register pressure. */
245 /* Some insns (e.g. call) are not allowed to move across blocks. */
246 unsigned int cant_move : 1;
248 /* Set if there's DEF-USE dependence between some speculatively
249 moved load insn and this one. */
250 unsigned int fed_by_spec_load : 1;
251 unsigned int is_load_insn : 1;
253 /* Nonzero if priority has been computed already. */
254 unsigned int priority_known : 1;
256 /* Nonzero if instruction has internal dependence
257 (e.g. add_dependence was invoked with (insn == elem)). */
258 unsigned int has_internal_dep : 1;
261 extern struct haifa_insn_data *h_i_d;
263 /* Accessor macros for h_i_d. There are more in haifa-sched.c and
265 #define INSN_DEPEND(INSN) (h_i_d[INSN_UID (INSN)].depend)
266 #define RESOLVED_DEPS(INSN) (h_i_d[INSN_UID (INSN)].resolved_deps)
267 #define INSN_LUID(INSN) (h_i_d[INSN_UID (INSN)].luid)
268 #define CANT_MOVE(insn) (h_i_d[INSN_UID (insn)].cant_move)
269 #define INSN_DEP_COUNT(INSN) (h_i_d[INSN_UID (INSN)].dep_count)
270 #define INSN_PRIORITY(INSN) (h_i_d[INSN_UID (INSN)].priority)
271 #define INSN_PRIORITY_KNOWN(INSN) (h_i_d[INSN_UID (INSN)].priority_known)
272 #define INSN_COST(INSN) (h_i_d[INSN_UID (INSN)].cost)
273 #define INSN_REG_WEIGHT(INSN) (h_i_d[INSN_UID (INSN)].reg_weight)
274 #define HAS_INTERNAL_DEP(INSN) (h_i_d[INSN_UID (INSN)].has_internal_dep)
276 /* DEP_STATUS of the link incapsulates information, that is needed for
277 speculative scheduling. Namely, it is 4 integers in the range
278 [0, MAX_DEP_WEAK] and 3 bits.
279 The integers correspond to the probability of the dependence to *not*
280 exist, it is the probability, that overcoming of this dependence will
281 not be followed by execution of the recovery code. Nevertheless,
282 whatever high the probability of success is, recovery code should still
283 be generated to preserve semantics of the program. To find a way to
284 get/set these integers, please refer to the {get, set}_dep_weak ()
285 functions in sched-deps.c .
286 The 3 bits in the DEP_STATUS correspond to 3 dependence types: true-,
287 output- and anti- dependence. It is not enough for speculative scheduling
288 to know just the major type of all the dependence between two instructions,
289 as only true dependence can be overcome.
290 There also is the 4-th bit in the DEP_STATUS (HARD_DEP), that is reserved
291 for using to describe instruction's status. It is set whenever instuction
292 has at least one dependence, that cannot be overcome.
293 See also: check_dep_status () in sched-deps.c . */
294 #define DEP_STATUS(LINK) XWINT (LINK, 2)
296 /* We exclude sign bit. */
297 #define BITS_PER_DEP_STATUS (HOST_BITS_PER_WIDE_INT - 1)
299 /* First '4' stands for 3 dep type bits and HARD_DEP bit.
300 Second '4' stands for BEGIN_{DATA, CONTROL}, BE_IN_{DATA, CONTROL}
302 #define BITS_PER_DEP_WEAK ((BITS_PER_DEP_STATUS - 4) / 4)
304 /* Mask of speculative weakness in dep_status. */
305 #define DEP_WEAK_MASK ((1 << BITS_PER_DEP_WEAK) - 1)
307 /* This constant means that dependence is fake with 99.999...% probability.
308 This is the maximum value, that can appear in dep_status.
309 Note, that we don't want MAX_DEP_WEAK to be the same as DEP_WEAK_MASK for
310 debugging reasons. Though, it can be set to DEP_WEAK_MASK, and, when
311 done so, we'll get fast (mul for)/(div by) NO_DEP_WEAK. */
312 #define MAX_DEP_WEAK (DEP_WEAK_MASK - 1)
314 /* This constant means that dependence is 99.999...% real and it is a really
315 bad idea to overcome it (though this can be done, preserving program
317 #define MIN_DEP_WEAK 1
319 /* This constant represents 100% probability.
320 E.g. it is used to represent weakness of dependence, that doesn't exist. */
321 #define NO_DEP_WEAK (MAX_DEP_WEAK + MIN_DEP_WEAK)
323 /* Default weakness of speculative dependence. Used when we can't say
324 neither bad nor good about the dependence. */
325 #define UNCERTAIN_DEP_WEAK (MAX_DEP_WEAK - MAX_DEP_WEAK / 4)
327 /* Offset for speculative weaknesses in dep_status. */
328 enum SPEC_TYPES_OFFSETS {
329 BEGIN_DATA_BITS_OFFSET = 0,
330 BE_IN_DATA_BITS_OFFSET = BEGIN_DATA_BITS_OFFSET + BITS_PER_DEP_WEAK,
331 BEGIN_CONTROL_BITS_OFFSET = BE_IN_DATA_BITS_OFFSET + BITS_PER_DEP_WEAK,
332 BE_IN_CONTROL_BITS_OFFSET = BEGIN_CONTROL_BITS_OFFSET + BITS_PER_DEP_WEAK
335 /* The following defines provide numerous constants used to distinguish between
336 different types of speculative dependencies. */
338 /* Dependence can be overcomed with generation of new data speculative
340 #define BEGIN_DATA (((ds_t) DEP_WEAK_MASK) << BEGIN_DATA_BITS_OFFSET)
342 /* This dependence is to the instruction in the recovery block, that was
343 formed to recover after data-speculation failure.
344 Thus, this dependence can overcomed with generating of the copy of
345 this instruction in the recovery block. */
346 #define BE_IN_DATA (((ds_t) DEP_WEAK_MASK) << BE_IN_DATA_BITS_OFFSET)
348 /* Dependence can be overcomed with generation of new control speculative
350 #define BEGIN_CONTROL (((ds_t) DEP_WEAK_MASK) << BEGIN_CONTROL_BITS_OFFSET)
352 /* This dependence is to the instruction in the recovery block, that was
353 formed to recover after control-speculation failure.
354 Thus, this dependence can overcomed with generating of the copy of
355 this instruction in the recovery block. */
356 #define BE_IN_CONTROL (((ds_t) DEP_WEAK_MASK) << BE_IN_CONTROL_BITS_OFFSET)
358 /* Few convinient combinations. */
359 #define BEGIN_SPEC (BEGIN_DATA | BEGIN_CONTROL)
360 #define DATA_SPEC (BEGIN_DATA | BE_IN_DATA)
361 #define CONTROL_SPEC (BEGIN_CONTROL | BE_IN_CONTROL)
362 #define SPECULATIVE (DATA_SPEC | CONTROL_SPEC)
363 #define BE_IN_SPEC (BE_IN_DATA | BE_IN_CONTROL)
365 /* Constants, that are helpful in iterating through dep_status. */
366 #define FIRST_SPEC_TYPE BEGIN_DATA
367 #define LAST_SPEC_TYPE BE_IN_CONTROL
368 #define SPEC_TYPE_SHIFT BITS_PER_DEP_WEAK
370 /* Dependence on instruction can be of multiple types
371 (e.g. true and output). This fields enhance REG_NOTE_KIND information
372 of the dependence. */
373 #define DEP_TRUE (((ds_t) 1) << (BE_IN_CONTROL_BITS_OFFSET + BITS_PER_DEP_WEAK))
374 #define DEP_OUTPUT (DEP_TRUE << 1)
375 #define DEP_ANTI (DEP_OUTPUT << 1)
377 #define DEP_TYPES (DEP_TRUE | DEP_OUTPUT | DEP_ANTI)
379 /* Instruction has non-speculative dependence. This bit represents the
380 property of an instruction - not the one of a dependence.
381 Therefore, it can appear only in TODO_SPEC field of an instruction. */
382 #define HARD_DEP (DEP_ANTI << 1)
384 /* This represents the results of calling sched-deps.c functions,
385 which modify dependencies. Possible choices are: a dependence
386 is already present and nothing has been changed; a dependence type
387 has been changed; brand new dependence has been created. */
388 enum DEPS_ADJUST_RESULT {
394 /* Represents the bits that can be set in the flags field of the
395 sched_info structure. */
397 /* If set, generate links between instruction as DEPS_LIST.
398 Otherwise, generate usual INSN_LIST links. */
400 /* Perform data or control (or both) speculation.
401 Results in generation of data and control speculative dependencies.
402 Requires USE_DEPS_LIST set. */
403 DO_SPECULATION = USE_DEPS_LIST << 1
406 extern FILE *sched_dump;
407 extern int sched_verbose;
409 /* Exception Free Loads:
411 We define five classes of speculative loads: IFREE, IRISKY,
412 PFREE, PRISKY, and MFREE.
414 IFREE loads are loads that are proved to be exception-free, just
415 by examining the load insn. Examples for such loads are loads
416 from TOC and loads of global data.
418 IRISKY loads are loads that are proved to be exception-risky,
419 just by examining the load insn. Examples for such loads are
420 volatile loads and loads from shared memory.
422 PFREE loads are loads for which we can prove, by examining other
423 insns, that they are exception-free. Currently, this class consists
424 of loads for which we are able to find a "similar load", either in
425 the target block, or, if only one split-block exists, in that split
426 block. Load2 is similar to load1 if both have same single base
427 register. We identify only part of the similar loads, by finding
428 an insn upon which both load1 and load2 have a DEF-USE dependence.
430 PRISKY loads are loads for which we can prove, by examining other
431 insns, that they are exception-risky. Currently we have two proofs for
432 such loads. The first proof detects loads that are probably guarded by a
433 test on the memory address. This proof is based on the
434 backward and forward data dependence information for the region.
435 Let load-insn be the examined load.
436 Load-insn is PRISKY iff ALL the following hold:
438 - insn1 is not in the same block as load-insn
439 - there is a DEF-USE dependence chain (insn1, ..., load-insn)
440 - test-insn is either a compare or a branch, not in the same block
442 - load-insn is reachable from test-insn
443 - there is a DEF-USE dependence chain (insn1, ..., test-insn)
445 This proof might fail when the compare and the load are fed
446 by an insn not in the region. To solve this, we will add to this
447 group all loads that have no input DEF-USE dependence.
449 The second proof detects loads that are directly or indirectly
450 fed by a speculative load. This proof is affected by the
451 scheduling process. We will use the flag fed_by_spec_load.
452 Initially, all insns have this flag reset. After a speculative
453 motion of an insn, if insn is either a load, or marked as
454 fed_by_spec_load, we will also mark as fed_by_spec_load every
455 insn1 for which a DEF-USE dependence (insn, insn1) exists. A
456 load which is fed_by_spec_load is also PRISKY.
458 MFREE (maybe-free) loads are all the remaining loads. They may be
459 exception-free, but we cannot prove it.
461 Now, all loads in IFREE and PFREE classes are considered
462 exception-free, while all loads in IRISKY and PRISKY classes are
463 considered exception-risky. As for loads in the MFREE class,
464 these are considered either exception-free or exception-risky,
465 depending on whether we are pessimistic or optimistic. We have
466 to take the pessimistic approach to assure the safety of
467 speculative scheduling, but we can take the optimistic approach
468 by invoking the -fsched_spec_load_dangerous option. */
472 TRAP_FREE = 0, IFREE = 1, PFREE_CANDIDATE = 2,
473 PRISKY_CANDIDATE = 3, IRISKY = 4, TRAP_RISKY = 5
476 #define WORST_CLASS(class1, class2) \
477 ((class1 > class2) ? class1 : class2)
484 #define HAIFA_INLINE __inline
487 /* Functions in sched-vis.c. */
488 extern void print_insn (char *, rtx, int);
490 /* Functions in sched-deps.c. */
491 extern bool sched_insns_conditions_mutex_p (rtx, rtx);
492 extern void add_dependence (rtx, rtx, enum reg_note);
493 extern void sched_analyze (struct deps *, rtx, rtx);
494 extern void init_deps (struct deps *);
495 extern void free_deps (struct deps *);
496 extern void init_deps_global (void);
497 extern void finish_deps_global (void);
498 extern void add_forw_dep (rtx, rtx);
499 extern void compute_forward_dependences (rtx, rtx);
500 extern rtx find_insn_list (rtx, rtx);
501 extern void init_dependency_caches (int);
502 extern void free_dependency_caches (void);
503 extern enum DEPS_ADJUST_RESULT add_or_update_back_dep (rtx, rtx,
504 enum reg_note, ds_t);
505 extern void add_or_update_back_forw_dep (rtx, rtx, enum reg_note, ds_t);
506 extern void add_back_forw_dep (rtx, rtx, enum reg_note, ds_t);
507 extern void delete_back_forw_dep (rtx, rtx);
508 extern ds_t set_dep_weak (ds_t, ds_t, dw_t);
510 /* Functions in haifa-sched.c. */
511 extern int haifa_classify_insn (rtx);
512 extern void get_block_head_tail (int, rtx *, rtx *);
513 extern int no_real_insns_p (rtx, rtx);
515 extern void rm_line_notes (rtx, rtx);
516 extern void save_line_notes (int, rtx, rtx);
517 extern void restore_line_notes (rtx, rtx);
518 extern void rm_redundant_line_notes (void);
519 extern void rm_other_notes (rtx, rtx);
521 extern int insn_cost (rtx, rtx, rtx);
522 extern int set_priorities (rtx, rtx);
524 extern void schedule_block (int, int);
525 extern void sched_init (void);
526 extern void sched_finish (void);
528 extern int try_ready (rtx);
530 #endif /* GCC_SCHED_INT_H */