1 /* Instruction scheduling pass. This file computes dependencies between
3 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998,
4 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 Contributed by Michael Tiemann (tiemann@cygnus.com) Enhanced by,
6 and currently maintained by, Jim Wilson (wilson@cygnus.com)
8 This file is part of GCC.
10 GCC is free software; you can redistribute it and/or modify it under
11 the terms of the GNU General Public License as published by the Free
12 Software Foundation; either version 2, or (at your option) any later
15 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
16 WARRANTY; without even the implied warranty of MERCHANTABILITY or
17 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
20 You should have received a copy of the GNU General Public License
21 along with GCC; see the file COPYING. If not, write to the Free
22 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
27 #include "coretypes.h"
32 #include "hard-reg-set.h"
33 #include "basic-block.h"
37 #include "insn-config.h"
38 #include "insn-attr.h"
42 #include "sched-int.h"
46 extern char *reg_known_equiv_p;
47 extern rtx *reg_known_value;
49 static regset_head reg_pending_sets_head;
50 static regset_head reg_pending_clobbers_head;
51 static regset_head reg_pending_uses_head;
53 static regset reg_pending_sets;
54 static regset reg_pending_clobbers;
55 static regset reg_pending_uses;
56 static bool reg_pending_barrier;
58 /* To speed up the test for duplicate dependency links we keep a
59 record of dependencies created by add_dependence when the average
60 number of instructions in a basic block is very large.
62 Studies have shown that there is typically around 5 instructions between
63 branches for typical C code. So we can make a guess that the average
64 basic block is approximately 5 instructions long; we will choose 100X
65 the average size as a very large basic block.
67 Each insn has associated bitmaps for its dependencies. Each bitmap
68 has enough entries to represent a dependency on any other insn in
69 the insn chain. All bitmap for true dependencies cache is
70 allocated then the rest two ones are also allocated. */
71 static sbitmap *true_dependency_cache;
72 static sbitmap *anti_dependency_cache;
73 static sbitmap *output_dependency_cache;
75 /* To speed up checking consistency of formed forward insn
76 dependencies we use the following cache. Another possible solution
77 could be switching off checking duplication of insns in forward
79 #ifdef ENABLE_CHECKING
80 static sbitmap *forward_dependency_cache;
83 static int deps_may_trap_p PARAMS ((rtx));
84 static void add_dependence_list PARAMS ((rtx, rtx, enum reg_note));
85 static void add_dependence_list_and_free PARAMS ((rtx, rtx *, enum reg_note));
86 static void set_sched_group_p PARAMS ((rtx));
88 static void flush_pending_lists PARAMS ((struct deps *, rtx, int, int));
89 static void sched_analyze_1 PARAMS ((struct deps *, rtx, rtx));
90 static void sched_analyze_2 PARAMS ((struct deps *, rtx, rtx));
91 static void sched_analyze_insn PARAMS ((struct deps *, rtx, rtx, rtx));
93 static rtx get_condition PARAMS ((rtx));
94 static int conditions_mutex_p PARAMS ((rtx, rtx));
96 /* Return nonzero if a load of the memory reference MEM can cause a trap. */
102 rtx addr = XEXP (mem, 0);
105 && REGNO (addr) >= FIRST_PSEUDO_REGISTER
106 && reg_known_value[REGNO (addr)])
107 addr = reg_known_value[REGNO (addr)];
108 return rtx_addr_can_trap_p (addr);
111 /* Return the INSN_LIST containing INSN in LIST, or NULL
112 if LIST does not contain INSN. */
115 find_insn_list (insn, list)
121 if (XEXP (list, 0) == insn)
123 list = XEXP (list, 1);
128 /* Find the condition under which INSN is executed. */
134 rtx pat = PATTERN (insn);
139 if (GET_CODE (pat) == COND_EXEC)
140 return COND_EXEC_TEST (pat);
141 if (GET_CODE (insn) != JUMP_INSN)
143 if (GET_CODE (pat) != SET || SET_SRC (pat) != pc_rtx)
145 if (GET_CODE (SET_DEST (pat)) != IF_THEN_ELSE)
147 pat = SET_DEST (pat);
148 cond = XEXP (pat, 0);
149 if (GET_CODE (XEXP (cond, 1)) == LABEL_REF
150 && XEXP (cond, 2) == pc_rtx)
152 else if (GET_CODE (XEXP (cond, 2)) == LABEL_REF
153 && XEXP (cond, 1) == pc_rtx)
154 return gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond)), GET_MODE (cond),
155 XEXP (cond, 0), XEXP (cond, 1));
160 /* Return nonzero if conditions COND1 and COND2 can never be both true. */
163 conditions_mutex_p (cond1, cond2)
166 if (GET_RTX_CLASS (GET_CODE (cond1)) == '<'
167 && GET_RTX_CLASS (GET_CODE (cond2)) == '<'
168 && GET_CODE (cond1) == reverse_condition (GET_CODE (cond2))
169 && XEXP (cond1, 0) == XEXP (cond2, 0)
170 && XEXP (cond1, 1) == XEXP (cond2, 1))
175 /* Add ELEM wrapped in an INSN_LIST with reg note kind DEP_TYPE to the
176 LOG_LINKS of INSN, if not already there. DEP_TYPE indicates the
177 type of dependence that this link represents. The function returns
178 nonzero if a new entry has been added to insn's LOG_LINK. */
181 add_dependence (insn, elem, dep_type)
184 enum reg_note dep_type;
190 /* Don't depend an insn on itself. */
194 /* We can get a dependency on deleted insns due to optimizations in
195 the register allocation and reloading or due to splitting. Any
196 such dependency is useless and can be ignored. */
197 if (GET_CODE (elem) == NOTE)
200 /* flow.c doesn't handle conditional lifetimes entirely correctly;
201 calls mess up the conditional lifetimes. */
202 /* ??? add_dependence is the wrong place to be eliding dependencies,
203 as that forgets that the condition expressions themselves may
205 if (GET_CODE (insn) != CALL_INSN && GET_CODE (elem) != CALL_INSN)
207 cond1 = get_condition (insn);
208 cond2 = get_condition (elem);
210 && conditions_mutex_p (cond1, cond2)
211 /* Make sure first instruction doesn't affect condition of second
212 instruction if switched. */
213 && !modified_in_p (cond1, elem)
214 /* Make sure second instruction doesn't affect condition of first
215 instruction if switched. */
216 && !modified_in_p (cond2, insn))
221 #ifdef INSN_SCHEDULING
222 /* ??? No good way to tell from here whether we're doing interblock
223 scheduling. Possibly add another callback. */
225 /* (This code is guarded by INSN_SCHEDULING, otherwise INSN_BB is undefined.)
226 No need for interblock dependences with calls, since
227 calls are not moved between blocks. Note: the edge where
228 elem is a CALL is still required. */
229 if (GET_CODE (insn) == CALL_INSN
230 && (INSN_BB (elem) != INSN_BB (insn)))
234 /* If we already have a dependency for ELEM, then we do not need to
235 do anything. Avoiding the list walk below can cut compile times
236 dramatically for some code. */
237 if (true_dependency_cache != NULL)
239 enum reg_note present_dep_type = 0;
241 if (anti_dependency_cache == NULL || output_dependency_cache == NULL)
243 if (TEST_BIT (true_dependency_cache[INSN_LUID (insn)], INSN_LUID (elem)))
244 /* Do nothing (present_set_type is already 0). */
246 else if (TEST_BIT (anti_dependency_cache[INSN_LUID (insn)],
248 present_dep_type = REG_DEP_ANTI;
249 else if (TEST_BIT (output_dependency_cache[INSN_LUID (insn)],
251 present_dep_type = REG_DEP_OUTPUT;
254 if (present_p && (int) dep_type >= (int) present_dep_type)
259 /* Check that we don't already have this dependence. */
261 for (link = LOG_LINKS (insn); link; link = XEXP (link, 1))
262 if (XEXP (link, 0) == elem)
264 #ifdef INSN_SCHEDULING
265 /* Clear corresponding cache entry because type of the link
267 if (true_dependency_cache != NULL)
269 if (REG_NOTE_KIND (link) == REG_DEP_ANTI)
270 RESET_BIT (anti_dependency_cache[INSN_LUID (insn)],
272 else if (REG_NOTE_KIND (link) == REG_DEP_OUTPUT
273 && output_dependency_cache)
274 RESET_BIT (output_dependency_cache[INSN_LUID (insn)],
281 /* If this is a more restrictive type of dependence than the existing
282 one, then change the existing dependence to this type. */
283 if ((int) dep_type < (int) REG_NOTE_KIND (link))
284 PUT_REG_NOTE_KIND (link, dep_type);
286 #ifdef INSN_SCHEDULING
287 /* If we are adding a dependency to INSN's LOG_LINKs, then
288 note that in the bitmap caches of dependency information. */
289 if (true_dependency_cache != NULL)
291 if ((int) REG_NOTE_KIND (link) == 0)
292 SET_BIT (true_dependency_cache[INSN_LUID (insn)],
294 else if (REG_NOTE_KIND (link) == REG_DEP_ANTI)
295 SET_BIT (anti_dependency_cache[INSN_LUID (insn)],
297 else if (REG_NOTE_KIND (link) == REG_DEP_OUTPUT)
298 SET_BIT (output_dependency_cache[INSN_LUID (insn)],
304 /* Might want to check one level of transitivity to save conses. */
306 link = alloc_INSN_LIST (elem, LOG_LINKS (insn));
307 LOG_LINKS (insn) = link;
309 /* Insn dependency, not data dependency. */
310 PUT_REG_NOTE_KIND (link, dep_type);
312 #ifdef INSN_SCHEDULING
313 /* If we are adding a dependency to INSN's LOG_LINKs, then note that
314 in the bitmap caches of dependency information. */
315 if (true_dependency_cache != NULL)
317 if ((int) dep_type == 0)
318 SET_BIT (true_dependency_cache[INSN_LUID (insn)], INSN_LUID (elem));
319 else if (dep_type == REG_DEP_ANTI)
320 SET_BIT (anti_dependency_cache[INSN_LUID (insn)], INSN_LUID (elem));
321 else if (dep_type == REG_DEP_OUTPUT)
322 SET_BIT (output_dependency_cache[INSN_LUID (insn)], INSN_LUID (elem));
328 /* A convenience wrapper to operate on an entire list. */
331 add_dependence_list (insn, list, dep_type)
333 enum reg_note dep_type;
335 for (; list; list = XEXP (list, 1))
336 add_dependence (insn, XEXP (list, 0), dep_type);
339 /* Similar, but free *LISTP at the same time. */
342 add_dependence_list_and_free (insn, listp, dep_type)
345 enum reg_note dep_type;
348 for (list = *listp, *listp = NULL; list ; list = next)
350 next = XEXP (list, 1);
351 add_dependence (insn, XEXP (list, 0), dep_type);
352 free_INSN_LIST_node (list);
356 /* Set SCHED_GROUP_P and care for the rest of the bookkeeping that
357 goes along with that. */
360 set_sched_group_p (insn)
365 SCHED_GROUP_P (insn) = 1;
367 prev = prev_nonnote_insn (insn);
368 add_dependence (insn, prev, REG_DEP_ANTI);
371 /* Process an insn's memory dependencies. There are four kinds of
374 (0) read dependence: read follows read
375 (1) true dependence: read follows write
376 (2) anti dependence: write follows read
377 (3) output dependence: write follows write
379 We are careful to build only dependencies which actually exist, and
380 use transitivity to avoid building too many links. */
382 /* Add an INSN and MEM reference pair to a pending INSN_LIST and MEM_LIST.
383 The MEM is a memory reference contained within INSN, which we are saving
384 so that we can do memory aliasing on it. */
387 add_insn_mem_dependence (deps, insn_list, mem_list, insn, mem)
389 rtx *insn_list, *mem_list, insn, mem;
393 link = alloc_INSN_LIST (insn, *insn_list);
396 if (current_sched_info->use_cselib)
398 mem = shallow_copy_rtx (mem);
399 XEXP (mem, 0) = cselib_subst_to_values (XEXP (mem, 0));
401 link = alloc_EXPR_LIST (VOIDmode, mem, *mem_list);
404 deps->pending_lists_length++;
407 /* Make a dependency between every memory reference on the pending lists
408 and INSN, thus flushing the pending lists. FOR_READ is true if emitting
409 dependencies for a read operation, similarly with FOR_WRITE. */
412 flush_pending_lists (deps, insn, for_read, for_write)
415 int for_read, for_write;
419 add_dependence_list_and_free (insn, &deps->pending_read_insns,
421 free_EXPR_LIST_list (&deps->pending_read_mems);
424 add_dependence_list_and_free (insn, &deps->pending_write_insns,
425 for_read ? REG_DEP_ANTI : REG_DEP_OUTPUT);
426 free_EXPR_LIST_list (&deps->pending_write_mems);
427 deps->pending_lists_length = 0;
429 add_dependence_list_and_free (insn, &deps->last_pending_memory_flush,
430 for_read ? REG_DEP_ANTI : REG_DEP_OUTPUT);
431 deps->last_pending_memory_flush = alloc_INSN_LIST (insn, NULL_RTX);
432 deps->pending_flush_length = 1;
435 /* Analyze a single SET, CLOBBER, PRE_DEC, POST_DEC, PRE_INC or POST_INC
436 rtx, X, creating all dependencies generated by the write to the
437 destination of X, and reads of everything mentioned. */
440 sched_analyze_1 (deps, x, insn)
446 rtx dest = XEXP (x, 0);
447 enum rtx_code code = GET_CODE (x);
452 if (GET_CODE (dest) == PARALLEL)
456 for (i = XVECLEN (dest, 0) - 1; i >= 0; i--)
457 if (XEXP (XVECEXP (dest, 0, i), 0) != 0)
458 sched_analyze_1 (deps,
459 gen_rtx_CLOBBER (VOIDmode,
460 XEXP (XVECEXP (dest, 0, i), 0)),
463 if (GET_CODE (x) == SET)
464 sched_analyze_2 (deps, SET_SRC (x), insn);
468 while (GET_CODE (dest) == STRICT_LOW_PART || GET_CODE (dest) == SUBREG
469 || GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
471 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
473 /* The second and third arguments are values read by this insn. */
474 sched_analyze_2 (deps, XEXP (dest, 1), insn);
475 sched_analyze_2 (deps, XEXP (dest, 2), insn);
477 dest = XEXP (dest, 0);
480 if (GET_CODE (dest) == REG)
482 regno = REGNO (dest);
484 /* A hard reg in a wide mode may really be multiple registers.
485 If so, mark all of them just like the first. */
486 if (regno < FIRST_PSEUDO_REGISTER)
488 int i = HARD_REGNO_NREGS (regno, GET_MODE (dest));
492 SET_REGNO_REG_SET (reg_pending_sets, regno + i);
497 SET_REGNO_REG_SET (reg_pending_clobbers, regno + i);
500 /* ??? Reload sometimes emits USEs and CLOBBERs of pseudos that
501 it does not reload. Ignore these as they have served their
503 else if (regno >= deps->max_reg)
505 if (GET_CODE (PATTERN (insn)) != USE
506 && GET_CODE (PATTERN (insn)) != CLOBBER)
512 SET_REGNO_REG_SET (reg_pending_sets, regno);
514 SET_REGNO_REG_SET (reg_pending_clobbers, regno);
516 /* Pseudos that are REG_EQUIV to something may be replaced
517 by that during reloading. We need only add dependencies for
518 the address in the REG_EQUIV note. */
519 if (!reload_completed
520 && reg_known_equiv_p[regno]
521 && GET_CODE (reg_known_value[regno]) == MEM)
522 sched_analyze_2 (deps, XEXP (reg_known_value[regno], 0), insn);
524 /* Don't let it cross a call after scheduling if it doesn't
525 already cross one. */
526 if (REG_N_CALLS_CROSSED (regno) == 0)
527 add_dependence_list (insn, deps->last_function_call, REG_DEP_ANTI);
530 else if (GET_CODE (dest) == MEM)
532 /* Writing memory. */
535 if (current_sched_info->use_cselib)
537 t = shallow_copy_rtx (dest);
538 cselib_lookup (XEXP (t, 0), Pmode, 1);
539 XEXP (t, 0) = cselib_subst_to_values (XEXP (t, 0));
542 if (deps->pending_lists_length > MAX_PENDING_LIST_LENGTH)
544 /* Flush all pending reads and writes to prevent the pending lists
545 from getting any larger. Insn scheduling runs too slowly when
546 these lists get long. When compiling GCC with itself,
547 this flush occurs 8 times for sparc, and 10 times for m88k using
548 the default value of 32. */
549 flush_pending_lists (deps, insn, false, true);
553 rtx pending, pending_mem;
555 pending = deps->pending_read_insns;
556 pending_mem = deps->pending_read_mems;
559 if (anti_dependence (XEXP (pending_mem, 0), t))
560 add_dependence (insn, XEXP (pending, 0), REG_DEP_ANTI);
562 pending = XEXP (pending, 1);
563 pending_mem = XEXP (pending_mem, 1);
566 pending = deps->pending_write_insns;
567 pending_mem = deps->pending_write_mems;
570 if (output_dependence (XEXP (pending_mem, 0), t))
571 add_dependence (insn, XEXP (pending, 0), REG_DEP_OUTPUT);
573 pending = XEXP (pending, 1);
574 pending_mem = XEXP (pending_mem, 1);
577 add_dependence_list (insn, deps->last_pending_memory_flush,
580 add_insn_mem_dependence (deps, &deps->pending_write_insns,
581 &deps->pending_write_mems, insn, dest);
583 sched_analyze_2 (deps, XEXP (dest, 0), insn);
587 if (GET_CODE (x) == SET)
588 sched_analyze_2 (deps, SET_SRC (x), insn);
591 /* Analyze the uses of memory and registers in rtx X in INSN. */
594 sched_analyze_2 (deps, x, insn)
617 /* Ignore constants. Note that we must handle CONST_DOUBLE here
618 because it may have a cc0_rtx in its CONST_DOUBLE_CHAIN field, but
619 this does not mean that this insn is using cc0. */
624 /* User of CC0 depends on immediately preceding insn. */
625 set_sched_group_p (insn);
631 int regno = REGNO (x);
632 if (regno < FIRST_PSEUDO_REGISTER)
634 int i = HARD_REGNO_NREGS (regno, GET_MODE (x));
636 SET_REGNO_REG_SET (reg_pending_uses, regno + i);
638 /* ??? Reload sometimes emits USEs and CLOBBERs of pseudos that
639 it does not reload. Ignore these as they have served their
641 else if (regno >= deps->max_reg)
643 if (GET_CODE (PATTERN (insn)) != USE
644 && GET_CODE (PATTERN (insn)) != CLOBBER)
649 SET_REGNO_REG_SET (reg_pending_uses, regno);
651 /* Pseudos that are REG_EQUIV to something may be replaced
652 by that during reloading. We need only add dependencies for
653 the address in the REG_EQUIV note. */
654 if (!reload_completed
655 && reg_known_equiv_p[regno]
656 && GET_CODE (reg_known_value[regno]) == MEM)
657 sched_analyze_2 (deps, XEXP (reg_known_value[regno], 0), insn);
659 /* If the register does not already cross any calls, then add this
660 insn to the sched_before_next_call list so that it will still
661 not cross calls after scheduling. */
662 if (REG_N_CALLS_CROSSED (regno) == 0)
663 deps->sched_before_next_call
664 = alloc_INSN_LIST (insn, deps->sched_before_next_call);
671 /* Reading memory. */
673 rtx pending, pending_mem;
676 if (current_sched_info->use_cselib)
678 t = shallow_copy_rtx (t);
679 cselib_lookup (XEXP (t, 0), Pmode, 1);
680 XEXP (t, 0) = cselib_subst_to_values (XEXP (t, 0));
682 pending = deps->pending_read_insns;
683 pending_mem = deps->pending_read_mems;
686 if (read_dependence (XEXP (pending_mem, 0), t))
687 add_dependence (insn, XEXP (pending, 0), REG_DEP_ANTI);
689 pending = XEXP (pending, 1);
690 pending_mem = XEXP (pending_mem, 1);
693 pending = deps->pending_write_insns;
694 pending_mem = deps->pending_write_mems;
697 if (true_dependence (XEXP (pending_mem, 0), VOIDmode,
699 add_dependence (insn, XEXP (pending, 0), 0);
701 pending = XEXP (pending, 1);
702 pending_mem = XEXP (pending_mem, 1);
705 for (u = deps->last_pending_memory_flush; u; u = XEXP (u, 1))
706 if (GET_CODE (XEXP (u, 0)) != JUMP_INSN
707 || deps_may_trap_p (x))
708 add_dependence (insn, XEXP (u, 0), REG_DEP_ANTI);
710 /* Always add these dependencies to pending_reads, since
711 this insn may be followed by a write. */
712 add_insn_mem_dependence (deps, &deps->pending_read_insns,
713 &deps->pending_read_mems, insn, x);
715 /* Take advantage of tail recursion here. */
716 sched_analyze_2 (deps, XEXP (x, 0), insn);
720 /* Force pending stores to memory in case a trap handler needs them. */
722 flush_pending_lists (deps, insn, true, false);
727 case UNSPEC_VOLATILE:
729 /* Traditional and volatile asm instructions must be considered to use
730 and clobber all hard registers, all pseudo-registers and all of
731 memory. So must TRAP_IF and UNSPEC_VOLATILE operations.
733 Consider for instance a volatile asm that changes the fpu rounding
734 mode. An insn should not be moved across this even if it only uses
735 pseudo-regs because it might give an incorrectly rounded result. */
736 if (code != ASM_OPERANDS || MEM_VOLATILE_P (x))
737 reg_pending_barrier = true;
739 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
740 We can not just fall through here since then we would be confused
741 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
742 traditional asms unlike their normal usage. */
744 if (code == ASM_OPERANDS)
746 for (j = 0; j < ASM_OPERANDS_INPUT_LENGTH (x); j++)
747 sched_analyze_2 (deps, ASM_OPERANDS_INPUT (x, j), insn);
757 /* These both read and modify the result. We must handle them as writes
758 to get proper dependencies for following instructions. We must handle
759 them as reads to get proper dependencies from this to previous
760 instructions. Thus we need to pass them to both sched_analyze_1
761 and sched_analyze_2. We must call sched_analyze_2 first in order
762 to get the proper antecedent for the read. */
763 sched_analyze_2 (deps, XEXP (x, 0), insn);
764 sched_analyze_1 (deps, x, insn);
769 /* op0 = op0 + op1 */
770 sched_analyze_2 (deps, XEXP (x, 0), insn);
771 sched_analyze_2 (deps, XEXP (x, 1), insn);
772 sched_analyze_1 (deps, x, insn);
779 /* Other cases: walk the insn. */
780 fmt = GET_RTX_FORMAT (code);
781 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
784 sched_analyze_2 (deps, XEXP (x, i), insn);
785 else if (fmt[i] == 'E')
786 for (j = 0; j < XVECLEN (x, i); j++)
787 sched_analyze_2 (deps, XVECEXP (x, i, j), insn);
791 /* Analyze an INSN with pattern X to find all dependencies. */
794 sched_analyze_insn (deps, x, insn, loop_notes)
799 RTX_CODE code = GET_CODE (x);
803 if (code == COND_EXEC)
805 sched_analyze_2 (deps, COND_EXEC_TEST (x), insn);
807 /* ??? Should be recording conditions so we reduce the number of
808 false dependencies. */
809 x = COND_EXEC_CODE (x);
812 if (code == SET || code == CLOBBER)
814 sched_analyze_1 (deps, x, insn);
816 /* Bare clobber insns are used for letting life analysis, reg-stack
817 and others know that a value is dead. Depend on the last call
818 instruction so that reg-stack won't get confused. */
820 add_dependence_list (insn, deps->last_function_call, REG_DEP_OUTPUT);
822 else if (code == PARALLEL)
825 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
827 rtx sub = XVECEXP (x, 0, i);
828 code = GET_CODE (sub);
830 if (code == COND_EXEC)
832 sched_analyze_2 (deps, COND_EXEC_TEST (sub), insn);
833 sub = COND_EXEC_CODE (sub);
834 code = GET_CODE (sub);
836 if (code == SET || code == CLOBBER)
837 sched_analyze_1 (deps, sub, insn);
839 sched_analyze_2 (deps, sub, insn);
843 sched_analyze_2 (deps, x, insn);
845 /* Mark registers CLOBBERED or used by called function. */
846 if (GET_CODE (insn) == CALL_INSN)
848 for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1))
850 if (GET_CODE (XEXP (link, 0)) == CLOBBER)
851 sched_analyze_1 (deps, XEXP (link, 0), insn);
853 sched_analyze_2 (deps, XEXP (link, 0), insn);
855 if (find_reg_note (insn, REG_SETJMP, NULL))
856 reg_pending_barrier = true;
859 if (GET_CODE (insn) == JUMP_INSN)
862 next = next_nonnote_insn (insn);
863 if (next && GET_CODE (next) == BARRIER)
864 reg_pending_barrier = true;
867 rtx pending, pending_mem;
871 (*current_sched_info->compute_jump_reg_dependencies) (insn, &tmp);
872 /* Make latency of jump equal to 0 by using anti-dependence. */
873 EXECUTE_IF_SET_IN_REG_SET (&tmp, 0, i,
875 struct deps_reg *reg_last = &deps->reg_last[i];
876 add_dependence_list (insn, reg_last->sets, REG_DEP_ANTI);
877 add_dependence_list (insn, reg_last->clobbers, REG_DEP_ANTI);
878 reg_last->uses_length++;
879 reg_last->uses = alloc_INSN_LIST (insn, reg_last->uses);
881 CLEAR_REG_SET (&tmp);
883 /* All memory writes and volatile reads must happen before the
884 jump. Non-volatile reads must happen before the jump iff
885 the result is needed by the above register used mask. */
887 pending = deps->pending_write_insns;
888 pending_mem = deps->pending_write_mems;
891 add_dependence (insn, XEXP (pending, 0), REG_DEP_OUTPUT);
892 pending = XEXP (pending, 1);
893 pending_mem = XEXP (pending_mem, 1);
896 pending = deps->pending_read_insns;
897 pending_mem = deps->pending_read_mems;
900 if (MEM_VOLATILE_P (XEXP (pending_mem, 0)))
901 add_dependence (insn, XEXP (pending, 0), REG_DEP_OUTPUT);
902 pending = XEXP (pending, 1);
903 pending_mem = XEXP (pending_mem, 1);
906 add_dependence_list (insn, deps->last_pending_memory_flush,
911 /* If there is a {LOOP,EHREGION}_{BEG,END} note in the middle of a basic
912 block, then we must be sure that no instructions are scheduled across it.
913 Otherwise, the reg_n_refs info (which depends on loop_depth) would
919 /* Update loop_notes with any notes from this insn. Also determine
920 if any of the notes on the list correspond to instruction scheduling
921 barriers (loop, eh & setjmp notes, but not range notes). */
923 while (XEXP (link, 1))
925 if (INTVAL (XEXP (link, 0)) == NOTE_INSN_LOOP_BEG
926 || INTVAL (XEXP (link, 0)) == NOTE_INSN_LOOP_END
927 || INTVAL (XEXP (link, 0)) == NOTE_INSN_EH_REGION_BEG
928 || INTVAL (XEXP (link, 0)) == NOTE_INSN_EH_REGION_END)
929 reg_pending_barrier = true;
931 link = XEXP (link, 1);
933 XEXP (link, 1) = REG_NOTES (insn);
934 REG_NOTES (insn) = loop_notes;
937 /* If this instruction can throw an exception, then moving it changes
938 where block boundaries fall. This is mighty confusing elsewhere.
939 Therefore, prevent such an instruction from being moved. */
940 if (can_throw_internal (insn))
941 reg_pending_barrier = true;
943 /* Add dependencies if a scheduling barrier was found. */
944 if (reg_pending_barrier)
946 /* In the case of barrier the most added dependencies are not
947 real, so we use anti-dependence here. */
948 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
950 EXECUTE_IF_SET_IN_REG_SET (&deps->reg_last_in_use, 0, i,
952 struct deps_reg *reg_last = &deps->reg_last[i];
953 add_dependence_list (insn, reg_last->uses, REG_DEP_ANTI);
954 add_dependence_list (insn, reg_last->sets, REG_DEP_ANTI);
955 add_dependence_list (insn, reg_last->clobbers, REG_DEP_ANTI);
960 EXECUTE_IF_SET_IN_REG_SET (&deps->reg_last_in_use, 0, i,
962 struct deps_reg *reg_last = &deps->reg_last[i];
963 add_dependence_list_and_free (insn, ®_last->uses,
965 add_dependence_list_and_free (insn, ®_last->sets,
967 add_dependence_list_and_free (insn, ®_last->clobbers,
969 reg_last->uses_length = 0;
970 reg_last->clobbers_length = 0;
974 for (i = 0; i < deps->max_reg; i++)
976 struct deps_reg *reg_last = &deps->reg_last[i];
977 reg_last->sets = alloc_INSN_LIST (insn, reg_last->sets);
978 SET_REGNO_REG_SET (&deps->reg_last_in_use, i);
981 flush_pending_lists (deps, insn, true, true);
982 reg_pending_barrier = false;
986 /* If the current insn is conditional, we can't free any
988 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
990 EXECUTE_IF_SET_IN_REG_SET (reg_pending_uses, 0, i,
992 struct deps_reg *reg_last = &deps->reg_last[i];
993 add_dependence_list (insn, reg_last->sets, 0);
994 add_dependence_list (insn, reg_last->clobbers, 0);
995 reg_last->uses = alloc_INSN_LIST (insn, reg_last->uses);
996 reg_last->uses_length++;
998 EXECUTE_IF_SET_IN_REG_SET (reg_pending_clobbers, 0, i,
1000 struct deps_reg *reg_last = &deps->reg_last[i];
1001 add_dependence_list (insn, reg_last->sets, REG_DEP_OUTPUT);
1002 add_dependence_list (insn, reg_last->uses, REG_DEP_ANTI);
1003 reg_last->clobbers = alloc_INSN_LIST (insn, reg_last->clobbers);
1004 reg_last->clobbers_length++;
1006 EXECUTE_IF_SET_IN_REG_SET (reg_pending_sets, 0, i,
1008 struct deps_reg *reg_last = &deps->reg_last[i];
1009 add_dependence_list (insn, reg_last->sets, REG_DEP_OUTPUT);
1010 add_dependence_list (insn, reg_last->clobbers, REG_DEP_OUTPUT);
1011 add_dependence_list (insn, reg_last->uses, REG_DEP_ANTI);
1012 reg_last->sets = alloc_INSN_LIST (insn, reg_last->sets);
1017 EXECUTE_IF_SET_IN_REG_SET (reg_pending_uses, 0, i,
1019 struct deps_reg *reg_last = &deps->reg_last[i];
1020 add_dependence_list (insn, reg_last->sets, 0);
1021 add_dependence_list (insn, reg_last->clobbers, 0);
1022 reg_last->uses_length++;
1023 reg_last->uses = alloc_INSN_LIST (insn, reg_last->uses);
1025 EXECUTE_IF_SET_IN_REG_SET (reg_pending_clobbers, 0, i,
1027 struct deps_reg *reg_last = &deps->reg_last[i];
1028 if (reg_last->uses_length > MAX_PENDING_LIST_LENGTH
1029 || reg_last->clobbers_length > MAX_PENDING_LIST_LENGTH)
1031 add_dependence_list_and_free (insn, ®_last->sets,
1033 add_dependence_list_and_free (insn, ®_last->uses,
1035 add_dependence_list_and_free (insn, ®_last->clobbers,
1037 reg_last->sets = alloc_INSN_LIST (insn, reg_last->sets);
1038 reg_last->clobbers_length = 0;
1039 reg_last->uses_length = 0;
1043 add_dependence_list (insn, reg_last->sets, REG_DEP_OUTPUT);
1044 add_dependence_list (insn, reg_last->uses, REG_DEP_ANTI);
1046 reg_last->clobbers_length++;
1047 reg_last->clobbers = alloc_INSN_LIST (insn, reg_last->clobbers);
1049 EXECUTE_IF_SET_IN_REG_SET (reg_pending_sets, 0, i,
1051 struct deps_reg *reg_last = &deps->reg_last[i];
1052 add_dependence_list_and_free (insn, ®_last->sets,
1054 add_dependence_list_and_free (insn, ®_last->clobbers,
1056 add_dependence_list_and_free (insn, ®_last->uses,
1058 reg_last->sets = alloc_INSN_LIST (insn, reg_last->sets);
1059 reg_last->uses_length = 0;
1060 reg_last->clobbers_length = 0;
1064 IOR_REG_SET (&deps->reg_last_in_use, reg_pending_uses);
1065 IOR_REG_SET (&deps->reg_last_in_use, reg_pending_clobbers);
1066 IOR_REG_SET (&deps->reg_last_in_use, reg_pending_sets);
1068 CLEAR_REG_SET (reg_pending_uses);
1069 CLEAR_REG_SET (reg_pending_clobbers);
1070 CLEAR_REG_SET (reg_pending_sets);
1072 /* If we are currently in a libcall scheduling group, then mark the
1073 current insn as being in a scheduling group and that it can not
1074 be moved into a different basic block. */
1076 if (deps->libcall_block_tail_insn)
1078 set_sched_group_p (insn);
1079 CANT_MOVE (insn) = 1;
1082 /* If a post-call group is still open, see if it should remain so.
1083 This insn must be a simple move of a hard reg to a pseudo or
1086 We must avoid moving these insns for correctness on
1087 SMALL_REGISTER_CLASS machines, and for special registers like
1088 PIC_OFFSET_TABLE_REGNUM. For simplicity, extend this to all
1089 hard regs for all targets. */
1091 if (deps->in_post_call_group_p)
1093 rtx tmp, set = single_set (insn);
1094 int src_regno, dest_regno;
1097 goto end_call_group;
1099 tmp = SET_DEST (set);
1100 if (GET_CODE (tmp) == SUBREG)
1101 tmp = SUBREG_REG (tmp);
1102 if (GET_CODE (tmp) == REG)
1103 dest_regno = REGNO (tmp);
1105 goto end_call_group;
1107 tmp = SET_SRC (set);
1108 if (GET_CODE (tmp) == SUBREG)
1109 tmp = SUBREG_REG (tmp);
1110 if (GET_CODE (tmp) == REG)
1111 src_regno = REGNO (tmp);
1113 goto end_call_group;
1115 if (src_regno < FIRST_PSEUDO_REGISTER
1116 || dest_regno < FIRST_PSEUDO_REGISTER)
1118 set_sched_group_p (insn);
1119 CANT_MOVE (insn) = 1;
1124 deps->in_post_call_group_p = false;
1129 /* Analyze every insn between HEAD and TAIL inclusive, creating LOG_LINKS
1130 for every dependency. */
1133 sched_analyze (deps, head, tail)
1140 if (current_sched_info->use_cselib)
1143 for (insn = head;; insn = NEXT_INSN (insn))
1145 rtx link, end_seq, r0, set;
1147 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
1149 /* Clear out the stale LOG_LINKS from flow. */
1150 free_INSN_LIST_list (&LOG_LINKS (insn));
1152 /* Make each JUMP_INSN a scheduling barrier for memory
1154 if (GET_CODE (insn) == JUMP_INSN)
1156 /* Keep the list a reasonable size. */
1157 if (deps->pending_flush_length++ > MAX_PENDING_LIST_LENGTH)
1158 flush_pending_lists (deps, insn, true, true);
1160 deps->last_pending_memory_flush
1161 = alloc_INSN_LIST (insn, deps->last_pending_memory_flush);
1163 sched_analyze_insn (deps, PATTERN (insn), insn, loop_notes);
1166 else if (GET_CODE (insn) == CALL_INSN)
1170 CANT_MOVE (insn) = 1;
1172 /* Clear out the stale LOG_LINKS from flow. */
1173 free_INSN_LIST_list (&LOG_LINKS (insn));
1175 if (find_reg_note (insn, REG_SETJMP, NULL))
1177 /* This is setjmp. Assume that all registers, not just
1178 hard registers, may be clobbered by this call. */
1179 reg_pending_barrier = true;
1183 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1184 /* A call may read and modify global register variables. */
1187 SET_REGNO_REG_SET (reg_pending_sets, i);
1188 SET_REGNO_REG_SET (reg_pending_uses, i);
1190 /* Other call-clobbered hard regs may be clobbered.
1191 Since we only have a choice between 'might be clobbered'
1192 and 'definitely not clobbered', we must include all
1193 partly call-clobbered registers here. */
1194 else if (HARD_REGNO_CALL_PART_CLOBBERED (i, reg_raw_mode[i])
1195 || TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1196 SET_REGNO_REG_SET (reg_pending_clobbers, i);
1197 /* We don't know what set of fixed registers might be used
1198 by the function, but it is certain that the stack pointer
1199 is among them, but be conservative. */
1200 else if (fixed_regs[i])
1201 SET_REGNO_REG_SET (reg_pending_uses, i);
1202 /* The frame pointer is normally not used by the function
1203 itself, but by the debugger. */
1204 /* ??? MIPS o32 is an exception. It uses the frame pointer
1205 in the macro expansion of jal but does not represent this
1206 fact in the call_insn rtl. */
1207 else if (i == FRAME_POINTER_REGNUM
1208 || (i == HARD_FRAME_POINTER_REGNUM
1209 && (! reload_completed || frame_pointer_needed)))
1210 SET_REGNO_REG_SET (reg_pending_uses, i);
1213 /* For each insn which shouldn't cross a call, add a dependence
1214 between that insn and this call insn. */
1215 add_dependence_list_and_free (insn, &deps->sched_before_next_call,
1218 sched_analyze_insn (deps, PATTERN (insn), insn, loop_notes);
1221 /* In the absence of interprocedural alias analysis, we must flush
1222 all pending reads and writes, and start new dependencies starting
1223 from here. But only flush writes for constant calls (which may
1224 be passed a pointer to something we haven't written yet). */
1225 flush_pending_lists (deps, insn, true, !CONST_OR_PURE_CALL_P (insn));
1227 /* Remember the last function call for limiting lifetimes. */
1228 free_INSN_LIST_list (&deps->last_function_call);
1229 deps->last_function_call = alloc_INSN_LIST (insn, NULL_RTX);
1231 /* Before reload, begin a post-call group, so as to keep the
1232 lifetimes of hard registers correct. */
1233 if (! reload_completed)
1234 deps->in_post_call_group_p = true;
1237 /* See comments on reemit_notes as to why we do this.
1238 ??? Actually, the reemit_notes just say what is done, not why. */
1240 if (GET_CODE (insn) == NOTE
1241 && (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
1242 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END
1243 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_BEG
1244 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_END))
1248 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_BEG
1249 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_END)
1250 rtx_region = GEN_INT (NOTE_EH_HANDLER (insn));
1252 rtx_region = GEN_INT (0);
1254 loop_notes = alloc_EXPR_LIST (REG_SAVE_NOTE,
1257 loop_notes = alloc_EXPR_LIST (REG_SAVE_NOTE,
1258 GEN_INT (NOTE_LINE_NUMBER (insn)),
1260 CONST_OR_PURE_CALL_P (loop_notes) = CONST_OR_PURE_CALL_P (insn);
1263 if (current_sched_info->use_cselib)
1264 cselib_process_insn (insn);
1266 /* Now that we have completed handling INSN, check and see if it is
1267 a CLOBBER beginning a libcall block. If it is, record the
1268 end of the libcall sequence.
1270 We want to schedule libcall blocks as a unit before reload. While
1271 this restricts scheduling, it preserves the meaning of a libcall
1274 As a side effect, we may get better code due to decreased register
1275 pressure as well as less chance of a foreign insn appearing in
1277 if (!reload_completed
1278 /* Note we may have nested libcall sequences. We only care about
1279 the outermost libcall sequence. */
1280 && deps->libcall_block_tail_insn == 0
1281 /* The sequence must start with a clobber of a register. */
1282 && GET_CODE (insn) == INSN
1283 && GET_CODE (PATTERN (insn)) == CLOBBER
1284 && (r0 = XEXP (PATTERN (insn), 0), GET_CODE (r0) == REG)
1285 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG
1286 /* The CLOBBER must also have a REG_LIBCALL note attached. */
1287 && (link = find_reg_note (insn, REG_LIBCALL, NULL_RTX)) != 0
1288 && (end_seq = XEXP (link, 0)) != 0
1289 /* The insn referenced by the REG_LIBCALL note must be a
1290 simple nop copy with the same destination as the register
1291 mentioned in the clobber. */
1292 && (set = single_set (end_seq)) != 0
1293 && SET_DEST (set) == r0 && SET_SRC (set) == r0
1294 /* And finally the insn referenced by the REG_LIBCALL must
1295 also contain a REG_EQUAL note and a REG_RETVAL note. */
1296 && find_reg_note (end_seq, REG_EQUAL, NULL_RTX) != 0
1297 && find_reg_note (end_seq, REG_RETVAL, NULL_RTX) != 0)
1298 deps->libcall_block_tail_insn = XEXP (link, 0);
1300 /* If we have reached the end of a libcall block, then close the
1302 if (deps->libcall_block_tail_insn == insn)
1303 deps->libcall_block_tail_insn = 0;
1307 if (current_sched_info->use_cselib)
1316 /* The following function adds forward dependence (FROM, TO) with
1317 given DEP_TYPE. The forward dependence should be not exist before. */
1320 add_forward_dependence (from, to, dep_type)
1323 enum reg_note dep_type;
1327 #ifdef ENABLE_CHECKING
1328 /* If add_dependence is working properly there should never
1329 be notes, deleted insns or duplicates in the backward
1330 links. Thus we need not check for them here.
1332 However, if we have enabled checking we might as well go
1333 ahead and verify that add_dependence worked properly. */
1334 if (GET_CODE (from) == NOTE
1335 || INSN_DELETED_P (from)
1336 || (forward_dependency_cache != NULL
1337 && TEST_BIT (forward_dependency_cache[INSN_LUID (from)],
1339 || (forward_dependency_cache == NULL
1340 && find_insn_list (to, INSN_DEPEND (from))))
1342 if (forward_dependency_cache != NULL)
1343 SET_BIT (forward_dependency_cache[INSN_LUID (from)],
1347 new_link = alloc_INSN_LIST (to, INSN_DEPEND (from));
1349 PUT_REG_NOTE_KIND (new_link, dep_type);
1351 INSN_DEPEND (from) = new_link;
1352 INSN_DEP_COUNT (to) += 1;
1355 /* Examine insns in the range [ HEAD, TAIL ] and Use the backward
1356 dependences from LOG_LINKS to build forward dependences in
1360 compute_forward_dependences (head, tail)
1366 next_tail = NEXT_INSN (tail);
1367 for (insn = head; insn != next_tail; insn = NEXT_INSN (insn))
1369 if (! INSN_P (insn))
1372 for (link = LOG_LINKS (insn); link; link = XEXP (link, 1))
1373 add_forward_dependence (XEXP (link, 0), insn, REG_NOTE_KIND (link));
1377 /* Initialize variables for region data dependence analysis.
1378 n_bbs is the number of region blocks. */
1384 int max_reg = (reload_completed ? FIRST_PSEUDO_REGISTER : max_reg_num ());
1386 deps->max_reg = max_reg;
1387 deps->reg_last = (struct deps_reg *)
1388 xcalloc (max_reg, sizeof (struct deps_reg));
1389 INIT_REG_SET (&deps->reg_last_in_use);
1391 deps->pending_read_insns = 0;
1392 deps->pending_read_mems = 0;
1393 deps->pending_write_insns = 0;
1394 deps->pending_write_mems = 0;
1395 deps->pending_lists_length = 0;
1396 deps->pending_flush_length = 0;
1397 deps->last_pending_memory_flush = 0;
1398 deps->last_function_call = 0;
1399 deps->sched_before_next_call = 0;
1400 deps->in_post_call_group_p = false;
1401 deps->libcall_block_tail_insn = 0;
1404 /* Free insn lists found in DEPS. */
1412 free_INSN_LIST_list (&deps->pending_read_insns);
1413 free_EXPR_LIST_list (&deps->pending_read_mems);
1414 free_INSN_LIST_list (&deps->pending_write_insns);
1415 free_EXPR_LIST_list (&deps->pending_write_mems);
1416 free_INSN_LIST_list (&deps->last_pending_memory_flush);
1418 /* Without the EXECUTE_IF_SET, this loop is executed max_reg * nr_regions
1419 times. For a test case with 42000 regs and 8000 small basic blocks,
1420 this loop accounted for nearly 60% (84 sec) of the total -O2 runtime. */
1421 EXECUTE_IF_SET_IN_REG_SET (&deps->reg_last_in_use, 0, i,
1423 struct deps_reg *reg_last = &deps->reg_last[i];
1425 free_INSN_LIST_list (®_last->uses);
1427 free_INSN_LIST_list (®_last->sets);
1428 if (reg_last->clobbers)
1429 free_INSN_LIST_list (®_last->clobbers);
1431 CLEAR_REG_SET (&deps->reg_last_in_use);
1433 free (deps->reg_last);
1436 /* If it is profitable to use them, initialize caches for tracking
1437 dependency information. LUID is the number of insns to be scheduled,
1438 it is used in the estimate of profitability. */
1441 init_dependency_caches (luid)
1444 /* ?!? We could save some memory by computing a per-region luid mapping
1445 which could reduce both the number of vectors in the cache and the size
1446 of each vector. Instead we just avoid the cache entirely unless the
1447 average number of instructions in a basic block is very high. See
1448 the comment before the declaration of true_dependency_cache for
1449 what we consider "very high". */
1450 if (luid / n_basic_blocks > 100 * 5)
1452 true_dependency_cache = sbitmap_vector_alloc (luid, luid);
1453 sbitmap_vector_zero (true_dependency_cache, luid);
1454 anti_dependency_cache = sbitmap_vector_alloc (luid, luid);
1455 sbitmap_vector_zero (anti_dependency_cache, luid);
1456 output_dependency_cache = sbitmap_vector_alloc (luid, luid);
1457 sbitmap_vector_zero (output_dependency_cache, luid);
1458 #ifdef ENABLE_CHECKING
1459 forward_dependency_cache = sbitmap_vector_alloc (luid, luid);
1460 sbitmap_vector_zero (forward_dependency_cache, luid);
1465 /* Free the caches allocated in init_dependency_caches. */
1468 free_dependency_caches ()
1470 if (true_dependency_cache)
1472 sbitmap_vector_free (true_dependency_cache);
1473 true_dependency_cache = NULL;
1474 sbitmap_vector_free (anti_dependency_cache);
1475 anti_dependency_cache = NULL;
1476 sbitmap_vector_free (output_dependency_cache);
1477 output_dependency_cache = NULL;
1478 #ifdef ENABLE_CHECKING
1479 sbitmap_vector_free (forward_dependency_cache);
1480 forward_dependency_cache = NULL;
1485 /* Initialize some global variables needed by the dependency analysis
1491 reg_pending_sets = INITIALIZE_REG_SET (reg_pending_sets_head);
1492 reg_pending_clobbers = INITIALIZE_REG_SET (reg_pending_clobbers_head);
1493 reg_pending_uses = INITIALIZE_REG_SET (reg_pending_uses_head);
1494 reg_pending_barrier = false;
1497 /* Free everything used by the dependency analysis code. */
1500 finish_deps_global ()
1502 FREE_REG_SET (reg_pending_sets);
1503 FREE_REG_SET (reg_pending_clobbers);
1504 FREE_REG_SET (reg_pending_uses);