1 /* Definitions for computing resource usage of specific insns.
2 Copyright (C) 1999, 2000 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
26 #include "hard-reg-set.h"
27 #include "basic-block.h"
33 #include "insn-attr.h"
35 /* This structure is used to record liveness information at the targets or
36 fallthrough insns of branches. We will most likely need the information
37 at targets again, so save them in a hash table rather than recomputing them
42 int uid; /* INSN_UID of target. */
43 struct target_info *next; /* Next info for same hash bucket. */
44 HARD_REG_SET live_regs; /* Registers live at target. */
45 int block; /* Basic block number containing target. */
46 int bb_tick; /* Generation count of basic block info. */
49 #define TARGET_HASH_PRIME 257
51 /* Indicates what resources are required at the beginning of the epilogue. */
52 static struct resources start_of_epilogue_needs;
54 /* Indicates what resources are required at function end. */
55 static struct resources end_of_function_needs;
57 /* Define the hash table itself. */
58 static struct target_info **target_hash_table = NULL;
60 /* For each basic block, we maintain a generation number of its basic
61 block info, which is updated each time we move an insn from the
62 target of a jump. This is the generation number indexed by block
67 /* Marks registers possibly live at the current place being scanned by
68 mark_target_live_regs. Used only by next two function. */
70 static HARD_REG_SET current_live_regs;
72 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
73 Also only used by the next two functions. */
75 static HARD_REG_SET pending_dead_regs;
77 static void update_live_status PARAMS ((rtx, rtx, void *));
78 static int find_basic_block PARAMS ((rtx));
79 static rtx next_insn_no_annul PARAMS ((rtx));
80 static rtx find_dead_or_set_registers PARAMS ((rtx, struct resources*,
81 rtx*, int, struct resources,
84 /* Utility function called from mark_target_live_regs via note_stores.
85 It deadens any CLOBBERed registers and livens any SET registers. */
88 update_live_status (dest, x, data)
91 void *data ATTRIBUTE_UNUSED;
93 int first_regno, last_regno;
96 if (GET_CODE (dest) != REG
97 && (GET_CODE (dest) != SUBREG || GET_CODE (SUBREG_REG (dest)) != REG))
100 if (GET_CODE (dest) == SUBREG)
101 first_regno = REGNO (SUBREG_REG (dest)) + SUBREG_WORD (dest);
103 first_regno = REGNO (dest);
105 last_regno = first_regno + HARD_REGNO_NREGS (first_regno, GET_MODE (dest));
107 if (GET_CODE (x) == CLOBBER)
108 for (i = first_regno; i < last_regno; i++)
109 CLEAR_HARD_REG_BIT (current_live_regs, i);
111 for (i = first_regno; i < last_regno; i++)
113 SET_HARD_REG_BIT (current_live_regs, i);
114 CLEAR_HARD_REG_BIT (pending_dead_regs, i);
117 /* Find the number of the basic block that starts closest to INSN. Return -1
118 if we couldn't find such a basic block. */
121 find_basic_block (insn)
126 /* Scan backwards to the previous BARRIER. Then see if we can find a
127 label that starts a basic block. Return the basic block number. */
129 for (insn = prev_nonnote_insn (insn);
130 insn && GET_CODE (insn) != BARRIER;
131 insn = prev_nonnote_insn (insn))
134 /* The start of the function is basic block zero. */
138 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach
139 anything other than a CODE_LABEL or note, we can't find this code. */
140 for (insn = next_nonnote_insn (insn);
141 insn && GET_CODE (insn) == CODE_LABEL;
142 insn = next_nonnote_insn (insn))
144 for (i = 0; i < n_basic_blocks; i++)
145 if (insn == BLOCK_HEAD (i))
152 /* Similar to next_insn, but ignores insns in the delay slots of
153 an annulled branch. */
156 next_insn_no_annul (insn)
161 /* If INSN is an annulled branch, skip any insns from the target
163 if (INSN_ANNULLED_BRANCH_P (insn)
164 && NEXT_INSN (PREV_INSN (insn)) != insn)
165 while (INSN_FROM_TARGET_P (NEXT_INSN (insn)))
166 insn = NEXT_INSN (insn);
168 insn = NEXT_INSN (insn);
169 if (insn && GET_CODE (insn) == INSN
170 && GET_CODE (PATTERN (insn)) == SEQUENCE)
171 insn = XVECEXP (PATTERN (insn), 0, 0);
177 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
178 which resources are references by the insn. If INCLUDE_DELAYED_EFFECTS
179 is TRUE, resources used by the called routine will be included for
183 mark_referenced_resources (x, res, include_delayed_effects)
185 register struct resources *res;
186 register int include_delayed_effects;
188 enum rtx_code code = GET_CODE (x);
191 register const char *format_ptr;
193 /* Handle leaf items for which we set resource flags. Also, special-case
194 CALL, SET and CLOBBER operators. */
206 if (GET_CODE (SUBREG_REG (x)) != REG)
207 mark_referenced_resources (SUBREG_REG (x), res, 0);
210 unsigned int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
211 unsigned int last_regno
212 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
214 for (r = regno; r < last_regno; r++)
215 SET_HARD_REG_BIT (res->regs, r);
220 for (r = 0; r < HARD_REGNO_NREGS (REGNO (x), GET_MODE (x)); r++)
221 SET_HARD_REG_BIT (res->regs, REGNO (x) + r);
225 /* If this memory shouldn't change, it really isn't referencing
227 if (RTX_UNCHANGING_P (x))
228 res->unch_memory = 1;
231 res->volatil |= MEM_VOLATILE_P (x);
233 /* Mark registers used to access memory. */
234 mark_referenced_resources (XEXP (x, 0), res, 0);
241 case UNSPEC_VOLATILE:
243 /* Traditional asm's are always volatile. */
252 res->volatil |= MEM_VOLATILE_P (x);
254 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
255 We can not just fall through here since then we would be confused
256 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
257 traditional asms unlike their normal usage. */
259 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
260 mark_referenced_resources (ASM_OPERANDS_INPUT (x, i), res, 0);
264 /* The first operand will be a (MEM (xxx)) but doesn't really reference
265 memory. The second operand may be referenced, though. */
266 mark_referenced_resources (XEXP (XEXP (x, 0), 0), res, 0);
267 mark_referenced_resources (XEXP (x, 1), res, 0);
271 /* Usually, the first operand of SET is set, not referenced. But
272 registers used to access memory are referenced. SET_DEST is
273 also referenced if it is a ZERO_EXTRACT or SIGN_EXTRACT. */
275 mark_referenced_resources (SET_SRC (x), res, 0);
278 if (GET_CODE (x) == SIGN_EXTRACT
279 || GET_CODE (x) == ZERO_EXTRACT
280 || GET_CODE (x) == STRICT_LOW_PART)
281 mark_referenced_resources (x, res, 0);
282 else if (GET_CODE (x) == SUBREG)
284 if (GET_CODE (x) == MEM)
285 mark_referenced_resources (XEXP (x, 0), res, 0);
292 if (include_delayed_effects)
294 /* A CALL references memory, the frame pointer if it exists, the
295 stack pointer, any global registers and any registers given in
296 USE insns immediately in front of the CALL.
298 However, we may have moved some of the parameter loading insns
299 into the delay slot of this CALL. If so, the USE's for them
300 don't count and should be skipped. */
301 rtx insn = PREV_INSN (x);
304 rtx next = NEXT_INSN (x);
307 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
308 if (NEXT_INSN (insn) != x)
310 next = NEXT_INSN (NEXT_INSN (insn));
311 sequence = PATTERN (NEXT_INSN (insn));
312 seq_size = XVECLEN (sequence, 0);
313 if (GET_CODE (sequence) != SEQUENCE)
318 SET_HARD_REG_BIT (res->regs, STACK_POINTER_REGNUM);
319 if (frame_pointer_needed)
321 SET_HARD_REG_BIT (res->regs, FRAME_POINTER_REGNUM);
322 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
323 SET_HARD_REG_BIT (res->regs, HARD_FRAME_POINTER_REGNUM);
327 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
329 SET_HARD_REG_BIT (res->regs, i);
331 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
332 assume that this call can need any register.
334 This is done to be more conservative about how we handle setjmp.
335 We assume that they both use and set all registers. Using all
336 registers ensures that a register will not be considered dead
337 just because it crosses a setjmp call. A register should be
338 considered dead only if the setjmp call returns non-zero. */
339 if (next && GET_CODE (next) == NOTE
340 && NOTE_LINE_NUMBER (next) == NOTE_INSN_SETJMP)
341 SET_HARD_REG_SET (res->regs);
346 for (link = CALL_INSN_FUNCTION_USAGE (x);
348 link = XEXP (link, 1))
349 if (GET_CODE (XEXP (link, 0)) == USE)
351 for (i = 1; i < seq_size; i++)
353 rtx slot_pat = PATTERN (XVECEXP (sequence, 0, i));
354 if (GET_CODE (slot_pat) == SET
355 && rtx_equal_p (SET_DEST (slot_pat),
356 XEXP (XEXP (link, 0), 0)))
360 mark_referenced_resources (XEXP (XEXP (link, 0), 0),
366 /* ... fall through to other INSN processing ... */
371 #ifdef INSN_REFERENCES_ARE_DELAYED
372 if (! include_delayed_effects
373 && INSN_REFERENCES_ARE_DELAYED (x))
377 /* No special processing, just speed up. */
378 mark_referenced_resources (PATTERN (x), res, include_delayed_effects);
385 /* Process each sub-expression and flag what it needs. */
386 format_ptr = GET_RTX_FORMAT (code);
387 for (i = 0; i < GET_RTX_LENGTH (code); i++)
388 switch (*format_ptr++)
391 mark_referenced_resources (XEXP (x, i), res, include_delayed_effects);
395 for (j = 0; j < XVECLEN (x, i); j++)
396 mark_referenced_resources (XVECEXP (x, i, j), res,
397 include_delayed_effects);
402 /* A subroutine of mark_target_live_regs. Search forward from TARGET
403 looking for registers that are set before they are used. These are dead.
404 Stop after passing a few conditional jumps, and/or a small
405 number of unconditional branches. */
408 find_dead_or_set_registers (target, res, jump_target, jump_count, set, needed)
410 struct resources *res;
413 struct resources set, needed;
415 HARD_REG_SET scratch;
420 for (insn = target; insn; insn = next)
422 rtx this_jump_insn = insn;
424 next = NEXT_INSN (insn);
425 switch (GET_CODE (insn))
428 /* After a label, any pending dead registers that weren't yet
429 used can be made dead. */
430 AND_COMPL_HARD_REG_SET (pending_dead_regs, needed.regs);
431 AND_COMPL_HARD_REG_SET (res->regs, pending_dead_regs);
432 CLEAR_HARD_REG_SET (pending_dead_regs);
441 if (GET_CODE (PATTERN (insn)) == USE)
443 /* If INSN is a USE made by update_block, we care about the
444 underlying insn. Any registers set by the underlying insn
445 are live since the insn is being done somewhere else. */
446 if (GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn), 0))) == 'i')
447 mark_set_resources (XEXP (PATTERN (insn), 0), res, 0, 1);
449 /* All other USE insns are to be ignored. */
452 else if (GET_CODE (PATTERN (insn)) == CLOBBER)
454 else if (GET_CODE (PATTERN (insn)) == SEQUENCE)
456 /* An unconditional jump can be used to fill the delay slot
457 of a call, so search for a JUMP_INSN in any position. */
458 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
460 this_jump_insn = XVECEXP (PATTERN (insn), 0, i);
461 if (GET_CODE (this_jump_insn) == JUMP_INSN)
470 if (GET_CODE (this_jump_insn) == JUMP_INSN)
472 if (jump_count++ < 10)
474 if (simplejump_p (this_jump_insn)
475 || GET_CODE (PATTERN (this_jump_insn)) == RETURN)
477 next = JUMP_LABEL (this_jump_insn);
482 *jump_target = JUMP_LABEL (this_jump_insn);
485 else if (condjump_p (this_jump_insn)
486 || condjump_in_parallel_p (this_jump_insn))
488 struct resources target_set, target_res;
489 struct resources fallthrough_res;
491 /* We can handle conditional branches here by following
492 both paths, and then IOR the results of the two paths
493 together, which will give us registers that are dead
494 on both paths. Since this is expensive, we give it
495 a much higher cost than unconditional branches. The
496 cost was chosen so that we will follow at most 1
497 conditional branch. */
500 if (jump_count >= 10)
503 mark_referenced_resources (insn, &needed, 1);
505 /* For an annulled branch, mark_set_resources ignores slots
506 filled by instructions from the target. This is correct
507 if the branch is not taken. Since we are following both
508 paths from the branch, we must also compute correct info
509 if the branch is taken. We do this by inverting all of
510 the INSN_FROM_TARGET_P bits, calling mark_set_resources,
511 and then inverting the INSN_FROM_TARGET_P bits again. */
513 if (GET_CODE (PATTERN (insn)) == SEQUENCE
514 && INSN_ANNULLED_BRANCH_P (this_jump_insn))
516 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
517 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
518 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
521 mark_set_resources (insn, &target_set, 0, 1);
523 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
524 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
525 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
527 mark_set_resources (insn, &set, 0, 1);
531 mark_set_resources (insn, &set, 0, 1);
536 COPY_HARD_REG_SET (scratch, target_set.regs);
537 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
538 AND_COMPL_HARD_REG_SET (target_res.regs, scratch);
540 fallthrough_res = *res;
541 COPY_HARD_REG_SET (scratch, set.regs);
542 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
543 AND_COMPL_HARD_REG_SET (fallthrough_res.regs, scratch);
545 find_dead_or_set_registers (JUMP_LABEL (this_jump_insn),
546 &target_res, 0, jump_count,
548 find_dead_or_set_registers (next,
549 &fallthrough_res, 0, jump_count,
551 IOR_HARD_REG_SET (fallthrough_res.regs, target_res.regs);
552 AND_HARD_REG_SET (res->regs, fallthrough_res.regs);
560 /* Don't try this optimization if we expired our jump count
561 above, since that would mean there may be an infinite loop
562 in the function being compiled. */
568 mark_referenced_resources (insn, &needed, 1);
569 mark_set_resources (insn, &set, 0, 1);
571 COPY_HARD_REG_SET (scratch, set.regs);
572 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
573 AND_COMPL_HARD_REG_SET (res->regs, scratch);
579 /* Given X, a part of an insn, and a pointer to a `struct resource',
580 RES, indicate which resources are modified by the insn. If
581 INCLUDE_DELAYED_EFFECTS is nonzero, also mark resources potentially
582 set by the called routine.
584 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
585 objects are being referenced instead of set.
587 We never mark the insn as modifying the condition code unless it explicitly
588 SETs CC0 even though this is not totally correct. The reason for this is
589 that we require a SET of CC0 to immediately precede the reference to CC0.
590 So if some other insn sets CC0 as a side-effect, we know it cannot affect
591 our computation and thus may be placed in a delay slot. */
594 mark_set_resources (x, res, in_dest, include_delayed_effects)
596 register struct resources *res;
598 int include_delayed_effects;
603 const char *format_ptr;
621 /* These don't set any resources. */
630 /* Called routine modifies the condition code, memory, any registers
631 that aren't saved across calls, global registers and anything
632 explicitly CLOBBERed immediately after the CALL_INSN. */
634 if (include_delayed_effects)
636 rtx next = NEXT_INSN (x);
637 rtx prev = PREV_INSN (x);
640 res->cc = res->memory = 1;
641 for (r = 0; r < FIRST_PSEUDO_REGISTER; r++)
642 if (call_used_regs[r] || global_regs[r])
643 SET_HARD_REG_BIT (res->regs, r);
645 /* If X is part of a delay slot sequence, then NEXT should be
646 the first insn after the sequence. */
647 if (NEXT_INSN (prev) != x)
648 next = NEXT_INSN (NEXT_INSN (prev));
650 for (link = CALL_INSN_FUNCTION_USAGE (x);
651 link; link = XEXP (link, 1))
652 if (GET_CODE (XEXP (link, 0)) == CLOBBER)
653 mark_set_resources (SET_DEST (XEXP (link, 0)), res, 1, 0);
655 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
656 assume that this call can clobber any register. */
657 if (next && GET_CODE (next) == NOTE
658 && NOTE_LINE_NUMBER (next) == NOTE_INSN_SETJMP)
659 SET_HARD_REG_SET (res->regs);
662 /* ... and also what its RTL says it modifies, if anything. */
667 /* An insn consisting of just a CLOBBER (or USE) is just for flow
668 and doesn't actually do anything, so we ignore it. */
670 #ifdef INSN_SETS_ARE_DELAYED
671 if (! include_delayed_effects
672 && INSN_SETS_ARE_DELAYED (x))
677 if (GET_CODE (x) != USE && GET_CODE (x) != CLOBBER)
682 /* If the source of a SET is a CALL, this is actually done by
683 the called routine. So only include it if we are to include the
684 effects of the calling routine. */
686 mark_set_resources (SET_DEST (x), res,
687 (include_delayed_effects
688 || GET_CODE (SET_SRC (x)) != CALL),
691 mark_set_resources (SET_SRC (x), res, 0, 0);
695 mark_set_resources (XEXP (x, 0), res, 1, 0);
699 for (i = 0; i < XVECLEN (x, 0); i++)
700 if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x, 0, 0))
701 && INSN_FROM_TARGET_P (XVECEXP (x, 0, i))))
702 mark_set_resources (XVECEXP (x, 0, i), res, 0,
703 include_delayed_effects);
710 mark_set_resources (XEXP (x, 0), res, 1, 0);
714 mark_set_resources (XEXP (x, 0), res, in_dest, 0);
715 mark_set_resources (XEXP (x, 1), res, 0, 0);
716 mark_set_resources (XEXP (x, 2), res, 0, 0);
723 res->unch_memory |= RTX_UNCHANGING_P (x);
724 res->volatil |= MEM_VOLATILE_P (x);
727 mark_set_resources (XEXP (x, 0), res, 0, 0);
733 if (GET_CODE (SUBREG_REG (x)) != REG)
734 mark_set_resources (SUBREG_REG (x), res,
735 in_dest, include_delayed_effects);
738 unsigned int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
739 unsigned int last_regno
740 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
742 for (r = regno; r < last_regno; r++)
743 SET_HARD_REG_BIT (res->regs, r);
750 for (r = 0; r < HARD_REGNO_NREGS (REGNO (x), GET_MODE (x)); r++)
751 SET_HARD_REG_BIT (res->regs, REGNO (x) + r);
754 case UNSPEC_VOLATILE:
756 /* Traditional asm's are always volatile. */
765 res->volatil |= MEM_VOLATILE_P (x);
767 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
768 We can not just fall through here since then we would be confused
769 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
770 traditional asms unlike their normal usage. */
772 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
773 mark_set_resources (ASM_OPERANDS_INPUT (x, i), res, in_dest, 0);
780 /* Process each sub-expression and flag what it needs. */
781 format_ptr = GET_RTX_FORMAT (code);
782 for (i = 0; i < GET_RTX_LENGTH (code); i++)
783 switch (*format_ptr++)
786 mark_set_resources (XEXP (x, i), res, in_dest, include_delayed_effects);
790 for (j = 0; j < XVECLEN (x, i); j++)
791 mark_set_resources (XVECEXP (x, i, j), res, in_dest,
792 include_delayed_effects);
797 /* Set the resources that are live at TARGET.
799 If TARGET is zero, we refer to the end of the current function and can
800 return our precomputed value.
802 Otherwise, we try to find out what is live by consulting the basic block
803 information. This is tricky, because we must consider the actions of
804 reload and jump optimization, which occur after the basic block information
807 Accordingly, we proceed as follows::
809 We find the previous BARRIER and look at all immediately following labels
810 (with no intervening active insns) to see if any of them start a basic
811 block. If we hit the start of the function first, we use block 0.
813 Once we have found a basic block and a corresponding first insns, we can
814 accurately compute the live status from basic_block_live_regs and
815 reg_renumber. (By starting at a label following a BARRIER, we are immune
816 to actions taken by reload and jump.) Then we scan all insns between
817 that point and our target. For each CLOBBER (or for call-clobbered regs
818 when we pass a CALL_INSN), mark the appropriate registers are dead. For
819 a SET, mark them as live.
821 We have to be careful when using REG_DEAD notes because they are not
822 updated by such things as find_equiv_reg. So keep track of registers
823 marked as dead that haven't been assigned to, and mark them dead at the
824 next CODE_LABEL since reload and jump won't propagate values across labels.
826 If we cannot find the start of a basic block (should be a very rare
827 case, if it can happen at all), mark everything as potentially live.
829 Next, scan forward from TARGET looking for things set or clobbered
830 before they are used. These are not live.
832 Because we can be called many times on the same target, save our results
833 in a hash table indexed by INSN_UID. This is only done if the function
834 init_resource_info () was invoked before we are called. */
837 mark_target_live_regs (insns, target, res)
840 struct resources *res;
844 struct target_info *tinfo = NULL;
848 HARD_REG_SET scratch;
849 struct resources set, needed;
851 /* Handle end of function. */
854 *res = end_of_function_needs;
858 /* We have to assume memory is needed, but the CC isn't. */
860 res->volatil = res->unch_memory = 0;
863 /* See if we have computed this value already. */
864 if (target_hash_table != NULL)
866 for (tinfo = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
867 tinfo; tinfo = tinfo->next)
868 if (tinfo->uid == INSN_UID (target))
871 /* Start by getting the basic block number. If we have saved
872 information, we can get it from there unless the insn at the
873 start of the basic block has been deleted. */
874 if (tinfo && tinfo->block != -1
875 && ! INSN_DELETED_P (BLOCK_HEAD (tinfo->block)))
880 b = find_basic_block (target);
882 if (target_hash_table != NULL)
886 /* If the information is up-to-date, use it. Otherwise, we will
888 if (b == tinfo->block && b != -1 && tinfo->bb_tick == bb_ticks[b])
890 COPY_HARD_REG_SET (res->regs, tinfo->live_regs);
896 /* Allocate a place to put our results and chain it into the
898 tinfo = (struct target_info *) oballoc (sizeof (struct target_info));
899 tinfo->uid = INSN_UID (target);
901 tinfo->next = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
902 target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME] = tinfo;
906 CLEAR_HARD_REG_SET (pending_dead_regs);
908 /* If we found a basic block, get the live registers from it and update
909 them with anything set or killed between its start and the insn before
910 TARGET. Otherwise, we must assume everything is live. */
913 regset regs_live = BASIC_BLOCK (b)->global_live_at_start;
916 rtx start_insn, stop_insn;
918 /* Compute hard regs live at start of block -- this is the real hard regs
919 marked live, plus live pseudo regs that have been renumbered to
922 REG_SET_TO_HARD_REG_SET (current_live_regs, regs_live);
924 EXECUTE_IF_SET_IN_REG_SET
925 (regs_live, FIRST_PSEUDO_REGISTER, i,
927 if (reg_renumber[i] >= 0)
929 regno = reg_renumber[i];
931 j < regno + HARD_REGNO_NREGS (regno,
932 PSEUDO_REGNO_MODE (i));
934 SET_HARD_REG_BIT (current_live_regs, j);
938 /* Get starting and ending insn, handling the case where each might
940 start_insn = (b == 0 ? insns : BLOCK_HEAD (b));
943 if (GET_CODE (start_insn) == INSN
944 && GET_CODE (PATTERN (start_insn)) == SEQUENCE)
945 start_insn = XVECEXP (PATTERN (start_insn), 0, 0);
947 if (GET_CODE (stop_insn) == INSN
948 && GET_CODE (PATTERN (stop_insn)) == SEQUENCE)
949 stop_insn = next_insn (PREV_INSN (stop_insn));
951 for (insn = start_insn; insn != stop_insn;
952 insn = next_insn_no_annul (insn))
955 rtx real_insn = insn;
957 /* If this insn is from the target of a branch, it isn't going to
958 be used in the sequel. If it is used in both cases, this
959 test will not be true. */
960 if (INSN_FROM_TARGET_P (insn))
963 /* If this insn is a USE made by update_block, we care about the
965 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == USE
966 && GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn), 0))) == 'i')
967 real_insn = XEXP (PATTERN (insn), 0);
969 if (GET_CODE (real_insn) == CALL_INSN)
971 /* CALL clobbers all call-used regs that aren't fixed except
972 sp, ap, and fp. Do this before setting the result of the
974 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
975 if (call_used_regs[i]
976 && i != STACK_POINTER_REGNUM && i != FRAME_POINTER_REGNUM
977 && i != ARG_POINTER_REGNUM
978 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
979 && i != HARD_FRAME_POINTER_REGNUM
981 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
982 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
984 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
985 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
988 CLEAR_HARD_REG_BIT (current_live_regs, i);
990 /* A CALL_INSN sets any global register live, since it may
991 have been modified by the call. */
992 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
994 SET_HARD_REG_BIT (current_live_regs, i);
997 /* Mark anything killed in an insn to be deadened at the next
998 label. Ignore USE insns; the only REG_DEAD notes will be for
999 parameters. But they might be early. A CALL_INSN will usually
1000 clobber registers used for parameters. It isn't worth bothering
1001 with the unlikely case when it won't. */
1002 if ((GET_CODE (real_insn) == INSN
1003 && GET_CODE (PATTERN (real_insn)) != USE
1004 && GET_CODE (PATTERN (real_insn)) != CLOBBER)
1005 || GET_CODE (real_insn) == JUMP_INSN
1006 || GET_CODE (real_insn) == CALL_INSN)
1008 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1009 if (REG_NOTE_KIND (link) == REG_DEAD
1010 && GET_CODE (XEXP (link, 0)) == REG
1011 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1013 int first_regno = REGNO (XEXP (link, 0));
1016 + HARD_REGNO_NREGS (first_regno,
1017 GET_MODE (XEXP (link, 0))));
1019 for (i = first_regno; i < last_regno; i++)
1020 SET_HARD_REG_BIT (pending_dead_regs, i);
1023 note_stores (PATTERN (real_insn), update_live_status, NULL);
1025 /* If any registers were unused after this insn, kill them.
1026 These notes will always be accurate. */
1027 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1028 if (REG_NOTE_KIND (link) == REG_UNUSED
1029 && GET_CODE (XEXP (link, 0)) == REG
1030 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1032 int first_regno = REGNO (XEXP (link, 0));
1035 + HARD_REGNO_NREGS (first_regno,
1036 GET_MODE (XEXP (link, 0))));
1038 for (i = first_regno; i < last_regno; i++)
1039 CLEAR_HARD_REG_BIT (current_live_regs, i);
1043 else if (GET_CODE (real_insn) == CODE_LABEL)
1045 /* A label clobbers the pending dead registers since neither
1046 reload nor jump will propagate a value across a label. */
1047 AND_COMPL_HARD_REG_SET (current_live_regs, pending_dead_regs);
1048 CLEAR_HARD_REG_SET (pending_dead_regs);
1051 /* The beginning of the epilogue corresponds to the end of the
1052 RTL chain when there are no epilogue insns. Certain resources
1053 are implicitly required at that point. */
1054 else if (GET_CODE (real_insn) == NOTE
1055 && NOTE_LINE_NUMBER (real_insn) == NOTE_INSN_EPILOGUE_BEG)
1056 IOR_HARD_REG_SET (current_live_regs, start_of_epilogue_needs.regs);
1059 COPY_HARD_REG_SET (res->regs, current_live_regs);
1063 tinfo->bb_tick = bb_ticks[b];
1067 /* We didn't find the start of a basic block. Assume everything
1068 in use. This should happen only extremely rarely. */
1069 SET_HARD_REG_SET (res->regs);
1071 CLEAR_RESOURCE (&set);
1072 CLEAR_RESOURCE (&needed);
1074 jump_insn = find_dead_or_set_registers (target, res, &jump_target, 0,
1077 /* If we hit an unconditional branch, we have another way of finding out
1078 what is live: we can see what is live at the branch target and include
1079 anything used but not set before the branch. We add the live
1080 resources found using the test below to those found until now. */
1084 struct resources new_resources;
1085 rtx stop_insn = next_active_insn (jump_insn);
1087 mark_target_live_regs (insns, next_active_insn (jump_target),
1089 CLEAR_RESOURCE (&set);
1090 CLEAR_RESOURCE (&needed);
1092 /* Include JUMP_INSN in the needed registers. */
1093 for (insn = target; insn != stop_insn; insn = next_active_insn (insn))
1095 mark_referenced_resources (insn, &needed, 1);
1097 COPY_HARD_REG_SET (scratch, needed.regs);
1098 AND_COMPL_HARD_REG_SET (scratch, set.regs);
1099 IOR_HARD_REG_SET (new_resources.regs, scratch);
1101 mark_set_resources (insn, &set, 0, 1);
1104 IOR_HARD_REG_SET (res->regs, new_resources.regs);
1109 COPY_HARD_REG_SET (tinfo->live_regs, res->regs);
1113 /* Initialize the resources required by mark_target_live_regs ().
1114 This should be invoked before the first call to mark_target_live_regs. */
1117 init_resource_info (epilogue_insn)
1122 /* Indicate what resources are required to be valid at the end of the current
1123 function. The condition code never is and memory always is. If the
1124 frame pointer is needed, it is and so is the stack pointer unless
1125 EXIT_IGNORE_STACK is non-zero. If the frame pointer is not needed, the
1126 stack pointer is. Registers used to return the function value are
1127 needed. Registers holding global variables are needed. */
1129 end_of_function_needs.cc = 0;
1130 end_of_function_needs.memory = 1;
1131 end_of_function_needs.unch_memory = 0;
1132 CLEAR_HARD_REG_SET (end_of_function_needs.regs);
1134 if (frame_pointer_needed)
1136 SET_HARD_REG_BIT (end_of_function_needs.regs, FRAME_POINTER_REGNUM);
1137 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
1138 SET_HARD_REG_BIT (end_of_function_needs.regs, HARD_FRAME_POINTER_REGNUM);
1140 #ifdef EXIT_IGNORE_STACK
1141 if (! EXIT_IGNORE_STACK
1142 || current_function_sp_is_unchanging)
1144 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1147 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1149 if (current_function_return_rtx != 0)
1150 mark_referenced_resources (current_function_return_rtx,
1151 &end_of_function_needs, 1);
1153 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1155 #ifdef EPILOGUE_USES
1156 || EPILOGUE_USES (i)
1159 SET_HARD_REG_BIT (end_of_function_needs.regs, i);
1161 /* The registers required to be live at the end of the function are
1162 represented in the flow information as being dead just prior to
1163 reaching the end of the function. For example, the return of a value
1164 might be represented by a USE of the return register immediately
1165 followed by an unconditional jump to the return label where the
1166 return label is the end of the RTL chain. The end of the RTL chain
1167 is then taken to mean that the return register is live.
1169 This sequence is no longer maintained when epilogue instructions are
1170 added to the RTL chain. To reconstruct the original meaning, the
1171 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
1172 point where these registers become live (start_of_epilogue_needs).
1173 If epilogue instructions are present, the registers set by those
1174 instructions won't have been processed by flow. Thus, those
1175 registers are additionally required at the end of the RTL chain
1176 (end_of_function_needs). */
1178 start_of_epilogue_needs = end_of_function_needs;
1180 while ((epilogue_insn = next_nonnote_insn (epilogue_insn)))
1181 mark_set_resources (epilogue_insn, &end_of_function_needs, 0, 1);
1183 /* Allocate and initialize the tables used by mark_target_live_regs. */
1184 target_hash_table = (struct target_info **)
1185 xcalloc (TARGET_HASH_PRIME, sizeof (struct target_info *));
1186 bb_ticks = (int *) xcalloc (n_basic_blocks, sizeof (int));
1189 /* Free up the resources allcated to mark_target_live_regs (). This
1190 should be invoked after the last call to mark_target_live_regs (). */
1193 free_resource_info ()
1195 if (target_hash_table != NULL)
1197 free (target_hash_table);
1198 target_hash_table = NULL;
1201 if (bb_ticks != NULL)
1208 /* Clear any hashed information that we have stored for INSN. */
1211 clear_hashed_info_for_insn (insn)
1214 struct target_info *tinfo;
1216 if (target_hash_table != NULL)
1218 for (tinfo = target_hash_table[INSN_UID (insn) % TARGET_HASH_PRIME];
1219 tinfo; tinfo = tinfo->next)
1220 if (tinfo->uid == INSN_UID (insn))
1228 /* Increment the tick count for the basic block that contains INSN. */
1231 incr_ticks_for_insn (insn)
1234 int b = find_basic_block (insn);
1240 /* Add TRIAL to the set of resources used at the end of the current
1243 mark_end_of_function_resources (trial, include_delayed_effects)
1245 int include_delayed_effects;
1247 mark_referenced_resources (trial, &end_of_function_needs,
1248 include_delayed_effects);
1251 /* Try to find a hard register of mode MODE, matching the register class in
1252 CLASS_STR, which is available at the beginning of insn CURRENT_INSN and
1253 remains available until the end of LAST_INSN. LAST_INSN may be NULL_RTX,
1254 in which case the only condition is that the register must be available
1255 before CURRENT_INSN.
1256 Registers that already have bits set in REG_SET will not be considered.
1258 If an appropriate register is available, it will be returned and the
1259 corresponding bit(s) in REG_SET will be set; otherwise, NULL_RTX is
1263 find_free_register (current_insn, last_insn, class_str, mode, reg_set)
1264 rtx current_insn, last_insn;
1265 const char *class_str;
1267 HARD_REG_SET *reg_set;
1270 struct resources used;
1271 unsigned char clet = class_str[0];
1272 enum reg_class class
1273 = (clet == 'r' ? GENERAL_REGS : REG_CLASS_FROM_LETTER (clet));
1275 mark_target_live_regs (get_insns (), current_insn, &used);
1277 while (current_insn != last_insn)
1279 /* Exclude anything set in this insn. */
1280 mark_set_resources (PATTERN (current_insn), &used, 0, 1);
1281 current_insn = next_nonnote_insn (current_insn);
1285 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1290 #ifdef REG_ALLOC_ORDER
1291 regno = reg_alloc_order [i];
1296 /* Don't allocate fixed registers. */
1297 if (fixed_regs[regno])
1299 /* Make sure the register is of the right class. */
1300 if (! TEST_HARD_REG_BIT (reg_class_contents[class], regno))
1302 /* And can support the mode we need. */
1303 if (! HARD_REGNO_MODE_OK (regno, mode))
1305 /* And that we don't create an extra save/restore. */
1306 if (! call_used_regs[regno] && ! regs_ever_live[regno])
1308 /* And we don't clobber traceback for noreturn functions. */
1309 if ((regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM)
1310 && (! reload_completed || frame_pointer_needed))
1314 for (j = HARD_REGNO_NREGS (regno, mode) - 1; j >= 0; j--)
1316 if (TEST_HARD_REG_BIT (*reg_set, regno + j)
1317 || TEST_HARD_REG_BIT (used.regs, regno + j))
1325 for (j = HARD_REGNO_NREGS (regno, mode) - 1; j >= 0; j--)
1327 SET_HARD_REG_BIT (*reg_set, regno + j);
1329 return gen_rtx_REG (mode, regno);
1335 /* Return true if REG is dead at CURRENT_INSN. */
1338 reg_dead_p (current_insn, reg)
1339 rtx current_insn, reg;
1341 struct resources used;
1344 mark_target_live_regs (get_insns (), current_insn, &used);
1346 regno = REGNO (reg);
1347 for (j = HARD_REGNO_NREGS (regno, GET_MODE (reg)) - 1; j >= 0; j--)
1349 if (TEST_HARD_REG_BIT (used.regs, regno + j))