1 /* Definitions for computing resource usage of specific insns.
2 Copyright (C) 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
23 #include "hard-reg-set.h"
25 #include "basic-block.h"
31 /* This structure is used to record liveness information at the targets or
32 fallthrough insns of branches. We will most likely need the information
33 at targets again, so save them in a hash table rather than recomputing them
38 int uid; /* INSN_UID of target. */
39 struct target_info *next; /* Next info for same hash bucket. */
40 HARD_REG_SET live_regs; /* Registers live at target. */
41 int block; /* Basic block number containing target. */
42 int bb_tick; /* Generation count of basic block info. */
45 #define TARGET_HASH_PRIME 257
47 /* Indicates what resources are required at the beginning of the epilogue. */
48 static struct resources start_of_epilogue_needs;
50 /* Indicates what resources are required at function end. */
51 static struct resources end_of_function_needs;
53 /* Define the hash table itself. */
54 static struct target_info **target_hash_table = NULL;
56 /* For each basic block, we maintain a generation number of its basic
57 block info, which is updated each time we move an insn from the
58 target of a jump. This is the generation number indexed by block
63 /* Marks registers possibly live at the current place being scanned by
64 mark_target_live_regs. Used only by next two function. */
66 static HARD_REG_SET current_live_regs;
68 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
69 Also only used by the next two functions. */
71 static HARD_REG_SET pending_dead_regs;
73 static void update_live_status PROTO ((rtx, rtx));
74 static int find_basic_block PROTO ((rtx));
75 static rtx next_insn_no_annul PROTO ((rtx));
76 static rtx find_dead_or_set_registers PROTO ((rtx, struct resources*,
77 rtx*, int, struct resources,
80 /* Utility function called from mark_target_live_regs via note_stores.
81 It deadens any CLOBBERed registers and livens any SET registers. */
84 update_live_status (dest, x)
88 int first_regno, last_regno;
91 if (GET_CODE (dest) != REG
92 && (GET_CODE (dest) != SUBREG || GET_CODE (SUBREG_REG (dest)) != REG))
95 if (GET_CODE (dest) == SUBREG)
96 first_regno = REGNO (SUBREG_REG (dest)) + SUBREG_WORD (dest);
98 first_regno = REGNO (dest);
100 last_regno = first_regno + HARD_REGNO_NREGS (first_regno, GET_MODE (dest));
102 if (GET_CODE (x) == CLOBBER)
103 for (i = first_regno; i < last_regno; i++)
104 CLEAR_HARD_REG_BIT (current_live_regs, i);
106 for (i = first_regno; i < last_regno; i++)
108 SET_HARD_REG_BIT (current_live_regs, i);
109 CLEAR_HARD_REG_BIT (pending_dead_regs, i);
112 /* Find the number of the basic block that starts closest to INSN. Return -1
113 if we couldn't find such a basic block. */
116 find_basic_block (insn)
121 /* Scan backwards to the previous BARRIER. Then see if we can find a
122 label that starts a basic block. Return the basic block number. */
124 for (insn = prev_nonnote_insn (insn);
125 insn && GET_CODE (insn) != BARRIER;
126 insn = prev_nonnote_insn (insn))
129 /* The start of the function is basic block zero. */
133 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach
134 anything other than a CODE_LABEL or note, we can't find this code. */
135 for (insn = next_nonnote_insn (insn);
136 insn && GET_CODE (insn) == CODE_LABEL;
137 insn = next_nonnote_insn (insn))
139 for (i = 0; i < n_basic_blocks; i++)
140 if (insn == BLOCK_HEAD (i))
147 /* Similar to next_insn, but ignores insns in the delay slots of
148 an annulled branch. */
151 next_insn_no_annul (insn)
156 /* If INSN is an annulled branch, skip any insns from the target
158 if (INSN_ANNULLED_BRANCH_P (insn)
159 && NEXT_INSN (PREV_INSN (insn)) != insn)
160 while (INSN_FROM_TARGET_P (NEXT_INSN (insn)))
161 insn = NEXT_INSN (insn);
163 insn = NEXT_INSN (insn);
164 if (insn && GET_CODE (insn) == INSN
165 && GET_CODE (PATTERN (insn)) == SEQUENCE)
166 insn = XVECEXP (PATTERN (insn), 0, 0);
172 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
173 which resources are references by the insn. If INCLUDE_DELAYED_EFFECTS
174 is TRUE, resources used by the called routine will be included for
178 mark_referenced_resources (x, res, include_delayed_effects)
180 register struct resources *res;
181 register int include_delayed_effects;
183 register enum rtx_code code = GET_CODE (x);
185 register char *format_ptr;
187 /* Handle leaf items for which we set resource flags. Also, special-case
188 CALL, SET and CLOBBER operators. */
200 if (GET_CODE (SUBREG_REG (x)) != REG)
201 mark_referenced_resources (SUBREG_REG (x), res, 0);
204 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
205 int last_regno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
206 for (i = regno; i < last_regno; i++)
207 SET_HARD_REG_BIT (res->regs, i);
212 for (i = 0; i < HARD_REGNO_NREGS (REGNO (x), GET_MODE (x)); i++)
213 SET_HARD_REG_BIT (res->regs, REGNO (x) + i);
217 /* If this memory shouldn't change, it really isn't referencing
219 if (RTX_UNCHANGING_P (x))
220 res->unch_memory = 1;
223 res->volatil = MEM_VOLATILE_P (x);
225 /* Mark registers used to access memory. */
226 mark_referenced_resources (XEXP (x, 0), res, 0);
233 case UNSPEC_VOLATILE:
235 /* Traditional asm's are always volatile. */
244 res->volatil = MEM_VOLATILE_P (x);
246 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
247 We can not just fall through here since then we would be confused
248 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
249 traditional asms unlike their normal usage. */
251 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
252 mark_referenced_resources (ASM_OPERANDS_INPUT (x, i), res, 0);
256 /* The first operand will be a (MEM (xxx)) but doesn't really reference
257 memory. The second operand may be referenced, though. */
258 mark_referenced_resources (XEXP (XEXP (x, 0), 0), res, 0);
259 mark_referenced_resources (XEXP (x, 1), res, 0);
263 /* Usually, the first operand of SET is set, not referenced. But
264 registers used to access memory are referenced. SET_DEST is
265 also referenced if it is a ZERO_EXTRACT or SIGN_EXTRACT. */
267 mark_referenced_resources (SET_SRC (x), res, 0);
270 if (GET_CODE (x) == SIGN_EXTRACT || GET_CODE (x) == ZERO_EXTRACT)
271 mark_referenced_resources (x, res, 0);
272 else if (GET_CODE (x) == SUBREG)
274 if (GET_CODE (x) == MEM)
275 mark_referenced_resources (XEXP (x, 0), res, 0);
282 if (include_delayed_effects)
284 /* A CALL references memory, the frame pointer if it exists, the
285 stack pointer, any global registers and any registers given in
286 USE insns immediately in front of the CALL.
288 However, we may have moved some of the parameter loading insns
289 into the delay slot of this CALL. If so, the USE's for them
290 don't count and should be skipped. */
291 rtx insn = PREV_INSN (x);
294 rtx next = NEXT_INSN (x);
297 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
298 if (NEXT_INSN (insn) != x)
300 next = NEXT_INSN (NEXT_INSN (insn));
301 sequence = PATTERN (NEXT_INSN (insn));
302 seq_size = XVECLEN (sequence, 0);
303 if (GET_CODE (sequence) != SEQUENCE)
308 SET_HARD_REG_BIT (res->regs, STACK_POINTER_REGNUM);
309 if (frame_pointer_needed)
311 SET_HARD_REG_BIT (res->regs, FRAME_POINTER_REGNUM);
312 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
313 SET_HARD_REG_BIT (res->regs, HARD_FRAME_POINTER_REGNUM);
317 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
319 SET_HARD_REG_BIT (res->regs, i);
321 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
322 assume that this call can need any register.
324 This is done to be more conservative about how we handle setjmp.
325 We assume that they both use and set all registers. Using all
326 registers ensures that a register will not be considered dead
327 just because it crosses a setjmp call. A register should be
328 considered dead only if the setjmp call returns non-zero. */
329 if (next && GET_CODE (next) == NOTE
330 && NOTE_LINE_NUMBER (next) == NOTE_INSN_SETJMP)
331 SET_HARD_REG_SET (res->regs);
336 for (link = CALL_INSN_FUNCTION_USAGE (x);
338 link = XEXP (link, 1))
339 if (GET_CODE (XEXP (link, 0)) == USE)
341 for (i = 1; i < seq_size; i++)
343 rtx slot_pat = PATTERN (XVECEXP (sequence, 0, i));
344 if (GET_CODE (slot_pat) == SET
345 && rtx_equal_p (SET_DEST (slot_pat),
346 SET_DEST (XEXP (link, 0))))
350 mark_referenced_resources (SET_DEST (XEXP (link, 0)),
356 /* ... fall through to other INSN processing ... */
361 #ifdef INSN_REFERENCES_ARE_DELAYED
362 if (! include_delayed_effects
363 && INSN_REFERENCES_ARE_DELAYED (x))
367 /* No special processing, just speed up. */
368 mark_referenced_resources (PATTERN (x), res, include_delayed_effects);
375 /* Process each sub-expression and flag what it needs. */
376 format_ptr = GET_RTX_FORMAT (code);
377 for (i = 0; i < GET_RTX_LENGTH (code); i++)
378 switch (*format_ptr++)
381 mark_referenced_resources (XEXP (x, i), res, include_delayed_effects);
385 for (j = 0; j < XVECLEN (x, i); j++)
386 mark_referenced_resources (XVECEXP (x, i, j), res,
387 include_delayed_effects);
392 /* A subroutine of mark_target_live_regs. Search forward from TARGET
393 looking for registers that are set before they are used. These are dead.
394 Stop after passing a few conditional jumps, and/or a small
395 number of unconditional branches. */
398 find_dead_or_set_registers (target, res, jump_target, jump_count, set, needed)
400 struct resources *res;
403 struct resources set, needed;
405 HARD_REG_SET scratch;
410 for (insn = target; insn; insn = next)
412 rtx this_jump_insn = insn;
414 next = NEXT_INSN (insn);
415 switch (GET_CODE (insn))
418 /* After a label, any pending dead registers that weren't yet
419 used can be made dead. */
420 AND_COMPL_HARD_REG_SET (pending_dead_regs, needed.regs);
421 AND_COMPL_HARD_REG_SET (res->regs, pending_dead_regs);
422 CLEAR_HARD_REG_SET (pending_dead_regs);
431 if (GET_CODE (PATTERN (insn)) == USE)
433 /* If INSN is a USE made by update_block, we care about the
434 underlying insn. Any registers set by the underlying insn
435 are live since the insn is being done somewhere else. */
436 if (GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn), 0))) == 'i')
437 mark_set_resources (XEXP (PATTERN (insn), 0), res, 0, 1);
439 /* All other USE insns are to be ignored. */
442 else if (GET_CODE (PATTERN (insn)) == CLOBBER)
444 else if (GET_CODE (PATTERN (insn)) == SEQUENCE)
446 /* An unconditional jump can be used to fill the delay slot
447 of a call, so search for a JUMP_INSN in any position. */
448 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
450 this_jump_insn = XVECEXP (PATTERN (insn), 0, i);
451 if (GET_CODE (this_jump_insn) == JUMP_INSN)
460 if (GET_CODE (this_jump_insn) == JUMP_INSN)
462 if (jump_count++ < 10)
464 if (simplejump_p (this_jump_insn)
465 || GET_CODE (PATTERN (this_jump_insn)) == RETURN)
467 next = JUMP_LABEL (this_jump_insn);
472 *jump_target = JUMP_LABEL (this_jump_insn);
475 else if (condjump_p (this_jump_insn)
476 || condjump_in_parallel_p (this_jump_insn))
478 struct resources target_set, target_res;
479 struct resources fallthrough_res;
481 /* We can handle conditional branches here by following
482 both paths, and then IOR the results of the two paths
483 together, which will give us registers that are dead
484 on both paths. Since this is expensive, we give it
485 a much higher cost than unconditional branches. The
486 cost was chosen so that we will follow at most 1
487 conditional branch. */
490 if (jump_count >= 10)
493 mark_referenced_resources (insn, &needed, 1);
495 /* For an annulled branch, mark_set_resources ignores slots
496 filled by instructions from the target. This is correct
497 if the branch is not taken. Since we are following both
498 paths from the branch, we must also compute correct info
499 if the branch is taken. We do this by inverting all of
500 the INSN_FROM_TARGET_P bits, calling mark_set_resources,
501 and then inverting the INSN_FROM_TARGET_P bits again. */
503 if (GET_CODE (PATTERN (insn)) == SEQUENCE
504 && INSN_ANNULLED_BRANCH_P (this_jump_insn))
506 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
507 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
508 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
511 mark_set_resources (insn, &target_set, 0, 1);
513 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
514 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
515 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
517 mark_set_resources (insn, &set, 0, 1);
521 mark_set_resources (insn, &set, 0, 1);
526 COPY_HARD_REG_SET (scratch, target_set.regs);
527 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
528 AND_COMPL_HARD_REG_SET (target_res.regs, scratch);
530 fallthrough_res = *res;
531 COPY_HARD_REG_SET (scratch, set.regs);
532 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
533 AND_COMPL_HARD_REG_SET (fallthrough_res.regs, scratch);
535 find_dead_or_set_registers (JUMP_LABEL (this_jump_insn),
536 &target_res, 0, jump_count,
538 find_dead_or_set_registers (next,
539 &fallthrough_res, 0, jump_count,
541 IOR_HARD_REG_SET (fallthrough_res.regs, target_res.regs);
542 AND_HARD_REG_SET (res->regs, fallthrough_res.regs);
550 /* Don't try this optimization if we expired our jump count
551 above, since that would mean there may be an infinite loop
552 in the function being compiled. */
558 mark_referenced_resources (insn, &needed, 1);
559 mark_set_resources (insn, &set, 0, 1);
561 COPY_HARD_REG_SET (scratch, set.regs);
562 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
563 AND_COMPL_HARD_REG_SET (res->regs, scratch);
569 /* Given X, a part of an insn, and a pointer to a `struct resource',
570 RES, indicate which resources are modified by the insn. If
571 INCLUDE_DELAYED_EFFECTS is nonzero, also mark resources potentially
572 set by the called routine.
574 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
575 objects are being referenced instead of set.
577 We never mark the insn as modifying the condition code unless it explicitly
578 SETs CC0 even though this is not totally correct. The reason for this is
579 that we require a SET of CC0 to immediately precede the reference to CC0.
580 So if some other insn sets CC0 as a side-effect, we know it cannot affect
581 our computation and thus may be placed in a delay slot. */
584 mark_set_resources (x, res, in_dest, include_delayed_effects)
586 register struct resources *res;
588 int include_delayed_effects;
590 register enum rtx_code code;
592 register char *format_ptr;
610 /* These don't set any resources. */
619 /* Called routine modifies the condition code, memory, any registers
620 that aren't saved across calls, global registers and anything
621 explicitly CLOBBERed immediately after the CALL_INSN. */
623 if (include_delayed_effects)
625 rtx next = NEXT_INSN (x);
626 rtx prev = PREV_INSN (x);
629 res->cc = res->memory = 1;
630 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
631 if (call_used_regs[i] || global_regs[i])
632 SET_HARD_REG_BIT (res->regs, i);
634 /* If X is part of a delay slot sequence, then NEXT should be
635 the first insn after the sequence. */
636 if (NEXT_INSN (prev) != x)
637 next = NEXT_INSN (NEXT_INSN (prev));
639 for (link = CALL_INSN_FUNCTION_USAGE (x);
640 link; link = XEXP (link, 1))
641 if (GET_CODE (XEXP (link, 0)) == CLOBBER)
642 mark_set_resources (SET_DEST (XEXP (link, 0)), res, 1, 0);
644 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
645 assume that this call can clobber any register. */
646 if (next && GET_CODE (next) == NOTE
647 && NOTE_LINE_NUMBER (next) == NOTE_INSN_SETJMP)
648 SET_HARD_REG_SET (res->regs);
651 /* ... and also what its RTL says it modifies, if anything. */
656 /* An insn consisting of just a CLOBBER (or USE) is just for flow
657 and doesn't actually do anything, so we ignore it. */
659 #ifdef INSN_SETS_ARE_DELAYED
660 if (! include_delayed_effects
661 && INSN_SETS_ARE_DELAYED (x))
666 if (GET_CODE (x) != USE && GET_CODE (x) != CLOBBER)
671 /* If the source of a SET is a CALL, this is actually done by
672 the called routine. So only include it if we are to include the
673 effects of the calling routine. */
675 mark_set_resources (SET_DEST (x), res,
676 (include_delayed_effects
677 || GET_CODE (SET_SRC (x)) != CALL),
680 mark_set_resources (SET_SRC (x), res, 0, 0);
684 mark_set_resources (XEXP (x, 0), res, 1, 0);
688 for (i = 0; i < XVECLEN (x, 0); i++)
689 if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x, 0, 0))
690 && INSN_FROM_TARGET_P (XVECEXP (x, 0, i))))
691 mark_set_resources (XVECEXP (x, 0, i), res, 0,
692 include_delayed_effects);
699 mark_set_resources (XEXP (x, 0), res, 1, 0);
703 mark_set_resources (XEXP (x, 0), res, in_dest, 0);
704 mark_set_resources (XEXP (x, 1), res, 0, 0);
705 mark_set_resources (XEXP (x, 2), res, 0, 0);
712 res->unch_memory = RTX_UNCHANGING_P (x);
713 res->volatil = MEM_VOLATILE_P (x);
716 mark_set_resources (XEXP (x, 0), res, 0, 0);
722 if (GET_CODE (SUBREG_REG (x)) != REG)
723 mark_set_resources (SUBREG_REG (x), res,
724 in_dest, include_delayed_effects);
727 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
728 int last_regno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
729 for (i = regno; i < last_regno; i++)
730 SET_HARD_REG_BIT (res->regs, i);
737 for (i = 0; i < HARD_REGNO_NREGS (REGNO (x), GET_MODE (x)); i++)
738 SET_HARD_REG_BIT (res->regs, REGNO (x) + i);
745 /* Process each sub-expression and flag what it needs. */
746 format_ptr = GET_RTX_FORMAT (code);
747 for (i = 0; i < GET_RTX_LENGTH (code); i++)
748 switch (*format_ptr++)
751 mark_set_resources (XEXP (x, i), res, in_dest, include_delayed_effects);
755 for (j = 0; j < XVECLEN (x, i); j++)
756 mark_set_resources (XVECEXP (x, i, j), res, in_dest,
757 include_delayed_effects);
762 /* Set the resources that are live at TARGET.
764 If TARGET is zero, we refer to the end of the current function and can
765 return our precomputed value.
767 Otherwise, we try to find out what is live by consulting the basic block
768 information. This is tricky, because we must consider the actions of
769 reload and jump optimization, which occur after the basic block information
772 Accordingly, we proceed as follows::
774 We find the previous BARRIER and look at all immediately following labels
775 (with no intervening active insns) to see if any of them start a basic
776 block. If we hit the start of the function first, we use block 0.
778 Once we have found a basic block and a corresponding first insns, we can
779 accurately compute the live status from basic_block_live_regs and
780 reg_renumber. (By starting at a label following a BARRIER, we are immune
781 to actions taken by reload and jump.) Then we scan all insns between
782 that point and our target. For each CLOBBER (or for call-clobbered regs
783 when we pass a CALL_INSN), mark the appropriate registers are dead. For
784 a SET, mark them as live.
786 We have to be careful when using REG_DEAD notes because they are not
787 updated by such things as find_equiv_reg. So keep track of registers
788 marked as dead that haven't been assigned to, and mark them dead at the
789 next CODE_LABEL since reload and jump won't propagate values across labels.
791 If we cannot find the start of a basic block (should be a very rare
792 case, if it can happen at all), mark everything as potentially live.
794 Next, scan forward from TARGET looking for things set or clobbered
795 before they are used. These are not live.
797 Because we can be called many times on the same target, save our results
798 in a hash table indexed by INSN_UID. This is only done if the function
799 init_resource_info () was invoked before we are called. */
802 mark_target_live_regs (insns, target, res)
805 struct resources *res;
809 struct target_info *tinfo = NULL;
813 HARD_REG_SET scratch;
814 struct resources set, needed;
816 /* Handle end of function. */
819 *res = end_of_function_needs;
823 /* We have to assume memory is needed, but the CC isn't. */
825 res->volatil = res->unch_memory = 0;
828 /* See if we have computed this value already. */
829 if (target_hash_table != NULL)
831 for (tinfo = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
832 tinfo; tinfo = tinfo->next)
833 if (tinfo->uid == INSN_UID (target))
836 /* Start by getting the basic block number. If we have saved
837 information, we can get it from there unless the insn at the
838 start of the basic block has been deleted. */
839 if (tinfo && tinfo->block != -1
840 && ! INSN_DELETED_P (BLOCK_HEAD (tinfo->block)))
845 b = find_basic_block (target);
847 if (target_hash_table != NULL)
851 /* If the information is up-to-date, use it. Otherwise, we will
853 if (b == tinfo->block && b != -1 && tinfo->bb_tick == bb_ticks[b])
855 COPY_HARD_REG_SET (res->regs, tinfo->live_regs);
861 /* Allocate a place to put our results and chain it into the
863 tinfo = (struct target_info *) oballoc (sizeof (struct target_info));
864 tinfo->uid = INSN_UID (target);
866 tinfo->next = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
867 target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME] = tinfo;
871 CLEAR_HARD_REG_SET (pending_dead_regs);
873 /* If we found a basic block, get the live registers from it and update
874 them with anything set or killed between its start and the insn before
875 TARGET. Otherwise, we must assume everything is live. */
878 regset regs_live = BASIC_BLOCK (b)->global_live_at_start;
881 rtx start_insn, stop_insn;
883 /* Compute hard regs live at start of block -- this is the real hard regs
884 marked live, plus live pseudo regs that have been renumbered to
887 REG_SET_TO_HARD_REG_SET (current_live_regs, regs_live);
889 EXECUTE_IF_SET_IN_REG_SET
890 (regs_live, FIRST_PSEUDO_REGISTER, i,
892 if ((regno = reg_renumber[i]) >= 0)
894 j < regno + HARD_REGNO_NREGS (regno,
895 PSEUDO_REGNO_MODE (i));
897 SET_HARD_REG_BIT (current_live_regs, j);
900 /* Get starting and ending insn, handling the case where each might
902 start_insn = (b == 0 ? insns : BLOCK_HEAD (b));
905 if (GET_CODE (start_insn) == INSN
906 && GET_CODE (PATTERN (start_insn)) == SEQUENCE)
907 start_insn = XVECEXP (PATTERN (start_insn), 0, 0);
909 if (GET_CODE (stop_insn) == INSN
910 && GET_CODE (PATTERN (stop_insn)) == SEQUENCE)
911 stop_insn = next_insn (PREV_INSN (stop_insn));
913 for (insn = start_insn; insn != stop_insn;
914 insn = next_insn_no_annul (insn))
917 rtx real_insn = insn;
919 /* If this insn is from the target of a branch, it isn't going to
920 be used in the sequel. If it is used in both cases, this
921 test will not be true. */
922 if (INSN_FROM_TARGET_P (insn))
925 /* If this insn is a USE made by update_block, we care about the
927 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == USE
928 && GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn), 0))) == 'i')
929 real_insn = XEXP (PATTERN (insn), 0);
931 if (GET_CODE (real_insn) == CALL_INSN)
933 /* CALL clobbers all call-used regs that aren't fixed except
934 sp, ap, and fp. Do this before setting the result of the
936 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
937 if (call_used_regs[i]
938 && i != STACK_POINTER_REGNUM && i != FRAME_POINTER_REGNUM
939 && i != ARG_POINTER_REGNUM
940 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
941 && i != HARD_FRAME_POINTER_REGNUM
943 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
944 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
946 #ifdef PIC_OFFSET_TABLE_REGNUM
947 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
950 CLEAR_HARD_REG_BIT (current_live_regs, i);
952 /* A CALL_INSN sets any global register live, since it may
953 have been modified by the call. */
954 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
956 SET_HARD_REG_BIT (current_live_regs, i);
959 /* Mark anything killed in an insn to be deadened at the next
960 label. Ignore USE insns; the only REG_DEAD notes will be for
961 parameters. But they might be early. A CALL_INSN will usually
962 clobber registers used for parameters. It isn't worth bothering
963 with the unlikely case when it won't. */
964 if ((GET_CODE (real_insn) == INSN
965 && GET_CODE (PATTERN (real_insn)) != USE
966 && GET_CODE (PATTERN (real_insn)) != CLOBBER)
967 || GET_CODE (real_insn) == JUMP_INSN
968 || GET_CODE (real_insn) == CALL_INSN)
970 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
971 if (REG_NOTE_KIND (link) == REG_DEAD
972 && GET_CODE (XEXP (link, 0)) == REG
973 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
975 int first_regno = REGNO (XEXP (link, 0));
978 + HARD_REGNO_NREGS (first_regno,
979 GET_MODE (XEXP (link, 0))));
981 for (i = first_regno; i < last_regno; i++)
982 SET_HARD_REG_BIT (pending_dead_regs, i);
985 note_stores (PATTERN (real_insn), update_live_status);
987 /* If any registers were unused after this insn, kill them.
988 These notes will always be accurate. */
989 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
990 if (REG_NOTE_KIND (link) == REG_UNUSED
991 && GET_CODE (XEXP (link, 0)) == REG
992 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
994 int first_regno = REGNO (XEXP (link, 0));
997 + HARD_REGNO_NREGS (first_regno,
998 GET_MODE (XEXP (link, 0))));
1000 for (i = first_regno; i < last_regno; i++)
1001 CLEAR_HARD_REG_BIT (current_live_regs, i);
1005 else if (GET_CODE (real_insn) == CODE_LABEL)
1007 /* A label clobbers the pending dead registers since neither
1008 reload nor jump will propagate a value across a label. */
1009 AND_COMPL_HARD_REG_SET (current_live_regs, pending_dead_regs);
1010 CLEAR_HARD_REG_SET (pending_dead_regs);
1013 /* The beginning of the epilogue corresponds to the end of the
1014 RTL chain when there are no epilogue insns. Certain resources
1015 are implicitly required at that point. */
1016 else if (GET_CODE (real_insn) == NOTE
1017 && NOTE_LINE_NUMBER (real_insn) == NOTE_INSN_EPILOGUE_BEG)
1018 IOR_HARD_REG_SET (current_live_regs, start_of_epilogue_needs.regs);
1021 COPY_HARD_REG_SET (res->regs, current_live_regs);
1025 tinfo->bb_tick = bb_ticks[b];
1029 /* We didn't find the start of a basic block. Assume everything
1030 in use. This should happen only extremely rarely. */
1031 SET_HARD_REG_SET (res->regs);
1033 CLEAR_RESOURCE (&set);
1034 CLEAR_RESOURCE (&needed);
1036 jump_insn = find_dead_or_set_registers (target, res, &jump_target, 0,
1039 /* If we hit an unconditional branch, we have another way of finding out
1040 what is live: we can see what is live at the branch target and include
1041 anything used but not set before the branch. The only things that are
1042 live are those that are live using the above test and the test below. */
1046 struct resources new_resources;
1047 rtx stop_insn = next_active_insn (jump_insn);
1049 mark_target_live_regs (insns, next_active_insn (jump_target),
1051 CLEAR_RESOURCE (&set);
1052 CLEAR_RESOURCE (&needed);
1054 /* Include JUMP_INSN in the needed registers. */
1055 for (insn = target; insn != stop_insn; insn = next_active_insn (insn))
1057 mark_referenced_resources (insn, &needed, 1);
1059 COPY_HARD_REG_SET (scratch, needed.regs);
1060 AND_COMPL_HARD_REG_SET (scratch, set.regs);
1061 IOR_HARD_REG_SET (new_resources.regs, scratch);
1063 mark_set_resources (insn, &set, 0, 1);
1066 AND_HARD_REG_SET (res->regs, new_resources.regs);
1071 COPY_HARD_REG_SET (tinfo->live_regs, res->regs);
1075 /* Initialize the resources required by mark_target_live_regs ().
1076 This should be invoked before the first call to mark_target_live_regs. */
1079 init_resource_info (epilogue_insn)
1084 /* Indicate what resources are required to be valid at the end of the current
1085 function. The condition code never is and memory always is. If the
1086 frame pointer is needed, it is and so is the stack pointer unless
1087 EXIT_IGNORE_STACK is non-zero. If the frame pointer is not needed, the
1088 stack pointer is. Registers used to return the function value are
1089 needed. Registers holding global variables are needed. */
1091 end_of_function_needs.cc = 0;
1092 end_of_function_needs.memory = 1;
1093 end_of_function_needs.unch_memory = 0;
1094 CLEAR_HARD_REG_SET (end_of_function_needs.regs);
1096 if (frame_pointer_needed)
1098 SET_HARD_REG_BIT (end_of_function_needs.regs, FRAME_POINTER_REGNUM);
1099 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
1100 SET_HARD_REG_BIT (end_of_function_needs.regs, HARD_FRAME_POINTER_REGNUM);
1102 #ifdef EXIT_IGNORE_STACK
1103 if (! EXIT_IGNORE_STACK
1104 || current_function_sp_is_unchanging)
1106 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1109 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1111 if (current_function_return_rtx != 0)
1112 mark_referenced_resources (current_function_return_rtx,
1113 &end_of_function_needs, 1);
1115 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1117 #ifdef EPILOGUE_USES
1118 || EPILOGUE_USES (i)
1121 SET_HARD_REG_BIT (end_of_function_needs.regs, i);
1123 /* The registers required to be live at the end of the function are
1124 represented in the flow information as being dead just prior to
1125 reaching the end of the function. For example, the return of a value
1126 might be represented by a USE of the return register immediately
1127 followed by an unconditional jump to the return label where the
1128 return label is the end of the RTL chain. The end of the RTL chain
1129 is then taken to mean that the return register is live.
1131 This sequence is no longer maintained when epilogue instructions are
1132 added to the RTL chain. To reconstruct the original meaning, the
1133 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
1134 point where these registers become live (start_of_epilogue_needs).
1135 If epilogue instructions are present, the registers set by those
1136 instructions won't have been processed by flow. Thus, those
1137 registers are additionally required at the end of the RTL chain
1138 (end_of_function_needs). */
1140 start_of_epilogue_needs = end_of_function_needs;
1142 while ((epilogue_insn = next_nonnote_insn (epilogue_insn)))
1143 mark_set_resources (epilogue_insn, &end_of_function_needs, 0, 1);
1145 /* Allocate and initialize the tables used by mark_target_live_regs. */
1147 = (struct target_info **) xmalloc ((TARGET_HASH_PRIME
1148 * sizeof (struct target_info *)));
1149 bzero ((char *) target_hash_table,
1150 TARGET_HASH_PRIME * sizeof (struct target_info *));
1152 bb_ticks = (int *) xmalloc (n_basic_blocks * sizeof (int));
1153 bzero ((char *) bb_ticks, n_basic_blocks * sizeof (int));
1156 /* Free up the resources allcated to mark_target_live_regs (). This
1157 should be invoked after the last call to mark_target_live_regs (). */
1160 free_resource_info ()
1162 if (target_hash_table != NULL)
1164 free (target_hash_table);
1165 target_hash_table = NULL;
1168 if (bb_ticks != NULL)
1175 /* Clear any hashed information that we have stored for INSN. */
1178 clear_hashed_info_for_insn (insn)
1181 struct target_info *tinfo;
1183 if (target_hash_table != NULL)
1185 for (tinfo = target_hash_table[INSN_UID (insn) % TARGET_HASH_PRIME];
1186 tinfo; tinfo = tinfo->next)
1187 if (tinfo->uid == INSN_UID (insn))
1195 /* Increment the tick count for the basic block that contains INSN. */
1198 incr_ticks_for_insn (insn)
1201 int b = find_basic_block (insn);
1207 /* Add TRIAL to the set of resources used at the end of the current
1210 mark_end_of_function_resources (trial, include_delayed_effects)
1212 int include_delayed_effects;
1214 mark_referenced_resources (trial, &end_of_function_needs,
1215 include_delayed_effects);
1218 /* Try to find an available hard register of mode MODE at
1219 CURRENT_INSN, matching the register class in CLASS_STR. Registers
1220 that already have bits set in REG_SET will not be considered.
1222 If an appropriate register is available, it will be returned and the
1223 corresponding bit(s) in REG_SET will be set; otherwise, NULL_RTX is
1227 find_free_register (current_insn, class_str, mode, reg_set)
1231 HARD_REG_SET *reg_set;
1234 struct resources used;
1235 unsigned char clet = class_str[0];
1236 enum reg_class class
1237 = (clet == 'r' ? GENERAL_REGS : REG_CLASS_FROM_LETTER (clet));
1239 mark_target_live_regs (get_insns (), current_insn, &used);
1241 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1245 if (! TEST_HARD_REG_BIT (reg_class_contents[class], i))
1247 for (j = HARD_REGNO_NREGS (i, mode) - 1; j >= 0; j--)
1249 if (TEST_HARD_REG_BIT (*reg_set, i + j)
1250 || TEST_HARD_REG_BIT (used.regs, i + j))
1258 for (j = HARD_REGNO_NREGS (i, mode) - 1; j >= 0; j--)
1260 SET_HARD_REG_BIT (*reg_set, i + j);
1262 return gen_rtx_REG (mode, i);