1 /* Definitions for computing resource usage of specific insns.
2 Copyright (C) 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
26 #include "hard-reg-set.h"
27 #include "basic-block.h"
34 /* This structure is used to record liveness information at the targets or
35 fallthrough insns of branches. We will most likely need the information
36 at targets again, so save them in a hash table rather than recomputing them
41 int uid; /* INSN_UID of target. */
42 struct target_info *next; /* Next info for same hash bucket. */
43 HARD_REG_SET live_regs; /* Registers live at target. */
44 int block; /* Basic block number containing target. */
45 int bb_tick; /* Generation count of basic block info. */
48 #define TARGET_HASH_PRIME 257
50 /* Indicates what resources are required at the beginning of the epilogue. */
51 static struct resources start_of_epilogue_needs;
53 /* Indicates what resources are required at function end. */
54 static struct resources end_of_function_needs;
56 /* Define the hash table itself. */
57 static struct target_info **target_hash_table = NULL;
59 /* For each basic block, we maintain a generation number of its basic
60 block info, which is updated each time we move an insn from the
61 target of a jump. This is the generation number indexed by block
66 /* Marks registers possibly live at the current place being scanned by
67 mark_target_live_regs. Used only by next two function. */
69 static HARD_REG_SET current_live_regs;
71 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
72 Also only used by the next two functions. */
74 static HARD_REG_SET pending_dead_regs;
76 static void update_live_status PROTO ((rtx, rtx, void *));
77 static int find_basic_block PROTO ((rtx));
78 static rtx next_insn_no_annul PROTO ((rtx));
79 static rtx find_dead_or_set_registers PROTO ((rtx, struct resources*,
80 rtx*, int, struct resources,
83 /* Utility function called from mark_target_live_regs via note_stores.
84 It deadens any CLOBBERed registers and livens any SET registers. */
87 update_live_status (dest, x, data)
90 void *data ATTRIBUTE_UNUSED;
92 int first_regno, last_regno;
95 if (GET_CODE (dest) != REG
96 && (GET_CODE (dest) != SUBREG || GET_CODE (SUBREG_REG (dest)) != REG))
99 if (GET_CODE (dest) == SUBREG)
100 first_regno = REGNO (SUBREG_REG (dest)) + SUBREG_WORD (dest);
102 first_regno = REGNO (dest);
104 last_regno = first_regno + HARD_REGNO_NREGS (first_regno, GET_MODE (dest));
106 if (GET_CODE (x) == CLOBBER)
107 for (i = first_regno; i < last_regno; i++)
108 CLEAR_HARD_REG_BIT (current_live_regs, i);
110 for (i = first_regno; i < last_regno; i++)
112 SET_HARD_REG_BIT (current_live_regs, i);
113 CLEAR_HARD_REG_BIT (pending_dead_regs, i);
116 /* Find the number of the basic block that starts closest to INSN. Return -1
117 if we couldn't find such a basic block. */
120 find_basic_block (insn)
125 /* Scan backwards to the previous BARRIER. Then see if we can find a
126 label that starts a basic block. Return the basic block number. */
128 for (insn = prev_nonnote_insn (insn);
129 insn && GET_CODE (insn) != BARRIER;
130 insn = prev_nonnote_insn (insn))
133 /* The start of the function is basic block zero. */
137 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach
138 anything other than a CODE_LABEL or note, we can't find this code. */
139 for (insn = next_nonnote_insn (insn);
140 insn && GET_CODE (insn) == CODE_LABEL;
141 insn = next_nonnote_insn (insn))
143 for (i = 0; i < n_basic_blocks; i++)
144 if (insn == BLOCK_HEAD (i))
151 /* Similar to next_insn, but ignores insns in the delay slots of
152 an annulled branch. */
155 next_insn_no_annul (insn)
160 /* If INSN is an annulled branch, skip any insns from the target
162 if (INSN_ANNULLED_BRANCH_P (insn)
163 && NEXT_INSN (PREV_INSN (insn)) != insn)
164 while (INSN_FROM_TARGET_P (NEXT_INSN (insn)))
165 insn = NEXT_INSN (insn);
167 insn = NEXT_INSN (insn);
168 if (insn && GET_CODE (insn) == INSN
169 && GET_CODE (PATTERN (insn)) == SEQUENCE)
170 insn = XVECEXP (PATTERN (insn), 0, 0);
176 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
177 which resources are references by the insn. If INCLUDE_DELAYED_EFFECTS
178 is TRUE, resources used by the called routine will be included for
182 mark_referenced_resources (x, res, include_delayed_effects)
184 register struct resources *res;
185 register int include_delayed_effects;
187 register enum rtx_code code = GET_CODE (x);
189 register const char *format_ptr;
191 /* Handle leaf items for which we set resource flags. Also, special-case
192 CALL, SET and CLOBBER operators. */
204 if (GET_CODE (SUBREG_REG (x)) != REG)
205 mark_referenced_resources (SUBREG_REG (x), res, 0);
208 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
209 int last_regno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
210 for (i = regno; i < last_regno; i++)
211 SET_HARD_REG_BIT (res->regs, i);
216 for (i = 0; i < HARD_REGNO_NREGS (REGNO (x), GET_MODE (x)); i++)
217 SET_HARD_REG_BIT (res->regs, REGNO (x) + i);
221 /* If this memory shouldn't change, it really isn't referencing
223 if (RTX_UNCHANGING_P (x))
224 res->unch_memory = 1;
227 res->volatil |= MEM_VOLATILE_P (x);
229 /* Mark registers used to access memory. */
230 mark_referenced_resources (XEXP (x, 0), res, 0);
237 case UNSPEC_VOLATILE:
239 /* Traditional asm's are always volatile. */
248 res->volatil |= MEM_VOLATILE_P (x);
250 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
251 We can not just fall through here since then we would be confused
252 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
253 traditional asms unlike their normal usage. */
255 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
256 mark_referenced_resources (ASM_OPERANDS_INPUT (x, i), res, 0);
260 /* The first operand will be a (MEM (xxx)) but doesn't really reference
261 memory. The second operand may be referenced, though. */
262 mark_referenced_resources (XEXP (XEXP (x, 0), 0), res, 0);
263 mark_referenced_resources (XEXP (x, 1), res, 0);
267 /* Usually, the first operand of SET is set, not referenced. But
268 registers used to access memory are referenced. SET_DEST is
269 also referenced if it is a ZERO_EXTRACT or SIGN_EXTRACT. */
271 mark_referenced_resources (SET_SRC (x), res, 0);
274 if (GET_CODE (x) == SIGN_EXTRACT || GET_CODE (x) == ZERO_EXTRACT)
275 mark_referenced_resources (x, res, 0);
276 else if (GET_CODE (x) == SUBREG)
278 if (GET_CODE (x) == MEM)
279 mark_referenced_resources (XEXP (x, 0), res, 0);
286 if (include_delayed_effects)
288 /* A CALL references memory, the frame pointer if it exists, the
289 stack pointer, any global registers and any registers given in
290 USE insns immediately in front of the CALL.
292 However, we may have moved some of the parameter loading insns
293 into the delay slot of this CALL. If so, the USE's for them
294 don't count and should be skipped. */
295 rtx insn = PREV_INSN (x);
298 rtx next = NEXT_INSN (x);
301 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
302 if (NEXT_INSN (insn) != x)
304 next = NEXT_INSN (NEXT_INSN (insn));
305 sequence = PATTERN (NEXT_INSN (insn));
306 seq_size = XVECLEN (sequence, 0);
307 if (GET_CODE (sequence) != SEQUENCE)
312 SET_HARD_REG_BIT (res->regs, STACK_POINTER_REGNUM);
313 if (frame_pointer_needed)
315 SET_HARD_REG_BIT (res->regs, FRAME_POINTER_REGNUM);
316 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
317 SET_HARD_REG_BIT (res->regs, HARD_FRAME_POINTER_REGNUM);
321 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
323 SET_HARD_REG_BIT (res->regs, i);
325 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
326 assume that this call can need any register.
328 This is done to be more conservative about how we handle setjmp.
329 We assume that they both use and set all registers. Using all
330 registers ensures that a register will not be considered dead
331 just because it crosses a setjmp call. A register should be
332 considered dead only if the setjmp call returns non-zero. */
333 if (next && GET_CODE (next) == NOTE
334 && NOTE_LINE_NUMBER (next) == NOTE_INSN_SETJMP)
335 SET_HARD_REG_SET (res->regs);
340 for (link = CALL_INSN_FUNCTION_USAGE (x);
342 link = XEXP (link, 1))
343 if (GET_CODE (XEXP (link, 0)) == USE)
345 for (i = 1; i < seq_size; i++)
347 rtx slot_pat = PATTERN (XVECEXP (sequence, 0, i));
348 if (GET_CODE (slot_pat) == SET
349 && rtx_equal_p (SET_DEST (slot_pat),
350 SET_DEST (XEXP (link, 0))))
354 mark_referenced_resources (SET_DEST (XEXP (link, 0)),
360 /* ... fall through to other INSN processing ... */
365 #ifdef INSN_REFERENCES_ARE_DELAYED
366 if (! include_delayed_effects
367 && INSN_REFERENCES_ARE_DELAYED (x))
371 /* No special processing, just speed up. */
372 mark_referenced_resources (PATTERN (x), res, include_delayed_effects);
379 /* Process each sub-expression and flag what it needs. */
380 format_ptr = GET_RTX_FORMAT (code);
381 for (i = 0; i < GET_RTX_LENGTH (code); i++)
382 switch (*format_ptr++)
385 mark_referenced_resources (XEXP (x, i), res, include_delayed_effects);
389 for (j = 0; j < XVECLEN (x, i); j++)
390 mark_referenced_resources (XVECEXP (x, i, j), res,
391 include_delayed_effects);
396 /* A subroutine of mark_target_live_regs. Search forward from TARGET
397 looking for registers that are set before they are used. These are dead.
398 Stop after passing a few conditional jumps, and/or a small
399 number of unconditional branches. */
402 find_dead_or_set_registers (target, res, jump_target, jump_count, set, needed)
404 struct resources *res;
407 struct resources set, needed;
409 HARD_REG_SET scratch;
414 for (insn = target; insn; insn = next)
416 rtx this_jump_insn = insn;
418 next = NEXT_INSN (insn);
419 switch (GET_CODE (insn))
422 /* After a label, any pending dead registers that weren't yet
423 used can be made dead. */
424 AND_COMPL_HARD_REG_SET (pending_dead_regs, needed.regs);
425 AND_COMPL_HARD_REG_SET (res->regs, pending_dead_regs);
426 CLEAR_HARD_REG_SET (pending_dead_regs);
435 if (GET_CODE (PATTERN (insn)) == USE)
437 /* If INSN is a USE made by update_block, we care about the
438 underlying insn. Any registers set by the underlying insn
439 are live since the insn is being done somewhere else. */
440 if (GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn), 0))) == 'i')
441 mark_set_resources (XEXP (PATTERN (insn), 0), res, 0, 1);
443 /* All other USE insns are to be ignored. */
446 else if (GET_CODE (PATTERN (insn)) == CLOBBER)
448 else if (GET_CODE (PATTERN (insn)) == SEQUENCE)
450 /* An unconditional jump can be used to fill the delay slot
451 of a call, so search for a JUMP_INSN in any position. */
452 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
454 this_jump_insn = XVECEXP (PATTERN (insn), 0, i);
455 if (GET_CODE (this_jump_insn) == JUMP_INSN)
464 if (GET_CODE (this_jump_insn) == JUMP_INSN)
466 if (jump_count++ < 10)
468 if (simplejump_p (this_jump_insn)
469 || GET_CODE (PATTERN (this_jump_insn)) == RETURN)
471 next = JUMP_LABEL (this_jump_insn);
476 *jump_target = JUMP_LABEL (this_jump_insn);
479 else if (condjump_p (this_jump_insn)
480 || condjump_in_parallel_p (this_jump_insn))
482 struct resources target_set, target_res;
483 struct resources fallthrough_res;
485 /* We can handle conditional branches here by following
486 both paths, and then IOR the results of the two paths
487 together, which will give us registers that are dead
488 on both paths. Since this is expensive, we give it
489 a much higher cost than unconditional branches. The
490 cost was chosen so that we will follow at most 1
491 conditional branch. */
494 if (jump_count >= 10)
497 mark_referenced_resources (insn, &needed, 1);
499 /* For an annulled branch, mark_set_resources ignores slots
500 filled by instructions from the target. This is correct
501 if the branch is not taken. Since we are following both
502 paths from the branch, we must also compute correct info
503 if the branch is taken. We do this by inverting all of
504 the INSN_FROM_TARGET_P bits, calling mark_set_resources,
505 and then inverting the INSN_FROM_TARGET_P bits again. */
507 if (GET_CODE (PATTERN (insn)) == SEQUENCE
508 && INSN_ANNULLED_BRANCH_P (this_jump_insn))
510 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
511 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
512 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
515 mark_set_resources (insn, &target_set, 0, 1);
517 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
518 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
519 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
521 mark_set_resources (insn, &set, 0, 1);
525 mark_set_resources (insn, &set, 0, 1);
530 COPY_HARD_REG_SET (scratch, target_set.regs);
531 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
532 AND_COMPL_HARD_REG_SET (target_res.regs, scratch);
534 fallthrough_res = *res;
535 COPY_HARD_REG_SET (scratch, set.regs);
536 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
537 AND_COMPL_HARD_REG_SET (fallthrough_res.regs, scratch);
539 find_dead_or_set_registers (JUMP_LABEL (this_jump_insn),
540 &target_res, 0, jump_count,
542 find_dead_or_set_registers (next,
543 &fallthrough_res, 0, jump_count,
545 IOR_HARD_REG_SET (fallthrough_res.regs, target_res.regs);
546 AND_HARD_REG_SET (res->regs, fallthrough_res.regs);
554 /* Don't try this optimization if we expired our jump count
555 above, since that would mean there may be an infinite loop
556 in the function being compiled. */
562 mark_referenced_resources (insn, &needed, 1);
563 mark_set_resources (insn, &set, 0, 1);
565 COPY_HARD_REG_SET (scratch, set.regs);
566 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
567 AND_COMPL_HARD_REG_SET (res->regs, scratch);
573 /* Given X, a part of an insn, and a pointer to a `struct resource',
574 RES, indicate which resources are modified by the insn. If
575 INCLUDE_DELAYED_EFFECTS is nonzero, also mark resources potentially
576 set by the called routine.
578 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
579 objects are being referenced instead of set.
581 We never mark the insn as modifying the condition code unless it explicitly
582 SETs CC0 even though this is not totally correct. The reason for this is
583 that we require a SET of CC0 to immediately precede the reference to CC0.
584 So if some other insn sets CC0 as a side-effect, we know it cannot affect
585 our computation and thus may be placed in a delay slot. */
588 mark_set_resources (x, res, in_dest, include_delayed_effects)
590 register struct resources *res;
592 int include_delayed_effects;
594 register enum rtx_code code;
596 register const char *format_ptr;
614 /* These don't set any resources. */
623 /* Called routine modifies the condition code, memory, any registers
624 that aren't saved across calls, global registers and anything
625 explicitly CLOBBERed immediately after the CALL_INSN. */
627 if (include_delayed_effects)
629 rtx next = NEXT_INSN (x);
630 rtx prev = PREV_INSN (x);
633 res->cc = res->memory = 1;
634 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
635 if (call_used_regs[i] || global_regs[i])
636 SET_HARD_REG_BIT (res->regs, i);
638 /* If X is part of a delay slot sequence, then NEXT should be
639 the first insn after the sequence. */
640 if (NEXT_INSN (prev) != x)
641 next = NEXT_INSN (NEXT_INSN (prev));
643 for (link = CALL_INSN_FUNCTION_USAGE (x);
644 link; link = XEXP (link, 1))
645 if (GET_CODE (XEXP (link, 0)) == CLOBBER)
646 mark_set_resources (SET_DEST (XEXP (link, 0)), res, 1, 0);
648 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
649 assume that this call can clobber any register. */
650 if (next && GET_CODE (next) == NOTE
651 && NOTE_LINE_NUMBER (next) == NOTE_INSN_SETJMP)
652 SET_HARD_REG_SET (res->regs);
655 /* ... and also what its RTL says it modifies, if anything. */
660 /* An insn consisting of just a CLOBBER (or USE) is just for flow
661 and doesn't actually do anything, so we ignore it. */
663 #ifdef INSN_SETS_ARE_DELAYED
664 if (! include_delayed_effects
665 && INSN_SETS_ARE_DELAYED (x))
670 if (GET_CODE (x) != USE && GET_CODE (x) != CLOBBER)
675 /* If the source of a SET is a CALL, this is actually done by
676 the called routine. So only include it if we are to include the
677 effects of the calling routine. */
679 mark_set_resources (SET_DEST (x), res,
680 (include_delayed_effects
681 || GET_CODE (SET_SRC (x)) != CALL),
684 mark_set_resources (SET_SRC (x), res, 0, 0);
688 mark_set_resources (XEXP (x, 0), res, 1, 0);
692 for (i = 0; i < XVECLEN (x, 0); i++)
693 if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x, 0, 0))
694 && INSN_FROM_TARGET_P (XVECEXP (x, 0, i))))
695 mark_set_resources (XVECEXP (x, 0, i), res, 0,
696 include_delayed_effects);
703 mark_set_resources (XEXP (x, 0), res, 1, 0);
707 mark_set_resources (XEXP (x, 0), res, in_dest, 0);
708 mark_set_resources (XEXP (x, 1), res, 0, 0);
709 mark_set_resources (XEXP (x, 2), res, 0, 0);
716 res->unch_memory |= RTX_UNCHANGING_P (x);
717 res->volatil |= MEM_VOLATILE_P (x);
720 mark_set_resources (XEXP (x, 0), res, 0, 0);
726 if (GET_CODE (SUBREG_REG (x)) != REG)
727 mark_set_resources (SUBREG_REG (x), res,
728 in_dest, include_delayed_effects);
731 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
732 int last_regno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
733 for (i = regno; i < last_regno; i++)
734 SET_HARD_REG_BIT (res->regs, i);
741 for (i = 0; i < HARD_REGNO_NREGS (REGNO (x), GET_MODE (x)); i++)
742 SET_HARD_REG_BIT (res->regs, REGNO (x) + i);
745 case UNSPEC_VOLATILE:
747 /* Traditional asm's are always volatile. */
756 res->volatil |= MEM_VOLATILE_P (x);
758 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
759 We can not just fall through here since then we would be confused
760 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
761 traditional asms unlike their normal usage. */
763 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
764 mark_set_resources (ASM_OPERANDS_INPUT (x, i), res, in_dest, 0);
771 /* Process each sub-expression and flag what it needs. */
772 format_ptr = GET_RTX_FORMAT (code);
773 for (i = 0; i < GET_RTX_LENGTH (code); i++)
774 switch (*format_ptr++)
777 mark_set_resources (XEXP (x, i), res, in_dest, include_delayed_effects);
781 for (j = 0; j < XVECLEN (x, i); j++)
782 mark_set_resources (XVECEXP (x, i, j), res, in_dest,
783 include_delayed_effects);
788 /* Set the resources that are live at TARGET.
790 If TARGET is zero, we refer to the end of the current function and can
791 return our precomputed value.
793 Otherwise, we try to find out what is live by consulting the basic block
794 information. This is tricky, because we must consider the actions of
795 reload and jump optimization, which occur after the basic block information
798 Accordingly, we proceed as follows::
800 We find the previous BARRIER and look at all immediately following labels
801 (with no intervening active insns) to see if any of them start a basic
802 block. If we hit the start of the function first, we use block 0.
804 Once we have found a basic block and a corresponding first insns, we can
805 accurately compute the live status from basic_block_live_regs and
806 reg_renumber. (By starting at a label following a BARRIER, we are immune
807 to actions taken by reload and jump.) Then we scan all insns between
808 that point and our target. For each CLOBBER (or for call-clobbered regs
809 when we pass a CALL_INSN), mark the appropriate registers are dead. For
810 a SET, mark them as live.
812 We have to be careful when using REG_DEAD notes because they are not
813 updated by such things as find_equiv_reg. So keep track of registers
814 marked as dead that haven't been assigned to, and mark them dead at the
815 next CODE_LABEL since reload and jump won't propagate values across labels.
817 If we cannot find the start of a basic block (should be a very rare
818 case, if it can happen at all), mark everything as potentially live.
820 Next, scan forward from TARGET looking for things set or clobbered
821 before they are used. These are not live.
823 Because we can be called many times on the same target, save our results
824 in a hash table indexed by INSN_UID. This is only done if the function
825 init_resource_info () was invoked before we are called. */
828 mark_target_live_regs (insns, target, res)
831 struct resources *res;
835 struct target_info *tinfo = NULL;
839 HARD_REG_SET scratch;
840 struct resources set, needed;
842 /* Handle end of function. */
845 *res = end_of_function_needs;
849 /* We have to assume memory is needed, but the CC isn't. */
851 res->volatil = res->unch_memory = 0;
854 /* See if we have computed this value already. */
855 if (target_hash_table != NULL)
857 for (tinfo = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
858 tinfo; tinfo = tinfo->next)
859 if (tinfo->uid == INSN_UID (target))
862 /* Start by getting the basic block number. If we have saved
863 information, we can get it from there unless the insn at the
864 start of the basic block has been deleted. */
865 if (tinfo && tinfo->block != -1
866 && ! INSN_DELETED_P (BLOCK_HEAD (tinfo->block)))
871 b = find_basic_block (target);
873 if (target_hash_table != NULL)
877 /* If the information is up-to-date, use it. Otherwise, we will
879 if (b == tinfo->block && b != -1 && tinfo->bb_tick == bb_ticks[b])
881 COPY_HARD_REG_SET (res->regs, tinfo->live_regs);
887 /* Allocate a place to put our results and chain it into the
889 tinfo = (struct target_info *) oballoc (sizeof (struct target_info));
890 tinfo->uid = INSN_UID (target);
892 tinfo->next = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
893 target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME] = tinfo;
897 CLEAR_HARD_REG_SET (pending_dead_regs);
899 /* If we found a basic block, get the live registers from it and update
900 them with anything set or killed between its start and the insn before
901 TARGET. Otherwise, we must assume everything is live. */
904 regset regs_live = BASIC_BLOCK (b)->global_live_at_start;
907 rtx start_insn, stop_insn;
909 /* Compute hard regs live at start of block -- this is the real hard regs
910 marked live, plus live pseudo regs that have been renumbered to
913 REG_SET_TO_HARD_REG_SET (current_live_regs, regs_live);
915 EXECUTE_IF_SET_IN_REG_SET
916 (regs_live, FIRST_PSEUDO_REGISTER, i,
918 if ((regno = reg_renumber[i]) >= 0)
920 j < regno + HARD_REGNO_NREGS (regno,
921 PSEUDO_REGNO_MODE (i));
923 SET_HARD_REG_BIT (current_live_regs, j);
926 /* Get starting and ending insn, handling the case where each might
928 start_insn = (b == 0 ? insns : BLOCK_HEAD (b));
931 if (GET_CODE (start_insn) == INSN
932 && GET_CODE (PATTERN (start_insn)) == SEQUENCE)
933 start_insn = XVECEXP (PATTERN (start_insn), 0, 0);
935 if (GET_CODE (stop_insn) == INSN
936 && GET_CODE (PATTERN (stop_insn)) == SEQUENCE)
937 stop_insn = next_insn (PREV_INSN (stop_insn));
939 for (insn = start_insn; insn != stop_insn;
940 insn = next_insn_no_annul (insn))
943 rtx real_insn = insn;
945 /* If this insn is from the target of a branch, it isn't going to
946 be used in the sequel. If it is used in both cases, this
947 test will not be true. */
948 if (INSN_FROM_TARGET_P (insn))
951 /* If this insn is a USE made by update_block, we care about the
953 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == USE
954 && GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn), 0))) == 'i')
955 real_insn = XEXP (PATTERN (insn), 0);
957 if (GET_CODE (real_insn) == CALL_INSN)
959 /* CALL clobbers all call-used regs that aren't fixed except
960 sp, ap, and fp. Do this before setting the result of the
962 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
963 if (call_used_regs[i]
964 && i != STACK_POINTER_REGNUM && i != FRAME_POINTER_REGNUM
965 && i != ARG_POINTER_REGNUM
966 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
967 && i != HARD_FRAME_POINTER_REGNUM
969 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
970 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
972 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
973 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
976 CLEAR_HARD_REG_BIT (current_live_regs, i);
978 /* A CALL_INSN sets any global register live, since it may
979 have been modified by the call. */
980 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
982 SET_HARD_REG_BIT (current_live_regs, i);
985 /* Mark anything killed in an insn to be deadened at the next
986 label. Ignore USE insns; the only REG_DEAD notes will be for
987 parameters. But they might be early. A CALL_INSN will usually
988 clobber registers used for parameters. It isn't worth bothering
989 with the unlikely case when it won't. */
990 if ((GET_CODE (real_insn) == INSN
991 && GET_CODE (PATTERN (real_insn)) != USE
992 && GET_CODE (PATTERN (real_insn)) != CLOBBER)
993 || GET_CODE (real_insn) == JUMP_INSN
994 || GET_CODE (real_insn) == CALL_INSN)
996 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
997 if (REG_NOTE_KIND (link) == REG_DEAD
998 && GET_CODE (XEXP (link, 0)) == REG
999 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1001 int first_regno = REGNO (XEXP (link, 0));
1004 + HARD_REGNO_NREGS (first_regno,
1005 GET_MODE (XEXP (link, 0))));
1007 for (i = first_regno; i < last_regno; i++)
1008 SET_HARD_REG_BIT (pending_dead_regs, i);
1011 note_stores (PATTERN (real_insn), update_live_status, NULL);
1013 /* If any registers were unused after this insn, kill them.
1014 These notes will always be accurate. */
1015 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1016 if (REG_NOTE_KIND (link) == REG_UNUSED
1017 && GET_CODE (XEXP (link, 0)) == REG
1018 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1020 int first_regno = REGNO (XEXP (link, 0));
1023 + HARD_REGNO_NREGS (first_regno,
1024 GET_MODE (XEXP (link, 0))));
1026 for (i = first_regno; i < last_regno; i++)
1027 CLEAR_HARD_REG_BIT (current_live_regs, i);
1031 else if (GET_CODE (real_insn) == CODE_LABEL)
1033 /* A label clobbers the pending dead registers since neither
1034 reload nor jump will propagate a value across a label. */
1035 AND_COMPL_HARD_REG_SET (current_live_regs, pending_dead_regs);
1036 CLEAR_HARD_REG_SET (pending_dead_regs);
1039 /* The beginning of the epilogue corresponds to the end of the
1040 RTL chain when there are no epilogue insns. Certain resources
1041 are implicitly required at that point. */
1042 else if (GET_CODE (real_insn) == NOTE
1043 && NOTE_LINE_NUMBER (real_insn) == NOTE_INSN_EPILOGUE_BEG)
1044 IOR_HARD_REG_SET (current_live_regs, start_of_epilogue_needs.regs);
1047 COPY_HARD_REG_SET (res->regs, current_live_regs);
1051 tinfo->bb_tick = bb_ticks[b];
1055 /* We didn't find the start of a basic block. Assume everything
1056 in use. This should happen only extremely rarely. */
1057 SET_HARD_REG_SET (res->regs);
1059 CLEAR_RESOURCE (&set);
1060 CLEAR_RESOURCE (&needed);
1062 jump_insn = find_dead_or_set_registers (target, res, &jump_target, 0,
1065 /* If we hit an unconditional branch, we have another way of finding out
1066 what is live: we can see what is live at the branch target and include
1067 anything used but not set before the branch. We add the live
1068 resources found using the test below to those found until now. */
1072 struct resources new_resources;
1073 rtx stop_insn = next_active_insn (jump_insn);
1075 mark_target_live_regs (insns, next_active_insn (jump_target),
1077 CLEAR_RESOURCE (&set);
1078 CLEAR_RESOURCE (&needed);
1080 /* Include JUMP_INSN in the needed registers. */
1081 for (insn = target; insn != stop_insn; insn = next_active_insn (insn))
1083 mark_referenced_resources (insn, &needed, 1);
1085 COPY_HARD_REG_SET (scratch, needed.regs);
1086 AND_COMPL_HARD_REG_SET (scratch, set.regs);
1087 IOR_HARD_REG_SET (new_resources.regs, scratch);
1089 mark_set_resources (insn, &set, 0, 1);
1092 IOR_HARD_REG_SET (res->regs, new_resources.regs);
1097 COPY_HARD_REG_SET (tinfo->live_regs, res->regs);
1101 /* Initialize the resources required by mark_target_live_regs ().
1102 This should be invoked before the first call to mark_target_live_regs. */
1105 init_resource_info (epilogue_insn)
1110 /* Indicate what resources are required to be valid at the end of the current
1111 function. The condition code never is and memory always is. If the
1112 frame pointer is needed, it is and so is the stack pointer unless
1113 EXIT_IGNORE_STACK is non-zero. If the frame pointer is not needed, the
1114 stack pointer is. Registers used to return the function value are
1115 needed. Registers holding global variables are needed. */
1117 end_of_function_needs.cc = 0;
1118 end_of_function_needs.memory = 1;
1119 end_of_function_needs.unch_memory = 0;
1120 CLEAR_HARD_REG_SET (end_of_function_needs.regs);
1122 if (frame_pointer_needed)
1124 SET_HARD_REG_BIT (end_of_function_needs.regs, FRAME_POINTER_REGNUM);
1125 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
1126 SET_HARD_REG_BIT (end_of_function_needs.regs, HARD_FRAME_POINTER_REGNUM);
1128 #ifdef EXIT_IGNORE_STACK
1129 if (! EXIT_IGNORE_STACK
1130 || current_function_sp_is_unchanging)
1132 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1135 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1137 if (current_function_return_rtx != 0)
1138 mark_referenced_resources (current_function_return_rtx,
1139 &end_of_function_needs, 1);
1141 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1143 #ifdef EPILOGUE_USES
1144 || EPILOGUE_USES (i)
1147 SET_HARD_REG_BIT (end_of_function_needs.regs, i);
1149 /* The registers required to be live at the end of the function are
1150 represented in the flow information as being dead just prior to
1151 reaching the end of the function. For example, the return of a value
1152 might be represented by a USE of the return register immediately
1153 followed by an unconditional jump to the return label where the
1154 return label is the end of the RTL chain. The end of the RTL chain
1155 is then taken to mean that the return register is live.
1157 This sequence is no longer maintained when epilogue instructions are
1158 added to the RTL chain. To reconstruct the original meaning, the
1159 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
1160 point where these registers become live (start_of_epilogue_needs).
1161 If epilogue instructions are present, the registers set by those
1162 instructions won't have been processed by flow. Thus, those
1163 registers are additionally required at the end of the RTL chain
1164 (end_of_function_needs). */
1166 start_of_epilogue_needs = end_of_function_needs;
1168 while ((epilogue_insn = next_nonnote_insn (epilogue_insn)))
1169 mark_set_resources (epilogue_insn, &end_of_function_needs, 0, 1);
1171 /* Allocate and initialize the tables used by mark_target_live_regs. */
1172 target_hash_table = (struct target_info **)
1173 xcalloc (TARGET_HASH_PRIME, sizeof (struct target_info *));
1174 bb_ticks = (int *) xcalloc (n_basic_blocks, sizeof (int));
1177 /* Free up the resources allcated to mark_target_live_regs (). This
1178 should be invoked after the last call to mark_target_live_regs (). */
1181 free_resource_info ()
1183 if (target_hash_table != NULL)
1185 free (target_hash_table);
1186 target_hash_table = NULL;
1189 if (bb_ticks != NULL)
1196 /* Clear any hashed information that we have stored for INSN. */
1199 clear_hashed_info_for_insn (insn)
1202 struct target_info *tinfo;
1204 if (target_hash_table != NULL)
1206 for (tinfo = target_hash_table[INSN_UID (insn) % TARGET_HASH_PRIME];
1207 tinfo; tinfo = tinfo->next)
1208 if (tinfo->uid == INSN_UID (insn))
1216 /* Increment the tick count for the basic block that contains INSN. */
1219 incr_ticks_for_insn (insn)
1222 int b = find_basic_block (insn);
1228 /* Add TRIAL to the set of resources used at the end of the current
1231 mark_end_of_function_resources (trial, include_delayed_effects)
1233 int include_delayed_effects;
1235 mark_referenced_resources (trial, &end_of_function_needs,
1236 include_delayed_effects);
1239 /* Try to find a hard register of mode MODE, matching the register class in
1240 CLASS_STR, which is available at the beginning of insn CURRENT_INSN and
1241 remains available until the end of LAST_INSN. LAST_INSN may be NULL_RTX,
1242 in which case the only condition is that the register must be available
1243 before CURRENT_INSN.
1244 Registers that already have bits set in REG_SET will not be considered.
1246 If an appropriate register is available, it will be returned and the
1247 corresponding bit(s) in REG_SET will be set; otherwise, NULL_RTX is
1251 find_free_register (current_insn, last_insn, class_str, mode, reg_set)
1252 rtx current_insn, last_insn;
1253 const char *class_str;
1255 HARD_REG_SET *reg_set;
1258 struct resources used;
1259 unsigned char clet = class_str[0];
1260 enum reg_class class
1261 = (clet == 'r' ? GENERAL_REGS : REG_CLASS_FROM_LETTER (clet));
1263 mark_target_live_regs (get_insns (), current_insn, &used);
1265 while (current_insn != last_insn)
1267 /* Exclude anything set in this insn. */
1268 mark_set_resources (PATTERN (current_insn), &used, 0, 1);
1269 current_insn = next_nonnote_insn (current_insn);
1273 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1278 #ifdef REG_ALLOC_ORDER
1279 regno = reg_alloc_order [i];
1284 /* Don't allocate fixed registers. */
1285 if (fixed_regs[regno])
1287 /* Make sure the register is of the right class. */
1288 if (! TEST_HARD_REG_BIT (reg_class_contents[class], regno))
1290 /* And can support the mode we need. */
1291 if (! HARD_REGNO_MODE_OK (regno, mode))
1293 /* And that we don't create an extra save/restore. */
1294 if (! call_used_regs[regno] && ! regs_ever_live[regno])
1296 /* And we don't clobber traceback for noreturn functions. */
1297 if ((regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM)
1298 && (! reload_completed || frame_pointer_needed))
1302 for (j = HARD_REGNO_NREGS (regno, mode) - 1; j >= 0; j--)
1304 if (TEST_HARD_REG_BIT (*reg_set, regno + j)
1305 || TEST_HARD_REG_BIT (used.regs, regno + j))
1313 for (j = HARD_REGNO_NREGS (regno, mode) - 1; j >= 0; j--)
1315 SET_HARD_REG_BIT (*reg_set, regno + j);
1317 return gen_rtx_REG (mode, regno);
1323 /* Return true if REG is dead at CURRENT_INSN. */
1326 reg_dead_p (current_insn, reg)
1327 rtx current_insn, reg;
1329 struct resources used;
1332 mark_target_live_regs (get_insns (), current_insn, &used);
1334 regno = REGNO (reg);
1335 for (j = HARD_REGNO_NREGS (regno, GET_MODE (reg)) - 1; j >= 0; j--)
1337 if (TEST_HARD_REG_BIT (used.regs, regno + j))