1 /* Perform instruction reorganizations for delay slot filling.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
4 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu).
5 Hacked by Michael Tiemann (tiemann@cygnus.com).
7 This file is part of GNU CC.
9 GNU CC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
14 GNU CC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GNU CC; see the file COPYING. If not, write to
21 the Free Software Foundation, 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
24 /* Instruction reorganization pass.
26 This pass runs after register allocation and final jump
27 optimization. It should be the last pass to run before peephole.
28 It serves primarily to fill delay slots of insns, typically branch
29 and call insns. Other insns typically involve more complicated
30 interactions of data dependencies and resource constraints, and
31 are better handled by scheduling before register allocation (by the
32 function `schedule_insns').
34 The Branch Penalty is the number of extra cycles that are needed to
35 execute a branch insn. On an ideal machine, branches take a single
36 cycle, and the Branch Penalty is 0. Several RISC machines approach
37 branch delays differently:
39 The MIPS and AMD 29000 have a single branch delay slot. Most insns
40 (except other branches) can be used to fill this slot. When the
41 slot is filled, two insns execute in two cycles, reducing the
42 branch penalty to zero.
44 The Motorola 88000 conditionally exposes its branch delay slot,
45 so code is shorter when it is turned off, but will run faster
46 when useful insns are scheduled there.
48 The IBM ROMP has two forms of branch and call insns, both with and
49 without a delay slot. Much like the 88k, insns not using the delay
50 slot can be shorted (2 bytes vs. 4 bytes), but will run slowed.
52 The SPARC always has a branch delay slot, but its effects can be
53 annulled when the branch is not taken. This means that failing to
54 find other sources of insns, we can hoist an insn from the branch
55 target that would only be safe to execute knowing that the branch
58 The HP-PA always has a branch delay slot. For unconditional branches
59 its effects can be annulled when the branch is taken. The effects
60 of the delay slot in a conditional branch can be nullified for forward
61 taken branches, or for untaken backward branches. This means
62 we can hoist insns from the fall-through path for forward branches or
63 steal insns from the target of backward branches.
65 The TMS320C3x and C4x have three branch delay slots. When the three
66 slots are filled, the branch penalty is zero. Most insns can fill the
67 delay slots except jump insns.
69 Three techniques for filling delay slots have been implemented so far:
71 (1) `fill_simple_delay_slots' is the simplest, most efficient way
72 to fill delay slots. This pass first looks for insns which come
73 from before the branch and which are safe to execute after the
74 branch. Then it searches after the insn requiring delay slots or,
75 in the case of a branch, for insns that are after the point at
76 which the branch merges into the fallthrough code, if such a point
77 exists. When such insns are found, the branch penalty decreases
78 and no code expansion takes place.
80 (2) `fill_eager_delay_slots' is more complicated: it is used for
81 scheduling conditional jumps, or for scheduling jumps which cannot
82 be filled using (1). A machine need not have annulled jumps to use
83 this strategy, but it helps (by keeping more options open).
84 `fill_eager_delay_slots' tries to guess the direction the branch
85 will go; if it guesses right 100% of the time, it can reduce the
86 branch penalty as much as `fill_simple_delay_slots' does. If it
87 guesses wrong 100% of the time, it might as well schedule nops (or
88 on the m88k, unexpose the branch slot). When
89 `fill_eager_delay_slots' takes insns from the fall-through path of
90 the jump, usually there is no code expansion; when it takes insns
91 from the branch target, there is code expansion if it is not the
92 only way to reach that target.
94 (3) `relax_delay_slots' uses a set of rules to simplify code that
95 has been reorganized by (1) and (2). It finds cases where
96 conditional test can be eliminated, jumps can be threaded, extra
97 insns can be eliminated, etc. It is the job of (1) and (2) to do a
98 good job of scheduling locally; `relax_delay_slots' takes care of
99 making the various individual schedules work well together. It is
100 especially tuned to handle the control flow interactions of branch
101 insns. It does nothing for insns with delay slots that do not
104 On machines that use CC0, we are very conservative. We will not make
105 a copy of an insn involving CC0 since we want to maintain a 1-1
106 correspondence between the insn that sets and uses CC0. The insns are
107 allowed to be separated by placing an insn that sets CC0 (but not an insn
108 that uses CC0; we could do this, but it doesn't seem worthwhile) in a
109 delay slot. In that case, we point each insn at the other with REG_CC_USER
110 and REG_CC_SETTER notes. Note that these restrictions affect very few
111 machines because most RISC machines with delay slots will not use CC0
112 (the RT is the only known exception at this point).
116 The Acorn Risc Machine can conditionally execute most insns, so
117 it is profitable to move single insns into a position to execute
118 based on the condition code of the previous insn.
120 The HP-PA can conditionally nullify insns, providing a similar
121 effect to the ARM, differing mostly in which insn is "in charge". */
129 #include "function.h"
130 #include "insn-config.h"
131 #include "conditions.h"
132 #include "hard-reg-set.h"
133 #include "basic-block.h"
139 #include "insn-attr.h"
140 #include "resource.h"
145 #define obstack_chunk_alloc xmalloc
146 #define obstack_chunk_free free
148 #ifndef ANNUL_IFTRUE_SLOTS
149 #define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0
151 #ifndef ANNUL_IFFALSE_SLOTS
152 #define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0
155 /* Insns which have delay slots that have not yet been filled. */
157 static struct obstack unfilled_slots_obstack;
158 static rtx *unfilled_firstobj;
160 /* Define macros to refer to the first and last slot containing unfilled
161 insns. These are used because the list may move and its address
162 should be recomputed at each use. */
164 #define unfilled_slots_base \
165 ((rtx *) obstack_base (&unfilled_slots_obstack))
167 #define unfilled_slots_next \
168 ((rtx *) obstack_next_free (&unfilled_slots_obstack))
170 /* Points to the label before the end of the function. */
171 static rtx end_of_function_label;
173 /* Mapping between INSN_UID's and position in the code since INSN_UID's do
174 not always monotonically increase. */
175 static int *uid_to_ruid;
177 /* Highest valid index in `uid_to_ruid'. */
180 static int stop_search_p PARAMS ((rtx, int));
181 static int resource_conflicts_p PARAMS ((struct resources *,
182 struct resources *));
183 static int insn_references_resource_p PARAMS ((rtx, struct resources *, int));
184 static int insn_sets_resource_p PARAMS ((rtx, struct resources *, int));
185 static rtx find_end_label PARAMS ((void));
186 static rtx emit_delay_sequence PARAMS ((rtx, rtx, int));
187 static rtx add_to_delay_list PARAMS ((rtx, rtx));
188 static rtx delete_from_delay_slot PARAMS ((rtx));
189 static void delete_scheduled_jump PARAMS ((rtx));
190 static void note_delay_statistics PARAMS ((int, int));
191 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
192 static rtx optimize_skip PARAMS ((rtx));
194 static int get_jump_flags PARAMS ((rtx, rtx));
195 static int rare_destination PARAMS ((rtx));
196 static int mostly_true_jump PARAMS ((rtx, rtx));
197 static rtx get_branch_condition PARAMS ((rtx, rtx));
198 static int condition_dominates_p PARAMS ((rtx, rtx));
199 static int redirect_with_delay_slots_safe_p PARAMS ((rtx, rtx, rtx));
200 static int redirect_with_delay_list_safe_p PARAMS ((rtx, rtx, rtx));
201 static int check_annul_list_true_false PARAMS ((int, rtx));
202 static rtx steal_delay_list_from_target PARAMS ((rtx, rtx, rtx, rtx,
206 int, int *, int *, rtx *));
207 static rtx steal_delay_list_from_fallthrough PARAMS ((rtx, rtx, rtx, rtx,
212 static void try_merge_delay_insns PARAMS ((rtx, rtx));
213 static rtx redundant_insn PARAMS ((rtx, rtx, rtx));
214 static int own_thread_p PARAMS ((rtx, rtx, int));
215 static void update_block PARAMS ((rtx, rtx));
216 static int reorg_redirect_jump PARAMS ((rtx, rtx));
217 static void update_reg_dead_notes PARAMS ((rtx, rtx));
218 static void fix_reg_dead_note PARAMS ((rtx, rtx));
219 static void update_reg_unused_notes PARAMS ((rtx, rtx));
220 static void fill_simple_delay_slots PARAMS ((int));
221 static rtx fill_slots_from_thread PARAMS ((rtx, rtx, rtx, rtx, int, int,
222 int, int, int *, rtx));
223 static void fill_eager_delay_slots PARAMS ((void));
224 static void relax_delay_slots PARAMS ((rtx));
226 static void make_return_insns PARAMS ((rtx));
229 /* Return TRUE if this insn should stop the search for insn to fill delay
230 slots. LABELS_P indicates that labels should terminate the search.
231 In all cases, jumps terminate the search. */
234 stop_search_p (insn, labels_p)
241 switch (GET_CODE (insn))
255 /* OK unless it contains a delay slot or is an `asm' insn of some type.
256 We don't know anything about these. */
257 return (GET_CODE (PATTERN (insn)) == SEQUENCE
258 || GET_CODE (PATTERN (insn)) == ASM_INPUT
259 || asm_noperands (PATTERN (insn)) >= 0);
266 /* Return TRUE if any resources are marked in both RES1 and RES2 or if either
267 resource set contains a volatile memory reference. Otherwise, return FALSE. */
270 resource_conflicts_p (res1, res2)
271 struct resources *res1, *res2;
273 if ((res1->cc && res2->cc) || (res1->memory && res2->memory)
274 || (res1->unch_memory && res2->unch_memory)
275 || res1->volatil || res2->volatil)
279 return (res1->regs & res2->regs) != HARD_CONST (0);
284 for (i = 0; i < HARD_REG_SET_LONGS; i++)
285 if ((res1->regs[i] & res2->regs[i]) != 0)
292 /* Return TRUE if any resource marked in RES, a `struct resources', is
293 referenced by INSN. If INCLUDE_DELAYED_EFFECTS is set, return if the called
294 routine is using those resources.
296 We compute this by computing all the resources referenced by INSN and
297 seeing if this conflicts with RES. It might be faster to directly check
298 ourselves, and this is the way it used to work, but it means duplicating
299 a large block of complex code. */
302 insn_references_resource_p (insn, res, include_delayed_effects)
304 register struct resources *res;
305 int include_delayed_effects;
307 struct resources insn_res;
309 CLEAR_RESOURCE (&insn_res);
310 mark_referenced_resources (insn, &insn_res, include_delayed_effects);
311 return resource_conflicts_p (&insn_res, res);
314 /* Return TRUE if INSN modifies resources that are marked in RES.
315 INCLUDE_DELAYED_EFFECTS is set if the actions of that routine should be
316 included. CC0 is only modified if it is explicitly set; see comments
317 in front of mark_set_resources for details. */
320 insn_sets_resource_p (insn, res, include_delayed_effects)
322 register struct resources *res;
323 int include_delayed_effects;
325 struct resources insn_sets;
327 CLEAR_RESOURCE (&insn_sets);
328 mark_set_resources (insn, &insn_sets, 0, include_delayed_effects);
329 return resource_conflicts_p (&insn_sets, res);
332 /* Find a label at the end of the function or before a RETURN. If there is
340 /* If we found one previously, return it. */
341 if (end_of_function_label)
342 return end_of_function_label;
344 /* Otherwise, see if there is a label at the end of the function. If there
345 is, it must be that RETURN insns aren't needed, so that is our return
346 label and we don't have to do anything else. */
348 insn = get_last_insn ();
349 while (GET_CODE (insn) == NOTE
350 || (GET_CODE (insn) == INSN
351 && (GET_CODE (PATTERN (insn)) == USE
352 || GET_CODE (PATTERN (insn)) == CLOBBER)))
353 insn = PREV_INSN (insn);
355 /* When a target threads its epilogue we might already have a
356 suitable return insn. If so put a label before it for the
357 end_of_function_label. */
358 if (GET_CODE (insn) == BARRIER
359 && GET_CODE (PREV_INSN (insn)) == JUMP_INSN
360 && GET_CODE (PATTERN (PREV_INSN (insn))) == RETURN)
362 rtx temp = PREV_INSN (PREV_INSN (insn));
363 end_of_function_label = gen_label_rtx ();
364 LABEL_NUSES (end_of_function_label) = 0;
366 /* Put the label before an USE insns that may proceed the RETURN insn. */
367 while (GET_CODE (temp) == USE)
368 temp = PREV_INSN (temp);
370 emit_label_after (end_of_function_label, temp);
373 else if (GET_CODE (insn) == CODE_LABEL)
374 end_of_function_label = insn;
377 end_of_function_label = gen_label_rtx ();
378 LABEL_NUSES (end_of_function_label) = 0;
379 /* If the basic block reorder pass moves the return insn to
380 some other place try to locate it again and put our
381 end_of_function_label there. */
382 while (insn && ! (GET_CODE (insn) == JUMP_INSN
383 && (GET_CODE (PATTERN (insn)) == RETURN)))
384 insn = PREV_INSN (insn);
387 insn = PREV_INSN (insn);
389 /* Put the label before an USE insns that may proceed the
391 while (GET_CODE (insn) == USE)
392 insn = PREV_INSN (insn);
394 emit_label_after (end_of_function_label, insn);
398 /* Otherwise, make a new label and emit a RETURN and BARRIER,
400 emit_label (end_of_function_label);
404 /* The return we make may have delay slots too. */
405 rtx insn = gen_return ();
406 insn = emit_jump_insn (insn);
408 if (num_delay_slots (insn) > 0)
409 obstack_ptr_grow (&unfilled_slots_obstack, insn);
415 /* Show one additional use for this label so it won't go away until
417 ++LABEL_NUSES (end_of_function_label);
419 return end_of_function_label;
422 /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
423 the pattern of INSN with the SEQUENCE.
425 Chain the insns so that NEXT_INSN of each insn in the sequence points to
426 the next and NEXT_INSN of the last insn in the sequence points to
427 the first insn after the sequence. Similarly for PREV_INSN. This makes
428 it easier to scan all insns.
430 Returns the SEQUENCE that replaces INSN. */
433 emit_delay_sequence (insn, list, length)
442 /* Allocate the rtvec to hold the insns and the SEQUENCE. */
443 rtvec seqv = rtvec_alloc (length + 1);
444 rtx seq = gen_rtx_SEQUENCE (VOIDmode, seqv);
445 rtx seq_insn = make_insn_raw (seq);
446 rtx first = get_insns ();
447 rtx last = get_last_insn ();
449 /* Make a copy of the insn having delay slots. */
450 rtx delay_insn = copy_rtx (insn);
452 /* If INSN is followed by a BARRIER, delete the BARRIER since it will only
453 confuse further processing. Update LAST in case it was the last insn.
454 We will put the BARRIER back in later. */
455 if (NEXT_INSN (insn) && GET_CODE (NEXT_INSN (insn)) == BARRIER)
457 delete_insn (NEXT_INSN (insn));
458 last = get_last_insn ();
462 /* Splice our SEQUENCE into the insn stream where INSN used to be. */
463 NEXT_INSN (seq_insn) = NEXT_INSN (insn);
464 PREV_INSN (seq_insn) = PREV_INSN (insn);
467 PREV_INSN (NEXT_INSN (seq_insn)) = seq_insn;
470 NEXT_INSN (PREV_INSN (seq_insn)) = seq_insn;
472 /* Note the calls to set_new_first_and_last_insn must occur after
473 SEQ_INSN has been completely spliced into the insn stream.
475 Otherwise CUR_INSN_UID will get set to an incorrect value because
476 set_new_first_and_last_insn will not find SEQ_INSN in the chain. */
478 set_new_first_and_last_insn (first, seq_insn);
481 set_new_first_and_last_insn (seq_insn, last);
483 /* Build our SEQUENCE and rebuild the insn chain. */
484 XVECEXP (seq, 0, 0) = delay_insn;
485 INSN_DELETED_P (delay_insn) = 0;
486 PREV_INSN (delay_insn) = PREV_INSN (seq_insn);
488 for (li = list; li; li = XEXP (li, 1), i++)
490 rtx tem = XEXP (li, 0);
493 /* Show that this copy of the insn isn't deleted. */
494 INSN_DELETED_P (tem) = 0;
496 XVECEXP (seq, 0, i) = tem;
497 PREV_INSN (tem) = XVECEXP (seq, 0, i - 1);
498 NEXT_INSN (XVECEXP (seq, 0, i - 1)) = tem;
500 /* Remove any REG_DEAD notes because we can't rely on them now
501 that the insn has been moved. */
502 for (note = REG_NOTES (tem); note; note = XEXP (note, 1))
503 if (REG_NOTE_KIND (note) == REG_DEAD)
504 XEXP (note, 0) = const0_rtx;
507 NEXT_INSN (XVECEXP (seq, 0, length)) = NEXT_INSN (seq_insn);
509 /* If the previous insn is a SEQUENCE, update the NEXT_INSN pointer on the
510 last insn in that SEQUENCE to point to us. Similarly for the first
511 insn in the following insn if it is a SEQUENCE. */
513 if (PREV_INSN (seq_insn) && GET_CODE (PREV_INSN (seq_insn)) == INSN
514 && GET_CODE (PATTERN (PREV_INSN (seq_insn))) == SEQUENCE)
515 NEXT_INSN (XVECEXP (PATTERN (PREV_INSN (seq_insn)), 0,
516 XVECLEN (PATTERN (PREV_INSN (seq_insn)), 0) - 1))
519 if (NEXT_INSN (seq_insn) && GET_CODE (NEXT_INSN (seq_insn)) == INSN
520 && GET_CODE (PATTERN (NEXT_INSN (seq_insn))) == SEQUENCE)
521 PREV_INSN (XVECEXP (PATTERN (NEXT_INSN (seq_insn)), 0, 0)) = seq_insn;
523 /* If there used to be a BARRIER, put it back. */
525 emit_barrier_after (seq_insn);
533 /* Add INSN to DELAY_LIST and return the head of the new list. The list must
534 be in the order in which the insns are to be executed. */
537 add_to_delay_list (insn, delay_list)
541 /* If we have an empty list, just make a new list element. If
542 INSN has its block number recorded, clear it since we may
543 be moving the insn to a new block. */
547 clear_hashed_info_for_insn (insn);
548 return gen_rtx_INSN_LIST (VOIDmode, insn, NULL_RTX);
551 /* Otherwise this must be an INSN_LIST. Add INSN to the end of the
553 XEXP (delay_list, 1) = add_to_delay_list (insn, XEXP (delay_list, 1));
558 /* Delete INSN from the delay slot of the insn that it is in, which may
559 produce an insn with no delay slots. Return the new insn. */
562 delete_from_delay_slot (insn)
565 rtx trial, seq_insn, seq, prev;
569 /* We first must find the insn containing the SEQUENCE with INSN in its
570 delay slot. Do this by finding an insn, TRIAL, where
571 PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */
574 PREV_INSN (NEXT_INSN (trial)) == trial;
575 trial = NEXT_INSN (trial))
578 seq_insn = PREV_INSN (NEXT_INSN (trial));
579 seq = PATTERN (seq_insn);
581 /* Create a delay list consisting of all the insns other than the one
582 we are deleting (unless we were the only one). */
583 if (XVECLEN (seq, 0) > 2)
584 for (i = 1; i < XVECLEN (seq, 0); i++)
585 if (XVECEXP (seq, 0, i) != insn)
586 delay_list = add_to_delay_list (XVECEXP (seq, 0, i), delay_list);
588 /* Delete the old SEQUENCE, re-emit the insn that used to have the delay
589 list, and rebuild the delay list if non-empty. */
590 prev = PREV_INSN (seq_insn);
591 trial = XVECEXP (seq, 0, 0);
592 delete_insn (seq_insn);
593 add_insn_after (trial, prev);
595 if (GET_CODE (trial) == JUMP_INSN
596 && (simplejump_p (trial) || GET_CODE (PATTERN (trial)) == RETURN))
597 emit_barrier_after (trial);
599 /* If there are any delay insns, remit them. Otherwise clear the
602 trial = emit_delay_sequence (trial, delay_list, XVECLEN (seq, 0) - 2);
604 INSN_ANNULLED_BRANCH_P (trial) = 0;
606 INSN_FROM_TARGET_P (insn) = 0;
608 /* Show we need to fill this insn again. */
609 obstack_ptr_grow (&unfilled_slots_obstack, trial);
614 /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down
615 the insn that sets CC0 for it and delete it too. */
618 delete_scheduled_jump (insn)
621 /* Delete the insn that sets cc0 for us. On machines without cc0, we could
622 delete the insn that sets the condition code, but it is hard to find it.
623 Since this case is rare anyway, don't bother trying; there would likely
624 be other insns that became dead anyway, which we wouldn't know to
628 if (reg_mentioned_p (cc0_rtx, insn))
630 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
632 /* If a reg-note was found, it points to an insn to set CC0. This
633 insn is in the delay list of some other insn. So delete it from
634 the delay list it was in. */
637 if (! FIND_REG_INC_NOTE (XEXP (note, 0), NULL_RTX)
638 && sets_cc0_p (PATTERN (XEXP (note, 0))) == 1)
639 delete_from_delay_slot (XEXP (note, 0));
643 /* The insn setting CC0 is our previous insn, but it may be in
644 a delay slot. It will be the last insn in the delay slot, if
646 rtx trial = previous_insn (insn);
647 if (GET_CODE (trial) == NOTE)
648 trial = prev_nonnote_insn (trial);
649 if (sets_cc0_p (PATTERN (trial)) != 1
650 || FIND_REG_INC_NOTE (trial, 0))
652 if (PREV_INSN (NEXT_INSN (trial)) == trial)
655 delete_from_delay_slot (trial);
663 /* Counters for delay-slot filling. */
665 #define NUM_REORG_FUNCTIONS 2
666 #define MAX_DELAY_HISTOGRAM 3
667 #define MAX_REORG_PASSES 2
669 static int num_insns_needing_delays[NUM_REORG_FUNCTIONS][MAX_REORG_PASSES];
671 static int num_filled_delays[NUM_REORG_FUNCTIONS][MAX_DELAY_HISTOGRAM+1][MAX_REORG_PASSES];
673 static int reorg_pass_number;
676 note_delay_statistics (slots_filled, index)
677 int slots_filled, index;
679 num_insns_needing_delays[index][reorg_pass_number]++;
680 if (slots_filled > MAX_DELAY_HISTOGRAM)
681 slots_filled = MAX_DELAY_HISTOGRAM;
682 num_filled_delays[index][slots_filled][reorg_pass_number]++;
685 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
687 /* Optimize the following cases:
689 1. When a conditional branch skips over only one instruction,
690 use an annulling branch and put that insn in the delay slot.
691 Use either a branch that annuls when the condition if true or
692 invert the test with a branch that annuls when the condition is
693 false. This saves insns, since otherwise we must copy an insn
696 (orig) (skip) (otherwise)
697 Bcc.n L1 Bcc',a L1 Bcc,a L1'
704 2. When a conditional branch skips over only one instruction,
705 and after that, it unconditionally branches somewhere else,
706 perform the similar optimization. This saves executing the
707 second branch in the case where the inverted condition is true.
716 This should be expanded to skip over N insns, where N is the number
717 of delay slots required. */
723 register rtx trial = next_nonnote_insn (insn);
724 rtx next_trial = next_active_insn (trial);
729 flags = get_jump_flags (insn, JUMP_LABEL (insn));
732 || GET_CODE (trial) != INSN
733 || GET_CODE (PATTERN (trial)) == SEQUENCE
734 || recog_memoized (trial) < 0
735 || (! eligible_for_annul_false (insn, 0, trial, flags)
736 && ! eligible_for_annul_true (insn, 0, trial, flags)))
739 /* There are two cases where we are just executing one insn (we assume
740 here that a branch requires only one insn; this should be generalized
741 at some point): Where the branch goes around a single insn or where
742 we have one insn followed by a branch to the same label we branch to.
743 In both of these cases, inverting the jump and annulling the delay
744 slot give the same effect in fewer insns. */
745 if ((next_trial == next_active_insn (JUMP_LABEL (insn))
746 && ! (next_trial == 0 && current_function_epilogue_delay_list != 0))
748 && GET_CODE (next_trial) == JUMP_INSN
749 && JUMP_LABEL (insn) == JUMP_LABEL (next_trial)
750 && (simplejump_p (next_trial)
751 || GET_CODE (PATTERN (next_trial)) == RETURN)))
753 if (eligible_for_annul_false (insn, 0, trial, flags))
755 if (invert_jump (insn, JUMP_LABEL (insn), 1))
756 INSN_FROM_TARGET_P (trial) = 1;
757 else if (! eligible_for_annul_true (insn, 0, trial, flags))
761 delay_list = add_to_delay_list (trial, NULL_RTX);
762 next_trial = next_active_insn (trial);
763 update_block (trial, trial);
766 /* Also, if we are targeting an unconditional
767 branch, thread our jump to the target of that branch. Don't
768 change this into a RETURN here, because it may not accept what
769 we have in the delay slot. We'll fix this up later. */
770 if (next_trial && GET_CODE (next_trial) == JUMP_INSN
771 && (simplejump_p (next_trial)
772 || GET_CODE (PATTERN (next_trial)) == RETURN))
774 target_label = JUMP_LABEL (next_trial);
775 if (target_label == 0)
776 target_label = find_end_label ();
778 /* Recompute the flags based on TARGET_LABEL since threading
779 the jump to TARGET_LABEL may change the direction of the
780 jump (which may change the circumstances in which the
781 delay slot is nullified). */
782 flags = get_jump_flags (insn, target_label);
783 if (eligible_for_annul_true (insn, 0, trial, flags))
784 reorg_redirect_jump (insn, target_label);
787 INSN_ANNULLED_BRANCH_P (insn) = 1;
794 /* Encode and return branch direction and prediction information for
795 INSN assuming it will jump to LABEL.
797 Non conditional branches return no direction information and
798 are predicted as very likely taken. */
801 get_jump_flags (insn, label)
806 /* get_jump_flags can be passed any insn with delay slots, these may
807 be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch
808 direction information, and only if they are conditional jumps.
810 If LABEL is zero, then there is no way to determine the branch
812 if (GET_CODE (insn) == JUMP_INSN
813 && (condjump_p (insn) || condjump_in_parallel_p (insn))
814 && INSN_UID (insn) <= max_uid
816 && INSN_UID (label) <= max_uid)
818 = (uid_to_ruid[INSN_UID (label)] > uid_to_ruid[INSN_UID (insn)])
819 ? ATTR_FLAG_forward : ATTR_FLAG_backward;
820 /* No valid direction information. */
824 /* If insn is a conditional branch call mostly_true_jump to get
825 determine the branch prediction.
827 Non conditional branches are predicted as very likely taken. */
828 if (GET_CODE (insn) == JUMP_INSN
829 && (condjump_p (insn) || condjump_in_parallel_p (insn)))
833 prediction = mostly_true_jump (insn, get_branch_condition (insn, label));
837 flags |= (ATTR_FLAG_very_likely | ATTR_FLAG_likely);
840 flags |= ATTR_FLAG_likely;
843 flags |= ATTR_FLAG_unlikely;
846 flags |= (ATTR_FLAG_very_unlikely | ATTR_FLAG_unlikely);
854 flags |= (ATTR_FLAG_very_likely | ATTR_FLAG_likely);
859 /* Return 1 if INSN is a destination that will be branched to rarely (the
860 return point of a function); return 2 if DEST will be branched to very
861 rarely (a call to a function that doesn't return). Otherwise,
865 rare_destination (insn)
871 for (; insn; insn = next)
873 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
874 insn = XVECEXP (PATTERN (insn), 0, 0);
876 next = NEXT_INSN (insn);
878 switch (GET_CODE (insn))
883 /* A BARRIER can either be after a JUMP_INSN or a CALL_INSN. We
884 don't scan past JUMP_INSNs, so any barrier we find here must
885 have been after a CALL_INSN and hence mean the call doesn't
889 if (GET_CODE (PATTERN (insn)) == RETURN)
891 else if (simplejump_p (insn)
892 && jump_count++ < 10)
893 next = JUMP_LABEL (insn);
902 /* If we got here it means we hit the end of the function. So this
903 is an unlikely destination. */
908 /* Return truth value of the statement that this branch
909 is mostly taken. If we think that the branch is extremely likely
910 to be taken, we return 2. If the branch is slightly more likely to be
911 taken, return 1. If the branch is slightly less likely to be taken,
912 return 0 and if the branch is highly unlikely to be taken, return -1.
914 CONDITION, if non-zero, is the condition that JUMP_INSN is testing. */
917 mostly_true_jump (jump_insn, condition)
918 rtx jump_insn, condition;
920 rtx target_label = JUMP_LABEL (jump_insn);
922 int rare_dest = rare_destination (target_label);
923 int rare_fallthrough = rare_destination (NEXT_INSN (jump_insn));
925 /* If branch probabilities are available, then use that number since it
926 always gives a correct answer. */
927 note = find_reg_note (jump_insn, REG_BR_PROB, 0);
930 int prob = INTVAL (XEXP (note, 0));
932 if (prob >= REG_BR_PROB_BASE * 9 / 10)
934 else if (prob >= REG_BR_PROB_BASE / 2)
936 else if (prob >= REG_BR_PROB_BASE / 10)
942 /* ??? Ought to use estimate_probability instead. */
944 /* If this is a branch outside a loop, it is highly unlikely. */
945 if (GET_CODE (PATTERN (jump_insn)) == SET
946 && GET_CODE (SET_SRC (PATTERN (jump_insn))) == IF_THEN_ELSE
947 && ((GET_CODE (XEXP (SET_SRC (PATTERN (jump_insn)), 1)) == LABEL_REF
948 && LABEL_OUTSIDE_LOOP_P (XEXP (SET_SRC (PATTERN (jump_insn)), 1)))
949 || (GET_CODE (XEXP (SET_SRC (PATTERN (jump_insn)), 2)) == LABEL_REF
950 && LABEL_OUTSIDE_LOOP_P (XEXP (SET_SRC (PATTERN (jump_insn)), 2)))))
955 /* If this is the test of a loop, it is very likely true. We scan
956 backwards from the target label. If we find a NOTE_INSN_LOOP_BEG
957 before the next real insn, we assume the branch is to the top of
959 for (insn = PREV_INSN (target_label);
960 insn && GET_CODE (insn) == NOTE;
961 insn = PREV_INSN (insn))
962 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
965 /* If this is a jump to the test of a loop, it is likely true. We scan
966 forwards from the target label. If we find a NOTE_INSN_LOOP_VTOP
967 before the next real insn, we assume the branch is to the loop branch
969 for (insn = NEXT_INSN (target_label);
970 insn && GET_CODE (insn) == NOTE;
971 insn = PREV_INSN (insn))
972 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_VTOP)
976 /* Look at the relative rarities of the fallthrough and destination. If
977 they differ, we can predict the branch that way. */
979 switch (rare_fallthrough - rare_dest)
993 /* If we couldn't figure out what this jump was, assume it won't be
994 taken. This should be rare. */
998 /* EQ tests are usually false and NE tests are usually true. Also,
999 most quantities are positive, so we can make the appropriate guesses
1000 about signed comparisons against zero. */
1001 switch (GET_CODE (condition))
1004 /* Unconditional branch. */
1012 if (XEXP (condition, 1) == const0_rtx)
1017 if (XEXP (condition, 1) == const0_rtx)
1025 /* Predict backward branches usually take, forward branches usually not. If
1026 we don't know whether this is forward or backward, assume the branch
1027 will be taken, since most are. */
1028 return (target_label == 0 || INSN_UID (jump_insn) > max_uid
1029 || INSN_UID (target_label) > max_uid
1030 || (uid_to_ruid[INSN_UID (jump_insn)]
1031 > uid_to_ruid[INSN_UID (target_label)]));
1034 /* Return the condition under which INSN will branch to TARGET. If TARGET
1035 is zero, return the condition under which INSN will return. If INSN is
1036 an unconditional branch, return const_true_rtx. If INSN isn't a simple
1037 type of jump, or it doesn't go to TARGET, return 0. */
1040 get_branch_condition (insn, target)
1044 rtx pat = PATTERN (insn);
1047 if (condjump_in_parallel_p (insn))
1048 pat = XVECEXP (pat, 0, 0);
1050 if (GET_CODE (pat) == RETURN)
1051 return target == 0 ? const_true_rtx : 0;
1053 else if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
1056 src = SET_SRC (pat);
1057 if (GET_CODE (src) == LABEL_REF && XEXP (src, 0) == target)
1058 return const_true_rtx;
1060 else if (GET_CODE (src) == IF_THEN_ELSE
1061 && ((target == 0 && GET_CODE (XEXP (src, 1)) == RETURN)
1062 || (GET_CODE (XEXP (src, 1)) == LABEL_REF
1063 && XEXP (XEXP (src, 1), 0) == target))
1064 && XEXP (src, 2) == pc_rtx)
1065 return XEXP (src, 0);
1067 else if (GET_CODE (src) == IF_THEN_ELSE
1068 && ((target == 0 && GET_CODE (XEXP (src, 2)) == RETURN)
1069 || (GET_CODE (XEXP (src, 2)) == LABEL_REF
1070 && XEXP (XEXP (src, 2), 0) == target))
1071 && XEXP (src, 1) == pc_rtx)
1072 return gen_rtx_fmt_ee (reverse_condition (GET_CODE (XEXP (src, 0))),
1073 GET_MODE (XEXP (src, 0)),
1074 XEXP (XEXP (src, 0), 0), XEXP (XEXP (src, 0), 1));
1079 /* Return non-zero if CONDITION is more strict than the condition of
1080 INSN, i.e., if INSN will always branch if CONDITION is true. */
1083 condition_dominates_p (condition, insn)
1087 rtx other_condition = get_branch_condition (insn, JUMP_LABEL (insn));
1088 enum rtx_code code = GET_CODE (condition);
1089 enum rtx_code other_code;
1091 if (rtx_equal_p (condition, other_condition)
1092 || other_condition == const_true_rtx)
1095 else if (condition == const_true_rtx || other_condition == 0)
1098 other_code = GET_CODE (other_condition);
1099 if (GET_RTX_LENGTH (code) != 2 || GET_RTX_LENGTH (other_code) != 2
1100 || ! rtx_equal_p (XEXP (condition, 0), XEXP (other_condition, 0))
1101 || ! rtx_equal_p (XEXP (condition, 1), XEXP (other_condition, 1)))
1104 return comparison_dominates_p (code, other_code);
1107 /* Return non-zero if redirecting JUMP to NEWLABEL does not invalidate
1108 any insns already in the delay slot of JUMP. */
1111 redirect_with_delay_slots_safe_p (jump, newlabel, seq)
1112 rtx jump, newlabel, seq;
1115 rtx pat = PATTERN (seq);
1117 /* Make sure all the delay slots of this jump would still
1118 be valid after threading the jump. If they are still
1119 valid, then return non-zero. */
1121 flags = get_jump_flags (jump, newlabel);
1122 for (i = 1; i < XVECLEN (pat, 0); i++)
1124 #ifdef ANNUL_IFFALSE_SLOTS
1125 (INSN_ANNULLED_BRANCH_P (jump)
1126 && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
1127 ? eligible_for_annul_false (jump, i - 1,
1128 XVECEXP (pat, 0, i), flags) :
1130 #ifdef ANNUL_IFTRUE_SLOTS
1131 (INSN_ANNULLED_BRANCH_P (jump)
1132 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
1133 ? eligible_for_annul_true (jump, i - 1,
1134 XVECEXP (pat, 0, i), flags) :
1136 eligible_for_delay (jump, i - 1, XVECEXP (pat, 0, i), flags)))
1139 return (i == XVECLEN (pat, 0));
1142 /* Return non-zero if redirecting JUMP to NEWLABEL does not invalidate
1143 any insns we wish to place in the delay slot of JUMP. */
1146 redirect_with_delay_list_safe_p (jump, newlabel, delay_list)
1147 rtx jump, newlabel, delay_list;
1152 /* Make sure all the insns in DELAY_LIST would still be
1153 valid after threading the jump. If they are still
1154 valid, then return non-zero. */
1156 flags = get_jump_flags (jump, newlabel);
1157 for (li = delay_list, i = 0; li; li = XEXP (li, 1), i++)
1159 #ifdef ANNUL_IFFALSE_SLOTS
1160 (INSN_ANNULLED_BRANCH_P (jump)
1161 && INSN_FROM_TARGET_P (XEXP (li, 0)))
1162 ? eligible_for_annul_false (jump, i, XEXP (li, 0), flags) :
1164 #ifdef ANNUL_IFTRUE_SLOTS
1165 (INSN_ANNULLED_BRANCH_P (jump)
1166 && ! INSN_FROM_TARGET_P (XEXP (li, 0)))
1167 ? eligible_for_annul_true (jump, i, XEXP (li, 0), flags) :
1169 eligible_for_delay (jump, i, XEXP (li, 0), flags)))
1172 return (li == NULL);
1175 /* DELAY_LIST is a list of insns that have already been placed into delay
1176 slots. See if all of them have the same annulling status as ANNUL_TRUE_P.
1177 If not, return 0; otherwise return 1. */
1180 check_annul_list_true_false (annul_true_p, delay_list)
1188 for (temp = delay_list; temp; temp = XEXP (temp, 1))
1190 rtx trial = XEXP (temp, 0);
1192 if ((annul_true_p && INSN_FROM_TARGET_P (trial))
1193 || (!annul_true_p && !INSN_FROM_TARGET_P (trial)))
1201 /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that
1202 the condition tested by INSN is CONDITION and the resources shown in
1203 OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns
1204 from SEQ's delay list, in addition to whatever insns it may execute
1205 (in DELAY_LIST). SETS and NEEDED are denote resources already set and
1206 needed while searching for delay slot insns. Return the concatenated
1207 delay list if possible, otherwise, return 0.
1209 SLOTS_TO_FILL is the total number of slots required by INSN, and
1210 PSLOTS_FILLED points to the number filled so far (also the number of
1211 insns in DELAY_LIST). It is updated with the number that have been
1212 filled from the SEQUENCE, if any.
1214 PANNUL_P points to a non-zero value if we already know that we need
1215 to annul INSN. If this routine determines that annulling is needed,
1216 it may set that value non-zero.
1218 PNEW_THREAD points to a location that is to receive the place at which
1219 execution should continue. */
1222 steal_delay_list_from_target (insn, condition, seq, delay_list,
1223 sets, needed, other_needed,
1224 slots_to_fill, pslots_filled, pannul_p,
1226 rtx insn, condition;
1229 struct resources *sets, *needed, *other_needed;
1236 int slots_remaining = slots_to_fill - *pslots_filled;
1237 int total_slots_filled = *pslots_filled;
1238 rtx new_delay_list = 0;
1239 int must_annul = *pannul_p;
1242 struct resources cc_set;
1244 /* We can't do anything if there are more delay slots in SEQ than we
1245 can handle, or if we don't know that it will be a taken branch.
1246 We know that it will be a taken branch if it is either an unconditional
1247 branch or a conditional branch with a stricter branch condition.
1249 Also, exit if the branch has more than one set, since then it is computing
1250 other results that can't be ignored, e.g. the HPPA mov&branch instruction.
1251 ??? It may be possible to move other sets into INSN in addition to
1252 moving the instructions in the delay slots.
1254 We can not steal the delay list if one of the instructions in the
1255 current delay_list modifies the condition codes and the jump in the
1256 sequence is a conditional jump. We can not do this because we can
1257 not change the direction of the jump because the condition codes
1258 will effect the direction of the jump in the sequence. */
1260 CLEAR_RESOURCE (&cc_set);
1261 for (temp = delay_list; temp; temp = XEXP (temp, 1))
1263 rtx trial = XEXP (temp, 0);
1265 mark_set_resources (trial, &cc_set, 0, MARK_SRC_DEST_CALL);
1266 if (insn_references_resource_p (XVECEXP (seq , 0, 0), &cc_set, 0))
1270 if (XVECLEN (seq, 0) - 1 > slots_remaining
1271 || ! condition_dominates_p (condition, XVECEXP (seq, 0, 0))
1272 || ! single_set (XVECEXP (seq, 0, 0)))
1275 for (i = 1; i < XVECLEN (seq, 0); i++)
1277 rtx trial = XVECEXP (seq, 0, i);
1280 if (insn_references_resource_p (trial, sets, 0)
1281 || insn_sets_resource_p (trial, needed, 0)
1282 || insn_sets_resource_p (trial, sets, 0)
1284 /* If TRIAL sets CC0, we can't copy it, so we can't steal this
1286 || find_reg_note (trial, REG_CC_USER, NULL_RTX)
1288 /* If TRIAL is from the fallthrough code of an annulled branch insn
1289 in SEQ, we cannot use it. */
1290 || (INSN_ANNULLED_BRANCH_P (XVECEXP (seq, 0, 0))
1291 && ! INSN_FROM_TARGET_P (trial)))
1294 /* If this insn was already done (usually in a previous delay slot),
1295 pretend we put it in our delay slot. */
1296 if (redundant_insn (trial, insn, new_delay_list))
1299 /* We will end up re-vectoring this branch, so compute flags
1300 based on jumping to the new label. */
1301 flags = get_jump_flags (insn, JUMP_LABEL (XVECEXP (seq, 0, 0)));
1304 && ((condition == const_true_rtx
1305 || (! insn_sets_resource_p (trial, other_needed, 0)
1306 && ! may_trap_p (PATTERN (trial)))))
1307 ? eligible_for_delay (insn, total_slots_filled, trial, flags)
1308 : (must_annul || (delay_list == NULL && new_delay_list == NULL))
1310 check_annul_list_true_false (0, delay_list)
1311 && check_annul_list_true_false (0, new_delay_list)
1312 && eligible_for_annul_false (insn, total_slots_filled,
1317 temp = copy_rtx (trial);
1318 INSN_FROM_TARGET_P (temp) = 1;
1319 new_delay_list = add_to_delay_list (temp, new_delay_list);
1320 total_slots_filled++;
1322 if (--slots_remaining == 0)
1329 /* Show the place to which we will be branching. */
1330 *pnew_thread = next_active_insn (JUMP_LABEL (XVECEXP (seq, 0, 0)));
1332 /* Add any new insns to the delay list and update the count of the
1333 number of slots filled. */
1334 *pslots_filled = total_slots_filled;
1338 if (delay_list == 0)
1339 return new_delay_list;
1341 for (temp = new_delay_list; temp; temp = XEXP (temp, 1))
1342 delay_list = add_to_delay_list (XEXP (temp, 0), delay_list);
1347 /* Similar to steal_delay_list_from_target except that SEQ is on the
1348 fallthrough path of INSN. Here we only do something if the delay insn
1349 of SEQ is an unconditional branch. In that case we steal its delay slot
1350 for INSN since unconditional branches are much easier to fill. */
1353 steal_delay_list_from_fallthrough (insn, condition, seq,
1354 delay_list, sets, needed, other_needed,
1355 slots_to_fill, pslots_filled, pannul_p)
1356 rtx insn, condition;
1359 struct resources *sets, *needed, *other_needed;
1366 int must_annul = *pannul_p;
1369 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1371 /* We can't do anything if SEQ's delay insn isn't an
1372 unconditional branch. */
1374 if (! simplejump_p (XVECEXP (seq, 0, 0))
1375 && GET_CODE (PATTERN (XVECEXP (seq, 0, 0))) != RETURN)
1378 for (i = 1; i < XVECLEN (seq, 0); i++)
1380 rtx trial = XVECEXP (seq, 0, i);
1382 /* If TRIAL sets CC0, stealing it will move it too far from the use
1384 if (insn_references_resource_p (trial, sets, 0)
1385 || insn_sets_resource_p (trial, needed, 0)
1386 || insn_sets_resource_p (trial, sets, 0)
1388 || sets_cc0_p (PATTERN (trial))
1394 /* If this insn was already done, we don't need it. */
1395 if (redundant_insn (trial, insn, delay_list))
1397 delete_from_delay_slot (trial);
1402 && ((condition == const_true_rtx
1403 || (! insn_sets_resource_p (trial, other_needed, 0)
1404 && ! may_trap_p (PATTERN (trial)))))
1405 ? eligible_for_delay (insn, *pslots_filled, trial, flags)
1406 : (must_annul || delay_list == NULL) && (must_annul = 1,
1407 check_annul_list_true_false (1, delay_list)
1408 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
1412 delete_from_delay_slot (trial);
1413 delay_list = add_to_delay_list (trial, delay_list);
1415 if (++(*pslots_filled) == slots_to_fill)
1427 /* Try merging insns starting at THREAD which match exactly the insns in
1430 If all insns were matched and the insn was previously annulling, the
1431 annul bit will be cleared.
1433 For each insn that is merged, if the branch is or will be non-annulling,
1434 we delete the merged insn. */
1437 try_merge_delay_insns (insn, thread)
1440 rtx trial, next_trial;
1441 rtx delay_insn = XVECEXP (PATTERN (insn), 0, 0);
1442 int annul_p = INSN_ANNULLED_BRANCH_P (delay_insn);
1443 int slot_number = 1;
1444 int num_slots = XVECLEN (PATTERN (insn), 0);
1445 rtx next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1446 struct resources set, needed;
1447 rtx merged_insns = 0;
1451 flags = get_jump_flags (delay_insn, JUMP_LABEL (delay_insn));
1453 CLEAR_RESOURCE (&needed);
1454 CLEAR_RESOURCE (&set);
1456 /* If this is not an annulling branch, take into account anything needed in
1457 INSN's delay slot. This prevents two increments from being incorrectly
1458 folded into one. If we are annulling, this would be the correct
1459 thing to do. (The alternative, looking at things set in NEXT_TO_MATCH
1460 will essentially disable this optimization. This method is somewhat of
1461 a kludge, but I don't see a better way.) */
1463 for (i = 1 ; i < num_slots; i++)
1464 if (XVECEXP (PATTERN (insn), 0, i))
1465 mark_referenced_resources (XVECEXP (PATTERN (insn), 0, i), &needed, 1);
1467 for (trial = thread; !stop_search_p (trial, 1); trial = next_trial)
1469 rtx pat = PATTERN (trial);
1470 rtx oldtrial = trial;
1472 next_trial = next_nonnote_insn (trial);
1474 /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */
1475 if (GET_CODE (trial) == INSN
1476 && (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER))
1479 if (GET_CODE (next_to_match) == GET_CODE (trial)
1481 /* We can't share an insn that sets cc0. */
1482 && ! sets_cc0_p (pat)
1484 && ! insn_references_resource_p (trial, &set, 1)
1485 && ! insn_sets_resource_p (trial, &set, 1)
1486 && ! insn_sets_resource_p (trial, &needed, 1)
1487 && (trial = try_split (pat, trial, 0)) != 0
1488 /* Update next_trial, in case try_split succeeded. */
1489 && (next_trial = next_nonnote_insn (trial))
1490 /* Likewise THREAD. */
1491 && (thread = oldtrial == thread ? trial : thread)
1492 && rtx_equal_p (PATTERN (next_to_match), PATTERN (trial))
1493 /* Have to test this condition if annul condition is different
1494 from (and less restrictive than) non-annulling one. */
1495 && eligible_for_delay (delay_insn, slot_number - 1, trial, flags))
1500 update_block (trial, thread);
1501 if (trial == thread)
1502 thread = next_active_insn (thread);
1504 delete_insn (trial);
1505 INSN_FROM_TARGET_P (next_to_match) = 0;
1508 merged_insns = gen_rtx_INSN_LIST (VOIDmode, trial, merged_insns);
1510 if (++slot_number == num_slots)
1513 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1516 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
1517 mark_referenced_resources (trial, &needed, 1);
1520 /* See if we stopped on a filled insn. If we did, try to see if its
1521 delay slots match. */
1522 if (slot_number != num_slots
1523 && trial && GET_CODE (trial) == INSN
1524 && GET_CODE (PATTERN (trial)) == SEQUENCE
1525 && ! INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial), 0, 0)))
1527 rtx pat = PATTERN (trial);
1528 rtx filled_insn = XVECEXP (pat, 0, 0);
1530 /* Account for resources set/needed by the filled insn. */
1531 mark_set_resources (filled_insn, &set, 0, MARK_SRC_DEST_CALL);
1532 mark_referenced_resources (filled_insn, &needed, 1);
1534 for (i = 1; i < XVECLEN (pat, 0); i++)
1536 rtx dtrial = XVECEXP (pat, 0, i);
1538 if (! insn_references_resource_p (dtrial, &set, 1)
1539 && ! insn_sets_resource_p (dtrial, &set, 1)
1540 && ! insn_sets_resource_p (dtrial, &needed, 1)
1542 && ! sets_cc0_p (PATTERN (dtrial))
1544 && rtx_equal_p (PATTERN (next_to_match), PATTERN (dtrial))
1545 && eligible_for_delay (delay_insn, slot_number - 1, dtrial, flags))
1551 update_block (dtrial, thread);
1552 new = delete_from_delay_slot (dtrial);
1553 if (INSN_DELETED_P (thread))
1555 INSN_FROM_TARGET_P (next_to_match) = 0;
1558 merged_insns = gen_rtx_INSN_LIST (SImode, dtrial,
1561 if (++slot_number == num_slots)
1564 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1568 /* Keep track of the set/referenced resources for the delay
1569 slots of any trial insns we encounter. */
1570 mark_set_resources (dtrial, &set, 0, MARK_SRC_DEST_CALL);
1571 mark_referenced_resources (dtrial, &needed, 1);
1576 /* If all insns in the delay slot have been matched and we were previously
1577 annulling the branch, we need not any more. In that case delete all the
1578 merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn in
1579 the delay list so that we know that it isn't only being used at the
1581 if (slot_number == num_slots && annul_p)
1583 for (; merged_insns; merged_insns = XEXP (merged_insns, 1))
1585 if (GET_MODE (merged_insns) == SImode)
1589 update_block (XEXP (merged_insns, 0), thread);
1590 new = delete_from_delay_slot (XEXP (merged_insns, 0));
1591 if (INSN_DELETED_P (thread))
1596 update_block (XEXP (merged_insns, 0), thread);
1597 delete_insn (XEXP (merged_insns, 0));
1601 INSN_ANNULLED_BRANCH_P (delay_insn) = 0;
1603 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1604 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i)) = 0;
1608 /* See if INSN is redundant with an insn in front of TARGET. Often this
1609 is called when INSN is a candidate for a delay slot of TARGET.
1610 DELAY_LIST are insns that will be placed in delay slots of TARGET in front
1611 of INSN. Often INSN will be redundant with an insn in a delay slot of
1612 some previous insn. This happens when we have a series of branches to the
1613 same label; in that case the first insn at the target might want to go
1614 into each of the delay slots.
1616 If we are not careful, this routine can take up a significant fraction
1617 of the total compilation time (4%), but only wins rarely. Hence we
1618 speed this routine up by making two passes. The first pass goes back
1619 until it hits a label and sees if it find an insn with an identical
1620 pattern. Only in this (relatively rare) event does it check for
1623 We do not split insns we encounter. This could cause us not to find a
1624 redundant insn, but the cost of splitting seems greater than the possible
1625 gain in rare cases. */
1628 redundant_insn (insn, target, delay_list)
1633 rtx target_main = target;
1634 rtx ipat = PATTERN (insn);
1636 struct resources needed, set;
1638 unsigned insns_to_search;
1640 /* If INSN has any REG_UNUSED notes, it can't match anything since we
1641 are allowed to not actually assign to such a register. */
1642 if (find_reg_note (insn, REG_UNUSED, NULL_RTX) != 0)
1645 /* Scan backwards looking for a match. */
1646 for (trial = PREV_INSN (target),
1647 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1648 trial && insns_to_search > 0;
1649 trial = PREV_INSN (trial), --insns_to_search)
1651 if (GET_CODE (trial) == CODE_LABEL)
1654 if (! INSN_P (trial))
1657 pat = PATTERN (trial);
1658 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1661 if (GET_CODE (pat) == SEQUENCE)
1663 /* Stop for a CALL and its delay slots because it is difficult to
1664 track its resource needs correctly. */
1665 if (GET_CODE (XVECEXP (pat, 0, 0)) == CALL_INSN)
1668 /* Stop for an INSN or JUMP_INSN with delayed effects and its delay
1669 slots because it is difficult to track its resource needs
1672 #ifdef INSN_SETS_ARE_DELAYED
1673 if (INSN_SETS_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1677 #ifdef INSN_REFERENCES_ARE_DELAYED
1678 if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1682 /* See if any of the insns in the delay slot match, updating
1683 resource requirements as we go. */
1684 for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
1685 if (GET_CODE (XVECEXP (pat, 0, i)) == GET_CODE (insn)
1686 && rtx_equal_p (PATTERN (XVECEXP (pat, 0, i)), ipat)
1687 && ! find_reg_note (XVECEXP (pat, 0, i), REG_UNUSED, NULL_RTX))
1690 /* If found a match, exit this loop early. */
1695 else if (GET_CODE (trial) == GET_CODE (insn) && rtx_equal_p (pat, ipat)
1696 && ! find_reg_note (trial, REG_UNUSED, NULL_RTX))
1700 /* If we didn't find an insn that matches, return 0. */
1704 /* See what resources this insn sets and needs. If they overlap, or
1705 if this insn references CC0, it can't be redundant. */
1707 CLEAR_RESOURCE (&needed);
1708 CLEAR_RESOURCE (&set);
1709 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1710 mark_referenced_resources (insn, &needed, 1);
1712 /* If TARGET is a SEQUENCE, get the main insn. */
1713 if (GET_CODE (target) == INSN && GET_CODE (PATTERN (target)) == SEQUENCE)
1714 target_main = XVECEXP (PATTERN (target), 0, 0);
1716 if (resource_conflicts_p (&needed, &set)
1718 || reg_mentioned_p (cc0_rtx, ipat)
1720 /* The insn requiring the delay may not set anything needed or set by
1722 || insn_sets_resource_p (target_main, &needed, 1)
1723 || insn_sets_resource_p (target_main, &set, 1))
1726 /* Insns we pass may not set either NEEDED or SET, so merge them for
1728 needed.memory |= set.memory;
1729 needed.unch_memory |= set.unch_memory;
1730 IOR_HARD_REG_SET (needed.regs, set.regs);
1732 /* This insn isn't redundant if it conflicts with an insn that either is
1733 or will be in a delay slot of TARGET. */
1737 if (insn_sets_resource_p (XEXP (delay_list, 0), &needed, 1))
1739 delay_list = XEXP (delay_list, 1);
1742 if (GET_CODE (target) == INSN && GET_CODE (PATTERN (target)) == SEQUENCE)
1743 for (i = 1; i < XVECLEN (PATTERN (target), 0); i++)
1744 if (insn_sets_resource_p (XVECEXP (PATTERN (target), 0, i), &needed, 1))
1747 /* Scan backwards until we reach a label or an insn that uses something
1748 INSN sets or sets something insn uses or sets. */
1750 for (trial = PREV_INSN (target),
1751 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1752 trial && GET_CODE (trial) != CODE_LABEL && insns_to_search > 0;
1753 trial = PREV_INSN (trial), --insns_to_search)
1755 if (GET_CODE (trial) != INSN && GET_CODE (trial) != CALL_INSN
1756 && GET_CODE (trial) != JUMP_INSN)
1759 pat = PATTERN (trial);
1760 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1763 if (GET_CODE (pat) == SEQUENCE)
1765 /* If this is a CALL_INSN and its delay slots, it is hard to track
1766 the resource needs properly, so give up. */
1767 if (GET_CODE (XVECEXP (pat, 0, 0)) == CALL_INSN)
1770 /* If this is an INSN or JUMP_INSN with delayed effects, it
1771 is hard to track the resource needs properly, so give up. */
1773 #ifdef INSN_SETS_ARE_DELAYED
1774 if (INSN_SETS_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1778 #ifdef INSN_REFERENCES_ARE_DELAYED
1779 if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1783 /* See if any of the insns in the delay slot match, updating
1784 resource requirements as we go. */
1785 for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
1787 rtx candidate = XVECEXP (pat, 0, i);
1789 /* If an insn will be annulled if the branch is false, it isn't
1790 considered as a possible duplicate insn. */
1791 if (rtx_equal_p (PATTERN (candidate), ipat)
1792 && ! (INSN_ANNULLED_BRANCH_P (XVECEXP (pat, 0, 0))
1793 && INSN_FROM_TARGET_P (candidate)))
1795 /* Show that this insn will be used in the sequel. */
1796 INSN_FROM_TARGET_P (candidate) = 0;
1800 /* Unless this is an annulled insn from the target of a branch,
1801 we must stop if it sets anything needed or set by INSN. */
1802 if ((! INSN_ANNULLED_BRANCH_P (XVECEXP (pat, 0, 0))
1803 || ! INSN_FROM_TARGET_P (candidate))
1804 && insn_sets_resource_p (candidate, &needed, 1))
1808 /* If the insn requiring the delay slot conflicts with INSN, we
1810 if (insn_sets_resource_p (XVECEXP (pat, 0, 0), &needed, 1))
1815 /* See if TRIAL is the same as INSN. */
1816 pat = PATTERN (trial);
1817 if (rtx_equal_p (pat, ipat))
1820 /* Can't go any further if TRIAL conflicts with INSN. */
1821 if (insn_sets_resource_p (trial, &needed, 1))
1829 /* Return 1 if THREAD can only be executed in one way. If LABEL is non-zero,
1830 it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH
1831 is non-zero, we are allowed to fall into this thread; otherwise, we are
1834 If LABEL is used more than one or we pass a label other than LABEL before
1835 finding an active insn, we do not own this thread. */
1838 own_thread_p (thread, label, allow_fallthrough)
1841 int allow_fallthrough;
1846 /* We don't own the function end. */
1850 /* Get the first active insn, or THREAD, if it is an active insn. */
1851 active_insn = next_active_insn (PREV_INSN (thread));
1853 for (insn = thread; insn != active_insn; insn = NEXT_INSN (insn))
1854 if (GET_CODE (insn) == CODE_LABEL
1855 && (insn != label || LABEL_NUSES (insn) != 1))
1858 if (allow_fallthrough)
1861 /* Ensure that we reach a BARRIER before any insn or label. */
1862 for (insn = prev_nonnote_insn (thread);
1863 insn == 0 || GET_CODE (insn) != BARRIER;
1864 insn = prev_nonnote_insn (insn))
1866 || GET_CODE (insn) == CODE_LABEL
1867 || (GET_CODE (insn) == INSN
1868 && GET_CODE (PATTERN (insn)) != USE
1869 && GET_CODE (PATTERN (insn)) != CLOBBER))
1875 /* Called when INSN is being moved from a location near the target of a jump.
1876 We leave a marker of the form (use (INSN)) immediately in front
1877 of WHERE for mark_target_live_regs. These markers will be deleted when
1880 We used to try to update the live status of registers if WHERE is at
1881 the start of a basic block, but that can't work since we may remove a
1882 BARRIER in relax_delay_slots. */
1885 update_block (insn, where)
1889 /* Ignore if this was in a delay slot and it came from the target of
1891 if (INSN_FROM_TARGET_P (insn))
1894 emit_insn_before (gen_rtx_USE (VOIDmode, insn), where);
1896 /* INSN might be making a value live in a block where it didn't use to
1897 be. So recompute liveness information for this block. */
1899 incr_ticks_for_insn (insn);
1902 /* Similar to REDIRECT_JUMP except that we update the BB_TICKS entry for
1903 the basic block containing the jump. */
1906 reorg_redirect_jump (jump, nlabel)
1910 incr_ticks_for_insn (jump);
1911 return redirect_jump (jump, nlabel, 1);
1914 /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN.
1915 We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes
1916 that reference values used in INSN. If we find one, then we move the
1917 REG_DEAD note to INSN.
1919 This is needed to handle the case where an later insn (after INSN) has a
1920 REG_DEAD note for a register used by INSN, and this later insn subsequently
1921 gets moved before a CODE_LABEL because it is a redundant insn. In this
1922 case, mark_target_live_regs may be confused into thinking the register
1923 is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */
1926 update_reg_dead_notes (insn, delayed_insn)
1927 rtx insn, delayed_insn;
1931 for (p = next_nonnote_insn (insn); p != delayed_insn;
1932 p = next_nonnote_insn (p))
1933 for (link = REG_NOTES (p); link; link = next)
1935 next = XEXP (link, 1);
1937 if (REG_NOTE_KIND (link) != REG_DEAD
1938 || GET_CODE (XEXP (link, 0)) != REG)
1941 if (reg_referenced_p (XEXP (link, 0), PATTERN (insn)))
1943 /* Move the REG_DEAD note from P to INSN. */
1944 remove_note (p, link);
1945 XEXP (link, 1) = REG_NOTES (insn);
1946 REG_NOTES (insn) = link;
1951 /* Called when an insn redundant with start_insn is deleted. If there
1952 is a REG_DEAD note for the target of start_insn between start_insn
1953 and stop_insn, then the REG_DEAD note needs to be deleted since the
1954 value no longer dies there.
1956 If the REG_DEAD note isn't deleted, then mark_target_live_regs may be
1957 confused into thinking the register is dead. */
1960 fix_reg_dead_note (start_insn, stop_insn)
1961 rtx start_insn, stop_insn;
1965 for (p = next_nonnote_insn (start_insn); p != stop_insn;
1966 p = next_nonnote_insn (p))
1967 for (link = REG_NOTES (p); link; link = next)
1969 next = XEXP (link, 1);
1971 if (REG_NOTE_KIND (link) != REG_DEAD
1972 || GET_CODE (XEXP (link, 0)) != REG)
1975 if (reg_set_p (XEXP (link, 0), PATTERN (start_insn)))
1977 remove_note (p, link);
1983 /* Delete any REG_UNUSED notes that exist on INSN but not on REDUNDANT_INSN.
1985 This handles the case of udivmodXi4 instructions which optimize their
1986 output depending on whether any REG_UNUSED notes are present.
1987 we must make sure that INSN calculates as many results as REDUNDANT_INSN
1991 update_reg_unused_notes (insn, redundant_insn)
1992 rtx insn, redundant_insn;
1996 for (link = REG_NOTES (insn); link; link = next)
1998 next = XEXP (link, 1);
2000 if (REG_NOTE_KIND (link) != REG_UNUSED
2001 || GET_CODE (XEXP (link, 0)) != REG)
2004 if (! find_regno_note (redundant_insn, REG_UNUSED,
2005 REGNO (XEXP (link, 0))))
2006 remove_note (insn, link);
2010 /* Scan a function looking for insns that need a delay slot and find insns to
2011 put into the delay slot.
2013 NON_JUMPS_P is non-zero if we are to only try to fill non-jump insns (such
2014 as calls). We do these first since we don't want jump insns (that are
2015 easier to fill) to get the only insns that could be used for non-jump insns.
2016 When it is zero, only try to fill JUMP_INSNs.
2018 When slots are filled in this manner, the insns (including the
2019 delay_insn) are put together in a SEQUENCE rtx. In this fashion,
2020 it is possible to tell whether a delay slot has really been filled
2021 or not. `final' knows how to deal with this, by communicating
2022 through FINAL_SEQUENCE. */
2025 fill_simple_delay_slots (non_jumps_p)
2028 register rtx insn, pat, trial, next_trial;
2030 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
2031 struct resources needed, set;
2032 int slots_to_fill, slots_filled;
2035 for (i = 0; i < num_unfilled_slots; i++)
2038 /* Get the next insn to fill. If it has already had any slots assigned,
2039 we can't do anything with it. Maybe we'll improve this later. */
2041 insn = unfilled_slots_base[i];
2043 || INSN_DELETED_P (insn)
2044 || (GET_CODE (insn) == INSN
2045 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2046 || (GET_CODE (insn) == JUMP_INSN && non_jumps_p)
2047 || (GET_CODE (insn) != JUMP_INSN && ! non_jumps_p))
2050 /* It may have been that this insn used to need delay slots, but
2051 now doesn't; ignore in that case. This can happen, for example,
2052 on the HP PA RISC, where the number of delay slots depends on
2053 what insns are nearby. */
2054 slots_to_fill = num_delay_slots (insn);
2056 /* Some machine description have defined instructions to have
2057 delay slots only in certain circumstances which may depend on
2058 nearby insns (which change due to reorg's actions).
2060 For example, the PA port normally has delay slots for unconditional
2063 However, the PA port claims such jumps do not have a delay slot
2064 if they are immediate successors of certain CALL_INSNs. This
2065 allows the port to favor filling the delay slot of the call with
2066 the unconditional jump. */
2067 if (slots_to_fill == 0)
2070 /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL
2071 says how many. After initialization, first try optimizing
2074 nop add %o7,.-L1,%o7
2078 If this case applies, the delay slot of the call is filled with
2079 the unconditional jump. This is done first to avoid having the
2080 delay slot of the call filled in the backward scan. Also, since
2081 the unconditional jump is likely to also have a delay slot, that
2082 insn must exist when it is subsequently scanned.
2084 This is tried on each insn with delay slots as some machines
2085 have insns which perform calls, but are not represented as
2091 if (GET_CODE (insn) == JUMP_INSN)
2092 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2094 flags = get_jump_flags (insn, NULL_RTX);
2096 if ((trial = next_active_insn (insn))
2097 && GET_CODE (trial) == JUMP_INSN
2098 && simplejump_p (trial)
2099 && eligible_for_delay (insn, slots_filled, trial, flags)
2100 && no_labels_between_p (insn, trial))
2104 delay_list = add_to_delay_list (trial, delay_list);
2106 /* TRIAL may have had its delay slot filled, then unfilled. When
2107 the delay slot is unfilled, TRIAL is placed back on the unfilled
2108 slots obstack. Unfortunately, it is placed on the end of the
2109 obstack, not in its original location. Therefore, we must search
2110 from entry i + 1 to the end of the unfilled slots obstack to
2111 try and find TRIAL. */
2112 tmp = &unfilled_slots_base[i + 1];
2113 while (*tmp != trial && tmp != unfilled_slots_next)
2116 /* Remove the unconditional jump from consideration for delay slot
2117 filling and unthread it. */
2121 rtx next = NEXT_INSN (trial);
2122 rtx prev = PREV_INSN (trial);
2124 NEXT_INSN (prev) = next;
2126 PREV_INSN (next) = prev;
2130 /* Now, scan backwards from the insn to search for a potential
2131 delay-slot candidate. Stop searching when a label or jump is hit.
2133 For each candidate, if it is to go into the delay slot (moved
2134 forward in execution sequence), it must not need or set any resources
2135 that were set by later insns and must not set any resources that
2136 are needed for those insns.
2138 The delay slot insn itself sets resources unless it is a call
2139 (in which case the called routine, not the insn itself, is doing
2142 if (slots_filled < slots_to_fill)
2144 CLEAR_RESOURCE (&needed);
2145 CLEAR_RESOURCE (&set);
2146 mark_set_resources (insn, &set, 0, MARK_SRC_DEST);
2147 mark_referenced_resources (insn, &needed, 0);
2149 for (trial = prev_nonnote_insn (insn); ! stop_search_p (trial, 1);
2152 next_trial = prev_nonnote_insn (trial);
2154 /* This must be an INSN or CALL_INSN. */
2155 pat = PATTERN (trial);
2157 /* USE and CLOBBER at this level was just for flow; ignore it. */
2158 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2161 /* Check for resource conflict first, to avoid unnecessary
2163 if (! insn_references_resource_p (trial, &set, 1)
2164 && ! insn_sets_resource_p (trial, &set, 1)
2165 && ! insn_sets_resource_p (trial, &needed, 1)
2167 /* Can't separate set of cc0 from its use. */
2168 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))
2172 trial = try_split (pat, trial, 1);
2173 next_trial = prev_nonnote_insn (trial);
2174 if (eligible_for_delay (insn, slots_filled, trial, flags))
2176 /* In this case, we are searching backward, so if we
2177 find insns to put on the delay list, we want
2178 to put them at the head, rather than the
2179 tail, of the list. */
2181 update_reg_dead_notes (trial, insn);
2182 delay_list = gen_rtx_INSN_LIST (VOIDmode,
2184 update_block (trial, trial);
2185 delete_insn (trial);
2186 if (slots_to_fill == ++slots_filled)
2192 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2193 mark_referenced_resources (trial, &needed, 1);
2197 /* If all needed slots haven't been filled, we come here. */
2199 /* Try to optimize case of jumping around a single insn. */
2200 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
2201 if (slots_filled != slots_to_fill
2203 && GET_CODE (insn) == JUMP_INSN
2204 && (condjump_p (insn) || condjump_in_parallel_p (insn)))
2206 delay_list = optimize_skip (insn);
2212 /* Try to get insns from beyond the insn needing the delay slot.
2213 These insns can neither set or reference resources set in insns being
2214 skipped, cannot set resources in the insn being skipped, and, if this
2215 is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the
2216 call might not return).
2218 There used to be code which continued past the target label if
2219 we saw all uses of the target label. This code did not work,
2220 because it failed to account for some instructions which were
2221 both annulled and marked as from the target. This can happen as a
2222 result of optimize_skip. Since this code was redundant with
2223 fill_eager_delay_slots anyways, it was just deleted. */
2225 if (slots_filled != slots_to_fill
2226 /* If this instruction could throw an exception which is
2227 caught in the same function, then it's not safe to fill
2228 the delay slot with an instruction from beyond this
2229 point. For example, consider:
2240 Even though `i' is a local variable, we must be sure not
2241 to put `i = 3' in the delay slot if `f' might throw an
2244 Presumably, we should also check to see if we could get
2245 back to this function via `setjmp'. */
2246 && !can_throw_internal (insn)
2247 && (GET_CODE (insn) != JUMP_INSN
2248 || ((condjump_p (insn) || condjump_in_parallel_p (insn))
2249 && ! simplejump_p (insn)
2250 && JUMP_LABEL (insn) != 0)))
2252 /* Invariant: If insn is a JUMP_INSN, the insn's jump
2253 label. Otherwise, zero. */
2255 int maybe_never = 0;
2256 rtx pat, trial_delay;
2258 CLEAR_RESOURCE (&needed);
2259 CLEAR_RESOURCE (&set);
2261 if (GET_CODE (insn) == CALL_INSN)
2263 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
2264 mark_referenced_resources (insn, &needed, 1);
2269 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
2270 mark_referenced_resources (insn, &needed, 1);
2271 if (GET_CODE (insn) == JUMP_INSN)
2272 target = JUMP_LABEL (insn);
2276 for (trial = next_nonnote_insn (insn); trial; trial = next_trial)
2278 next_trial = next_nonnote_insn (trial);
2280 if (GET_CODE (trial) == CODE_LABEL
2281 || GET_CODE (trial) == BARRIER)
2284 /* We must have an INSN, JUMP_INSN, or CALL_INSN. */
2285 pat = PATTERN (trial);
2287 /* Stand-alone USE and CLOBBER are just for flow. */
2288 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2291 /* If this already has filled delay slots, get the insn needing
2293 if (GET_CODE (pat) == SEQUENCE)
2294 trial_delay = XVECEXP (pat, 0, 0);
2296 trial_delay = trial;
2298 /* Stop our search when seeing an unconditional jump. */
2299 if (GET_CODE (trial_delay) == JUMP_INSN)
2302 /* See if we have a resource problem before we try to
2304 if (GET_CODE (pat) != SEQUENCE
2305 && ! insn_references_resource_p (trial, &set, 1)
2306 && ! insn_sets_resource_p (trial, &set, 1)
2307 && ! insn_sets_resource_p (trial, &needed, 1)
2309 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))
2311 && ! (maybe_never && may_trap_p (pat))
2312 && (trial = try_split (pat, trial, 0))
2313 && eligible_for_delay (insn, slots_filled, trial, flags))
2315 next_trial = next_nonnote_insn (trial);
2316 delay_list = add_to_delay_list (trial, delay_list);
2319 if (reg_mentioned_p (cc0_rtx, pat))
2320 link_cc0_insns (trial);
2323 delete_insn (trial);
2324 if (slots_to_fill == ++slots_filled)
2329 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2330 mark_referenced_resources (trial, &needed, 1);
2332 /* Ensure we don't put insns between the setting of cc and the
2333 comparison by moving a setting of cc into an earlier delay
2334 slot since these insns could clobber the condition code. */
2337 /* If this is a call or jump, we might not get here. */
2338 if (GET_CODE (trial_delay) == CALL_INSN
2339 || GET_CODE (trial_delay) == JUMP_INSN)
2343 /* If there are slots left to fill and our search was stopped by an
2344 unconditional branch, try the insn at the branch target. We can
2345 redirect the branch if it works.
2347 Don't do this if the insn at the branch target is a branch. */
2348 if (slots_to_fill != slots_filled
2350 && GET_CODE (trial) == JUMP_INSN
2351 && simplejump_p (trial)
2352 && (target == 0 || JUMP_LABEL (trial) == target)
2353 && (next_trial = next_active_insn (JUMP_LABEL (trial))) != 0
2354 && ! (GET_CODE (next_trial) == INSN
2355 && GET_CODE (PATTERN (next_trial)) == SEQUENCE)
2356 && GET_CODE (next_trial) != JUMP_INSN
2357 && ! insn_references_resource_p (next_trial, &set, 1)
2358 && ! insn_sets_resource_p (next_trial, &set, 1)
2359 && ! insn_sets_resource_p (next_trial, &needed, 1)
2361 && ! reg_mentioned_p (cc0_rtx, PATTERN (next_trial))
2363 && ! (maybe_never && may_trap_p (PATTERN (next_trial)))
2364 && (next_trial = try_split (PATTERN (next_trial), next_trial, 0))
2365 && eligible_for_delay (insn, slots_filled, next_trial, flags))
2367 rtx new_label = next_active_insn (next_trial);
2370 new_label = get_label_before (new_label);
2372 new_label = find_end_label ();
2375 = add_to_delay_list (copy_rtx (next_trial), delay_list);
2377 reorg_redirect_jump (trial, new_label);
2379 /* If we merged because we both jumped to the same place,
2380 redirect the original insn also. */
2382 reorg_redirect_jump (insn, new_label);
2386 /* If this is an unconditional jump, then try to get insns from the
2387 target of the jump. */
2388 if (GET_CODE (insn) == JUMP_INSN
2389 && simplejump_p (insn)
2390 && slots_filled != slots_to_fill)
2392 = fill_slots_from_thread (insn, const_true_rtx,
2393 next_active_insn (JUMP_LABEL (insn)),
2395 own_thread_p (JUMP_LABEL (insn),
2396 JUMP_LABEL (insn), 0),
2397 slots_to_fill, &slots_filled,
2401 unfilled_slots_base[i]
2402 = emit_delay_sequence (insn, delay_list, slots_filled);
2404 if (slots_to_fill == slots_filled)
2405 unfilled_slots_base[i] = 0;
2407 note_delay_statistics (slots_filled, 0);
2410 #ifdef DELAY_SLOTS_FOR_EPILOGUE
2411 /* See if the epilogue needs any delay slots. Try to fill them if so.
2412 The only thing we can do is scan backwards from the end of the
2413 function. If we did this in a previous pass, it is incorrect to do it
2415 if (current_function_epilogue_delay_list)
2418 slots_to_fill = DELAY_SLOTS_FOR_EPILOGUE;
2419 if (slots_to_fill == 0)
2423 CLEAR_RESOURCE (&set);
2425 /* The frame pointer and stack pointer are needed at the beginning of
2426 the epilogue, so instructions setting them can not be put in the
2427 epilogue delay slot. However, everything else needed at function
2428 end is safe, so we don't want to use end_of_function_needs here. */
2429 CLEAR_RESOURCE (&needed);
2430 if (frame_pointer_needed)
2432 SET_HARD_REG_BIT (needed.regs, FRAME_POINTER_REGNUM);
2433 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
2434 SET_HARD_REG_BIT (needed.regs, HARD_FRAME_POINTER_REGNUM);
2436 #ifdef EXIT_IGNORE_STACK
2437 if (! EXIT_IGNORE_STACK
2438 || current_function_sp_is_unchanging)
2440 SET_HARD_REG_BIT (needed.regs, STACK_POINTER_REGNUM);
2443 SET_HARD_REG_BIT (needed.regs, STACK_POINTER_REGNUM);
2445 #ifdef EPILOGUE_USES
2446 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2448 if (EPILOGUE_USES (i))
2449 SET_HARD_REG_BIT (needed.regs, i);
2453 for (trial = get_last_insn (); ! stop_search_p (trial, 1);
2454 trial = PREV_INSN (trial))
2456 if (GET_CODE (trial) == NOTE)
2458 pat = PATTERN (trial);
2459 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2462 if (! insn_references_resource_p (trial, &set, 1)
2463 && ! insn_sets_resource_p (trial, &needed, 1)
2464 && ! insn_sets_resource_p (trial, &set, 1)
2466 /* Don't want to mess with cc0 here. */
2467 && ! reg_mentioned_p (cc0_rtx, pat)
2471 trial = try_split (pat, trial, 1);
2472 if (ELIGIBLE_FOR_EPILOGUE_DELAY (trial, slots_filled))
2474 /* Here as well we are searching backward, so put the
2475 insns we find on the head of the list. */
2477 current_function_epilogue_delay_list
2478 = gen_rtx_INSN_LIST (VOIDmode, trial,
2479 current_function_epilogue_delay_list);
2480 mark_end_of_function_resources (trial, 1);
2481 update_block (trial, trial);
2482 delete_insn (trial);
2484 /* Clear deleted bit so final.c will output the insn. */
2485 INSN_DELETED_P (trial) = 0;
2487 if (slots_to_fill == ++slots_filled)
2493 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2494 mark_referenced_resources (trial, &needed, 1);
2497 note_delay_statistics (slots_filled, 0);
2501 /* Try to find insns to place in delay slots.
2503 INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION
2504 or is an unconditional branch if CONDITION is const_true_rtx.
2505 *PSLOTS_FILLED is updated with the number of slots that we have filled.
2507 THREAD is a flow-of-control, either the insns to be executed if the
2508 branch is true or if the branch is false, THREAD_IF_TRUE says which.
2510 OPPOSITE_THREAD is the thread in the opposite direction. It is used
2511 to see if any potential delay slot insns set things needed there.
2513 LIKELY is non-zero if it is extremely likely that the branch will be
2514 taken and THREAD_IF_TRUE is set. This is used for the branch at the
2515 end of a loop back up to the top.
2517 OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the
2518 thread. I.e., it is the fallthrough code of our jump or the target of the
2519 jump when we are the only jump going there.
2521 If OWN_THREAD is false, it must be the "true" thread of a jump. In that
2522 case, we can only take insns from the head of the thread for our delay
2523 slot. We then adjust the jump to point after the insns we have taken. */
2526 fill_slots_from_thread (insn, condition, thread, opposite_thread, likely,
2527 thread_if_true, own_thread,
2528 slots_to_fill, pslots_filled, delay_list)
2531 rtx thread, opposite_thread;
2535 int slots_to_fill, *pslots_filled;
2539 struct resources opposite_needed, set, needed;
2545 /* Validate our arguments. */
2546 if ((condition == const_true_rtx && ! thread_if_true)
2547 || (! own_thread && ! thread_if_true))
2550 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2552 /* If our thread is the end of subroutine, we can't get any delay
2557 /* If this is an unconditional branch, nothing is needed at the
2558 opposite thread. Otherwise, compute what is needed there. */
2559 if (condition == const_true_rtx)
2560 CLEAR_RESOURCE (&opposite_needed);
2562 mark_target_live_regs (get_insns (), opposite_thread, &opposite_needed);
2564 /* If the insn at THREAD can be split, do it here to avoid having to
2565 update THREAD and NEW_THREAD if it is done in the loop below. Also
2566 initialize NEW_THREAD. */
2568 new_thread = thread = try_split (PATTERN (thread), thread, 0);
2570 /* Scan insns at THREAD. We are looking for an insn that can be removed
2571 from THREAD (it neither sets nor references resources that were set
2572 ahead of it and it doesn't set anything needs by the insns ahead of
2573 it) and that either can be placed in an annulling insn or aren't
2574 needed at OPPOSITE_THREAD. */
2576 CLEAR_RESOURCE (&needed);
2577 CLEAR_RESOURCE (&set);
2579 /* If we do not own this thread, we must stop as soon as we find
2580 something that we can't put in a delay slot, since all we can do
2581 is branch into THREAD at a later point. Therefore, labels stop
2582 the search if this is not the `true' thread. */
2584 for (trial = thread;
2585 ! stop_search_p (trial, ! thread_if_true) && (! lose || own_thread);
2586 trial = next_nonnote_insn (trial))
2590 /* If we have passed a label, we no longer own this thread. */
2591 if (GET_CODE (trial) == CODE_LABEL)
2597 pat = PATTERN (trial);
2598 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2601 /* If TRIAL conflicts with the insns ahead of it, we lose. Also,
2602 don't separate or copy insns that set and use CC0. */
2603 if (! insn_references_resource_p (trial, &set, 1)
2604 && ! insn_sets_resource_p (trial, &set, 1)
2605 && ! insn_sets_resource_p (trial, &needed, 1)
2607 && ! (reg_mentioned_p (cc0_rtx, pat)
2608 && (! own_thread || ! sets_cc0_p (pat)))
2614 /* If TRIAL is redundant with some insn before INSN, we don't
2615 actually need to add it to the delay list; we can merely pretend
2617 if ((prior_insn = redundant_insn (trial, insn, delay_list)))
2619 fix_reg_dead_note (prior_insn, insn);
2622 update_block (trial, thread);
2623 if (trial == thread)
2625 thread = next_active_insn (thread);
2626 if (new_thread == trial)
2627 new_thread = thread;
2630 delete_insn (trial);
2634 update_reg_unused_notes (prior_insn, trial);
2635 new_thread = next_active_insn (trial);
2641 /* There are two ways we can win: If TRIAL doesn't set anything
2642 needed at the opposite thread and can't trap, or if it can
2643 go into an annulled delay slot. */
2645 && (condition == const_true_rtx
2646 || (! insn_sets_resource_p (trial, &opposite_needed, 1)
2647 && ! may_trap_p (pat))))
2650 trial = try_split (pat, trial, 0);
2651 if (new_thread == old_trial)
2653 if (thread == old_trial)
2655 pat = PATTERN (trial);
2656 if (eligible_for_delay (insn, *pslots_filled, trial, flags))
2660 #ifdef ANNUL_IFTRUE_SLOTS
2663 #ifdef ANNUL_IFFALSE_SLOTS
2669 trial = try_split (pat, trial, 0);
2670 if (new_thread == old_trial)
2672 if (thread == old_trial)
2674 pat = PATTERN (trial);
2675 if ((must_annul || delay_list == NULL) && (thread_if_true
2676 ? check_annul_list_true_false (0, delay_list)
2677 && eligible_for_annul_false (insn, *pslots_filled, trial, flags)
2678 : check_annul_list_true_false (1, delay_list)
2679 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
2687 if (reg_mentioned_p (cc0_rtx, pat))
2688 link_cc0_insns (trial);
2691 /* If we own this thread, delete the insn. If this is the
2692 destination of a branch, show that a basic block status
2693 may have been updated. In any case, mark the new
2694 starting point of this thread. */
2697 update_block (trial, thread);
2698 if (trial == thread)
2700 thread = next_active_insn (thread);
2701 if (new_thread == trial)
2702 new_thread = thread;
2704 delete_insn (trial);
2707 new_thread = next_active_insn (trial);
2709 temp = own_thread ? trial : copy_rtx (trial);
2711 INSN_FROM_TARGET_P (temp) = 1;
2713 delay_list = add_to_delay_list (temp, delay_list);
2715 if (slots_to_fill == ++(*pslots_filled))
2717 /* Even though we have filled all the slots, we
2718 may be branching to a location that has a
2719 redundant insn. Skip any if so. */
2720 while (new_thread && ! own_thread
2721 && ! insn_sets_resource_p (new_thread, &set, 1)
2722 && ! insn_sets_resource_p (new_thread, &needed, 1)
2723 && ! insn_references_resource_p (new_thread,
2726 = redundant_insn (new_thread, insn,
2729 /* We know we do not own the thread, so no need
2730 to call update_block and delete_insn. */
2731 fix_reg_dead_note (prior_insn, insn);
2732 update_reg_unused_notes (prior_insn, new_thread);
2733 new_thread = next_active_insn (new_thread);
2743 /* This insn can't go into a delay slot. */
2745 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2746 mark_referenced_resources (trial, &needed, 1);
2748 /* Ensure we don't put insns between the setting of cc and the comparison
2749 by moving a setting of cc into an earlier delay slot since these insns
2750 could clobber the condition code. */
2753 /* If this insn is a register-register copy and the next insn has
2754 a use of our destination, change it to use our source. That way,
2755 it will become a candidate for our delay slot the next time
2756 through this loop. This case occurs commonly in loops that
2759 We could check for more complex cases than those tested below,
2760 but it doesn't seem worth it. It might also be a good idea to try
2761 to swap the two insns. That might do better.
2763 We can't do this if the next insn modifies our destination, because
2764 that would make the replacement into the insn invalid. We also can't
2765 do this if it modifies our source, because it might be an earlyclobber
2766 operand. This latter test also prevents updating the contents of
2769 if (GET_CODE (trial) == INSN && GET_CODE (pat) == SET
2770 && GET_CODE (SET_SRC (pat)) == REG
2771 && GET_CODE (SET_DEST (pat)) == REG)
2773 rtx next = next_nonnote_insn (trial);
2775 if (next && GET_CODE (next) == INSN
2776 && GET_CODE (PATTERN (next)) != USE
2777 && ! reg_set_p (SET_DEST (pat), next)
2778 && ! reg_set_p (SET_SRC (pat), next)
2779 && reg_referenced_p (SET_DEST (pat), PATTERN (next))
2780 && ! modified_in_p (SET_DEST (pat), next))
2781 validate_replace_rtx (SET_DEST (pat), SET_SRC (pat), next);
2785 /* If we stopped on a branch insn that has delay slots, see if we can
2786 steal some of the insns in those slots. */
2787 if (trial && GET_CODE (trial) == INSN
2788 && GET_CODE (PATTERN (trial)) == SEQUENCE
2789 && GET_CODE (XVECEXP (PATTERN (trial), 0, 0)) == JUMP_INSN)
2791 /* If this is the `true' thread, we will want to follow the jump,
2792 so we can only do this if we have taken everything up to here. */
2793 if (thread_if_true && trial == new_thread)
2795 = steal_delay_list_from_target (insn, condition, PATTERN (trial),
2796 delay_list, &set, &needed,
2797 &opposite_needed, slots_to_fill,
2798 pslots_filled, &must_annul,
2800 else if (! thread_if_true)
2802 = steal_delay_list_from_fallthrough (insn, condition,
2804 delay_list, &set, &needed,
2805 &opposite_needed, slots_to_fill,
2806 pslots_filled, &must_annul);
2809 /* If we haven't found anything for this delay slot and it is very
2810 likely that the branch will be taken, see if the insn at our target
2811 increments or decrements a register with an increment that does not
2812 depend on the destination register. If so, try to place the opposite
2813 arithmetic insn after the jump insn and put the arithmetic insn in the
2814 delay slot. If we can't do this, return. */
2815 if (delay_list == 0 && likely && new_thread
2816 && GET_CODE (new_thread) == INSN
2817 && GET_CODE (PATTERN (new_thread)) != ASM_INPUT
2818 && asm_noperands (PATTERN (new_thread)) < 0)
2820 rtx pat = PATTERN (new_thread);
2825 pat = PATTERN (trial);
2827 if (GET_CODE (trial) != INSN || GET_CODE (pat) != SET
2828 || ! eligible_for_delay (insn, 0, trial, flags))
2831 dest = SET_DEST (pat), src = SET_SRC (pat);
2832 if ((GET_CODE (src) == PLUS || GET_CODE (src) == MINUS)
2833 && rtx_equal_p (XEXP (src, 0), dest)
2834 && ! reg_overlap_mentioned_p (dest, XEXP (src, 1))
2835 && ! side_effects_p (pat))
2837 rtx other = XEXP (src, 1);
2841 /* If this is a constant adjustment, use the same code with
2842 the negated constant. Otherwise, reverse the sense of the
2844 if (GET_CODE (other) == CONST_INT)
2845 new_arith = gen_rtx_fmt_ee (GET_CODE (src), GET_MODE (src), dest,
2846 negate_rtx (GET_MODE (src), other));
2848 new_arith = gen_rtx_fmt_ee (GET_CODE (src) == PLUS ? MINUS : PLUS,
2849 GET_MODE (src), dest, other);
2851 ninsn = emit_insn_after (gen_rtx_SET (VOIDmode, dest, new_arith),
2854 if (recog_memoized (ninsn) < 0
2855 || (extract_insn (ninsn), ! constrain_operands (1)))
2857 delete_insn (ninsn);
2863 update_block (trial, thread);
2864 if (trial == thread)
2866 thread = next_active_insn (thread);
2867 if (new_thread == trial)
2868 new_thread = thread;
2870 delete_insn (trial);
2873 new_thread = next_active_insn (trial);
2875 ninsn = own_thread ? trial : copy_rtx (trial);
2877 INSN_FROM_TARGET_P (ninsn) = 1;
2879 delay_list = add_to_delay_list (ninsn, NULL_RTX);
2884 if (delay_list && must_annul)
2885 INSN_ANNULLED_BRANCH_P (insn) = 1;
2887 /* If we are to branch into the middle of this thread, find an appropriate
2888 label or make a new one if none, and redirect INSN to it. If we hit the
2889 end of the function, use the end-of-function label. */
2890 if (new_thread != thread)
2894 if (! thread_if_true)
2897 if (new_thread && GET_CODE (new_thread) == JUMP_INSN
2898 && (simplejump_p (new_thread)
2899 || GET_CODE (PATTERN (new_thread)) == RETURN)
2900 && redirect_with_delay_list_safe_p (insn,
2901 JUMP_LABEL (new_thread),
2903 new_thread = follow_jumps (JUMP_LABEL (new_thread));
2905 if (new_thread == 0)
2906 label = find_end_label ();
2907 else if (GET_CODE (new_thread) == CODE_LABEL)
2910 label = get_label_before (new_thread);
2912 reorg_redirect_jump (insn, label);
2918 /* Make another attempt to find insns to place in delay slots.
2920 We previously looked for insns located in front of the delay insn
2921 and, for non-jump delay insns, located behind the delay insn.
2923 Here only try to schedule jump insns and try to move insns from either
2924 the target or the following insns into the delay slot. If annulling is
2925 supported, we will be likely to do this. Otherwise, we can do this only
2929 fill_eager_delay_slots ()
2933 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
2935 for (i = 0; i < num_unfilled_slots; i++)
2938 rtx target_label, insn_at_target, fallthrough_insn;
2941 int own_fallthrough;
2942 int prediction, slots_to_fill, slots_filled;
2944 insn = unfilled_slots_base[i];
2946 || INSN_DELETED_P (insn)
2947 || GET_CODE (insn) != JUMP_INSN
2948 || ! (condjump_p (insn) || condjump_in_parallel_p (insn)))
2951 slots_to_fill = num_delay_slots (insn);
2952 /* Some machine description have defined instructions to have
2953 delay slots only in certain circumstances which may depend on
2954 nearby insns (which change due to reorg's actions).
2956 For example, the PA port normally has delay slots for unconditional
2959 However, the PA port claims such jumps do not have a delay slot
2960 if they are immediate successors of certain CALL_INSNs. This
2961 allows the port to favor filling the delay slot of the call with
2962 the unconditional jump. */
2963 if (slots_to_fill == 0)
2967 target_label = JUMP_LABEL (insn);
2968 condition = get_branch_condition (insn, target_label);
2973 /* Get the next active fallthrough and target insns and see if we own
2974 them. Then see whether the branch is likely true. We don't need
2975 to do a lot of this for unconditional branches. */
2977 insn_at_target = next_active_insn (target_label);
2978 own_target = own_thread_p (target_label, target_label, 0);
2980 if (condition == const_true_rtx)
2982 own_fallthrough = 0;
2983 fallthrough_insn = 0;
2988 fallthrough_insn = next_active_insn (insn);
2989 own_fallthrough = own_thread_p (NEXT_INSN (insn), NULL_RTX, 1);
2990 prediction = mostly_true_jump (insn, condition);
2993 /* If this insn is expected to branch, first try to get insns from our
2994 target, then our fallthrough insns. If it is not expected to branch,
2995 try the other order. */
3000 = fill_slots_from_thread (insn, condition, insn_at_target,
3001 fallthrough_insn, prediction == 2, 1,
3003 slots_to_fill, &slots_filled, delay_list);
3005 if (delay_list == 0 && own_fallthrough)
3007 /* Even though we didn't find anything for delay slots,
3008 we might have found a redundant insn which we deleted
3009 from the thread that was filled. So we have to recompute
3010 the next insn at the target. */
3011 target_label = JUMP_LABEL (insn);
3012 insn_at_target = next_active_insn (target_label);
3015 = fill_slots_from_thread (insn, condition, fallthrough_insn,
3016 insn_at_target, 0, 0,
3018 slots_to_fill, &slots_filled,
3024 if (own_fallthrough)
3026 = fill_slots_from_thread (insn, condition, fallthrough_insn,
3027 insn_at_target, 0, 0,
3029 slots_to_fill, &slots_filled,
3032 if (delay_list == 0)
3034 = fill_slots_from_thread (insn, condition, insn_at_target,
3035 next_active_insn (insn), 0, 1,
3037 slots_to_fill, &slots_filled,
3042 unfilled_slots_base[i]
3043 = emit_delay_sequence (insn, delay_list, slots_filled);
3045 if (slots_to_fill == slots_filled)
3046 unfilled_slots_base[i] = 0;
3048 note_delay_statistics (slots_filled, 1);
3052 /* Once we have tried two ways to fill a delay slot, make a pass over the
3053 code to try to improve the results and to do such things as more jump
3057 relax_delay_slots (first)
3060 register rtx insn, next, pat;
3061 register rtx trial, delay_insn, target_label;
3063 /* Look at every JUMP_INSN and see if we can improve it. */
3064 for (insn = first; insn; insn = next)
3068 next = next_active_insn (insn);
3070 /* If this is a jump insn, see if it now jumps to a jump, jumps to
3071 the next insn, or jumps to a label that is not the last of a
3072 group of consecutive labels. */
3073 if (GET_CODE (insn) == JUMP_INSN
3074 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3075 && (target_label = JUMP_LABEL (insn)) != 0)
3077 target_label = follow_jumps (target_label);
3078 target_label = prev_label (next_active_insn (target_label));
3080 if (target_label == 0)
3081 target_label = find_end_label ();
3083 if (next_active_insn (target_label) == next
3084 && ! condjump_in_parallel_p (insn))
3090 if (target_label != JUMP_LABEL (insn))
3091 reorg_redirect_jump (insn, target_label);
3093 /* See if this jump branches around a unconditional jump.
3094 If so, invert this jump and point it to the target of the
3096 if (next && GET_CODE (next) == JUMP_INSN
3097 && (simplejump_p (next) || GET_CODE (PATTERN (next)) == RETURN)
3098 && next_active_insn (target_label) == next_active_insn (next)
3099 && no_labels_between_p (insn, next))
3101 rtx label = JUMP_LABEL (next);
3103 /* Be careful how we do this to avoid deleting code or
3104 labels that are momentarily dead. See similar optimization
3107 We also need to ensure we properly handle the case when
3108 invert_jump fails. */
3110 ++LABEL_NUSES (target_label);
3112 ++LABEL_NUSES (label);
3114 if (invert_jump (insn, label, 1))
3121 --LABEL_NUSES (label);
3123 if (--LABEL_NUSES (target_label) == 0)
3124 delete_insn (target_label);
3130 /* If this is an unconditional jump and the previous insn is a
3131 conditional jump, try reversing the condition of the previous
3132 insn and swapping our targets. The next pass might be able to
3135 Don't do this if we expect the conditional branch to be true, because
3136 we would then be making the more common case longer. */
3138 if (GET_CODE (insn) == JUMP_INSN
3139 && (simplejump_p (insn) || GET_CODE (PATTERN (insn)) == RETURN)
3140 && (other = prev_active_insn (insn)) != 0
3141 && (condjump_p (other) || condjump_in_parallel_p (other))
3142 && no_labels_between_p (other, insn)
3143 && 0 > mostly_true_jump (other,
3144 get_branch_condition (other,
3145 JUMP_LABEL (other))))
3147 rtx other_target = JUMP_LABEL (other);
3148 target_label = JUMP_LABEL (insn);
3150 if (invert_jump (other, target_label, 0))
3151 reorg_redirect_jump (insn, other_target);
3154 /* Now look only at cases where we have filled a delay slot. */
3155 if (GET_CODE (insn) != INSN
3156 || GET_CODE (PATTERN (insn)) != SEQUENCE)
3159 pat = PATTERN (insn);
3160 delay_insn = XVECEXP (pat, 0, 0);
3162 /* See if the first insn in the delay slot is redundant with some
3163 previous insn. Remove it from the delay slot if so; then set up
3164 to reprocess this insn. */
3165 if (redundant_insn (XVECEXP (pat, 0, 1), delay_insn, 0))
3167 delete_from_delay_slot (XVECEXP (pat, 0, 1));
3168 next = prev_active_insn (next);
3172 /* See if we have a RETURN insn with a filled delay slot followed
3173 by a RETURN insn with an unfilled a delay slot. If so, we can delete
3174 the first RETURN (but not it's delay insn). This gives the same
3175 effect in fewer instructions.
3177 Only do so if optimizing for size since this results in slower, but
3180 && GET_CODE (PATTERN (delay_insn)) == RETURN
3182 && GET_CODE (next) == JUMP_INSN
3183 && GET_CODE (PATTERN (next)) == RETURN)
3187 /* Delete the RETURN and just execute the delay list insns.
3189 We do this by deleting the INSN containing the SEQUENCE, then
3190 re-emitting the insns separately, and then deleting the RETURN.
3191 This allows the count of the jump target to be properly
3194 /* Clear the from target bit, since these insns are no longer
3196 for (i = 0; i < XVECLEN (pat, 0); i++)
3197 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3199 trial = PREV_INSN (insn);
3201 emit_insn_after (pat, trial);
3202 delete_scheduled_jump (delay_insn);
3206 /* Now look only at the cases where we have a filled JUMP_INSN. */
3207 if (GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) != JUMP_INSN
3208 || ! (condjump_p (XVECEXP (PATTERN (insn), 0, 0))
3209 || condjump_in_parallel_p (XVECEXP (PATTERN (insn), 0, 0))))
3212 target_label = JUMP_LABEL (delay_insn);
3216 /* If this jump goes to another unconditional jump, thread it, but
3217 don't convert a jump into a RETURN here. */
3218 trial = follow_jumps (target_label);
3219 /* We use next_real_insn instead of next_active_insn, so that
3220 the special USE insns emitted by reorg won't be ignored.
3221 If they are ignored, then they will get deleted if target_label
3222 is now unreachable, and that would cause mark_target_live_regs
3224 trial = prev_label (next_real_insn (trial));
3225 if (trial == 0 && target_label != 0)
3226 trial = find_end_label ();
3228 if (trial != target_label
3229 && redirect_with_delay_slots_safe_p (delay_insn, trial, insn))
3231 reorg_redirect_jump (delay_insn, trial);
3232 target_label = trial;
3235 /* If the first insn at TARGET_LABEL is redundant with a previous
3236 insn, redirect the jump to the following insn process again. */
3237 trial = next_active_insn (target_label);
3238 if (trial && GET_CODE (PATTERN (trial)) != SEQUENCE
3239 && redundant_insn (trial, insn, 0))
3243 /* Figure out where to emit the special USE insn so we don't
3244 later incorrectly compute register live/death info. */
3245 tmp = next_active_insn (trial);
3247 tmp = find_end_label ();
3249 /* Insert the special USE insn and update dataflow info. */
3250 update_block (trial, tmp);
3252 /* Now emit a label before the special USE insn, and
3253 redirect our jump to the new label. */
3254 target_label = get_label_before (PREV_INSN (tmp));
3255 reorg_redirect_jump (delay_insn, target_label);
3260 /* Similarly, if it is an unconditional jump with one insn in its
3261 delay list and that insn is redundant, thread the jump. */
3262 if (trial && GET_CODE (PATTERN (trial)) == SEQUENCE
3263 && XVECLEN (PATTERN (trial), 0) == 2
3264 && GET_CODE (XVECEXP (PATTERN (trial), 0, 0)) == JUMP_INSN
3265 && (simplejump_p (XVECEXP (PATTERN (trial), 0, 0))
3266 || GET_CODE (PATTERN (XVECEXP (PATTERN (trial), 0, 0))) == RETURN)
3267 && redundant_insn (XVECEXP (PATTERN (trial), 0, 1), insn, 0))
3269 target_label = JUMP_LABEL (XVECEXP (PATTERN (trial), 0, 0));
3270 if (target_label == 0)
3271 target_label = find_end_label ();
3273 if (redirect_with_delay_slots_safe_p (delay_insn, target_label,
3276 reorg_redirect_jump (delay_insn, target_label);
3283 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3284 && prev_active_insn (target_label) == insn
3285 && ! condjump_in_parallel_p (delay_insn)
3287 /* If the last insn in the delay slot sets CC0 for some insn,
3288 various code assumes that it is in a delay slot. We could
3289 put it back where it belonged and delete the register notes,
3290 but it doesn't seem worthwhile in this uncommon case. */
3291 && ! find_reg_note (XVECEXP (pat, 0, XVECLEN (pat, 0) - 1),
3292 REG_CC_USER, NULL_RTX)
3298 /* All this insn does is execute its delay list and jump to the
3299 following insn. So delete the jump and just execute the delay
3302 We do this by deleting the INSN containing the SEQUENCE, then
3303 re-emitting the insns separately, and then deleting the jump.
3304 This allows the count of the jump target to be properly
3307 /* Clear the from target bit, since these insns are no longer
3309 for (i = 0; i < XVECLEN (pat, 0); i++)
3310 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3312 trial = PREV_INSN (insn);
3314 emit_insn_after (pat, trial);
3315 delete_scheduled_jump (delay_insn);
3319 /* See if this is an unconditional jump around a single insn which is
3320 identical to the one in its delay slot. In this case, we can just
3321 delete the branch and the insn in its delay slot. */
3322 if (next && GET_CODE (next) == INSN
3323 && prev_label (next_active_insn (next)) == target_label
3324 && simplejump_p (insn)
3325 && XVECLEN (pat, 0) == 2
3326 && rtx_equal_p (PATTERN (next), PATTERN (XVECEXP (pat, 0, 1))))
3332 /* See if this jump (with its delay slots) branches around another
3333 jump (without delay slots). If so, invert this jump and point
3334 it to the target of the second jump. We cannot do this for
3335 annulled jumps, though. Again, don't convert a jump to a RETURN
3337 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3338 && next && GET_CODE (next) == JUMP_INSN
3339 && (simplejump_p (next) || GET_CODE (PATTERN (next)) == RETURN)
3340 && next_active_insn (target_label) == next_active_insn (next)
3341 && no_labels_between_p (insn, next))
3343 rtx label = JUMP_LABEL (next);
3344 rtx old_label = JUMP_LABEL (delay_insn);
3347 label = find_end_label ();
3349 /* find_end_label can generate a new label. Check this first. */
3350 if (no_labels_between_p (insn, next)
3351 && redirect_with_delay_slots_safe_p (delay_insn, label, insn))
3353 /* Be careful how we do this to avoid deleting code or labels
3354 that are momentarily dead. See similar optimization in
3357 ++LABEL_NUSES (old_label);
3359 if (invert_jump (delay_insn, label, 1))
3363 /* Must update the INSN_FROM_TARGET_P bits now that
3364 the branch is reversed, so that mark_target_live_regs
3365 will handle the delay slot insn correctly. */
3366 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
3368 rtx slot = XVECEXP (PATTERN (insn), 0, i);
3369 INSN_FROM_TARGET_P (slot) = ! INSN_FROM_TARGET_P (slot);
3376 if (old_label && --LABEL_NUSES (old_label) == 0)
3377 delete_insn (old_label);
3382 /* If we own the thread opposite the way this insn branches, see if we
3383 can merge its delay slots with following insns. */
3384 if (INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
3385 && own_thread_p (NEXT_INSN (insn), 0, 1))
3386 try_merge_delay_insns (insn, next);
3387 else if (! INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
3388 && own_thread_p (target_label, target_label, 0))
3389 try_merge_delay_insns (insn, next_active_insn (target_label));
3391 /* If we get here, we haven't deleted INSN. But we may have deleted
3392 NEXT, so recompute it. */
3393 next = next_active_insn (insn);
3399 /* Look for filled jumps to the end of function label. We can try to convert
3400 them into RETURN insns if the insns in the delay slot are valid for the
3404 make_return_insns (first)
3407 rtx insn, jump_insn, pat;
3408 rtx real_return_label = end_of_function_label;
3411 /* See if there is a RETURN insn in the function other than the one we
3412 made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change
3413 into a RETURN to jump to it. */
3414 for (insn = first; insn; insn = NEXT_INSN (insn))
3415 if (GET_CODE (insn) == JUMP_INSN && GET_CODE (PATTERN (insn)) == RETURN)
3417 real_return_label = get_label_before (insn);
3421 /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
3422 was equal to END_OF_FUNCTION_LABEL. */
3423 LABEL_NUSES (real_return_label)++;
3425 /* Clear the list of insns to fill so we can use it. */
3426 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3428 for (insn = first; insn; insn = NEXT_INSN (insn))
3432 /* Only look at filled JUMP_INSNs that go to the end of function
3434 if (GET_CODE (insn) != INSN
3435 || GET_CODE (PATTERN (insn)) != SEQUENCE
3436 || GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) != JUMP_INSN
3437 || JUMP_LABEL (XVECEXP (PATTERN (insn), 0, 0)) != end_of_function_label)
3440 pat = PATTERN (insn);
3441 jump_insn = XVECEXP (pat, 0, 0);
3443 /* If we can't make the jump into a RETURN, try to redirect it to the best
3444 RETURN and go on to the next insn. */
3445 if (! reorg_redirect_jump (jump_insn, NULL_RTX))
3447 /* Make sure redirecting the jump will not invalidate the delay
3449 if (redirect_with_delay_slots_safe_p (jump_insn,
3452 reorg_redirect_jump (jump_insn, real_return_label);
3456 /* See if this RETURN can accept the insns current in its delay slot.
3457 It can if it has more or an equal number of slots and the contents
3458 of each is valid. */
3460 flags = get_jump_flags (jump_insn, JUMP_LABEL (jump_insn));
3461 slots = num_delay_slots (jump_insn);
3462 if (slots >= XVECLEN (pat, 0) - 1)
3464 for (i = 1; i < XVECLEN (pat, 0); i++)
3466 #ifdef ANNUL_IFFALSE_SLOTS
3467 (INSN_ANNULLED_BRANCH_P (jump_insn)
3468 && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
3469 ? eligible_for_annul_false (jump_insn, i - 1,
3470 XVECEXP (pat, 0, i), flags) :
3472 #ifdef ANNUL_IFTRUE_SLOTS
3473 (INSN_ANNULLED_BRANCH_P (jump_insn)
3474 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
3475 ? eligible_for_annul_true (jump_insn, i - 1,
3476 XVECEXP (pat, 0, i), flags) :
3478 eligible_for_delay (jump_insn, i - 1,
3479 XVECEXP (pat, 0, i), flags)))
3485 if (i == XVECLEN (pat, 0))
3488 /* We have to do something with this insn. If it is an unconditional
3489 RETURN, delete the SEQUENCE and output the individual insns,
3490 followed by the RETURN. Then set things up so we try to find
3491 insns for its delay slots, if it needs some. */
3492 if (GET_CODE (PATTERN (jump_insn)) == RETURN)
3494 rtx prev = PREV_INSN (insn);
3497 for (i = 1; i < XVECLEN (pat, 0); i++)
3498 prev = emit_insn_after (PATTERN (XVECEXP (pat, 0, i)), prev);
3500 insn = emit_jump_insn_after (PATTERN (jump_insn), prev);
3501 emit_barrier_after (insn);
3504 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3507 /* It is probably more efficient to keep this with its current
3508 delay slot as a branch to a RETURN. */
3509 reorg_redirect_jump (jump_insn, real_return_label);
3512 /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any
3513 new delay slots we have created. */
3514 if (--LABEL_NUSES (real_return_label) == 0)
3515 delete_insn (real_return_label);
3517 fill_simple_delay_slots (1);
3518 fill_simple_delay_slots (0);
3522 /* Try to find insns to place in delay slots. */
3525 dbr_schedule (first, file)
3529 rtx insn, next, epilogue_insn = 0;
3532 int old_flag_no_peephole = flag_no_peephole;
3534 /* Execute `final' once in prescan mode to delete any insns that won't be
3535 used. Don't let final try to do any peephole optimization--it will
3536 ruin dataflow information for this pass. */
3538 flag_no_peephole = 1;
3539 final (first, 0, NO_DEBUG, 1, 1);
3540 flag_no_peephole = old_flag_no_peephole;
3543 /* If the current function has no insns other than the prologue and
3544 epilogue, then do not try to fill any delay slots. */
3545 if (n_basic_blocks == 0)
3548 /* Find the highest INSN_UID and allocate and initialize our map from
3549 INSN_UID's to position in code. */
3550 for (max_uid = 0, insn = first; insn; insn = NEXT_INSN (insn))
3552 if (INSN_UID (insn) > max_uid)
3553 max_uid = INSN_UID (insn);
3554 if (GET_CODE (insn) == NOTE
3555 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_EPILOGUE_BEG)
3556 epilogue_insn = insn;
3559 uid_to_ruid = (int *) xmalloc ((max_uid + 1) * sizeof (int));
3560 for (i = 0, insn = first; insn; i++, insn = NEXT_INSN (insn))
3561 uid_to_ruid[INSN_UID (insn)] = i;
3563 /* Initialize the list of insns that need filling. */
3564 if (unfilled_firstobj == 0)
3566 gcc_obstack_init (&unfilled_slots_obstack);
3567 unfilled_firstobj = (rtx *) obstack_alloc (&unfilled_slots_obstack, 0);
3570 for (insn = next_active_insn (first); insn; insn = next_active_insn (insn))
3574 INSN_ANNULLED_BRANCH_P (insn) = 0;
3575 INSN_FROM_TARGET_P (insn) = 0;
3577 /* Skip vector tables. We can't get attributes for them. */
3578 if (GET_CODE (insn) == JUMP_INSN
3579 && (GET_CODE (PATTERN (insn)) == ADDR_VEC
3580 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC))
3583 if (num_delay_slots (insn) > 0)
3584 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3586 /* Ensure all jumps go to the last of a set of consecutive labels. */
3587 if (GET_CODE (insn) == JUMP_INSN
3588 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3589 && JUMP_LABEL (insn) != 0
3590 && ((target = prev_label (next_active_insn (JUMP_LABEL (insn))))
3591 != JUMP_LABEL (insn)))
3592 redirect_jump (insn, target, 1);
3595 init_resource_info (epilogue_insn);
3597 /* Show we haven't computed an end-of-function label yet. */
3598 end_of_function_label = 0;
3600 /* Initialize the statistics for this function. */
3601 memset ((char *) num_insns_needing_delays, 0, sizeof num_insns_needing_delays);
3602 memset ((char *) num_filled_delays, 0, sizeof num_filled_delays);
3604 /* Now do the delay slot filling. Try everything twice in case earlier
3605 changes make more slots fillable. */
3607 for (reorg_pass_number = 0;
3608 reorg_pass_number < MAX_REORG_PASSES;
3609 reorg_pass_number++)
3611 fill_simple_delay_slots (1);
3612 fill_simple_delay_slots (0);
3613 fill_eager_delay_slots ();
3614 relax_delay_slots (first);
3617 /* Delete any USE insns made by update_block; subsequent passes don't need
3618 them or know how to deal with them. */
3619 for (insn = first; insn; insn = next)
3621 next = NEXT_INSN (insn);
3623 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == USE
3624 && INSN_P (XEXP (PATTERN (insn), 0)))
3625 next = delete_insn (insn);
3628 /* If we made an end of function label, indicate that it is now
3629 safe to delete it by undoing our prior adjustment to LABEL_NUSES.
3630 If it is now unused, delete it. */
3631 if (end_of_function_label && --LABEL_NUSES (end_of_function_label) == 0)
3632 delete_insn (end_of_function_label);
3635 if (HAVE_return && end_of_function_label != 0)
3636 make_return_insns (first);
3639 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3641 /* It is not clear why the line below is needed, but it does seem to be. */
3642 unfilled_firstobj = (rtx *) obstack_alloc (&unfilled_slots_obstack, 0);
3644 /* Reposition the prologue and epilogue notes in case we moved the
3645 prologue/epilogue insns. */
3646 reposition_prologue_and_epilogue_notes (first);
3650 register int i, j, need_comma;
3651 int total_delay_slots[MAX_DELAY_HISTOGRAM + 1];
3652 int total_annul_slots[MAX_DELAY_HISTOGRAM + 1];
3654 for (reorg_pass_number = 0;
3655 reorg_pass_number < MAX_REORG_PASSES;
3656 reorg_pass_number++)
3658 fprintf (file, ";; Reorg pass #%d:\n", reorg_pass_number + 1);
3659 for (i = 0; i < NUM_REORG_FUNCTIONS; i++)
3662 fprintf (file, ";; Reorg function #%d\n", i);
3664 fprintf (file, ";; %d insns needing delay slots\n;; ",
3665 num_insns_needing_delays[i][reorg_pass_number]);
3667 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3668 if (num_filled_delays[i][j][reorg_pass_number])
3671 fprintf (file, ", ");
3673 fprintf (file, "%d got %d delays",
3674 num_filled_delays[i][j][reorg_pass_number], j);
3676 fprintf (file, "\n");
3679 memset ((char *) total_delay_slots, 0, sizeof total_delay_slots);
3680 memset ((char *) total_annul_slots, 0, sizeof total_annul_slots);
3681 for (insn = first; insn; insn = NEXT_INSN (insn))
3683 if (! INSN_DELETED_P (insn)
3684 && GET_CODE (insn) == INSN
3685 && GET_CODE (PATTERN (insn)) != USE
3686 && GET_CODE (PATTERN (insn)) != CLOBBER)
3688 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
3690 j = XVECLEN (PATTERN (insn), 0) - 1;
3691 if (j > MAX_DELAY_HISTOGRAM)
3692 j = MAX_DELAY_HISTOGRAM;
3693 if (INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (insn), 0, 0)))
3694 total_annul_slots[j]++;
3696 total_delay_slots[j]++;
3698 else if (num_delay_slots (insn) > 0)
3699 total_delay_slots[0]++;
3702 fprintf (file, ";; Reorg totals: ");
3704 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3706 if (total_delay_slots[j])
3709 fprintf (file, ", ");
3711 fprintf (file, "%d got %d delays", total_delay_slots[j], j);
3714 fprintf (file, "\n");
3715 #if defined (ANNUL_IFTRUE_SLOTS) || defined (ANNUL_IFFALSE_SLOTS)
3716 fprintf (file, ";; Reorg annuls: ");
3718 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3720 if (total_annul_slots[j])
3723 fprintf (file, ", ");
3725 fprintf (file, "%d got %d delays", total_annul_slots[j], j);
3728 fprintf (file, "\n");
3730 fprintf (file, "\n");
3733 /* For all JUMP insns, fill in branch prediction notes, so that during
3734 assembler output a target can set branch prediction bits in the code.
3735 We have to do this now, as up until this point the destinations of
3736 JUMPS can be moved around and changed, but past right here that cannot
3738 for (insn = first; insn; insn = NEXT_INSN (insn))
3742 if (GET_CODE (insn) == INSN)
3744 rtx pat = PATTERN (insn);
3746 if (GET_CODE (pat) == SEQUENCE)
3747 insn = XVECEXP (pat, 0, 0);
3749 if (GET_CODE (insn) != JUMP_INSN)
3752 pred_flags = get_jump_flags (insn, JUMP_LABEL (insn));
3753 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_BR_PRED,
3754 GEN_INT (pred_flags),
3757 free_resource_info ();
3760 #endif /* DELAY_SLOTS */