1 /* Perform instruction reorganizations for delay slot filling.
2 Copyright (C) 1992 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@nyu.edu).
4 Hacked by Michael Tiemann (tiemann@cygnus.com).
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22 /* Instruction reorganization pass.
24 This pass runs after register allocation and final jump
25 optimization. It should be the last pass to run before peephole.
26 It serves primarily to fill delay slots of insns, typically branch
27 and call insns. Other insns typically involve more complicated
28 interactions of data dependencies and resource constraints, and
29 are better handled by scheduling before register allocation (by the
30 function `schedule_insns').
32 The Branch Penalty is the number of extra cycles that are needed to
33 execute a branch insn. On an ideal machine, branches take a single
34 cycle, and the Branch Penalty is 0. Several RISC machines approach
35 branch delays differently:
37 The MIPS and AMD 29000 have a single branch delay slot. Most insns
38 (except other branches) can be used to fill this slot. When the
39 slot is filled, two insns execute in two cycles, reducing the
40 branch penalty to zero.
42 The Motorola 88000 conditionally exposes its branch delay slot,
43 so code is shorter when it is turned off, but will run faster
44 when useful insns are scheduled there.
46 The IBM ROMP has two forms of branch and call insns, both with and
47 without a delay slot. Much like the 88k, insns not using the delay
48 slot can be shorted (2 bytes vs. 4 bytes), but will run slowed.
50 The SPARC always has a branch delay slot, but its effects can be
51 annulled when the branch is not taken. This means that failing to
52 find other sources of insns, we can hoist an insn from the branch
53 target that would only be safe to execute knowing that the branch
56 The HP-PA always has a branch delay slot. For unconditional branches
57 its effects can be annulled when the branch is taken. The effects
58 of the delay slot in a conditional branch can be nullified for forward
59 taken branches, or for untaken backward branches. This means
60 we can hoist insns from the fall-through path for forward branches or
61 steal insns from the target of backward branches.
63 Three techniques for filling delay slots have been implemented so far:
65 (1) `fill_simple_delay_slots' is the simplest, most efficient way
66 to fill delay slots. This pass first looks for insns which come
67 from before the branch and which are safe to execute after the
68 branch. Then it searches after the insn requiring delay slots or,
69 in the case of a branch, for insns that are after the point at
70 which the branch merges into the fallthrough code, if such a point
71 exists. When such insns are found, the branch penalty decreases
72 and no code expansion takes place.
74 (2) `fill_eager_delay_slots' is more complicated: it is used for
75 scheduling conditional jumps, or for scheduling jumps which cannot
76 be filled using (1). A machine need not have annulled jumps to use
77 this strategy, but it helps (by keeping more options open).
78 `fill_eager_delay_slots' tries to guess the direction the branch
79 will go; if it guesses right 100% of the time, it can reduce the
80 branch penalty as much as `fill_simple_delay_slots' does. If it
81 guesses wrong 100% of the time, it might as well schedule nops (or
82 on the m88k, unexpose the branch slot). When
83 `fill_eager_delay_slots' takes insns from the fall-through path of
84 the jump, usually there is no code expansion; when it takes insns
85 from the branch target, there is code expansion if it is not the
86 only way to reach that target.
88 (3) `relax_delay_slots' uses a set of rules to simplify code that
89 has been reorganized by (1) and (2). It finds cases where
90 conditional test can be eliminated, jumps can be threaded, extra
91 insns can be eliminated, etc. It is the job of (1) and (2) to do a
92 good job of scheduling locally; `relax_delay_slots' takes care of
93 making the various individual schedules work well together. It is
94 especially tuned to handle the control flow interactions of branch
95 insns. It does nothing for insns with delay slots that do not
98 On machines that use CC0, we are very conservative. We will not make
99 a copy of an insn involving CC0 since we want to maintain a 1-1
100 correspondence between the insn that sets and uses CC0. The insns are
101 allowed to be separated by placing an insn that sets CC0 (but not an insn
102 that uses CC0; we could do this, but it doesn't seem worthwhile) in a
103 delay slot. In that case, we point each insn at the other with REG_CC_USER
104 and REG_CC_SETTER notes. Note that these restrictions affect very few
105 machines because most RISC machines with delay slots will not use CC0
106 (the RT is the only known exception at this point).
110 The Acorn Risc Machine can conditionally execute most insns, so
111 it is profitable to move single insns into a position to execute
112 based on the condition code of the previous insn.
114 The HP-PA can conditionally nullify insns, providing a similar
115 effect to the ARM, differing mostly in which insn is "in charge". */
120 #include "insn-config.h"
121 #include "conditions.h"
122 #include "hard-reg-set.h"
123 #include "basic-block.h"
125 #include "insn-flags.h"
130 #include "insn-attr.h"
134 #define obstack_chunk_alloc xmalloc
135 #define obstack_chunk_free free
137 #ifndef ANNUL_IFTRUE_SLOTS
138 #define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0
140 #ifndef ANNUL_IFFALSE_SLOTS
141 #define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0
144 /* Insns which have delay slots that have not yet been filled. */
146 static struct obstack unfilled_slots_obstack;
147 static rtx *unfilled_firstobj;
149 /* Define macros to refer to the first and last slot containing unfilled
150 insns. These are used because the list may move and its address
151 should be recomputed at each use. */
153 #define unfilled_slots_base \
154 ((rtx *) obstack_base (&unfilled_slots_obstack))
156 #define unfilled_slots_next \
157 ((rtx *) obstack_next_free (&unfilled_slots_obstack))
159 /* This structure is used to indicate which hardware resources are set or
160 needed by insns so far. */
164 char memory; /* Insn sets or needs a memory location. */
165 char volatil; /* Insn sets or needs a volatile memory loc. */
166 char cc; /* Insn sets or needs the condition codes. */
167 HARD_REG_SET regs; /* Which registers are set or needed. */
170 /* Macro to clear all resources. */
171 #define CLEAR_RESOURCE(RES) \
172 do { (RES)->memory = (RES)->volatil = (RES)->cc = 0; \
173 CLEAR_HARD_REG_SET ((RES)->regs); } while (0)
175 /* Indicates what resources are required at the beginning of the epilogue. */
176 static struct resources start_of_epilogue_needs;
178 /* Indicates what resources are required at function end. */
179 static struct resources end_of_function_needs;
181 /* Points to the label before the end of the function. */
182 static rtx end_of_function_label;
184 /* This structure is used to record liveness information at the targets or
185 fallthrough insns of branches. We will most likely need the information
186 at targets again, so save them in a hash table rather than recomputing them
191 int uid; /* INSN_UID of target. */
192 struct target_info *next; /* Next info for same hash bucket. */
193 HARD_REG_SET live_regs; /* Registers live at target. */
194 int block; /* Basic block number containing target. */
195 int bb_tick; /* Generation count of basic block info. */
198 #define TARGET_HASH_PRIME 257
200 /* Define the hash table itself. */
201 static struct target_info **target_hash_table;
203 /* For each basic block, we maintain a generation number of its basic
204 block info, which is updated each time we move an insn from the
205 target of a jump. This is the generation number indexed by block
208 static int *bb_ticks;
210 /* Mapping between INSN_UID's and position in the code since INSN_UID's do
211 not always monotonically increase. */
212 static int *uid_to_ruid;
214 /* Highest valid index in `uid_to_ruid'. */
217 static void mark_referenced_resources PROTO((rtx, struct resources *, int));
218 static void mark_set_resources PROTO((rtx, struct resources *, int, int));
219 static int stop_search_p PROTO((rtx, int));
220 static int resource_conflicts_p PROTO((struct resources *,
221 struct resources *));
222 static int insn_references_resource_p PROTO((rtx, struct resources *, int));
223 static int insn_sets_resources_p PROTO((rtx, struct resources *, int));
224 static rtx find_end_label PROTO((void));
225 static rtx emit_delay_sequence PROTO((rtx, rtx, int, int));
226 static rtx add_to_delay_list PROTO((rtx, rtx));
227 static void delete_from_delay_slot PROTO((rtx));
228 static void delete_scheduled_jump PROTO((rtx));
229 static void note_delay_statistics PROTO((int, int));
230 static rtx optimize_skip PROTO((rtx));
231 static int get_jump_flags PROTO((rtx, rtx));
232 static int rare_destination PROTO((rtx));
233 static int mostly_true_jump PROTO((rtx, rtx));
234 static rtx get_branch_condition PROTO((rtx, rtx));
235 static int condition_dominates_p PROTO((rtx, rtx));
236 static rtx steal_delay_list_from_target PROTO((rtx, rtx, rtx, rtx,
240 int, int *, int *, rtx *));
241 static rtx steal_delay_list_from_fallthrough PROTO((rtx, rtx, rtx, rtx,
246 static void try_merge_delay_insns PROTO((rtx, rtx));
247 static int redundant_insn_p PROTO((rtx, rtx, rtx));
248 static int own_thread_p PROTO((rtx, rtx, int));
249 static int find_basic_block PROTO((rtx));
250 static void update_block PROTO((rtx, rtx));
251 static void update_reg_dead_notes PROTO((rtx, rtx));
252 static void update_live_status PROTO((rtx, rtx));
253 static rtx next_insn_no_annul PROTO((rtx));
254 static void mark_target_live_regs PROTO((rtx, struct resources *));
255 static void fill_simple_delay_slots PROTO((rtx, int));
256 static rtx fill_slots_from_thread PROTO((rtx, rtx, rtx, rtx, int, int,
257 int, int, int, int *));
258 static void fill_eager_delay_slots PROTO((rtx));
259 static void relax_delay_slots PROTO((rtx));
260 static void make_return_insns PROTO((rtx));
262 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
263 which resources are references by the insn. If INCLUDE_CALLED_ROUTINE
264 is TRUE, resources used by the called routine will be included for
268 mark_referenced_resources (x, res, include_delayed_effects)
270 register struct resources *res;
271 register int include_delayed_effects;
273 register enum rtx_code code = GET_CODE (x);
275 register char *format_ptr;
277 /* Handle leaf items for which we set resource flags. Also, special-case
278 CALL, SET and CLOBBER operators. */
290 if (GET_CODE (SUBREG_REG (x)) != REG)
291 mark_referenced_resources (SUBREG_REG (x), res, 0);
294 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
295 int last_regno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
296 for (i = regno; i < last_regno; i++)
297 SET_HARD_REG_BIT (res->regs, i);
302 for (i = 0; i < HARD_REGNO_NREGS (REGNO (x), GET_MODE (x)); i++)
303 SET_HARD_REG_BIT (res->regs, REGNO (x) + i);
307 /* If this memory shouldn't change, it really isn't referencing
309 if (! RTX_UNCHANGING_P (x))
311 res->volatil = MEM_VOLATILE_P (x);
313 /* Mark registers used to access memory. */
314 mark_referenced_resources (XEXP (x, 0), res, 0);
321 case UNSPEC_VOLATILE:
323 /* Traditional asm's are always volatile. */
328 res->volatil = MEM_VOLATILE_P (x);
330 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
331 We can not just fall through here since then we would be confused
332 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
333 traditional asms unlike their normal usage. */
335 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
336 mark_referenced_resources (ASM_OPERANDS_INPUT (x, i), res, 0);
340 /* The first operand will be a (MEM (xxx)) but doesn't really reference
341 memory. The second operand may be referenced, though. */
342 mark_referenced_resources (XEXP (XEXP (x, 0), 0), res, 0);
343 mark_referenced_resources (XEXP (x, 1), res, 0);
347 /* Usually, the first operand of SET is set, not referenced. But
348 registers used to access memory are referenced. SET_DEST is
349 also referenced if it is a ZERO_EXTRACT or SIGN_EXTRACT. */
351 mark_referenced_resources (SET_SRC (x), res, 0);
354 if (GET_CODE (x) == SIGN_EXTRACT || GET_CODE (x) == ZERO_EXTRACT)
355 mark_referenced_resources (x, res, 0);
356 else if (GET_CODE (x) == SUBREG)
358 if (GET_CODE (x) == MEM)
359 mark_referenced_resources (XEXP (x, 0), res, 0);
366 if (include_delayed_effects)
368 /* A CALL references memory, the frame pointer if it exists, the
369 stack pointer, any global registers and any registers given in
370 USE insns immediately in front of the CALL.
372 However, we may have moved some of the parameter loading insns
373 into the delay slot of this CALL. If so, the USE's for them
374 don't count and should be skipped. */
375 rtx insn = PREV_INSN (x);
380 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
381 if (NEXT_INSN (insn) != x)
383 sequence = PATTERN (NEXT_INSN (insn));
384 seq_size = XVECLEN (sequence, 0);
385 if (GET_CODE (sequence) != SEQUENCE)
390 SET_HARD_REG_BIT (res->regs, STACK_POINTER_REGNUM);
391 if (frame_pointer_needed)
392 SET_HARD_REG_BIT (res->regs, FRAME_POINTER_REGNUM);
394 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
396 SET_HARD_REG_BIT (res->regs, i);
398 /* Skip any labels between the CALL_INSN and possible USE insns. */
399 while (GET_CODE (insn) == CODE_LABEL)
400 insn = PREV_INSN (insn);
402 for ( ; (insn && GET_CODE (insn) == INSN
403 && GET_CODE (PATTERN (insn)) == USE);
404 insn = PREV_INSN (insn))
406 for (i = 1; i < seq_size; i++)
408 rtx slot_pat = PATTERN (XVECEXP (sequence, 0, i));
409 if (GET_CODE (slot_pat) == SET
410 && rtx_equal_p (SET_DEST (slot_pat),
411 XEXP (PATTERN (insn), 0)))
415 mark_referenced_resources (XEXP (PATTERN (insn), 0), res, 0);
419 /* ... fall through to other INSN processing ... */
424 #ifdef INSN_REFERENCES_ARE_DELAYED
425 if (! include_delayed_effects
426 && INSN_REFERENCES_ARE_DELAYED (x))
430 /* No special processing, just speed up. */
431 mark_referenced_resources (PATTERN (x), res, include_delayed_effects);
435 /* Process each sub-expression and flag what it needs. */
436 format_ptr = GET_RTX_FORMAT (code);
437 for (i = 0; i < GET_RTX_LENGTH (code); i++)
438 switch (*format_ptr++)
441 mark_referenced_resources (XEXP (x, i), res, include_delayed_effects);
445 for (j = 0; j < XVECLEN (x, i); j++)
446 mark_referenced_resources (XVECEXP (x, i, j), res,
447 include_delayed_effects);
452 /* Given X, a part of an insn, and a pointer to a `struct resource', RES,
453 indicate which resources are modified by the insn. If INCLUDE_CALLED_ROUTINE
454 is nonzero, also mark resources potentially set by the called routine.
456 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
457 objects are being referenced instead of set.
459 We never mark the insn as modifying the condition code unless it explicitly
460 SETs CC0 even though this is not totally correct. The reason for this is
461 that we require a SET of CC0 to immediately precede the reference to CC0.
462 So if some other insn sets CC0 as a side-effect, we know it cannot affect
463 our computation and thus may be placed in a delay slot. */
466 mark_set_resources (x, res, in_dest, include_delayed_effects)
468 register struct resources *res;
470 int include_delayed_effects;
472 register enum rtx_code code;
474 register char *format_ptr;
492 /* These don't set any resources. */
501 /* Called routine modifies the condition code, memory, any registers
502 that aren't saved across calls, global registers and anything
503 explicitly CLOBBERed immediately after the CALL_INSN. */
505 if (include_delayed_effects)
507 rtx next = NEXT_INSN (x);
509 res->cc = res->memory = 1;
510 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
511 if (call_used_regs[i] || global_regs[i])
512 SET_HARD_REG_BIT (res->regs, i);
514 /* Skip any possible labels between the CALL_INSN and CLOBBERs. */
515 while (GET_CODE (next) == CODE_LABEL)
516 next = NEXT_INSN (next);
518 for (; (next && GET_CODE (next) == INSN
519 && GET_CODE (PATTERN (next)) == CLOBBER);
520 next = NEXT_INSN (next))
521 mark_set_resources (XEXP (PATTERN (next), 0), res, 1, 0);
524 /* ... and also what it's RTL says it modifies, if anything. */
529 /* An insn consisting of just a CLOBBER (or USE) is just for flow
530 and doesn't actually do anything, so we ignore it. */
532 #ifdef INSN_SETS_ARE_DELAYED
533 if (! include_delayed_effects
534 && INSN_SETS_ARE_DELAYED (x))
539 if (GET_CODE (x) != USE && GET_CODE (x) != CLOBBER)
544 /* If the source of a SET is a CALL, this is actually done by
545 the called routine. So only include it if we are to include the
546 effects of the calling routine. */
548 mark_set_resources (SET_DEST (x), res,
549 (include_delayed_effects
550 || GET_CODE (SET_SRC (x)) != CALL),
553 mark_set_resources (SET_SRC (x), res, 0, 0);
557 mark_set_resources (XEXP (x, 0), res, 1, 0);
561 for (i = 0; i < XVECLEN (x, 0); i++)
562 if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x, 0, 0))
563 && INSN_FROM_TARGET_P (XVECEXP (x, 0, i))))
564 mark_set_resources (XVECEXP (x, 0, i), res, 0,
565 include_delayed_effects);
572 mark_set_resources (XEXP (x, 0), res, 1, 0);
576 mark_set_resources (XEXP (x, 0), res, in_dest, 0);
577 mark_set_resources (XEXP (x, 1), res, 0, 0);
578 mark_set_resources (XEXP (x, 2), res, 0, 0);
585 res->volatil = MEM_VOLATILE_P (x);
588 mark_set_resources (XEXP (x, 0), res, 0, 0);
593 for (i = 0; i < HARD_REGNO_NREGS (REGNO (x), GET_MODE (x)); i++)
594 SET_HARD_REG_BIT (res->regs, REGNO (x) + i);
598 /* Process each sub-expression and flag what it needs. */
599 format_ptr = GET_RTX_FORMAT (code);
600 for (i = 0; i < GET_RTX_LENGTH (code); i++)
601 switch (*format_ptr++)
604 mark_set_resources (XEXP (x, i), res, in_dest, include_delayed_effects);
608 for (j = 0; j < XVECLEN (x, i); j++)
609 mark_set_resources (XVECEXP (x, i, j), res, in_dest,
610 include_delayed_effects);
615 /* Return TRUE if this insn should stop the search for insn to fill delay
616 slots. LABELS_P indicates that labels should terminate the search.
617 In all cases, jumps terminate the search. */
620 stop_search_p (insn, labels_p)
627 switch (GET_CODE (insn))
641 /* OK unless it contains a delay slot or is an `asm' insn of some type.
642 We don't know anything about these. */
643 return (GET_CODE (PATTERN (insn)) == SEQUENCE
644 || GET_CODE (PATTERN (insn)) == ASM_INPUT
645 || asm_noperands (PATTERN (insn)) >= 0);
652 /* Return TRUE if any resources are marked in both RES1 and RES2 or if either
653 resource set contains a volatile memory reference. Otherwise, return FALSE. */
656 resource_conflicts_p (res1, res2)
657 struct resources *res1, *res2;
659 if ((res1->cc && res2->cc) || (res1->memory && res2->memory)
660 || res1->volatil || res2->volatil)
664 return (res1->regs & res2->regs) != HARD_CONST (0);
669 for (i = 0; i < HARD_REG_SET_LONGS; i++)
670 if ((res1->regs[i] & res2->regs[i]) != 0)
677 /* Return TRUE if any resource marked in RES, a `struct resources', is
678 referenced by INSN. If INCLUDE_CALLED_ROUTINE is set, return if the called
679 routine is using those resources.
681 We compute this by computing all the resources referenced by INSN and
682 seeing if this conflicts with RES. It might be faster to directly check
683 ourselves, and this is the way it used to work, but it means duplicating
684 a large block of complex code. */
687 insn_references_resource_p (insn, res, include_delayed_effects)
689 register struct resources *res;
690 int include_delayed_effects;
692 struct resources insn_res;
694 CLEAR_RESOURCE (&insn_res);
695 mark_referenced_resources (insn, &insn_res, include_delayed_effects);
696 return resource_conflicts_p (&insn_res, res);
699 /* Return TRUE if INSN modifies resources that are marked in RES.
700 INCLUDE_CALLED_ROUTINE is set if the actions of that routine should be
701 included. CC0 is only modified if it is explicitly set; see comments
702 in front of mark_set_resources for details. */
705 insn_sets_resource_p (insn, res, include_delayed_effects)
707 register struct resources *res;
708 int include_delayed_effects;
710 struct resources insn_sets;
712 CLEAR_RESOURCE (&insn_sets);
713 mark_set_resources (insn, &insn_sets, 0, include_delayed_effects);
714 return resource_conflicts_p (&insn_sets, res);
717 /* Find a label at the end of the function or before a RETURN. If there is
725 /* If we found one previously, return it. */
726 if (end_of_function_label)
727 return end_of_function_label;
729 /* Otherwise, see if there is a label at the end of the function. If there
730 is, it must be that RETURN insns aren't needed, so that is our return
731 label and we don't have to do anything else. */
733 insn = get_last_insn ();
734 while (GET_CODE (insn) == NOTE
735 || (GET_CODE (insn) == INSN
736 && (GET_CODE (PATTERN (insn)) == USE
737 || GET_CODE (PATTERN (insn)) == CLOBBER)))
738 insn = PREV_INSN (insn);
740 if (GET_CODE (insn) == CODE_LABEL)
741 end_of_function_label = insn;
744 /* Otherwise, make a new label and emit a RETURN and BARRIER,
746 end_of_function_label = gen_label_rtx ();
747 LABEL_NUSES (end_of_function_label) = 0;
748 emit_label (end_of_function_label);
752 /* The return we make may have delay slots too. */
753 rtx insn = gen_return();
754 emit_jump_insn (insn);
756 if (num_delay_slots (insn) > 0)
757 obstack_ptr_grow (&unfilled_slots_obstack, insn);
762 /* Show one additional use for this label so it won't go away until
764 ++LABEL_NUSES (end_of_function_label);
766 return end_of_function_label;
769 /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
770 the pattern of INSN with the SEQUENCE.
772 Chain the insns so that NEXT_INSN of each insn in the sequence points to
773 the next and NEXT_INSN of the last insn in the sequence points to
774 the first insn after the sequence. Similarly for PREV_INSN. This makes
775 it easier to scan all insns.
777 Returns the SEQUENCE that replaces INSN. */
780 emit_delay_sequence (insn, list, length, avail)
790 /* Allocate the the rtvec to hold the insns and the SEQUENCE. */
791 rtvec seqv = rtvec_alloc (length + 1);
792 rtx seq = gen_rtx (SEQUENCE, VOIDmode, seqv);
793 rtx seq_insn = make_insn_raw (seq);
794 rtx first = get_insns ();
795 rtx last = get_last_insn ();
797 /* Make a copy of the insn having delay slots. */
798 rtx delay_insn = copy_rtx (insn);
800 /* If INSN is followed by a BARRIER, delete the BARRIER since it will only
801 confuse further processing. Update LAST in case it was the last insn.
802 We will put the BARRIER back in later. */
803 if (NEXT_INSN (insn) && GET_CODE (NEXT_INSN (insn)) == BARRIER)
805 delete_insn (NEXT_INSN (insn));
806 last = get_last_insn ();
810 /* Splice our SEQUENCE into the insn stream where INSN used to be. */
811 NEXT_INSN (seq_insn) = NEXT_INSN (insn);
812 PREV_INSN (seq_insn) = PREV_INSN (insn);
815 set_new_first_and_last_insn (first, seq_insn);
817 PREV_INSN (NEXT_INSN (seq_insn)) = seq_insn;
820 set_new_first_and_last_insn (seq_insn, last);
822 NEXT_INSN (PREV_INSN (seq_insn)) = seq_insn;
824 /* Build our SEQUENCE and rebuild the insn chain. */
825 XVECEXP (seq, 0, 0) = delay_insn;
826 INSN_DELETED_P (delay_insn) = 0;
827 PREV_INSN (delay_insn) = PREV_INSN (seq_insn);
829 for (li = list; li; li = XEXP (li, 1), i++)
831 rtx tem = XEXP (li, 0);
834 /* Show that this copy of the insn isn't deleted. */
835 INSN_DELETED_P (tem) = 0;
837 XVECEXP (seq, 0, i) = tem;
838 PREV_INSN (tem) = XVECEXP (seq, 0, i - 1);
839 NEXT_INSN (XVECEXP (seq, 0, i - 1)) = tem;
841 /* Remove any REG_DEAD notes because we can't rely on them now
842 that the insn has been moved. */
843 for (note = REG_NOTES (tem); note; note = XEXP (note, 1))
844 if (REG_NOTE_KIND (note) == REG_DEAD)
845 XEXP (note, 0) = const0_rtx;
848 NEXT_INSN (XVECEXP (seq, 0, length)) = NEXT_INSN (seq_insn);
850 /* If the previous insn is a SEQUENCE, update the NEXT_INSN pointer on the
851 last insn in that SEQUENCE to point to us. Similarly for the first
852 insn in the following insn if it is a SEQUENCE. */
854 if (PREV_INSN (seq_insn) && GET_CODE (PREV_INSN (seq_insn)) == INSN
855 && GET_CODE (PATTERN (PREV_INSN (seq_insn))) == SEQUENCE)
856 NEXT_INSN (XVECEXP (PATTERN (PREV_INSN (seq_insn)), 0,
857 XVECLEN (PATTERN (PREV_INSN (seq_insn)), 0) - 1))
860 if (NEXT_INSN (seq_insn) && GET_CODE (NEXT_INSN (seq_insn)) == INSN
861 && GET_CODE (PATTERN (NEXT_INSN (seq_insn))) == SEQUENCE)
862 PREV_INSN (XVECEXP (PATTERN (NEXT_INSN (seq_insn)), 0, 0)) = seq_insn;
864 /* If there used to be a BARRIER, put it back. */
866 emit_barrier_after (seq_insn);
874 /* Add INSN to DELAY_LIST and return the head of the new list. The list must
875 be in the order in which the insns are to be executed. */
878 add_to_delay_list (insn, delay_list)
882 /* If we have an empty list, just make a new list element. If
883 INSN has it's block number recorded, clear it since we may
884 be moving the insn to a new block. */
888 struct target_info *tinfo;
890 for (tinfo = target_hash_table[INSN_UID (insn) % TARGET_HASH_PRIME];
891 tinfo; tinfo = tinfo->next)
892 if (tinfo->uid == INSN_UID (insn))
898 return gen_rtx (INSN_LIST, VOIDmode, insn, NULL_RTX);
901 /* Otherwise this must be an INSN_LIST. Add INSN to the end of the
903 XEXP (delay_list, 1) = add_to_delay_list (insn, XEXP (delay_list, 1));
908 /* Delete INSN from the the delay slot of the insn that it is in. This may
909 produce an insn without anything in its delay slots. */
912 delete_from_delay_slot (insn)
915 rtx trial, seq_insn, seq, prev;
919 /* We first must find the insn containing the SEQUENCE with INSN in its
920 delay slot. Do this by finding an insn, TRIAL, where
921 PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */
924 PREV_INSN (NEXT_INSN (trial)) == trial;
925 trial = NEXT_INSN (trial))
928 seq_insn = PREV_INSN (NEXT_INSN (trial));
929 seq = PATTERN (seq_insn);
931 /* Create a delay list consisting of all the insns other than the one
932 we are deleting (unless we were the only one). */
933 if (XVECLEN (seq, 0) > 2)
934 for (i = 1; i < XVECLEN (seq, 0); i++)
935 if (XVECEXP (seq, 0, i) != insn)
936 delay_list = add_to_delay_list (XVECEXP (seq, 0, i), delay_list);
938 /* Delete the old SEQUENCE, re-emit the insn that used to have the delay
939 list, and rebuild the delay list if non-empty. */
940 prev = PREV_INSN (seq_insn);
941 trial = XVECEXP (seq, 0, 0);
942 delete_insn (seq_insn);
943 add_insn_after (trial, prev);
945 if (GET_CODE (trial) == JUMP_INSN
946 && (simplejump_p (trial) || GET_CODE (PATTERN (trial)) == RETURN))
947 emit_barrier_after (trial);
949 /* If there are any delay insns, remit them. Otherwise clear the
952 trial = emit_delay_sequence (trial, delay_list, XVECLEN (seq, 0) - 2, 0);
954 INSN_ANNULLED_BRANCH_P (trial) = 0;
956 INSN_FROM_TARGET_P (insn) = 0;
958 /* Show we need to fill this insn again. */
959 obstack_ptr_grow (&unfilled_slots_obstack, trial);
962 /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down
963 the insn that sets CC0 for it and delete it too. */
966 delete_scheduled_jump (insn)
969 /* Delete the insn that sets cc0 for us. On machines without cc0, we could
970 delete the insn that sets the condition code, but it is hard to find it.
971 Since this case is rare anyway, don't bother trying; there would likely
972 be other insns that became dead anyway, which we wouldn't know to
976 if (reg_mentioned_p (cc0_rtx, insn))
978 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
980 /* If a reg-note was found, it points to an insn to set CC0. This
981 insn is in the delay list of some other insn. So delete it from
982 the delay list it was in. */
985 if (! FIND_REG_INC_NOTE (XEXP (note, 0), NULL_RTX)
986 && sets_cc0_p (PATTERN (XEXP (note, 0))) == 1)
987 delete_from_delay_slot (XEXP (note, 0));
991 /* The insn setting CC0 is our previous insn, but it may be in
992 a delay slot. It will be the last insn in the delay slot, if
994 rtx trial = previous_insn (insn);
995 if (GET_CODE (trial) == NOTE)
996 trial = prev_nonnote_insn (trial);
997 if (sets_cc0_p (PATTERN (trial)) != 1
998 || FIND_REG_INC_NOTE (trial, 0))
1000 if (PREV_INSN (NEXT_INSN (trial)) == trial)
1001 delete_insn (trial);
1003 delete_from_delay_slot (trial);
1011 /* Counters for delay-slot filling. */
1013 #define NUM_REORG_FUNCTIONS 2
1014 #define MAX_DELAY_HISTOGRAM 3
1015 #define MAX_REORG_PASSES 2
1017 static int num_insns_needing_delays[NUM_REORG_FUNCTIONS][MAX_REORG_PASSES];
1019 static int num_filled_delays[NUM_REORG_FUNCTIONS][MAX_DELAY_HISTOGRAM+1][MAX_REORG_PASSES];
1021 static int reorg_pass_number;
1024 note_delay_statistics (slots_filled, index)
1025 int slots_filled, index;
1027 num_insns_needing_delays[index][reorg_pass_number]++;
1028 if (slots_filled > MAX_DELAY_HISTOGRAM)
1029 slots_filled = MAX_DELAY_HISTOGRAM;
1030 num_filled_delays[index][slots_filled][reorg_pass_number]++;
1033 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
1035 /* Optimize the following cases:
1037 1. When a conditional branch skips over only one instruction,
1038 use an annulling branch and put that insn in the delay slot.
1039 Use either a branch that annuls when the condition if true or
1040 invert the test with a branch that annuls when the condition is
1041 false. This saves insns, since otherwise we must copy an insn
1044 (orig) (skip) (otherwise)
1045 Bcc.n L1 Bcc',a L1 Bcc,a L1'
1052 2. When a conditional branch skips over only one instruction,
1053 and after that, it unconditionally branches somewhere else,
1054 perform the similar optimization. This saves executing the
1055 second branch in the case where the inverted condition is true.
1062 INSN is a JUMP_INSN.
1064 This should be expanded to skip over N insns, where N is the number
1065 of delay slots required. */
1068 optimize_skip (insn)
1071 register rtx trial = next_nonnote_insn (insn);
1072 rtx next_trial = next_active_insn (trial);
1077 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1080 || GET_CODE (trial) != INSN
1081 || GET_CODE (PATTERN (trial)) == SEQUENCE
1082 || recog_memoized (trial) < 0
1083 || (! eligible_for_annul_false (insn, 0, trial, flags)
1084 && ! eligible_for_annul_true (insn, 0, trial, flags)))
1087 /* There are two cases where we are just executing one insn (we assume
1088 here that a branch requires only one insn; this should be generalized
1089 at some point): Where the branch goes around a single insn or where
1090 we have one insn followed by a branch to the same label we branch to.
1091 In both of these cases, inverting the jump and annulling the delay
1092 slot give the same effect in fewer insns. */
1093 if ((next_trial == next_active_insn (JUMP_LABEL (insn)))
1095 && GET_CODE (next_trial) == JUMP_INSN
1096 && JUMP_LABEL (insn) == JUMP_LABEL (next_trial)
1097 && (simplejump_p (next_trial)
1098 || GET_CODE (PATTERN (next_trial)) == RETURN)))
1100 if (eligible_for_annul_false (insn, 0, trial, flags))
1102 if (invert_jump (insn, JUMP_LABEL (insn)))
1103 INSN_FROM_TARGET_P (trial) = 1;
1104 else if (! eligible_for_annul_true (insn, 0, trial, flags))
1108 delay_list = add_to_delay_list (trial, NULL_RTX);
1109 next_trial = next_active_insn (trial);
1110 update_block (trial, trial);
1111 delete_insn (trial);
1113 /* Also, if we are targeting an unconditional
1114 branch, thread our jump to the target of that branch. Don't
1115 change this into a RETURN here, because it may not accept what
1116 we have in the delay slot. We'll fix this up later. */
1117 if (next_trial && GET_CODE (next_trial) == JUMP_INSN
1118 && (simplejump_p (next_trial)
1119 || GET_CODE (PATTERN (next_trial)) == RETURN))
1121 target_label = JUMP_LABEL (next_trial);
1122 if (target_label == 0)
1123 target_label = find_end_label ();
1124 redirect_jump (insn, target_label);
1127 INSN_ANNULLED_BRANCH_P (insn) = 1;
1135 /* Encode and return branch direction and prediction information for
1136 INSN assuming it will jump to LABEL.
1138 Non conditional branches return no direction information and
1139 are predicted as very likely taken. */
1141 get_jump_flags (insn, label)
1146 /* get_jump_flags can be passed any insn with delay slots, these may
1147 be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch
1148 direction information, and only if they are conditional jumps.
1150 If LABEL is zero, then there is no way to determine the branch
1152 if (GET_CODE (insn) == JUMP_INSN
1153 && condjump_p (insn)
1154 && INSN_UID (insn) <= max_uid
1156 && INSN_UID (label) <= max_uid)
1158 = (uid_to_ruid[INSN_UID (label)] > uid_to_ruid[INSN_UID (insn)])
1159 ? ATTR_FLAG_forward : ATTR_FLAG_backward;
1160 /* No valid direction information. */
1164 /* If insn is a conditional branch call mostly_true_jump to get
1165 determine the branch prediction.
1167 Non conditional branches are predicted as very likely taken. */
1168 if (GET_CODE (insn) == JUMP_INSN
1169 && condjump_p (insn))
1173 prediction = mostly_true_jump (insn, get_branch_condition (insn, label));
1177 flags |= (ATTR_FLAG_very_likely | ATTR_FLAG_likely);
1180 flags |= ATTR_FLAG_likely;
1183 flags |= ATTR_FLAG_unlikely;
1186 flags |= (ATTR_FLAG_very_unlikely | ATTR_FLAG_unlikely);
1194 flags |= (ATTR_FLAG_very_likely | ATTR_FLAG_likely);
1199 /* Return 1 if DEST is a destination that will be branched to rarely (the
1200 return point of a function); return 2 if DEST will be branched to very
1201 rarely (a call to a function that doesn't return). Otherwise,
1205 rare_destination (insn)
1210 for (; insn; insn = NEXT_INSN (insn))
1212 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1213 insn = XVECEXP (PATTERN (insn), 0, 0);
1215 switch (GET_CODE (insn))
1220 /* A BARRIER can either be after a JUMP_INSN or a CALL_INSN. We
1221 don't scan past JUMP_INSNs, so any barrier we find here must
1222 have been after a CALL_INSN and hence mean the call doesn't
1226 if (GET_CODE (PATTERN (insn)) == RETURN)
1228 else if (simplejump_p (insn)
1229 && jump_count++ < 10)
1230 insn = JUMP_LABEL (insn);
1236 /* If we got here it means we hit the end of the function. So this
1237 is an unlikely destination. */
1242 /* Return truth value of the statement that this branch
1243 is mostly taken. If we think that the branch is extremely likely
1244 to be taken, we return 2. If the branch is slightly more likely to be
1245 taken, return 1. If the branch is slightly less likely to be taken,
1246 return 0 and if the branch is highly unlikely to be taken, return -1.
1248 CONDITION, if non-zero, is the condition that JUMP_INSN is testing. */
1251 mostly_true_jump (jump_insn, condition)
1252 rtx jump_insn, condition;
1254 rtx target_label = JUMP_LABEL (jump_insn);
1256 int rare_dest = rare_destination (target_label);
1257 int rare_fallthrough = rare_destination (NEXT_INSN (jump_insn));
1259 /* If this is a branch outside a loop, it is highly unlikely. */
1260 if (GET_CODE (PATTERN (jump_insn)) == SET
1261 && GET_CODE (SET_SRC (PATTERN (jump_insn))) == IF_THEN_ELSE
1262 && ((GET_CODE (XEXP (SET_SRC (PATTERN (jump_insn)), 1)) == LABEL_REF
1263 && LABEL_OUTSIDE_LOOP_P (XEXP (SET_SRC (PATTERN (jump_insn)), 1)))
1264 || (GET_CODE (XEXP (SET_SRC (PATTERN (jump_insn)), 2)) == LABEL_REF
1265 && LABEL_OUTSIDE_LOOP_P (XEXP (SET_SRC (PATTERN (jump_insn)), 2)))))
1270 /* If this is the test of a loop, it is very likely true. We scan
1271 backwards from the target label. If we find a NOTE_INSN_LOOP_BEG
1272 before the next real insn, we assume the branch is to the top of
1274 for (insn = PREV_INSN (target_label);
1275 insn && GET_CODE (insn) == NOTE;
1276 insn = PREV_INSN (insn))
1277 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1280 /* If this is a jump to the test of a loop, it is likely true. We scan
1281 forwards from the target label. If we find a NOTE_INSN_LOOP_VTOP
1282 before the next real insn, we assume the branch is to the loop branch
1284 for (insn = NEXT_INSN (target_label);
1285 insn && GET_CODE (insn) == NOTE;
1286 insn = PREV_INSN (insn))
1287 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_VTOP)
1291 /* Look at the relative rarities of the fallthough and destination. If
1292 they differ, we can predict the branch that way. */
1294 switch (rare_fallthrough - rare_dest)
1308 /* If we couldn't figure out what this jump was, assume it won't be
1309 taken. This should be rare. */
1313 /* EQ tests are usually false and NE tests are usually true. Also,
1314 most quantities are positive, so we can make the appropriate guesses
1315 about signed comparisons against zero. */
1316 switch (GET_CODE (condition))
1319 /* Unconditional branch. */
1327 if (XEXP (condition, 1) == const0_rtx)
1332 if (XEXP (condition, 1) == const0_rtx)
1337 /* Predict backward branches usually take, forward branches usually not. If
1338 we don't know whether this is forward or backward, assume the branch
1339 will be taken, since most are. */
1340 return (INSN_UID (jump_insn) > max_uid || INSN_UID (target_label) > max_uid
1341 || (uid_to_ruid[INSN_UID (jump_insn)]
1342 > uid_to_ruid[INSN_UID (target_label)]));;
1345 /* Return the condition under which INSN will branch to TARGET. If TARGET
1346 is zero, return the condition under which INSN will return. If INSN is
1347 an unconditional branch, return const_true_rtx. If INSN isn't a simple
1348 type of jump, or it doesn't go to TARGET, return 0. */
1351 get_branch_condition (insn, target)
1355 rtx pat = PATTERN (insn);
1358 if (GET_CODE (pat) == RETURN)
1359 return target == 0 ? const_true_rtx : 0;
1361 else if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
1364 src = SET_SRC (pat);
1365 if (GET_CODE (src) == LABEL_REF && XEXP (src, 0) == target)
1366 return const_true_rtx;
1368 else if (GET_CODE (src) == IF_THEN_ELSE
1369 && ((target == 0 && GET_CODE (XEXP (src, 1)) == RETURN)
1370 || (GET_CODE (XEXP (src, 1)) == LABEL_REF
1371 && XEXP (XEXP (src, 1), 0) == target))
1372 && XEXP (src, 2) == pc_rtx)
1373 return XEXP (src, 0);
1375 else if (GET_CODE (src) == IF_THEN_ELSE
1376 && ((target == 0 && GET_CODE (XEXP (src, 2)) == RETURN)
1377 || (GET_CODE (XEXP (src, 2)) == LABEL_REF
1378 && XEXP (XEXP (src, 2), 0) == target))
1379 && XEXP (src, 1) == pc_rtx)
1380 return gen_rtx (reverse_condition (GET_CODE (XEXP (src, 0))),
1381 GET_MODE (XEXP (src, 0)),
1382 XEXP (XEXP (src, 0), 0), XEXP (XEXP (src, 0), 1));
1387 /* Return non-zero if CONDITION is more strict than the condition of
1388 INSN, i.e., if INSN will always branch if CONDITION is true. */
1391 condition_dominates_p (condition, insn)
1395 rtx other_condition = get_branch_condition (insn, JUMP_LABEL (insn));
1396 enum rtx_code code = GET_CODE (condition);
1397 enum rtx_code other_code;
1399 if (rtx_equal_p (condition, other_condition)
1400 || other_condition == const_true_rtx)
1403 else if (condition == const_true_rtx || other_condition == 0)
1406 other_code = GET_CODE (other_condition);
1407 if (GET_RTX_LENGTH (code) != 2 || GET_RTX_LENGTH (other_code) != 2
1408 || ! rtx_equal_p (XEXP (condition, 0), XEXP (other_condition, 0))
1409 || ! rtx_equal_p (XEXP (condition, 1), XEXP (other_condition, 1)))
1412 return comparison_dominates_p (code, other_code);
1415 /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that
1416 the condition tested by INSN is CONDITION and the resources shown in
1417 OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns
1418 from SEQ's delay list, in addition to whatever insns it may execute
1419 (in DELAY_LIST). SETS and NEEDED are denote resources already set and
1420 needed while searching for delay slot insns. Return the concatenated
1421 delay list if possible, otherwise, return 0.
1423 SLOTS_TO_FILL is the total number of slots required by INSN, and
1424 PSLOTS_FILLED points to the number filled so far (also the number of
1425 insns in DELAY_LIST). It is updated with the number that have been
1426 filled from the SEQUENCE, if any.
1428 PANNUL_P points to a non-zero value if we already know that we need
1429 to annul INSN. If this routine determines that annulling is needed,
1430 it may set that value non-zero.
1432 PNEW_THREAD points to a location that is to receive the place at which
1433 execution should continue. */
1436 steal_delay_list_from_target (insn, condition, seq, delay_list,
1437 sets, needed, other_needed,
1438 slots_to_fill, pslots_filled, pannul_p,
1440 rtx insn, condition;
1443 struct resources *sets, *needed, *other_needed;
1450 int slots_remaining = slots_to_fill - *pslots_filled;
1451 int total_slots_filled = *pslots_filled;
1452 rtx new_delay_list = 0;
1453 int must_annul = *pannul_p;
1456 /* We can't do anything if there are more delay slots in SEQ than we
1457 can handle, or if we don't know that it will be a taken branch.
1459 We know that it will be a taken branch if it is either an unconditional
1460 branch or a conditional branch with a stricter branch condition. */
1462 if (XVECLEN (seq, 0) - 1 > slots_remaining
1463 || ! condition_dominates_p (condition, XVECEXP (seq, 0, 0)))
1466 for (i = 1; i < XVECLEN (seq, 0); i++)
1468 rtx trial = XVECEXP (seq, 0, i);
1471 if (insn_references_resource_p (trial, sets, 0)
1472 || insn_sets_resource_p (trial, needed, 0)
1473 || insn_sets_resource_p (trial, sets, 0)
1475 /* If TRIAL sets CC0, we can't copy it, so we can't steal this
1477 || find_reg_note (trial, REG_CC_USER, NULL_RTX)
1479 /* If TRIAL is from the fallthrough code of an annulled branch insn
1480 in SEQ, we cannot use it. */
1481 || (INSN_ANNULLED_BRANCH_P (XVECEXP (seq, 0, 0))
1482 && ! INSN_FROM_TARGET_P (trial)))
1485 /* If this insn was already done (usually in a previous delay slot),
1486 pretend we put it in our delay slot. */
1487 if (redundant_insn_p (trial, insn, new_delay_list))
1490 /* We will end up re-vectoring this branch, so compute flags
1491 based on jumping to the new label. */
1492 flags = get_jump_flags (insn, JUMP_LABEL (XVECEXP (seq, 0, 0)));
1495 && ((condition == const_true_rtx
1496 || (! insn_sets_resource_p (trial, other_needed, 0)
1497 && ! may_trap_p (PATTERN (trial)))))
1498 ? eligible_for_delay (insn, total_slots_filled, trial, flags)
1500 eligible_for_annul_false (insn, total_slots_filled, trial, flags)))
1502 temp = copy_rtx (trial);
1503 INSN_FROM_TARGET_P (temp) = 1;
1504 new_delay_list = add_to_delay_list (temp, new_delay_list);
1505 total_slots_filled++;
1507 if (--slots_remaining == 0)
1514 /* Show the place to which we will be branching. */
1515 *pnew_thread = next_active_insn (JUMP_LABEL (XVECEXP (seq, 0, 0)));
1517 /* Add any new insns to the delay list and update the count of the
1518 number of slots filled. */
1519 *pslots_filled = total_slots_filled;
1520 *pannul_p = must_annul;
1522 if (delay_list == 0)
1523 return new_delay_list;
1525 for (temp = new_delay_list; temp; temp = XEXP (temp, 1))
1526 delay_list = add_to_delay_list (XEXP (temp, 0), delay_list);
1531 /* Similar to steal_delay_list_from_target except that SEQ is on the
1532 fallthrough path of INSN. Here we only do something if the delay insn
1533 of SEQ is an unconditional branch. In that case we steal its delay slot
1534 for INSN since unconditional branches are much easier to fill. */
1537 steal_delay_list_from_fallthrough (insn, condition, seq,
1538 delay_list, sets, needed, other_needed,
1539 slots_to_fill, pslots_filled, pannul_p)
1540 rtx insn, condition;
1543 struct resources *sets, *needed, *other_needed;
1551 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1553 /* We can't do anything if SEQ's delay insn isn't an
1554 unconditional branch. */
1556 if (! simplejump_p (XVECEXP (seq, 0, 0))
1557 && GET_CODE (PATTERN (XVECEXP (seq, 0, 0))) != RETURN)
1560 for (i = 1; i < XVECLEN (seq, 0); i++)
1562 rtx trial = XVECEXP (seq, 0, i);
1564 /* If TRIAL sets CC0, stealing it will move it too far from the use
1566 if (insn_references_resource_p (trial, sets, 0)
1567 || insn_sets_resource_p (trial, needed, 0)
1568 || insn_sets_resource_p (trial, sets, 0)
1570 || sets_cc0_p (PATTERN (trial))
1576 /* If this insn was already done, we don't need it. */
1577 if (redundant_insn_p (trial, insn, delay_list))
1579 delete_from_delay_slot (trial);
1584 && ((condition == const_true_rtx
1585 || (! insn_sets_resource_p (trial, other_needed, 0)
1586 && ! may_trap_p (PATTERN (trial)))))
1587 ? eligible_for_delay (insn, *pslots_filled, trial, flags)
1589 eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
1591 delete_from_delay_slot (trial);
1592 delay_list = add_to_delay_list (trial, delay_list);
1594 if (++(*pslots_filled) == slots_to_fill)
1604 /* Try merging insns starting at THREAD which match exactly the insns in
1607 If all insns were matched and the insn was previously annulling, the
1608 annul bit will be cleared.
1610 For each insn that is merged, if the branch is or will be non-annulling,
1611 we delete the merged insn. */
1614 try_merge_delay_insns (insn, thread)
1617 rtx trial, next_trial;
1618 rtx delay_insn = XVECEXP (PATTERN (insn), 0, 0);
1619 int annul_p = INSN_ANNULLED_BRANCH_P (delay_insn);
1620 int slot_number = 1;
1621 int num_slots = XVECLEN (PATTERN (insn), 0);
1622 rtx next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1623 struct resources set, needed;
1624 rtx merged_insns = 0;
1628 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1630 CLEAR_RESOURCE (&needed);
1631 CLEAR_RESOURCE (&set);
1633 /* If this is not an annulling branch, take into account anything needed in
1634 NEXT_TO_MATCH. This prevents two increments from being incorrectly
1635 folded into one. If we are annulling, this would be the correct
1636 thing to do. (The alternative, looking at things set in NEXT_TO_MATCH
1637 will essentially disable this optimization. This method is somewhat of
1638 a kludge, but I don't see a better way.) */
1640 mark_referenced_resources (next_to_match, &needed, 1);
1642 for (trial = thread; !stop_search_p (trial, 1); trial = next_trial)
1644 rtx pat = PATTERN (trial);
1646 next_trial = next_nonnote_insn (trial);
1648 /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */
1649 if (GET_CODE (trial) == INSN
1650 && (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER))
1653 if (GET_CODE (next_to_match) == GET_CODE (trial)
1655 /* We can't share an insn that sets cc0. */
1656 && ! sets_cc0_p (pat)
1658 && ! insn_references_resource_p (trial, &set, 1)
1659 && ! insn_sets_resource_p (trial, &set, 1)
1660 && ! insn_sets_resource_p (trial, &needed, 1)
1661 && (trial = try_split (pat, trial, 0)) != 0
1662 && rtx_equal_p (PATTERN (next_to_match), PATTERN (trial))
1663 /* Have to test this condition if annul condition is different
1664 from (and less restrictive than) non-annulling one. */
1665 && eligible_for_delay (delay_insn, slot_number - 1, trial, flags))
1667 next_trial = next_nonnote_insn (trial);
1671 update_block (trial, thread);
1672 delete_insn (trial);
1673 INSN_FROM_TARGET_P (next_to_match) = 0;
1676 merged_insns = gen_rtx (INSN_LIST, VOIDmode, trial, merged_insns);
1678 if (++slot_number == num_slots)
1681 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1683 mark_referenced_resources (next_to_match, &needed, 1);
1686 mark_set_resources (trial, &set, 0, 1);
1687 mark_referenced_resources (trial, &needed, 1);
1690 /* See if we stopped on a filled insn. If we did, try to see if its
1691 delay slots match. */
1692 if (slot_number != num_slots
1693 && trial && GET_CODE (trial) == INSN
1694 && GET_CODE (PATTERN (trial)) == SEQUENCE
1695 && ! INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial), 0, 0)))
1697 rtx pat = PATTERN (trial);
1699 for (i = 1; i < XVECLEN (pat, 0); i++)
1701 rtx dtrial = XVECEXP (pat, 0, i);
1703 if (! insn_references_resource_p (dtrial, &set, 1)
1704 && ! insn_sets_resource_p (dtrial, &set, 1)
1705 && ! insn_sets_resource_p (dtrial, &needed, 1)
1707 && ! sets_cc0_p (PATTERN (dtrial))
1709 && rtx_equal_p (PATTERN (next_to_match), PATTERN (dtrial))
1710 && eligible_for_delay (delay_insn, slot_number - 1, dtrial, flags))
1714 update_block (dtrial, thread);
1715 delete_from_delay_slot (dtrial);
1716 INSN_FROM_TARGET_P (next_to_match) = 0;
1719 merged_insns = gen_rtx (INSN_LIST, SImode, dtrial,
1722 if (++slot_number == num_slots)
1725 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1730 /* If all insns in the delay slot have been matched and we were previously
1731 annulling the branch, we need not any more. In that case delete all the
1732 merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn the
1733 the delay list so that we know that it isn't only being used at the
1735 if (next_to_match == 0 && annul_p)
1737 for (; merged_insns; merged_insns = XEXP (merged_insns, 1))
1739 if (GET_MODE (merged_insns) == SImode)
1741 update_block (XEXP (merged_insns, 0), thread);
1742 delete_from_delay_slot (XEXP (merged_insns, 0));
1746 update_block (XEXP (merged_insns, 0), thread);
1747 delete_insn (XEXP (merged_insns, 0));
1751 INSN_ANNULLED_BRANCH_P (delay_insn) = 0;
1753 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1754 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i)) = 0;
1758 /* See if INSN is redundant with an insn in front of TARGET. Often this
1759 is called when INSN is a candidate for a delay slot of TARGET.
1760 DELAY_LIST are insns that will be placed in delay slots of TARGET in front
1761 of INSN. Often INSN will be redundant with an insn in a delay slot of
1762 some previous insn. This happens when we have a series of branches to the
1763 same label; in that case the first insn at the target might want to go
1764 into each of the delay slots.
1766 If we are not careful, this routine can take up a significant fraction
1767 of the total compilation time (4%), but only wins rarely. Hence we
1768 speed this routine up by making two passes. The first pass goes back
1769 until it hits a label and sees if it find an insn with an identical
1770 pattern. Only in this (relatively rare) event does it check for
1773 We do not split insns we encounter. This could cause us not to find a
1774 redundant insn, but the cost of splitting seems greater than the possible
1775 gain in rare cases. */
1778 redundant_insn_p (insn, target, delay_list)
1783 rtx target_main = target;
1784 rtx ipat = PATTERN (insn);
1786 struct resources needed, set;
1789 /* Scan backwards looking for a match. */
1790 for (trial = PREV_INSN (target); trial; trial = PREV_INSN (trial))
1792 if (GET_CODE (trial) == CODE_LABEL)
1795 if (GET_RTX_CLASS (GET_CODE (trial)) != 'i')
1798 pat = PATTERN (trial);
1799 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1802 if (GET_CODE (pat) == SEQUENCE)
1804 /* Stop for a CALL and its delay slots because it is difficult to
1805 track its resource needs correctly. */
1806 if (GET_CODE (XVECEXP (pat, 0, 0)) == CALL_INSN)
1809 /* Stop for an INSN or JUMP_INSN with delayed effects and its delay
1810 slots because it is difficult to track its resource needs
1813 #ifdef INSN_SETS_ARE_DELAYED
1814 if (INSN_SETS_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1818 #ifdef INSN_REFERENCES_ARE_DELAYED
1819 if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1823 /* See if any of the insns in the delay slot match, updating
1824 resource requirements as we go. */
1825 for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
1826 if (GET_CODE (XVECEXP (pat, 0, i)) == GET_CODE (insn)
1827 && rtx_equal_p (PATTERN (XVECEXP (pat, 0, i)), ipat))
1830 /* If found a match, exit this loop early. */
1835 else if (GET_CODE (trial) == GET_CODE (insn) && rtx_equal_p (pat, ipat))
1839 /* If we didn't find an insn that matches, return 0. */
1843 /* See what resources this insn sets and needs. If they overlap, or
1844 if this insn references CC0, it can't be redundant. */
1846 CLEAR_RESOURCE (&needed);
1847 CLEAR_RESOURCE (&set);
1848 mark_set_resources (insn, &set, 0, 1);
1849 mark_referenced_resources (insn, &needed, 1);
1851 /* If TARGET is a SEQUENCE, get the main insn. */
1852 if (GET_CODE (target) == INSN && GET_CODE (PATTERN (target)) == SEQUENCE)
1853 target_main = XVECEXP (PATTERN (target), 0, 0);
1855 if (resource_conflicts_p (&needed, &set)
1857 || reg_mentioned_p (cc0_rtx, ipat)
1859 /* The insn requiring the delay may not set anything needed or set by
1861 || insn_sets_resource_p (target_main, &needed, 1)
1862 || insn_sets_resource_p (target_main, &set, 1))
1865 /* Insns we pass may not set either NEEDED or SET, so merge them for
1867 needed.memory |= set.memory;
1868 IOR_HARD_REG_SET (needed.regs, set.regs);
1870 /* This insn isn't redundant if it conflicts with an insn that either is
1871 or will be in a delay slot of TARGET. */
1875 if (insn_sets_resource_p (XEXP (delay_list, 0), &needed, 1))
1877 delay_list = XEXP (delay_list, 1);
1880 if (GET_CODE (target) == INSN && GET_CODE (PATTERN (target)) == SEQUENCE)
1881 for (i = 1; i < XVECLEN (PATTERN (target), 0); i++)
1882 if (insn_sets_resource_p (XVECEXP (PATTERN (target), 0, i), &needed, 1))
1885 /* Scan backwards until we reach a label or an insn that uses something
1886 INSN sets or sets something insn uses or sets. */
1888 for (trial = PREV_INSN (target);
1889 trial && GET_CODE (trial) != CODE_LABEL;
1890 trial = PREV_INSN (trial))
1892 if (GET_CODE (trial) != INSN && GET_CODE (trial) != CALL_INSN
1893 && GET_CODE (trial) != JUMP_INSN)
1896 pat = PATTERN (trial);
1897 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1900 if (GET_CODE (pat) == SEQUENCE)
1902 /* If this is a CALL_INSN and its delay slots, it is hard to track
1903 the resource needs properly, so give up. */
1904 if (GET_CODE (XVECEXP (pat, 0, 0)) == CALL_INSN)
1907 /* If this this is an INSN or JUMP_INSN with delayed effects, it
1908 is hard to track the resource needs properly, so give up. */
1910 #ifdef INSN_SETS_ARE_DELAYED
1911 if (INSN_SETS_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1915 #ifdef INSN_REFERENCES_ARE_DELAYED
1916 if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1920 /* See if any of the insns in the delay slot match, updating
1921 resource requirements as we go. */
1922 for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
1924 rtx candidate = XVECEXP (pat, 0, i);
1926 /* If an insn will be annulled if the branch is false, it isn't
1927 considered as a possible duplicate insn. */
1928 if (rtx_equal_p (PATTERN (candidate), ipat)
1929 && ! (INSN_ANNULLED_BRANCH_P (XVECEXP (pat, 0, 0))
1930 && INSN_FROM_TARGET_P (candidate)))
1932 /* Show that this insn will be used in the sequel. */
1933 INSN_FROM_TARGET_P (candidate) = 0;
1937 /* Unless this is an annulled insn from the target of a branch,
1938 we must stop if it sets anything needed or set by INSN. */
1939 if ((! INSN_ANNULLED_BRANCH_P (XVECEXP (pat, 0, 0))
1940 || ! INSN_FROM_TARGET_P (candidate))
1941 && insn_sets_resource_p (candidate, &needed, 1))
1946 /* If the insn requiring the delay slot conflicts with INSN, we
1948 if (insn_sets_resource_p (XVECEXP (pat, 0, 0), &needed, 1))
1953 /* See if TRIAL is the same as INSN. */
1954 pat = PATTERN (trial);
1955 if (rtx_equal_p (pat, ipat))
1958 /* Can't go any further if TRIAL conflicts with INSN. */
1959 if (insn_sets_resource_p (trial, &needed, 1))
1967 /* Return 1 if THREAD can only be executed in one way. If LABEL is non-zero,
1968 it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH
1969 is non-zero, we are allowed to fall into this thread; otherwise, we are
1972 If LABEL is used more than one or we pass a label other than LABEL before
1973 finding an active insn, we do not own this thread. */
1976 own_thread_p (thread, label, allow_fallthrough)
1979 int allow_fallthrough;
1984 /* We don't own the function end. */
1988 /* Get the first active insn, or THREAD, if it is an active insn. */
1989 active_insn = next_active_insn (PREV_INSN (thread));
1991 for (insn = thread; insn != active_insn; insn = NEXT_INSN (insn))
1992 if (GET_CODE (insn) == CODE_LABEL
1993 && (insn != label || LABEL_NUSES (insn) != 1))
1996 if (allow_fallthrough)
1999 /* Ensure that we reach a BARRIER before any insn or label. */
2000 for (insn = prev_nonnote_insn (thread);
2001 insn == 0 || GET_CODE (insn) != BARRIER;
2002 insn = prev_nonnote_insn (insn))
2004 || GET_CODE (insn) == CODE_LABEL
2005 || (GET_CODE (insn) == INSN
2006 && GET_CODE (PATTERN (insn)) != USE
2007 && GET_CODE (PATTERN (insn)) != CLOBBER))
2013 /* Find the number of the basic block that starts closest to INSN. Return -1
2014 if we couldn't find such a basic block. */
2017 find_basic_block (insn)
2022 /* Scan backwards to the previous BARRIER. Then see if we can find a
2023 label that starts a basic block. Return the basic block number. */
2025 for (insn = prev_nonnote_insn (insn);
2026 insn && GET_CODE (insn) != BARRIER;
2027 insn = prev_nonnote_insn (insn))
2030 /* The start of the function is basic block zero. */
2034 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach
2035 anything other than a CODE_LABEL or note, we can't find this code. */
2036 for (insn = next_nonnote_insn (insn);
2037 insn && GET_CODE (insn) == CODE_LABEL;
2038 insn = next_nonnote_insn (insn))
2040 for (i = 0; i < n_basic_blocks; i++)
2041 if (insn == basic_block_head[i])
2048 /* Called when INSN is being moved from a location near the target of a jump.
2049 We leave a marker of the form (use (INSN)) immediately in front
2050 of WHERE for mark_target_live_regs. These markers will be deleted when
2053 We used to try to update the live status of registers if WHERE is at
2054 the start of a basic block, but that can't work since we may remove a
2055 BARRIER in relax_delay_slots. */
2058 update_block (insn, where)
2064 /* Ignore if this was in a delay slot and it came from the target of
2066 if (INSN_FROM_TARGET_P (insn))
2069 emit_insn_before (gen_rtx (USE, VOIDmode, insn), where);
2071 /* INSN might be making a value live in a block where it didn't use to
2072 be. So recompute liveness information for this block. */
2074 b = find_basic_block (insn);
2079 /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN.
2080 We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes
2081 that reference values used in INSN. If we find one, then we move the
2082 REG_DEAD note to INSN.
2084 This is needed to handle the case where an later insn (after INSN) has a
2085 REG_DEAD note for a register used by INSN, and this later insn subsequently
2086 gets moved before a CODE_LABEL because it is a redundant insn. In this
2087 case, mark_target_live_regs may be confused into thinking the register
2088 is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */
2091 update_reg_dead_notes (insn, delayed_insn)
2092 rtx insn, delayed_insn;
2096 for (p = next_nonnote_insn (insn); p != delayed_insn;
2097 p = next_nonnote_insn (p))
2098 for (link = REG_NOTES (p); link; link = next)
2100 next = XEXP (link, 1);
2102 if (REG_NOTE_KIND (link) != REG_DEAD
2103 || GET_CODE (XEXP (link, 0)) != REG)
2106 if (reg_referenced_p (XEXP (link, 0), PATTERN (insn)))
2108 /* Move the REG_DEAD note from P to INSN. */
2109 remove_note (p, link);
2110 XEXP (link, 1) = REG_NOTES (insn);
2111 REG_NOTES (insn) = link;
2116 /* Marks registers possibly live at the current place being scanned by
2117 mark_target_live_regs. Used only by next two function. */
2119 static HARD_REG_SET current_live_regs;
2121 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
2122 Also only used by the next two functions. */
2124 static HARD_REG_SET pending_dead_regs;
2126 /* Utility function called from mark_target_live_regs via note_stores.
2127 It deadens any CLOBBERed registers and livens any SET registers. */
2130 update_live_status (dest, x)
2134 int first_regno, last_regno;
2137 if (GET_CODE (dest) != REG
2138 && (GET_CODE (dest) != SUBREG || GET_CODE (SUBREG_REG (dest)) != REG))
2141 if (GET_CODE (dest) == SUBREG)
2142 first_regno = REGNO (SUBREG_REG (dest)) + SUBREG_WORD (dest);
2144 first_regno = REGNO (dest);
2146 last_regno = first_regno + HARD_REGNO_NREGS (first_regno, GET_MODE (dest));
2148 if (GET_CODE (x) == CLOBBER)
2149 for (i = first_regno; i < last_regno; i++)
2150 CLEAR_HARD_REG_BIT (current_live_regs, i);
2152 for (i = first_regno; i < last_regno; i++)
2154 SET_HARD_REG_BIT (current_live_regs, i);
2155 CLEAR_HARD_REG_BIT (pending_dead_regs, i);
2159 /* Similar to next_insn, but ignores insns in the delay slots of
2160 an annulled branch. */
2163 next_insn_no_annul (insn)
2168 /* If INSN is an annulled branch, skip any insns from the target
2170 if (INSN_ANNULLED_BRANCH_P (insn)
2171 && NEXT_INSN (PREV_INSN (insn)) != insn)
2172 while (INSN_FROM_TARGET_P (NEXT_INSN (insn)))
2173 insn = NEXT_INSN (insn);
2175 insn = NEXT_INSN (insn);
2176 if (insn && GET_CODE (insn) == INSN
2177 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2178 insn = XVECEXP (PATTERN (insn), 0, 0);
2184 /* Set the resources that are live at TARGET.
2186 If TARGET is zero, we refer to the end of the current function and can
2187 return our precomputed value.
2189 Otherwise, we try to find out what is live by consulting the basic block
2190 information. This is tricky, because we must consider the actions of
2191 reload and jump optimization, which occur after the basic block information
2194 Accordingly, we proceed as follows::
2196 We find the previous BARRIER and look at all immediately following labels
2197 (with no intervening active insns) to see if any of them start a basic
2198 block. If we hit the start of the function first, we use block 0.
2200 Once we have found a basic block and a corresponding first insns, we can
2201 accurately compute the live status from basic_block_live_regs and
2202 reg_renumber. (By starting at a label following a BARRIER, we are immune
2203 to actions taken by reload and jump.) Then we scan all insns between
2204 that point and our target. For each CLOBBER (or for call-clobbered regs
2205 when we pass a CALL_INSN), mark the appropriate registers are dead. For
2206 a SET, mark them as live.
2208 We have to be careful when using REG_DEAD notes because they are not
2209 updated by such things as find_equiv_reg. So keep track of registers
2210 marked as dead that haven't been assigned to, and mark them dead at the
2211 next CODE_LABEL since reload and jump won't propagate values across labels.
2213 If we cannot find the start of a basic block (should be a very rare
2214 case, if it can happen at all), mark everything as potentially live.
2216 Next, scan forward from TARGET looking for things set or clobbered
2217 before they are used. These are not live.
2219 Because we can be called many times on the same target, save our results
2220 in a hash table indexed by INSN_UID. */
2223 mark_target_live_regs (target, res)
2225 struct resources *res;
2229 struct target_info *tinfo;
2233 HARD_REG_SET scratch;
2234 struct resources set, needed;
2237 /* Handle end of function. */
2240 *res = end_of_function_needs;
2244 /* We have to assume memory is needed, but the CC isn't. */
2249 /* See if we have computed this value already. */
2250 for (tinfo = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
2251 tinfo; tinfo = tinfo->next)
2252 if (tinfo->uid == INSN_UID (target))
2255 /* Start by getting the basic block number. If we have saved information,
2256 we can get it from there unless the insn at the start of the basic block
2257 has been deleted. */
2258 if (tinfo && tinfo->block != -1
2259 && ! INSN_DELETED_P (basic_block_head[tinfo->block]))
2263 b = find_basic_block (target);
2267 /* If the information is up-to-date, use it. Otherwise, we will
2269 if (b == tinfo->block && b != -1 && tinfo->bb_tick == bb_ticks[b])
2271 COPY_HARD_REG_SET (res->regs, tinfo->live_regs);
2277 /* Allocate a place to put our results and chain it into the
2279 tinfo = (struct target_info *) oballoc (sizeof (struct target_info));
2280 tinfo->uid = INSN_UID (target);
2282 tinfo->next = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
2283 target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME] = tinfo;
2286 CLEAR_HARD_REG_SET (pending_dead_regs);
2288 /* If we found a basic block, get the live registers from it and update
2289 them with anything set or killed between its start and the insn before
2290 TARGET. Otherwise, we must assume everything is live. */
2293 regset regs_live = basic_block_live_at_start[b];
2295 REGSET_ELT_TYPE bit;
2297 rtx start_insn, stop_insn;
2299 /* Compute hard regs live at start of block -- this is the real hard regs
2300 marked live, plus live pseudo regs that have been renumbered to
2304 current_live_regs = *regs_live;
2306 COPY_HARD_REG_SET (current_live_regs, regs_live);
2309 for (offset = 0, i = 0; offset < regset_size; offset++)
2311 if (regs_live[offset] == 0)
2312 i += REGSET_ELT_BITS;
2314 for (bit = 1; bit && i < max_regno; bit <<= 1, i++)
2315 if ((regs_live[offset] & bit)
2316 && (regno = reg_renumber[i]) >= 0)
2318 j < regno + HARD_REGNO_NREGS (regno,
2319 PSEUDO_REGNO_MODE (i));
2321 SET_HARD_REG_BIT (current_live_regs, j);
2324 /* Get starting and ending insn, handling the case where each might
2326 start_insn = (b == 0 ? get_insns () : basic_block_head[b]);
2329 if (GET_CODE (start_insn) == INSN
2330 && GET_CODE (PATTERN (start_insn)) == SEQUENCE)
2331 start_insn = XVECEXP (PATTERN (start_insn), 0, 0);
2333 if (GET_CODE (stop_insn) == INSN
2334 && GET_CODE (PATTERN (stop_insn)) == SEQUENCE)
2335 stop_insn = next_insn (PREV_INSN (stop_insn));
2337 for (insn = start_insn; insn != stop_insn;
2338 insn = next_insn_no_annul (insn))
2341 rtx real_insn = insn;
2343 /* If this insn is from the target of a branch, it isn't going to
2344 be used in the sequel. If it is used in both cases, this
2345 test will not be true. */
2346 if (INSN_FROM_TARGET_P (insn))
2349 /* If this insn is a USE made by update_block, we care about the
2351 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == USE
2352 && GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn), 0))) == 'i')
2353 real_insn = XEXP (PATTERN (insn), 0);
2355 if (GET_CODE (real_insn) == CALL_INSN)
2357 /* CALL clobbers all call-used regs that aren't fixed except
2358 sp, ap, and fp. Do this before setting the result of the
2360 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2361 if (call_used_regs[i]
2362 && i != STACK_POINTER_REGNUM && i != FRAME_POINTER_REGNUM
2363 && i != ARG_POINTER_REGNUM
2364 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
2365 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
2367 #ifdef PIC_OFFSET_TABLE_REGNUM
2368 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
2371 CLEAR_HARD_REG_BIT (current_live_regs, i);
2373 /* A CALL_INSN sets any global register live, since it may
2374 have been modified by the call. */
2375 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2377 SET_HARD_REG_BIT (current_live_regs, i);
2380 /* Mark anything killed in an insn to be deadened at the next
2381 label. Ignore USE insns; the only REG_DEAD notes will be for
2382 parameters. But they might be early. A CALL_INSN will usually
2383 clobber registers used for parameters. It isn't worth bothering
2384 with the unlikely case when it won't. */
2385 if ((GET_CODE (real_insn) == INSN
2386 && GET_CODE (PATTERN (real_insn)) != USE)
2387 || GET_CODE (real_insn) == JUMP_INSN
2388 || GET_CODE (real_insn) == CALL_INSN)
2390 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
2391 if (REG_NOTE_KIND (link) == REG_DEAD
2392 && GET_CODE (XEXP (link, 0)) == REG
2393 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
2395 int first_regno = REGNO (XEXP (link, 0));
2398 + HARD_REGNO_NREGS (first_regno,
2399 GET_MODE (XEXP (link, 0))));
2401 for (i = first_regno; i < last_regno; i++)
2402 SET_HARD_REG_BIT (pending_dead_regs, i);
2405 note_stores (PATTERN (real_insn), update_live_status);
2407 /* If any registers were unused after this insn, kill them.
2408 These notes will always be accurate. */
2409 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
2410 if (REG_NOTE_KIND (link) == REG_UNUSED
2411 && GET_CODE (XEXP (link, 0)) == REG
2412 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
2414 int first_regno = REGNO (XEXP (link, 0));
2417 + HARD_REGNO_NREGS (first_regno,
2418 GET_MODE (XEXP (link, 0))));
2420 for (i = first_regno; i < last_regno; i++)
2421 CLEAR_HARD_REG_BIT (current_live_regs, i);
2425 else if (GET_CODE (real_insn) == CODE_LABEL)
2427 /* A label clobbers the pending dead registers since neither
2428 reload nor jump will propagate a value across a label. */
2429 AND_COMPL_HARD_REG_SET (current_live_regs, pending_dead_regs);
2430 CLEAR_HARD_REG_SET (pending_dead_regs);
2433 /* The beginning of the epilogue corresponds to the end of the
2434 RTL chain when there are no epilogue insns. Certain resources
2435 are implicitly required at that point. */
2436 else if (GET_CODE (real_insn) == NOTE
2437 && NOTE_LINE_NUMBER (real_insn) == NOTE_INSN_EPILOGUE_BEG)
2438 IOR_HARD_REG_SET (current_live_regs, start_of_epilogue_needs.regs);
2441 COPY_HARD_REG_SET (res->regs, current_live_regs);
2443 tinfo->bb_tick = bb_ticks[b];
2446 /* We didn't find the start of a basic block. Assume everything
2447 in use. This should happen only extremely rarely. */
2448 SET_HARD_REG_SET (res->regs);
2450 /* Now step forward from TARGET looking for registers that are set before
2451 they are used. These are dead. If we pass a label, any pending dead
2452 registers that weren't yet used can be made dead. Stop when we pass a
2453 conditional JUMP_INSN; follow the first few unconditional branches. */
2455 CLEAR_RESOURCE (&set);
2456 CLEAR_RESOURCE (&needed);
2458 for (insn = target; insn; insn = next)
2460 rtx this_jump_insn = insn;
2462 next = NEXT_INSN (insn);
2463 switch (GET_CODE (insn))
2466 AND_COMPL_HARD_REG_SET (pending_dead_regs, needed.regs);
2467 AND_COMPL_HARD_REG_SET (res->regs, pending_dead_regs);
2468 CLEAR_HARD_REG_SET (pending_dead_regs);
2476 if (GET_CODE (PATTERN (insn)) == USE)
2478 /* If INSN is a USE made by update_block, we care about the
2479 underlying insn. Any registers set by the underlying insn
2480 are live since the insn is being done somewhere else. */
2481 if (GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn), 0))) == 'i')
2482 mark_set_resources (XEXP (PATTERN (insn), 0), res, 0, 1);
2484 /* All other USE insns are to be ignored. */
2487 else if (GET_CODE (PATTERN (insn)) == CLOBBER)
2489 else if (GET_CODE (PATTERN (insn)) == SEQUENCE)
2491 /* An unconditional jump can be used to fill the delay slot
2492 of a call, so search for a JUMP_INSN in any position. */
2493 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2495 this_jump_insn = XVECEXP (PATTERN (insn), 0, i);
2496 if (GET_CODE (this_jump_insn) == JUMP_INSN)
2502 if (GET_CODE (this_jump_insn) == JUMP_INSN)
2504 if (jump_count++ < 10
2505 && (simplejump_p (this_jump_insn)
2506 || GET_CODE (PATTERN (this_jump_insn)) == RETURN))
2508 next = next_active_insn (JUMP_LABEL (this_jump_insn));
2512 jump_target = JUMP_LABEL (this_jump_insn);
2519 mark_referenced_resources (insn, &needed, 1);
2520 mark_set_resources (insn, &set, 0, 1);
2522 COPY_HARD_REG_SET (scratch, set.regs);
2523 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
2524 AND_COMPL_HARD_REG_SET (res->regs, scratch);
2527 /* If we hit an unconditional branch, we have another way of finding out
2528 what is live: we can see what is live at the branch target and include
2529 anything used but not set before the branch. The only things that are
2530 live are those that are live using the above test and the test below.
2532 Don't try this if we expired our jump count above, since that would
2533 mean there may be an infinite loop in the function being compiled. */
2535 if (jump_insn && jump_count < 10)
2537 struct resources new_resources;
2538 rtx stop_insn = next_active_insn (jump_insn);
2540 mark_target_live_regs (next_active_insn (jump_target), &new_resources);
2541 CLEAR_RESOURCE (&set);
2542 CLEAR_RESOURCE (&needed);
2544 /* Include JUMP_INSN in the needed registers. */
2545 for (insn = target; insn != stop_insn; insn = next_active_insn (insn))
2547 mark_referenced_resources (insn, &needed, 1);
2549 COPY_HARD_REG_SET (scratch, needed.regs);
2550 AND_COMPL_HARD_REG_SET (scratch, set.regs);
2551 IOR_HARD_REG_SET (new_resources.regs, scratch);
2553 mark_set_resources (insn, &set, 0, 1);
2556 AND_HARD_REG_SET (res->regs, new_resources.regs);
2559 COPY_HARD_REG_SET (tinfo->live_regs, res->regs);
2562 /* Scan a function looking for insns that need a delay slot and find insns to
2563 put into the delay slot.
2565 NON_JUMPS_P is non-zero if we are to only try to fill non-jump insns (such
2566 as calls). We do these first since we don't want jump insns (that are
2567 easier to fill) to get the only insns that could be used for non-jump insns.
2568 When it is zero, only try to fill JUMP_INSNs.
2570 When slots are filled in this manner, the insns (including the
2571 delay_insn) are put together in a SEQUENCE rtx. In this fashion,
2572 it is possible to tell whether a delay slot has really been filled
2573 or not. `final' knows how to deal with this, by communicating
2574 through FINAL_SEQUENCE. */
2577 fill_simple_delay_slots (first, non_jumps_p)
2581 register rtx insn, pat, trial, next_trial;
2583 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
2584 struct resources needed, set;
2585 register int slots_to_fill, slots_filled;
2588 for (i = 0; i < num_unfilled_slots; i++)
2591 /* Get the next insn to fill. If it has already had any slots assigned,
2592 we can't do anything with it. Maybe we'll improve this later. */
2594 insn = unfilled_slots_base[i];
2596 || INSN_DELETED_P (insn)
2597 || (GET_CODE (insn) == INSN
2598 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2599 || (GET_CODE (insn) == JUMP_INSN && non_jumps_p)
2600 || (GET_CODE (insn) != JUMP_INSN && ! non_jumps_p))
2603 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2604 slots_to_fill = num_delay_slots (insn);
2605 if (slots_to_fill == 0)
2608 /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL
2609 says how many. After initialization, first try optimizing
2612 nop add %o7,.-L1,%o7
2616 If this case applies, the delay slot of the call is filled with
2617 the unconditional jump. This is done first to avoid having the
2618 delay slot of the call filled in the backward scan. Also, since
2619 the unconditional jump is likely to also have a delay slot, that
2620 insn must exist when it is subsequently scanned. */
2625 if (GET_CODE (insn) == CALL_INSN
2626 && (trial = next_active_insn (insn))
2627 && GET_CODE (trial) == JUMP_INSN
2628 && simplejump_p (trial)
2629 && eligible_for_delay (insn, slots_filled, trial, flags)
2630 && no_labels_between_p (insn, trial))
2633 delay_list = add_to_delay_list (trial, delay_list);
2634 /* Remove the unconditional jump from consideration for delay slot
2635 filling and unthread it. */
2636 if (unfilled_slots_base[i + 1] == trial)
2637 unfilled_slots_base[i + 1] = 0;
2639 rtx next = NEXT_INSN (trial);
2640 rtx prev = PREV_INSN (trial);
2642 NEXT_INSN (prev) = next;
2644 PREV_INSN (next) = prev;
2648 /* Now, scan backwards from the insn to search for a potential
2649 delay-slot candidate. Stop searching when a label or jump is hit.
2651 For each candidate, if it is to go into the delay slot (moved
2652 forward in execution sequence), it must not need or set any resources
2653 that were set by later insns and must not set any resources that
2654 are needed for those insns.
2656 The delay slot insn itself sets resources unless it is a call
2657 (in which case the called routine, not the insn itself, is doing
2660 if (slots_filled < slots_to_fill)
2662 CLEAR_RESOURCE (&needed);
2663 CLEAR_RESOURCE (&set);
2664 mark_set_resources (insn, &set, 0, 0);
2665 mark_referenced_resources (insn, &needed, 0);
2667 for (trial = prev_nonnote_insn (insn); ! stop_search_p (trial, 1);
2670 next_trial = prev_nonnote_insn (trial);
2672 /* This must be an INSN or CALL_INSN. */
2673 pat = PATTERN (trial);
2675 /* USE and CLOBBER at this level was just for flow; ignore it. */
2676 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2679 /* Check for resource conflict first, to avoid unnecessary
2681 if (! insn_references_resource_p (trial, &set, 1)
2682 && ! insn_sets_resource_p (trial, &set, 1)
2683 && ! insn_sets_resource_p (trial, &needed, 1)
2685 /* Can't separate set of cc0 from its use. */
2686 && ! (reg_mentioned_p (cc0_rtx, pat)
2687 && ! sets_cc0_p (cc0_rtx, pat))
2691 trial = try_split (pat, trial, 1);
2692 next_trial = prev_nonnote_insn (trial);
2693 if (eligible_for_delay (insn, slots_filled, trial, flags))
2695 /* In this case, we are searching backward, so if we
2696 find insns to put on the delay list, we want
2697 to put them at the head, rather than the
2698 tail, of the list. */
2700 update_reg_dead_notes (trial, insn);
2701 delay_list = gen_rtx (INSN_LIST, VOIDmode,
2703 update_block (trial, trial);
2704 delete_insn (trial);
2705 if (slots_to_fill == ++slots_filled)
2711 mark_set_resources (trial, &set, 0, 1);
2712 mark_referenced_resources (trial, &needed, 1);
2716 /* If all needed slots haven't been filled, we come here. */
2718 /* Try to optimize case of jumping around a single insn. */
2719 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
2720 if (slots_filled != slots_to_fill
2722 && GET_CODE (insn) == JUMP_INSN && condjump_p (insn))
2724 delay_list = optimize_skip (insn);
2730 /* Try to get insns from beyond the insn needing the delay slot.
2731 These insns can neither set or reference resources set in insns being
2732 skipped, cannot set resources in the insn being skipped, and, if this
2733 is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the
2734 call might not return).
2736 If this is a conditional jump, see if it merges back to us early
2737 enough for us to pick up insns from the merge point. Don't do
2738 this if there is another branch to our label unless we pass all of
2741 Another similar merge is if we jump to the same place that a
2742 later unconditional jump branches to. In that case, we don't
2743 care about the number of uses of our label. */
2745 if (slots_filled != slots_to_fill
2746 && (GET_CODE (insn) != JUMP_INSN
2747 || (condjump_p (insn) && ! simplejump_p (insn)
2748 && JUMP_LABEL (insn) != 0)))
2751 int maybe_never = 0;
2752 int passed_label = 0;
2754 struct resources needed_at_jump;
2756 CLEAR_RESOURCE (&needed);
2757 CLEAR_RESOURCE (&set);
2759 if (GET_CODE (insn) == CALL_INSN)
2761 mark_set_resources (insn, &set, 0, 1);
2762 mark_referenced_resources (insn, &needed, 1);
2767 mark_set_resources (insn, &set, 0, 1);
2768 mark_referenced_resources (insn, &needed, 1);
2769 if (GET_CODE (insn) == JUMP_INSN)
2771 /* Get our target and show how many more uses we want to
2772 see before we hit the label. */
2773 target = JUMP_LABEL (insn);
2774 target_uses = LABEL_NUSES (target) - 1;
2779 for (trial = next_nonnote_insn (insn); trial; trial = next_trial)
2781 rtx pat, trial_delay;
2783 next_trial = next_nonnote_insn (trial);
2785 if (GET_CODE (trial) == CODE_LABEL)
2789 /* If this is our target, see if we have seen all its uses.
2790 If so, indicate we have passed our target and ignore it.
2791 All other labels cause us to stop our search. */
2792 if (trial == target && target_uses == 0)
2800 else if (GET_CODE (trial) == BARRIER)
2803 /* We must have an INSN, JUMP_INSN, or CALL_INSN. */
2804 pat = PATTERN (trial);
2806 /* Stand-alone USE and CLOBBER are just for flow. */
2807 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2810 /* If this already has filled delay slots, get the insn needing
2812 if (GET_CODE (pat) == SEQUENCE)
2813 trial_delay = XVECEXP (pat, 0, 0);
2815 trial_delay = trial;
2817 /* If this is a jump insn to our target, indicate that we have
2818 seen another jump to it. If we aren't handling a conditional
2819 jump, stop our search. Otherwise, compute the needs at its
2820 target and add them to NEEDED. */
2821 if (GET_CODE (trial_delay) == JUMP_INSN)
2825 else if (JUMP_LABEL (trial_delay) == target)
2829 mark_target_live_regs
2830 (next_active_insn (JUMP_LABEL (trial_delay)),
2832 needed.memory |= needed_at_jump.memory;
2833 IOR_HARD_REG_SET (needed.regs, needed_at_jump.regs);
2837 /* See if we have a resource problem before we try to
2840 && GET_CODE (pat) != SEQUENCE
2841 && ! insn_references_resource_p (trial, &set, 1)
2842 && ! insn_sets_resource_p (trial, &set, 1)
2843 && ! insn_sets_resource_p (trial, &needed, 1)
2845 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))
2847 && ! (maybe_never && may_trap_p (pat))
2848 && (trial = try_split (pat, trial, 0))
2849 && eligible_for_delay (insn, slots_filled, trial, flags))
2851 next_trial = next_nonnote_insn (trial);
2852 delay_list = add_to_delay_list (trial, delay_list);
2855 if (reg_mentioned_p (cc0_rtx, pat))
2856 link_cc0_insns (trial);
2860 update_block (trial, trial);
2861 delete_insn (trial);
2862 if (slots_to_fill == ++slots_filled)
2867 mark_set_resources (trial, &set, 0, 1);
2868 mark_referenced_resources (trial, &needed, 1);
2870 /* Ensure we don't put insns between the setting of cc and the
2871 comparison by moving a setting of cc into an earlier delay
2872 slot since these insns could clobber the condition code. */
2875 /* If this is a call or jump, we might not get here. */
2876 if (GET_CODE (trial) == CALL_INSN
2877 || GET_CODE (trial) == JUMP_INSN)
2881 /* If there are slots left to fill and our search was stopped by an
2882 unconditional branch, try the insn at the branch target. We can
2883 redirect the branch if it works. */
2884 if (slots_to_fill != slots_filled
2886 && GET_CODE (trial) == JUMP_INSN
2887 && simplejump_p (trial)
2888 && (target == 0 || JUMP_LABEL (trial) == target)
2889 && (next_trial = next_active_insn (JUMP_LABEL (trial))) != 0
2890 && ! (GET_CODE (next_trial) == INSN
2891 && GET_CODE (PATTERN (next_trial)) == SEQUENCE)
2892 && ! insn_references_resource_p (next_trial, &set, 1)
2893 && ! insn_sets_resource_p (next_trial, &set, 1)
2894 && ! insn_sets_resource_p (next_trial, &needed, 1)
2896 && ! reg_mentioned_p (cc0_rtx, PATTERN (next_trial))
2898 && ! (maybe_never && may_trap_p (PATTERN (next_trial)))
2899 && (next_trial = try_split (PATTERN (next_trial), next_trial, 0))
2900 && eligible_for_delay (insn, slots_filled, next_trial, flags))
2902 rtx new_label = next_active_insn (next_trial);
2905 new_label = get_label_before (new_label);
2908 = add_to_delay_list (copy_rtx (next_trial), delay_list);
2910 redirect_jump (trial, new_label);
2912 /* If we merged because we both jumped to the same place,
2913 redirect the original insn also. */
2915 redirect_jump (insn, new_label);
2920 unfilled_slots_base[i]
2921 = emit_delay_sequence (insn, delay_list,
2922 slots_filled, slots_to_fill);
2924 if (slots_to_fill == slots_filled)
2925 unfilled_slots_base[i] = 0;
2927 note_delay_statistics (slots_filled, 0);
2930 #ifdef DELAY_SLOTS_FOR_EPILOGUE
2931 /* See if the epilogue needs any delay slots. Try to fill them if so.
2932 The only thing we can do is scan backwards from the end of the
2933 function. If we did this in a previous pass, it is incorrect to do it
2935 if (current_function_epilogue_delay_list)
2938 slots_to_fill = DELAY_SLOTS_FOR_EPILOGUE;
2939 if (slots_to_fill == 0)
2943 CLEAR_RESOURCE (&needed);
2944 CLEAR_RESOURCE (&set);
2946 for (trial = get_last_insn (); ! stop_search_p (trial, 1);
2947 trial = PREV_INSN (trial))
2949 if (GET_CODE (trial) == NOTE)
2951 pat = PATTERN (trial);
2952 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2955 if (! insn_references_resource_p (trial, &set, 1)
2956 && ! insn_sets_resource_p (trial, &needed, 1)
2958 /* Don't want to mess with cc0 here. */
2959 && ! reg_mentioned_p (cc0_rtx, pat)
2963 trial = try_split (pat, trial, 1);
2964 if (ELIGIBLE_FOR_EPILOGUE_DELAY (trial, slots_filled))
2966 /* Here as well we are searching backward, so put the
2967 insns we find on the head of the list. */
2969 current_function_epilogue_delay_list
2970 = gen_rtx (INSN_LIST, VOIDmode, trial,
2971 current_function_epilogue_delay_list);
2972 mark_referenced_resources (trial, &end_of_function_needs, 1);
2973 update_block (trial, trial);
2974 delete_insn (trial);
2976 /* Clear deleted bit so final.c will output the insn. */
2977 INSN_DELETED_P (trial) = 0;
2979 if (slots_to_fill == ++slots_filled)
2985 mark_set_resources (trial, &set, 0, 1);
2986 mark_referenced_resources (trial, &needed, 1);
2989 note_delay_statistics (slots_filled, 0);
2993 /* Try to find insns to place in delay slots.
2995 INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION
2996 or is an unconditional branch if CONDITION is const_true_rtx.
2997 *PSLOTS_FILLED is updated with the number of slots that we have filled.
2999 THREAD is a flow-of-control, either the insns to be executed if the
3000 branch is true or if the branch is false, THREAD_IF_TRUE says which.
3002 OPPOSITE_THREAD is the thread in the opposite direction. It is used
3003 to see if any potential delay slot insns set things needed there.
3005 LIKELY is non-zero if it is extremely likely that the branch will be
3006 taken and THREAD_IF_TRUE is set. This is used for the branch at the
3007 end of a loop back up to the top.
3009 OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the
3010 thread. I.e., it is the fallthrough code of our jump or the target of the
3011 jump when we are the only jump going there.
3013 If OWN_THREAD is false, it must be the "true" thread of a jump. In that
3014 case, we can only take insns from the head of the thread for our delay
3015 slot. We then adjust the jump to point after the insns we have taken. */
3018 fill_slots_from_thread (insn, condition, thread, opposite_thread, likely,
3019 thread_if_true, own_thread, own_opposite_thread,
3020 slots_to_fill, pslots_filled)
3023 rtx thread, opposite_thread;
3026 int own_thread, own_opposite_thread;
3027 int slots_to_fill, *pslots_filled;
3031 struct resources opposite_needed, set, needed;
3037 /* Validate our arguments. */
3038 if ((condition == const_true_rtx && ! thread_if_true)
3039 || (! own_thread && ! thread_if_true))
3042 flags = get_jump_flags (insn, JUMP_LABEL (insn));
3044 /* If our thread is the end of subroutine, we can't get any delay
3049 /* If this is an unconditional branch, nothing is needed at the
3050 opposite thread. Otherwise, compute what is needed there. */
3051 if (condition == const_true_rtx)
3052 CLEAR_RESOURCE (&opposite_needed);
3054 mark_target_live_regs (opposite_thread, &opposite_needed);
3056 /* If the insn at THREAD can be split, do it here to avoid having to
3057 update THREAD and NEW_THREAD if it is done in the loop below. Also
3058 initialize NEW_THREAD. */
3060 new_thread = thread = try_split (PATTERN (thread), thread, 0);
3062 /* Scan insns at THREAD. We are looking for an insn that can be removed
3063 from THREAD (it neither sets nor references resources that were set
3064 ahead of it and it doesn't set anything needs by the insns ahead of
3065 it) and that either can be placed in an annulling insn or aren't
3066 needed at OPPOSITE_THREAD. */
3068 CLEAR_RESOURCE (&needed);
3069 CLEAR_RESOURCE (&set);
3071 /* If we do not own this thread, we must stop as soon as we find
3072 something that we can't put in a delay slot, since all we can do
3073 is branch into THREAD at a later point. Therefore, labels stop
3074 the search if this is not the `true' thread. */
3076 for (trial = thread;
3077 ! stop_search_p (trial, ! thread_if_true) && (! lose || own_thread);
3078 trial = next_nonnote_insn (trial))
3082 /* If we have passed a label, we no longer own this thread. */
3083 if (GET_CODE (trial) == CODE_LABEL)
3089 pat = PATTERN (trial);
3090 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
3093 /* If TRIAL conflicts with the insns ahead of it, we lose. Also,
3094 don't separate or copy insns that set and use CC0. */
3095 if (! insn_references_resource_p (trial, &set, 1)
3096 && ! insn_sets_resource_p (trial, &set, 1)
3097 && ! insn_sets_resource_p (trial, &needed, 1)
3099 && ! (reg_mentioned_p (cc0_rtx, pat)
3100 && (! own_thread || ! sets_cc0_p (pat)))
3104 /* If TRIAL is redundant with some insn before INSN, we don't
3105 actually need to add it to the delay list; we can merely pretend
3107 if (redundant_insn_p (trial, insn, delay_list))
3111 update_block (trial, thread);
3112 delete_insn (trial);
3115 new_thread = next_active_insn (trial);
3120 /* There are two ways we can win: If TRIAL doesn't set anything
3121 needed at the opposite thread and can't trap, or if it can
3122 go into an annulled delay slot. */
3123 if (condition == const_true_rtx
3124 || (! insn_sets_resource_p (trial, &opposite_needed, 1)
3125 && ! may_trap_p (pat)))
3127 trial = try_split (pat, trial, 0);
3128 pat = PATTERN (trial);
3129 if (eligible_for_delay (insn, *pslots_filled, trial, flags))
3133 #ifdef ANNUL_IFTRUE_SLOTS
3136 #ifdef ANNUL_IFFALSE_SLOTS
3141 trial = try_split (pat, trial, 0);
3142 pat = PATTERN (trial);
3144 ? eligible_for_annul_false (insn, *pslots_filled, trial, flags)
3145 : eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
3153 if (reg_mentioned_p (cc0_rtx, pat))
3154 link_cc0_insns (trial);
3157 /* If we own this thread, delete the insn. If this is the
3158 destination of a branch, show that a basic block status
3159 may have been updated. In any case, mark the new
3160 starting point of this thread. */
3163 update_block (trial, thread);
3164 delete_insn (trial);
3167 new_thread = next_active_insn (trial);
3169 temp = own_thread ? trial : copy_rtx (trial);
3171 INSN_FROM_TARGET_P (temp) = 1;
3173 delay_list = add_to_delay_list (temp, delay_list);
3175 if (slots_to_fill == ++(*pslots_filled))
3177 /* Even though we have filled all the slots, we
3178 may be branching to a location that has a
3179 redundant insn. Skip any if so. */
3180 while (new_thread && ! own_thread
3181 && ! insn_sets_resource_p (new_thread, &set, 1)
3182 && ! insn_sets_resource_p (new_thread, &needed, 1)
3183 && ! insn_references_resource_p (new_thread,
3185 && redundant_insn_p (new_thread, insn,
3187 new_thread = next_active_insn (new_thread);
3196 /* This insn can't go into a delay slot. */
3198 mark_set_resources (trial, &set, 0, 1);
3199 mark_referenced_resources (trial, &needed, 1);
3201 /* Ensure we don't put insns between the setting of cc and the comparison
3202 by moving a setting of cc into an earlier delay slot since these insns
3203 could clobber the condition code. */
3206 /* If this insn is a register-register copy and the next insn has
3207 a use of our destination, change it to use our source. That way,
3208 it will become a candidate for our delay slot the next time
3209 through this loop. This case occurs commonly in loops that
3212 We could check for more complex cases than those tested below,
3213 but it doesn't seem worth it. It might also be a good idea to try
3214 to swap the two insns. That might do better.
3216 We can't do this if the next insn modifies our source, because that
3217 would make the replacement into the insn invalid. This also
3218 prevents updating the contents of a PRE_INC. */
3220 if (GET_CODE (trial) == INSN && GET_CODE (pat) == SET
3221 && GET_CODE (SET_SRC (pat)) == REG
3222 && GET_CODE (SET_DEST (pat)) == REG)
3224 rtx next = next_nonnote_insn (trial);
3226 if (next && GET_CODE (next) == INSN
3227 && GET_CODE (PATTERN (next)) != USE
3228 && ! reg_set_p (SET_DEST (pat), next)
3229 && reg_referenced_p (SET_DEST (pat), PATTERN (next)))
3230 validate_replace_rtx (SET_DEST (pat), SET_SRC (pat), next);
3234 /* If we stopped on a branch insn that has delay slots, see if we can
3235 steal some of the insns in those slots. */
3236 if (trial && GET_CODE (trial) == INSN
3237 && GET_CODE (PATTERN (trial)) == SEQUENCE
3238 && GET_CODE (XVECEXP (PATTERN (trial), 0, 0)) == JUMP_INSN)
3240 /* If this is the `true' thread, we will want to follow the jump,
3241 so we can only do this if we have taken everything up to here. */
3242 if (thread_if_true && trial == new_thread)
3244 = steal_delay_list_from_target (insn, condition, PATTERN (trial),
3245 delay_list, &set, &needed,
3246 &opposite_needed, slots_to_fill,
3247 pslots_filled, &must_annul,
3249 else if (! thread_if_true)
3251 = steal_delay_list_from_fallthrough (insn, condition,
3253 delay_list, &set, &needed,
3254 &opposite_needed, slots_to_fill,
3255 pslots_filled, &must_annul);
3258 /* If we haven't found anything for this delay slot and it is very
3259 likely that the branch will be taken, see if the insn at our target
3260 increments or decrements a register with an increment that does not
3261 depend on the destination register. If so, try to place the opposite
3262 arithmetic insn after the jump insn and put the arithmetic insn in the
3263 delay slot. If we can't do this, return. */
3264 if (delay_list == 0 && likely && new_thread && GET_CODE (new_thread) == INSN)
3266 rtx pat = PATTERN (new_thread);
3271 pat = PATTERN (trial);
3273 if (GET_CODE (trial) != INSN || GET_CODE (pat) != SET
3274 || ! eligible_for_delay (insn, 0, trial, flags))
3277 dest = SET_DEST (pat), src = SET_SRC (pat);
3278 if ((GET_CODE (src) == PLUS || GET_CODE (src) == MINUS)
3279 && rtx_equal_p (XEXP (src, 0), dest)
3280 && ! reg_overlap_mentioned_p (dest, XEXP (src, 1)))
3282 rtx other = XEXP (src, 1);
3286 /* If this is a constant adjustment, use the same code with
3287 the negated constant. Otherwise, reverse the sense of the
3289 if (GET_CODE (other) == CONST_INT)
3290 new_arith = gen_rtx (GET_CODE (src), GET_MODE (src), dest,
3291 negate_rtx (GET_MODE (src), other));
3293 new_arith = gen_rtx (GET_CODE (src) == PLUS ? MINUS : PLUS,
3294 GET_MODE (src), dest, other);
3296 ninsn = emit_insn_after (gen_rtx (SET, VOIDmode, dest, new_arith),
3299 if (recog_memoized (ninsn) < 0
3300 || (insn_extract (ninsn),
3301 ! constrain_operands (INSN_CODE (ninsn), 1)))
3303 delete_insn (ninsn);
3309 update_block (trial, thread);
3310 delete_insn (trial);
3313 new_thread = next_active_insn (trial);
3315 ninsn = own_thread ? trial : copy_rtx (trial);
3317 INSN_FROM_TARGET_P (ninsn) = 1;
3319 delay_list = add_to_delay_list (ninsn, NULL_RTX);
3324 if (delay_list && must_annul)
3325 INSN_ANNULLED_BRANCH_P (insn) = 1;
3327 /* If we are to branch into the middle of this thread, find an appropriate
3328 label or make a new one if none, and redirect INSN to it. If we hit the
3329 end of the function, use the end-of-function label. */
3330 if (new_thread != thread)
3334 if (! thread_if_true)
3337 if (new_thread && GET_CODE (new_thread) == JUMP_INSN
3338 && (simplejump_p (new_thread)
3339 || GET_CODE (PATTERN (new_thread)) == RETURN))
3340 new_thread = follow_jumps (JUMP_LABEL (new_thread));
3342 if (new_thread == 0)
3343 label = find_end_label ();
3344 else if (GET_CODE (new_thread) == CODE_LABEL)
3347 label = get_label_before (new_thread);
3349 redirect_jump (insn, label);
3355 /* Make another attempt to find insns to place in delay slots.
3357 We previously looked for insns located in front of the delay insn
3358 and, for non-jump delay insns, located behind the delay insn.
3360 Here only try to schedule jump insns and try to move insns from either
3361 the target or the following insns into the delay slot. If annulling is
3362 supported, we will be likely to do this. Otherwise, we can do this only
3366 fill_eager_delay_slots (first)
3371 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
3373 for (i = 0; i < num_unfilled_slots; i++)
3376 rtx target_label, insn_at_target, fallthrough_insn;
3379 int own_fallthrough;
3380 int prediction, slots_to_fill, slots_filled;
3382 insn = unfilled_slots_base[i];
3384 || INSN_DELETED_P (insn)
3385 || GET_CODE (insn) != JUMP_INSN
3386 || ! condjump_p (insn))
3389 slots_to_fill = num_delay_slots (insn);
3390 if (slots_to_fill == 0)
3394 target_label = JUMP_LABEL (insn);
3395 condition = get_branch_condition (insn, target_label);
3400 /* Get the next active fallthough and target insns and see if we own
3401 them. Then see whether the branch is likely true. We don't need
3402 to do a lot of this for unconditional branches. */
3404 insn_at_target = next_active_insn (target_label);
3405 own_target = own_thread_p (target_label, target_label, 0);
3407 if (condition == const_true_rtx)
3409 own_fallthrough = 0;
3410 fallthrough_insn = 0;
3415 fallthrough_insn = next_active_insn (insn);
3416 own_fallthrough = own_thread_p (NEXT_INSN (insn), NULL_RTX, 1);
3417 prediction = mostly_true_jump (insn, condition);
3420 /* If this insn is expected to branch, first try to get insns from our
3421 target, then our fallthrough insns. If it is not, expected to branch,
3422 try the other order. */
3427 = fill_slots_from_thread (insn, condition, insn_at_target,
3428 fallthrough_insn, prediction == 2, 1,
3429 own_target, own_fallthrough,
3430 slots_to_fill, &slots_filled);
3432 if (delay_list == 0 && own_fallthrough)
3434 /* Even though we didn't find anything for delay slots,
3435 we might have found a redundant insn which we deleted
3436 from the thread that was filled. So we have to recompute
3437 the next insn at the target. */
3438 target_label = JUMP_LABEL (insn);
3439 insn_at_target = next_active_insn (target_label);
3442 = fill_slots_from_thread (insn, condition, fallthrough_insn,
3443 insn_at_target, 0, 0,
3444 own_fallthrough, own_target,
3445 slots_to_fill, &slots_filled);
3450 if (own_fallthrough)
3452 = fill_slots_from_thread (insn, condition, fallthrough_insn,
3453 insn_at_target, 0, 0,
3454 own_fallthrough, own_target,
3455 slots_to_fill, &slots_filled);
3457 if (delay_list == 0)
3459 = fill_slots_from_thread (insn, condition, insn_at_target,
3460 next_active_insn (insn), 0, 1,
3461 own_target, own_fallthrough,
3462 slots_to_fill, &slots_filled);
3466 unfilled_slots_base[i]
3467 = emit_delay_sequence (insn, delay_list,
3468 slots_filled, slots_to_fill);
3470 if (slots_to_fill == slots_filled)
3471 unfilled_slots_base[i] = 0;
3473 note_delay_statistics (slots_filled, 1);
3477 /* Once we have tried two ways to fill a delay slot, make a pass over the
3478 code to try to improve the results and to do such things as more jump
3482 relax_delay_slots (first)
3485 register rtx insn, next, pat;
3486 register rtx trial, delay_insn, target_label;
3488 /* Look at every JUMP_INSN and see if we can improve it. */
3489 for (insn = first; insn; insn = next)
3493 next = next_active_insn (insn);
3495 /* If this is a jump insn, see if it now jumps to a jump, jumps to
3496 the next insn, or jumps to a label that is not the last of a
3497 group of consecutive labels. */
3498 if (GET_CODE (insn) == JUMP_INSN
3499 && condjump_p (insn)
3500 && (target_label = JUMP_LABEL (insn)) != 0)
3502 target_label = follow_jumps (target_label);
3503 target_label = prev_label (next_active_insn (target_label));
3505 if (target_label == 0)
3506 target_label = find_end_label ();
3508 if (next_active_insn (target_label) == next)
3514 if (target_label != JUMP_LABEL (insn))
3515 redirect_jump (insn, target_label);
3517 /* See if this jump branches around a unconditional jump.
3518 If so, invert this jump and point it to the target of the
3520 if (next && GET_CODE (next) == JUMP_INSN
3521 && (simplejump_p (next) || GET_CODE (PATTERN (next)) == RETURN)
3522 && next_active_insn (target_label) == next_active_insn (next)
3523 && no_labels_between_p (insn, next))
3525 rtx label = JUMP_LABEL (next);
3527 /* Be careful how we do this to avoid deleting code or
3528 labels that are momentarily dead. See similar optimization
3531 We also need to ensure we properly handle the case when
3532 invert_jump fails. */
3534 ++LABEL_NUSES (target_label);
3536 ++LABEL_NUSES (label);
3538 if (invert_jump (insn, label))
3545 --LABEL_NUSES (label);
3547 if (--LABEL_NUSES (target_label) == 0)
3548 delete_insn (target_label);
3554 /* If this is an unconditional jump and the previous insn is a
3555 conditional jump, try reversing the condition of the previous
3556 insn and swapping our targets. The next pass might be able to
3559 Don't do this if we expect the conditional branch to be true, because
3560 we would then be making the more common case longer. */
3562 if (GET_CODE (insn) == JUMP_INSN
3563 && (simplejump_p (insn) || GET_CODE (PATTERN (insn)) == RETURN)
3564 && (other = prev_active_insn (insn)) != 0
3565 && condjump_p (other)
3566 && no_labels_between_p (other, insn)
3567 && 0 < mostly_true_jump (other,
3568 get_branch_condition (other,
3569 JUMP_LABEL (other))))
3571 rtx other_target = JUMP_LABEL (other);
3572 target_label = JUMP_LABEL (insn);
3574 /* Increment the count of OTHER_TARGET, so it doesn't get deleted
3575 as we move the label. */
3577 ++LABEL_NUSES (other_target);
3579 if (invert_jump (other, target_label))
3580 redirect_jump (insn, other_target);
3583 --LABEL_NUSES (other_target);
3586 /* Now look only at cases where we have filled a delay slot. */
3587 if (GET_CODE (insn) != INSN
3588 || GET_CODE (PATTERN (insn)) != SEQUENCE)
3591 pat = PATTERN (insn);
3592 delay_insn = XVECEXP (pat, 0, 0);
3594 /* See if the first insn in the delay slot is redundant with some
3595 previous insn. Remove it from the delay slot if so; then set up
3596 to reprocess this insn. */
3597 if (redundant_insn_p (XVECEXP (pat, 0, 1), delay_insn, 0))
3599 delete_from_delay_slot (XVECEXP (pat, 0, 1));
3600 next = prev_active_insn (next);
3604 /* Now look only at the cases where we have a filled JUMP_INSN. */
3605 if (GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) != JUMP_INSN
3606 || ! condjump_p (XVECEXP (PATTERN (insn), 0, 0)))
3609 target_label = JUMP_LABEL (delay_insn);
3613 /* If this jump goes to another unconditional jump, thread it, but
3614 don't convert a jump into a RETURN here. */
3615 trial = follow_jumps (target_label);
3616 trial = prev_label (next_active_insn (trial));
3617 if (trial == 0 && target_label != 0)
3618 trial = find_end_label ();
3620 if (trial != target_label)
3622 redirect_jump (delay_insn, trial);
3623 target_label = trial;
3626 /* If the first insn at TARGET_LABEL is redundant with a previous
3627 insn, redirect the jump to the following insn process again. */
3628 trial = next_active_insn (target_label);
3629 if (trial && GET_CODE (PATTERN (trial)) != SEQUENCE
3630 && redundant_insn_p (trial, insn, 0))
3632 trial = next_active_insn (trial);
3634 target_label = find_end_label ();
3636 target_label = get_label_before (trial);
3637 redirect_jump (delay_insn, target_label);
3642 /* Similarly, if it is an unconditional jump with one insn in its
3643 delay list and that insn is redundant, thread the jump. */
3644 if (trial && GET_CODE (PATTERN (trial)) == SEQUENCE
3645 && XVECLEN (PATTERN (trial), 0) == 2
3646 && GET_CODE (XVECEXP (PATTERN (trial), 0, 0)) == JUMP_INSN
3647 && (simplejump_p (XVECEXP (PATTERN (trial), 0, 0))
3648 || GET_CODE (PATTERN (XVECEXP (PATTERN (trial), 0, 0))) == RETURN)
3649 && redundant_insn_p (XVECEXP (PATTERN (trial), 0, 1), insn, 0))
3651 target_label = JUMP_LABEL (XVECEXP (PATTERN (trial), 0, 0));
3652 if (target_label == 0)
3653 target_label = find_end_label ();
3654 redirect_jump (delay_insn, target_label);
3660 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3661 && prev_active_insn (target_label) == insn
3663 /* If the last insn in the delay slot sets CC0 for some insn,
3664 various code assumes that it is in a delay slot. We could
3665 put it back where it belonged and delete the register notes,
3666 but it doesn't seem worthwhile in this uncommon case. */
3667 && ! find_reg_note (XVECEXP (pat, 0, XVECLEN (pat, 0) - 1),
3668 REG_CC_USER, NULL_RTX)
3674 /* All this insn does is execute its delay list and jump to the
3675 following insn. So delete the jump and just execute the delay
3678 We do this by deleting the INSN containing the SEQUENCE, then
3679 re-emitting the insns separately, and then deleting the jump.
3680 This allows the count of the jump target to be properly
3683 /* Clear the from target bit, since these insns are no longer
3685 for (i = 0; i < XVECLEN (pat, 0); i++)
3686 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3688 trial = PREV_INSN (insn);
3690 emit_insn_after (pat, trial);
3691 delete_scheduled_jump (delay_insn);
3695 /* See if this is an unconditional jump around a single insn which is
3696 identical to the one in its delay slot. In this case, we can just
3697 delete the branch and the insn in its delay slot. */
3698 if (next && GET_CODE (next) == INSN
3699 && prev_label (next_active_insn (next)) == target_label
3700 && simplejump_p (insn)
3701 && XVECLEN (pat, 0) == 2
3702 && rtx_equal_p (PATTERN (next), PATTERN (XVECEXP (pat, 0, 1))))
3708 /* See if this jump (with its delay slots) branches around another
3709 jump (without delay slots). If so, invert this jump and point
3710 it to the target of the second jump. We cannot do this for
3711 annulled jumps, though. Again, don't convert a jump to a RETURN
3713 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3714 && next && GET_CODE (next) == JUMP_INSN
3715 && (simplejump_p (next) || GET_CODE (PATTERN (next)) == RETURN)
3716 && next_active_insn (target_label) == next_active_insn (next)
3717 && no_labels_between_p (insn, next))
3719 rtx label = JUMP_LABEL (next);
3720 rtx old_label = JUMP_LABEL (delay_insn);
3723 label = find_end_label ();
3725 /* Be careful how we do this to avoid deleting code or labels
3726 that are momentarily dead. See similar optimization in jump.c */
3728 ++LABEL_NUSES (old_label);
3730 if (invert_jump (delay_insn, label))
3736 if (old_label && --LABEL_NUSES (old_label) == 0)
3737 delete_insn (old_label);
3741 /* If we own the thread opposite the way this insn branches, see if we
3742 can merge its delay slots with following insns. */
3743 if (INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
3744 && own_thread_p (NEXT_INSN (insn), 0, 1))
3745 try_merge_delay_insns (insn, next);
3746 else if (! INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
3747 && own_thread_p (target_label, target_label, 0))
3748 try_merge_delay_insns (insn, next_active_insn (target_label));
3750 /* If we get here, we haven't deleted INSN. But we may have deleted
3751 NEXT, so recompute it. */
3752 next = next_active_insn (insn);
3758 /* Look for filled jumps to the end of function label. We can try to convert
3759 them into RETURN insns if the insns in the delay slot are valid for the
3763 make_return_insns (first)
3766 rtx insn, jump_insn, pat;
3767 rtx real_return_label = end_of_function_label;
3770 /* See if there is a RETURN insn in the function other than the one we
3771 made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change
3772 into a RETURN to jump to it. */
3773 for (insn = first; insn; insn = NEXT_INSN (insn))
3774 if (GET_CODE (insn) == JUMP_INSN && GET_CODE (PATTERN (insn)) == RETURN)
3776 real_return_label = get_label_before (insn);
3780 /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
3781 was equal to END_OF_FUNCTION_LABEL. */
3782 LABEL_NUSES (real_return_label)++;
3784 /* Clear the list of insns to fill so we can use it. */
3785 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3787 for (insn = first; insn; insn = NEXT_INSN (insn))
3791 /* Only look at filled JUMP_INSNs that go to the end of function
3793 if (GET_CODE (insn) != INSN
3794 || GET_CODE (PATTERN (insn)) != SEQUENCE
3795 || GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) != JUMP_INSN
3796 || JUMP_LABEL (XVECEXP (PATTERN (insn), 0, 0)) != end_of_function_label)
3799 pat = PATTERN (insn);
3800 jump_insn = XVECEXP (pat, 0, 0);
3802 /* If we can't make the jump into a RETURN, redirect it to the best
3803 RETURN and go on to the next insn. */
3804 if (! redirect_jump (jump_insn, NULL_RTX))
3806 redirect_jump (jump_insn, real_return_label);
3810 /* See if this RETURN can accept the insns current in its delay slot.
3811 It can if it has more or an equal number of slots and the contents
3812 of each is valid. */
3814 flags = get_jump_flags (jump_insn, JUMP_LABEL (jump_insn));
3815 slots = num_delay_slots (jump_insn);
3816 if (slots >= XVECLEN (pat, 0) - 1)
3818 for (i = 1; i < XVECLEN (pat, 0); i++)
3820 #ifdef ANNUL_IFFALSE_SLOTS
3821 (INSN_ANNULLED_BRANCH_P (jump_insn)
3822 && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
3823 ? eligible_for_annul_false (jump_insn, i - 1,
3824 XVECEXP (pat, 0, i), flags) :
3826 #ifdef ANNUL_IFTRUE_SLOTS
3827 (INSN_ANNULLED_BRANCH_P (jump_insn)
3828 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
3829 ? eligible_for_annul_true (jump_insn, i - 1,
3830 XVECEXP (pat, 0, i), flags) :
3832 eligible_for_delay (jump_insn, i -1, XVECEXP (pat, 0, i), flags)))
3838 if (i == XVECLEN (pat, 0))
3841 /* We have to do something with this insn. If it is an unconditional
3842 RETURN, delete the SEQUENCE and output the individual insns,
3843 followed by the RETURN. Then set things up so we try to find
3844 insns for its delay slots, if it needs some. */
3845 if (GET_CODE (PATTERN (jump_insn)) == RETURN)
3847 rtx prev = PREV_INSN (insn);
3850 for (i = 1; i < XVECLEN (pat, 0); i++)
3851 prev = emit_insn_after (PATTERN (XVECEXP (pat, 0, i)), prev);
3853 insn = emit_jump_insn_after (PATTERN (jump_insn), prev);
3854 emit_barrier_after (insn);
3857 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3860 /* It is probably more efficient to keep this with its current
3861 delay slot as a branch to a RETURN. */
3862 redirect_jump (jump_insn, real_return_label);
3865 /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any
3866 new delay slots we have created. */
3867 if (--LABEL_NUSES (real_return_label) == 0)
3868 delete_insn (real_return_label);
3870 fill_simple_delay_slots (first, 1);
3871 fill_simple_delay_slots (first, 0);
3875 /* Try to find insns to place in delay slots. */
3878 dbr_schedule (first, file)
3882 rtx insn, next, epilogue_insn = 0;
3885 int old_flag_no_peephole = flag_no_peephole;
3887 /* Execute `final' once in prescan mode to delete any insns that won't be
3888 used. Don't let final try to do any peephole optimization--it will
3889 ruin dataflow information for this pass. */
3891 flag_no_peephole = 1;
3892 final (first, 0, NO_DEBUG, 1, 1);
3893 flag_no_peephole = old_flag_no_peephole;
3896 /* If the current function has no insns other than the prologue and
3897 epilogue, then do not try to fill any delay slots. */
3898 if (n_basic_blocks == 0)
3901 /* Find the highest INSN_UID and allocate and initialize our map from
3902 INSN_UID's to position in code. */
3903 for (max_uid = 0, insn = first; insn; insn = NEXT_INSN (insn))
3905 if (INSN_UID (insn) > max_uid)
3906 max_uid = INSN_UID (insn);
3907 if (GET_CODE (insn) == NOTE
3908 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_EPILOGUE_BEG)
3909 epilogue_insn = insn;
3912 uid_to_ruid = (int *) alloca ((max_uid + 1) * sizeof (int *));
3913 for (i = 0, insn = first; insn; i++, insn = NEXT_INSN (insn))
3914 uid_to_ruid[INSN_UID (insn)] = i;
3916 /* Initialize the list of insns that need filling. */
3917 if (unfilled_firstobj == 0)
3919 gcc_obstack_init (&unfilled_slots_obstack);
3920 unfilled_firstobj = (rtx *) obstack_alloc (&unfilled_slots_obstack, 0);
3923 for (insn = next_active_insn (first); insn; insn = next_active_insn (insn))
3927 INSN_ANNULLED_BRANCH_P (insn) = 0;
3928 INSN_FROM_TARGET_P (insn) = 0;
3930 /* Skip vector tables. We can't get attributes for them. */
3931 if (GET_CODE (insn) == JUMP_INSN
3932 && (GET_CODE (PATTERN (insn)) == ADDR_VEC
3933 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC))
3936 if (num_delay_slots (insn) > 0)
3937 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3939 /* Ensure all jumps go to the last of a set of consecutive labels. */
3940 if (GET_CODE (insn) == JUMP_INSN && condjump_p (insn)
3941 && JUMP_LABEL (insn) != 0
3942 && ((target = prev_label (next_active_insn (JUMP_LABEL (insn))))
3943 != JUMP_LABEL (insn)))
3944 redirect_jump (insn, target);
3947 /* Indicate what resources are required to be valid at the end of the current
3948 function. The condition code never is and memory always is. If the
3949 frame pointer is needed, it is and so is the stack pointer unless
3950 EXIT_IGNORE_STACK is non-zero. If the frame pointer is not needed, the
3951 stack pointer is. Registers used to return the function value are
3952 needed. Registers holding global variables are needed. */
3954 end_of_function_needs.cc = 0;
3955 end_of_function_needs.memory = 1;
3956 CLEAR_HARD_REG_SET (end_of_function_needs.regs);
3958 if (frame_pointer_needed)
3960 SET_HARD_REG_BIT (end_of_function_needs.regs, FRAME_POINTER_REGNUM);
3961 #ifdef EXIT_IGNORE_STACK
3962 if (! EXIT_IGNORE_STACK)
3964 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
3967 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
3969 if (current_function_return_rtx != 0
3970 && GET_CODE (current_function_return_rtx) == REG)
3971 mark_referenced_resources (current_function_return_rtx,
3972 &end_of_function_needs, 1);
3974 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
3976 SET_HARD_REG_BIT (end_of_function_needs.regs, i);
3978 /* The registers required to be live at the end of the function are
3979 represented in the flow information as being dead just prior to
3980 reaching the end of the function. For example, the return of a value
3981 might be represented by a USE of the return register immediately
3982 followed by an unconditional jump to the return label where the
3983 return label is the end of the RTL chain. The end of the RTL chain
3984 is then taken to mean that the return register is live.
3986 This sequence is no longer maintained when epilogue instructions are
3987 added to the RTL chain. To reconstruct the original meaning, the
3988 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
3989 point where these registers become live (start_of_epilogue_needs).
3990 If epilogue instructions are present, the registers set by those
3991 instructions won't have been processed by flow. Thus, those
3992 registers are additionally required at the end of the RTL chain
3993 (end_of_function_needs). */
3995 start_of_epilogue_needs = end_of_function_needs;
3997 while (epilogue_insn = next_nonnote_insn (epilogue_insn))
3998 mark_set_resources (epilogue_insn, &end_of_function_needs, 0, 1);
4000 /* Show we haven't computed an end-of-function label yet. */
4001 end_of_function_label = 0;
4003 /* Allocate and initialize the tables used by mark_target_live_regs. */
4005 = (struct target_info **) alloca ((TARGET_HASH_PRIME
4006 * sizeof (struct target_info *)));
4007 bzero (target_hash_table, TARGET_HASH_PRIME * sizeof (struct target_info *));
4009 bb_ticks = (int *) alloca (n_basic_blocks * sizeof (int));
4010 bzero (bb_ticks, n_basic_blocks * sizeof (int));
4012 /* Initialize the statistics for this function. */
4013 bzero (num_insns_needing_delays, sizeof num_insns_needing_delays);
4014 bzero (num_filled_delays, sizeof num_filled_delays);
4016 /* Now do the delay slot filling. Try everything twice in case earlier
4017 changes make more slots fillable. */
4019 for (reorg_pass_number = 0;
4020 reorg_pass_number < MAX_REORG_PASSES;
4021 reorg_pass_number++)
4023 fill_simple_delay_slots (first, 1);
4024 fill_simple_delay_slots (first, 0);
4025 fill_eager_delay_slots (first);
4026 relax_delay_slots (first);
4029 /* Delete any USE insns made by update_block; subsequent passes don't need
4030 them or know how to deal with them. */
4031 for (insn = first; insn; insn = next)
4033 next = NEXT_INSN (insn);
4035 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == USE
4036 && GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn), 0))) == 'i')
4037 next = delete_insn (insn);
4040 /* If we made an end of function label, indicate that it is now
4041 safe to delete it by undoing our prior adjustment to LABEL_NUSES.
4042 If it is now unused, delete it. */
4043 if (end_of_function_label && --LABEL_NUSES (end_of_function_label) == 0)
4044 delete_insn (end_of_function_label);
4047 if (HAVE_return && end_of_function_label != 0)
4048 make_return_insns (first);
4051 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
4053 /* It is not clear why the line below is needed, but it does seem to be. */
4054 unfilled_firstobj = (rtx *) obstack_alloc (&unfilled_slots_obstack, 0);
4056 /* Reposition the prologue and epilogue notes in case we moved the
4057 prologue/epilogue insns. */
4058 reposition_prologue_and_epilogue_notes (first);
4062 register int i, j, need_comma;
4064 for (reorg_pass_number = 0;
4065 reorg_pass_number < MAX_REORG_PASSES;
4066 reorg_pass_number++)
4068 fprintf (file, ";; Reorg pass #%d:\n", reorg_pass_number + 1);
4069 for (i = 0; i < NUM_REORG_FUNCTIONS; i++)
4072 fprintf (file, ";; Reorg function #%d\n", i);
4074 fprintf (file, ";; %d insns needing delay slots\n;; ",
4075 num_insns_needing_delays[i][reorg_pass_number]);
4077 for (j = 0; j < MAX_DELAY_HISTOGRAM; j++)
4078 if (num_filled_delays[i][j][reorg_pass_number])
4081 fprintf (file, ", ");
4083 fprintf (file, "%d got %d delays",
4084 num_filled_delays[i][j][reorg_pass_number], j);
4086 fprintf (file, "\n");
4091 #endif /* DELAY_SLOTS */
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