1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* This file contains subroutines used only from the file reload1.c.
24 It knows how to scan one insn for operands and values
25 that need to be copied into registers to make valid code.
26 It also finds other operands and values which are valid
27 but for which equivalent values in registers exist and
28 ought to be used instead.
30 Before processing the first insn of the function, call `init_reload'.
32 To scan an insn, call `find_reloads'. This does two things:
33 1. sets up tables describing which values must be reloaded
34 for this insn, and what kind of hard regs they must be reloaded into;
35 2. optionally record the locations where those values appear in
36 the data, so they can be replaced properly later.
37 This is done only if the second arg to `find_reloads' is nonzero.
39 The third arg to `find_reloads' specifies the number of levels
40 of indirect addressing supported by the machine. If it is zero,
41 indirect addressing is not valid. If it is one, (MEM (REG n))
42 is valid even if (REG n) did not get a hard register; if it is two,
43 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
44 hard register, and similarly for higher values.
46 Then you must choose the hard regs to reload those pseudo regs into,
47 and generate appropriate load insns before this insn and perhaps
48 also store insns after this insn. Set up the array `reload_reg_rtx'
49 to contain the REG rtx's for the registers you used. In some
50 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
51 for certain reloads. Then that tells you which register to use,
52 so you do not need to allocate one. But you still do need to add extra
53 instructions to copy the value into and out of that register.
55 Finally you must call `subst_reloads' to substitute the reload reg rtx's
56 into the locations already recorded.
60 find_reloads can alter the operands of the instruction it is called on.
62 1. Two operands of any sort may be interchanged, if they are in a
63 commutative instruction.
64 This happens only if find_reloads thinks the instruction will compile
67 2. Pseudo-registers that are equivalent to constants are replaced
68 with those constants if they are not in hard registers.
70 1 happens every time find_reloads is called.
71 2 happens only when REPLACE is 1, which is only when
72 actually doing the reloads, not when just counting them.
75 Using a reload register for several reloads in one insn:
77 When an insn has reloads, it is considered as having three parts:
78 the input reloads, the insn itself after reloading, and the output reloads.
79 Reloads of values used in memory addresses are often needed for only one part.
81 When this is so, reload_when_needed records which part needs the reload.
82 Two reloads for different parts of the insn can share the same reload
85 When a reload is used for addresses in multiple parts, or when it is
86 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
87 a register with any other reload. */
95 #include "insn-config.h"
96 #include "insn-codes.h"
100 #include "hard-reg-set.h"
104 #include "function.h"
108 #ifndef REGISTER_MOVE_COST
109 #define REGISTER_MOVE_COST(x, y) 2
112 #ifndef REGNO_MODE_OK_FOR_BASE_P
113 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
116 #ifndef REG_MODE_OK_FOR_BASE_P
117 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
120 /* All reloads of the current insn are recorded here. See reload.h for
123 struct reload rld[MAX_RELOADS];
125 /* All the "earlyclobber" operands of the current insn
126 are recorded here. */
128 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
130 int reload_n_operands;
132 /* Replacing reloads.
134 If `replace_reloads' is nonzero, then as each reload is recorded
135 an entry is made for it in the table `replacements'.
136 Then later `subst_reloads' can look through that table and
137 perform all the replacements needed. */
139 /* Nonzero means record the places to replace. */
140 static int replace_reloads;
142 /* Each replacement is recorded with a structure like this. */
145 rtx *where; /* Location to store in */
146 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
147 a SUBREG; 0 otherwise. */
148 int what; /* which reload this is for */
149 enum machine_mode mode; /* mode it must have */
152 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
154 /* Number of replacements currently recorded. */
155 static int n_replacements;
157 /* Used to track what is modified by an operand. */
160 int reg_flag; /* Nonzero if referencing a register. */
161 int safe; /* Nonzero if this can't conflict with anything. */
162 rtx base; /* Base address for MEM. */
163 HOST_WIDE_INT start; /* Starting offset or register number. */
164 HOST_WIDE_INT end; /* Ending offset or register number. */
167 #ifdef SECONDARY_MEMORY_NEEDED
169 /* Save MEMs needed to copy from one class of registers to another. One MEM
170 is used per mode, but normally only one or two modes are ever used.
172 We keep two versions, before and after register elimination. The one
173 after register elimination is record separately for each operand. This
174 is done in case the address is not valid to be sure that we separately
177 static rtx secondary_memlocs[NUM_MACHINE_MODES];
178 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
181 /* The instruction we are doing reloads for;
182 so we can test whether a register dies in it. */
183 static rtx this_insn;
185 /* Nonzero if this instruction is a user-specified asm with operands. */
186 static int this_insn_is_asm;
188 /* If hard_regs_live_known is nonzero,
189 we can tell which hard regs are currently live,
190 at least enough to succeed in choosing dummy reloads. */
191 static int hard_regs_live_known;
193 /* Indexed by hard reg number,
194 element is nonnegative if hard reg has been spilled.
195 This vector is passed to `find_reloads' as an argument
196 and is not changed here. */
197 static short *static_reload_reg_p;
199 /* Set to 1 in subst_reg_equivs if it changes anything. */
200 static int subst_reg_equivs_changed;
202 /* On return from push_reload, holds the reload-number for the OUT
203 operand, which can be different for that from the input operand. */
204 static int output_reloadnum;
206 /* Compare two RTX's. */
207 #define MATCHES(x, y) \
208 (x == y || (x != 0 && (GET_CODE (x) == REG \
209 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
210 : rtx_equal_p (x, y) && ! side_effects_p (x))))
212 /* Indicates if two reloads purposes are for similar enough things that we
213 can merge their reloads. */
214 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
215 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
216 || ((when1) == (when2) && (op1) == (op2)) \
217 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
218 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
219 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
220 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
221 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
223 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
224 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
225 ((when1) != (when2) \
226 || ! ((op1) == (op2) \
227 || (when1) == RELOAD_FOR_INPUT \
228 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
229 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
231 /* If we are going to reload an address, compute the reload type to
233 #define ADDR_TYPE(type) \
234 ((type) == RELOAD_FOR_INPUT_ADDRESS \
235 ? RELOAD_FOR_INPADDR_ADDRESS \
236 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
237 ? RELOAD_FOR_OUTADDR_ADDRESS \
240 #ifdef HAVE_SECONDARY_RELOADS
241 static int push_secondary_reload PARAMS ((int, rtx, int, int, enum reg_class,
242 enum machine_mode, enum reload_type,
245 static enum reg_class find_valid_class PARAMS ((enum machine_mode, int));
246 static int push_reload PARAMS ((rtx, rtx, rtx *, rtx *, enum reg_class,
247 enum machine_mode, enum machine_mode,
248 int, int, int, enum reload_type));
249 static void push_replacement PARAMS ((rtx *, int, enum machine_mode));
250 static void combine_reloads PARAMS ((void));
251 static int find_reusable_reload PARAMS ((rtx *, rtx, enum reg_class,
252 enum reload_type, int, int));
253 static rtx find_dummy_reload PARAMS ((rtx, rtx, rtx *, rtx *,
254 enum machine_mode, enum machine_mode,
255 enum reg_class, int, int));
256 static int hard_reg_set_here_p PARAMS ((unsigned int, unsigned int, rtx));
257 static struct decomposition decompose PARAMS ((rtx));
258 static int immune_p PARAMS ((rtx, rtx, struct decomposition));
259 static int alternative_allows_memconst PARAMS ((const char *, int));
260 static rtx find_reloads_toplev PARAMS ((rtx, int, enum reload_type, int,
262 static rtx make_memloc PARAMS ((rtx, int));
263 static int find_reloads_address PARAMS ((enum machine_mode, rtx *, rtx, rtx *,
264 int, enum reload_type, int, rtx));
265 static rtx subst_reg_equivs PARAMS ((rtx, rtx));
266 static rtx subst_indexed_address PARAMS ((rtx));
267 static int find_reloads_address_1 PARAMS ((enum machine_mode, rtx, int, rtx *,
268 int, enum reload_type,int, rtx));
269 static void find_reloads_address_part PARAMS ((rtx, rtx *, enum reg_class,
270 enum machine_mode, int,
271 enum reload_type, int));
272 static rtx find_reloads_subreg_address PARAMS ((rtx, int, int, enum reload_type,
274 static int find_inc_amount PARAMS ((rtx, rtx));
275 extern void debug_reload_to_stream PARAMS ((FILE *));
276 extern void debug_reload PARAMS ((void));
278 #ifdef HAVE_SECONDARY_RELOADS
280 /* Determine if any secondary reloads are needed for loading (if IN_P is
281 non-zero) or storing (if IN_P is zero) X to or from a reload register of
282 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
283 are needed, push them.
285 Return the reload number of the secondary reload we made, or -1 if
286 we didn't need one. *PICODE is set to the insn_code to use if we do
287 need a secondary reload. */
290 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
296 enum reg_class reload_class;
297 enum machine_mode reload_mode;
298 enum reload_type type;
299 enum insn_code *picode;
301 enum reg_class class = NO_REGS;
302 enum machine_mode mode = reload_mode;
303 enum insn_code icode = CODE_FOR_nothing;
304 enum reg_class t_class = NO_REGS;
305 enum machine_mode t_mode = VOIDmode;
306 enum insn_code t_icode = CODE_FOR_nothing;
307 enum reload_type secondary_type;
308 int s_reload, t_reload = -1;
310 if (type == RELOAD_FOR_INPUT_ADDRESS
311 || type == RELOAD_FOR_OUTPUT_ADDRESS
312 || type == RELOAD_FOR_INPADDR_ADDRESS
313 || type == RELOAD_FOR_OUTADDR_ADDRESS)
314 secondary_type = type;
316 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
318 *picode = CODE_FOR_nothing;
320 /* If X is a paradoxical SUBREG, use the inner value to determine both the
321 mode and object being reloaded. */
322 if (GET_CODE (x) == SUBREG
323 && (GET_MODE_SIZE (GET_MODE (x))
324 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
327 reload_mode = GET_MODE (x);
330 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
331 is still a pseudo-register by now, it *must* have an equivalent MEM
332 but we don't want to assume that), use that equivalent when seeing if
333 a secondary reload is needed since whether or not a reload is needed
334 might be sensitive to the form of the MEM. */
336 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
337 && reg_equiv_mem[REGNO (x)] != 0)
338 x = reg_equiv_mem[REGNO (x)];
340 #ifdef SECONDARY_INPUT_RELOAD_CLASS
342 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
345 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
347 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
350 /* If we don't need any secondary registers, done. */
351 if (class == NO_REGS)
354 /* Get a possible insn to use. If the predicate doesn't accept X, don't
357 icode = (in_p ? reload_in_optab[(int) reload_mode]
358 : reload_out_optab[(int) reload_mode]);
360 if (icode != CODE_FOR_nothing
361 && insn_data[(int) icode].operand[in_p].predicate
362 && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode)))
363 icode = CODE_FOR_nothing;
365 /* If we will be using an insn, see if it can directly handle the reload
366 register we will be using. If it can, the secondary reload is for a
367 scratch register. If it can't, we will use the secondary reload for
368 an intermediate register and require a tertiary reload for the scratch
371 if (icode != CODE_FOR_nothing)
373 /* If IN_P is non-zero, the reload register will be the output in
374 operand 0. If IN_P is zero, the reload register will be the input
375 in operand 1. Outputs should have an initial "=", which we must
379 = insn_data[(int) icode].operand[!in_p].constraint[in_p];
380 enum reg_class insn_class
381 = (insn_letter == 'r' ? GENERAL_REGS
382 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter));
384 if (insn_class == NO_REGS
386 && insn_data[(int) icode].operand[!in_p].constraint[0] != '=')
387 /* The scratch register's constraint must start with "=&". */
388 || insn_data[(int) icode].operand[2].constraint[0] != '='
389 || insn_data[(int) icode].operand[2].constraint[1] != '&')
392 if (reg_class_subset_p (reload_class, insn_class))
393 mode = insn_data[(int) icode].operand[2].mode;
396 char t_letter = insn_data[(int) icode].operand[2].constraint[2];
398 t_mode = insn_data[(int) icode].operand[2].mode;
399 t_class = (t_letter == 'r' ? GENERAL_REGS
400 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter));
402 icode = CODE_FOR_nothing;
406 /* This case isn't valid, so fail. Reload is allowed to use the same
407 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
408 in the case of a secondary register, we actually need two different
409 registers for correct code. We fail here to prevent the possibility of
410 silently generating incorrect code later.
412 The convention is that secondary input reloads are valid only if the
413 secondary_class is different from class. If you have such a case, you
414 can not use secondary reloads, you must work around the problem some
417 Allow this when MODE is not reload_mode and assume that the generated
418 code handles this case (it does on the Alpha, which is the only place
419 this currently happens). */
421 if (in_p && class == reload_class && mode == reload_mode)
424 /* If we need a tertiary reload, see if we have one we can reuse or else
427 if (t_class != NO_REGS)
429 for (t_reload = 0; t_reload < n_reloads; t_reload++)
430 if (rld[t_reload].secondary_p
431 && (reg_class_subset_p (t_class, rld[t_reload].class)
432 || reg_class_subset_p (rld[t_reload].class, t_class))
433 && ((in_p && rld[t_reload].inmode == t_mode)
434 || (! in_p && rld[t_reload].outmode == t_mode))
435 && ((in_p && (rld[t_reload].secondary_in_icode
436 == CODE_FOR_nothing))
437 || (! in_p &&(rld[t_reload].secondary_out_icode
438 == CODE_FOR_nothing)))
439 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
440 && MERGABLE_RELOADS (secondary_type,
441 rld[t_reload].when_needed,
442 opnum, rld[t_reload].opnum))
445 rld[t_reload].inmode = t_mode;
447 rld[t_reload].outmode = t_mode;
449 if (reg_class_subset_p (t_class, rld[t_reload].class))
450 rld[t_reload].class = t_class;
452 rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum);
453 rld[t_reload].optional &= optional;
454 rld[t_reload].secondary_p = 1;
455 if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed,
456 opnum, rld[t_reload].opnum))
457 rld[t_reload].when_needed = RELOAD_OTHER;
460 if (t_reload == n_reloads)
462 /* We need to make a new tertiary reload for this register class. */
463 rld[t_reload].in = rld[t_reload].out = 0;
464 rld[t_reload].class = t_class;
465 rld[t_reload].inmode = in_p ? t_mode : VOIDmode;
466 rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode;
467 rld[t_reload].reg_rtx = 0;
468 rld[t_reload].optional = optional;
469 rld[t_reload].inc = 0;
470 /* Maybe we could combine these, but it seems too tricky. */
471 rld[t_reload].nocombine = 1;
472 rld[t_reload].in_reg = 0;
473 rld[t_reload].out_reg = 0;
474 rld[t_reload].opnum = opnum;
475 rld[t_reload].when_needed = secondary_type;
476 rld[t_reload].secondary_in_reload = -1;
477 rld[t_reload].secondary_out_reload = -1;
478 rld[t_reload].secondary_in_icode = CODE_FOR_nothing;
479 rld[t_reload].secondary_out_icode = CODE_FOR_nothing;
480 rld[t_reload].secondary_p = 1;
486 /* See if we can reuse an existing secondary reload. */
487 for (s_reload = 0; s_reload < n_reloads; s_reload++)
488 if (rld[s_reload].secondary_p
489 && (reg_class_subset_p (class, rld[s_reload].class)
490 || reg_class_subset_p (rld[s_reload].class, class))
491 && ((in_p && rld[s_reload].inmode == mode)
492 || (! in_p && rld[s_reload].outmode == mode))
493 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
494 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
495 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
496 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
497 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
498 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
499 opnum, rld[s_reload].opnum))
502 rld[s_reload].inmode = mode;
504 rld[s_reload].outmode = mode;
506 if (reg_class_subset_p (class, rld[s_reload].class))
507 rld[s_reload].class = class;
509 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
510 rld[s_reload].optional &= optional;
511 rld[s_reload].secondary_p = 1;
512 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
513 opnum, rld[s_reload].opnum))
514 rld[s_reload].when_needed = RELOAD_OTHER;
517 if (s_reload == n_reloads)
519 #ifdef SECONDARY_MEMORY_NEEDED
520 /* If we need a memory location to copy between the two reload regs,
521 set it up now. Note that we do the input case before making
522 the reload and the output case after. This is due to the
523 way reloads are output. */
525 if (in_p && icode == CODE_FOR_nothing
526 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
528 get_secondary_mem (x, reload_mode, opnum, type);
530 /* We may have just added new reloads. Make sure we add
531 the new reload at the end. */
532 s_reload = n_reloads;
536 /* We need to make a new secondary reload for this register class. */
537 rld[s_reload].in = rld[s_reload].out = 0;
538 rld[s_reload].class = class;
540 rld[s_reload].inmode = in_p ? mode : VOIDmode;
541 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
542 rld[s_reload].reg_rtx = 0;
543 rld[s_reload].optional = optional;
544 rld[s_reload].inc = 0;
545 /* Maybe we could combine these, but it seems too tricky. */
546 rld[s_reload].nocombine = 1;
547 rld[s_reload].in_reg = 0;
548 rld[s_reload].out_reg = 0;
549 rld[s_reload].opnum = opnum;
550 rld[s_reload].when_needed = secondary_type;
551 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
552 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
553 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
554 rld[s_reload].secondary_out_icode
555 = ! in_p ? t_icode : CODE_FOR_nothing;
556 rld[s_reload].secondary_p = 1;
560 #ifdef SECONDARY_MEMORY_NEEDED
561 if (! in_p && icode == CODE_FOR_nothing
562 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
563 get_secondary_mem (x, mode, opnum, type);
570 #endif /* HAVE_SECONDARY_RELOADS */
572 #ifdef SECONDARY_MEMORY_NEEDED
574 /* Return a memory location that will be used to copy X in mode MODE.
575 If we haven't already made a location for this mode in this insn,
576 call find_reloads_address on the location being returned. */
579 get_secondary_mem (x, mode, opnum, type)
580 rtx x ATTRIBUTE_UNUSED;
581 enum machine_mode mode;
583 enum reload_type type;
588 /* By default, if MODE is narrower than a word, widen it to a word.
589 This is required because most machines that require these memory
590 locations do not support short load and stores from all registers
591 (e.g., FP registers). */
593 #ifdef SECONDARY_MEMORY_NEEDED_MODE
594 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
596 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
597 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
600 /* If we already have made a MEM for this operand in MODE, return it. */
601 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
602 return secondary_memlocs_elim[(int) mode][opnum];
604 /* If this is the first time we've tried to get a MEM for this mode,
605 allocate a new one. `something_changed' in reload will get set
606 by noticing that the frame size has changed. */
608 if (secondary_memlocs[(int) mode] == 0)
610 #ifdef SECONDARY_MEMORY_NEEDED_RTX
611 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
613 secondary_memlocs[(int) mode]
614 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
618 /* Get a version of the address doing any eliminations needed. If that
619 didn't give us a new MEM, make a new one if it isn't valid. */
621 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
622 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
624 if (! mem_valid && loc == secondary_memlocs[(int) mode])
625 loc = copy_rtx (loc);
627 /* The only time the call below will do anything is if the stack
628 offset is too large. In that case IND_LEVELS doesn't matter, so we
629 can just pass a zero. Adjust the type to be the address of the
630 corresponding object. If the address was valid, save the eliminated
631 address. If it wasn't valid, we need to make a reload each time, so
636 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
637 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
640 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
644 secondary_memlocs_elim[(int) mode][opnum] = loc;
648 /* Clear any secondary memory locations we've made. */
651 clear_secondary_mem ()
653 bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);
655 #endif /* SECONDARY_MEMORY_NEEDED */
657 /* Find the largest class for which every register number plus N is valid in
658 M1 (if in range). Abort if no such class exists. */
660 static enum reg_class
661 find_valid_class (m1, n)
662 enum machine_mode m1 ATTRIBUTE_UNUSED;
667 enum reg_class best_class = NO_REGS;
668 unsigned int best_size = 0;
670 for (class = 1; class < N_REG_CLASSES; class++)
673 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
674 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
675 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
676 && ! HARD_REGNO_MODE_OK (regno + n, m1))
679 if (! bad && reg_class_size[class] > best_size)
680 best_class = class, best_size = reg_class_size[class];
689 /* Return the number of a previously made reload that can be combined with
690 a new one, or n_reloads if none of the existing reloads can be used.
691 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
692 push_reload, they determine the kind of the new reload that we try to
693 combine. P_IN points to the corresponding value of IN, which can be
694 modified by this function.
695 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
697 find_reusable_reload (p_in, out, class, type, opnum, dont_share)
699 enum reg_class class;
700 enum reload_type type;
701 int opnum, dont_share;
705 /* We can't merge two reloads if the output of either one is
708 if (earlyclobber_operand_p (out))
711 /* We can use an existing reload if the class is right
712 and at least one of IN and OUT is a match
713 and the other is at worst neutral.
714 (A zero compared against anything is neutral.)
716 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
717 for the same thing since that can cause us to need more reload registers
718 than we otherwise would. */
720 for (i = 0; i < n_reloads; i++)
721 if ((reg_class_subset_p (class, rld[i].class)
722 || reg_class_subset_p (rld[i].class, class))
723 /* If the existing reload has a register, it must fit our class. */
724 && (rld[i].reg_rtx == 0
725 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
726 true_regnum (rld[i].reg_rtx)))
727 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
728 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
729 || (out != 0 && MATCHES (rld[i].out, out)
730 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
731 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
732 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
733 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
736 /* Reloading a plain reg for input can match a reload to postincrement
737 that reg, since the postincrement's value is the right value.
738 Likewise, it can match a preincrement reload, since we regard
739 the preincrementation as happening before any ref in this insn
741 for (i = 0; i < n_reloads; i++)
742 if ((reg_class_subset_p (class, rld[i].class)
743 || reg_class_subset_p (rld[i].class, class))
744 /* If the existing reload has a register, it must fit our
746 && (rld[i].reg_rtx == 0
747 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
748 true_regnum (rld[i].reg_rtx)))
749 && out == 0 && rld[i].out == 0 && rld[i].in != 0
750 && ((GET_CODE (in) == REG
751 && (GET_CODE (rld[i].in) == POST_INC
752 || GET_CODE (rld[i].in) == POST_DEC
753 || GET_CODE (rld[i].in) == PRE_INC
754 || GET_CODE (rld[i].in) == PRE_DEC)
755 && MATCHES (XEXP (rld[i].in, 0), in))
757 (GET_CODE (rld[i].in) == REG
758 && (GET_CODE (in) == POST_INC
759 || GET_CODE (in) == POST_DEC
760 || GET_CODE (in) == PRE_INC
761 || GET_CODE (in) == PRE_DEC)
762 && MATCHES (XEXP (in, 0), rld[i].in)))
763 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
764 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
765 && MERGABLE_RELOADS (type, rld[i].when_needed,
766 opnum, rld[i].opnum))
768 /* Make sure reload_in ultimately has the increment,
769 not the plain register. */
770 if (GET_CODE (in) == REG)
777 /* Record one reload that needs to be performed.
778 IN is an rtx saying where the data are to be found before this instruction.
779 OUT says where they must be stored after the instruction.
780 (IN is zero for data not read, and OUT is zero for data not written.)
781 INLOC and OUTLOC point to the places in the instructions where
782 IN and OUT were found.
783 If IN and OUT are both non-zero, it means the same register must be used
784 to reload both IN and OUT.
786 CLASS is a register class required for the reloaded data.
787 INMODE is the machine mode that the instruction requires
788 for the reg that replaces IN and OUTMODE is likewise for OUT.
790 If IN is zero, then OUT's location and mode should be passed as
793 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
795 OPTIONAL nonzero means this reload does not need to be performed:
796 it can be discarded if that is more convenient.
798 OPNUM and TYPE say what the purpose of this reload is.
800 The return value is the reload-number for this reload.
802 If both IN and OUT are nonzero, in some rare cases we might
803 want to make two separate reloads. (Actually we never do this now.)
804 Therefore, the reload-number for OUT is stored in
805 output_reloadnum when we return; the return value applies to IN.
806 Usually (presently always), when IN and OUT are nonzero,
807 the two reload-numbers are equal, but the caller should be careful to
811 push_reload (in, out, inloc, outloc, class,
812 inmode, outmode, strict_low, optional, opnum, type)
815 enum reg_class class;
816 enum machine_mode inmode, outmode;
820 enum reload_type type;
824 int dont_remove_subreg = 0;
825 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
826 int secondary_in_reload = -1, secondary_out_reload = -1;
827 enum insn_code secondary_in_icode = CODE_FOR_nothing;
828 enum insn_code secondary_out_icode = CODE_FOR_nothing;
830 /* INMODE and/or OUTMODE could be VOIDmode if no mode
831 has been specified for the operand. In that case,
832 use the operand's mode as the mode to reload. */
833 if (inmode == VOIDmode && in != 0)
834 inmode = GET_MODE (in);
835 if (outmode == VOIDmode && out != 0)
836 outmode = GET_MODE (out);
838 /* If IN is a pseudo register everywhere-equivalent to a constant, and
839 it is not in a hard register, reload straight from the constant,
840 since we want to get rid of such pseudo registers.
841 Often this is done earlier, but not always in find_reloads_address. */
842 if (in != 0 && GET_CODE (in) == REG)
844 register int regno = REGNO (in);
846 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
847 && reg_equiv_constant[regno] != 0)
848 in = reg_equiv_constant[regno];
851 /* Likewise for OUT. Of course, OUT will never be equivalent to
852 an actual constant, but it might be equivalent to a memory location
853 (in the case of a parameter). */
854 if (out != 0 && GET_CODE (out) == REG)
856 register int regno = REGNO (out);
858 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
859 && reg_equiv_constant[regno] != 0)
860 out = reg_equiv_constant[regno];
863 /* If we have a read-write operand with an address side-effect,
864 change either IN or OUT so the side-effect happens only once. */
865 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
867 if (GET_CODE (XEXP (in, 0)) == POST_INC
868 || GET_CODE (XEXP (in, 0)) == POST_DEC)
870 rtx new = gen_rtx_MEM (GET_MODE (in), XEXP (XEXP (in, 0), 0));
872 MEM_COPY_ATTRIBUTES (new, in);
875 if (GET_CODE (XEXP (in, 0)) == PRE_INC
876 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
878 rtx new = gen_rtx_MEM (GET_MODE (out), XEXP (XEXP (out, 0), 0));
880 MEM_COPY_ATTRIBUTES (new, out);
885 /* If we are reloading a (SUBREG constant ...), really reload just the
886 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
887 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
888 a pseudo and hence will become a MEM) with M1 wider than M2 and the
889 register is a pseudo, also reload the inside expression.
890 For machines that extend byte loads, do this for any SUBREG of a pseudo
891 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
892 M2 is an integral mode that gets extended when loaded.
893 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
894 either M1 is not valid for R or M2 is wider than a word but we only
895 need one word to store an M2-sized quantity in R.
896 (However, if OUT is nonzero, we need to reload the reg *and*
897 the subreg, so do nothing here, and let following statement handle it.)
899 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
900 we can't handle it here because CONST_INT does not indicate a mode.
902 Similarly, we must reload the inside expression if we have a
903 STRICT_LOW_PART (presumably, in == out in the cas).
905 Also reload the inner expression if it does not require a secondary
906 reload but the SUBREG does.
908 Finally, reload the inner expression if it is a register that is in
909 the class whose registers cannot be referenced in a different size
910 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
911 cannot reload just the inside since we might end up with the wrong
912 register class. But if it is inside a STRICT_LOW_PART, we have
913 no choice, so we hope we do get the right register class there. */
915 if (in != 0 && GET_CODE (in) == SUBREG
916 && (SUBREG_WORD (in) == 0 || strict_low)
917 #ifdef CLASS_CANNOT_CHANGE_MODE
918 && class != CLASS_CANNOT_CHANGE_MODE
920 && (CONSTANT_P (SUBREG_REG (in))
921 || GET_CODE (SUBREG_REG (in)) == PLUS
923 || (((GET_CODE (SUBREG_REG (in)) == REG
924 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
925 || GET_CODE (SUBREG_REG (in)) == MEM)
926 && ((GET_MODE_SIZE (inmode)
927 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
928 #ifdef LOAD_EXTEND_OP
929 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
930 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
932 && (GET_MODE_SIZE (inmode)
933 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
934 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
935 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
937 #ifdef WORD_REGISTER_OPERATIONS
938 || ((GET_MODE_SIZE (inmode)
939 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
940 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
941 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
945 || (GET_CODE (SUBREG_REG (in)) == REG
946 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
947 /* The case where out is nonzero
948 is handled differently in the following statement. */
949 && (out == 0 || SUBREG_WORD (in) == 0)
950 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
951 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
953 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
955 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
956 GET_MODE (SUBREG_REG (in)))))
957 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
960 #ifdef SECONDARY_INPUT_RELOAD_CLASS
961 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
962 && (SECONDARY_INPUT_RELOAD_CLASS (class,
963 GET_MODE (SUBREG_REG (in)),
967 #ifdef CLASS_CANNOT_CHANGE_MODE
968 || (GET_CODE (SUBREG_REG (in)) == REG
969 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
970 && (TEST_HARD_REG_BIT
971 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
972 REGNO (SUBREG_REG (in))))
973 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)),
978 in_subreg_loc = inloc;
979 inloc = &SUBREG_REG (in);
981 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
982 if (GET_CODE (in) == MEM)
983 /* This is supposed to happen only for paradoxical subregs made by
984 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
985 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
988 inmode = GET_MODE (in);
991 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
992 either M1 is not valid for R or M2 is wider than a word but we only
993 need one word to store an M2-sized quantity in R.
995 However, we must reload the inner reg *as well as* the subreg in
998 /* Similar issue for (SUBREG constant ...) if it was not handled by the
999 code above. This can happen if SUBREG_WORD != 0. */
1001 if (in != 0 && GET_CODE (in) == SUBREG
1002 && (CONSTANT_P (SUBREG_REG (in))
1003 || (GET_CODE (SUBREG_REG (in)) == REG
1004 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1005 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in))
1008 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1009 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1011 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1013 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1014 GET_MODE (SUBREG_REG (in)))))))))
1016 /* This relies on the fact that emit_reload_insns outputs the
1017 instructions for input reloads of type RELOAD_OTHER in the same
1018 order as the reloads. Thus if the outer reload is also of type
1019 RELOAD_OTHER, we are guaranteed that this inner reload will be
1020 output before the outer reload. */
1021 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
1022 find_valid_class (inmode, SUBREG_WORD (in)),
1023 VOIDmode, VOIDmode, 0, 0, opnum, type);
1024 dont_remove_subreg = 1;
1027 /* Similarly for paradoxical and problematical SUBREGs on the output.
1028 Note that there is no reason we need worry about the previous value
1029 of SUBREG_REG (out); even if wider than out,
1030 storing in a subreg is entitled to clobber it all
1031 (except in the case of STRICT_LOW_PART,
1032 and in that case the constraint should label it input-output.) */
1033 if (out != 0 && GET_CODE (out) == SUBREG
1034 && (SUBREG_WORD (out) == 0 || strict_low)
1035 #ifdef CLASS_CANNOT_CHANGE_MODE
1036 && class != CLASS_CANNOT_CHANGE_MODE
1038 && (CONSTANT_P (SUBREG_REG (out))
1040 || (((GET_CODE (SUBREG_REG (out)) == REG
1041 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1042 || GET_CODE (SUBREG_REG (out)) == MEM)
1043 && ((GET_MODE_SIZE (outmode)
1044 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1045 #ifdef WORD_REGISTER_OPERATIONS
1046 || ((GET_MODE_SIZE (outmode)
1047 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1048 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1049 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1053 || (GET_CODE (SUBREG_REG (out)) == REG
1054 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1055 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1056 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1058 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1060 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1061 GET_MODE (SUBREG_REG (out)))))
1062 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
1063 + SUBREG_WORD (out)),
1065 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1066 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1067 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1068 GET_MODE (SUBREG_REG (out)),
1072 #ifdef CLASS_CANNOT_CHANGE_MODE
1073 || (GET_CODE (SUBREG_REG (out)) == REG
1074 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1075 && (TEST_HARD_REG_BIT
1076 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
1077 REGNO (SUBREG_REG (out))))
1078 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)),
1083 out_subreg_loc = outloc;
1084 outloc = &SUBREG_REG (out);
1086 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1087 if (GET_CODE (out) == MEM
1088 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1091 outmode = GET_MODE (out);
1094 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1095 either M1 is not valid for R or M2 is wider than a word but we only
1096 need one word to store an M2-sized quantity in R.
1098 However, we must reload the inner reg *as well as* the subreg in
1099 that case. In this case, the inner reg is an in-out reload. */
1101 if (out != 0 && GET_CODE (out) == SUBREG
1102 && GET_CODE (SUBREG_REG (out)) == REG
1103 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1104 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)) + SUBREG_WORD (out),
1106 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1107 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1109 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1111 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1112 GET_MODE (SUBREG_REG (out)))))))
1114 /* This relies on the fact that emit_reload_insns outputs the
1115 instructions for output reloads of type RELOAD_OTHER in reverse
1116 order of the reloads. Thus if the outer reload is also of type
1117 RELOAD_OTHER, we are guaranteed that this inner reload will be
1118 output after the outer reload. */
1119 dont_remove_subreg = 1;
1120 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1122 find_valid_class (outmode, SUBREG_WORD (out)),
1123 VOIDmode, VOIDmode, 0, 0,
1124 opnum, RELOAD_OTHER);
1127 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1128 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1129 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1130 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1133 /* If IN is a SUBREG of a hard register, make a new REG. This
1134 simplifies some of the cases below. */
1136 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1137 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1138 && ! dont_remove_subreg)
1139 in = gen_rtx_REG (GET_MODE (in),
1140 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
1142 /* Similarly for OUT. */
1143 if (out != 0 && GET_CODE (out) == SUBREG
1144 && GET_CODE (SUBREG_REG (out)) == REG
1145 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1146 && ! dont_remove_subreg)
1147 out = gen_rtx_REG (GET_MODE (out),
1148 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
1150 /* Narrow down the class of register wanted if that is
1151 desirable on this machine for efficiency. */
1153 class = PREFERRED_RELOAD_CLASS (in, class);
1155 /* Output reloads may need analogous treatment, different in detail. */
1156 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1158 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1161 /* Make sure we use a class that can handle the actual pseudo
1162 inside any subreg. For example, on the 386, QImode regs
1163 can appear within SImode subregs. Although GENERAL_REGS
1164 can handle SImode, QImode needs a smaller class. */
1165 #ifdef LIMIT_RELOAD_CLASS
1167 class = LIMIT_RELOAD_CLASS (inmode, class);
1168 else if (in != 0 && GET_CODE (in) == SUBREG)
1169 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1172 class = LIMIT_RELOAD_CLASS (outmode, class);
1173 if (out != 0 && GET_CODE (out) == SUBREG)
1174 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1177 /* Verify that this class is at least possible for the mode that
1179 if (this_insn_is_asm)
1181 enum machine_mode mode;
1182 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1186 if (mode == VOIDmode)
1188 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1193 outmode = word_mode;
1195 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1196 if (HARD_REGNO_MODE_OK (i, mode)
1197 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1199 int nregs = HARD_REGNO_NREGS (i, mode);
1202 for (j = 1; j < nregs; j++)
1203 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1208 if (i == FIRST_PSEUDO_REGISTER)
1210 error_for_asm (this_insn, "impossible register constraint in `asm'");
1215 /* Optional output reloads are always OK even if we have no register class,
1216 since the function of these reloads is only to have spill_reg_store etc.
1217 set, so that the storing insn can be deleted later. */
1218 if (class == NO_REGS
1219 && (optional == 0 || type != RELOAD_FOR_OUTPUT))
1222 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1226 /* See if we need a secondary reload register to move between CLASS
1227 and IN or CLASS and OUT. Get the icode and push any required reloads
1228 needed for each of them if so. */
1230 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1233 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1234 &secondary_in_icode);
1237 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1238 if (out != 0 && GET_CODE (out) != SCRATCH)
1239 secondary_out_reload
1240 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1241 type, &secondary_out_icode);
1244 /* We found no existing reload suitable for re-use.
1245 So add an additional reload. */
1247 #ifdef SECONDARY_MEMORY_NEEDED
1248 /* If a memory location is needed for the copy, make one. */
1249 if (in != 0 && GET_CODE (in) == REG
1250 && REGNO (in) < FIRST_PSEUDO_REGISTER
1251 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1253 get_secondary_mem (in, inmode, opnum, type);
1259 rld[i].class = class;
1260 rld[i].inmode = inmode;
1261 rld[i].outmode = outmode;
1263 rld[i].optional = optional;
1265 rld[i].nocombine = 0;
1266 rld[i].in_reg = inloc ? *inloc : 0;
1267 rld[i].out_reg = outloc ? *outloc : 0;
1268 rld[i].opnum = opnum;
1269 rld[i].when_needed = type;
1270 rld[i].secondary_in_reload = secondary_in_reload;
1271 rld[i].secondary_out_reload = secondary_out_reload;
1272 rld[i].secondary_in_icode = secondary_in_icode;
1273 rld[i].secondary_out_icode = secondary_out_icode;
1274 rld[i].secondary_p = 0;
1278 #ifdef SECONDARY_MEMORY_NEEDED
1279 if (out != 0 && GET_CODE (out) == REG
1280 && REGNO (out) < FIRST_PSEUDO_REGISTER
1281 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1283 get_secondary_mem (out, outmode, opnum, type);
1288 /* We are reusing an existing reload,
1289 but we may have additional information for it.
1290 For example, we may now have both IN and OUT
1291 while the old one may have just one of them. */
1293 /* The modes can be different. If they are, we want to reload in
1294 the larger mode, so that the value is valid for both modes. */
1295 if (inmode != VOIDmode
1296 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1297 rld[i].inmode = inmode;
1298 if (outmode != VOIDmode
1299 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1300 rld[i].outmode = outmode;
1303 rtx in_reg = inloc ? *inloc : 0;
1304 /* If we merge reloads for two distinct rtl expressions that
1305 are identical in content, there might be duplicate address
1306 reloads. Remove the extra set now, so that if we later find
1307 that we can inherit this reload, we can get rid of the
1308 address reloads altogether.
1310 Do not do this if both reloads are optional since the result
1311 would be an optional reload which could potentially leave
1312 unresolved address replacements.
1314 It is not sufficient to call transfer_replacements since
1315 choose_reload_regs will remove the replacements for address
1316 reloads of inherited reloads which results in the same
1318 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1319 && ! (rld[i].optional && optional))
1321 /* We must keep the address reload with the lower operand
1323 if (opnum > rld[i].opnum)
1325 remove_address_replacements (in);
1327 in_reg = rld[i].in_reg;
1330 remove_address_replacements (rld[i].in);
1333 rld[i].in_reg = in_reg;
1338 rld[i].out_reg = outloc ? *outloc : 0;
1340 if (reg_class_subset_p (class, rld[i].class))
1341 rld[i].class = class;
1342 rld[i].optional &= optional;
1343 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1344 opnum, rld[i].opnum))
1345 rld[i].when_needed = RELOAD_OTHER;
1346 rld[i].opnum = MIN (rld[i].opnum, opnum);
1349 /* If the ostensible rtx being reload differs from the rtx found
1350 in the location to substitute, this reload is not safe to combine
1351 because we cannot reliably tell whether it appears in the insn. */
1353 if (in != 0 && in != *inloc)
1354 rld[i].nocombine = 1;
1357 /* This was replaced by changes in find_reloads_address_1 and the new
1358 function inc_for_reload, which go with a new meaning of reload_inc. */
1360 /* If this is an IN/OUT reload in an insn that sets the CC,
1361 it must be for an autoincrement. It doesn't work to store
1362 the incremented value after the insn because that would clobber the CC.
1363 So we must do the increment of the value reloaded from,
1364 increment it, store it back, then decrement again. */
1365 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1369 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1370 /* If we did not find a nonzero amount-to-increment-by,
1371 that contradicts the belief that IN is being incremented
1372 in an address in this insn. */
1373 if (rld[i].inc == 0)
1378 /* If we will replace IN and OUT with the reload-reg,
1379 record where they are located so that substitution need
1380 not do a tree walk. */
1382 if (replace_reloads)
1386 register struct replacement *r = &replacements[n_replacements++];
1388 r->subreg_loc = in_subreg_loc;
1392 if (outloc != 0 && outloc != inloc)
1394 register struct replacement *r = &replacements[n_replacements++];
1397 r->subreg_loc = out_subreg_loc;
1402 /* If this reload is just being introduced and it has both
1403 an incoming quantity and an outgoing quantity that are
1404 supposed to be made to match, see if either one of the two
1405 can serve as the place to reload into.
1407 If one of them is acceptable, set rld[i].reg_rtx
1410 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1412 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1415 earlyclobber_operand_p (out));
1417 /* If the outgoing register already contains the same value
1418 as the incoming one, we can dispense with loading it.
1419 The easiest way to tell the caller that is to give a phony
1420 value for the incoming operand (same as outgoing one). */
1421 if (rld[i].reg_rtx == out
1422 && (GET_CODE (in) == REG || CONSTANT_P (in))
1423 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1424 static_reload_reg_p, i, inmode))
1428 /* If this is an input reload and the operand contains a register that
1429 dies in this insn and is used nowhere else, see if it is the right class
1430 to be used for this reload. Use it if so. (This occurs most commonly
1431 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1432 this if it is also an output reload that mentions the register unless
1433 the output is a SUBREG that clobbers an entire register.
1435 Note that the operand might be one of the spill regs, if it is a
1436 pseudo reg and we are in a block where spilling has not taken place.
1437 But if there is no spilling in this block, that is OK.
1438 An explicitly used hard reg cannot be a spill reg. */
1440 if (rld[i].reg_rtx == 0 && in != 0)
1445 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1446 if (REG_NOTE_KIND (note) == REG_DEAD
1447 && GET_CODE (XEXP (note, 0)) == REG
1448 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1449 && reg_mentioned_p (XEXP (note, 0), in)
1450 && ! refers_to_regno_for_reload_p (regno,
1452 + HARD_REGNO_NREGS (regno,
1454 PATTERN (this_insn), inloc)
1455 /* If this is also an output reload, IN cannot be used as
1456 the reload register if it is set in this insn unless IN
1458 && (out == 0 || in == out
1459 || ! hard_reg_set_here_p (regno,
1461 + HARD_REGNO_NREGS (regno,
1463 PATTERN (this_insn)))
1464 /* ??? Why is this code so different from the previous?
1465 Is there any simple coherent way to describe the two together?
1466 What's going on here. */
1468 || (GET_CODE (in) == SUBREG
1469 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1471 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1472 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1473 /* Make sure the operand fits in the reg that dies. */
1474 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1475 && HARD_REGNO_MODE_OK (regno, inmode)
1476 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1477 && HARD_REGNO_MODE_OK (regno, outmode))
1480 unsigned int nregs = MAX (HARD_REGNO_NREGS (regno, inmode),
1481 HARD_REGNO_NREGS (regno, outmode));
1483 for (offs = 0; offs < nregs; offs++)
1484 if (fixed_regs[regno + offs]
1485 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1491 rld[i].reg_rtx = gen_rtx_REG (inmode, regno);
1498 output_reloadnum = i;
1503 /* Record an additional place we must replace a value
1504 for which we have already recorded a reload.
1505 RELOADNUM is the value returned by push_reload
1506 when the reload was recorded.
1507 This is used in insn patterns that use match_dup. */
1510 push_replacement (loc, reloadnum, mode)
1513 enum machine_mode mode;
1515 if (replace_reloads)
1517 register struct replacement *r = &replacements[n_replacements++];
1518 r->what = reloadnum;
1525 /* Transfer all replacements that used to be in reload FROM to be in
1529 transfer_replacements (to, from)
1534 for (i = 0; i < n_replacements; i++)
1535 if (replacements[i].what == from)
1536 replacements[i].what = to;
1539 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1540 or a subpart of it. If we have any replacements registered for IN_RTX,
1541 cancel the reloads that were supposed to load them.
1542 Return non-zero if we canceled any reloads. */
1544 remove_address_replacements (in_rtx)
1548 char reload_flags[MAX_RELOADS];
1549 int something_changed = 0;
1551 bzero (reload_flags, sizeof reload_flags);
1552 for (i = 0, j = 0; i < n_replacements; i++)
1554 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1555 reload_flags[replacements[i].what] |= 1;
1558 replacements[j++] = replacements[i];
1559 reload_flags[replacements[i].what] |= 2;
1562 /* Note that the following store must be done before the recursive calls. */
1565 for (i = n_reloads - 1; i >= 0; i--)
1567 if (reload_flags[i] == 1)
1569 deallocate_reload_reg (i);
1570 remove_address_replacements (rld[i].in);
1572 something_changed = 1;
1575 return something_changed;
1578 /* If there is only one output reload, and it is not for an earlyclobber
1579 operand, try to combine it with a (logically unrelated) input reload
1580 to reduce the number of reload registers needed.
1582 This is safe if the input reload does not appear in
1583 the value being output-reloaded, because this implies
1584 it is not needed any more once the original insn completes.
1586 If that doesn't work, see we can use any of the registers that
1587 die in this insn as a reload register. We can if it is of the right
1588 class and does not appear in the value being output-reloaded. */
1594 int output_reload = -1;
1595 int secondary_out = -1;
1598 /* Find the output reload; return unless there is exactly one
1599 and that one is mandatory. */
1601 for (i = 0; i < n_reloads; i++)
1602 if (rld[i].out != 0)
1604 if (output_reload >= 0)
1609 if (output_reload < 0 || rld[output_reload].optional)
1612 /* An input-output reload isn't combinable. */
1614 if (rld[output_reload].in != 0)
1617 /* If this reload is for an earlyclobber operand, we can't do anything. */
1618 if (earlyclobber_operand_p (rld[output_reload].out))
1621 /* Check each input reload; can we combine it? */
1623 for (i = 0; i < n_reloads; i++)
1624 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1625 /* Life span of this reload must not extend past main insn. */
1626 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1627 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1628 && rld[i].when_needed != RELOAD_OTHER
1629 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1630 == CLASS_MAX_NREGS (rld[output_reload].class,
1631 rld[output_reload].outmode))
1633 && rld[i].reg_rtx == 0
1634 #ifdef SECONDARY_MEMORY_NEEDED
1635 /* Don't combine two reloads with different secondary
1636 memory locations. */
1637 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1638 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1639 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1640 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1642 && (SMALL_REGISTER_CLASSES
1643 ? (rld[i].class == rld[output_reload].class)
1644 : (reg_class_subset_p (rld[i].class,
1645 rld[output_reload].class)
1646 || reg_class_subset_p (rld[output_reload].class,
1648 && (MATCHES (rld[i].in, rld[output_reload].out)
1649 /* Args reversed because the first arg seems to be
1650 the one that we imagine being modified
1651 while the second is the one that might be affected. */
1652 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1654 /* However, if the input is a register that appears inside
1655 the output, then we also can't share.
1656 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1657 If the same reload reg is used for both reg 69 and the
1658 result to be stored in memory, then that result
1659 will clobber the address of the memory ref. */
1660 && ! (GET_CODE (rld[i].in) == REG
1661 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1662 rld[output_reload].out))))
1663 && (reg_class_size[(int) rld[i].class]
1664 || SMALL_REGISTER_CLASSES)
1665 /* We will allow making things slightly worse by combining an
1666 input and an output, but no worse than that. */
1667 && (rld[i].when_needed == RELOAD_FOR_INPUT
1668 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1672 /* We have found a reload to combine with! */
1673 rld[i].out = rld[output_reload].out;
1674 rld[i].out_reg = rld[output_reload].out_reg;
1675 rld[i].outmode = rld[output_reload].outmode;
1676 /* Mark the old output reload as inoperative. */
1677 rld[output_reload].out = 0;
1678 /* The combined reload is needed for the entire insn. */
1679 rld[i].when_needed = RELOAD_OTHER;
1680 /* If the output reload had a secondary reload, copy it. */
1681 if (rld[output_reload].secondary_out_reload != -1)
1683 rld[i].secondary_out_reload
1684 = rld[output_reload].secondary_out_reload;
1685 rld[i].secondary_out_icode
1686 = rld[output_reload].secondary_out_icode;
1689 #ifdef SECONDARY_MEMORY_NEEDED
1690 /* Copy any secondary MEM. */
1691 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1692 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1693 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1695 /* If required, minimize the register class. */
1696 if (reg_class_subset_p (rld[output_reload].class,
1698 rld[i].class = rld[output_reload].class;
1700 /* Transfer all replacements from the old reload to the combined. */
1701 for (j = 0; j < n_replacements; j++)
1702 if (replacements[j].what == output_reload)
1703 replacements[j].what = i;
1708 /* If this insn has only one operand that is modified or written (assumed
1709 to be the first), it must be the one corresponding to this reload. It
1710 is safe to use anything that dies in this insn for that output provided
1711 that it does not occur in the output (we already know it isn't an
1712 earlyclobber. If this is an asm insn, give up. */
1714 if (INSN_CODE (this_insn) == -1)
1717 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1718 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1719 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1722 /* See if some hard register that dies in this insn and is not used in
1723 the output is the right class. Only works if the register we pick
1724 up can fully hold our output reload. */
1725 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1726 if (REG_NOTE_KIND (note) == REG_DEAD
1727 && GET_CODE (XEXP (note, 0)) == REG
1728 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1729 rld[output_reload].out)
1730 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1731 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1732 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1733 REGNO (XEXP (note, 0)))
1734 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1735 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1736 /* Ensure that a secondary or tertiary reload for this output
1737 won't want this register. */
1738 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1739 || (! (TEST_HARD_REG_BIT
1740 (reg_class_contents[(int) rld[secondary_out].class],
1741 REGNO (XEXP (note, 0))))
1742 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1743 || ! (TEST_HARD_REG_BIT
1744 (reg_class_contents[(int) rld[secondary_out].class],
1745 REGNO (XEXP (note, 0)))))))
1746 && ! fixed_regs[REGNO (XEXP (note, 0))])
1748 rld[output_reload].reg_rtx
1749 = gen_rtx_REG (rld[output_reload].outmode,
1750 REGNO (XEXP (note, 0)));
1755 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1756 See if one of IN and OUT is a register that may be used;
1757 this is desirable since a spill-register won't be needed.
1758 If so, return the register rtx that proves acceptable.
1760 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1761 CLASS is the register class required for the reload.
1763 If FOR_REAL is >= 0, it is the number of the reload,
1764 and in some cases when it can be discovered that OUT doesn't need
1765 to be computed, clear out rld[FOR_REAL].out.
1767 If FOR_REAL is -1, this should not be done, because this call
1768 is just to see if a register can be found, not to find and install it.
1770 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1771 puts an additional constraint on being able to use IN for OUT since
1772 IN must not appear elsewhere in the insn (it is assumed that IN itself
1773 is safe from the earlyclobber). */
1776 find_dummy_reload (real_in, real_out, inloc, outloc,
1777 inmode, outmode, class, for_real, earlyclobber)
1778 rtx real_in, real_out;
1779 rtx *inloc, *outloc;
1780 enum machine_mode inmode, outmode;
1781 enum reg_class class;
1791 /* If operands exceed a word, we can't use either of them
1792 unless they have the same size. */
1793 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1794 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1795 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1798 /* Find the inside of any subregs. */
1799 while (GET_CODE (out) == SUBREG)
1801 out_offset = SUBREG_WORD (out);
1802 out = SUBREG_REG (out);
1804 while (GET_CODE (in) == SUBREG)
1806 in_offset = SUBREG_WORD (in);
1807 in = SUBREG_REG (in);
1810 /* Narrow down the reg class, the same way push_reload will;
1811 otherwise we might find a dummy now, but push_reload won't. */
1812 class = PREFERRED_RELOAD_CLASS (in, class);
1814 /* See if OUT will do. */
1815 if (GET_CODE (out) == REG
1816 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1818 unsigned int regno = REGNO (out) + out_offset;
1819 unsigned int nwords = HARD_REGNO_NREGS (regno, outmode);
1822 /* When we consider whether the insn uses OUT,
1823 ignore references within IN. They don't prevent us
1824 from copying IN into OUT, because those refs would
1825 move into the insn that reloads IN.
1827 However, we only ignore IN in its role as this reload.
1828 If the insn uses IN elsewhere and it contains OUT,
1829 that counts. We can't be sure it's the "same" operand
1830 so it might not go through this reload. */
1832 *inloc = const0_rtx;
1834 if (regno < FIRST_PSEUDO_REGISTER
1835 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1836 PATTERN (this_insn), outloc))
1840 for (i = 0; i < nwords; i++)
1841 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1847 if (GET_CODE (real_out) == REG)
1850 value = gen_rtx_REG (outmode, regno);
1857 /* Consider using IN if OUT was not acceptable
1858 or if OUT dies in this insn (like the quotient in a divmod insn).
1859 We can't use IN unless it is dies in this insn,
1860 which means we must know accurately which hard regs are live.
1861 Also, the result can't go in IN if IN is used within OUT,
1862 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1863 if (hard_regs_live_known
1864 && GET_CODE (in) == REG
1865 && REGNO (in) < FIRST_PSEUDO_REGISTER
1867 || find_reg_note (this_insn, REG_UNUSED, real_out))
1868 && find_reg_note (this_insn, REG_DEAD, real_in)
1869 && !fixed_regs[REGNO (in)]
1870 && HARD_REGNO_MODE_OK (REGNO (in),
1871 /* The only case where out and real_out might
1872 have different modes is where real_out
1873 is a subreg, and in that case, out
1875 (GET_MODE (out) != VOIDmode
1876 ? GET_MODE (out) : outmode)))
1878 unsigned int regno = REGNO (in) + in_offset;
1879 unsigned int nwords = HARD_REGNO_NREGS (regno, inmode);
1881 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1882 && ! hard_reg_set_here_p (regno, regno + nwords,
1883 PATTERN (this_insn))
1885 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1886 PATTERN (this_insn), inloc)))
1890 for (i = 0; i < nwords; i++)
1891 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1897 /* If we were going to use OUT as the reload reg
1898 and changed our mind, it means OUT is a dummy that
1899 dies here. So don't bother copying value to it. */
1900 if (for_real >= 0 && value == real_out)
1901 rld[for_real].out = 0;
1902 if (GET_CODE (real_in) == REG)
1905 value = gen_rtx_REG (inmode, regno);
1913 /* This page contains subroutines used mainly for determining
1914 whether the IN or an OUT of a reload can serve as the
1917 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1920 earlyclobber_operand_p (x)
1925 for (i = 0; i < n_earlyclobbers; i++)
1926 if (reload_earlyclobbers[i] == x)
1932 /* Return 1 if expression X alters a hard reg in the range
1933 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1934 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1935 X should be the body of an instruction. */
1938 hard_reg_set_here_p (beg_regno, end_regno, x)
1939 unsigned int beg_regno, end_regno;
1942 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1944 register rtx op0 = SET_DEST (x);
1946 while (GET_CODE (op0) == SUBREG)
1947 op0 = SUBREG_REG (op0);
1948 if (GET_CODE (op0) == REG)
1950 unsigned int r = REGNO (op0);
1952 /* See if this reg overlaps range under consideration. */
1954 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1958 else if (GET_CODE (x) == PARALLEL)
1960 register int i = XVECLEN (x, 0) - 1;
1963 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1970 /* Return 1 if ADDR is a valid memory address for mode MODE,
1971 and check that each pseudo reg has the proper kind of
1975 strict_memory_address_p (mode, addr)
1976 enum machine_mode mode ATTRIBUTE_UNUSED;
1979 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
1986 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1987 if they are the same hard reg, and has special hacks for
1988 autoincrement and autodecrement.
1989 This is specifically intended for find_reloads to use
1990 in determining whether two operands match.
1991 X is the operand whose number is the lower of the two.
1993 The value is 2 if Y contains a pre-increment that matches
1994 a non-incrementing address in X. */
1996 /* ??? To be completely correct, we should arrange to pass
1997 for X the output operand and for Y the input operand.
1998 For now, we assume that the output operand has the lower number
1999 because that is natural in (SET output (... input ...)). */
2002 operands_match_p (x, y)
2006 register RTX_CODE code = GET_CODE (x);
2007 register const char *fmt;
2012 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2013 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2014 && GET_CODE (SUBREG_REG (y)) == REG)))
2020 i = REGNO (SUBREG_REG (x));
2021 if (i >= FIRST_PSEUDO_REGISTER)
2023 i += SUBREG_WORD (x);
2028 if (GET_CODE (y) == SUBREG)
2030 j = REGNO (SUBREG_REG (y));
2031 if (j >= FIRST_PSEUDO_REGISTER)
2033 j += SUBREG_WORD (y);
2038 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2039 multiple hard register group, so that for example (reg:DI 0) and
2040 (reg:SI 1) will be considered the same register. */
2041 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2042 && i < FIRST_PSEUDO_REGISTER)
2043 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
2044 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2045 && j < FIRST_PSEUDO_REGISTER)
2046 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
2050 /* If two operands must match, because they are really a single
2051 operand of an assembler insn, then two postincrements are invalid
2052 because the assembler insn would increment only once.
2053 On the other hand, an postincrement matches ordinary indexing
2054 if the postincrement is the output operand. */
2055 if (code == POST_DEC || code == POST_INC)
2056 return operands_match_p (XEXP (x, 0), y);
2057 /* Two preincrements are invalid
2058 because the assembler insn would increment only once.
2059 On the other hand, an preincrement matches ordinary indexing
2060 if the preincrement is the input operand.
2061 In this case, return 2, since some callers need to do special
2062 things when this happens. */
2063 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
2064 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2068 /* Now we have disposed of all the cases
2069 in which different rtx codes can match. */
2070 if (code != GET_CODE (y))
2072 if (code == LABEL_REF)
2073 return XEXP (x, 0) == XEXP (y, 0);
2074 if (code == SYMBOL_REF)
2075 return XSTR (x, 0) == XSTR (y, 0);
2077 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2079 if (GET_MODE (x) != GET_MODE (y))
2082 /* Compare the elements. If any pair of corresponding elements
2083 fail to match, return 0 for the whole things. */
2086 fmt = GET_RTX_FORMAT (code);
2087 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2093 if (XWINT (x, i) != XWINT (y, i))
2098 if (XINT (x, i) != XINT (y, i))
2103 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2106 /* If any subexpression returns 2,
2107 we should return 2 if we are successful. */
2116 if (XVECLEN (x, i) != XVECLEN (y, i))
2118 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2120 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2128 /* It is believed that rtx's at this level will never
2129 contain anything but integers and other rtx's,
2130 except for within LABEL_REFs and SYMBOL_REFs. */
2135 return 1 + success_2;
2138 /* Describe the range of registers or memory referenced by X.
2139 If X is a register, set REG_FLAG and put the first register
2140 number into START and the last plus one into END.
2141 If X is a memory reference, put a base address into BASE
2142 and a range of integer offsets into START and END.
2143 If X is pushing on the stack, we can assume it causes no trouble,
2144 so we set the SAFE field. */
2146 static struct decomposition
2150 struct decomposition val;
2156 if (GET_CODE (x) == MEM)
2158 rtx base = NULL_RTX, offset = 0;
2159 rtx addr = XEXP (x, 0);
2161 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2162 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2164 val.base = XEXP (addr, 0);
2165 val.start = - GET_MODE_SIZE (GET_MODE (x));
2166 val.end = GET_MODE_SIZE (GET_MODE (x));
2167 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2171 if (GET_CODE (addr) == CONST)
2173 addr = XEXP (addr, 0);
2176 if (GET_CODE (addr) == PLUS)
2178 if (CONSTANT_P (XEXP (addr, 0)))
2180 base = XEXP (addr, 1);
2181 offset = XEXP (addr, 0);
2183 else if (CONSTANT_P (XEXP (addr, 1)))
2185 base = XEXP (addr, 0);
2186 offset = XEXP (addr, 1);
2193 offset = const0_rtx;
2195 if (GET_CODE (offset) == CONST)
2196 offset = XEXP (offset, 0);
2197 if (GET_CODE (offset) == PLUS)
2199 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2201 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2202 offset = XEXP (offset, 0);
2204 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2206 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2207 offset = XEXP (offset, 1);
2211 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2212 offset = const0_rtx;
2215 else if (GET_CODE (offset) != CONST_INT)
2217 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2218 offset = const0_rtx;
2221 if (all_const && GET_CODE (base) == PLUS)
2222 base = gen_rtx_CONST (GET_MODE (base), base);
2224 if (GET_CODE (offset) != CONST_INT)
2227 val.start = INTVAL (offset);
2228 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2232 else if (GET_CODE (x) == REG)
2235 val.start = true_regnum (x);
2238 /* A pseudo with no hard reg. */
2239 val.start = REGNO (x);
2240 val.end = val.start + 1;
2244 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2246 else if (GET_CODE (x) == SUBREG)
2248 if (GET_CODE (SUBREG_REG (x)) != REG)
2249 /* This could be more precise, but it's good enough. */
2250 return decompose (SUBREG_REG (x));
2252 val.start = true_regnum (x);
2254 return decompose (SUBREG_REG (x));
2257 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2259 else if (CONSTANT_P (x)
2260 /* This hasn't been assigned yet, so it can't conflict yet. */
2261 || GET_CODE (x) == SCRATCH)
2268 /* Return 1 if altering Y will not modify the value of X.
2269 Y is also described by YDATA, which should be decompose (Y). */
2272 immune_p (x, y, ydata)
2274 struct decomposition ydata;
2276 struct decomposition xdata;
2279 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2283 if (GET_CODE (y) != MEM)
2285 /* If Y is memory and X is not, Y can't affect X. */
2286 if (GET_CODE (x) != MEM)
2289 xdata = decompose (x);
2291 if (! rtx_equal_p (xdata.base, ydata.base))
2293 /* If bases are distinct symbolic constants, there is no overlap. */
2294 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2296 /* Constants and stack slots never overlap. */
2297 if (CONSTANT_P (xdata.base)
2298 && (ydata.base == frame_pointer_rtx
2299 || ydata.base == hard_frame_pointer_rtx
2300 || ydata.base == stack_pointer_rtx))
2302 if (CONSTANT_P (ydata.base)
2303 && (xdata.base == frame_pointer_rtx
2304 || xdata.base == hard_frame_pointer_rtx
2305 || xdata.base == stack_pointer_rtx))
2307 /* If either base is variable, we don't know anything. */
2312 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2315 /* Similar, but calls decompose. */
2318 safe_from_earlyclobber (op, clobber)
2321 struct decomposition early_data;
2323 early_data = decompose (clobber);
2324 return immune_p (op, clobber, early_data);
2327 /* Main entry point of this file: search the body of INSN
2328 for values that need reloading and record them with push_reload.
2329 REPLACE nonzero means record also where the values occur
2330 so that subst_reloads can be used.
2332 IND_LEVELS says how many levels of indirection are supported by this
2333 machine; a value of zero means that a memory reference is not a valid
2336 LIVE_KNOWN says we have valid information about which hard
2337 regs are live at each point in the program; this is true when
2338 we are called from global_alloc but false when stupid register
2339 allocation has been done.
2341 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2342 which is nonnegative if the reg has been commandeered for reloading into.
2343 It is copied into STATIC_RELOAD_REG_P and referenced from there
2344 by various subroutines.
2346 Return TRUE if some operands need to be changed, because of swapping
2347 commutative operands, reg_equiv_address substitution, or whatever. */
2350 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2352 int replace, ind_levels;
2354 short *reload_reg_p;
2356 register int insn_code_number;
2359 /* These start out as the constraints for the insn
2360 and they are chewed up as we consider alternatives. */
2361 char *constraints[MAX_RECOG_OPERANDS];
2362 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2364 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2365 char pref_or_nothing[MAX_RECOG_OPERANDS];
2366 /* Nonzero for a MEM operand whose entire address needs a reload. */
2367 int address_reloaded[MAX_RECOG_OPERANDS];
2368 /* Value of enum reload_type to use for operand. */
2369 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2370 /* Value of enum reload_type to use within address of operand. */
2371 enum reload_type address_type[MAX_RECOG_OPERANDS];
2372 /* Save the usage of each operand. */
2373 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2374 int no_input_reloads = 0, no_output_reloads = 0;
2376 int this_alternative[MAX_RECOG_OPERANDS];
2377 char this_alternative_win[MAX_RECOG_OPERANDS];
2378 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2379 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2380 int this_alternative_matches[MAX_RECOG_OPERANDS];
2382 int goal_alternative[MAX_RECOG_OPERANDS];
2383 int this_alternative_number;
2384 int goal_alternative_number = 0;
2385 int operand_reloadnum[MAX_RECOG_OPERANDS];
2386 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2387 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2388 char goal_alternative_win[MAX_RECOG_OPERANDS];
2389 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2390 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2391 int goal_alternative_swapped;
2394 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2395 rtx substed_operand[MAX_RECOG_OPERANDS];
2396 rtx body = PATTERN (insn);
2397 rtx set = single_set (insn);
2398 int goal_earlyclobber = 0, this_earlyclobber;
2399 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2405 n_earlyclobbers = 0;
2406 replace_reloads = replace;
2407 hard_regs_live_known = live_known;
2408 static_reload_reg_p = reload_reg_p;
2410 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2411 neither are insns that SET cc0. Insns that use CC0 are not allowed
2412 to have any input reloads. */
2413 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2414 no_output_reloads = 1;
2417 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2418 no_input_reloads = 1;
2419 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2420 no_output_reloads = 1;
2423 #ifdef SECONDARY_MEMORY_NEEDED
2424 /* The eliminated forms of any secondary memory locations are per-insn, so
2425 clear them out here. */
2427 bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2430 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2431 is cheap to move between them. If it is not, there may not be an insn
2432 to do the copy, so we may need a reload. */
2433 if (GET_CODE (body) == SET
2434 && GET_CODE (SET_DEST (body)) == REG
2435 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2436 && GET_CODE (SET_SRC (body)) == REG
2437 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2438 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2439 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2442 extract_insn (insn);
2444 noperands = reload_n_operands = recog_data.n_operands;
2445 n_alternatives = recog_data.n_alternatives;
2447 /* Just return "no reloads" if insn has no operands with constraints. */
2448 if (noperands == 0 || n_alternatives == 0)
2451 insn_code_number = INSN_CODE (insn);
2452 this_insn_is_asm = insn_code_number < 0;
2454 memcpy (operand_mode, recog_data.operand_mode,
2455 noperands * sizeof (enum machine_mode));
2456 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2460 /* If we will need to know, later, whether some pair of operands
2461 are the same, we must compare them now and save the result.
2462 Reloading the base and index registers will clobber them
2463 and afterward they will fail to match. */
2465 for (i = 0; i < noperands; i++)
2470 substed_operand[i] = recog_data.operand[i];
2473 modified[i] = RELOAD_READ;
2475 /* Scan this operand's constraint to see if it is an output operand,
2476 an in-out operand, is commutative, or should match another. */
2481 modified[i] = RELOAD_WRITE;
2483 modified[i] = RELOAD_READ_WRITE;
2486 /* The last operand should not be marked commutative. */
2487 if (i == noperands - 1)
2492 else if (c >= '0' && c <= '9')
2495 operands_match[c][i]
2496 = operands_match_p (recog_data.operand[c],
2497 recog_data.operand[i]);
2499 /* An operand may not match itself. */
2503 /* If C can be commuted with C+1, and C might need to match I,
2504 then C+1 might also need to match I. */
2505 if (commutative >= 0)
2507 if (c == commutative || c == commutative + 1)
2509 int other = c + (c == commutative ? 1 : -1);
2510 operands_match[other][i]
2511 = operands_match_p (recog_data.operand[other],
2512 recog_data.operand[i]);
2514 if (i == commutative || i == commutative + 1)
2516 int other = i + (i == commutative ? 1 : -1);
2517 operands_match[c][other]
2518 = operands_match_p (recog_data.operand[c],
2519 recog_data.operand[other]);
2521 /* Note that C is supposed to be less than I.
2522 No need to consider altering both C and I because in
2523 that case we would alter one into the other. */
2529 /* Examine each operand that is a memory reference or memory address
2530 and reload parts of the addresses into index registers.
2531 Also here any references to pseudo regs that didn't get hard regs
2532 but are equivalent to constants get replaced in the insn itself
2533 with those constants. Nobody will ever see them again.
2535 Finally, set up the preferred classes of each operand. */
2537 for (i = 0; i < noperands; i++)
2539 register RTX_CODE code = GET_CODE (recog_data.operand[i]);
2541 address_reloaded[i] = 0;
2542 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2543 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2546 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2547 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2550 if (*constraints[i] == 0)
2551 /* Ignore things like match_operator operands. */
2553 else if (constraints[i][0] == 'p')
2555 find_reloads_address (VOIDmode, NULL_PTR,
2556 recog_data.operand[i],
2557 recog_data.operand_loc[i],
2558 i, operand_type[i], ind_levels, insn);
2560 /* If we now have a simple operand where we used to have a
2561 PLUS or MULT, re-recognize and try again. */
2562 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
2563 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2564 && (GET_CODE (recog_data.operand[i]) == MULT
2565 || GET_CODE (recog_data.operand[i]) == PLUS))
2567 INSN_CODE (insn) = -1;
2568 retval = find_reloads (insn, replace, ind_levels, live_known,
2573 recog_data.operand[i] = *recog_data.operand_loc[i];
2574 substed_operand[i] = recog_data.operand[i];
2576 else if (code == MEM)
2579 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2580 recog_data.operand_loc[i],
2581 XEXP (recog_data.operand[i], 0),
2582 &XEXP (recog_data.operand[i], 0),
2583 i, address_type[i], ind_levels, insn);
2584 recog_data.operand[i] = *recog_data.operand_loc[i];
2585 substed_operand[i] = recog_data.operand[i];
2587 else if (code == SUBREG)
2589 rtx reg = SUBREG_REG (recog_data.operand[i]);
2591 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2594 && &SET_DEST (set) == recog_data.operand_loc[i],
2597 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2598 that didn't get a hard register, emit a USE with a REG_EQUAL
2599 note in front so that we might inherit a previous, possibly
2603 && GET_CODE (op) == MEM
2604 && GET_CODE (reg) == REG
2605 && (GET_MODE_SIZE (GET_MODE (reg))
2606 >= GET_MODE_SIZE (GET_MODE (op))))
2607 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode, reg), insn))
2608 = gen_rtx_EXPR_LIST (REG_EQUAL,
2609 reg_equiv_memory_loc[REGNO (reg)], NULL_RTX);
2611 substed_operand[i] = recog_data.operand[i] = op;
2613 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2614 /* We can get a PLUS as an "operand" as a result of register
2615 elimination. See eliminate_regs and gen_reload. We handle
2616 a unary operator by reloading the operand. */
2617 substed_operand[i] = recog_data.operand[i]
2618 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2619 ind_levels, 0, insn);
2620 else if (code == REG)
2622 /* This is equivalent to calling find_reloads_toplev.
2623 The code is duplicated for speed.
2624 When we find a pseudo always equivalent to a constant,
2625 we replace it by the constant. We must be sure, however,
2626 that we don't try to replace it in the insn in which it
2628 register int regno = REGNO (recog_data.operand[i]);
2629 if (reg_equiv_constant[regno] != 0
2630 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2632 /* Record the existing mode so that the check if constants are
2633 allowed will work when operand_mode isn't specified. */
2635 if (operand_mode[i] == VOIDmode)
2636 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2638 substed_operand[i] = recog_data.operand[i]
2639 = reg_equiv_constant[regno];
2641 if (reg_equiv_memory_loc[regno] != 0
2642 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2643 /* We need not give a valid is_set_dest argument since the case
2644 of a constant equivalence was checked above. */
2645 substed_operand[i] = recog_data.operand[i]
2646 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2647 ind_levels, 0, insn);
2649 /* If the operand is still a register (we didn't replace it with an
2650 equivalent), get the preferred class to reload it into. */
2651 code = GET_CODE (recog_data.operand[i]);
2653 = ((code == REG && REGNO (recog_data.operand[i])
2654 >= FIRST_PSEUDO_REGISTER)
2655 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2659 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2660 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2663 /* If this is simply a copy from operand 1 to operand 0, merge the
2664 preferred classes for the operands. */
2665 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2666 && recog_data.operand[1] == SET_SRC (set))
2668 preferred_class[0] = preferred_class[1]
2669 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2670 pref_or_nothing[0] |= pref_or_nothing[1];
2671 pref_or_nothing[1] |= pref_or_nothing[0];
2674 /* Now see what we need for pseudo-regs that didn't get hard regs
2675 or got the wrong kind of hard reg. For this, we must consider
2676 all the operands together against the register constraints. */
2678 best = MAX_RECOG_OPERANDS * 2 + 600;
2681 goal_alternative_swapped = 0;
2684 /* The constraints are made of several alternatives.
2685 Each operand's constraint looks like foo,bar,... with commas
2686 separating the alternatives. The first alternatives for all
2687 operands go together, the second alternatives go together, etc.
2689 First loop over alternatives. */
2691 for (this_alternative_number = 0;
2692 this_alternative_number < n_alternatives;
2693 this_alternative_number++)
2695 /* Loop over operands for one constraint alternative. */
2696 /* LOSERS counts those that don't fit this alternative
2697 and would require loading. */
2699 /* BAD is set to 1 if it some operand can't fit this alternative
2700 even after reloading. */
2702 /* REJECT is a count of how undesirable this alternative says it is
2703 if any reloading is required. If the alternative matches exactly
2704 then REJECT is ignored, but otherwise it gets this much
2705 counted against it in addition to the reloading needed. Each
2706 ? counts three times here since we want the disparaging caused by
2707 a bad register class to only count 1/3 as much. */
2710 this_earlyclobber = 0;
2712 for (i = 0; i < noperands; i++)
2714 register char *p = constraints[i];
2715 register int win = 0;
2716 /* 0 => this operand can be reloaded somehow for this alternative */
2718 /* 0 => this operand can be reloaded if the alternative allows regs. */
2721 register rtx operand = recog_data.operand[i];
2723 /* Nonzero means this is a MEM that must be reloaded into a reg
2724 regardless of what the constraint says. */
2725 int force_reload = 0;
2727 /* Nonzero if a constant forced into memory would be OK for this
2730 int earlyclobber = 0;
2732 /* If the predicate accepts a unary operator, it means that
2733 we need to reload the operand, but do not do this for
2734 match_operator and friends. */
2735 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2736 operand = XEXP (operand, 0);
2738 /* If the operand is a SUBREG, extract
2739 the REG or MEM (or maybe even a constant) within.
2740 (Constants can occur as a result of reg_equiv_constant.) */
2742 while (GET_CODE (operand) == SUBREG)
2744 offset += SUBREG_WORD (operand);
2745 operand = SUBREG_REG (operand);
2746 /* Force reload if this is a constant or PLUS or if there may
2747 be a problem accessing OPERAND in the outer mode. */
2748 if (CONSTANT_P (operand)
2749 || GET_CODE (operand) == PLUS
2750 /* We must force a reload of paradoxical SUBREGs
2751 of a MEM because the alignment of the inner value
2752 may not be enough to do the outer reference. On
2753 big-endian machines, it may also reference outside
2756 On machines that extend byte operations and we have a
2757 SUBREG where both the inner and outer modes are no wider
2758 than a word and the inner mode is narrower, is integral,
2759 and gets extended when loaded from memory, combine.c has
2760 made assumptions about the behavior of the machine in such
2761 register access. If the data is, in fact, in memory we
2762 must always load using the size assumed to be in the
2763 register and let the insn do the different-sized
2766 This is doubly true if WORD_REGISTER_OPERATIONS. In
2767 this case eliminate_regs has left non-paradoxical
2768 subregs for push_reloads to see. Make sure it does
2769 by forcing the reload.
2771 ??? When is it right at this stage to have a subreg
2772 of a mem that is _not_ to be handled specialy? IMO
2773 those should have been reduced to just a mem. */
2774 || ((GET_CODE (operand) == MEM
2775 || (GET_CODE (operand)== REG
2776 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2777 #ifndef WORD_REGISTER_OPERATIONS
2778 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2779 < BIGGEST_ALIGNMENT)
2780 && (GET_MODE_SIZE (operand_mode[i])
2781 > GET_MODE_SIZE (GET_MODE (operand))))
2782 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2783 #ifdef LOAD_EXTEND_OP
2784 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2785 && (GET_MODE_SIZE (GET_MODE (operand))
2787 && (GET_MODE_SIZE (operand_mode[i])
2788 > GET_MODE_SIZE (GET_MODE (operand)))
2789 && INTEGRAL_MODE_P (GET_MODE (operand))
2790 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2795 /* Subreg of a hard reg which can't handle the subreg's mode
2796 or which would handle that mode in the wrong number of
2797 registers for subregging to work. */
2798 || (GET_CODE (operand) == REG
2799 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2800 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2801 && (GET_MODE_SIZE (GET_MODE (operand))
2803 && ((GET_MODE_SIZE (GET_MODE (operand))
2805 != HARD_REGNO_NREGS (REGNO (operand),
2806 GET_MODE (operand))))
2807 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2812 this_alternative[i] = (int) NO_REGS;
2813 this_alternative_win[i] = 0;
2814 this_alternative_offmemok[i] = 0;
2815 this_alternative_earlyclobber[i] = 0;
2816 this_alternative_matches[i] = -1;
2818 /* An empty constraint or empty alternative
2819 allows anything which matched the pattern. */
2820 if (*p == 0 || *p == ',')
2823 /* Scan this alternative's specs for this operand;
2824 set WIN if the operand fits any letter in this alternative.
2825 Otherwise, clear BADOP if this operand could
2826 fit some letter after reloads,
2827 or set WINREG if this operand could fit after reloads
2828 provided the constraint allows some registers. */
2830 while (*p && (c = *p++) != ',')
2833 case '=': case '+': case '*':
2837 /* The last operand should not be marked commutative. */
2838 if (i != noperands - 1)
2851 /* Ignore rest of this alternative as far as
2852 reloading is concerned. */
2853 while (*p && *p != ',') p++;
2856 case '0': case '1': case '2': case '3': case '4':
2857 case '5': case '6': case '7': case '8': case '9':
2860 this_alternative_matches[i] = c;
2861 /* We are supposed to match a previous operand.
2862 If we do, we win if that one did.
2863 If we do not, count both of the operands as losers.
2864 (This is too conservative, since most of the time
2865 only a single reload insn will be needed to make
2866 the two operands win. As a result, this alternative
2867 may be rejected when it is actually desirable.) */
2868 if ((swapped && (c != commutative || i != commutative + 1))
2869 /* If we are matching as if two operands were swapped,
2870 also pretend that operands_match had been computed
2872 But if I is the second of those and C is the first,
2873 don't exchange them, because operands_match is valid
2874 only on one side of its diagonal. */
2876 [(c == commutative || c == commutative + 1)
2877 ? 2*commutative + 1 - c : c]
2878 [(i == commutative || i == commutative + 1)
2879 ? 2*commutative + 1 - i : i])
2880 : operands_match[c][i])
2882 /* If we are matching a non-offsettable address where an
2883 offsettable address was expected, then we must reject
2884 this combination, because we can't reload it. */
2885 if (this_alternative_offmemok[c]
2886 && GET_CODE (recog_data.operand[c]) == MEM
2887 && this_alternative[c] == (int) NO_REGS
2888 && ! this_alternative_win[c])
2891 win = this_alternative_win[c];
2895 /* Operands don't match. */
2897 /* Retroactively mark the operand we had to match
2898 as a loser, if it wasn't already. */
2899 if (this_alternative_win[c])
2901 this_alternative_win[c] = 0;
2902 if (this_alternative[c] == (int) NO_REGS)
2904 /* But count the pair only once in the total badness of
2905 this alternative, if the pair can be a dummy reload. */
2907 = find_dummy_reload (recog_data.operand[i],
2908 recog_data.operand[c],
2909 recog_data.operand_loc[i],
2910 recog_data.operand_loc[c],
2911 operand_mode[i], operand_mode[c],
2912 this_alternative[c], -1,
2913 this_alternative_earlyclobber[c]);
2918 /* This can be fixed with reloads if the operand
2919 we are supposed to match can be fixed with reloads. */
2921 this_alternative[i] = this_alternative[c];
2923 /* If we have to reload this operand and some previous
2924 operand also had to match the same thing as this
2925 operand, we don't know how to do that. So reject this
2927 if (! win || force_reload)
2928 for (j = 0; j < i; j++)
2929 if (this_alternative_matches[j]
2930 == this_alternative_matches[i])
2936 /* All necessary reloads for an address_operand
2937 were handled in find_reloads_address. */
2938 this_alternative[i] = (int) BASE_REG_CLASS;
2945 if (GET_CODE (operand) == MEM
2946 || (GET_CODE (operand) == REG
2947 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2948 && reg_renumber[REGNO (operand)] < 0))
2950 if (CONSTANT_P (operand)
2951 /* force_const_mem does not accept HIGH. */
2952 && GET_CODE (operand) != HIGH)
2958 if (GET_CODE (operand) == MEM
2959 && ! address_reloaded[i]
2960 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2961 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2966 if (GET_CODE (operand) == MEM
2967 && ! address_reloaded[i]
2968 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2969 || GET_CODE (XEXP (operand, 0)) == POST_INC))
2973 /* Memory operand whose address is not offsettable. */
2977 if (GET_CODE (operand) == MEM
2978 && ! (ind_levels ? offsettable_memref_p (operand)
2979 : offsettable_nonstrict_memref_p (operand))
2980 /* Certain mem addresses will become offsettable
2981 after they themselves are reloaded. This is important;
2982 we don't want our own handling of unoffsettables
2983 to override the handling of reg_equiv_address. */
2984 && !(GET_CODE (XEXP (operand, 0)) == REG
2986 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
2990 /* Memory operand whose address is offsettable. */
2994 if ((GET_CODE (operand) == MEM
2995 /* If IND_LEVELS, find_reloads_address won't reload a
2996 pseudo that didn't get a hard reg, so we have to
2997 reject that case. */
2998 && ((ind_levels ? offsettable_memref_p (operand)
2999 : offsettable_nonstrict_memref_p (operand))
3000 /* A reloaded address is offsettable because it is now
3001 just a simple register indirect. */
3002 || address_reloaded[i]))
3003 || (GET_CODE (operand) == REG
3004 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3005 && reg_renumber[REGNO (operand)] < 0
3006 /* If reg_equiv_address is nonzero, we will be
3007 loading it into a register; hence it will be
3008 offsettable, but we cannot say that reg_equiv_mem
3009 is offsettable without checking. */
3010 && ((reg_equiv_mem[REGNO (operand)] != 0
3011 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3012 || (reg_equiv_address[REGNO (operand)] != 0))))
3014 /* force_const_mem does not accept HIGH. */
3015 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3016 || GET_CODE (operand) == MEM)
3023 /* Output operand that is stored before the need for the
3024 input operands (and their index registers) is over. */
3025 earlyclobber = 1, this_earlyclobber = 1;
3029 #ifndef REAL_ARITHMETIC
3030 /* Match any floating double constant, but only if
3031 we can examine the bits of it reliably. */
3032 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
3033 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
3034 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
3037 if (GET_CODE (operand) == CONST_DOUBLE)
3042 if (GET_CODE (operand) == CONST_DOUBLE)
3048 if (GET_CODE (operand) == CONST_DOUBLE
3049 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
3054 if (GET_CODE (operand) == CONST_INT
3055 || (GET_CODE (operand) == CONST_DOUBLE
3056 && GET_MODE (operand) == VOIDmode))
3059 if (CONSTANT_P (operand)
3060 #ifdef LEGITIMATE_PIC_OPERAND_P
3061 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3068 if (GET_CODE (operand) == CONST_INT
3069 || (GET_CODE (operand) == CONST_DOUBLE
3070 && GET_MODE (operand) == VOIDmode))
3082 if (GET_CODE (operand) == CONST_INT
3083 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
3093 /* A PLUS is never a valid operand, but reload can make
3094 it from a register when eliminating registers. */
3095 && GET_CODE (operand) != PLUS
3096 /* A SCRATCH is not a valid operand. */
3097 && GET_CODE (operand) != SCRATCH
3098 #ifdef LEGITIMATE_PIC_OPERAND_P
3099 && (! CONSTANT_P (operand)
3101 || LEGITIMATE_PIC_OPERAND_P (operand))
3103 && (GENERAL_REGS == ALL_REGS
3104 || GET_CODE (operand) != REG
3105 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3106 && reg_renumber[REGNO (operand)] < 0)))
3108 /* Drop through into 'r' case */
3112 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3115 #ifdef EXTRA_CONSTRAINT
3121 if (EXTRA_CONSTRAINT (operand, c))
3128 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3131 if (GET_MODE (operand) == BLKmode)
3134 if (GET_CODE (operand) == REG
3135 && reg_fits_class_p (operand, this_alternative[i],
3136 offset, GET_MODE (recog_data.operand[i])))
3143 /* If this operand could be handled with a reg,
3144 and some reg is allowed, then this operand can be handled. */
3145 if (winreg && this_alternative[i] != (int) NO_REGS)
3148 /* Record which operands fit this alternative. */
3149 this_alternative_earlyclobber[i] = earlyclobber;
3150 if (win && ! force_reload)
3151 this_alternative_win[i] = 1;
3154 int const_to_mem = 0;
3156 this_alternative_offmemok[i] = offmemok;
3160 /* Alternative loses if it has no regs for a reg operand. */
3161 if (GET_CODE (operand) == REG
3162 && this_alternative[i] == (int) NO_REGS
3163 && this_alternative_matches[i] < 0)
3166 /* If this is a constant that is reloaded into the desired
3167 class by copying it to memory first, count that as another
3168 reload. This is consistent with other code and is
3169 required to avoid choosing another alternative when
3170 the constant is moved into memory by this function on
3171 an early reload pass. Note that the test here is
3172 precisely the same as in the code below that calls
3174 if (CONSTANT_P (operand)
3175 /* force_const_mem does not accept HIGH. */
3176 && GET_CODE (operand) != HIGH
3177 && ((PREFERRED_RELOAD_CLASS (operand,
3178 (enum reg_class) this_alternative[i])
3180 || no_input_reloads)
3181 && operand_mode[i] != VOIDmode)
3184 if (this_alternative[i] != (int) NO_REGS)
3188 /* If we can't reload this value at all, reject this
3189 alternative. Note that we could also lose due to
3190 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3193 if (! CONSTANT_P (operand)
3194 && (enum reg_class) this_alternative[i] != NO_REGS
3195 && (PREFERRED_RELOAD_CLASS (operand,
3196 (enum reg_class) this_alternative[i])
3200 /* Alternative loses if it requires a type of reload not
3201 permitted for this insn. We can always reload SCRATCH
3202 and objects with a REG_UNUSED note. */
3203 else if (GET_CODE (operand) != SCRATCH
3204 && modified[i] != RELOAD_READ && no_output_reloads
3205 && ! find_reg_note (insn, REG_UNUSED, operand))
3207 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3212 /* We prefer to reload pseudos over reloading other things,
3213 since such reloads may be able to be eliminated later.
3214 If we are reloading a SCRATCH, we won't be generating any
3215 insns, just using a register, so it is also preferred.
3216 So bump REJECT in other cases. Don't do this in the
3217 case where we are forcing a constant into memory and
3218 it will then win since we don't want to have a different
3219 alternative match then. */
3220 if (! (GET_CODE (operand) == REG
3221 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3222 && GET_CODE (operand) != SCRATCH
3223 && ! (const_to_mem && constmemok))
3226 /* Input reloads can be inherited more often than output
3227 reloads can be removed, so penalize output reloads. */
3228 if (operand_type[i] != RELOAD_FOR_INPUT
3229 && GET_CODE (operand) != SCRATCH)
3233 /* If this operand is a pseudo register that didn't get a hard
3234 reg and this alternative accepts some register, see if the
3235 class that we want is a subset of the preferred class for this
3236 register. If not, but it intersects that class, use the
3237 preferred class instead. If it does not intersect the preferred
3238 class, show that usage of this alternative should be discouraged;
3239 it will be discouraged more still if the register is `preferred
3240 or nothing'. We do this because it increases the chance of
3241 reusing our spill register in a later insn and avoiding a pair
3242 of memory stores and loads.
3244 Don't bother with this if this alternative will accept this
3247 Don't do this for a multiword operand, since it is only a
3248 small win and has the risk of requiring more spill registers,
3249 which could cause a large loss.
3251 Don't do this if the preferred class has only one register
3252 because we might otherwise exhaust the class. */
3255 if (! win && this_alternative[i] != (int) NO_REGS
3256 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3257 && reg_class_size[(int) preferred_class[i]] > 1)
3259 if (! reg_class_subset_p (this_alternative[i],
3260 preferred_class[i]))
3262 /* Since we don't have a way of forming the intersection,
3263 we just do something special if the preferred class
3264 is a subset of the class we have; that's the most
3265 common case anyway. */
3266 if (reg_class_subset_p (preferred_class[i],
3267 this_alternative[i]))
3268 this_alternative[i] = (int) preferred_class[i];
3270 reject += (2 + 2 * pref_or_nothing[i]);
3275 /* Now see if any output operands that are marked "earlyclobber"
3276 in this alternative conflict with any input operands
3277 or any memory addresses. */
3279 for (i = 0; i < noperands; i++)
3280 if (this_alternative_earlyclobber[i]
3281 && this_alternative_win[i])
3283 struct decomposition early_data;
3285 early_data = decompose (recog_data.operand[i]);
3287 if (modified[i] == RELOAD_READ)
3290 if (this_alternative[i] == NO_REGS)
3292 this_alternative_earlyclobber[i] = 0;
3293 if (this_insn_is_asm)
3294 error_for_asm (this_insn,
3295 "`&' constraint used with no register class");
3300 for (j = 0; j < noperands; j++)
3301 /* Is this an input operand or a memory ref? */
3302 if ((GET_CODE (recog_data.operand[j]) == MEM
3303 || modified[j] != RELOAD_WRITE)
3305 /* Ignore things like match_operator operands. */
3306 && *recog_data.constraints[j] != 0
3307 /* Don't count an input operand that is constrained to match
3308 the early clobber operand. */
3309 && ! (this_alternative_matches[j] == i
3310 && rtx_equal_p (recog_data.operand[i],
3311 recog_data.operand[j]))
3312 /* Is it altered by storing the earlyclobber operand? */
3313 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3316 /* If the output is in a single-reg class,
3317 it's costly to reload it, so reload the input instead. */
3318 if (reg_class_size[this_alternative[i]] == 1
3319 && (GET_CODE (recog_data.operand[j]) == REG
3320 || GET_CODE (recog_data.operand[j]) == SUBREG))
3323 this_alternative_win[j] = 0;
3328 /* If an earlyclobber operand conflicts with something,
3329 it must be reloaded, so request this and count the cost. */
3333 this_alternative_win[i] = 0;
3334 for (j = 0; j < noperands; j++)
3335 if (this_alternative_matches[j] == i
3336 && this_alternative_win[j])
3338 this_alternative_win[j] = 0;
3344 /* If one alternative accepts all the operands, no reload required,
3345 choose that alternative; don't consider the remaining ones. */
3348 /* Unswap these so that they are never swapped at `finish'. */
3349 if (commutative >= 0)
3351 recog_data.operand[commutative] = substed_operand[commutative];
3352 recog_data.operand[commutative + 1]
3353 = substed_operand[commutative + 1];
3355 for (i = 0; i < noperands; i++)
3357 goal_alternative_win[i] = 1;
3358 goal_alternative[i] = this_alternative[i];
3359 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3360 goal_alternative_matches[i] = this_alternative_matches[i];
3361 goal_alternative_earlyclobber[i]
3362 = this_alternative_earlyclobber[i];
3364 goal_alternative_number = this_alternative_number;
3365 goal_alternative_swapped = swapped;
3366 goal_earlyclobber = this_earlyclobber;
3370 /* REJECT, set by the ! and ? constraint characters and when a register
3371 would be reloaded into a non-preferred class, discourages the use of
3372 this alternative for a reload goal. REJECT is incremented by six
3373 for each ? and two for each non-preferred class. */
3374 losers = losers * 6 + reject;
3376 /* If this alternative can be made to work by reloading,
3377 and it needs less reloading than the others checked so far,
3378 record it as the chosen goal for reloading. */
3379 if (! bad && best > losers)
3381 for (i = 0; i < noperands; i++)
3383 goal_alternative[i] = this_alternative[i];
3384 goal_alternative_win[i] = this_alternative_win[i];
3385 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3386 goal_alternative_matches[i] = this_alternative_matches[i];
3387 goal_alternative_earlyclobber[i]
3388 = this_alternative_earlyclobber[i];
3390 goal_alternative_swapped = swapped;
3392 goal_alternative_number = this_alternative_number;
3393 goal_earlyclobber = this_earlyclobber;
3397 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3398 then we need to try each alternative twice,
3399 the second time matching those two operands
3400 as if we had exchanged them.
3401 To do this, really exchange them in operands.
3403 If we have just tried the alternatives the second time,
3404 return operands to normal and drop through. */
3406 if (commutative >= 0)
3411 register enum reg_class tclass;
3414 recog_data.operand[commutative] = substed_operand[commutative + 1];
3415 recog_data.operand[commutative + 1] = substed_operand[commutative];
3417 tclass = preferred_class[commutative];
3418 preferred_class[commutative] = preferred_class[commutative + 1];
3419 preferred_class[commutative + 1] = tclass;
3421 t = pref_or_nothing[commutative];
3422 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3423 pref_or_nothing[commutative + 1] = t;
3425 memcpy (constraints, recog_data.constraints,
3426 noperands * sizeof (char *));
3431 recog_data.operand[commutative] = substed_operand[commutative];
3432 recog_data.operand[commutative + 1]
3433 = substed_operand[commutative + 1];
3437 /* The operands don't meet the constraints.
3438 goal_alternative describes the alternative
3439 that we could reach by reloading the fewest operands.
3440 Reload so as to fit it. */
3442 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3444 /* No alternative works with reloads?? */
3445 if (insn_code_number >= 0)
3446 fatal_insn ("Unable to generate reloads for:", insn);
3447 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3448 /* Avoid further trouble with this insn. */
3449 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3454 /* Jump to `finish' from above if all operands are valid already.
3455 In that case, goal_alternative_win is all 1. */
3458 /* Right now, for any pair of operands I and J that are required to match,
3460 goal_alternative_matches[J] is I.
3461 Set up goal_alternative_matched as the inverse function:
3462 goal_alternative_matched[I] = J. */
3464 for (i = 0; i < noperands; i++)
3465 goal_alternative_matched[i] = -1;
3467 for (i = 0; i < noperands; i++)
3468 if (! goal_alternative_win[i]
3469 && goal_alternative_matches[i] >= 0)
3470 goal_alternative_matched[goal_alternative_matches[i]] = i;
3472 /* If the best alternative is with operands 1 and 2 swapped,
3473 consider them swapped before reporting the reloads. Update the
3474 operand numbers of any reloads already pushed. */
3476 if (goal_alternative_swapped)
3480 tem = substed_operand[commutative];
3481 substed_operand[commutative] = substed_operand[commutative + 1];
3482 substed_operand[commutative + 1] = tem;
3483 tem = recog_data.operand[commutative];
3484 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3485 recog_data.operand[commutative + 1] = tem;
3486 tem = *recog_data.operand_loc[commutative];
3487 *recog_data.operand_loc[commutative]
3488 = *recog_data.operand_loc[commutative + 1];
3489 *recog_data.operand_loc[commutative+1] = tem;
3491 for (i = 0; i < n_reloads; i++)
3493 if (rld[i].opnum == commutative)
3494 rld[i].opnum = commutative + 1;
3495 else if (rld[i].opnum == commutative + 1)
3496 rld[i].opnum = commutative;
3500 for (i = 0; i < noperands; i++)
3502 operand_reloadnum[i] = -1;
3504 /* If this is an earlyclobber operand, we need to widen the scope.
3505 The reload must remain valid from the start of the insn being
3506 reloaded until after the operand is stored into its destination.
3507 We approximate this with RELOAD_OTHER even though we know that we
3508 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3510 One special case that is worth checking is when we have an
3511 output that is earlyclobber but isn't used past the insn (typically
3512 a SCRATCH). In this case, we only need have the reload live
3513 through the insn itself, but not for any of our input or output
3515 But we must not accidentally narrow the scope of an existing
3516 RELOAD_OTHER reload - leave these alone.
3518 In any case, anything needed to address this operand can remain
3519 however they were previously categorized. */
3521 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3523 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3524 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3527 /* Any constants that aren't allowed and can't be reloaded
3528 into registers are here changed into memory references. */
3529 for (i = 0; i < noperands; i++)
3530 if (! goal_alternative_win[i]
3531 && CONSTANT_P (recog_data.operand[i])
3532 /* force_const_mem does not accept HIGH. */
3533 && GET_CODE (recog_data.operand[i]) != HIGH
3534 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3535 (enum reg_class) goal_alternative[i])
3537 || no_input_reloads)
3538 && operand_mode[i] != VOIDmode)
3540 substed_operand[i] = recog_data.operand[i]
3541 = find_reloads_toplev (force_const_mem (operand_mode[i],
3542 recog_data.operand[i]),
3543 i, address_type[i], ind_levels, 0, insn);
3544 if (alternative_allows_memconst (recog_data.constraints[i],
3545 goal_alternative_number))
3546 goal_alternative_win[i] = 1;
3549 /* Record the values of the earlyclobber operands for the caller. */
3550 if (goal_earlyclobber)
3551 for (i = 0; i < noperands; i++)
3552 if (goal_alternative_earlyclobber[i])
3553 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3555 /* Now record reloads for all the operands that need them. */
3556 for (i = 0; i < noperands; i++)
3557 if (! goal_alternative_win[i])
3559 /* Operands that match previous ones have already been handled. */
3560 if (goal_alternative_matches[i] >= 0)
3562 /* Handle an operand with a nonoffsettable address
3563 appearing where an offsettable address will do
3564 by reloading the address into a base register.
3566 ??? We can also do this when the operand is a register and
3567 reg_equiv_mem is not offsettable, but this is a bit tricky,
3568 so we don't bother with it. It may not be worth doing. */
3569 else if (goal_alternative_matched[i] == -1
3570 && goal_alternative_offmemok[i]
3571 && GET_CODE (recog_data.operand[i]) == MEM)
3573 operand_reloadnum[i]
3574 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3575 &XEXP (recog_data.operand[i], 0), NULL_PTR,
3577 GET_MODE (XEXP (recog_data.operand[i], 0)),
3578 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3579 rld[operand_reloadnum[i]].inc
3580 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3582 /* If this operand is an output, we will have made any
3583 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3584 now we are treating part of the operand as an input, so
3585 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3587 if (modified[i] == RELOAD_WRITE)
3589 for (j = 0; j < n_reloads; j++)
3591 if (rld[j].opnum == i)
3593 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3594 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3595 else if (rld[j].when_needed
3596 == RELOAD_FOR_OUTADDR_ADDRESS)
3597 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3602 else if (goal_alternative_matched[i] == -1)
3604 operand_reloadnum[i]
3605 = push_reload ((modified[i] != RELOAD_WRITE
3606 ? recog_data.operand[i] : 0),
3607 (modified[i] != RELOAD_READ
3608 ? recog_data.operand[i] : 0),
3609 (modified[i] != RELOAD_WRITE
3610 ? recog_data.operand_loc[i] : 0),
3611 (modified[i] != RELOAD_READ
3612 ? recog_data.operand_loc[i] : 0),
3613 (enum reg_class) goal_alternative[i],
3614 (modified[i] == RELOAD_WRITE
3615 ? VOIDmode : operand_mode[i]),
3616 (modified[i] == RELOAD_READ
3617 ? VOIDmode : operand_mode[i]),
3618 (insn_code_number < 0 ? 0
3619 : insn_data[insn_code_number].operand[i].strict_low),
3620 0, i, operand_type[i]);
3622 /* In a matching pair of operands, one must be input only
3623 and the other must be output only.
3624 Pass the input operand as IN and the other as OUT. */
3625 else if (modified[i] == RELOAD_READ
3626 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3628 operand_reloadnum[i]
3629 = push_reload (recog_data.operand[i],
3630 recog_data.operand[goal_alternative_matched[i]],
3631 recog_data.operand_loc[i],
3632 recog_data.operand_loc[goal_alternative_matched[i]],
3633 (enum reg_class) goal_alternative[i],
3635 operand_mode[goal_alternative_matched[i]],
3636 0, 0, i, RELOAD_OTHER);
3637 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3639 else if (modified[i] == RELOAD_WRITE
3640 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3642 operand_reloadnum[goal_alternative_matched[i]]
3643 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3644 recog_data.operand[i],
3645 recog_data.operand_loc[goal_alternative_matched[i]],
3646 recog_data.operand_loc[i],
3647 (enum reg_class) goal_alternative[i],
3648 operand_mode[goal_alternative_matched[i]],
3650 0, 0, i, RELOAD_OTHER);
3651 operand_reloadnum[i] = output_reloadnum;
3653 else if (insn_code_number >= 0)
3657 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3658 /* Avoid further trouble with this insn. */
3659 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3664 else if (goal_alternative_matched[i] < 0
3665 && goal_alternative_matches[i] < 0
3668 /* For each non-matching operand that's a MEM or a pseudo-register
3669 that didn't get a hard register, make an optional reload.
3670 This may get done even if the insn needs no reloads otherwise. */
3672 rtx operand = recog_data.operand[i];
3674 while (GET_CODE (operand) == SUBREG)
3675 operand = XEXP (operand, 0);
3676 if ((GET_CODE (operand) == MEM
3677 || (GET_CODE (operand) == REG
3678 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3679 /* If this is only for an output, the optional reload would not
3680 actually cause us to use a register now, just note that
3681 something is stored here. */
3682 && ((enum reg_class) goal_alternative[i] != NO_REGS
3683 || modified[i] == RELOAD_WRITE)
3684 && ! no_input_reloads
3685 /* An optional output reload might allow to delete INSN later.
3686 We mustn't make in-out reloads on insns that are not permitted
3688 If this is an asm, we can't delete it; we must not even call
3689 push_reload for an optional output reload in this case,
3690 because we can't be sure that the constraint allows a register,
3691 and push_reload verifies the constraints for asms. */
3692 && (modified[i] == RELOAD_READ
3693 || (! no_output_reloads && ! this_insn_is_asm)))
3694 operand_reloadnum[i]
3695 = push_reload ((modified[i] != RELOAD_WRITE
3696 ? recog_data.operand[i] : 0),
3697 (modified[i] != RELOAD_READ
3698 ? recog_data.operand[i] : 0),
3699 (modified[i] != RELOAD_WRITE
3700 ? recog_data.operand_loc[i] : 0),
3701 (modified[i] != RELOAD_READ
3702 ? recog_data.operand_loc[i] : 0),
3703 (enum reg_class) goal_alternative[i],
3704 (modified[i] == RELOAD_WRITE
3705 ? VOIDmode : operand_mode[i]),
3706 (modified[i] == RELOAD_READ
3707 ? VOIDmode : operand_mode[i]),
3708 (insn_code_number < 0 ? 0
3709 : insn_data[insn_code_number].operand[i].strict_low),
3710 1, i, operand_type[i]);
3711 /* If a memory reference remains (either as a MEM or a pseudo that
3712 did not get a hard register), yet we can't make an optional
3713 reload, check if this is actually a pseudo register reference;
3714 we then need to emit a USE and/or a CLOBBER so that reload
3715 inheritance will do the right thing. */
3717 && (GET_CODE (operand) == MEM
3718 || (GET_CODE (operand) == REG
3719 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3720 && reg_renumber [REGNO (operand)] < 0)))
3722 operand = *recog_data.operand_loc[i];
3724 while (GET_CODE (operand) == SUBREG)
3725 operand = XEXP (operand, 0);
3726 if (GET_CODE (operand) == REG)
3728 if (modified[i] != RELOAD_WRITE)
3729 emit_insn_before (gen_rtx_USE (VOIDmode, operand), insn);
3730 if (modified[i] != RELOAD_READ)
3731 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3735 else if (goal_alternative_matches[i] >= 0
3736 && goal_alternative_win[goal_alternative_matches[i]]
3737 && modified[i] == RELOAD_READ
3738 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3739 && ! no_input_reloads && ! no_output_reloads
3742 /* Similarly, make an optional reload for a pair of matching
3743 objects that are in MEM or a pseudo that didn't get a hard reg. */
3745 rtx operand = recog_data.operand[i];
3747 while (GET_CODE (operand) == SUBREG)
3748 operand = XEXP (operand, 0);
3749 if ((GET_CODE (operand) == MEM
3750 || (GET_CODE (operand) == REG
3751 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3752 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3754 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3755 = push_reload (recog_data.operand[goal_alternative_matches[i]],
3756 recog_data.operand[i],
3757 recog_data.operand_loc[goal_alternative_matches[i]],
3758 recog_data.operand_loc[i],
3759 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3760 operand_mode[goal_alternative_matches[i]],
3762 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3765 /* Perform whatever substitutions on the operands we are supposed
3766 to make due to commutativity or replacement of registers
3767 with equivalent constants or memory slots. */
3769 for (i = 0; i < noperands; i++)
3771 /* We only do this on the last pass through reload, because it is
3772 possible for some data (like reg_equiv_address) to be changed during
3773 later passes. Moreover, we loose the opportunity to get a useful
3774 reload_{in,out}_reg when we do these replacements. */
3778 rtx substitution = substed_operand[i];
3780 *recog_data.operand_loc[i] = substitution;
3782 /* If we're replacing an operand with a LABEL_REF, we need
3783 to make sure that there's a REG_LABEL note attached to
3784 this instruction. */
3785 if (GET_CODE (insn) != JUMP_INSN
3786 && GET_CODE (substitution) == LABEL_REF
3787 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
3788 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL,
3789 XEXP (substitution, 0),
3793 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
3796 /* If this insn pattern contains any MATCH_DUP's, make sure that
3797 they will be substituted if the operands they match are substituted.
3798 Also do now any substitutions we already did on the operands.
3800 Don't do this if we aren't making replacements because we might be
3801 propagating things allocated by frame pointer elimination into places
3802 it doesn't expect. */
3804 if (insn_code_number >= 0 && replace)
3805 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
3807 int opno = recog_data.dup_num[i];
3808 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
3809 if (operand_reloadnum[opno] >= 0)
3810 push_replacement (recog_data.dup_loc[i], operand_reloadnum[opno],
3811 insn_data[insn_code_number].operand[opno].mode);
3815 /* This loses because reloading of prior insns can invalidate the equivalence
3816 (or at least find_equiv_reg isn't smart enough to find it any more),
3817 causing this insn to need more reload regs than it needed before.
3818 It may be too late to make the reload regs available.
3819 Now this optimization is done safely in choose_reload_regs. */
3821 /* For each reload of a reg into some other class of reg,
3822 search for an existing equivalent reg (same value now) in the right class.
3823 We can use it as long as we don't need to change its contents. */
3824 for (i = 0; i < n_reloads; i++)
3825 if (rld[i].reg_rtx == 0
3827 && GET_CODE (rld[i].in) == REG
3831 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
3832 static_reload_reg_p, 0, rld[i].inmode);
3833 /* Prevent generation of insn to load the value
3834 because the one we found already has the value. */
3836 rld[i].in = rld[i].reg_rtx;
3840 /* Perhaps an output reload can be combined with another
3841 to reduce needs by one. */
3842 if (!goal_earlyclobber)
3845 /* If we have a pair of reloads for parts of an address, they are reloading
3846 the same object, the operands themselves were not reloaded, and they
3847 are for two operands that are supposed to match, merge the reloads and
3848 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3850 for (i = 0; i < n_reloads; i++)
3854 for (j = i + 1; j < n_reloads; j++)
3855 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
3856 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
3857 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3858 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3859 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
3860 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
3861 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3862 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3863 && rtx_equal_p (rld[i].in, rld[j].in)
3864 && (operand_reloadnum[rld[i].opnum] < 0
3865 || rld[operand_reloadnum[rld[i].opnum]].optional)
3866 && (operand_reloadnum[rld[j].opnum] < 0
3867 || rld[operand_reloadnum[rld[j].opnum]].optional)
3868 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
3869 || (goal_alternative_matches[rld[j].opnum]
3872 for (k = 0; k < n_replacements; k++)
3873 if (replacements[k].what == j)
3874 replacements[k].what = i;
3876 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3877 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3878 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
3880 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
3885 /* Scan all the reloads and update their type.
3886 If a reload is for the address of an operand and we didn't reload
3887 that operand, change the type. Similarly, change the operand number
3888 of a reload when two operands match. If a reload is optional, treat it
3889 as though the operand isn't reloaded.
3891 ??? This latter case is somewhat odd because if we do the optional
3892 reload, it means the object is hanging around. Thus we need only
3893 do the address reload if the optional reload was NOT done.
3895 Change secondary reloads to be the address type of their operand, not
3898 If an operand's reload is now RELOAD_OTHER, change any
3899 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3900 RELOAD_FOR_OTHER_ADDRESS. */
3902 for (i = 0; i < n_reloads; i++)
3904 if (rld[i].secondary_p
3905 && rld[i].when_needed == operand_type[rld[i].opnum])
3906 rld[i].when_needed = address_type[rld[i].opnum];
3908 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
3909 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
3910 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3911 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3912 && (operand_reloadnum[rld[i].opnum] < 0
3913 || rld[operand_reloadnum[rld[i].opnum]].optional))
3915 /* If we have a secondary reload to go along with this reload,
3916 change its type to RELOAD_FOR_OPADDR_ADDR. */
3918 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
3919 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
3920 && rld[i].secondary_in_reload != -1)
3922 int secondary_in_reload = rld[i].secondary_in_reload;
3924 rld[secondary_in_reload].when_needed
3925 = RELOAD_FOR_OPADDR_ADDR;
3927 /* If there's a tertiary reload we have to change it also. */
3928 if (secondary_in_reload > 0
3929 && rld[secondary_in_reload].secondary_in_reload != -1)
3930 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
3931 = RELOAD_FOR_OPADDR_ADDR;
3934 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
3935 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3936 && rld[i].secondary_out_reload != -1)
3938 int secondary_out_reload = rld[i].secondary_out_reload;
3940 rld[secondary_out_reload].when_needed
3941 = RELOAD_FOR_OPADDR_ADDR;
3943 /* If there's a tertiary reload we have to change it also. */
3944 if (secondary_out_reload
3945 && rld[secondary_out_reload].secondary_out_reload != -1)
3946 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
3947 = RELOAD_FOR_OPADDR_ADDR;
3950 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3951 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3952 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
3954 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
3957 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
3958 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
3959 && operand_reloadnum[rld[i].opnum] >= 0
3960 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
3962 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
3964 if (goal_alternative_matches[rld[i].opnum] >= 0)
3965 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
3968 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
3969 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
3970 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
3972 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
3973 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
3974 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
3975 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
3976 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
3977 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
3978 This is complicated by the fact that a single operand can have more
3979 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
3980 choose_reload_regs without affecting code quality, and cases that
3981 actually fail are extremely rare, so it turns out to be better to fix
3982 the problem here by not generating cases that choose_reload_regs will
3984 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
3985 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
3987 We can reduce the register pressure by exploiting that a
3988 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
3989 does not conflict with any of them, if it is only used for the first of
3990 the RELOAD_FOR_X_ADDRESS reloads. */
3992 int first_op_addr_num = -2;
3993 int first_inpaddr_num[MAX_RECOG_OPERANDS];
3994 int first_outpaddr_num[MAX_RECOG_OPERANDS];
3996 /* We use last_op_addr_reload and the contents of the above arrays
3997 first as flags - -2 means no instance encountered, -1 means exactly
3998 one instance encountered.
3999 If more than one instance has been encountered, we store the reload
4000 number of the first reload of the kind in question; reload numbers
4001 are known to be non-negative. */
4002 for (i = 0; i < noperands; i++)
4003 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4004 for (i = n_reloads - 1; i >= 0; i--)
4006 switch (rld[i].when_needed)
4008 case RELOAD_FOR_OPERAND_ADDRESS:
4009 if (++first_op_addr_num >= 0)
4011 first_op_addr_num = i;
4015 case RELOAD_FOR_INPUT_ADDRESS:
4016 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4018 first_inpaddr_num[rld[i].opnum] = i;
4022 case RELOAD_FOR_OUTPUT_ADDRESS:
4023 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4025 first_outpaddr_num[rld[i].opnum] = i;
4036 for (i = 0; i < n_reloads; i++)
4039 enum reload_type type;
4041 switch (rld[i].when_needed)
4043 case RELOAD_FOR_OPADDR_ADDR:
4044 first_num = first_op_addr_num;
4045 type = RELOAD_FOR_OPERAND_ADDRESS;
4047 case RELOAD_FOR_INPADDR_ADDRESS:
4048 first_num = first_inpaddr_num[rld[i].opnum];
4049 type = RELOAD_FOR_INPUT_ADDRESS;
4051 case RELOAD_FOR_OUTADDR_ADDRESS:
4052 first_num = first_outpaddr_num[rld[i].opnum];
4053 type = RELOAD_FOR_OUTPUT_ADDRESS;
4060 else if (i > first_num)
4061 rld[i].when_needed = type;
4064 /* Check if the only TYPE reload that uses reload I is
4065 reload FIRST_NUM. */
4066 for (j = n_reloads - 1; j > first_num; j--)
4068 if (rld[j].when_needed == type
4069 && (rld[i].secondary_p
4070 ? rld[j].secondary_in_reload == i
4071 : reg_mentioned_p (rld[i].in, rld[j].in)))
4073 rld[i].when_needed = type;
4082 /* See if we have any reloads that are now allowed to be merged
4083 because we've changed when the reload is needed to
4084 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4085 check for the most common cases. */
4087 for (i = 0; i < n_reloads; i++)
4088 if (rld[i].in != 0 && rld[i].out == 0
4089 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4090 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4091 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4092 for (j = 0; j < n_reloads; j++)
4093 if (i != j && rld[j].in != 0 && rld[j].out == 0
4094 && rld[j].when_needed == rld[i].when_needed
4095 && MATCHES (rld[i].in, rld[j].in)
4096 && rld[i].class == rld[j].class
4097 && !rld[i].nocombine && !rld[j].nocombine
4098 && rld[i].reg_rtx == rld[j].reg_rtx)
4100 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4101 transfer_replacements (i, j);
4106 /* If we made any reloads for addresses, see if they violate a
4107 "no input reloads" requirement for this insn. But loads that we
4108 do after the insn (such as for output addresses) are fine. */
4109 if (no_input_reloads)
4110 for (i = 0; i < n_reloads; i++)
4112 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
4113 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS)
4117 /* Compute reload_mode and reload_nregs. */
4118 for (i = 0; i < n_reloads; i++)
4121 = (rld[i].inmode == VOIDmode
4122 || (GET_MODE_SIZE (rld[i].outmode)
4123 > GET_MODE_SIZE (rld[i].inmode)))
4124 ? rld[i].outmode : rld[i].inmode;
4126 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4132 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4133 accepts a memory operand with constant address. */
4136 alternative_allows_memconst (constraint, altnum)
4137 const char *constraint;
4141 /* Skip alternatives before the one requested. */
4144 while (*constraint++ != ',');
4147 /* Scan the requested alternative for 'm' or 'o'.
4148 If one of them is present, this alternative accepts memory constants. */
4149 while ((c = *constraint++) && c != ',' && c != '#')
4150 if (c == 'm' || c == 'o')
4155 /* Scan X for memory references and scan the addresses for reloading.
4156 Also checks for references to "constant" regs that we want to eliminate
4157 and replaces them with the values they stand for.
4158 We may alter X destructively if it contains a reference to such.
4159 If X is just a constant reg, we return the equivalent value
4162 IND_LEVELS says how many levels of indirect addressing this machine
4165 OPNUM and TYPE identify the purpose of the reload.
4167 IS_SET_DEST is true if X is the destination of a SET, which is not
4168 appropriate to be replaced by a constant.
4170 INSN, if nonzero, is the insn in which we do the reload. It is used
4171 to determine if we may generate output reloads, and where to put USEs
4172 for pseudos that we have to replace with stack slots. */
4175 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn)
4178 enum reload_type type;
4183 register RTX_CODE code = GET_CODE (x);
4185 register const char *fmt = GET_RTX_FORMAT (code);
4191 /* This code is duplicated for speed in find_reloads. */
4192 register int regno = REGNO (x);
4193 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4194 x = reg_equiv_constant[regno];
4196 /* This creates (subreg (mem...)) which would cause an unnecessary
4197 reload of the mem. */
4198 else if (reg_equiv_mem[regno] != 0)
4199 x = reg_equiv_mem[regno];
4201 else if (reg_equiv_memory_loc[regno]
4202 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4204 rtx mem = make_memloc (x, regno);
4205 if (reg_equiv_address[regno]
4206 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4208 /* If this is not a toplevel operand, find_reloads doesn't see
4209 this substitution. We have to emit a USE of the pseudo so
4210 that delete_output_reload can see it. */
4211 if (replace_reloads && recog_data.operand[opnum] != x)
4212 emit_insn_before (gen_rtx_USE (VOIDmode, x), insn);
4214 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4215 opnum, type, ind_levels, insn);
4223 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4224 opnum, type, ind_levels, insn);
4228 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4230 /* Check for SUBREG containing a REG that's equivalent to a constant.
4231 If the constant has a known value, truncate it right now.
4232 Similarly if we are extracting a single-word of a multi-word
4233 constant. If the constant is symbolic, allow it to be substituted
4234 normally. push_reload will strip the subreg later. If the
4235 constant is VOIDmode, abort because we will lose the mode of
4236 the register (this should never happen because one of the cases
4237 above should handle it). */
4239 register int regno = REGNO (SUBREG_REG (x));
4242 if (subreg_lowpart_p (x)
4243 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4244 && reg_equiv_constant[regno] != 0
4245 && (tem = gen_lowpart_common (GET_MODE (x),
4246 reg_equiv_constant[regno])) != 0)
4249 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
4250 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4251 && reg_equiv_constant[regno] != 0
4252 && (tem = operand_subword (reg_equiv_constant[regno],
4254 GET_MODE (SUBREG_REG (x)))) != 0)
4256 /* TEM is now a word sized constant for the bits from X that
4257 we wanted. However, TEM may be the wrong representation.
4259 Use gen_lowpart_common to convert a CONST_INT into a
4260 CONST_DOUBLE and vice versa as needed according to by the mode
4262 tem = gen_lowpart_common (GET_MODE (x), tem);
4268 /* If the SUBREG is wider than a word, the above test will fail.
4269 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4270 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4271 a 32 bit target. We still can - and have to - handle this
4272 for non-paradoxical subregs of CONST_INTs. */
4273 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4274 && reg_equiv_constant[regno] != 0
4275 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT
4276 && (GET_MODE_SIZE (GET_MODE (x))
4277 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
4279 int shift = SUBREG_WORD (x) * BITS_PER_WORD;
4280 if (WORDS_BIG_ENDIAN)
4281 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
4282 - GET_MODE_BITSIZE (GET_MODE (x))
4284 /* Here we use the knowledge that CONST_INTs have a
4285 HOST_WIDE_INT field. */
4286 if (shift >= HOST_BITS_PER_WIDE_INT)
4287 shift = HOST_BITS_PER_WIDE_INT - 1;
4288 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift);
4291 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4292 && reg_equiv_constant[regno] != 0
4293 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
4296 /* If the subreg contains a reg that will be converted to a mem,
4297 convert the subreg to a narrower memref now.
4298 Otherwise, we would get (subreg (mem ...) ...),
4299 which would force reload of the mem.
4301 We also need to do this if there is an equivalent MEM that is
4302 not offsettable. In that case, alter_subreg would produce an
4303 invalid address on big-endian machines.
4305 For machines that extend byte loads, we must not reload using
4306 a wider mode if we have a paradoxical SUBREG. find_reloads will
4307 force a reload in that case. So we should not do anything here. */
4309 else if (regno >= FIRST_PSEUDO_REGISTER
4310 #ifdef LOAD_EXTEND_OP
4311 && (GET_MODE_SIZE (GET_MODE (x))
4312 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4314 && (reg_equiv_address[regno] != 0
4315 || (reg_equiv_mem[regno] != 0
4316 && (! strict_memory_address_p (GET_MODE (x),
4317 XEXP (reg_equiv_mem[regno], 0))
4318 || ! offsettable_memref_p (reg_equiv_mem[regno])
4319 || num_not_at_initial_offset))))
4320 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4324 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4328 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4329 ind_levels, is_set_dest, insn);
4330 /* If we have replaced a reg with it's equivalent memory loc -
4331 that can still be handled here e.g. if it's in a paradoxical
4332 subreg - we must make the change in a copy, rather than using
4333 a destructive change. This way, find_reloads can still elect
4334 not to do the change. */
4335 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4337 x = shallow_copy_rtx (x);
4340 XEXP (x, i) = new_part;
4346 /* Return a mem ref for the memory equivalent of reg REGNO.
4347 This mem ref is not shared with anything. */
4350 make_memloc (ad, regno)
4354 /* We must rerun eliminate_regs, in case the elimination
4355 offsets have changed. */
4357 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4359 /* If TEM might contain a pseudo, we must copy it to avoid
4360 modifying it when we do the substitution for the reload. */
4361 if (rtx_varies_p (tem))
4362 tem = copy_rtx (tem);
4364 tem = gen_rtx_MEM (GET_MODE (ad), tem);
4365 MEM_COPY_ATTRIBUTES (tem, reg_equiv_memory_loc[regno]);
4369 /* Record all reloads needed for handling memory address AD
4370 which appears in *LOC in a memory reference to mode MODE
4371 which itself is found in location *MEMREFLOC.
4372 Note that we take shortcuts assuming that no multi-reg machine mode
4373 occurs as part of an address.
4375 OPNUM and TYPE specify the purpose of this reload.
4377 IND_LEVELS says how many levels of indirect addressing this machine
4380 INSN, if nonzero, is the insn in which we do the reload. It is used
4381 to determine if we may generate output reloads, and where to put USEs
4382 for pseudos that we have to replace with stack slots.
4384 Value is nonzero if this address is reloaded or replaced as a whole.
4385 This is interesting to the caller if the address is an autoincrement.
4387 Note that there is no verification that the address will be valid after
4388 this routine does its work. Instead, we rely on the fact that the address
4389 was valid when reload started. So we need only undo things that reload
4390 could have broken. These are wrong register types, pseudos not allocated
4391 to a hard register, and frame pointer elimination. */
4394 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn)
4395 enum machine_mode mode;
4400 enum reload_type type;
4405 int removed_and = 0;
4408 /* If the address is a register, see if it is a legitimate address and
4409 reload if not. We first handle the cases where we need not reload
4410 or where we must reload in a non-standard way. */
4412 if (GET_CODE (ad) == REG)
4416 if (reg_equiv_constant[regno] != 0
4417 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
4419 *loc = ad = reg_equiv_constant[regno];
4423 tem = reg_equiv_memory_loc[regno];
4426 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4428 tem = make_memloc (ad, regno);
4429 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4431 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
4432 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
4435 /* We can avoid a reload if the register's equivalent memory
4436 expression is valid as an indirect memory address.
4437 But not all addresses are valid in a mem used as an indirect
4438 address: only reg or reg+constant. */
4441 && strict_memory_address_p (mode, tem)
4442 && (GET_CODE (XEXP (tem, 0)) == REG
4443 || (GET_CODE (XEXP (tem, 0)) == PLUS
4444 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4445 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4447 /* TEM is not the same as what we'll be replacing the
4448 pseudo with after reload, put a USE in front of INSN
4449 in the final reload pass. */
4451 && num_not_at_initial_offset
4452 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4455 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
4456 /* This doesn't really count as replacing the address
4457 as a whole, since it is still a memory access. */
4465 /* The only remaining case where we can avoid a reload is if this is a
4466 hard register that is valid as a base register and which is not the
4467 subject of a CLOBBER in this insn. */
4469 else if (regno < FIRST_PSEUDO_REGISTER
4470 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4471 && ! regno_clobbered_p (regno, this_insn))
4474 /* If we do not have one of the cases above, we must do the reload. */
4475 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
4476 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4480 if (strict_memory_address_p (mode, ad))
4482 /* The address appears valid, so reloads are not needed.
4483 But the address may contain an eliminable register.
4484 This can happen because a machine with indirect addressing
4485 may consider a pseudo register by itself a valid address even when
4486 it has failed to get a hard reg.
4487 So do a tree-walk to find and eliminate all such regs. */
4489 /* But first quickly dispose of a common case. */
4490 if (GET_CODE (ad) == PLUS
4491 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4492 && GET_CODE (XEXP (ad, 0)) == REG
4493 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4496 subst_reg_equivs_changed = 0;
4497 *loc = subst_reg_equivs (ad, insn);
4499 if (! subst_reg_equivs_changed)
4502 /* Check result for validity after substitution. */
4503 if (strict_memory_address_p (mode, ad))
4507 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4512 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4517 *memrefloc = copy_rtx (*memrefloc);
4518 XEXP (*memrefloc, 0) = ad;
4519 move_replacements (&ad, &XEXP (*memrefloc, 0));
4525 /* The address is not valid. We have to figure out why. First see if
4526 we have an outer AND and remove it if so. Then analyze what's inside. */
4528 if (GET_CODE (ad) == AND)
4531 loc = &XEXP (ad, 0);
4535 /* One possibility for why the address is invalid is that it is itself
4536 a MEM. This can happen when the frame pointer is being eliminated, a
4537 pseudo is not allocated to a hard register, and the offset between the
4538 frame and stack pointers is not its initial value. In that case the
4539 pseudo will have been replaced by a MEM referring to the
4541 if (GET_CODE (ad) == MEM)
4543 /* First ensure that the address in this MEM is valid. Then, unless
4544 indirect addresses are valid, reload the MEM into a register. */
4546 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4547 opnum, ADDR_TYPE (type),
4548 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4550 /* If tem was changed, then we must create a new memory reference to
4551 hold it and store it back into memrefloc. */
4552 if (tem != ad && memrefloc)
4554 *memrefloc = copy_rtx (*memrefloc);
4555 copy_replacements (tem, XEXP (*memrefloc, 0));
4556 loc = &XEXP (*memrefloc, 0);
4558 loc = &XEXP (*loc, 0);
4561 /* Check similar cases as for indirect addresses as above except
4562 that we can allow pseudos and a MEM since they should have been
4563 taken care of above. */
4566 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4567 || GET_CODE (XEXP (tem, 0)) == MEM
4568 || ! (GET_CODE (XEXP (tem, 0)) == REG
4569 || (GET_CODE (XEXP (tem, 0)) == PLUS
4570 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4571 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4573 /* Must use TEM here, not AD, since it is the one that will
4574 have any subexpressions reloaded, if needed. */
4575 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4576 BASE_REG_CLASS, GET_MODE (tem),
4579 return ! removed_and;
4585 /* If we have address of a stack slot but it's not valid because the
4586 displacement is too large, compute the sum in a register.
4587 Handle all base registers here, not just fp/ap/sp, because on some
4588 targets (namely SH) we can also get too large displacements from
4589 big-endian corrections. */
4590 else if (GET_CODE (ad) == PLUS
4591 && GET_CODE (XEXP (ad, 0)) == REG
4592 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4593 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4594 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4596 /* Unshare the MEM rtx so we can safely alter it. */
4599 *memrefloc = copy_rtx (*memrefloc);
4600 loc = &XEXP (*memrefloc, 0);
4602 loc = &XEXP (*loc, 0);
4605 if (double_reg_address_ok)
4607 /* Unshare the sum as well. */
4608 *loc = ad = copy_rtx (ad);
4610 /* Reload the displacement into an index reg.
4611 We assume the frame pointer or arg pointer is a base reg. */
4612 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4613 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4619 /* If the sum of two regs is not necessarily valid,
4620 reload the sum into a base reg.
4621 That will at least work. */
4622 find_reloads_address_part (ad, loc, BASE_REG_CLASS,
4623 Pmode, opnum, type, ind_levels);
4625 return ! removed_and;
4628 /* If we have an indexed stack slot, there are three possible reasons why
4629 it might be invalid: The index might need to be reloaded, the address
4630 might have been made by frame pointer elimination and hence have a
4631 constant out of range, or both reasons might apply.
4633 We can easily check for an index needing reload, but even if that is the
4634 case, we might also have an invalid constant. To avoid making the
4635 conservative assumption and requiring two reloads, we see if this address
4636 is valid when not interpreted strictly. If it is, the only problem is
4637 that the index needs a reload and find_reloads_address_1 will take care
4640 If we decide to do something here, it must be that
4641 `double_reg_address_ok' is true and that this address rtl was made by
4642 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4643 rework the sum so that the reload register will be added to the index.
4644 This is safe because we know the address isn't shared.
4646 We check for fp/ap/sp as both the first and second operand of the
4649 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4650 && GET_CODE (XEXP (ad, 0)) == PLUS
4651 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4652 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4653 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4655 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4656 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4658 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4659 && ! memory_address_p (mode, ad))
4661 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4662 plus_constant (XEXP (XEXP (ad, 0), 0),
4663 INTVAL (XEXP (ad, 1))),
4664 XEXP (XEXP (ad, 0), 1));
4665 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4666 GET_MODE (ad), opnum, type, ind_levels);
4667 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4673 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4674 && GET_CODE (XEXP (ad, 0)) == PLUS
4675 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4676 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4677 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4679 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4680 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4682 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4683 && ! memory_address_p (mode, ad))
4685 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4686 XEXP (XEXP (ad, 0), 0),
4687 plus_constant (XEXP (XEXP (ad, 0), 1),
4688 INTVAL (XEXP (ad, 1))));
4689 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), BASE_REG_CLASS,
4690 GET_MODE (ad), opnum, type, ind_levels);
4691 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4697 /* See if address becomes valid when an eliminable register
4698 in a sum is replaced. */
4701 if (GET_CODE (ad) == PLUS)
4702 tem = subst_indexed_address (ad);
4703 if (tem != ad && strict_memory_address_p (mode, tem))
4705 /* Ok, we win that way. Replace any additional eliminable
4708 subst_reg_equivs_changed = 0;
4709 tem = subst_reg_equivs (tem, insn);
4711 /* Make sure that didn't make the address invalid again. */
4713 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4720 /* If constants aren't valid addresses, reload the constant address
4722 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4724 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4725 Unshare it so we can safely alter it. */
4726 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4727 && CONSTANT_POOL_ADDRESS_P (ad))
4729 *memrefloc = copy_rtx (*memrefloc);
4730 loc = &XEXP (*memrefloc, 0);
4732 loc = &XEXP (*loc, 0);
4735 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
4737 return ! removed_and;
4740 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
4744 /* Find all pseudo regs appearing in AD
4745 that are eliminable in favor of equivalent values
4746 and do not have hard regs; replace them by their equivalents.
4747 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4748 front of it for pseudos that we have to replace with stack slots. */
4751 subst_reg_equivs (ad, insn)
4755 register RTX_CODE code = GET_CODE (ad);
4757 register const char *fmt;
4773 register int regno = REGNO (ad);
4775 if (reg_equiv_constant[regno] != 0)
4777 subst_reg_equivs_changed = 1;
4778 return reg_equiv_constant[regno];
4780 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
4782 rtx mem = make_memloc (ad, regno);
4783 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
4785 subst_reg_equivs_changed = 1;
4786 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
4794 /* Quickly dispose of a common case. */
4795 if (XEXP (ad, 0) == frame_pointer_rtx
4796 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4804 fmt = GET_RTX_FORMAT (code);
4805 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4807 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
4811 /* Compute the sum of X and Y, making canonicalizations assumed in an
4812 address, namely: sum constant integers, surround the sum of two
4813 constants with a CONST, put the constant as the second operand, and
4814 group the constant on the outermost sum.
4816 This routine assumes both inputs are already in canonical form. */
4823 enum machine_mode mode = GET_MODE (x);
4825 if (mode == VOIDmode)
4826 mode = GET_MODE (y);
4828 if (mode == VOIDmode)
4831 if (GET_CODE (x) == CONST_INT)
4832 return plus_constant (y, INTVAL (x));
4833 else if (GET_CODE (y) == CONST_INT)
4834 return plus_constant (x, INTVAL (y));
4835 else if (CONSTANT_P (x))
4836 tem = x, x = y, y = tem;
4838 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
4839 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
4841 /* Note that if the operands of Y are specified in the opposite
4842 order in the recursive calls below, infinite recursion will occur. */
4843 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
4844 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
4846 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4847 constant will have been placed second. */
4848 if (CONSTANT_P (x) && CONSTANT_P (y))
4850 if (GET_CODE (x) == CONST)
4852 if (GET_CODE (y) == CONST)
4855 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
4858 return gen_rtx_PLUS (mode, x, y);
4861 /* If ADDR is a sum containing a pseudo register that should be
4862 replaced with a constant (from reg_equiv_constant),
4863 return the result of doing so, and also apply the associative
4864 law so that the result is more likely to be a valid address.
4865 (But it is not guaranteed to be one.)
4867 Note that at most one register is replaced, even if more are
4868 replaceable. Also, we try to put the result into a canonical form
4869 so it is more likely to be a valid address.
4871 In all other cases, return ADDR. */
4874 subst_indexed_address (addr)
4877 rtx op0 = 0, op1 = 0, op2 = 0;
4881 if (GET_CODE (addr) == PLUS)
4883 /* Try to find a register to replace. */
4884 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
4885 if (GET_CODE (op0) == REG
4886 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
4887 && reg_renumber[regno] < 0
4888 && reg_equiv_constant[regno] != 0)
4889 op0 = reg_equiv_constant[regno];
4890 else if (GET_CODE (op1) == REG
4891 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
4892 && reg_renumber[regno] < 0
4893 && reg_equiv_constant[regno] != 0)
4894 op1 = reg_equiv_constant[regno];
4895 else if (GET_CODE (op0) == PLUS
4896 && (tem = subst_indexed_address (op0)) != op0)
4898 else if (GET_CODE (op1) == PLUS
4899 && (tem = subst_indexed_address (op1)) != op1)
4904 /* Pick out up to three things to add. */
4905 if (GET_CODE (op1) == PLUS)
4906 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
4907 else if (GET_CODE (op0) == PLUS)
4908 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4910 /* Compute the sum. */
4912 op1 = form_sum (op1, op2);
4914 op0 = form_sum (op0, op1);
4921 /* Record the pseudo registers we must reload into hard registers in a
4922 subexpression of a would-be memory address, X referring to a value
4923 in mode MODE. (This function is not called if the address we find
4926 CONTEXT = 1 means we are considering regs as index regs,
4927 = 0 means we are considering them as base regs.
4929 OPNUM and TYPE specify the purpose of any reloads made.
4931 IND_LEVELS says how many levels of indirect addressing are
4932 supported at this point in the address.
4934 INSN, if nonzero, is the insn in which we do the reload. It is used
4935 to determine if we may generate output reloads.
4937 We return nonzero if X, as a whole, is reloaded or replaced. */
4939 /* Note that we take shortcuts assuming that no multi-reg machine mode
4940 occurs as part of an address.
4941 Also, this is not fully machine-customizable; it works for machines
4942 such as vaxes and 68000's and 32000's, but other possible machines
4943 could have addressing modes that this does not handle right. */
4946 find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
4947 enum machine_mode mode;
4952 enum reload_type type;
4956 register RTX_CODE code = GET_CODE (x);
4962 register rtx orig_op0 = XEXP (x, 0);
4963 register rtx orig_op1 = XEXP (x, 1);
4964 register RTX_CODE code0 = GET_CODE (orig_op0);
4965 register RTX_CODE code1 = GET_CODE (orig_op1);
4966 register rtx op0 = orig_op0;
4967 register rtx op1 = orig_op1;
4969 if (GET_CODE (op0) == SUBREG)
4971 op0 = SUBREG_REG (op0);
4972 code0 = GET_CODE (op0);
4973 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
4974 op0 = gen_rtx_REG (word_mode,
4975 REGNO (op0) + SUBREG_WORD (orig_op0));
4978 if (GET_CODE (op1) == SUBREG)
4980 op1 = SUBREG_REG (op1);
4981 code1 = GET_CODE (op1);
4982 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
4983 op1 = gen_rtx_REG (GET_MODE (op1),
4984 REGNO (op1) + SUBREG_WORD (orig_op1));
4987 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
4988 || code0 == ZERO_EXTEND || code1 == MEM)
4990 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
4991 type, ind_levels, insn);
4992 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
4993 type, ind_levels, insn);
4996 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
4997 || code1 == ZERO_EXTEND || code0 == MEM)
4999 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5000 type, ind_levels, insn);
5001 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5002 type, ind_levels, insn);
5005 else if (code0 == CONST_INT || code0 == CONST
5006 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5007 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5008 type, ind_levels, insn);
5010 else if (code1 == CONST_INT || code1 == CONST
5011 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5012 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5013 type, ind_levels, insn);
5015 else if (code0 == REG && code1 == REG)
5017 if (REG_OK_FOR_INDEX_P (op0)
5018 && REG_MODE_OK_FOR_BASE_P (op1, mode))
5020 else if (REG_OK_FOR_INDEX_P (op1)
5021 && REG_MODE_OK_FOR_BASE_P (op0, mode))
5023 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5024 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5025 type, ind_levels, insn);
5026 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5027 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5028 type, ind_levels, insn);
5029 else if (REG_OK_FOR_INDEX_P (op1))
5030 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5031 type, ind_levels, insn);
5032 else if (REG_OK_FOR_INDEX_P (op0))
5033 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5034 type, ind_levels, insn);
5037 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5038 type, ind_levels, insn);
5039 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5040 type, ind_levels, insn);
5044 else if (code0 == REG)
5046 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5047 type, ind_levels, insn);
5048 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5049 type, ind_levels, insn);
5052 else if (code1 == REG)
5054 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5055 type, ind_levels, insn);
5056 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5057 type, ind_levels, insn);
5067 if (GET_CODE (XEXP (x, 0)) == REG)
5069 register int regno = REGNO (XEXP (x, 0));
5073 /* A register that is incremented cannot be constant! */
5074 if (regno >= FIRST_PSEUDO_REGISTER
5075 && reg_equiv_constant[regno] != 0)
5078 /* Handle a register that is equivalent to a memory location
5079 which cannot be addressed directly. */
5080 if (reg_equiv_memory_loc[regno] != 0
5081 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5083 rtx tem = make_memloc (XEXP (x, 0), regno);
5084 if (reg_equiv_address[regno]
5085 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5087 /* First reload the memory location's address.
5088 We can't use ADDR_TYPE (type) here, because we need to
5089 write back the value after reading it, hence we actually
5090 need two registers. */
5091 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5092 &XEXP (tem, 0), opnum, type,
5094 /* Put this inside a new increment-expression. */
5095 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5096 /* Proceed to reload that, as if it contained a register. */
5100 /* If we have a hard register that is ok as an index,
5101 don't make a reload. If an autoincrement of a nice register
5102 isn't "valid", it must be that no autoincrement is "valid".
5103 If that is true and something made an autoincrement anyway,
5104 this must be a special context where one is allowed.
5105 (For example, a "push" instruction.)
5106 We can't improve this address, so leave it alone. */
5108 /* Otherwise, reload the autoincrement into a suitable hard reg
5109 and record how much to increment by. */
5111 if (reg_renumber[regno] >= 0)
5112 regno = reg_renumber[regno];
5113 if ((regno >= FIRST_PSEUDO_REGISTER
5114 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5115 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5122 /* If we can output the register afterwards, do so, this
5123 saves the extra update.
5124 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5125 CALL_INSN - and it does not set CC0.
5126 But don't do this if we cannot directly address the
5127 memory location, since this will make it harder to
5128 reuse address reloads, and increases register pressure.
5129 Also don't do this if we can probably update x directly. */
5130 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM
5132 : reg_equiv_mem[regno]);
5133 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5134 if (insn && GET_CODE (insn) == INSN && equiv
5135 && memory_operand (equiv, GET_MODE (equiv))
5137 && ! sets_cc0_p (PATTERN (insn))
5139 && ! (icode != CODE_FOR_nothing
5140 && ((*insn_data[icode].operand[0].predicate)
5142 && ((*insn_data[icode].operand[1].predicate)
5148 = push_reload (x, x, loc, loc,
5149 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5150 GET_MODE (x), GET_MODE (x), 0, 0,
5151 opnum, RELOAD_OTHER);
5153 /* If we created a new MEM based on reg_equiv_mem[REGNO], then
5154 LOC above is part of the new MEM, not the MEM in INSN.
5156 We must also replace the address of the MEM in INSN. */
5157 if (&XEXP (x_orig, 0) != loc)
5158 push_replacement (&XEXP (x_orig, 0), reloadnum, VOIDmode);
5164 = push_reload (x, NULL_RTX, loc, NULL_PTR,
5165 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5166 GET_MODE (x), GET_MODE (x), 0, 0,
5169 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5175 /* Update the REG_INC notes. */
5177 for (link = REG_NOTES (this_insn);
5178 link; link = XEXP (link, 1))
5179 if (REG_NOTE_KIND (link) == REG_INC
5180 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
5181 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5187 else if (GET_CODE (XEXP (x, 0)) == MEM)
5189 /* This is probably the result of a substitution, by eliminate_regs,
5190 of an equivalent address for a pseudo that was not allocated to a
5191 hard register. Verify that the specified address is valid and
5192 reload it into a register. */
5193 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5194 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5198 /* Since we know we are going to reload this item, don't decrement
5199 for the indirection level.
5201 Note that this is actually conservative: it would be slightly
5202 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5204 /* We can't use ADDR_TYPE (type) here, because we need to
5205 write back the value after reading it, hence we actually
5206 need two registers. */
5207 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5208 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5209 opnum, type, ind_levels, insn);
5211 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
5212 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5213 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5215 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5217 link = FIND_REG_INC_NOTE (this_insn, tem);
5219 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5226 /* This is probably the result of a substitution, by eliminate_regs, of
5227 an equivalent address for a pseudo that was not allocated to a hard
5228 register. Verify that the specified address is valid and reload it
5231 Since we know we are going to reload this item, don't decrement for
5232 the indirection level.
5234 Note that this is actually conservative: it would be slightly more
5235 efficient to use the value of SPILL_INDIRECT_LEVELS from
5238 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5239 opnum, ADDR_TYPE (type), ind_levels, insn);
5240 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
5241 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5242 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5247 register int regno = REGNO (x);
5249 if (reg_equiv_constant[regno] != 0)
5251 find_reloads_address_part (reg_equiv_constant[regno], loc,
5252 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5253 GET_MODE (x), opnum, type, ind_levels);
5257 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5258 that feeds this insn. */
5259 if (reg_equiv_mem[regno] != 0)
5261 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
5262 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5263 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5268 if (reg_equiv_memory_loc[regno]
5269 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5271 rtx tem = make_memloc (x, regno);
5272 if (reg_equiv_address[regno] != 0
5273 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5276 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5277 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5282 if (reg_renumber[regno] >= 0)
5283 regno = reg_renumber[regno];
5285 if ((regno >= FIRST_PSEUDO_REGISTER
5286 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5287 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5289 push_reload (x, NULL_RTX, loc, NULL_PTR,
5290 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5291 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5295 /* If a register appearing in an address is the subject of a CLOBBER
5296 in this insn, reload it into some other register to be safe.
5297 The CLOBBER is supposed to make the register unavailable
5298 from before this insn to after it. */
5299 if (regno_clobbered_p (regno, this_insn))
5301 push_reload (x, NULL_RTX, loc, NULL_PTR,
5302 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5303 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5310 if (GET_CODE (SUBREG_REG (x)) == REG)
5312 /* If this is a SUBREG of a hard register and the resulting register
5313 is of the wrong class, reload the whole SUBREG. This avoids
5314 needless copies if SUBREG_REG is multi-word. */
5315 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5317 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5319 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5320 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5322 push_reload (x, NULL_RTX, loc, NULL_PTR,
5323 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5324 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5328 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5329 is larger than the class size, then reload the whole SUBREG. */
5332 enum reg_class class = (context ? INDEX_REG_CLASS
5334 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5335 > reg_class_size[class])
5337 x = find_reloads_subreg_address (x, 0, opnum, type,
5339 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5340 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5352 register const char *fmt = GET_RTX_FORMAT (code);
5355 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5358 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5359 opnum, type, ind_levels, insn);
5366 /* X, which is found at *LOC, is a part of an address that needs to be
5367 reloaded into a register of class CLASS. If X is a constant, or if
5368 X is a PLUS that contains a constant, check that the constant is a
5369 legitimate operand and that we are supposed to be able to load
5370 it into the register.
5372 If not, force the constant into memory and reload the MEM instead.
5374 MODE is the mode to use, in case X is an integer constant.
5376 OPNUM and TYPE describe the purpose of any reloads made.
5378 IND_LEVELS says how many levels of indirect addressing this machine
5382 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
5385 enum reg_class class;
5386 enum machine_mode mode;
5388 enum reload_type type;
5392 && (! LEGITIMATE_CONSTANT_P (x)
5393 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5397 /* If this is a CONST_INT, it could have been created by a
5398 plus_constant call in eliminate_regs, which means it may be
5399 on the reload_obstack. reload_obstack will be freed later, so
5400 we can't allow such RTL to be put in the constant pool. There
5401 is code in force_const_mem to check for this case, but it doesn't
5402 work because we have already popped off the reload_obstack, so
5403 rtl_obstack == saveable_obstack is true at this point. */
5404 if (GET_CODE (x) == CONST_INT)
5405 tem = x = force_const_mem (mode, GEN_INT (INTVAL (x)));
5407 tem = x = force_const_mem (mode, x);
5409 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5410 opnum, type, ind_levels, 0);
5413 else if (GET_CODE (x) == PLUS
5414 && CONSTANT_P (XEXP (x, 1))
5415 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5416 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5420 /* See comment above. */
5421 if (GET_CODE (XEXP (x, 1)) == CONST_INT)
5422 tem = force_const_mem (GET_MODE (x), GEN_INT (INTVAL (XEXP (x, 1))));
5424 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5426 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5427 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5428 opnum, type, ind_levels, 0);
5431 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5432 mode, VOIDmode, 0, 0, opnum, type);
5435 /* X, a subreg of a pseudo, is a part of an address that needs to be
5438 If the pseudo is equivalent to a memory location that cannot be directly
5439 addressed, make the necessary address reloads.
5441 If address reloads have been necessary, or if the address is changed
5442 by register elimination, return the rtx of the memory location;
5443 otherwise, return X.
5445 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5448 OPNUM and TYPE identify the purpose of the reload.
5450 IND_LEVELS says how many levels of indirect addressing are
5451 supported at this point in the address.
5453 INSN, if nonzero, is the insn in which we do the reload. It is used
5454 to determine where to put USEs for pseudos that we have to replace with
5458 find_reloads_subreg_address (x, force_replace, opnum, type,
5463 enum reload_type type;
5467 int regno = REGNO (SUBREG_REG (x));
5469 if (reg_equiv_memory_loc[regno])
5471 /* If the address is not directly addressable, or if the address is not
5472 offsettable, then it must be replaced. */
5474 && (reg_equiv_address[regno]
5475 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5478 if (force_replace || num_not_at_initial_offset)
5480 rtx tem = make_memloc (SUBREG_REG (x), regno);
5482 /* If the address changes because of register elimination, then
5483 it must be replaced. */
5485 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5487 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
5489 if (BYTES_BIG_ENDIAN)
5493 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5494 offset += MIN (size, UNITS_PER_WORD);
5495 size = GET_MODE_SIZE (GET_MODE (x));
5496 offset -= MIN (size, UNITS_PER_WORD);
5498 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5499 PUT_MODE (tem, GET_MODE (x));
5500 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5501 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
5503 /* If this is not a toplevel operand, find_reloads doesn't see
5504 this substitution. We have to emit a USE of the pseudo so
5505 that delete_output_reload can see it. */
5506 if (replace_reloads && recog_data.operand[opnum] != x)
5507 emit_insn_before (gen_rtx_USE (VOIDmode, SUBREG_REG (x)), insn);
5515 /* Substitute into the current INSN the registers into which we have reloaded
5516 the things that need reloading. The array `replacements'
5517 says contains the locations of all pointers that must be changed
5518 and says what to replace them with.
5520 Return the rtx that X translates into; usually X, but modified. */
5527 for (i = 0; i < n_replacements; i++)
5529 register struct replacement *r = &replacements[i];
5530 register rtx reloadreg = rld[r->what].reg_rtx;
5533 /* Encapsulate RELOADREG so its machine mode matches what
5534 used to be there. Note that gen_lowpart_common will
5535 do the wrong thing if RELOADREG is multi-word. RELOADREG
5536 will always be a REG here. */
5537 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5538 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5540 /* If we are putting this into a SUBREG and RELOADREG is a
5541 SUBREG, we would be making nested SUBREGs, so we have to fix
5542 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5544 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5546 if (GET_MODE (*r->subreg_loc)
5547 == GET_MODE (SUBREG_REG (reloadreg)))
5548 *r->subreg_loc = SUBREG_REG (reloadreg);
5551 *r->where = SUBREG_REG (reloadreg);
5552 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
5556 *r->where = reloadreg;
5558 /* If reload got no reg and isn't optional, something's wrong. */
5559 else if (! rld[r->what].optional)
5564 /* Make a copy of any replacements being done into X and move those copies
5565 to locations in Y, a copy of X. We only look at the highest level of
5569 copy_replacements (x, y)
5574 enum rtx_code code = GET_CODE (x);
5575 const char *fmt = GET_RTX_FORMAT (code);
5576 struct replacement *r;
5578 /* We can't support X being a SUBREG because we might then need to know its
5579 location if something inside it was replaced. */
5583 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5585 for (j = 0; j < n_replacements; j++)
5587 if (replacements[j].subreg_loc == &XEXP (x, i))
5589 r = &replacements[n_replacements++];
5590 r->where = replacements[j].where;
5591 r->subreg_loc = &XEXP (y, i);
5592 r->what = replacements[j].what;
5593 r->mode = replacements[j].mode;
5595 else if (replacements[j].where == &XEXP (x, i))
5597 r = &replacements[n_replacements++];
5598 r->where = &XEXP (y, i);
5600 r->what = replacements[j].what;
5601 r->mode = replacements[j].mode;
5606 /* Change any replacements being done to *X to be done to *Y */
5609 move_replacements (x, y)
5615 for (i = 0; i < n_replacements; i++)
5616 if (replacements[i].subreg_loc == x)
5617 replacements[i].subreg_loc = y;
5618 else if (replacements[i].where == x)
5620 replacements[i].where = y;
5621 replacements[i].subreg_loc = 0;
5625 /* If LOC was scheduled to be replaced by something, return the replacement.
5626 Otherwise, return *LOC. */
5629 find_replacement (loc)
5632 struct replacement *r;
5634 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
5636 rtx reloadreg = rld[r->what].reg_rtx;
5638 if (reloadreg && r->where == loc)
5640 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
5641 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5645 else if (reloadreg && r->subreg_loc == loc)
5647 /* RELOADREG must be either a REG or a SUBREG.
5649 ??? Is it actually still ever a SUBREG? If so, why? */
5651 if (GET_CODE (reloadreg) == REG)
5652 return gen_rtx_REG (GET_MODE (*loc),
5653 REGNO (reloadreg) + SUBREG_WORD (*loc));
5654 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
5657 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
5658 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
5662 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5663 what's inside and make a new rtl if so. */
5664 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
5665 || GET_CODE (*loc) == MULT)
5667 rtx x = find_replacement (&XEXP (*loc, 0));
5668 rtx y = find_replacement (&XEXP (*loc, 1));
5670 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
5671 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
5677 /* Return nonzero if register in range [REGNO, ENDREGNO)
5678 appears either explicitly or implicitly in X
5679 other than being stored into (except for earlyclobber operands).
5681 References contained within the substructure at LOC do not count.
5682 LOC may be zero, meaning don't ignore anything.
5684 This is similar to refers_to_regno_p in rtlanal.c except that we
5685 look at equivalences for pseudos that didn't get hard registers. */
5688 refers_to_regno_for_reload_p (regno, endregno, x, loc)
5689 unsigned int regno, endregno;
5702 code = GET_CODE (x);
5709 /* If this is a pseudo, a hard register must not have been allocated.
5710 X must therefore either be a constant or be in memory. */
5711 if (r >= FIRST_PSEUDO_REGISTER)
5713 if (reg_equiv_memory_loc[r])
5714 return refers_to_regno_for_reload_p (regno, endregno,
5715 reg_equiv_memory_loc[r],
5718 if (reg_equiv_constant[r])
5724 return (endregno > r
5725 && regno < r + (r < FIRST_PSEUDO_REGISTER
5726 ? HARD_REGNO_NREGS (r, GET_MODE (x))
5730 /* If this is a SUBREG of a hard reg, we can see exactly which
5731 registers are being modified. Otherwise, handle normally. */
5732 if (GET_CODE (SUBREG_REG (x)) == REG
5733 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5735 unsigned int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5736 unsigned int inner_endregno
5737 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
5738 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5740 return endregno > inner_regno && regno < inner_endregno;
5746 if (&SET_DEST (x) != loc
5747 /* Note setting a SUBREG counts as referring to the REG it is in for
5748 a pseudo but not for hard registers since we can
5749 treat each word individually. */
5750 && ((GET_CODE (SET_DEST (x)) == SUBREG
5751 && loc != &SUBREG_REG (SET_DEST (x))
5752 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
5753 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
5754 && refers_to_regno_for_reload_p (regno, endregno,
5755 SUBREG_REG (SET_DEST (x)),
5757 /* If the output is an earlyclobber operand, this is
5759 || ((GET_CODE (SET_DEST (x)) != REG
5760 || earlyclobber_operand_p (SET_DEST (x)))
5761 && refers_to_regno_for_reload_p (regno, endregno,
5762 SET_DEST (x), loc))))
5765 if (code == CLOBBER || loc == &SET_SRC (x))
5774 /* X does not match, so try its subexpressions. */
5776 fmt = GET_RTX_FORMAT (code);
5777 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5779 if (fmt[i] == 'e' && loc != &XEXP (x, i))
5787 if (refers_to_regno_for_reload_p (regno, endregno,
5791 else if (fmt[i] == 'E')
5794 for (j = XVECLEN (x, i) - 1; j >=0; j--)
5795 if (loc != &XVECEXP (x, i, j)
5796 && refers_to_regno_for_reload_p (regno, endregno,
5797 XVECEXP (x, i, j), loc))
5804 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5805 we check if any register number in X conflicts with the relevant register
5806 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5807 contains a MEM (we don't bother checking for memory addresses that can't
5808 conflict because we expect this to be a rare case.
5810 This function is similar to reg_overlap_mention_p in rtlanal.c except
5811 that we look at equivalences for pseudos that didn't get hard registers. */
5814 reg_overlap_mentioned_for_reload_p (x, in)
5817 int regno, endregno;
5819 /* Overly conservative. */
5820 if (GET_CODE (x) == STRICT_LOW_PART)
5823 /* If either argument is a constant, then modifying X can not affect IN. */
5824 if (CONSTANT_P (x) || CONSTANT_P (in))
5826 else if (GET_CODE (x) == SUBREG)
5828 regno = REGNO (SUBREG_REG (x));
5829 if (regno < FIRST_PSEUDO_REGISTER)
5830 regno += SUBREG_WORD (x);
5832 else if (GET_CODE (x) == REG)
5836 /* If this is a pseudo, it must not have been assigned a hard register.
5837 Therefore, it must either be in memory or be a constant. */
5839 if (regno >= FIRST_PSEUDO_REGISTER)
5841 if (reg_equiv_memory_loc[regno])
5842 return refers_to_mem_for_reload_p (in);
5843 else if (reg_equiv_constant[regno])
5848 else if (GET_CODE (x) == MEM)
5849 return refers_to_mem_for_reload_p (in);
5850 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
5851 || GET_CODE (x) == CC0)
5852 return reg_mentioned_p (x, in);
5856 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
5857 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5859 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
5862 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5866 refers_to_mem_for_reload_p (x)
5872 if (GET_CODE (x) == MEM)
5875 if (GET_CODE (x) == REG)
5876 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
5877 && reg_equiv_memory_loc[REGNO (x)]);
5879 fmt = GET_RTX_FORMAT (GET_CODE (x));
5880 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
5882 && (GET_CODE (XEXP (x, i)) == MEM
5883 || refers_to_mem_for_reload_p (XEXP (x, i))))
5889 /* Check the insns before INSN to see if there is a suitable register
5890 containing the same value as GOAL.
5891 If OTHER is -1, look for a register in class CLASS.
5892 Otherwise, just see if register number OTHER shares GOAL's value.
5894 Return an rtx for the register found, or zero if none is found.
5896 If RELOAD_REG_P is (short *)1,
5897 we reject any hard reg that appears in reload_reg_rtx
5898 because such a hard reg is also needed coming into this insn.
5900 If RELOAD_REG_P is any other nonzero value,
5901 it is a vector indexed by hard reg number
5902 and we reject any hard reg whose element in the vector is nonnegative
5903 as well as any that appears in reload_reg_rtx.
5905 If GOAL is zero, then GOALREG is a register number; we look
5906 for an equivalent for that register.
5908 MODE is the machine mode of the value we want an equivalence for.
5909 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5911 This function is used by jump.c as well as in the reload pass.
5913 If GOAL is the sum of the stack pointer and a constant, we treat it
5914 as if it were a constant except that sp is required to be unchanging. */
5917 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
5920 enum reg_class class;
5922 short *reload_reg_p;
5924 enum machine_mode mode;
5926 register rtx p = insn;
5927 rtx goaltry, valtry, value, where;
5929 register int regno = -1;
5933 int goal_mem_addr_varies = 0;
5934 int need_stable_sp = 0;
5940 else if (GET_CODE (goal) == REG)
5941 regno = REGNO (goal);
5942 else if (GET_CODE (goal) == MEM)
5944 enum rtx_code code = GET_CODE (XEXP (goal, 0));
5945 if (MEM_VOLATILE_P (goal))
5947 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
5949 /* An address with side effects must be reexecuted. */
5962 else if (CONSTANT_P (goal))
5964 else if (GET_CODE (goal) == PLUS
5965 && XEXP (goal, 0) == stack_pointer_rtx
5966 && CONSTANT_P (XEXP (goal, 1)))
5967 goal_const = need_stable_sp = 1;
5968 else if (GET_CODE (goal) == PLUS
5969 && XEXP (goal, 0) == frame_pointer_rtx
5970 && CONSTANT_P (XEXP (goal, 1)))
5975 /* Scan insns back from INSN, looking for one that copies
5976 a value into or out of GOAL.
5977 Stop and give up if we reach a label. */
5982 if (p == 0 || GET_CODE (p) == CODE_LABEL)
5985 if (GET_CODE (p) == INSN
5986 /* If we don't want spill regs ... */
5987 && (! (reload_reg_p != 0
5988 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
5989 /* ... then ignore insns introduced by reload; they aren't
5990 useful and can cause results in reload_as_needed to be
5991 different from what they were when calculating the need for
5992 spills. If we notice an input-reload insn here, we will
5993 reject it below, but it might hide a usable equivalent.
5994 That makes bad code. It may even abort: perhaps no reg was
5995 spilled for this insn because it was assumed we would find
5997 || INSN_UID (p) < reload_first_uid))
6000 pat = single_set (p);
6002 /* First check for something that sets some reg equal to GOAL. */
6005 && true_regnum (SET_SRC (pat)) == regno
6006 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6009 && true_regnum (SET_DEST (pat)) == regno
6010 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6012 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6013 /* When looking for stack pointer + const,
6014 make sure we don't use a stack adjust. */
6015 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6016 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6018 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6019 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6021 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6022 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6023 /* If we are looking for a constant,
6024 and something equivalent to that constant was copied
6025 into a reg, we can use that reg. */
6026 || (goal_const && REG_NOTES (p) != 0
6027 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6028 && ((rtx_equal_p (XEXP (tem, 0), goal)
6030 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6031 || (GET_CODE (SET_DEST (pat)) == REG
6032 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6033 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6035 && GET_CODE (goal) == CONST_INT
6037 = operand_subword (XEXP (tem, 0), 0, 0,
6039 && rtx_equal_p (goal, goaltry)
6041 = operand_subword (SET_DEST (pat), 0, 0,
6043 && (valueno = true_regnum (valtry)) >= 0)))
6044 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6046 && GET_CODE (SET_DEST (pat)) == REG
6047 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6048 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6050 && GET_CODE (goal) == CONST_INT
6051 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6053 && rtx_equal_p (goal, goaltry)
6055 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6056 && (valueno = true_regnum (valtry)) >= 0)))
6059 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
6060 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6070 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6071 (or copying VALUE into GOAL, if GOAL is also a register).
6072 Now verify that VALUE is really valid. */
6074 /* VALUENO is the register number of VALUE; a hard register. */
6076 /* Don't try to re-use something that is killed in this insn. We want
6077 to be able to trust REG_UNUSED notes. */
6078 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6081 /* If we propose to get the value from the stack pointer or if GOAL is
6082 a MEM based on the stack pointer, we need a stable SP. */
6083 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6084 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6088 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6089 if (GET_MODE (value) != mode)
6092 /* Reject VALUE if it was loaded from GOAL
6093 and is also a register that appears in the address of GOAL. */
6095 if (goal_mem && value == SET_DEST (single_set (where))
6096 && refers_to_regno_for_reload_p (valueno,
6098 + HARD_REGNO_NREGS (valueno, mode)),
6102 /* Reject registers that overlap GOAL. */
6104 if (!goal_mem && !goal_const
6105 && regno + (int) HARD_REGNO_NREGS (regno, mode) > valueno
6106 && regno < valueno + (int) HARD_REGNO_NREGS (valueno, mode))
6109 nregs = HARD_REGNO_NREGS (regno, mode);
6110 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6112 /* Reject VALUE if it is one of the regs reserved for reloads.
6113 Reload1 knows how to reuse them anyway, and it would get
6114 confused if we allocated one without its knowledge.
6115 (Now that insns introduced by reload are ignored above,
6116 this case shouldn't happen, but I'm not positive.) */
6118 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6121 for (i = 0; i < valuenregs; ++i)
6122 if (reload_reg_p[valueno + i] >= 0)
6126 /* Reject VALUE if it is a register being used for an input reload
6127 even if it is not one of those reserved. */
6129 if (reload_reg_p != 0)
6132 for (i = 0; i < n_reloads; i++)
6133 if (rld[i].reg_rtx != 0 && rld[i].in)
6135 int regno1 = REGNO (rld[i].reg_rtx);
6136 int nregs1 = HARD_REGNO_NREGS (regno1,
6137 GET_MODE (rld[i].reg_rtx));
6138 if (regno1 < valueno + valuenregs
6139 && regno1 + nregs1 > valueno)
6145 /* We must treat frame pointer as varying here,
6146 since it can vary--in a nonlocal goto as generated by expand_goto. */
6147 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6149 /* Now verify that the values of GOAL and VALUE remain unaltered
6150 until INSN is reached. */
6159 /* Don't trust the conversion past a function call
6160 if either of the two is in a call-clobbered register, or memory. */
6161 if (GET_CODE (p) == CALL_INSN)
6165 if (goal_mem || need_stable_sp)
6168 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6169 for (i = 0; i < nregs; ++i)
6170 if (call_used_regs[regno + i])
6173 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6174 for (i = 0; i < valuenregs; ++i)
6175 if (call_used_regs[valueno + i])
6179 #ifdef NON_SAVING_SETJMP
6180 if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE
6181 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6185 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
6189 /* Watch out for unspec_volatile, and volatile asms. */
6190 if (volatile_insn_p (pat))
6193 /* If this insn P stores in either GOAL or VALUE, return 0.
6194 If GOAL is a memory ref and this insn writes memory, return 0.
6195 If GOAL is a memory ref and its address is not constant,
6196 and this insn P changes a register used in GOAL, return 0. */
6198 if (GET_CODE (pat) == COND_EXEC)
6199 pat = COND_EXEC_CODE (pat);
6200 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6202 register rtx dest = SET_DEST (pat);
6203 while (GET_CODE (dest) == SUBREG
6204 || GET_CODE (dest) == ZERO_EXTRACT
6205 || GET_CODE (dest) == SIGN_EXTRACT
6206 || GET_CODE (dest) == STRICT_LOW_PART)
6207 dest = XEXP (dest, 0);
6208 if (GET_CODE (dest) == REG)
6210 register int xregno = REGNO (dest);
6212 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6213 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6216 if (xregno < regno + nregs && xregno + xnregs > regno)
6218 if (xregno < valueno + valuenregs
6219 && xregno + xnregs > valueno)
6221 if (goal_mem_addr_varies
6222 && reg_overlap_mentioned_for_reload_p (dest, goal))
6224 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6227 else if (goal_mem && GET_CODE (dest) == MEM
6228 && ! push_operand (dest, GET_MODE (dest)))
6230 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6231 && reg_equiv_memory_loc[regno] != 0)
6233 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6236 else if (GET_CODE (pat) == PARALLEL)
6239 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6241 register rtx v1 = XVECEXP (pat, 0, i);
6242 if (GET_CODE (v1) == COND_EXEC)
6243 v1 = COND_EXEC_CODE (v1);
6244 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6246 register rtx dest = SET_DEST (v1);
6247 while (GET_CODE (dest) == SUBREG
6248 || GET_CODE (dest) == ZERO_EXTRACT
6249 || GET_CODE (dest) == SIGN_EXTRACT
6250 || GET_CODE (dest) == STRICT_LOW_PART)
6251 dest = XEXP (dest, 0);
6252 if (GET_CODE (dest) == REG)
6254 register int xregno = REGNO (dest);
6256 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6257 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6260 if (xregno < regno + nregs
6261 && xregno + xnregs > regno)
6263 if (xregno < valueno + valuenregs
6264 && xregno + xnregs > valueno)
6266 if (goal_mem_addr_varies
6267 && reg_overlap_mentioned_for_reload_p (dest,
6270 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6273 else if (goal_mem && GET_CODE (dest) == MEM
6274 && ! push_operand (dest, GET_MODE (dest)))
6276 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6277 && reg_equiv_memory_loc[regno] != 0)
6279 else if (need_stable_sp
6280 && push_operand (dest, GET_MODE (dest)))
6286 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
6290 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6291 link = XEXP (link, 1))
6293 pat = XEXP (link, 0);
6294 if (GET_CODE (pat) == CLOBBER)
6296 register rtx dest = SET_DEST (pat);
6298 if (GET_CODE (dest) == REG)
6300 register int xregno = REGNO (dest);
6302 = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6304 if (xregno < regno + nregs
6305 && xregno + xnregs > regno)
6307 else if (xregno < valueno + valuenregs
6308 && xregno + xnregs > valueno)
6310 else if (goal_mem_addr_varies
6311 && reg_overlap_mentioned_for_reload_p (dest,
6316 else if (goal_mem && GET_CODE (dest) == MEM
6317 && ! push_operand (dest, GET_MODE (dest)))
6319 else if (need_stable_sp
6320 && push_operand (dest, GET_MODE (dest)))
6327 /* If this insn auto-increments or auto-decrements
6328 either regno or valueno, return 0 now.
6329 If GOAL is a memory ref and its address is not constant,
6330 and this insn P increments a register used in GOAL, return 0. */
6334 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6335 if (REG_NOTE_KIND (link) == REG_INC
6336 && GET_CODE (XEXP (link, 0)) == REG)
6338 register int incno = REGNO (XEXP (link, 0));
6339 if (incno < regno + nregs && incno >= regno)
6341 if (incno < valueno + valuenregs && incno >= valueno)
6343 if (goal_mem_addr_varies
6344 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6354 /* Find a place where INCED appears in an increment or decrement operator
6355 within X, and return the amount INCED is incremented or decremented by.
6356 The value is always positive. */
6359 find_inc_amount (x, inced)
6362 register enum rtx_code code = GET_CODE (x);
6363 register const char *fmt;
6368 register rtx addr = XEXP (x, 0);
6369 if ((GET_CODE (addr) == PRE_DEC
6370 || GET_CODE (addr) == POST_DEC
6371 || GET_CODE (addr) == PRE_INC
6372 || GET_CODE (addr) == POST_INC)
6373 && XEXP (addr, 0) == inced)
6374 return GET_MODE_SIZE (GET_MODE (x));
6377 fmt = GET_RTX_FORMAT (code);
6378 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6382 register int tem = find_inc_amount (XEXP (x, i), inced);
6389 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6391 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6401 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6404 regno_clobbered_p (regno, insn)
6408 if (GET_CODE (PATTERN (insn)) == CLOBBER
6409 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6410 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
6412 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6414 int i = XVECLEN (PATTERN (insn), 0) - 1;
6418 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6419 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
6420 && REGNO (XEXP (elt, 0)) == regno)
6428 static const char *reload_when_needed_name[] =
6431 "RELOAD_FOR_OUTPUT",
6433 "RELOAD_FOR_INPUT_ADDRESS",
6434 "RELOAD_FOR_INPADDR_ADDRESS",
6435 "RELOAD_FOR_OUTPUT_ADDRESS",
6436 "RELOAD_FOR_OUTADDR_ADDRESS",
6437 "RELOAD_FOR_OPERAND_ADDRESS",
6438 "RELOAD_FOR_OPADDR_ADDR",
6440 "RELOAD_FOR_OTHER_ADDRESS"
6443 static const char * const reg_class_names[] = REG_CLASS_NAMES;
6445 /* These functions are used to print the variables set by 'find_reloads' */
6448 debug_reload_to_stream (f)
6456 for (r = 0; r < n_reloads; r++)
6458 fprintf (f, "Reload %d: ", r);
6462 fprintf (f, "reload_in (%s) = ",
6463 GET_MODE_NAME (rld[r].inmode));
6464 print_inline_rtx (f, rld[r].in, 24);
6465 fprintf (f, "\n\t");
6468 if (rld[r].out != 0)
6470 fprintf (f, "reload_out (%s) = ",
6471 GET_MODE_NAME (rld[r].outmode));
6472 print_inline_rtx (f, rld[r].out, 24);
6473 fprintf (f, "\n\t");
6476 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
6478 fprintf (f, "%s (opnum = %d)",
6479 reload_when_needed_name[(int) rld[r].when_needed],
6482 if (rld[r].optional)
6483 fprintf (f, ", optional");
6485 if (rld[r].nongroup)
6486 fprintf (stderr, ", nongroup");
6488 if (rld[r].inc != 0)
6489 fprintf (f, ", inc by %d", rld[r].inc);
6491 if (rld[r].nocombine)
6492 fprintf (f, ", can't combine");
6494 if (rld[r].secondary_p)
6495 fprintf (f, ", secondary_reload_p");
6497 if (rld[r].in_reg != 0)
6499 fprintf (f, "\n\treload_in_reg: ");
6500 print_inline_rtx (f, rld[r].in_reg, 24);
6503 if (rld[r].out_reg != 0)
6505 fprintf (f, "\n\treload_out_reg: ");
6506 print_inline_rtx (f, rld[r].out_reg, 24);
6509 if (rld[r].reg_rtx != 0)
6511 fprintf (f, "\n\treload_reg_rtx: ");
6512 print_inline_rtx (f, rld[r].reg_rtx, 24);
6516 if (rld[r].secondary_in_reload != -1)
6518 fprintf (f, "%ssecondary_in_reload = %d",
6519 prefix, rld[r].secondary_in_reload);
6523 if (rld[r].secondary_out_reload != -1)
6524 fprintf (f, "%ssecondary_out_reload = %d\n",
6525 prefix, rld[r].secondary_out_reload);
6528 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
6530 fprintf (stderr, "%ssecondary_in_icode = %s", prefix,
6531 insn_data[rld[r].secondary_in_icode].name);
6535 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
6536 fprintf (stderr, "%ssecondary_out_icode = %s", prefix,
6537 insn_data[rld[r].secondary_out_icode].name);
6546 debug_reload_to_stream (stderr);