1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92-7, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
93 #include "insn-config.h"
94 #include "insn-codes.h"
98 #include "hard-reg-set.h"
104 #ifndef REGISTER_MOVE_COST
105 #define REGISTER_MOVE_COST(x, y) 2
108 #ifndef REGNO_MODE_OK_FOR_BASE_P
109 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
112 #ifndef REG_MODE_OK_FOR_BASE_P
113 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
116 /* The variables set up by `find_reloads' are:
118 n_reloads number of distinct reloads needed; max reload # + 1
119 tables indexed by reload number
120 reload_in rtx for value to reload from
121 reload_out rtx for where to store reload-reg afterward if nec
122 (often the same as reload_in)
123 reload_reg_class enum reg_class, saying what regs to reload into
124 reload_inmode enum machine_mode; mode this operand should have
125 when reloaded, on input.
126 reload_outmode enum machine_mode; mode this operand should have
127 when reloaded, on output.
128 reload_optional char, nonzero for an optional reload.
129 Optional reloads are ignored unless the
130 value is already sitting in a register.
131 reload_inc int, positive amount to increment or decrement by if
132 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
133 Ignored otherwise (don't assume it is zero).
134 reload_in_reg rtx. A reg for which reload_in is the equivalent.
135 If reload_in is a symbol_ref which came from
136 reg_equiv_constant, then this is the pseudo
137 which has that symbol_ref as equivalent.
138 reload_reg_rtx rtx. This is the register to reload into.
139 If it is zero when `find_reloads' returns,
140 you must find a suitable register in the class
141 specified by reload_reg_class, and store here
142 an rtx for that register with mode from
143 reload_inmode or reload_outmode.
144 reload_nocombine char, nonzero if this reload shouldn't be
145 combined with another reload.
146 reload_opnum int, operand number being reloaded. This is
147 used to group related reloads and need not always
148 be equal to the actual operand number in the insn,
149 though it current will be; for in-out operands, it
150 is one of the two operand numbers.
151 reload_when_needed enum, classifies reload as needed either for
152 addressing an input reload, addressing an output,
153 for addressing a non-reloaded mem ref,
154 or for unspecified purposes (i.e., more than one
156 reload_secondary_p int, 1 if this is a secondary register for one
158 reload_secondary_in_reload
159 reload_secondary_out_reload
160 int, gives the reload number of a secondary
161 reload, when needed; otherwise -1
162 reload_secondary_in_icode
163 reload_secondary_out_icode
164 enum insn_code, if a secondary reload is required,
165 gives the INSN_CODE that uses the secondary
166 reload as a scratch register, or CODE_FOR_nothing
167 if the secondary reload register is to be an
168 intermediate register. */
171 rtx reload_in[MAX_RELOADS];
172 rtx reload_out[MAX_RELOADS];
173 enum reg_class reload_reg_class[MAX_RELOADS];
174 enum machine_mode reload_inmode[MAX_RELOADS];
175 enum machine_mode reload_outmode[MAX_RELOADS];
176 rtx reload_reg_rtx[MAX_RELOADS];
177 char reload_optional[MAX_RELOADS];
178 int reload_inc[MAX_RELOADS];
179 rtx reload_in_reg[MAX_RELOADS];
180 char reload_nocombine[MAX_RELOADS];
181 int reload_opnum[MAX_RELOADS];
182 enum reload_type reload_when_needed[MAX_RELOADS];
183 int reload_secondary_p[MAX_RELOADS];
184 int reload_secondary_in_reload[MAX_RELOADS];
185 int reload_secondary_out_reload[MAX_RELOADS];
186 enum insn_code reload_secondary_in_icode[MAX_RELOADS];
187 enum insn_code reload_secondary_out_icode[MAX_RELOADS];
189 /* All the "earlyclobber" operands of the current insn
190 are recorded here. */
192 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
194 int reload_n_operands;
196 /* Replacing reloads.
198 If `replace_reloads' is nonzero, then as each reload is recorded
199 an entry is made for it in the table `replacements'.
200 Then later `subst_reloads' can look through that table and
201 perform all the replacements needed. */
203 /* Nonzero means record the places to replace. */
204 static int replace_reloads;
206 /* Each replacement is recorded with a structure like this. */
209 rtx *where; /* Location to store in */
210 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
211 a SUBREG; 0 otherwise. */
212 int what; /* which reload this is for */
213 enum machine_mode mode; /* mode it must have */
216 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
218 /* Number of replacements currently recorded. */
219 static int n_replacements;
221 /* Used to track what is modified by an operand. */
224 int reg_flag; /* Nonzero if referencing a register. */
225 int safe; /* Nonzero if this can't conflict with anything. */
226 rtx base; /* Base address for MEM. */
227 HOST_WIDE_INT start; /* Starting offset or register number. */
228 HOST_WIDE_INT end; /* Ending offset or register number. */
231 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
232 (see reg_equiv_address). */
233 static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
234 static int n_memlocs;
236 #ifdef SECONDARY_MEMORY_NEEDED
238 /* Save MEMs needed to copy from one class of registers to another. One MEM
239 is used per mode, but normally only one or two modes are ever used.
241 We keep two versions, before and after register elimination. The one
242 after register elimination is record separately for each operand. This
243 is done in case the address is not valid to be sure that we separately
246 static rtx secondary_memlocs[NUM_MACHINE_MODES];
247 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
250 /* The instruction we are doing reloads for;
251 so we can test whether a register dies in it. */
252 static rtx this_insn;
254 /* Nonzero if this instruction is a user-specified asm with operands. */
255 static int this_insn_is_asm;
257 /* If hard_regs_live_known is nonzero,
258 we can tell which hard regs are currently live,
259 at least enough to succeed in choosing dummy reloads. */
260 static int hard_regs_live_known;
262 /* Indexed by hard reg number,
263 element is nonnegative if hard reg has been spilled.
264 This vector is passed to `find_reloads' as an argument
265 and is not changed here. */
266 static short *static_reload_reg_p;
268 /* Set to 1 in subst_reg_equivs if it changes anything. */
269 static int subst_reg_equivs_changed;
271 /* On return from push_reload, holds the reload-number for the OUT
272 operand, which can be different for that from the input operand. */
273 static int output_reloadnum;
275 /* Compare two RTX's. */
276 #define MATCHES(x, y) \
277 (x == y || (x != 0 && (GET_CODE (x) == REG \
278 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
279 : rtx_equal_p (x, y) && ! side_effects_p (x))))
281 /* Indicates if two reloads purposes are for similar enough things that we
282 can merge their reloads. */
283 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
284 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
285 || ((when1) == (when2) && (op1) == (op2)) \
286 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
287 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
288 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
289 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
290 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
292 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
293 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
294 ((when1) != (when2) \
295 || ! ((op1) == (op2) \
296 || (when1) == RELOAD_FOR_INPUT \
297 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
298 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
300 /* If we are going to reload an address, compute the reload type to
302 #define ADDR_TYPE(type) \
303 ((type) == RELOAD_FOR_INPUT_ADDRESS \
304 ? RELOAD_FOR_INPADDR_ADDRESS \
305 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
306 ? RELOAD_FOR_OUTADDR_ADDRESS \
309 #ifdef HAVE_SECONDARY_RELOADS
310 static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class,
311 enum machine_mode, enum reload_type,
314 static enum reg_class find_valid_class PROTO((enum machine_mode, int));
315 static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
316 enum machine_mode, enum machine_mode,
317 int, int, int, enum reload_type));
318 static void push_replacement PROTO((rtx *, int, enum machine_mode));
319 static void combine_reloads PROTO((void));
320 static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
321 enum machine_mode, enum machine_mode,
322 enum reg_class, int, int));
323 static int earlyclobber_operand_p PROTO((rtx));
324 static int hard_reg_set_here_p PROTO((int, int, rtx));
325 static struct decomposition decompose PROTO((rtx));
326 static int immune_p PROTO((rtx, rtx, struct decomposition));
327 static int alternative_allows_memconst PROTO((char *, int));
328 static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int));
329 static rtx make_memloc PROTO((rtx, int));
330 static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
331 int, enum reload_type, int, rtx));
332 static rtx subst_reg_equivs PROTO((rtx));
333 static rtx subst_indexed_address PROTO((rtx));
334 static int find_reloads_address_1 PROTO((enum machine_mode, rtx, int, rtx *,
335 int, enum reload_type,int, rtx));
336 static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
337 enum machine_mode, int,
338 enum reload_type, int));
339 static int find_inc_amount PROTO((rtx, rtx));
341 #ifdef HAVE_SECONDARY_RELOADS
343 /* Determine if any secondary reloads are needed for loading (if IN_P is
344 non-zero) or storing (if IN_P is zero) X to or from a reload register of
345 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
346 are needed, push them.
348 Return the reload number of the secondary reload we made, or -1 if
349 we didn't need one. *PICODE is set to the insn_code to use if we do
350 need a secondary reload. */
353 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
359 enum reg_class reload_class;
360 enum machine_mode reload_mode;
361 enum reload_type type;
362 enum insn_code *picode;
364 enum reg_class class = NO_REGS;
365 enum machine_mode mode = reload_mode;
366 enum insn_code icode = CODE_FOR_nothing;
367 enum reg_class t_class = NO_REGS;
368 enum machine_mode t_mode = VOIDmode;
369 enum insn_code t_icode = CODE_FOR_nothing;
370 enum reload_type secondary_type;
371 int s_reload, t_reload = -1;
373 if (type == RELOAD_FOR_INPUT_ADDRESS
374 || type == RELOAD_FOR_OUTPUT_ADDRESS
375 || type == RELOAD_FOR_INPADDR_ADDRESS
376 || type == RELOAD_FOR_OUTADDR_ADDRESS)
377 secondary_type = type;
379 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
381 *picode = CODE_FOR_nothing;
383 /* If X is a paradoxical SUBREG, use the inner value to determine both the
384 mode and object being reloaded. */
385 if (GET_CODE (x) == SUBREG
386 && (GET_MODE_SIZE (GET_MODE (x))
387 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
390 reload_mode = GET_MODE (x);
393 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
394 is still a pseudo-register by now, it *must* have an equivalent MEM
395 but we don't want to assume that), use that equivalent when seeing if
396 a secondary reload is needed since whether or not a reload is needed
397 might be sensitive to the form of the MEM. */
399 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
400 && reg_equiv_mem[REGNO (x)] != 0)
401 x = reg_equiv_mem[REGNO (x)];
403 #ifdef SECONDARY_INPUT_RELOAD_CLASS
405 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
408 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
410 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
413 /* If we don't need any secondary registers, done. */
414 if (class == NO_REGS)
417 /* Get a possible insn to use. If the predicate doesn't accept X, don't
420 icode = (in_p ? reload_in_optab[(int) reload_mode]
421 : reload_out_optab[(int) reload_mode]);
423 if (icode != CODE_FOR_nothing
424 && insn_operand_predicate[(int) icode][in_p]
425 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
426 icode = CODE_FOR_nothing;
428 /* If we will be using an insn, see if it can directly handle the reload
429 register we will be using. If it can, the secondary reload is for a
430 scratch register. If it can't, we will use the secondary reload for
431 an intermediate register and require a tertiary reload for the scratch
434 if (icode != CODE_FOR_nothing)
436 /* If IN_P is non-zero, the reload register will be the output in
437 operand 0. If IN_P is zero, the reload register will be the input
438 in operand 1. Outputs should have an initial "=", which we must
441 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
442 enum reg_class insn_class
443 = (insn_letter == 'r' ? GENERAL_REGS
444 : REG_CLASS_FROM_LETTER (insn_letter));
446 if (insn_class == NO_REGS
447 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
448 /* The scratch register's constraint must start with "=&". */
449 || insn_operand_constraint[(int) icode][2][0] != '='
450 || insn_operand_constraint[(int) icode][2][1] != '&')
453 if (reg_class_subset_p (reload_class, insn_class))
454 mode = insn_operand_mode[(int) icode][2];
457 char t_letter = insn_operand_constraint[(int) icode][2][2];
459 t_mode = insn_operand_mode[(int) icode][2];
460 t_class = (t_letter == 'r' ? GENERAL_REGS
461 : REG_CLASS_FROM_LETTER (t_letter));
463 icode = CODE_FOR_nothing;
467 /* This case isn't valid, so fail. Reload is allowed to use the same
468 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
469 in the case of a secondary register, we actually need two different
470 registers for correct code. We fail here to prevent the possibility of
471 silently generating incorrect code later.
473 The convention is that secondary input reloads are valid only if the
474 secondary_class is different from class. If you have such a case, you
475 can not use secondary reloads, you must work around the problem some
478 Allow this when MODE is not reload_mode and assume that the generated
479 code handles this case (it does on the Alpha, which is the only place
480 this currently happens). */
482 if (in_p && class == reload_class && mode == reload_mode)
485 /* If we need a tertiary reload, see if we have one we can reuse or else
488 if (t_class != NO_REGS)
490 for (t_reload = 0; t_reload < n_reloads; t_reload++)
491 if (reload_secondary_p[t_reload]
492 && (reg_class_subset_p (t_class, reload_reg_class[t_reload])
493 || reg_class_subset_p (reload_reg_class[t_reload], t_class))
494 && ((in_p && reload_inmode[t_reload] == t_mode)
495 || (! in_p && reload_outmode[t_reload] == t_mode))
496 && ((in_p && (reload_secondary_in_icode[t_reload]
497 == CODE_FOR_nothing))
498 || (! in_p &&(reload_secondary_out_icode[t_reload]
499 == CODE_FOR_nothing)))
500 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
501 && MERGABLE_RELOADS (secondary_type,
502 reload_when_needed[t_reload],
503 opnum, reload_opnum[t_reload]))
506 reload_inmode[t_reload] = t_mode;
508 reload_outmode[t_reload] = t_mode;
510 if (reg_class_subset_p (t_class, reload_reg_class[t_reload]))
511 reload_reg_class[t_reload] = t_class;
513 reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum);
514 reload_optional[t_reload] &= optional;
515 reload_secondary_p[t_reload] = 1;
516 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload],
517 opnum, reload_opnum[t_reload]))
518 reload_when_needed[t_reload] = RELOAD_OTHER;
521 if (t_reload == n_reloads)
523 /* We need to make a new tertiary reload for this register class. */
524 reload_in[t_reload] = reload_out[t_reload] = 0;
525 reload_reg_class[t_reload] = t_class;
526 reload_inmode[t_reload] = in_p ? t_mode : VOIDmode;
527 reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode;
528 reload_reg_rtx[t_reload] = 0;
529 reload_optional[t_reload] = optional;
530 reload_inc[t_reload] = 0;
531 /* Maybe we could combine these, but it seems too tricky. */
532 reload_nocombine[t_reload] = 1;
533 reload_in_reg[t_reload] = 0;
534 reload_opnum[t_reload] = opnum;
535 reload_when_needed[t_reload] = secondary_type;
536 reload_secondary_in_reload[t_reload] = -1;
537 reload_secondary_out_reload[t_reload] = -1;
538 reload_secondary_in_icode[t_reload] = CODE_FOR_nothing;
539 reload_secondary_out_icode[t_reload] = CODE_FOR_nothing;
540 reload_secondary_p[t_reload] = 1;
546 /* See if we can reuse an existing secondary reload. */
547 for (s_reload = 0; s_reload < n_reloads; s_reload++)
548 if (reload_secondary_p[s_reload]
549 && (reg_class_subset_p (class, reload_reg_class[s_reload])
550 || reg_class_subset_p (reload_reg_class[s_reload], class))
551 && ((in_p && reload_inmode[s_reload] == mode)
552 || (! in_p && reload_outmode[s_reload] == mode))
553 && ((in_p && reload_secondary_in_reload[s_reload] == t_reload)
554 || (! in_p && reload_secondary_out_reload[s_reload] == t_reload))
555 && ((in_p && reload_secondary_in_icode[s_reload] == t_icode)
556 || (! in_p && reload_secondary_out_icode[s_reload] == t_icode))
557 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
558 && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload],
559 opnum, reload_opnum[s_reload]))
562 reload_inmode[s_reload] = mode;
564 reload_outmode[s_reload] = mode;
566 if (reg_class_subset_p (class, reload_reg_class[s_reload]))
567 reload_reg_class[s_reload] = class;
569 reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum);
570 reload_optional[s_reload] &= optional;
571 reload_secondary_p[s_reload] = 1;
572 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload],
573 opnum, reload_opnum[s_reload]))
574 reload_when_needed[s_reload] = RELOAD_OTHER;
577 if (s_reload == n_reloads)
579 #ifdef SECONDARY_MEMORY_NEEDED
580 /* If we need a memory location to copy between the two reload regs,
581 set it up now. Note that we do the input case before making
582 the reload and the output case after. This is due to the
583 way reloads are output. */
585 if (in_p && icode == CODE_FOR_nothing
586 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
587 get_secondary_mem (x, reload_mode, opnum, type);
590 /* We need to make a new secondary reload for this register class. */
591 reload_in[s_reload] = reload_out[s_reload] = 0;
592 reload_reg_class[s_reload] = class;
594 reload_inmode[s_reload] = in_p ? mode : VOIDmode;
595 reload_outmode[s_reload] = ! in_p ? mode : VOIDmode;
596 reload_reg_rtx[s_reload] = 0;
597 reload_optional[s_reload] = optional;
598 reload_inc[s_reload] = 0;
599 /* Maybe we could combine these, but it seems too tricky. */
600 reload_nocombine[s_reload] = 1;
601 reload_in_reg[s_reload] = 0;
602 reload_opnum[s_reload] = opnum;
603 reload_when_needed[s_reload] = secondary_type;
604 reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1;
605 reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1;
606 reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing;
607 reload_secondary_out_icode[s_reload]
608 = ! in_p ? t_icode : CODE_FOR_nothing;
609 reload_secondary_p[s_reload] = 1;
613 #ifdef SECONDARY_MEMORY_NEEDED
614 if (! in_p && icode == CODE_FOR_nothing
615 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
616 get_secondary_mem (x, mode, opnum, type);
623 #endif /* HAVE_SECONDARY_RELOADS */
625 #ifdef SECONDARY_MEMORY_NEEDED
627 /* Return a memory location that will be used to copy X in mode MODE.
628 If we haven't already made a location for this mode in this insn,
629 call find_reloads_address on the location being returned. */
632 get_secondary_mem (x, mode, opnum, type)
634 enum machine_mode mode;
636 enum reload_type type;
641 /* By default, if MODE is narrower than a word, widen it to a word.
642 This is required because most machines that require these memory
643 locations do not support short load and stores from all registers
644 (e.g., FP registers). */
646 #ifdef SECONDARY_MEMORY_NEEDED_MODE
647 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
649 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
650 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
653 /* If we already have made a MEM for this operand in MODE, return it. */
654 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
655 return secondary_memlocs_elim[(int) mode][opnum];
657 /* If this is the first time we've tried to get a MEM for this mode,
658 allocate a new one. `something_changed' in reload will get set
659 by noticing that the frame size has changed. */
661 if (secondary_memlocs[(int) mode] == 0)
663 #ifdef SECONDARY_MEMORY_NEEDED_RTX
664 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
666 secondary_memlocs[(int) mode]
667 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
671 /* Get a version of the address doing any eliminations needed. If that
672 didn't give us a new MEM, make a new one if it isn't valid. */
674 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
675 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
677 if (! mem_valid && loc == secondary_memlocs[(int) mode])
678 loc = copy_rtx (loc);
680 /* The only time the call below will do anything is if the stack
681 offset is too large. In that case IND_LEVELS doesn't matter, so we
682 can just pass a zero. Adjust the type to be the address of the
683 corresponding object. If the address was valid, save the eliminated
684 address. If it wasn't valid, we need to make a reload each time, so
689 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
690 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
693 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
697 secondary_memlocs_elim[(int) mode][opnum] = loc;
701 /* Clear any secondary memory locations we've made. */
704 clear_secondary_mem ()
706 bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);
708 #endif /* SECONDARY_MEMORY_NEEDED */
710 /* Find the largest class for which every register number plus N is valid in
711 M1 (if in range). Abort if no such class exists. */
713 static enum reg_class
714 find_valid_class (m1, n)
715 enum machine_mode m1;
720 enum reg_class best_class;
723 for (class = 1; class < N_REG_CLASSES; class++)
726 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
727 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
728 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
729 && ! HARD_REGNO_MODE_OK (regno + n, m1))
732 if (! bad && reg_class_size[class] > best_size)
733 best_class = class, best_size = reg_class_size[class];
742 /* Record one reload that needs to be performed.
743 IN is an rtx saying where the data are to be found before this instruction.
744 OUT says where they must be stored after the instruction.
745 (IN is zero for data not read, and OUT is zero for data not written.)
746 INLOC and OUTLOC point to the places in the instructions where
747 IN and OUT were found.
748 If IN and OUT are both non-zero, it means the same register must be used
749 to reload both IN and OUT.
751 CLASS is a register class required for the reloaded data.
752 INMODE is the machine mode that the instruction requires
753 for the reg that replaces IN and OUTMODE is likewise for OUT.
755 If IN is zero, then OUT's location and mode should be passed as
758 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
760 OPTIONAL nonzero means this reload does not need to be performed:
761 it can be discarded if that is more convenient.
763 OPNUM and TYPE say what the purpose of this reload is.
765 The return value is the reload-number for this reload.
767 If both IN and OUT are nonzero, in some rare cases we might
768 want to make two separate reloads. (Actually we never do this now.)
769 Therefore, the reload-number for OUT is stored in
770 output_reloadnum when we return; the return value applies to IN.
771 Usually (presently always), when IN and OUT are nonzero,
772 the two reload-numbers are equal, but the caller should be careful to
776 push_reload (in, out, inloc, outloc, class,
777 inmode, outmode, strict_low, optional, opnum, type)
778 register rtx in, out;
780 enum reg_class class;
781 enum machine_mode inmode, outmode;
785 enum reload_type type;
789 int dont_remove_subreg = 0;
790 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
791 int secondary_in_reload = -1, secondary_out_reload = -1;
792 enum insn_code secondary_in_icode = CODE_FOR_nothing;
793 enum insn_code secondary_out_icode = CODE_FOR_nothing;
795 /* INMODE and/or OUTMODE could be VOIDmode if no mode
796 has been specified for the operand. In that case,
797 use the operand's mode as the mode to reload. */
798 if (inmode == VOIDmode && in != 0)
799 inmode = GET_MODE (in);
800 if (outmode == VOIDmode && out != 0)
801 outmode = GET_MODE (out);
803 /* If IN is a pseudo register everywhere-equivalent to a constant, and
804 it is not in a hard register, reload straight from the constant,
805 since we want to get rid of such pseudo registers.
806 Often this is done earlier, but not always in find_reloads_address. */
807 if (in != 0 && GET_CODE (in) == REG)
809 register int regno = REGNO (in);
811 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
812 && reg_equiv_constant[regno] != 0)
813 in = reg_equiv_constant[regno];
816 /* Likewise for OUT. Of course, OUT will never be equivalent to
817 an actual constant, but it might be equivalent to a memory location
818 (in the case of a parameter). */
819 if (out != 0 && GET_CODE (out) == REG)
821 register int regno = REGNO (out);
823 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
824 && reg_equiv_constant[regno] != 0)
825 out = reg_equiv_constant[regno];
828 /* If we have a read-write operand with an address side-effect,
829 change either IN or OUT so the side-effect happens only once. */
830 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
832 if (GET_CODE (XEXP (in, 0)) == POST_INC
833 || GET_CODE (XEXP (in, 0)) == POST_DEC)
834 in = gen_rtx_MEM (GET_MODE (in), XEXP (XEXP (in, 0), 0));
835 if (GET_CODE (XEXP (in, 0)) == PRE_INC
836 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
837 out = gen_rtx_MEM (GET_MODE (out), XEXP (XEXP (out, 0), 0));
840 /* If we are reloading a (SUBREG constant ...), really reload just the
841 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
842 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
843 a pseudo and hence will become a MEM) with M1 wider than M2 and the
844 register is a pseudo, also reload the inside expression.
845 For machines that extend byte loads, do this for any SUBREG of a pseudo
846 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
847 M2 is an integral mode that gets extended when loaded.
848 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
849 either M1 is not valid for R or M2 is wider than a word but we only
850 need one word to store an M2-sized quantity in R.
851 (However, if OUT is nonzero, we need to reload the reg *and*
852 the subreg, so do nothing here, and let following statement handle it.)
854 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
855 we can't handle it here because CONST_INT does not indicate a mode.
857 Similarly, we must reload the inside expression if we have a
858 STRICT_LOW_PART (presumably, in == out in the cas).
860 Also reload the inner expression if it does not require a secondary
861 reload but the SUBREG does.
863 Finally, reload the inner expression if it is a register that is in
864 the class whose registers cannot be referenced in a different size
865 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
866 cannot reload just the inside since we might end up with the wrong
869 if (in != 0 && GET_CODE (in) == SUBREG && SUBREG_WORD (in) == 0
870 #ifdef CLASS_CANNOT_CHANGE_SIZE
871 && class != CLASS_CANNOT_CHANGE_SIZE
873 && (CONSTANT_P (SUBREG_REG (in))
874 || GET_CODE (SUBREG_REG (in)) == PLUS
876 || (((GET_CODE (SUBREG_REG (in)) == REG
877 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
878 || GET_CODE (SUBREG_REG (in)) == MEM)
879 && ((GET_MODE_SIZE (inmode)
880 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
881 #ifdef LOAD_EXTEND_OP
882 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
883 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
885 && (GET_MODE_SIZE (inmode)
886 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
887 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
888 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
890 #ifdef WORD_REGISTER_OPERATIONS
891 || ((GET_MODE_SIZE (inmode)
892 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
893 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
894 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
898 || (GET_CODE (SUBREG_REG (in)) == REG
899 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
900 /* The case where out is nonzero
901 is handled differently in the following statement. */
902 && (out == 0 || SUBREG_WORD (in) == 0)
903 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
904 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
906 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
908 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
909 GET_MODE (SUBREG_REG (in)))))
910 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
913 #ifdef SECONDARY_INPUT_RELOAD_CLASS
914 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
915 && (SECONDARY_INPUT_RELOAD_CLASS (class,
916 GET_MODE (SUBREG_REG (in)),
920 #ifdef CLASS_CANNOT_CHANGE_SIZE
921 || (GET_CODE (SUBREG_REG (in)) == REG
922 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
923 && (TEST_HARD_REG_BIT
924 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
925 REGNO (SUBREG_REG (in))))
926 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
927 != GET_MODE_SIZE (inmode)))
931 in_subreg_loc = inloc;
932 inloc = &SUBREG_REG (in);
934 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
935 if (GET_CODE (in) == MEM)
936 /* This is supposed to happen only for paradoxical subregs made by
937 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
938 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
941 inmode = GET_MODE (in);
944 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
945 either M1 is not valid for R or M2 is wider than a word but we only
946 need one word to store an M2-sized quantity in R.
948 However, we must reload the inner reg *as well as* the subreg in
951 /* Similar issue for (SUBREG constant ...) if it was not handled by the
952 code above. This can happen if SUBREG_WORD != 0. */
954 if (in != 0 && GET_CODE (in) == SUBREG
955 && (CONSTANT_P (SUBREG_REG (in))
956 || (GET_CODE (SUBREG_REG (in)) == REG
957 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
958 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in))
961 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
962 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
964 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
966 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
967 GET_MODE (SUBREG_REG (in)))))))))
969 /* This relies on the fact that emit_reload_insns outputs the
970 instructions for input reloads of type RELOAD_OTHER in the same
971 order as the reloads. Thus if the outer reload is also of type
972 RELOAD_OTHER, we are guaranteed that this inner reload will be
973 output before the outer reload. */
974 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
975 find_valid_class (inmode, SUBREG_WORD (in)),
976 VOIDmode, VOIDmode, 0, 0, opnum, type);
977 dont_remove_subreg = 1;
980 /* Similarly for paradoxical and problematical SUBREGs on the output.
981 Note that there is no reason we need worry about the previous value
982 of SUBREG_REG (out); even if wider than out,
983 storing in a subreg is entitled to clobber it all
984 (except in the case of STRICT_LOW_PART,
985 and in that case the constraint should label it input-output.) */
986 if (out != 0 && GET_CODE (out) == SUBREG && SUBREG_WORD (out) == 0
987 #ifdef CLASS_CANNOT_CHANGE_SIZE
988 && class != CLASS_CANNOT_CHANGE_SIZE
990 && (CONSTANT_P (SUBREG_REG (out))
992 || (((GET_CODE (SUBREG_REG (out)) == REG
993 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
994 || GET_CODE (SUBREG_REG (out)) == MEM)
995 && ((GET_MODE_SIZE (outmode)
996 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
997 #ifdef WORD_REGISTER_OPERATIONS
998 || ((GET_MODE_SIZE (outmode)
999 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1000 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1001 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1005 || (GET_CODE (SUBREG_REG (out)) == REG
1006 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1007 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1008 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1010 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1012 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1013 GET_MODE (SUBREG_REG (out)))))
1014 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
1015 + SUBREG_WORD (out)),
1017 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1018 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1019 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1020 GET_MODE (SUBREG_REG (out)),
1024 #ifdef CLASS_CANNOT_CHANGE_SIZE
1025 || (GET_CODE (SUBREG_REG (out)) == REG
1026 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1027 && (TEST_HARD_REG_BIT
1028 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
1029 REGNO (SUBREG_REG (out))))
1030 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1031 != GET_MODE_SIZE (outmode)))
1035 out_subreg_loc = outloc;
1036 outloc = &SUBREG_REG (out);
1038 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1039 if (GET_CODE (out) == MEM
1040 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1043 outmode = GET_MODE (out);
1046 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1047 either M1 is not valid for R or M2 is wider than a word but we only
1048 need one word to store an M2-sized quantity in R.
1050 However, we must reload the inner reg *as well as* the subreg in
1051 that case. In this case, the inner reg is an in-out reload. */
1053 if (out != 0 && GET_CODE (out) == SUBREG
1054 && GET_CODE (SUBREG_REG (out)) == REG
1055 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1056 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)) + SUBREG_WORD (out),
1058 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1059 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1061 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1063 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1064 GET_MODE (SUBREG_REG (out)))))))
1066 /* This relies on the fact that emit_reload_insns outputs the
1067 instructions for output reloads of type RELOAD_OTHER in reverse
1068 order of the reloads. Thus if the outer reload is also of type
1069 RELOAD_OTHER, we are guaranteed that this inner reload will be
1070 output after the outer reload. */
1071 dont_remove_subreg = 1;
1072 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1074 find_valid_class (outmode, SUBREG_WORD (out)),
1075 VOIDmode, VOIDmode, 0, 0,
1076 opnum, RELOAD_OTHER);
1079 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1080 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1081 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1082 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1085 /* If IN is a SUBREG of a hard register, make a new REG. This
1086 simplifies some of the cases below. */
1088 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1089 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1090 && ! dont_remove_subreg)
1091 in = gen_rtx_REG (GET_MODE (in),
1092 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
1094 /* Similarly for OUT. */
1095 if (out != 0 && GET_CODE (out) == SUBREG
1096 && GET_CODE (SUBREG_REG (out)) == REG
1097 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1098 && ! dont_remove_subreg)
1099 out = gen_rtx_REG (GET_MODE (out),
1100 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
1102 /* Narrow down the class of register wanted if that is
1103 desirable on this machine for efficiency. */
1105 class = PREFERRED_RELOAD_CLASS (in, class);
1107 /* Output reloads may need analogous treatment, different in detail. */
1108 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1110 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1113 /* Make sure we use a class that can handle the actual pseudo
1114 inside any subreg. For example, on the 386, QImode regs
1115 can appear within SImode subregs. Although GENERAL_REGS
1116 can handle SImode, QImode needs a smaller class. */
1117 #ifdef LIMIT_RELOAD_CLASS
1119 class = LIMIT_RELOAD_CLASS (inmode, class);
1120 else if (in != 0 && GET_CODE (in) == SUBREG)
1121 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1124 class = LIMIT_RELOAD_CLASS (outmode, class);
1125 if (out != 0 && GET_CODE (out) == SUBREG)
1126 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1129 /* Verify that this class is at least possible for the mode that
1131 if (this_insn_is_asm)
1133 enum machine_mode mode;
1134 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1138 if (mode == VOIDmode)
1140 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1145 outmode = word_mode;
1147 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1148 if (HARD_REGNO_MODE_OK (i, mode)
1149 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1151 int nregs = HARD_REGNO_NREGS (i, mode);
1154 for (j = 1; j < nregs; j++)
1155 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1160 if (i == FIRST_PSEUDO_REGISTER)
1162 error_for_asm (this_insn, "impossible register constraint in `asm'");
1167 if (class == NO_REGS)
1170 /* We can use an existing reload if the class is right
1171 and at least one of IN and OUT is a match
1172 and the other is at worst neutral.
1173 (A zero compared against anything is neutral.)
1175 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
1176 for the same thing since that can cause us to need more reload registers
1177 than we otherwise would. */
1179 for (i = 0; i < n_reloads; i++)
1180 if ((reg_class_subset_p (class, reload_reg_class[i])
1181 || reg_class_subset_p (reload_reg_class[i], class))
1182 /* If the existing reload has a register, it must fit our class. */
1183 && (reload_reg_rtx[i] == 0
1184 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1185 true_regnum (reload_reg_rtx[i])))
1186 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
1187 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
1189 (out != 0 && MATCHES (reload_out[i], out)
1190 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
1191 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
1192 && MERGABLE_RELOADS (type, reload_when_needed[i],
1193 opnum, reload_opnum[i]))
1196 /* Reloading a plain reg for input can match a reload to postincrement
1197 that reg, since the postincrement's value is the right value.
1198 Likewise, it can match a preincrement reload, since we regard
1199 the preincrementation as happening before any ref in this insn
1200 to that register. */
1202 for (i = 0; i < n_reloads; i++)
1203 if ((reg_class_subset_p (class, reload_reg_class[i])
1204 || reg_class_subset_p (reload_reg_class[i], class))
1205 /* If the existing reload has a register, it must fit our class. */
1206 && (reload_reg_rtx[i] == 0
1207 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1208 true_regnum (reload_reg_rtx[i])))
1209 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
1210 && ((GET_CODE (in) == REG
1211 && (GET_CODE (reload_in[i]) == POST_INC
1212 || GET_CODE (reload_in[i]) == POST_DEC
1213 || GET_CODE (reload_in[i]) == PRE_INC
1214 || GET_CODE (reload_in[i]) == PRE_DEC)
1215 && MATCHES (XEXP (reload_in[i], 0), in))
1217 (GET_CODE (reload_in[i]) == REG
1218 && (GET_CODE (in) == POST_INC
1219 || GET_CODE (in) == POST_DEC
1220 || GET_CODE (in) == PRE_INC
1221 || GET_CODE (in) == PRE_DEC)
1222 && MATCHES (XEXP (in, 0), reload_in[i])))
1223 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
1224 && MERGABLE_RELOADS (type, reload_when_needed[i],
1225 opnum, reload_opnum[i]))
1227 /* Make sure reload_in ultimately has the increment,
1228 not the plain register. */
1229 if (GET_CODE (in) == REG)
1236 /* See if we need a secondary reload register to move between CLASS
1237 and IN or CLASS and OUT. Get the icode and push any required reloads
1238 needed for each of them if so. */
1240 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1243 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1244 &secondary_in_icode);
1247 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1248 if (out != 0 && GET_CODE (out) != SCRATCH)
1249 secondary_out_reload
1250 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1251 type, &secondary_out_icode);
1254 /* We found no existing reload suitable for re-use.
1255 So add an additional reload. */
1257 #ifdef SECONDARY_MEMORY_NEEDED
1258 /* If a memory location is needed for the copy, make one. */
1259 if (in != 0 && GET_CODE (in) == REG
1260 && REGNO (in) < FIRST_PSEUDO_REGISTER
1261 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1263 get_secondary_mem (in, inmode, opnum, type);
1268 reload_out[i] = out;
1269 reload_reg_class[i] = class;
1270 reload_inmode[i] = inmode;
1271 reload_outmode[i] = outmode;
1272 reload_reg_rtx[i] = 0;
1273 reload_optional[i] = optional;
1275 reload_nocombine[i] = 0;
1276 reload_in_reg[i] = inloc ? *inloc : 0;
1277 reload_opnum[i] = opnum;
1278 reload_when_needed[i] = type;
1279 reload_secondary_in_reload[i] = secondary_in_reload;
1280 reload_secondary_out_reload[i] = secondary_out_reload;
1281 reload_secondary_in_icode[i] = secondary_in_icode;
1282 reload_secondary_out_icode[i] = secondary_out_icode;
1283 reload_secondary_p[i] = 0;
1287 #ifdef SECONDARY_MEMORY_NEEDED
1288 if (out != 0 && GET_CODE (out) == REG
1289 && REGNO (out) < FIRST_PSEUDO_REGISTER
1290 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1292 get_secondary_mem (out, outmode, opnum, type);
1297 /* We are reusing an existing reload,
1298 but we may have additional information for it.
1299 For example, we may now have both IN and OUT
1300 while the old one may have just one of them. */
1302 /* The modes can be different. If they are, we want to reload in
1303 the larger mode, so that the value is valid for both modes. */
1304 if (inmode != VOIDmode
1305 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (reload_inmode[i]))
1306 reload_inmode[i] = inmode;
1307 if (outmode != VOIDmode
1308 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (reload_outmode[i]))
1309 reload_outmode[i] = outmode;
1313 reload_out[i] = out;
1314 if (reg_class_subset_p (class, reload_reg_class[i]))
1315 reload_reg_class[i] = class;
1316 reload_optional[i] &= optional;
1317 if (MERGE_TO_OTHER (type, reload_when_needed[i],
1318 opnum, reload_opnum[i]))
1319 reload_when_needed[i] = RELOAD_OTHER;
1320 reload_opnum[i] = MIN (reload_opnum[i], opnum);
1323 /* If the ostensible rtx being reload differs from the rtx found
1324 in the location to substitute, this reload is not safe to combine
1325 because we cannot reliably tell whether it appears in the insn. */
1327 if (in != 0 && in != *inloc)
1328 reload_nocombine[i] = 1;
1331 /* This was replaced by changes in find_reloads_address_1 and the new
1332 function inc_for_reload, which go with a new meaning of reload_inc. */
1334 /* If this is an IN/OUT reload in an insn that sets the CC,
1335 it must be for an autoincrement. It doesn't work to store
1336 the incremented value after the insn because that would clobber the CC.
1337 So we must do the increment of the value reloaded from,
1338 increment it, store it back, then decrement again. */
1339 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1343 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1344 /* If we did not find a nonzero amount-to-increment-by,
1345 that contradicts the belief that IN is being incremented
1346 in an address in this insn. */
1347 if (reload_inc[i] == 0)
1352 /* If we will replace IN and OUT with the reload-reg,
1353 record where they are located so that substitution need
1354 not do a tree walk. */
1356 if (replace_reloads)
1360 register struct replacement *r = &replacements[n_replacements++];
1362 r->subreg_loc = in_subreg_loc;
1366 if (outloc != 0 && outloc != inloc)
1368 register struct replacement *r = &replacements[n_replacements++];
1371 r->subreg_loc = out_subreg_loc;
1376 /* If this reload is just being introduced and it has both
1377 an incoming quantity and an outgoing quantity that are
1378 supposed to be made to match, see if either one of the two
1379 can serve as the place to reload into.
1381 If one of them is acceptable, set reload_reg_rtx[i]
1384 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1386 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1388 reload_reg_class[i], i,
1389 earlyclobber_operand_p (out));
1391 /* If the outgoing register already contains the same value
1392 as the incoming one, we can dispense with loading it.
1393 The easiest way to tell the caller that is to give a phony
1394 value for the incoming operand (same as outgoing one). */
1395 if (reload_reg_rtx[i] == out
1396 && (GET_CODE (in) == REG || CONSTANT_P (in))
1397 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1398 static_reload_reg_p, i, inmode))
1402 /* If this is an input reload and the operand contains a register that
1403 dies in this insn and is used nowhere else, see if it is the right class
1404 to be used for this reload. Use it if so. (This occurs most commonly
1405 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1406 this if it is also an output reload that mentions the register unless
1407 the output is a SUBREG that clobbers an entire register.
1409 Note that the operand might be one of the spill regs, if it is a
1410 pseudo reg and we are in a block where spilling has not taken place.
1411 But if there is no spilling in this block, that is OK.
1412 An explicitly used hard reg cannot be a spill reg. */
1414 if (reload_reg_rtx[i] == 0 && in != 0)
1419 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1420 if (REG_NOTE_KIND (note) == REG_DEAD
1421 && GET_CODE (XEXP (note, 0)) == REG
1422 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1423 && reg_mentioned_p (XEXP (note, 0), in)
1424 && ! refers_to_regno_for_reload_p (regno,
1426 + HARD_REGNO_NREGS (regno,
1428 PATTERN (this_insn), inloc)
1429 /* If this is also an output reload, IN cannot be used as
1430 the reload register if it is set in this insn unless IN
1432 && (out == 0 || in == out
1433 || ! hard_reg_set_here_p (regno,
1435 + HARD_REGNO_NREGS (regno,
1437 PATTERN (this_insn)))
1438 /* ??? Why is this code so different from the previous?
1439 Is there any simple coherent way to describe the two together?
1440 What's going on here. */
1442 || (GET_CODE (in) == SUBREG
1443 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1445 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1446 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1447 /* Make sure the operand fits in the reg that dies. */
1448 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1449 && HARD_REGNO_MODE_OK (regno, inmode)
1450 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1451 && HARD_REGNO_MODE_OK (regno, outmode)
1452 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1453 && !fixed_regs[regno])
1455 reload_reg_rtx[i] = gen_rtx_REG (inmode, regno);
1461 output_reloadnum = i;
1466 /* Record an additional place we must replace a value
1467 for which we have already recorded a reload.
1468 RELOADNUM is the value returned by push_reload
1469 when the reload was recorded.
1470 This is used in insn patterns that use match_dup. */
1473 push_replacement (loc, reloadnum, mode)
1476 enum machine_mode mode;
1478 if (replace_reloads)
1480 register struct replacement *r = &replacements[n_replacements++];
1481 r->what = reloadnum;
1488 /* Transfer all replacements that used to be in reload FROM to be in
1492 transfer_replacements (to, from)
1497 for (i = 0; i < n_replacements; i++)
1498 if (replacements[i].what == from)
1499 replacements[i].what = to;
1502 /* If there is only one output reload, and it is not for an earlyclobber
1503 operand, try to combine it with a (logically unrelated) input reload
1504 to reduce the number of reload registers needed.
1506 This is safe if the input reload does not appear in
1507 the value being output-reloaded, because this implies
1508 it is not needed any more once the original insn completes.
1510 If that doesn't work, see we can use any of the registers that
1511 die in this insn as a reload register. We can if it is of the right
1512 class and does not appear in the value being output-reloaded. */
1518 int output_reload = -1;
1519 int secondary_out = -1;
1522 /* Find the output reload; return unless there is exactly one
1523 and that one is mandatory. */
1525 for (i = 0; i < n_reloads; i++)
1526 if (reload_out[i] != 0)
1528 if (output_reload >= 0)
1533 if (output_reload < 0 || reload_optional[output_reload])
1536 /* An input-output reload isn't combinable. */
1538 if (reload_in[output_reload] != 0)
1541 /* If this reload is for an earlyclobber operand, we can't do anything. */
1542 if (earlyclobber_operand_p (reload_out[output_reload]))
1545 /* Check each input reload; can we combine it? */
1547 for (i = 0; i < n_reloads; i++)
1548 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1549 /* Life span of this reload must not extend past main insn. */
1550 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
1551 && reload_when_needed[i] != RELOAD_FOR_OUTADDR_ADDRESS
1552 && reload_when_needed[i] != RELOAD_OTHER
1553 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
1554 == CLASS_MAX_NREGS (reload_reg_class[output_reload],
1555 reload_outmode[output_reload]))
1556 && reload_inc[i] == 0
1557 && reload_reg_rtx[i] == 0
1558 #ifdef SECONDARY_MEMORY_NEEDED
1559 /* Don't combine two reloads with different secondary
1560 memory locations. */
1561 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
1562 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
1563 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
1564 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
1566 && (SMALL_REGISTER_CLASSES
1567 ? (reload_reg_class[i] == reload_reg_class[output_reload])
1568 : (reg_class_subset_p (reload_reg_class[i],
1569 reload_reg_class[output_reload])
1570 || reg_class_subset_p (reload_reg_class[output_reload],
1571 reload_reg_class[i])))
1572 && (MATCHES (reload_in[i], reload_out[output_reload])
1573 /* Args reversed because the first arg seems to be
1574 the one that we imagine being modified
1575 while the second is the one that might be affected. */
1576 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1578 /* However, if the input is a register that appears inside
1579 the output, then we also can't share.
1580 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1581 If the same reload reg is used for both reg 69 and the
1582 result to be stored in memory, then that result
1583 will clobber the address of the memory ref. */
1584 && ! (GET_CODE (reload_in[i]) == REG
1585 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1586 reload_out[output_reload]))))
1587 && (reg_class_size[(int) reload_reg_class[i]]
1588 || SMALL_REGISTER_CLASSES)
1589 /* We will allow making things slightly worse by combining an
1590 input and an output, but no worse than that. */
1591 && (reload_when_needed[i] == RELOAD_FOR_INPUT
1592 || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
1596 /* We have found a reload to combine with! */
1597 reload_out[i] = reload_out[output_reload];
1598 reload_outmode[i] = reload_outmode[output_reload];
1599 /* Mark the old output reload as inoperative. */
1600 reload_out[output_reload] = 0;
1601 /* The combined reload is needed for the entire insn. */
1602 reload_when_needed[i] = RELOAD_OTHER;
1603 /* If the output reload had a secondary reload, copy it. */
1604 if (reload_secondary_out_reload[output_reload] != -1)
1606 reload_secondary_out_reload[i]
1607 = reload_secondary_out_reload[output_reload];
1608 reload_secondary_out_icode[i]
1609 = reload_secondary_out_icode[output_reload];
1612 #ifdef SECONDARY_MEMORY_NEEDED
1613 /* Copy any secondary MEM. */
1614 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
1615 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
1616 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
1618 /* If required, minimize the register class. */
1619 if (reg_class_subset_p (reload_reg_class[output_reload],
1620 reload_reg_class[i]))
1621 reload_reg_class[i] = reload_reg_class[output_reload];
1623 /* Transfer all replacements from the old reload to the combined. */
1624 for (j = 0; j < n_replacements; j++)
1625 if (replacements[j].what == output_reload)
1626 replacements[j].what = i;
1631 /* If this insn has only one operand that is modified or written (assumed
1632 to be the first), it must be the one corresponding to this reload. It
1633 is safe to use anything that dies in this insn for that output provided
1634 that it does not occur in the output (we already know it isn't an
1635 earlyclobber. If this is an asm insn, give up. */
1637 if (INSN_CODE (this_insn) == -1)
1640 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1641 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1642 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1645 /* See if some hard register that dies in this insn and is not used in
1646 the output is the right class. Only works if the register we pick
1647 up can fully hold our output reload. */
1648 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1649 if (REG_NOTE_KIND (note) == REG_DEAD
1650 && GET_CODE (XEXP (note, 0)) == REG
1651 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1652 reload_out[output_reload])
1653 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1654 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1655 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1656 REGNO (XEXP (note, 0)))
1657 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1658 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1659 /* Ensure that a secondary or tertiary reload for this output
1660 won't want this register. */
1661 && ((secondary_out = reload_secondary_out_reload[output_reload]) == -1
1662 || (! (TEST_HARD_REG_BIT
1663 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1664 REGNO (XEXP (note, 0))))
1665 && ((secondary_out = reload_secondary_out_reload[secondary_out]) == -1
1666 || ! (TEST_HARD_REG_BIT
1667 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1668 REGNO (XEXP (note, 0)))))))
1669 && ! fixed_regs[REGNO (XEXP (note, 0))])
1671 reload_reg_rtx[output_reload]
1672 = gen_rtx_REG (reload_outmode[output_reload],
1673 REGNO (XEXP (note, 0)));
1678 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1679 See if one of IN and OUT is a register that may be used;
1680 this is desirable since a spill-register won't be needed.
1681 If so, return the register rtx that proves acceptable.
1683 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1684 CLASS is the register class required for the reload.
1686 If FOR_REAL is >= 0, it is the number of the reload,
1687 and in some cases when it can be discovered that OUT doesn't need
1688 to be computed, clear out reload_out[FOR_REAL].
1690 If FOR_REAL is -1, this should not be done, because this call
1691 is just to see if a register can be found, not to find and install it.
1693 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1694 puts an additional constraint on being able to use IN for OUT since
1695 IN must not appear elsewhere in the insn (it is assumed that IN itself
1696 is safe from the earlyclobber). */
1699 find_dummy_reload (real_in, real_out, inloc, outloc,
1700 inmode, outmode, class, for_real, earlyclobber)
1701 rtx real_in, real_out;
1702 rtx *inloc, *outloc;
1703 enum machine_mode inmode, outmode;
1704 enum reg_class class;
1714 /* If operands exceed a word, we can't use either of them
1715 unless they have the same size. */
1716 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1717 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1718 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1721 /* Find the inside of any subregs. */
1722 while (GET_CODE (out) == SUBREG)
1724 out_offset = SUBREG_WORD (out);
1725 out = SUBREG_REG (out);
1727 while (GET_CODE (in) == SUBREG)
1729 in_offset = SUBREG_WORD (in);
1730 in = SUBREG_REG (in);
1733 /* Narrow down the reg class, the same way push_reload will;
1734 otherwise we might find a dummy now, but push_reload won't. */
1735 class = PREFERRED_RELOAD_CLASS (in, class);
1737 /* See if OUT will do. */
1738 if (GET_CODE (out) == REG
1739 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1741 register int regno = REGNO (out) + out_offset;
1742 int nwords = HARD_REGNO_NREGS (regno, outmode);
1745 /* When we consider whether the insn uses OUT,
1746 ignore references within IN. They don't prevent us
1747 from copying IN into OUT, because those refs would
1748 move into the insn that reloads IN.
1750 However, we only ignore IN in its role as this reload.
1751 If the insn uses IN elsewhere and it contains OUT,
1752 that counts. We can't be sure it's the "same" operand
1753 so it might not go through this reload. */
1755 *inloc = const0_rtx;
1757 if (regno < FIRST_PSEUDO_REGISTER
1758 /* A fixed reg that can overlap other regs better not be used
1759 for reloading in any way. */
1760 #ifdef OVERLAPPING_REGNO_P
1761 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1763 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1764 PATTERN (this_insn), outloc))
1767 for (i = 0; i < nwords; i++)
1768 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1774 if (GET_CODE (real_out) == REG)
1777 value = gen_rtx_REG (outmode, regno);
1784 /* Consider using IN if OUT was not acceptable
1785 or if OUT dies in this insn (like the quotient in a divmod insn).
1786 We can't use IN unless it is dies in this insn,
1787 which means we must know accurately which hard regs are live.
1788 Also, the result can't go in IN if IN is used within OUT,
1789 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1790 if (hard_regs_live_known
1791 && GET_CODE (in) == REG
1792 && REGNO (in) < FIRST_PSEUDO_REGISTER
1794 || find_reg_note (this_insn, REG_UNUSED, real_out))
1795 && find_reg_note (this_insn, REG_DEAD, real_in)
1796 && !fixed_regs[REGNO (in)]
1797 && HARD_REGNO_MODE_OK (REGNO (in),
1798 /* The only case where out and real_out might
1799 have different modes is where real_out
1800 is a subreg, and in that case, out
1802 (GET_MODE (out) != VOIDmode
1803 ? GET_MODE (out) : outmode)))
1805 register int regno = REGNO (in) + in_offset;
1806 int nwords = HARD_REGNO_NREGS (regno, inmode);
1808 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1809 && ! hard_reg_set_here_p (regno, regno + nwords,
1810 PATTERN (this_insn))
1812 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1813 PATTERN (this_insn), inloc)))
1816 for (i = 0; i < nwords; i++)
1817 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1823 /* If we were going to use OUT as the reload reg
1824 and changed our mind, it means OUT is a dummy that
1825 dies here. So don't bother copying value to it. */
1826 if (for_real >= 0 && value == real_out)
1827 reload_out[for_real] = 0;
1828 if (GET_CODE (real_in) == REG)
1831 value = gen_rtx_REG (inmode, regno);
1839 /* This page contains subroutines used mainly for determining
1840 whether the IN or an OUT of a reload can serve as the
1843 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1846 earlyclobber_operand_p (x)
1851 for (i = 0; i < n_earlyclobbers; i++)
1852 if (reload_earlyclobbers[i] == x)
1858 /* Return 1 if expression X alters a hard reg in the range
1859 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1860 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1861 X should be the body of an instruction. */
1864 hard_reg_set_here_p (beg_regno, end_regno, x)
1865 register int beg_regno, end_regno;
1868 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1870 register rtx op0 = SET_DEST (x);
1871 while (GET_CODE (op0) == SUBREG)
1872 op0 = SUBREG_REG (op0);
1873 if (GET_CODE (op0) == REG)
1875 register int r = REGNO (op0);
1876 /* See if this reg overlaps range under consideration. */
1878 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1882 else if (GET_CODE (x) == PARALLEL)
1884 register int i = XVECLEN (x, 0) - 1;
1886 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1893 /* Return 1 if ADDR is a valid memory address for mode MODE,
1894 and check that each pseudo reg has the proper kind of
1898 strict_memory_address_p (mode, addr)
1899 enum machine_mode mode;
1902 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
1909 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1910 if they are the same hard reg, and has special hacks for
1911 autoincrement and autodecrement.
1912 This is specifically intended for find_reloads to use
1913 in determining whether two operands match.
1914 X is the operand whose number is the lower of the two.
1916 The value is 2 if Y contains a pre-increment that matches
1917 a non-incrementing address in X. */
1919 /* ??? To be completely correct, we should arrange to pass
1920 for X the output operand and for Y the input operand.
1921 For now, we assume that the output operand has the lower number
1922 because that is natural in (SET output (... input ...)). */
1925 operands_match_p (x, y)
1929 register RTX_CODE code = GET_CODE (x);
1935 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
1936 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
1937 && GET_CODE (SUBREG_REG (y)) == REG)))
1943 i = REGNO (SUBREG_REG (x));
1944 if (i >= FIRST_PSEUDO_REGISTER)
1946 i += SUBREG_WORD (x);
1951 if (GET_CODE (y) == SUBREG)
1953 j = REGNO (SUBREG_REG (y));
1954 if (j >= FIRST_PSEUDO_REGISTER)
1956 j += SUBREG_WORD (y);
1961 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1962 multiple hard register group, so that for example (reg:DI 0) and
1963 (reg:SI 1) will be considered the same register. */
1964 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
1965 && i < FIRST_PSEUDO_REGISTER)
1966 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
1967 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
1968 && j < FIRST_PSEUDO_REGISTER)
1969 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
1973 /* If two operands must match, because they are really a single
1974 operand of an assembler insn, then two postincrements are invalid
1975 because the assembler insn would increment only once.
1976 On the other hand, an postincrement matches ordinary indexing
1977 if the postincrement is the output operand. */
1978 if (code == POST_DEC || code == POST_INC)
1979 return operands_match_p (XEXP (x, 0), y);
1980 /* Two preincrements are invalid
1981 because the assembler insn would increment only once.
1982 On the other hand, an preincrement matches ordinary indexing
1983 if the preincrement is the input operand.
1984 In this case, return 2, since some callers need to do special
1985 things when this happens. */
1986 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
1987 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
1991 /* Now we have disposed of all the cases
1992 in which different rtx codes can match. */
1993 if (code != GET_CODE (y))
1995 if (code == LABEL_REF)
1996 return XEXP (x, 0) == XEXP (y, 0);
1997 if (code == SYMBOL_REF)
1998 return XSTR (x, 0) == XSTR (y, 0);
2000 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2002 if (GET_MODE (x) != GET_MODE (y))
2005 /* Compare the elements. If any pair of corresponding elements
2006 fail to match, return 0 for the whole things. */
2009 fmt = GET_RTX_FORMAT (code);
2010 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2016 if (XWINT (x, i) != XWINT (y, i))
2021 if (XINT (x, i) != XINT (y, i))
2026 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2029 /* If any subexpression returns 2,
2030 we should return 2 if we are successful. */
2038 /* It is believed that rtx's at this level will never
2039 contain anything but integers and other rtx's,
2040 except for within LABEL_REFs and SYMBOL_REFs. */
2045 return 1 + success_2;
2048 /* Return the number of times character C occurs in string S. */
2051 n_occurrences (c, s)
2061 /* Describe the range of registers or memory referenced by X.
2062 If X is a register, set REG_FLAG and put the first register
2063 number into START and the last plus one into END.
2064 If X is a memory reference, put a base address into BASE
2065 and a range of integer offsets into START and END.
2066 If X is pushing on the stack, we can assume it causes no trouble,
2067 so we set the SAFE field. */
2069 static struct decomposition
2073 struct decomposition val;
2079 if (GET_CODE (x) == MEM)
2081 rtx base, offset = 0;
2082 rtx addr = XEXP (x, 0);
2084 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2085 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2087 val.base = XEXP (addr, 0);
2088 val.start = - GET_MODE_SIZE (GET_MODE (x));
2089 val.end = GET_MODE_SIZE (GET_MODE (x));
2090 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2094 if (GET_CODE (addr) == CONST)
2096 addr = XEXP (addr, 0);
2099 if (GET_CODE (addr) == PLUS)
2101 if (CONSTANT_P (XEXP (addr, 0)))
2103 base = XEXP (addr, 1);
2104 offset = XEXP (addr, 0);
2106 else if (CONSTANT_P (XEXP (addr, 1)))
2108 base = XEXP (addr, 0);
2109 offset = XEXP (addr, 1);
2116 offset = const0_rtx;
2118 if (GET_CODE (offset) == CONST)
2119 offset = XEXP (offset, 0);
2120 if (GET_CODE (offset) == PLUS)
2122 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2124 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2125 offset = XEXP (offset, 0);
2127 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2129 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2130 offset = XEXP (offset, 1);
2134 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2135 offset = const0_rtx;
2138 else if (GET_CODE (offset) != CONST_INT)
2140 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2141 offset = const0_rtx;
2144 if (all_const && GET_CODE (base) == PLUS)
2145 base = gen_rtx_CONST (GET_MODE (base), base);
2147 if (GET_CODE (offset) != CONST_INT)
2150 val.start = INTVAL (offset);
2151 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2155 else if (GET_CODE (x) == REG)
2158 val.start = true_regnum (x);
2161 /* A pseudo with no hard reg. */
2162 val.start = REGNO (x);
2163 val.end = val.start + 1;
2167 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2169 else if (GET_CODE (x) == SUBREG)
2171 if (GET_CODE (SUBREG_REG (x)) != REG)
2172 /* This could be more precise, but it's good enough. */
2173 return decompose (SUBREG_REG (x));
2175 val.start = true_regnum (x);
2177 return decompose (SUBREG_REG (x));
2180 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2182 else if (CONSTANT_P (x)
2183 /* This hasn't been assigned yet, so it can't conflict yet. */
2184 || GET_CODE (x) == SCRATCH)
2191 /* Return 1 if altering Y will not modify the value of X.
2192 Y is also described by YDATA, which should be decompose (Y). */
2195 immune_p (x, y, ydata)
2197 struct decomposition ydata;
2199 struct decomposition xdata;
2202 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2206 if (GET_CODE (y) != MEM)
2208 /* If Y is memory and X is not, Y can't affect X. */
2209 if (GET_CODE (x) != MEM)
2212 xdata = decompose (x);
2214 if (! rtx_equal_p (xdata.base, ydata.base))
2216 /* If bases are distinct symbolic constants, there is no overlap. */
2217 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2219 /* Constants and stack slots never overlap. */
2220 if (CONSTANT_P (xdata.base)
2221 && (ydata.base == frame_pointer_rtx
2222 || ydata.base == hard_frame_pointer_rtx
2223 || ydata.base == stack_pointer_rtx))
2225 if (CONSTANT_P (ydata.base)
2226 && (xdata.base == frame_pointer_rtx
2227 || xdata.base == hard_frame_pointer_rtx
2228 || xdata.base == stack_pointer_rtx))
2230 /* If either base is variable, we don't know anything. */
2235 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2238 /* Similar, but calls decompose. */
2241 safe_from_earlyclobber (op, clobber)
2244 struct decomposition early_data;
2246 early_data = decompose (clobber);
2247 return immune_p (op, clobber, early_data);
2250 /* Main entry point of this file: search the body of INSN
2251 for values that need reloading and record them with push_reload.
2252 REPLACE nonzero means record also where the values occur
2253 so that subst_reloads can be used.
2255 IND_LEVELS says how many levels of indirection are supported by this
2256 machine; a value of zero means that a memory reference is not a valid
2259 LIVE_KNOWN says we have valid information about which hard
2260 regs are live at each point in the program; this is true when
2261 we are called from global_alloc but false when stupid register
2262 allocation has been done.
2264 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2265 which is nonnegative if the reg has been commandeered for reloading into.
2266 It is copied into STATIC_RELOAD_REG_P and referenced from there
2267 by various subroutines. */
2270 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2272 int replace, ind_levels;
2274 short *reload_reg_p;
2276 #ifdef REGISTER_CONSTRAINTS
2278 register int insn_code_number;
2281 /* These are the constraints for the insn. We don't change them. */
2282 char *constraints1[MAX_RECOG_OPERANDS];
2283 /* These start out as the constraints for the insn
2284 and they are chewed up as we consider alternatives. */
2285 char *constraints[MAX_RECOG_OPERANDS];
2286 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2288 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2289 char pref_or_nothing[MAX_RECOG_OPERANDS];
2290 /* Nonzero for a MEM operand whose entire address needs a reload. */
2291 int address_reloaded[MAX_RECOG_OPERANDS];
2292 /* Value of enum reload_type to use for operand. */
2293 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2294 /* Value of enum reload_type to use within address of operand. */
2295 enum reload_type address_type[MAX_RECOG_OPERANDS];
2296 /* Save the usage of each operand. */
2297 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2298 int no_input_reloads = 0, no_output_reloads = 0;
2300 int this_alternative[MAX_RECOG_OPERANDS];
2301 char this_alternative_win[MAX_RECOG_OPERANDS];
2302 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2303 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2304 int this_alternative_matches[MAX_RECOG_OPERANDS];
2306 int goal_alternative[MAX_RECOG_OPERANDS];
2307 int this_alternative_number;
2308 int goal_alternative_number;
2309 int operand_reloadnum[MAX_RECOG_OPERANDS];
2310 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2311 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2312 char goal_alternative_win[MAX_RECOG_OPERANDS];
2313 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2314 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2315 int goal_alternative_swapped;
2318 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2319 rtx substed_operand[MAX_RECOG_OPERANDS];
2320 rtx body = PATTERN (insn);
2321 rtx set = single_set (insn);
2322 int goal_earlyclobber, this_earlyclobber;
2323 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2326 this_insn_is_asm = 0; /* Tentative. */
2330 n_earlyclobbers = 0;
2331 replace_reloads = replace;
2332 hard_regs_live_known = live_known;
2333 static_reload_reg_p = reload_reg_p;
2335 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2336 neither are insns that SET cc0. Insns that use CC0 are not allowed
2337 to have any input reloads. */
2338 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2339 no_output_reloads = 1;
2342 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2343 no_input_reloads = 1;
2344 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2345 no_output_reloads = 1;
2348 #ifdef SECONDARY_MEMORY_NEEDED
2349 /* The eliminated forms of any secondary memory locations are per-insn, so
2350 clear them out here. */
2352 bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2355 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2356 Make OPERANDS point to a vector of operand values.
2357 Make OPERAND_LOCS point to a vector of pointers to
2358 where the operands were found.
2359 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2360 constraint-strings for this insn.
2361 Return if the insn needs no reload processing. */
2363 switch (GET_CODE (body))
2373 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2374 is cheap to move between them. If it is not, there may not be an insn
2375 to do the copy, so we may need a reload. */
2376 if (GET_CODE (SET_DEST (body)) == REG
2377 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2378 && GET_CODE (SET_SRC (body)) == REG
2379 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2380 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2381 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2385 reload_n_operands = noperands = asm_noperands (body);
2388 /* This insn is an `asm' with operands. */
2390 insn_code_number = -1;
2391 this_insn_is_asm = 1;
2393 /* expand_asm_operands makes sure there aren't too many operands. */
2394 if (noperands > MAX_RECOG_OPERANDS)
2397 /* Now get the operand values and constraints out of the insn. */
2399 decode_asm_operands (body, recog_operand, recog_operand_loc,
2400 constraints, operand_mode);
2403 bcopy ((char *) constraints, (char *) constraints1,
2404 noperands * sizeof (char *));
2405 n_alternatives = n_occurrences (',', constraints[0]) + 1;
2406 for (i = 1; i < noperands; i++)
2407 if (n_alternatives != n_occurrences (',', constraints[i]) + 1)
2409 error_for_asm (insn, "operand constraints differ in number of alternatives");
2410 /* Avoid further trouble with this insn. */
2411 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
2420 /* Ordinary insn: recognize it, get the operands via insn_extract
2421 and get the constraints. */
2423 insn_code_number = recog_memoized (insn);
2424 if (insn_code_number < 0)
2425 fatal_insn_not_found (insn);
2427 reload_n_operands = noperands = insn_n_operands[insn_code_number];
2428 n_alternatives = insn_n_alternatives[insn_code_number];
2429 /* Just return "no reloads" if insn has no operands with constraints. */
2430 if (n_alternatives == 0)
2432 insn_extract (insn);
2433 for (i = 0; i < noperands; i++)
2435 constraints[i] = constraints1[i]
2436 = insn_operand_constraint[insn_code_number][i];
2437 operand_mode[i] = insn_operand_mode[insn_code_number][i];
2446 /* If we will need to know, later, whether some pair of operands
2447 are the same, we must compare them now and save the result.
2448 Reloading the base and index registers will clobber them
2449 and afterward they will fail to match. */
2451 for (i = 0; i < noperands; i++)
2456 substed_operand[i] = recog_operand[i];
2459 modified[i] = RELOAD_READ;
2461 /* Scan this operand's constraint to see if it is an output operand,
2462 an in-out operand, is commutative, or should match another. */
2467 modified[i] = RELOAD_WRITE;
2469 modified[i] = RELOAD_READ_WRITE;
2472 /* The last operand should not be marked commutative. */
2473 if (i == noperands - 1)
2475 if (this_insn_is_asm)
2476 warning_for_asm (this_insn,
2477 "`%%' constraint used with last operand");
2484 else if (c >= '0' && c <= '9')
2487 operands_match[c][i]
2488 = operands_match_p (recog_operand[c], recog_operand[i]);
2490 /* An operand may not match itself. */
2493 if (this_insn_is_asm)
2494 warning_for_asm (this_insn,
2495 "operand %d has constraint %d", i, c);
2500 /* If C can be commuted with C+1, and C might need to match I,
2501 then C+1 might also need to match I. */
2502 if (commutative >= 0)
2504 if (c == commutative || c == commutative + 1)
2506 int other = c + (c == commutative ? 1 : -1);
2507 operands_match[other][i]
2508 = operands_match_p (recog_operand[other], recog_operand[i]);
2510 if (i == commutative || i == commutative + 1)
2512 int other = i + (i == commutative ? 1 : -1);
2513 operands_match[c][other]
2514 = operands_match_p (recog_operand[c], recog_operand[other]);
2516 /* Note that C is supposed to be less than I.
2517 No need to consider altering both C and I because in
2518 that case we would alter one into the other. */
2524 /* Examine each operand that is a memory reference or memory address
2525 and reload parts of the addresses into index registers.
2526 Also here any references to pseudo regs that didn't get hard regs
2527 but are equivalent to constants get replaced in the insn itself
2528 with those constants. Nobody will ever see them again.
2530 Finally, set up the preferred classes of each operand. */
2532 for (i = 0; i < noperands; i++)
2534 register RTX_CODE code = GET_CODE (recog_operand[i]);
2536 address_reloaded[i] = 0;
2537 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2538 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2541 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2542 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2545 if (*constraints[i] == 0)
2546 /* Ignore things like match_operator operands. */
2548 else if (constraints[i][0] == 'p')
2550 find_reloads_address (VOIDmode, NULL_PTR,
2551 recog_operand[i], recog_operand_loc[i],
2552 i, operand_type[i], ind_levels, insn);
2554 /* If we now have a simple operand where we used to have a
2555 PLUS or MULT, re-recognize and try again. */
2556 if ((GET_RTX_CLASS (GET_CODE (*recog_operand_loc[i])) == 'o'
2557 || GET_CODE (*recog_operand_loc[i]) == SUBREG)
2558 && (GET_CODE (recog_operand[i]) == MULT
2559 || GET_CODE (recog_operand[i]) == PLUS))
2561 INSN_CODE (insn) = -1;
2562 find_reloads (insn, replace, ind_levels, live_known,
2567 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2569 else if (code == MEM)
2571 if (find_reloads_address (GET_MODE (recog_operand[i]),
2572 recog_operand_loc[i],
2573 XEXP (recog_operand[i], 0),
2574 &XEXP (recog_operand[i], 0),
2575 i, address_type[i], ind_levels, insn))
2576 address_reloaded[i] = 1;
2577 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2579 else if (code == SUBREG)
2580 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2581 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2584 && &SET_DEST (set) == recog_operand_loc[i]);
2585 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2586 /* We can get a PLUS as an "operand" as a result of register
2587 elimination. See eliminate_regs and gen_reload. We handle
2588 a unary operator by reloading the operand. */
2589 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2590 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2592 else if (code == REG)
2594 /* This is equivalent to calling find_reloads_toplev.
2595 The code is duplicated for speed.
2596 When we find a pseudo always equivalent to a constant,
2597 we replace it by the constant. We must be sure, however,
2598 that we don't try to replace it in the insn in which it
2600 register int regno = REGNO (recog_operand[i]);
2601 if (reg_equiv_constant[regno] != 0
2602 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2603 substed_operand[i] = recog_operand[i]
2604 = reg_equiv_constant[regno];
2605 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2606 that feeds this insn. */
2607 if (reg_equiv_mem[regno] != 0)
2608 substed_operand[i] = recog_operand[i]
2609 = reg_equiv_mem[regno];
2611 if (reg_equiv_address[regno] != 0)
2613 /* If reg_equiv_address is not a constant address, copy it,
2614 since it may be shared. */
2615 /* We must rerun eliminate_regs, in case the elimination
2616 offsets have changed. */
2617 rtx address = XEXP (eliminate_regs (reg_equiv_memory_loc[regno],
2621 if (rtx_varies_p (address))
2622 address = copy_rtx (address);
2624 /* If this is an output operand, we must output a CLOBBER
2625 after INSN so find_equiv_reg knows REGNO is being written.
2626 Mark this insn specially, do we can put our output reloads
2629 if (modified[i] != RELOAD_READ)
2630 PUT_MODE (emit_insn_after (gen_rtx_CLOBBER (VOIDmode,
2635 *recog_operand_loc[i] = recog_operand[i]
2636 = gen_rtx_MEM (GET_MODE (recog_operand[i]), address);
2637 RTX_UNCHANGING_P (recog_operand[i])
2638 = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
2639 find_reloads_address (GET_MODE (recog_operand[i]),
2640 recog_operand_loc[i],
2641 XEXP (recog_operand[i], 0),
2642 &XEXP (recog_operand[i], 0),
2643 i, address_type[i], ind_levels, insn);
2644 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2647 /* If the operand is still a register (we didn't replace it with an
2648 equivalent), get the preferred class to reload it into. */
2649 code = GET_CODE (recog_operand[i]);
2651 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
2652 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2654 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
2655 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2658 /* If this is simply a copy from operand 1 to operand 0, merge the
2659 preferred classes for the operands. */
2660 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2661 && recog_operand[1] == SET_SRC (set))
2663 preferred_class[0] = preferred_class[1]
2664 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2665 pref_or_nothing[0] |= pref_or_nothing[1];
2666 pref_or_nothing[1] |= pref_or_nothing[0];
2669 /* Now see what we need for pseudo-regs that didn't get hard regs
2670 or got the wrong kind of hard reg. For this, we must consider
2671 all the operands together against the register constraints. */
2673 best = MAX_RECOG_OPERANDS * 2 + 600;
2676 goal_alternative_swapped = 0;
2679 /* The constraints are made of several alternatives.
2680 Each operand's constraint looks like foo,bar,... with commas
2681 separating the alternatives. The first alternatives for all
2682 operands go together, the second alternatives go together, etc.
2684 First loop over alternatives. */
2686 for (this_alternative_number = 0;
2687 this_alternative_number < n_alternatives;
2688 this_alternative_number++)
2690 /* Loop over operands for one constraint alternative. */
2691 /* LOSERS counts those that don't fit this alternative
2692 and would require loading. */
2694 /* BAD is set to 1 if it some operand can't fit this alternative
2695 even after reloading. */
2697 /* REJECT is a count of how undesirable this alternative says it is
2698 if any reloading is required. If the alternative matches exactly
2699 then REJECT is ignored, but otherwise it gets this much
2700 counted against it in addition to the reloading needed. Each
2701 ? counts three times here since we want the disparaging caused by
2702 a bad register class to only count 1/3 as much. */
2705 this_earlyclobber = 0;
2707 for (i = 0; i < noperands; i++)
2709 register char *p = constraints[i];
2710 register int win = 0;
2711 /* 0 => this operand can be reloaded somehow for this alternative */
2713 /* 0 => this operand can be reloaded if the alternative allows regs. */
2716 register rtx operand = recog_operand[i];
2718 /* Nonzero means this is a MEM that must be reloaded into a reg
2719 regardless of what the constraint says. */
2720 int force_reload = 0;
2722 /* Nonzero if a constant forced into memory would be OK for this
2725 int earlyclobber = 0;
2727 /* If the predicate accepts a unary operator, it means that
2728 we need to reload the operand. */
2729 if (GET_RTX_CLASS (GET_CODE (operand)) == '1')
2730 operand = XEXP (operand, 0);
2732 /* If the operand is a SUBREG, extract
2733 the REG or MEM (or maybe even a constant) within.
2734 (Constants can occur as a result of reg_equiv_constant.) */
2736 while (GET_CODE (operand) == SUBREG)
2738 offset += SUBREG_WORD (operand);
2739 operand = SUBREG_REG (operand);
2740 /* Force reload if this is a constant or PLUS or if there may may
2741 be a problem accessing OPERAND in the outer mode. */
2742 if (CONSTANT_P (operand)
2743 || GET_CODE (operand) == PLUS
2744 /* We must force a reload of paradoxical SUBREGs
2745 of a MEM because the alignment of the inner value
2746 may not be enough to do the outer reference. On
2747 big-endian machines, it may also reference outside
2750 On machines that extend byte operations and we have a
2751 SUBREG where both the inner and outer modes are no wider
2752 than a word and the inner mode is narrower, is integral,
2753 and gets extended when loaded from memory, combine.c has
2754 made assumptions about the behavior of the machine in such
2755 register access. If the data is, in fact, in memory we
2756 must always load using the size assumed to be in the
2757 register and let the insn do the different-sized
2760 This is doubly true if WORD_REGISTER_OPERATIONS. In
2761 this case eliminate_regs has left non-paradoxical
2762 subregs for push_reloads to see. Make sure it does
2763 by forcing the reload.
2765 ??? When is it right at this stage to have a subreg
2766 of a mem that is _not_ to be handled specialy? IMO
2767 those should have been reduced to just a mem. */
2768 || ((GET_CODE (operand) == MEM
2769 || (GET_CODE (operand)== REG
2770 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2771 #ifndef WORD_REGISTER_OPERATIONS
2772 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2773 < BIGGEST_ALIGNMENT)
2774 && (GET_MODE_SIZE (operand_mode[i])
2775 > GET_MODE_SIZE (GET_MODE (operand))))
2776 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2777 #ifdef LOAD_EXTEND_OP
2778 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2779 && (GET_MODE_SIZE (GET_MODE (operand))
2781 && (GET_MODE_SIZE (operand_mode[i])
2782 > GET_MODE_SIZE (GET_MODE (operand)))
2783 && INTEGRAL_MODE_P (GET_MODE (operand))
2784 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2789 /* Subreg of a hard reg which can't handle the subreg's mode
2790 or which would handle that mode in the wrong number of
2791 registers for subregging to work. */
2792 || (GET_CODE (operand) == REG
2793 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2794 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2795 && (GET_MODE_SIZE (GET_MODE (operand))
2797 && ((GET_MODE_SIZE (GET_MODE (operand))
2799 != HARD_REGNO_NREGS (REGNO (operand),
2800 GET_MODE (operand))))
2801 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2806 this_alternative[i] = (int) NO_REGS;
2807 this_alternative_win[i] = 0;
2808 this_alternative_offmemok[i] = 0;
2809 this_alternative_earlyclobber[i] = 0;
2810 this_alternative_matches[i] = -1;
2812 /* An empty constraint or empty alternative
2813 allows anything which matched the pattern. */
2814 if (*p == 0 || *p == ',')
2817 /* Scan this alternative's specs for this operand;
2818 set WIN if the operand fits any letter in this alternative.
2819 Otherwise, clear BADOP if this operand could
2820 fit some letter after reloads,
2821 or set WINREG if this operand could fit after reloads
2822 provided the constraint allows some registers. */
2824 while (*p && (c = *p++) != ',')
2833 /* The last operand should not be marked commutative. */
2834 if (i != noperands - 1)
2847 /* Ignore rest of this alternative as far as
2848 reloading is concerned. */
2849 while (*p && *p != ',') p++;
2858 this_alternative_matches[i] = c;
2859 /* We are supposed to match a previous operand.
2860 If we do, we win if that one did.
2861 If we do not, count both of the operands as losers.
2862 (This is too conservative, since most of the time
2863 only a single reload insn will be needed to make
2864 the two operands win. As a result, this alternative
2865 may be rejected when it is actually desirable.) */
2866 if ((swapped && (c != commutative || i != commutative + 1))
2867 /* If we are matching as if two operands were swapped,
2868 also pretend that operands_match had been computed
2870 But if I is the second of those and C is the first,
2871 don't exchange them, because operands_match is valid
2872 only on one side of its diagonal. */
2874 [(c == commutative || c == commutative + 1)
2875 ? 2*commutative + 1 - c : c]
2876 [(i == commutative || i == commutative + 1)
2877 ? 2*commutative + 1 - i : i])
2878 : operands_match[c][i])
2880 /* If we are matching a non-offsettable address where an
2881 offsettable address was expected, then we must reject
2882 this combination, because we can't reload it. */
2883 if (this_alternative_offmemok[c]
2884 && GET_CODE (recog_operand[c]) == MEM
2885 && this_alternative[c] == (int) NO_REGS
2886 && ! this_alternative_win[c])
2889 win = this_alternative_win[c];
2893 /* Operands don't match. */
2895 /* Retroactively mark the operand we had to match
2896 as a loser, if it wasn't already. */
2897 if (this_alternative_win[c])
2899 this_alternative_win[c] = 0;
2900 if (this_alternative[c] == (int) NO_REGS)
2902 /* But count the pair only once in the total badness of
2903 this alternative, if the pair can be a dummy reload. */
2905 = find_dummy_reload (recog_operand[i], recog_operand[c],
2906 recog_operand_loc[i], recog_operand_loc[c],
2907 operand_mode[i], operand_mode[c],
2908 this_alternative[c], -1,
2909 this_alternative_earlyclobber[c]);
2914 /* This can be fixed with reloads if the operand
2915 we are supposed to match can be fixed with reloads. */
2917 this_alternative[i] = this_alternative[c];
2919 /* If we have to reload this operand and some previous
2920 operand also had to match the same thing as this
2921 operand, we don't know how to do that. So reject this
2923 if (! win || force_reload)
2924 for (j = 0; j < i; j++)
2925 if (this_alternative_matches[j]
2926 == this_alternative_matches[i])
2932 /* All necessary reloads for an address_operand
2933 were handled in find_reloads_address. */
2934 this_alternative[i] = (int) BASE_REG_CLASS;
2941 if (GET_CODE (operand) == MEM
2942 || (GET_CODE (operand) == REG
2943 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2944 && reg_renumber[REGNO (operand)] < 0))
2946 if (CONSTANT_P (operand)
2947 /* force_const_mem does not accept HIGH. */
2948 && GET_CODE (operand) != HIGH)
2954 if (GET_CODE (operand) == MEM
2955 && ! address_reloaded[i]
2956 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2957 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2962 if (GET_CODE (operand) == MEM
2963 && ! address_reloaded[i]
2964 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2965 || GET_CODE (XEXP (operand, 0)) == POST_INC))
2969 /* Memory operand whose address is not offsettable. */
2973 if (GET_CODE (operand) == MEM
2974 && ! (ind_levels ? offsettable_memref_p (operand)
2975 : offsettable_nonstrict_memref_p (operand))
2976 /* Certain mem addresses will become offsettable
2977 after they themselves are reloaded. This is important;
2978 we don't want our own handling of unoffsettables
2979 to override the handling of reg_equiv_address. */
2980 && !(GET_CODE (XEXP (operand, 0)) == REG
2982 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
2986 /* Memory operand whose address is offsettable. */
2990 if ((GET_CODE (operand) == MEM
2991 /* If IND_LEVELS, find_reloads_address won't reload a
2992 pseudo that didn't get a hard reg, so we have to
2993 reject that case. */
2994 && (ind_levels ? offsettable_memref_p (operand)
2995 : offsettable_nonstrict_memref_p (operand)))
2996 /* A reloaded auto-increment address is offsettable,
2997 because it is now just a simple register indirect. */
2998 || (GET_CODE (operand) == MEM
2999 && address_reloaded[i]
3000 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3001 || GET_CODE (XEXP (operand, 0)) == PRE_DEC
3002 || GET_CODE (XEXP (operand, 0)) == POST_INC
3003 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3004 /* Certain mem addresses will become offsettable
3005 after they themselves are reloaded. This is important;
3006 we don't want our own handling of unoffsettables
3007 to override the handling of reg_equiv_address. */
3008 || (GET_CODE (operand) == MEM
3009 && GET_CODE (XEXP (operand, 0)) == REG
3011 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))
3012 || (GET_CODE (operand) == REG
3013 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3014 && reg_renumber[REGNO (operand)] < 0
3015 /* If reg_equiv_address is nonzero, we will be
3016 loading it into a register; hence it will be
3017 offsettable, but we cannot say that reg_equiv_mem
3018 is offsettable without checking. */
3019 && ((reg_equiv_mem[REGNO (operand)] != 0
3020 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3021 || (reg_equiv_address[REGNO (operand)] != 0))))
3023 /* force_const_mem does not accept HIGH. */
3024 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3025 || GET_CODE (operand) == MEM)
3032 /* Output operand that is stored before the need for the
3033 input operands (and their index registers) is over. */
3034 earlyclobber = 1, this_earlyclobber = 1;
3038 #ifndef REAL_ARITHMETIC
3039 /* Match any floating double constant, but only if
3040 we can examine the bits of it reliably. */
3041 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
3042 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
3043 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
3046 if (GET_CODE (operand) == CONST_DOUBLE)
3051 if (GET_CODE (operand) == CONST_DOUBLE)
3057 if (GET_CODE (operand) == CONST_DOUBLE
3058 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
3063 if (GET_CODE (operand) == CONST_INT
3064 || (GET_CODE (operand) == CONST_DOUBLE
3065 && GET_MODE (operand) == VOIDmode))
3068 if (CONSTANT_P (operand)
3069 #ifdef LEGITIMATE_PIC_OPERAND_P
3070 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3077 if (GET_CODE (operand) == CONST_INT
3078 || (GET_CODE (operand) == CONST_DOUBLE
3079 && GET_MODE (operand) == VOIDmode))
3091 if (GET_CODE (operand) == CONST_INT
3092 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
3102 /* A PLUS is never a valid operand, but reload can make
3103 it from a register when eliminating registers. */
3104 && GET_CODE (operand) != PLUS
3105 /* A SCRATCH is not a valid operand. */
3106 && GET_CODE (operand) != SCRATCH
3107 #ifdef LEGITIMATE_PIC_OPERAND_P
3108 && (! CONSTANT_P (operand)
3110 || LEGITIMATE_PIC_OPERAND_P (operand))
3112 && (GENERAL_REGS == ALL_REGS
3113 || GET_CODE (operand) != REG
3114 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3115 && reg_renumber[REGNO (operand)] < 0)))
3117 /* Drop through into 'r' case */
3121 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3124 #ifdef EXTRA_CONSTRAINT
3130 if (EXTRA_CONSTRAINT (operand, c))
3137 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3140 if (GET_MODE (operand) == BLKmode)
3143 if (GET_CODE (operand) == REG
3144 && reg_fits_class_p (operand, this_alternative[i],
3145 offset, GET_MODE (recog_operand[i])))
3152 /* If this operand could be handled with a reg,
3153 and some reg is allowed, then this operand can be handled. */
3154 if (winreg && this_alternative[i] != (int) NO_REGS)
3157 /* Record which operands fit this alternative. */
3158 this_alternative_earlyclobber[i] = earlyclobber;
3159 if (win && ! force_reload)
3160 this_alternative_win[i] = 1;
3163 int const_to_mem = 0;
3165 this_alternative_offmemok[i] = offmemok;
3169 /* Alternative loses if it has no regs for a reg operand. */
3170 if (GET_CODE (operand) == REG
3171 && this_alternative[i] == (int) NO_REGS
3172 && this_alternative_matches[i] < 0)
3175 /* Alternative loses if it requires a type of reload not
3176 permitted for this insn. We can always reload SCRATCH
3177 and objects with a REG_UNUSED note. */
3178 if (GET_CODE (operand) != SCRATCH
3179 && modified[i] != RELOAD_READ && no_output_reloads
3180 && ! find_reg_note (insn, REG_UNUSED, operand))
3182 else if (modified[i] != RELOAD_WRITE && no_input_reloads)
3185 /* If this is a constant that is reloaded into the desired
3186 class by copying it to memory first, count that as another
3187 reload. This is consistent with other code and is
3188 required to avoid choosing another alternative when
3189 the constant is moved into memory by this function on
3190 an early reload pass. Note that the test here is
3191 precisely the same as in the code below that calls
3193 if (CONSTANT_P (operand)
3194 /* force_const_mem does not accept HIGH. */
3195 && GET_CODE (operand) != HIGH
3196 && (PREFERRED_RELOAD_CLASS (operand,
3197 (enum reg_class) this_alternative[i])
3199 && operand_mode[i] != VOIDmode)
3202 if (this_alternative[i] != (int) NO_REGS)
3206 /* If we can't reload this value at all, reject this
3207 alternative. Note that we could also lose due to
3208 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3211 if (! CONSTANT_P (operand)
3212 && (enum reg_class) this_alternative[i] != NO_REGS
3213 && (PREFERRED_RELOAD_CLASS (operand,
3214 (enum reg_class) this_alternative[i])
3218 /* We prefer to reload pseudos over reloading other things,
3219 since such reloads may be able to be eliminated later.
3220 If we are reloading a SCRATCH, we won't be generating any
3221 insns, just using a register, so it is also preferred.
3222 So bump REJECT in other cases. Don't do this in the
3223 case where we are forcing a constant into memory and
3224 it will then win since we don't want to have a different
3225 alternative match then. */
3226 if (! (GET_CODE (operand) == REG
3227 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3228 && GET_CODE (operand) != SCRATCH
3229 && ! (const_to_mem && constmemok))
3232 /* Input reloads can be inherited more often than output
3233 reloads can be removed, so penalize output reloads. */
3234 if (operand_type[i] != RELOAD_FOR_INPUT)
3238 /* If this operand is a pseudo register that didn't get a hard
3239 reg and this alternative accepts some register, see if the
3240 class that we want is a subset of the preferred class for this
3241 register. If not, but it intersects that class, use the
3242 preferred class instead. If it does not intersect the preferred
3243 class, show that usage of this alternative should be discouraged;
3244 it will be discouraged more still if the register is `preferred
3245 or nothing'. We do this because it increases the chance of
3246 reusing our spill register in a later insn and avoiding a pair
3247 of memory stores and loads.
3249 Don't bother with this if this alternative will accept this
3252 Don't do this for a multiword operand, since it is only a
3253 small win and has the risk of requiring more spill registers,
3254 which could cause a large loss.
3256 Don't do this if the preferred class has only one register
3257 because we might otherwise exhaust the class. */
3260 if (! win && this_alternative[i] != (int) NO_REGS
3261 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3262 && reg_class_size[(int) preferred_class[i]] > 1)
3264 if (! reg_class_subset_p (this_alternative[i],
3265 preferred_class[i]))
3267 /* Since we don't have a way of forming the intersection,
3268 we just do something special if the preferred class
3269 is a subset of the class we have; that's the most
3270 common case anyway. */
3271 if (reg_class_subset_p (preferred_class[i],
3272 this_alternative[i]))
3273 this_alternative[i] = (int) preferred_class[i];
3275 reject += (2 + 2 * pref_or_nothing[i]);
3280 /* Now see if any output operands that are marked "earlyclobber"
3281 in this alternative conflict with any input operands
3282 or any memory addresses. */
3284 for (i = 0; i < noperands; i++)
3285 if (this_alternative_earlyclobber[i]
3286 && this_alternative_win[i])
3288 struct decomposition early_data;
3290 early_data = decompose (recog_operand[i]);
3292 if (modified[i] == RELOAD_READ)
3294 if (this_insn_is_asm)
3295 warning_for_asm (this_insn,
3296 "`&' constraint used with input operand");
3302 if (this_alternative[i] == NO_REGS)
3304 this_alternative_earlyclobber[i] = 0;
3305 if (this_insn_is_asm)
3306 error_for_asm (this_insn,
3307 "`&' constraint used with no register class");
3312 for (j = 0; j < noperands; j++)
3313 /* Is this an input operand or a memory ref? */
3314 if ((GET_CODE (recog_operand[j]) == MEM
3315 || modified[j] != RELOAD_WRITE)
3317 /* Ignore things like match_operator operands. */
3318 && *constraints1[j] != 0
3319 /* Don't count an input operand that is constrained to match
3320 the early clobber operand. */
3321 && ! (this_alternative_matches[j] == i
3322 && rtx_equal_p (recog_operand[i], recog_operand[j]))
3323 /* Is it altered by storing the earlyclobber operand? */
3324 && !immune_p (recog_operand[j], recog_operand[i], early_data))
3326 /* If the output is in a single-reg class,
3327 it's costly to reload it, so reload the input instead. */
3328 if (reg_class_size[this_alternative[i]] == 1
3329 && (GET_CODE (recog_operand[j]) == REG
3330 || GET_CODE (recog_operand[j]) == SUBREG))
3333 this_alternative_win[j] = 0;
3338 /* If an earlyclobber operand conflicts with something,
3339 it must be reloaded, so request this and count the cost. */
3343 this_alternative_win[i] = 0;
3344 for (j = 0; j < noperands; j++)
3345 if (this_alternative_matches[j] == i
3346 && this_alternative_win[j])
3348 this_alternative_win[j] = 0;
3354 /* If one alternative accepts all the operands, no reload required,
3355 choose that alternative; don't consider the remaining ones. */
3358 /* Unswap these so that they are never swapped at `finish'. */
3359 if (commutative >= 0)
3361 recog_operand[commutative] = substed_operand[commutative];
3362 recog_operand[commutative + 1]
3363 = substed_operand[commutative + 1];
3365 for (i = 0; i < noperands; i++)
3367 goal_alternative_win[i] = 1;
3368 goal_alternative[i] = this_alternative[i];
3369 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3370 goal_alternative_matches[i] = this_alternative_matches[i];
3371 goal_alternative_earlyclobber[i]
3372 = this_alternative_earlyclobber[i];
3374 goal_alternative_number = this_alternative_number;
3375 goal_alternative_swapped = swapped;
3376 goal_earlyclobber = this_earlyclobber;
3380 /* REJECT, set by the ! and ? constraint characters and when a register
3381 would be reloaded into a non-preferred class, discourages the use of
3382 this alternative for a reload goal. REJECT is incremented by six
3383 for each ? and two for each non-preferred class. */
3384 losers = losers * 6 + reject;
3386 /* If this alternative can be made to work by reloading,
3387 and it needs less reloading than the others checked so far,
3388 record it as the chosen goal for reloading. */
3389 if (! bad && best > losers)
3391 for (i = 0; i < noperands; i++)
3393 goal_alternative[i] = this_alternative[i];
3394 goal_alternative_win[i] = this_alternative_win[i];
3395 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3396 goal_alternative_matches[i] = this_alternative_matches[i];
3397 goal_alternative_earlyclobber[i]
3398 = this_alternative_earlyclobber[i];
3400 goal_alternative_swapped = swapped;
3402 goal_alternative_number = this_alternative_number;
3403 goal_earlyclobber = this_earlyclobber;
3407 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3408 then we need to try each alternative twice,
3409 the second time matching those two operands
3410 as if we had exchanged them.
3411 To do this, really exchange them in operands.
3413 If we have just tried the alternatives the second time,
3414 return operands to normal and drop through. */
3416 if (commutative >= 0)
3421 register enum reg_class tclass;
3424 recog_operand[commutative] = substed_operand[commutative + 1];
3425 recog_operand[commutative + 1] = substed_operand[commutative];
3427 tclass = preferred_class[commutative];
3428 preferred_class[commutative] = preferred_class[commutative + 1];
3429 preferred_class[commutative + 1] = tclass;
3431 t = pref_or_nothing[commutative];
3432 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3433 pref_or_nothing[commutative + 1] = t;
3435 bcopy ((char *) constraints1, (char *) constraints,
3436 noperands * sizeof (char *));
3441 recog_operand[commutative] = substed_operand[commutative];
3442 recog_operand[commutative + 1] = substed_operand[commutative + 1];
3446 /* The operands don't meet the constraints.
3447 goal_alternative describes the alternative
3448 that we could reach by reloading the fewest operands.
3449 Reload so as to fit it. */
3451 if (best == MAX_RECOG_OPERANDS + 300)
3453 /* No alternative works with reloads?? */
3454 if (insn_code_number >= 0)
3456 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3457 /* Avoid further trouble with this insn. */
3458 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3463 /* Jump to `finish' from above if all operands are valid already.
3464 In that case, goal_alternative_win is all 1. */
3467 /* Right now, for any pair of operands I and J that are required to match,
3469 goal_alternative_matches[J] is I.
3470 Set up goal_alternative_matched as the inverse function:
3471 goal_alternative_matched[I] = J. */
3473 for (i = 0; i < noperands; i++)
3474 goal_alternative_matched[i] = -1;
3476 for (i = 0; i < noperands; i++)
3477 if (! goal_alternative_win[i]
3478 && goal_alternative_matches[i] >= 0)
3479 goal_alternative_matched[goal_alternative_matches[i]] = i;
3481 /* If the best alternative is with operands 1 and 2 swapped,
3482 consider them swapped before reporting the reloads. Update the
3483 operand numbers of any reloads already pushed. */
3485 if (goal_alternative_swapped)
3489 tem = substed_operand[commutative];
3490 substed_operand[commutative] = substed_operand[commutative + 1];
3491 substed_operand[commutative + 1] = tem;
3492 tem = recog_operand[commutative];
3493 recog_operand[commutative] = recog_operand[commutative + 1];
3494 recog_operand[commutative + 1] = tem;
3496 for (i = 0; i < n_reloads; i++)
3498 if (reload_opnum[i] == commutative)
3499 reload_opnum[i] = commutative + 1;
3500 else if (reload_opnum[i] == commutative + 1)
3501 reload_opnum[i] = commutative;
3505 /* Perform whatever substitutions on the operands we are supposed
3506 to make due to commutativity or replacement of registers
3507 with equivalent constants or memory slots. */
3509 for (i = 0; i < noperands; i++)
3511 *recog_operand_loc[i] = substed_operand[i];
3512 /* While we are looping on operands, initialize this. */
3513 operand_reloadnum[i] = -1;
3515 /* If this is an earlyclobber operand, we need to widen the scope.
3516 The reload must remain valid from the start of the insn being
3517 reloaded until after the operand is stored into its destination.
3518 We approximate this with RELOAD_OTHER even though we know that we
3519 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3521 One special case that is worth checking is when we have an
3522 output that is earlyclobber but isn't used past the insn (typically
3523 a SCRATCH). In this case, we only need have the reload live
3524 through the insn itself, but not for any of our input or output
3527 In any case, anything needed to address this operand can remain
3528 however they were previously categorized. */
3530 if (goal_alternative_earlyclobber[i])
3532 = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
3533 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3536 /* Any constants that aren't allowed and can't be reloaded
3537 into registers are here changed into memory references. */
3538 for (i = 0; i < noperands; i++)
3539 if (! goal_alternative_win[i]
3540 && CONSTANT_P (recog_operand[i])
3541 /* force_const_mem does not accept HIGH. */
3542 && GET_CODE (recog_operand[i]) != HIGH
3543 && (PREFERRED_RELOAD_CLASS (recog_operand[i],
3544 (enum reg_class) goal_alternative[i])
3546 && operand_mode[i] != VOIDmode)
3548 *recog_operand_loc[i] = recog_operand[i]
3549 = find_reloads_toplev (force_const_mem (operand_mode[i],
3551 i, address_type[i], ind_levels, 0);
3552 if (alternative_allows_memconst (constraints1[i],
3553 goal_alternative_number))
3554 goal_alternative_win[i] = 1;
3557 /* Record the values of the earlyclobber operands for the caller. */
3558 if (goal_earlyclobber)
3559 for (i = 0; i < noperands; i++)
3560 if (goal_alternative_earlyclobber[i])
3561 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3563 /* Now record reloads for all the operands that need them. */
3564 for (i = 0; i < noperands; i++)
3565 if (! goal_alternative_win[i])
3567 /* Operands that match previous ones have already been handled. */
3568 if (goal_alternative_matches[i] >= 0)
3570 /* Handle an operand with a nonoffsettable address
3571 appearing where an offsettable address will do
3572 by reloading the address into a base register.
3574 ??? We can also do this when the operand is a register and
3575 reg_equiv_mem is not offsettable, but this is a bit tricky,
3576 so we don't bother with it. It may not be worth doing. */
3577 else if (goal_alternative_matched[i] == -1
3578 && goal_alternative_offmemok[i]
3579 && GET_CODE (recog_operand[i]) == MEM)
3581 operand_reloadnum[i]
3582 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
3583 &XEXP (recog_operand[i], 0), NULL_PTR,
3584 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
3585 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3586 reload_inc[operand_reloadnum[i]]
3587 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
3589 /* If this operand is an output, we will have made any
3590 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3591 now we are treating part of the operand as an input, so
3592 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3594 if (modified[i] == RELOAD_WRITE)
3596 for (j = 0; j < n_reloads; j++)
3598 if (reload_opnum[j] == i)
3600 if (reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3601 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
3602 else if (reload_when_needed[j]
3603 == RELOAD_FOR_OUTADDR_ADDRESS)
3604 reload_when_needed[j] = RELOAD_FOR_INPADDR_ADDRESS;
3609 else if (goal_alternative_matched[i] == -1)
3610 operand_reloadnum[i]
3611 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3612 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3613 (modified[i] != RELOAD_WRITE
3614 ? recog_operand_loc[i] : 0),
3615 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
3616 (enum reg_class) goal_alternative[i],
3617 (modified[i] == RELOAD_WRITE
3618 ? VOIDmode : operand_mode[i]),
3619 (modified[i] == RELOAD_READ
3620 ? VOIDmode : operand_mode[i]),
3621 (insn_code_number < 0 ? 0
3622 : insn_operand_strict_low[insn_code_number][i]),
3623 0, i, operand_type[i]);
3624 /* In a matching pair of operands, one must be input only
3625 and the other must be output only.
3626 Pass the input operand as IN and the other as OUT. */
3627 else if (modified[i] == RELOAD_READ
3628 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3630 operand_reloadnum[i]
3631 = push_reload (recog_operand[i],
3632 recog_operand[goal_alternative_matched[i]],
3633 recog_operand_loc[i],
3634 recog_operand_loc[goal_alternative_matched[i]],
3635 (enum reg_class) goal_alternative[i],
3637 operand_mode[goal_alternative_matched[i]],
3638 0, 0, i, RELOAD_OTHER);
3639 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3641 else if (modified[i] == RELOAD_WRITE
3642 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3644 operand_reloadnum[goal_alternative_matched[i]]
3645 = push_reload (recog_operand[goal_alternative_matched[i]],
3647 recog_operand_loc[goal_alternative_matched[i]],
3648 recog_operand_loc[i],
3649 (enum reg_class) goal_alternative[i],
3650 operand_mode[goal_alternative_matched[i]],
3652 0, 0, i, RELOAD_OTHER);
3653 operand_reloadnum[i] = output_reloadnum;
3655 else if (insn_code_number >= 0)
3659 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3660 /* Avoid further trouble with this insn. */
3661 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3666 else if (goal_alternative_matched[i] < 0
3667 && goal_alternative_matches[i] < 0
3670 /* For each non-matching operand that's a MEM or a pseudo-register
3671 that didn't get a hard register, make an optional reload.
3672 This may get done even if the insn needs no reloads otherwise. */
3674 rtx operand = recog_operand[i];
3676 while (GET_CODE (operand) == SUBREG)
3677 operand = XEXP (operand, 0);
3678 if ((GET_CODE (operand) == MEM
3679 || (GET_CODE (operand) == REG
3680 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3681 && (enum reg_class) goal_alternative[i] != NO_REGS
3682 && ! no_input_reloads
3683 /* Optional output reloads don't do anything and we mustn't
3684 make in-out reloads on insns that are not permitted output
3686 && (modified[i] == RELOAD_READ
3687 || (modified[i] == RELOAD_READ_WRITE && ! no_output_reloads)))
3688 operand_reloadnum[i]
3689 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3690 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3691 (modified[i] != RELOAD_WRITE
3692 ? recog_operand_loc[i] : 0),
3693 (modified[i] != RELOAD_READ
3694 ? recog_operand_loc[i] : 0),
3695 (enum reg_class) goal_alternative[i],
3696 (modified[i] == RELOAD_WRITE
3697 ? VOIDmode : operand_mode[i]),
3698 (modified[i] == RELOAD_READ
3699 ? VOIDmode : operand_mode[i]),
3700 (insn_code_number < 0 ? 0
3701 : insn_operand_strict_low[insn_code_number][i]),
3702 1, i, operand_type[i]);
3704 else if (goal_alternative_matches[i] >= 0
3705 && goal_alternative_win[goal_alternative_matches[i]]
3706 && modified[i] == RELOAD_READ
3707 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3708 && ! no_input_reloads && ! no_output_reloads
3711 /* Similarly, make an optional reload for a pair of matching
3712 objects that are in MEM or a pseudo that didn't get a hard reg. */
3714 rtx operand = recog_operand[i];
3716 while (GET_CODE (operand) == SUBREG)
3717 operand = XEXP (operand, 0);
3718 if ((GET_CODE (operand) == MEM
3719 || (GET_CODE (operand) == REG
3720 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3721 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3723 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3724 = push_reload (recog_operand[goal_alternative_matches[i]],
3726 recog_operand_loc[goal_alternative_matches[i]],
3727 recog_operand_loc[i],
3728 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3729 operand_mode[goal_alternative_matches[i]],
3731 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3734 /* If this insn pattern contains any MATCH_DUP's, make sure that
3735 they will be substituted if the operands they match are substituted.
3736 Also do now any substitutions we already did on the operands.
3738 Don't do this if we aren't making replacements because we might be
3739 propagating things allocated by frame pointer elimination into places
3740 it doesn't expect. */
3742 if (insn_code_number >= 0 && replace)
3743 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3745 int opno = recog_dup_num[i];
3746 *recog_dup_loc[i] = *recog_operand_loc[opno];
3747 if (operand_reloadnum[opno] >= 0)
3748 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3749 insn_operand_mode[insn_code_number][opno]);
3753 /* This loses because reloading of prior insns can invalidate the equivalence
3754 (or at least find_equiv_reg isn't smart enough to find it any more),
3755 causing this insn to need more reload regs than it needed before.
3756 It may be too late to make the reload regs available.
3757 Now this optimization is done safely in choose_reload_regs. */
3759 /* For each reload of a reg into some other class of reg,
3760 search for an existing equivalent reg (same value now) in the right class.
3761 We can use it as long as we don't need to change its contents. */
3762 for (i = 0; i < n_reloads; i++)
3763 if (reload_reg_rtx[i] == 0
3764 && reload_in[i] != 0
3765 && GET_CODE (reload_in[i]) == REG
3766 && reload_out[i] == 0)
3769 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3770 static_reload_reg_p, 0, reload_inmode[i]);
3771 /* Prevent generation of insn to load the value
3772 because the one we found already has the value. */
3773 if (reload_reg_rtx[i])
3774 reload_in[i] = reload_reg_rtx[i];
3778 /* Perhaps an output reload can be combined with another
3779 to reduce needs by one. */
3780 if (!goal_earlyclobber)
3783 /* If we have a pair of reloads for parts of an address, they are reloading
3784 the same object, the operands themselves were not reloaded, and they
3785 are for two operands that are supposed to match, merge the reloads and
3786 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3788 for (i = 0; i < n_reloads; i++)
3792 for (j = i + 1; j < n_reloads; j++)
3793 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3794 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3795 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3796 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3797 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
3798 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS
3799 || reload_when_needed[j] == RELOAD_FOR_INPADDR_ADDRESS
3800 || reload_when_needed[j] == RELOAD_FOR_OUTADDR_ADDRESS)
3801 && rtx_equal_p (reload_in[i], reload_in[j])
3802 && (operand_reloadnum[reload_opnum[i]] < 0
3803 || reload_optional[operand_reloadnum[reload_opnum[i]]])
3804 && (operand_reloadnum[reload_opnum[j]] < 0
3805 || reload_optional[operand_reloadnum[reload_opnum[j]]])
3806 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
3807 || (goal_alternative_matches[reload_opnum[j]]
3808 == reload_opnum[i])))
3810 for (k = 0; k < n_replacements; k++)
3811 if (replacements[k].what == j)
3812 replacements[k].what = i;
3814 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3815 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3816 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
3818 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3823 /* Scan all the reloads and update their type.
3824 If a reload is for the address of an operand and we didn't reload
3825 that operand, change the type. Similarly, change the operand number
3826 of a reload when two operands match. If a reload is optional, treat it
3827 as though the operand isn't reloaded.
3829 ??? This latter case is somewhat odd because if we do the optional
3830 reload, it means the object is hanging around. Thus we need only
3831 do the address reload if the optional reload was NOT done.
3833 Change secondary reloads to be the address type of their operand, not
3836 If an operand's reload is now RELOAD_OTHER, change any
3837 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3838 RELOAD_FOR_OTHER_ADDRESS. */
3840 for (i = 0; i < n_reloads; i++)
3842 if (reload_secondary_p[i]
3843 && reload_when_needed[i] == operand_type[reload_opnum[i]])
3844 reload_when_needed[i] = address_type[reload_opnum[i]];
3846 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3847 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3848 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3849 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3850 && (operand_reloadnum[reload_opnum[i]] < 0
3851 || reload_optional[operand_reloadnum[reload_opnum[i]]]))
3853 /* If we have a secondary reload to go along with this reload,
3854 change its type to RELOAD_FOR_OPADDR_ADDR. */
3856 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3857 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
3858 && reload_secondary_in_reload[i] != -1)
3860 int secondary_in_reload = reload_secondary_in_reload[i];
3862 reload_when_needed[secondary_in_reload]
3863 = RELOAD_FOR_OPADDR_ADDR;
3865 /* If there's a tertiary reload we have to change it also. */
3866 if (secondary_in_reload > 0
3867 && reload_secondary_in_reload[secondary_in_reload] != -1)
3868 reload_when_needed[reload_secondary_in_reload[secondary_in_reload]]
3869 = RELOAD_FOR_OPADDR_ADDR;
3872 if ((reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3873 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3874 && reload_secondary_out_reload[i] != -1)
3876 int secondary_out_reload = reload_secondary_out_reload[i];
3878 reload_when_needed[secondary_out_reload]
3879 = RELOAD_FOR_OPADDR_ADDR;
3881 /* If there's a tertiary reload we have to change it also. */
3882 if (secondary_out_reload
3883 && reload_secondary_out_reload[secondary_out_reload] != -1)
3884 reload_when_needed[reload_secondary_out_reload[secondary_out_reload]]
3885 = RELOAD_FOR_OPADDR_ADDR;
3887 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3888 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3889 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
3891 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3894 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3895 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
3896 && operand_reloadnum[reload_opnum[i]] >= 0
3897 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
3899 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
3901 if (goal_alternative_matches[reload_opnum[i]] >= 0)
3902 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
3905 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
3906 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
3907 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
3909 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
3910 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
3911 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
3912 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
3913 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
3914 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
3915 This is complicated by the fact that a single operand can have more
3916 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
3917 choose_reload_regs without affecting code quality, and cases that
3918 actually fail are extremely rare, so it turns out to be better to fix
3919 the problem here by not generating cases that choose_reload_regs will
3923 int op_addr_reloads = 0;
3924 for (i = 0; i < n_reloads; i++)
3925 if (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS)
3928 if (op_addr_reloads > 1)
3929 for (i = 0; i < n_reloads; i++)
3930 if (reload_when_needed[i] == RELOAD_FOR_OPADDR_ADDR)
3931 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3934 /* See if we have any reloads that are now allowed to be merged
3935 because we've changed when the reload is needed to
3936 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3937 check for the most common cases. */
3939 for (i = 0; i < n_reloads; i++)
3940 if (reload_in[i] != 0 && reload_out[i] == 0
3941 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
3942 || reload_when_needed[i] == RELOAD_FOR_OPADDR_ADDR
3943 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
3944 for (j = 0; j < n_reloads; j++)
3945 if (i != j && reload_in[j] != 0 && reload_out[j] == 0
3946 && reload_when_needed[j] == reload_when_needed[i]
3947 && MATCHES (reload_in[i], reload_in[j])
3948 && reload_reg_class[i] == reload_reg_class[j]
3949 && !reload_nocombine[i] && !reload_nocombine[j]
3950 && reload_reg_rtx[i] == reload_reg_rtx[j])
3952 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
3953 transfer_replacements (i, j);
3957 #else /* no REGISTER_CONSTRAINTS */
3959 int insn_code_number;
3960 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
3962 rtx body = PATTERN (insn);
3966 n_earlyclobbers = 0;
3967 replace_reloads = replace;
3970 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3971 Store the operand values in RECOG_OPERAND and the locations
3972 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3973 Return if the insn needs no reload processing. */
3975 switch (GET_CODE (body))
3986 noperands = asm_noperands (body);
3989 /* This insn is an `asm' with operands.
3990 First, find out how many operands, and allocate space. */
3992 insn_code_number = -1;
3993 /* ??? This is a bug! ???
3994 Give up and delete this insn if it has too many operands. */
3995 if (noperands > MAX_RECOG_OPERANDS)
3998 /* Now get the operand values out of the insn. */
4000 decode_asm_operands (body, recog_operand, recog_operand_loc,
4001 NULL_PTR, NULL_PTR);
4006 /* Ordinary insn: recognize it, allocate space for operands and
4007 constraints, and get them out via insn_extract. */
4009 insn_code_number = recog_memoized (insn);
4010 noperands = insn_n_operands[insn_code_number];
4011 insn_extract (insn);
4017 for (i = 0; i < noperands; i++)
4019 register RTX_CODE code = GET_CODE (recog_operand[i]);
4020 int is_set_dest = GET_CODE (body) == SET && (i == 0);
4022 if (insn_code_number >= 0)
4023 if (insn_operand_address_p[insn_code_number][i])
4024 find_reloads_address (VOIDmode, NULL_PTR,
4025 recog_operand[i], recog_operand_loc[i],
4026 i, RELOAD_FOR_INPUT, ind_levels, insn);
4028 /* In these cases, we can't tell if the operand is an input
4029 or an output, so be conservative. In practice it won't be
4033 find_reloads_address (GET_MODE (recog_operand[i]),
4034 recog_operand_loc[i],
4035 XEXP (recog_operand[i], 0),
4036 &XEXP (recog_operand[i], 0),
4037 i, RELOAD_OTHER, ind_levels, insn);
4039 recog_operand[i] = *recog_operand_loc[i]
4040 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
4041 ind_levels, is_set_dest);
4044 register int regno = REGNO (recog_operand[i]);
4045 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4046 recog_operand[i] = *recog_operand_loc[i]
4047 = reg_equiv_constant[regno];
4048 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4049 that feeds this insn. */
4050 if (reg_equiv_mem[regno] != 0)
4051 recog_operand[i] = *recog_operand_loc[i]
4052 = reg_equiv_mem[regno];
4057 /* Perhaps an output reload can be combined with another
4058 to reduce needs by one. */
4059 if (!goal_earlyclobber)
4061 #endif /* no REGISTER_CONSTRAINTS */
4064 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4065 accepts a memory operand with constant address. */
4068 alternative_allows_memconst (constraint, altnum)
4073 /* Skip alternatives before the one requested. */
4076 while (*constraint++ != ',');
4079 /* Scan the requested alternative for 'm' or 'o'.
4080 If one of them is present, this alternative accepts memory constants. */
4081 while ((c = *constraint++) && c != ',' && c != '#')
4082 if (c == 'm' || c == 'o')
4087 /* Scan X for memory references and scan the addresses for reloading.
4088 Also checks for references to "constant" regs that we want to eliminate
4089 and replaces them with the values they stand for.
4090 We may alter X destructively if it contains a reference to such.
4091 If X is just a constant reg, we return the equivalent value
4094 IND_LEVELS says how many levels of indirect addressing this machine
4097 OPNUM and TYPE identify the purpose of the reload.
4099 IS_SET_DEST is true if X is the destination of a SET, which is not
4100 appropriate to be replaced by a constant. */
4103 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest)
4106 enum reload_type type;
4110 register RTX_CODE code = GET_CODE (x);
4112 register char *fmt = GET_RTX_FORMAT (code);
4117 /* This code is duplicated for speed in find_reloads. */
4118 register int regno = REGNO (x);
4119 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4120 x = reg_equiv_constant[regno];
4122 /* This creates (subreg (mem...)) which would cause an unnecessary
4123 reload of the mem. */
4124 else if (reg_equiv_mem[regno] != 0)
4125 x = reg_equiv_mem[regno];
4127 else if (reg_equiv_address[regno] != 0)
4129 /* If reg_equiv_address varies, it may be shared, so copy it. */
4130 /* We must rerun eliminate_regs, in case the elimination
4131 offsets have changed. */
4132 rtx addr = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0,
4136 if (rtx_varies_p (addr))
4137 addr = copy_rtx (addr);
4139 x = gen_rtx_MEM (GET_MODE (x), addr);
4140 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4141 find_reloads_address (GET_MODE (x), NULL_PTR,
4143 &XEXP (x, 0), opnum, type, ind_levels, 0);
4150 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4151 opnum, type, ind_levels, 0);
4155 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4157 /* Check for SUBREG containing a REG that's equivalent to a constant.
4158 If the constant has a known value, truncate it right now.
4159 Similarly if we are extracting a single-word of a multi-word
4160 constant. If the constant is symbolic, allow it to be substituted
4161 normally. push_reload will strip the subreg later. If the
4162 constant is VOIDmode, abort because we will lose the mode of
4163 the register (this should never happen because one of the cases
4164 above should handle it). */
4166 register int regno = REGNO (SUBREG_REG (x));
4169 if (subreg_lowpart_p (x)
4170 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4171 && reg_equiv_constant[regno] != 0
4172 && (tem = gen_lowpart_common (GET_MODE (x),
4173 reg_equiv_constant[regno])) != 0)
4176 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
4177 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4178 && reg_equiv_constant[regno] != 0
4179 && (tem = operand_subword (reg_equiv_constant[regno],
4181 GET_MODE (SUBREG_REG (x)))) != 0)
4184 /* If the SUBREG is wider than a word, the above test will fail.
4185 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4186 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4187 a 32 bit target. We still can - and have to - handle this
4188 for non-paradoxical subregs of CONST_INTs. */
4189 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4190 && reg_equiv_constant[regno] != 0
4191 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT
4192 && (GET_MODE_SIZE (GET_MODE (x))
4193 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
4195 int shift = SUBREG_WORD (x) * BITS_PER_WORD;
4196 if (WORDS_BIG_ENDIAN)
4197 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
4198 - GET_MODE_BITSIZE (GET_MODE (x))
4200 /* Here we use the knowledge that CONST_INTs have a
4201 HOST_WIDE_INT field. */
4202 if (shift >= HOST_BITS_PER_WIDE_INT)
4203 shift = HOST_BITS_PER_WIDE_INT - 1;
4204 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift);
4207 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4208 && reg_equiv_constant[regno] != 0
4209 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
4212 /* If the subreg contains a reg that will be converted to a mem,
4213 convert the subreg to a narrower memref now.
4214 Otherwise, we would get (subreg (mem ...) ...),
4215 which would force reload of the mem.
4217 We also need to do this if there is an equivalent MEM that is
4218 not offsettable. In that case, alter_subreg would produce an
4219 invalid address on big-endian machines.
4221 For machines that extend byte loads, we must not reload using
4222 a wider mode if we have a paradoxical SUBREG. find_reloads will
4223 force a reload in that case. So we should not do anything here. */
4225 else if (regno >= FIRST_PSEUDO_REGISTER
4226 #ifdef LOAD_EXTEND_OP
4227 && (GET_MODE_SIZE (GET_MODE (x))
4228 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4230 && (reg_equiv_address[regno] != 0
4231 || (reg_equiv_mem[regno] != 0
4232 && (! strict_memory_address_p (GET_MODE (x),
4233 XEXP (reg_equiv_mem[regno], 0))
4234 || ! offsettable_memref_p (reg_equiv_mem[regno])))))
4236 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
4237 /* We must rerun eliminate_regs, in case the elimination
4238 offsets have changed. */
4239 rtx addr = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0,
4242 if (BYTES_BIG_ENDIAN)
4245 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
4246 offset += MIN (size, UNITS_PER_WORD);
4247 size = GET_MODE_SIZE (GET_MODE (x));
4248 offset -= MIN (size, UNITS_PER_WORD);
4250 addr = plus_constant (addr, offset);
4251 x = gen_rtx_MEM (GET_MODE (x), addr);
4252 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4253 find_reloads_address (GET_MODE (x), NULL_PTR,
4255 &XEXP (x, 0), opnum, type, ind_levels, 0);
4260 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4263 XEXP (x, i) = find_reloads_toplev (XEXP (x, i), opnum, type,
4264 ind_levels, is_set_dest);
4269 /* Return a mem ref for the memory equivalent of reg REGNO.
4270 This mem ref is not shared with anything. */
4273 make_memloc (ad, regno)
4280 /* We must rerun eliminate_regs, in case the elimination
4281 offsets have changed. */
4282 rtx tem = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4284 #if 0 /* We cannot safely reuse a memloc made here;
4285 if the pseudo appears twice, and its mem needs a reload,
4286 it gets two separate reloads assigned, but it only
4287 gets substituted with the second of them;
4288 then it can get used before that reload reg gets loaded up. */
4289 for (i = 0; i < n_memlocs; i++)
4290 if (rtx_equal_p (tem, XEXP (memlocs[i], 0)))
4294 /* If TEM might contain a pseudo, we must copy it to avoid
4295 modifying it when we do the substitution for the reload. */
4296 if (rtx_varies_p (tem))
4297 tem = copy_rtx (tem);
4299 tem = gen_rtx_MEM (GET_MODE (ad), tem);
4300 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4301 memlocs[n_memlocs++] = tem;
4305 /* Record all reloads needed for handling memory address AD
4306 which appears in *LOC in a memory reference to mode MODE
4307 which itself is found in location *MEMREFLOC.
4308 Note that we take shortcuts assuming that no multi-reg machine mode
4309 occurs as part of an address.
4311 OPNUM and TYPE specify the purpose of this reload.
4313 IND_LEVELS says how many levels of indirect addressing this machine
4316 INSN, if nonzero, is the insn in which we do the reload. It is used
4317 to determine if we may generate output reloads.
4319 Value is nonzero if this address is reloaded or replaced as a whole.
4320 This is interesting to the caller if the address is an autoincrement.
4322 Note that there is no verification that the address will be valid after
4323 this routine does its work. Instead, we rely on the fact that the address
4324 was valid when reload started. So we need only undo things that reload
4325 could have broken. These are wrong register types, pseudos not allocated
4326 to a hard register, and frame pointer elimination. */
4329 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn)
4330 enum machine_mode mode;
4335 enum reload_type type;
4342 /* If the address is a register, see if it is a legitimate address and
4343 reload if not. We first handle the cases where we need not reload
4344 or where we must reload in a non-standard way. */
4346 if (GET_CODE (ad) == REG)
4350 if (reg_equiv_constant[regno] != 0
4351 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
4353 *loc = ad = reg_equiv_constant[regno];
4357 else if (reg_equiv_address[regno] != 0)
4359 tem = make_memloc (ad, regno);
4360 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
4361 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
4363 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4364 reload_address_base_reg_class,
4365 GET_MODE (ad), VOIDmode, 0, 0,
4370 /* We can avoid a reload if the register's equivalent memory expression
4371 is valid as an indirect memory address.
4372 But not all addresses are valid in a mem used as an indirect address:
4373 only reg or reg+constant. */
4375 else if (reg_equiv_mem[regno] != 0 && ind_levels > 0
4376 && strict_memory_address_p (mode, reg_equiv_mem[regno])
4377 && (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == REG
4378 || (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == PLUS
4379 && GET_CODE (XEXP (XEXP (reg_equiv_mem[regno], 0), 0)) == REG
4380 && CONSTANT_P (XEXP (XEXP (reg_equiv_mem[regno], 0), 1)))))
4383 /* The only remaining case where we can avoid a reload is if this is a
4384 hard register that is valid as a base register and which is not the
4385 subject of a CLOBBER in this insn. */
4387 else if (regno < FIRST_PSEUDO_REGISTER
4388 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4389 && ! regno_clobbered_p (regno, this_insn))
4392 /* If we do not have one of the cases above, we must do the reload. */
4393 push_reload (ad, NULL_RTX, loc, NULL_PTR, reload_address_base_reg_class,
4394 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4398 if (strict_memory_address_p (mode, ad))
4400 /* The address appears valid, so reloads are not needed.
4401 But the address may contain an eliminable register.
4402 This can happen because a machine with indirect addressing
4403 may consider a pseudo register by itself a valid address even when
4404 it has failed to get a hard reg.
4405 So do a tree-walk to find and eliminate all such regs. */
4407 /* But first quickly dispose of a common case. */
4408 if (GET_CODE (ad) == PLUS
4409 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4410 && GET_CODE (XEXP (ad, 0)) == REG
4411 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4414 subst_reg_equivs_changed = 0;
4415 *loc = subst_reg_equivs (ad);
4417 if (! subst_reg_equivs_changed)
4420 /* Check result for validity after substitution. */
4421 if (strict_memory_address_p (mode, ad))
4425 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4430 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4435 *memrefloc = copy_rtx (*memrefloc);
4436 XEXP (*memrefloc, 0) = ad;
4437 move_replacements (&ad, &XEXP (*memrefloc, 0));
4443 /* The address is not valid. We have to figure out why. One possibility
4444 is that it is itself a MEM. This can happen when the frame pointer is
4445 being eliminated, a pseudo is not allocated to a hard register, and the
4446 offset between the frame and stack pointers is not its initial value.
4447 In that case the pseudo will have been replaced by a MEM referring to
4448 the stack pointer. */
4449 if (GET_CODE (ad) == MEM)
4451 /* First ensure that the address in this MEM is valid. Then, unless
4452 indirect addresses are valid, reload the MEM into a register. */
4454 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4455 opnum, ADDR_TYPE (type),
4456 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4458 /* If tem was changed, then we must create a new memory reference to
4459 hold it and store it back into memrefloc. */
4460 if (tem != ad && memrefloc)
4462 *memrefloc = copy_rtx (*memrefloc);
4463 copy_replacements (tem, XEXP (*memrefloc, 0));
4464 loc = &XEXP (*memrefloc, 0);
4467 /* Check similar cases as for indirect addresses as above except
4468 that we can allow pseudos and a MEM since they should have been
4469 taken care of above. */
4472 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4473 || GET_CODE (XEXP (tem, 0)) == MEM
4474 || ! (GET_CODE (XEXP (tem, 0)) == REG
4475 || (GET_CODE (XEXP (tem, 0)) == PLUS
4476 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4477 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4479 /* Must use TEM here, not AD, since it is the one that will
4480 have any subexpressions reloaded, if needed. */
4481 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4482 reload_address_base_reg_class, GET_MODE (tem),
4491 /* If we have address of a stack slot but it's not valid because the
4492 displacement is too large, compute the sum in a register.
4493 Handle all base registers here, not just fp/ap/sp, because on some
4494 targets (namely SH) we can also get too large displacements from
4495 big-endian corrections. */
4496 else if (GET_CODE (ad) == PLUS
4497 && GET_CODE (XEXP (ad, 0)) == REG
4498 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4499 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4500 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4502 /* Unshare the MEM rtx so we can safely alter it. */
4505 *memrefloc = copy_rtx (*memrefloc);
4506 loc = &XEXP (*memrefloc, 0);
4508 if (double_reg_address_ok)
4510 /* Unshare the sum as well. */
4511 *loc = ad = copy_rtx (ad);
4512 /* Reload the displacement into an index reg.
4513 We assume the frame pointer or arg pointer is a base reg. */
4514 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4515 reload_address_index_reg_class,
4516 GET_MODE (ad), opnum, type, ind_levels);
4520 /* If the sum of two regs is not necessarily valid,
4521 reload the sum into a base reg.
4522 That will at least work. */
4523 find_reloads_address_part (ad, loc, reload_address_base_reg_class,
4524 Pmode, opnum, type, ind_levels);
4529 /* If we have an indexed stack slot, there are three possible reasons why
4530 it might be invalid: The index might need to be reloaded, the address
4531 might have been made by frame pointer elimination and hence have a
4532 constant out of range, or both reasons might apply.
4534 We can easily check for an index needing reload, but even if that is the
4535 case, we might also have an invalid constant. To avoid making the
4536 conservative assumption and requiring two reloads, we see if this address
4537 is valid when not interpreted strictly. If it is, the only problem is
4538 that the index needs a reload and find_reloads_address_1 will take care
4541 There is still a case when we might generate an extra reload,
4542 however. In certain cases eliminate_regs will return a MEM for a REG
4543 (see the code there for details). In those cases, memory_address_p
4544 applied to our address will return 0 so we will think that our offset
4545 must be too large. But it might indeed be valid and the only problem
4546 is that a MEM is present where a REG should be. This case should be
4547 very rare and there doesn't seem to be any way to avoid it.
4549 If we decide to do something here, it must be that
4550 `double_reg_address_ok' is true and that this address rtl was made by
4551 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4552 rework the sum so that the reload register will be added to the index.
4553 This is safe because we know the address isn't shared.
4555 We check for fp/ap/sp as both the first and second operand of the
4558 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4559 && GET_CODE (XEXP (ad, 0)) == PLUS
4560 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4561 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4562 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4564 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4565 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4567 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4568 && ! memory_address_p (mode, ad))
4570 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4571 plus_constant (XEXP (XEXP (ad, 0), 0),
4572 INTVAL (XEXP (ad, 1))),
4573 XEXP (XEXP (ad, 0), 1));
4574 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0),
4575 reload_address_base_reg_class,
4576 GET_MODE (ad), opnum, type, ind_levels);
4577 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4583 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4584 && GET_CODE (XEXP (ad, 0)) == PLUS
4585 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4586 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4587 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4589 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4590 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4592 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4593 && ! memory_address_p (mode, ad))
4595 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4596 XEXP (XEXP (ad, 0), 0),
4597 plus_constant (XEXP (XEXP (ad, 0), 1),
4598 INTVAL (XEXP (ad, 1))));
4599 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4600 reload_address_base_reg_class,
4601 GET_MODE (ad), opnum, type, ind_levels);
4602 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4608 /* See if address becomes valid when an eliminable register
4609 in a sum is replaced. */
4612 if (GET_CODE (ad) == PLUS)
4613 tem = subst_indexed_address (ad);
4614 if (tem != ad && strict_memory_address_p (mode, tem))
4616 /* Ok, we win that way. Replace any additional eliminable
4619 subst_reg_equivs_changed = 0;
4620 tem = subst_reg_equivs (tem);
4622 /* Make sure that didn't make the address invalid again. */
4624 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4631 /* If constants aren't valid addresses, reload the constant address
4633 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4635 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4636 Unshare it so we can safely alter it. */
4637 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4638 && CONSTANT_POOL_ADDRESS_P (ad))
4640 *memrefloc = copy_rtx (*memrefloc);
4641 loc = &XEXP (*memrefloc, 0);
4644 find_reloads_address_part (ad, loc, reload_address_base_reg_class,
4650 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
4654 /* Find all pseudo regs appearing in AD
4655 that are eliminable in favor of equivalent values
4656 and do not have hard regs; replace them by their equivalents. */
4659 subst_reg_equivs (ad)
4662 register RTX_CODE code = GET_CODE (ad);
4680 register int regno = REGNO (ad);
4682 if (reg_equiv_constant[regno] != 0)
4684 subst_reg_equivs_changed = 1;
4685 return reg_equiv_constant[regno];
4691 /* Quickly dispose of a common case. */
4692 if (XEXP (ad, 0) == frame_pointer_rtx
4693 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4701 fmt = GET_RTX_FORMAT (code);
4702 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4704 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i));
4708 /* Compute the sum of X and Y, making canonicalizations assumed in an
4709 address, namely: sum constant integers, surround the sum of two
4710 constants with a CONST, put the constant as the second operand, and
4711 group the constant on the outermost sum.
4713 This routine assumes both inputs are already in canonical form. */
4720 enum machine_mode mode = GET_MODE (x);
4722 if (mode == VOIDmode)
4723 mode = GET_MODE (y);
4725 if (mode == VOIDmode)
4728 if (GET_CODE (x) == CONST_INT)
4729 return plus_constant (y, INTVAL (x));
4730 else if (GET_CODE (y) == CONST_INT)
4731 return plus_constant (x, INTVAL (y));
4732 else if (CONSTANT_P (x))
4733 tem = x, x = y, y = tem;
4735 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
4736 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
4738 /* Note that if the operands of Y are specified in the opposite
4739 order in the recursive calls below, infinite recursion will occur. */
4740 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
4741 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
4743 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4744 constant will have been placed second. */
4745 if (CONSTANT_P (x) && CONSTANT_P (y))
4747 if (GET_CODE (x) == CONST)
4749 if (GET_CODE (y) == CONST)
4752 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
4755 return gen_rtx_PLUS (mode, x, y);
4758 /* If ADDR is a sum containing a pseudo register that should be
4759 replaced with a constant (from reg_equiv_constant),
4760 return the result of doing so, and also apply the associative
4761 law so that the result is more likely to be a valid address.
4762 (But it is not guaranteed to be one.)
4764 Note that at most one register is replaced, even if more are
4765 replaceable. Also, we try to put the result into a canonical form
4766 so it is more likely to be a valid address.
4768 In all other cases, return ADDR. */
4771 subst_indexed_address (addr)
4774 rtx op0 = 0, op1 = 0, op2 = 0;
4778 if (GET_CODE (addr) == PLUS)
4780 /* Try to find a register to replace. */
4781 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
4782 if (GET_CODE (op0) == REG
4783 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
4784 && reg_renumber[regno] < 0
4785 && reg_equiv_constant[regno] != 0)
4786 op0 = reg_equiv_constant[regno];
4787 else if (GET_CODE (op1) == REG
4788 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
4789 && reg_renumber[regno] < 0
4790 && reg_equiv_constant[regno] != 0)
4791 op1 = reg_equiv_constant[regno];
4792 else if (GET_CODE (op0) == PLUS
4793 && (tem = subst_indexed_address (op0)) != op0)
4795 else if (GET_CODE (op1) == PLUS
4796 && (tem = subst_indexed_address (op1)) != op1)
4801 /* Pick out up to three things to add. */
4802 if (GET_CODE (op1) == PLUS)
4803 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
4804 else if (GET_CODE (op0) == PLUS)
4805 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4807 /* Compute the sum. */
4809 op1 = form_sum (op1, op2);
4811 op0 = form_sum (op0, op1);
4818 /* Record the pseudo registers we must reload into hard registers in a
4819 subexpression of a would-be memory address, X referring to a value
4820 in mode MODE. (This function is not called if the address we find
4823 CONTEXT = 1 means we are considering regs as index regs,
4824 = 0 means we are considering them as base regs.
4826 OPNUM and TYPE specify the purpose of any reloads made.
4828 IND_LEVELS says how many levels of indirect addressing are
4829 supported at this point in the address.
4831 INSN, if nonzero, is the insn in which we do the reload. It is used
4832 to determine if we may generate output reloads.
4834 We return nonzero if X, as a whole, is reloaded or replaced. */
4836 /* Note that we take shortcuts assuming that no multi-reg machine mode
4837 occurs as part of an address.
4838 Also, this is not fully machine-customizable; it works for machines
4839 such as vaxes and 68000's and 32000's, but other possible machines
4840 could have addressing modes that this does not handle right. */
4843 find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
4844 enum machine_mode mode;
4849 enum reload_type type;
4853 register RTX_CODE code = GET_CODE (x);
4859 register rtx orig_op0 = XEXP (x, 0);
4860 register rtx orig_op1 = XEXP (x, 1);
4861 register RTX_CODE code0 = GET_CODE (orig_op0);
4862 register RTX_CODE code1 = GET_CODE (orig_op1);
4863 register rtx op0 = orig_op0;
4864 register rtx op1 = orig_op1;
4866 if (GET_CODE (op0) == SUBREG)
4868 op0 = SUBREG_REG (op0);
4869 code0 = GET_CODE (op0);
4870 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
4871 op0 = gen_rtx_REG (word_mode,
4872 REGNO (op0) + SUBREG_WORD (orig_op0));
4875 if (GET_CODE (op1) == SUBREG)
4877 op1 = SUBREG_REG (op1);
4878 code1 = GET_CODE (op1);
4879 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
4880 op1 = gen_rtx_REG (GET_MODE (op1),
4881 REGNO (op1) + SUBREG_WORD (orig_op1));
4884 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
4885 || code0 == ZERO_EXTEND || code1 == MEM)
4887 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
4888 type, ind_levels, insn);
4889 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
4890 type, ind_levels, insn);
4893 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
4894 || code1 == ZERO_EXTEND || code0 == MEM)
4896 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
4897 type, ind_levels, insn);
4898 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
4899 type, ind_levels, insn);
4902 else if (code0 == CONST_INT || code0 == CONST
4903 || code0 == SYMBOL_REF || code0 == LABEL_REF)
4904 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
4905 type, ind_levels, insn);
4907 else if (code1 == CONST_INT || code1 == CONST
4908 || code1 == SYMBOL_REF || code1 == LABEL_REF)
4909 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
4910 type, ind_levels, insn);
4912 else if (code0 == REG && code1 == REG)
4914 if (REG_OK_FOR_INDEX_P (op0)
4915 && REG_MODE_OK_FOR_BASE_P (op1, mode))
4917 else if (REG_OK_FOR_INDEX_P (op1)
4918 && REG_MODE_OK_FOR_BASE_P (op0, mode))
4920 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
4921 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
4922 type, ind_levels, insn);
4923 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
4924 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
4925 type, ind_levels, insn);
4926 else if (REG_OK_FOR_INDEX_P (op1))
4927 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
4928 type, ind_levels, insn);
4929 else if (REG_OK_FOR_INDEX_P (op0))
4930 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
4931 type, ind_levels, insn);
4934 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
4935 type, ind_levels, insn);
4936 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
4937 type, ind_levels, insn);
4941 else if (code0 == REG)
4943 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
4944 type, ind_levels, insn);
4945 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
4946 type, ind_levels, insn);
4949 else if (code1 == REG)
4951 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
4952 type, ind_levels, insn);
4953 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
4954 type, ind_levels, insn);
4964 if (GET_CODE (XEXP (x, 0)) == REG)
4966 register int regno = REGNO (XEXP (x, 0));
4970 /* A register that is incremented cannot be constant! */
4971 if (regno >= FIRST_PSEUDO_REGISTER
4972 && reg_equiv_constant[regno] != 0)
4975 /* Handle a register that is equivalent to a memory location
4976 which cannot be addressed directly. */
4977 if (reg_equiv_address[regno] != 0)
4979 rtx tem = make_memloc (XEXP (x, 0), regno);
4980 /* First reload the memory location's address.
4981 We can't use ADDR_TYPE (type) here, because we need to
4982 write back the value after reading it, hence we actually
4983 need two registers. */
4984 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
4985 &XEXP (tem, 0), opnum, type,
4987 /* Put this inside a new increment-expression. */
4988 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
4989 /* Proceed to reload that, as if it contained a register. */
4992 /* If we have a hard register that is ok as an index,
4993 don't make a reload. If an autoincrement of a nice register
4994 isn't "valid", it must be that no autoincrement is "valid".
4995 If that is true and something made an autoincrement anyway,
4996 this must be a special context where one is allowed.
4997 (For example, a "push" instruction.)
4998 We can't improve this address, so leave it alone. */
5000 /* Otherwise, reload the autoincrement into a suitable hard reg
5001 and record how much to increment by. */
5003 if (reg_renumber[regno] >= 0)
5004 regno = reg_renumber[regno];
5005 if ((regno >= FIRST_PSEUDO_REGISTER
5006 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5007 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5014 /* If we can output the register afterwards, do so, this
5015 saves the extra update.
5016 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5017 CALL_INSN - and it does not set CC0.
5018 But don't do this if we cannot directly address the
5019 memory location, since this will make it harder to
5020 reuse address reloads, and increases register pressure.
5021 Also don't do this if we can probably update x directly. */
5022 rtx equiv = reg_equiv_mem[regno];
5023 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5024 if (insn && GET_CODE (insn) == INSN && equiv
5026 && ! sets_cc0_p (PATTERN (insn))
5028 && ! (icode != CODE_FOR_nothing
5029 && (*insn_operand_predicate[icode][0]) (equiv, Pmode)
5030 && (*insn_operand_predicate[icode][1]) (equiv, Pmode)))
5035 = push_reload (x, x, loc, loc,
5037 ? reload_address_index_reg_class
5038 : reload_address_base_reg_class),
5039 GET_MODE (x), GET_MODE (x), 0, 0,
5040 opnum, RELOAD_OTHER);
5045 = push_reload (x, NULL_RTX, loc, NULL_PTR,
5047 ? reload_address_index_reg_class
5048 : reload_address_base_reg_class),
5049 GET_MODE (x), GET_MODE (x), 0, 0,
5051 reload_inc[reloadnum]
5052 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5058 /* Update the REG_INC notes. */
5060 for (link = REG_NOTES (this_insn);
5061 link; link = XEXP (link, 1))
5062 if (REG_NOTE_KIND (link) == REG_INC
5063 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
5064 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5070 else if (GET_CODE (XEXP (x, 0)) == MEM)
5072 /* This is probably the result of a substitution, by eliminate_regs,
5073 of an equivalent address for a pseudo that was not allocated to a
5074 hard register. Verify that the specified address is valid and
5075 reload it into a register. */
5076 rtx tem = XEXP (x, 0);
5080 /* Since we know we are going to reload this item, don't decrement
5081 for the indirection level.
5083 Note that this is actually conservative: it would be slightly
5084 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5086 /* We can't use ADDR_TYPE (type) here, because we need to
5087 write back the value after reading it, hence we actually
5088 need two registers. */
5089 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5090 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5091 opnum, type, ind_levels, insn);
5093 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
5095 ? reload_address_index_reg_class
5096 : reload_address_base_reg_class),
5097 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5098 reload_inc[reloadnum]
5099 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5101 link = FIND_REG_INC_NOTE (this_insn, tem);
5103 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5110 /* This is probably the result of a substitution, by eliminate_regs, of
5111 an equivalent address for a pseudo that was not allocated to a hard
5112 register. Verify that the specified address is valid and reload it
5115 Since we know we are going to reload this item, don't decrement for
5116 the indirection level.
5118 Note that this is actually conservative: it would be slightly more
5119 efficient to use the value of SPILL_INDIRECT_LEVELS from
5122 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5123 opnum, ADDR_TYPE (type), ind_levels, insn);
5124 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
5125 (context ? reload_address_index_reg_class
5126 : reload_address_base_reg_class),
5127 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5132 register int regno = REGNO (x);
5134 if (reg_equiv_constant[regno] != 0)
5136 find_reloads_address_part (reg_equiv_constant[regno], loc,
5138 ? reload_address_index_reg_class
5139 : reload_address_base_reg_class),
5140 GET_MODE (x), opnum, type, ind_levels);
5144 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5145 that feeds this insn. */
5146 if (reg_equiv_mem[regno] != 0)
5148 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
5150 ? reload_address_index_reg_class
5151 : reload_address_base_reg_class),
5152 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5157 if (reg_equiv_address[regno] != 0)
5159 x = make_memloc (x, regno);
5160 find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0),
5161 opnum, ADDR_TYPE (type), ind_levels, insn);
5164 if (reg_renumber[regno] >= 0)
5165 regno = reg_renumber[regno];
5167 if ((regno >= FIRST_PSEUDO_REGISTER
5168 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5169 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5171 push_reload (x, NULL_RTX, loc, NULL_PTR,
5173 ? reload_address_index_reg_class
5174 : reload_address_base_reg_class),
5175 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5179 /* If a register appearing in an address is the subject of a CLOBBER
5180 in this insn, reload it into some other register to be safe.
5181 The CLOBBER is supposed to make the register unavailable
5182 from before this insn to after it. */
5183 if (regno_clobbered_p (regno, this_insn))
5185 push_reload (x, NULL_RTX, loc, NULL_PTR,
5187 ? reload_address_index_reg_class
5188 : reload_address_base_reg_class),
5189 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5196 if (GET_CODE (SUBREG_REG (x)) == REG)
5198 /* If this is a SUBREG of a hard register and the resulting register
5199 is of the wrong class, reload the whole SUBREG. This avoids
5200 needless copies if SUBREG_REG is multi-word. */
5201 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5203 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5205 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5206 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5208 push_reload (x, NULL_RTX, loc, NULL_PTR,
5210 ? reload_address_index_reg_class
5211 : reload_address_base_reg_class),
5212 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5216 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5217 is larger than the class size, then reload the whole SUBREG. */
5220 enum reg_class class = (context
5221 ? reload_address_index_reg_class
5222 : reload_address_base_reg_class);
5223 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5224 > reg_class_size[class])
5226 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5227 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5239 register char *fmt = GET_RTX_FORMAT (code);
5242 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5245 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5246 opnum, type, ind_levels, insn);
5253 /* X, which is found at *LOC, is a part of an address that needs to be
5254 reloaded into a register of class CLASS. If X is a constant, or if
5255 X is a PLUS that contains a constant, check that the constant is a
5256 legitimate operand and that we are supposed to be able to load
5257 it into the register.
5259 If not, force the constant into memory and reload the MEM instead.
5261 MODE is the mode to use, in case X is an integer constant.
5263 OPNUM and TYPE describe the purpose of any reloads made.
5265 IND_LEVELS says how many levels of indirect addressing this machine
5269 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
5272 enum reg_class class;
5273 enum machine_mode mode;
5275 enum reload_type type;
5279 && (! LEGITIMATE_CONSTANT_P (x)
5280 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5282 rtx tem = x = force_const_mem (mode, x);
5283 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5284 opnum, type, ind_levels, 0);
5287 else if (GET_CODE (x) == PLUS
5288 && CONSTANT_P (XEXP (x, 1))
5289 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5290 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5292 rtx tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5294 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5295 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5296 opnum, type, ind_levels, 0);
5299 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5300 mode, VOIDmode, 0, 0, opnum, type);
5303 /* Substitute into the current INSN the registers into which we have reloaded
5304 the things that need reloading. The array `replacements'
5305 says contains the locations of all pointers that must be changed
5306 and says what to replace them with.
5308 Return the rtx that X translates into; usually X, but modified. */
5315 for (i = 0; i < n_replacements; i++)
5317 register struct replacement *r = &replacements[i];
5318 register rtx reloadreg = reload_reg_rtx[r->what];
5321 /* Encapsulate RELOADREG so its machine mode matches what
5322 used to be there. Note that gen_lowpart_common will
5323 do the wrong thing if RELOADREG is multi-word. RELOADREG
5324 will always be a REG here. */
5325 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5326 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5328 /* If we are putting this into a SUBREG and RELOADREG is a
5329 SUBREG, we would be making nested SUBREGs, so we have to fix
5330 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5332 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5334 if (GET_MODE (*r->subreg_loc)
5335 == GET_MODE (SUBREG_REG (reloadreg)))
5336 *r->subreg_loc = SUBREG_REG (reloadreg);
5339 *r->where = SUBREG_REG (reloadreg);
5340 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
5344 *r->where = reloadreg;
5346 /* If reload got no reg and isn't optional, something's wrong. */
5347 else if (! reload_optional[r->what])
5352 /* Make a copy of any replacements being done into X and move those copies
5353 to locations in Y, a copy of X. We only look at the highest level of
5357 copy_replacements (x, y)
5362 enum rtx_code code = GET_CODE (x);
5363 char *fmt = GET_RTX_FORMAT (code);
5364 struct replacement *r;
5366 /* We can't support X being a SUBREG because we might then need to know its
5367 location if something inside it was replaced. */
5371 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5373 for (j = 0; j < n_replacements; j++)
5375 if (replacements[j].subreg_loc == &XEXP (x, i))
5377 r = &replacements[n_replacements++];
5378 r->where = replacements[j].where;
5379 r->subreg_loc = &XEXP (y, i);
5380 r->what = replacements[j].what;
5381 r->mode = replacements[j].mode;
5383 else if (replacements[j].where == &XEXP (x, i))
5385 r = &replacements[n_replacements++];
5386 r->where = &XEXP (y, i);
5388 r->what = replacements[j].what;
5389 r->mode = replacements[j].mode;
5394 /* Change any replacements being done to *X to be done to *Y */
5397 move_replacements (x, y)
5403 for (i = 0; i < n_replacements; i++)
5404 if (replacements[i].subreg_loc == x)
5405 replacements[i].subreg_loc = y;
5406 else if (replacements[i].where == x)
5408 replacements[i].where = y;
5409 replacements[i].subreg_loc = 0;
5413 /* If LOC was scheduled to be replaced by something, return the replacement.
5414 Otherwise, return *LOC. */
5417 find_replacement (loc)
5420 struct replacement *r;
5422 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
5424 rtx reloadreg = reload_reg_rtx[r->what];
5426 if (reloadreg && r->where == loc)
5428 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
5429 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5433 else if (reloadreg && r->subreg_loc == loc)
5435 /* RELOADREG must be either a REG or a SUBREG.
5437 ??? Is it actually still ever a SUBREG? If so, why? */
5439 if (GET_CODE (reloadreg) == REG)
5440 return gen_rtx_REG (GET_MODE (*loc),
5441 REGNO (reloadreg) + SUBREG_WORD (*loc));
5442 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
5445 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
5446 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
5450 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5451 what's inside and make a new rtl if so. */
5452 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
5453 || GET_CODE (*loc) == MULT)
5455 rtx x = find_replacement (&XEXP (*loc, 0));
5456 rtx y = find_replacement (&XEXP (*loc, 1));
5458 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
5459 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
5465 /* Return nonzero if register in range [REGNO, ENDREGNO)
5466 appears either explicitly or implicitly in X
5467 other than being stored into (except for earlyclobber operands).
5469 References contained within the substructure at LOC do not count.
5470 LOC may be zero, meaning don't ignore anything.
5472 This is similar to refers_to_regno_p in rtlanal.c except that we
5473 look at equivalences for pseudos that didn't get hard registers. */
5476 refers_to_regno_for_reload_p (regno, endregno, x, loc)
5477 int regno, endregno;
5482 register RTX_CODE code;
5489 code = GET_CODE (x);
5496 /* If this is a pseudo, a hard register must not have been allocated.
5497 X must therefore either be a constant or be in memory. */
5498 if (i >= FIRST_PSEUDO_REGISTER)
5500 if (reg_equiv_memory_loc[i])
5501 return refers_to_regno_for_reload_p (regno, endregno,
5502 reg_equiv_memory_loc[i],
5505 if (reg_equiv_constant[i])
5511 return (endregno > i
5512 && regno < i + (i < FIRST_PSEUDO_REGISTER
5513 ? HARD_REGNO_NREGS (i, GET_MODE (x))
5517 /* If this is a SUBREG of a hard reg, we can see exactly which
5518 registers are being modified. Otherwise, handle normally. */
5519 if (GET_CODE (SUBREG_REG (x)) == REG
5520 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5522 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5524 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
5525 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5527 return endregno > inner_regno && regno < inner_endregno;
5533 if (&SET_DEST (x) != loc
5534 /* Note setting a SUBREG counts as referring to the REG it is in for
5535 a pseudo but not for hard registers since we can
5536 treat each word individually. */
5537 && ((GET_CODE (SET_DEST (x)) == SUBREG
5538 && loc != &SUBREG_REG (SET_DEST (x))
5539 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
5540 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
5541 && refers_to_regno_for_reload_p (regno, endregno,
5542 SUBREG_REG (SET_DEST (x)),
5544 /* If the output is an earlyclobber operand, this is
5546 || ((GET_CODE (SET_DEST (x)) != REG
5547 || earlyclobber_operand_p (SET_DEST (x)))
5548 && refers_to_regno_for_reload_p (regno, endregno,
5549 SET_DEST (x), loc))))
5552 if (code == CLOBBER || loc == &SET_SRC (x))
5561 /* X does not match, so try its subexpressions. */
5563 fmt = GET_RTX_FORMAT (code);
5564 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5566 if (fmt[i] == 'e' && loc != &XEXP (x, i))
5574 if (refers_to_regno_for_reload_p (regno, endregno,
5578 else if (fmt[i] == 'E')
5581 for (j = XVECLEN (x, i) - 1; j >=0; j--)
5582 if (loc != &XVECEXP (x, i, j)
5583 && refers_to_regno_for_reload_p (regno, endregno,
5584 XVECEXP (x, i, j), loc))
5591 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5592 we check if any register number in X conflicts with the relevant register
5593 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5594 contains a MEM (we don't bother checking for memory addresses that can't
5595 conflict because we expect this to be a rare case.
5597 This function is similar to reg_overlap_mention_p in rtlanal.c except
5598 that we look at equivalences for pseudos that didn't get hard registers. */
5601 reg_overlap_mentioned_for_reload_p (x, in)
5604 int regno, endregno;
5606 if (GET_CODE (x) == SUBREG)
5608 regno = REGNO (SUBREG_REG (x));
5609 if (regno < FIRST_PSEUDO_REGISTER)
5610 regno += SUBREG_WORD (x);
5612 else if (GET_CODE (x) == REG)
5616 /* If this is a pseudo, it must not have been assigned a hard register.
5617 Therefore, it must either be in memory or be a constant. */
5619 if (regno >= FIRST_PSEUDO_REGISTER)
5621 if (reg_equiv_memory_loc[regno])
5622 return refers_to_mem_for_reload_p (in);
5623 else if (reg_equiv_constant[regno])
5628 else if (CONSTANT_P (x))
5630 else if (GET_CODE (x) == MEM)
5631 return refers_to_mem_for_reload_p (in);
5632 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
5633 || GET_CODE (x) == CC0)
5634 return reg_mentioned_p (x, in);
5638 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
5639 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5641 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
5644 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5648 refers_to_mem_for_reload_p (x)
5654 if (GET_CODE (x) == MEM)
5657 if (GET_CODE (x) == REG)
5658 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
5659 && reg_equiv_memory_loc[REGNO (x)]);
5661 fmt = GET_RTX_FORMAT (GET_CODE (x));
5662 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
5664 && (GET_CODE (XEXP (x, i)) == MEM
5665 || refers_to_mem_for_reload_p (XEXP (x, i))))
5671 /* Check the insns before INSN to see if there is a suitable register
5672 containing the same value as GOAL.
5673 If OTHER is -1, look for a register in class CLASS.
5674 Otherwise, just see if register number OTHER shares GOAL's value.
5676 Return an rtx for the register found, or zero if none is found.
5678 If RELOAD_REG_P is (short *)1,
5679 we reject any hard reg that appears in reload_reg_rtx
5680 because such a hard reg is also needed coming into this insn.
5682 If RELOAD_REG_P is any other nonzero value,
5683 it is a vector indexed by hard reg number
5684 and we reject any hard reg whose element in the vector is nonnegative
5685 as well as any that appears in reload_reg_rtx.
5687 If GOAL is zero, then GOALREG is a register number; we look
5688 for an equivalent for that register.
5690 MODE is the machine mode of the value we want an equivalence for.
5691 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5693 This function is used by jump.c as well as in the reload pass.
5695 If GOAL is the sum of the stack pointer and a constant, we treat it
5696 as if it were a constant except that sp is required to be unchanging. */
5699 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
5702 enum reg_class class;
5704 short *reload_reg_p;
5706 enum machine_mode mode;
5708 register rtx p = insn;
5709 rtx goaltry, valtry, value, where;
5711 register int regno = -1;
5715 int goal_mem_addr_varies = 0;
5716 int need_stable_sp = 0;
5722 else if (GET_CODE (goal) == REG)
5723 regno = REGNO (goal);
5724 else if (GET_CODE (goal) == MEM)
5726 enum rtx_code code = GET_CODE (XEXP (goal, 0));
5727 if (MEM_VOLATILE_P (goal))
5729 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
5731 /* An address with side effects must be reexecuted. */
5744 else if (CONSTANT_P (goal))
5746 else if (GET_CODE (goal) == PLUS
5747 && XEXP (goal, 0) == stack_pointer_rtx
5748 && CONSTANT_P (XEXP (goal, 1)))
5749 goal_const = need_stable_sp = 1;
5750 else if (GET_CODE (goal) == PLUS
5751 && XEXP (goal, 0) == frame_pointer_rtx
5752 && CONSTANT_P (XEXP (goal, 1)))
5757 /* On some machines, certain regs must always be rejected
5758 because they don't behave the way ordinary registers do. */
5760 #ifdef OVERLAPPING_REGNO_P
5761 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5762 && OVERLAPPING_REGNO_P (regno))
5766 /* Scan insns back from INSN, looking for one that copies
5767 a value into or out of GOAL.
5768 Stop and give up if we reach a label. */
5773 if (p == 0 || GET_CODE (p) == CODE_LABEL)
5775 if (GET_CODE (p) == INSN
5776 /* If we don't want spill regs ... */
5777 && (! (reload_reg_p != 0
5778 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
5779 /* ... then ignore insns introduced by reload; they aren't useful
5780 and can cause results in reload_as_needed to be different
5781 from what they were when calculating the need for spills.
5782 If we notice an input-reload insn here, we will reject it below,
5783 but it might hide a usable equivalent. That makes bad code.
5784 It may even abort: perhaps no reg was spilled for this insn
5785 because it was assumed we would find that equivalent. */
5786 || INSN_UID (p) < reload_first_uid))
5789 pat = single_set (p);
5790 /* First check for something that sets some reg equal to GOAL. */
5793 && true_regnum (SET_SRC (pat)) == regno
5794 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5797 && true_regnum (SET_DEST (pat)) == regno
5798 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
5800 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
5801 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5803 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
5804 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
5806 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
5807 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
5808 /* If we are looking for a constant,
5809 and something equivalent to that constant was copied
5810 into a reg, we can use that reg. */
5811 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5813 && rtx_equal_p (XEXP (tem, 0), goal)
5814 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5815 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5817 && GET_CODE (SET_DEST (pat)) == REG
5818 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5819 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5820 && GET_CODE (goal) == CONST_INT
5821 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
5823 && rtx_equal_p (goal, goaltry)
5824 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
5826 && (valueno = true_regnum (valtry)) >= 0)
5827 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5829 && GET_CODE (SET_DEST (pat)) == REG
5830 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5831 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5832 && GET_CODE (goal) == CONST_INT
5833 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
5835 && rtx_equal_p (goal, goaltry)
5837 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
5838 && (valueno = true_regnum (valtry)) >= 0)))
5841 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
5842 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
5852 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5853 (or copying VALUE into GOAL, if GOAL is also a register).
5854 Now verify that VALUE is really valid. */
5856 /* VALUENO is the register number of VALUE; a hard register. */
5858 /* Don't try to re-use something that is killed in this insn. We want
5859 to be able to trust REG_UNUSED notes. */
5860 if (find_reg_note (where, REG_UNUSED, value))
5863 /* If we propose to get the value from the stack pointer or if GOAL is
5864 a MEM based on the stack pointer, we need a stable SP. */
5865 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
5866 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
5870 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5871 if (GET_MODE (value) != mode)
5874 /* Reject VALUE if it was loaded from GOAL
5875 and is also a register that appears in the address of GOAL. */
5877 if (goal_mem && value == SET_DEST (single_set (where))
5878 && refers_to_regno_for_reload_p (valueno,
5880 + HARD_REGNO_NREGS (valueno, mode)),
5884 /* Reject registers that overlap GOAL. */
5886 if (!goal_mem && !goal_const
5887 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
5888 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
5891 /* Reject VALUE if it is one of the regs reserved for reloads.
5892 Reload1 knows how to reuse them anyway, and it would get
5893 confused if we allocated one without its knowledge.
5894 (Now that insns introduced by reload are ignored above,
5895 this case shouldn't happen, but I'm not positive.) */
5897 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
5898 && reload_reg_p[valueno] >= 0)
5901 /* On some machines, certain regs must always be rejected
5902 because they don't behave the way ordinary registers do. */
5904 #ifdef OVERLAPPING_REGNO_P
5905 if (OVERLAPPING_REGNO_P (valueno))
5909 nregs = HARD_REGNO_NREGS (regno, mode);
5910 valuenregs = HARD_REGNO_NREGS (valueno, mode);
5912 /* Reject VALUE if it is a register being used for an input reload
5913 even if it is not one of those reserved. */
5915 if (reload_reg_p != 0)
5918 for (i = 0; i < n_reloads; i++)
5919 if (reload_reg_rtx[i] != 0 && reload_in[i])
5921 int regno1 = REGNO (reload_reg_rtx[i]);
5922 int nregs1 = HARD_REGNO_NREGS (regno1,
5923 GET_MODE (reload_reg_rtx[i]));
5924 if (regno1 < valueno + valuenregs
5925 && regno1 + nregs1 > valueno)
5931 /* We must treat frame pointer as varying here,
5932 since it can vary--in a nonlocal goto as generated by expand_goto. */
5933 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
5935 /* Now verify that the values of GOAL and VALUE remain unaltered
5936 until INSN is reached. */
5945 /* Don't trust the conversion past a function call
5946 if either of the two is in a call-clobbered register, or memory. */
5947 if (GET_CODE (p) == CALL_INSN
5948 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5949 && call_used_regs[regno])
5951 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5952 && call_used_regs[valueno])
5958 #ifdef NON_SAVING_SETJMP
5959 if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE
5960 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
5964 #ifdef INSN_CLOBBERS_REGNO_P
5965 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5966 && INSN_CLOBBERS_REGNO_P (p, valueno))
5967 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5968 && INSN_CLOBBERS_REGNO_P (p, regno)))
5972 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
5974 /* If this insn P stores in either GOAL or VALUE, return 0.
5975 If GOAL is a memory ref and this insn writes memory, return 0.
5976 If GOAL is a memory ref and its address is not constant,
5977 and this insn P changes a register used in GOAL, return 0. */
5980 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
5982 register rtx dest = SET_DEST (pat);
5983 while (GET_CODE (dest) == SUBREG
5984 || GET_CODE (dest) == ZERO_EXTRACT
5985 || GET_CODE (dest) == SIGN_EXTRACT
5986 || GET_CODE (dest) == STRICT_LOW_PART)
5987 dest = XEXP (dest, 0);
5988 if (GET_CODE (dest) == REG)
5990 register int xregno = REGNO (dest);
5992 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5993 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5996 if (xregno < regno + nregs && xregno + xnregs > regno)
5998 if (xregno < valueno + valuenregs
5999 && xregno + xnregs > valueno)
6001 if (goal_mem_addr_varies
6002 && reg_overlap_mentioned_for_reload_p (dest, goal))
6005 else if (goal_mem && GET_CODE (dest) == MEM
6006 && ! push_operand (dest, GET_MODE (dest)))
6008 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6009 && reg_equiv_memory_loc[regno] != 0)
6011 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6014 else if (GET_CODE (pat) == PARALLEL)
6017 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6019 register rtx v1 = XVECEXP (pat, 0, i);
6020 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6022 register rtx dest = SET_DEST (v1);
6023 while (GET_CODE (dest) == SUBREG
6024 || GET_CODE (dest) == ZERO_EXTRACT
6025 || GET_CODE (dest) == SIGN_EXTRACT
6026 || GET_CODE (dest) == STRICT_LOW_PART)
6027 dest = XEXP (dest, 0);
6028 if (GET_CODE (dest) == REG)
6030 register int xregno = REGNO (dest);
6032 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6033 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6036 if (xregno < regno + nregs
6037 && xregno + xnregs > regno)
6039 if (xregno < valueno + valuenregs
6040 && xregno + xnregs > valueno)
6042 if (goal_mem_addr_varies
6043 && reg_overlap_mentioned_for_reload_p (dest,
6047 else if (goal_mem && GET_CODE (dest) == MEM
6048 && ! push_operand (dest, GET_MODE (dest)))
6050 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6051 && reg_equiv_memory_loc[regno] != 0)
6053 else if (need_stable_sp
6054 && push_operand (dest, GET_MODE (dest)))
6060 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
6064 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6065 link = XEXP (link, 1))
6067 pat = XEXP (link, 0);
6068 if (GET_CODE (pat) == CLOBBER)
6070 register rtx dest = SET_DEST (pat);
6071 while (GET_CODE (dest) == SUBREG
6072 || GET_CODE (dest) == ZERO_EXTRACT
6073 || GET_CODE (dest) == SIGN_EXTRACT
6074 || GET_CODE (dest) == STRICT_LOW_PART)
6075 dest = XEXP (dest, 0);
6076 if (GET_CODE (dest) == REG)
6078 register int xregno = REGNO (dest);
6080 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6081 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6084 if (xregno < regno + nregs
6085 && xregno + xnregs > regno)
6087 if (xregno < valueno + valuenregs
6088 && xregno + xnregs > valueno)
6090 if (goal_mem_addr_varies
6091 && reg_overlap_mentioned_for_reload_p (dest,
6095 else if (goal_mem && GET_CODE (dest) == MEM
6096 && ! push_operand (dest, GET_MODE (dest)))
6098 else if (need_stable_sp
6099 && push_operand (dest, GET_MODE (dest)))
6106 /* If this insn auto-increments or auto-decrements
6107 either regno or valueno, return 0 now.
6108 If GOAL is a memory ref and its address is not constant,
6109 and this insn P increments a register used in GOAL, return 0. */
6113 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6114 if (REG_NOTE_KIND (link) == REG_INC
6115 && GET_CODE (XEXP (link, 0)) == REG)
6117 register int incno = REGNO (XEXP (link, 0));
6118 if (incno < regno + nregs && incno >= regno)
6120 if (incno < valueno + valuenregs && incno >= valueno)
6122 if (goal_mem_addr_varies
6123 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6133 /* Find a place where INCED appears in an increment or decrement operator
6134 within X, and return the amount INCED is incremented or decremented by.
6135 The value is always positive. */
6138 find_inc_amount (x, inced)
6141 register enum rtx_code code = GET_CODE (x);
6147 register rtx addr = XEXP (x, 0);
6148 if ((GET_CODE (addr) == PRE_DEC
6149 || GET_CODE (addr) == POST_DEC
6150 || GET_CODE (addr) == PRE_INC
6151 || GET_CODE (addr) == POST_INC)
6152 && XEXP (addr, 0) == inced)
6153 return GET_MODE_SIZE (GET_MODE (x));
6156 fmt = GET_RTX_FORMAT (code);
6157 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6161 register int tem = find_inc_amount (XEXP (x, i), inced);
6168 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6170 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6180 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6183 regno_clobbered_p (regno, insn)
6187 if (GET_CODE (PATTERN (insn)) == CLOBBER
6188 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6189 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
6191 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6193 int i = XVECLEN (PATTERN (insn), 0) - 1;
6197 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6198 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
6199 && REGNO (XEXP (elt, 0)) == regno)
6207 static char *reload_when_needed_name[] =
6210 "RELOAD_FOR_OUTPUT",
6212 "RELOAD_FOR_INPUT_ADDRESS",
6213 "RELOAD_FOR_INPADDR_ADDRESS",
6214 "RELOAD_FOR_OUTPUT_ADDRESS",
6215 "RELOAD_FOR_OUTADDR_ADDRESS",
6216 "RELOAD_FOR_OPERAND_ADDRESS",
6217 "RELOAD_FOR_OPADDR_ADDR",
6219 "RELOAD_FOR_OTHER_ADDRESS"
6222 static char *reg_class_names[] = REG_CLASS_NAMES;
6224 /* These functions are used to print the variables set by 'find_reloads' */
6227 debug_reload_to_stream (f)
6235 for (r = 0; r < n_reloads; r++)
6237 fprintf (f, "Reload %d: ", r);
6239 if (reload_in[r] != 0)
6241 fprintf (f, "reload_in (%s) = ",
6242 GET_MODE_NAME (reload_inmode[r]));
6243 print_inline_rtx (f, reload_in[r], 24);
6244 fprintf (f, "\n\t");
6247 if (reload_out[r] != 0)
6249 fprintf (f, "reload_out (%s) = ",
6250 GET_MODE_NAME (reload_outmode[r]));
6251 print_inline_rtx (f, reload_out[r], 24);
6252 fprintf (f, "\n\t");
6255 fprintf (f, "%s, ", reg_class_names[(int) reload_reg_class[r]]);
6257 fprintf (f, "%s (opnum = %d)",
6258 reload_when_needed_name[(int) reload_when_needed[r]],
6261 if (reload_optional[r])
6262 fprintf (f, ", optional");
6264 if (reload_inc[r] != 0)
6265 fprintf (f, ", inc by %d", reload_inc[r]);
6267 if (reload_nocombine[r])
6268 fprintf (f, ", can't combine");
6270 if (reload_secondary_p[r])
6271 fprintf (f, ", secondary_reload_p");
6273 if (reload_in_reg[r] != 0)
6275 fprintf (f, "\n\treload_in_reg: ");
6276 print_inline_rtx (f, reload_in_reg[r], 24);
6279 if (reload_reg_rtx[r] != 0)
6281 fprintf (f, "\n\treload_reg_rtx: ");
6282 print_inline_rtx (f, reload_reg_rtx[r], 24);
6286 if (reload_secondary_in_reload[r] != -1)
6288 fprintf (f, "%ssecondary_in_reload = %d",
6289 prefix, reload_secondary_in_reload[r]);
6293 if (reload_secondary_out_reload[r] != -1)
6294 fprintf (f, "%ssecondary_out_reload = %d\n",
6295 prefix, reload_secondary_out_reload[r]);
6298 if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
6300 fprintf (f, "%ssecondary_in_icode = %s", prefix, insn_name[r]);
6304 if (reload_secondary_out_icode[r] != CODE_FOR_nothing)
6305 fprintf (f, "%ssecondary_out_icode = %s", prefix, insn_name[r]);
6314 debug_reload_to_stream (stderr);
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