1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation,
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
23 /* This file contains subroutines used only from the file reload1.c.
24 It knows how to scan one insn for operands and values
25 that need to be copied into registers to make valid code.
26 It also finds other operands and values which are valid
27 but for which equivalent values in registers exist and
28 ought to be used instead.
30 Before processing the first insn of the function, call `init_reload'.
31 init_reload actually has to be called earlier anyway.
33 To scan an insn, call `find_reloads'. This does two things:
34 1. sets up tables describing which values must be reloaded
35 for this insn, and what kind of hard regs they must be reloaded into;
36 2. optionally record the locations where those values appear in
37 the data, so they can be replaced properly later.
38 This is done only if the second arg to `find_reloads' is nonzero.
40 The third arg to `find_reloads' specifies the number of levels
41 of indirect addressing supported by the machine. If it is zero,
42 indirect addressing is not valid. If it is one, (MEM (REG n))
43 is valid even if (REG n) did not get a hard register; if it is two,
44 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
45 hard register, and similarly for higher values.
47 Then you must choose the hard regs to reload those pseudo regs into,
48 and generate appropriate load insns before this insn and perhaps
49 also store insns after this insn. Set up the array `reload_reg_rtx'
50 to contain the REG rtx's for the registers you used. In some
51 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
52 for certain reloads. Then that tells you which register to use,
53 so you do not need to allocate one. But you still do need to add extra
54 instructions to copy the value into and out of that register.
56 Finally you must call `subst_reloads' to substitute the reload reg rtx's
57 into the locations already recorded.
61 find_reloads can alter the operands of the instruction it is called on.
63 1. Two operands of any sort may be interchanged, if they are in a
64 commutative instruction.
65 This happens only if find_reloads thinks the instruction will compile
68 2. Pseudo-registers that are equivalent to constants are replaced
69 with those constants if they are not in hard registers.
71 1 happens every time find_reloads is called.
72 2 happens only when REPLACE is 1, which is only when
73 actually doing the reloads, not when just counting them.
75 Using a reload register for several reloads in one insn:
77 When an insn has reloads, it is considered as having three parts:
78 the input reloads, the insn itself after reloading, and the output reloads.
79 Reloads of values used in memory addresses are often needed for only one part.
81 When this is so, reload_when_needed records which part needs the reload.
82 Two reloads for different parts of the insn can share the same reload
85 When a reload is used for addresses in multiple parts, or when it is
86 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
87 a register with any other reload. */
93 #include "coretypes.h"
97 #include "insn-config.h"
103 #include "addresses.h"
104 #include "hard-reg-set.h"
108 #include "function.h"
113 /* True if X is a constant that can be forced into the constant pool. */
114 #define CONST_POOL_OK_P(X) \
116 && GET_CODE (X) != HIGH \
117 && !targetm.cannot_force_const_mem (X))
119 /* True if C is a non-empty register class that has too few registers
120 to be safely used as a reload target class. */
121 #define SMALL_REGISTER_CLASS_P(C) \
122 (reg_class_size [(C)] == 1 \
123 || (reg_class_size [(C)] >= 1 && CLASS_LIKELY_SPILLED_P (C)))
126 /* All reloads of the current insn are recorded here. See reload.h for
129 struct reload rld[MAX_RELOADS];
131 /* All the "earlyclobber" operands of the current insn
132 are recorded here. */
134 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
136 int reload_n_operands;
138 /* Replacing reloads.
140 If `replace_reloads' is nonzero, then as each reload is recorded
141 an entry is made for it in the table `replacements'.
142 Then later `subst_reloads' can look through that table and
143 perform all the replacements needed. */
145 /* Nonzero means record the places to replace. */
146 static int replace_reloads;
148 /* Each replacement is recorded with a structure like this. */
151 rtx *where; /* Location to store in */
152 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
153 a SUBREG; 0 otherwise. */
154 int what; /* which reload this is for */
155 enum machine_mode mode; /* mode it must have */
158 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
160 /* Number of replacements currently recorded. */
161 static int n_replacements;
163 /* Used to track what is modified by an operand. */
166 int reg_flag; /* Nonzero if referencing a register. */
167 int safe; /* Nonzero if this can't conflict with anything. */
168 rtx base; /* Base address for MEM. */
169 HOST_WIDE_INT start; /* Starting offset or register number. */
170 HOST_WIDE_INT end; /* Ending offset or register number. */
173 #ifdef SECONDARY_MEMORY_NEEDED
175 /* Save MEMs needed to copy from one class of registers to another. One MEM
176 is used per mode, but normally only one or two modes are ever used.
178 We keep two versions, before and after register elimination. The one
179 after register elimination is record separately for each operand. This
180 is done in case the address is not valid to be sure that we separately
183 static rtx secondary_memlocs[NUM_MACHINE_MODES];
184 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
185 static int secondary_memlocs_elim_used = 0;
188 /* The instruction we are doing reloads for;
189 so we can test whether a register dies in it. */
190 static rtx this_insn;
192 /* Nonzero if this instruction is a user-specified asm with operands. */
193 static int this_insn_is_asm;
195 /* If hard_regs_live_known is nonzero,
196 we can tell which hard regs are currently live,
197 at least enough to succeed in choosing dummy reloads. */
198 static int hard_regs_live_known;
200 /* Indexed by hard reg number,
201 element is nonnegative if hard reg has been spilled.
202 This vector is passed to `find_reloads' as an argument
203 and is not changed here. */
204 static short *static_reload_reg_p;
206 /* Set to 1 in subst_reg_equivs if it changes anything. */
207 static int subst_reg_equivs_changed;
209 /* On return from push_reload, holds the reload-number for the OUT
210 operand, which can be different for that from the input operand. */
211 static int output_reloadnum;
213 /* Compare two RTX's. */
214 #define MATCHES(x, y) \
215 (x == y || (x != 0 && (REG_P (x) \
216 ? REG_P (y) && REGNO (x) == REGNO (y) \
217 : rtx_equal_p (x, y) && ! side_effects_p (x))))
219 /* Indicates if two reloads purposes are for similar enough things that we
220 can merge their reloads. */
221 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
222 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
223 || ((when1) == (when2) && (op1) == (op2)) \
224 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
225 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
226 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
227 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
228 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
230 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
231 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
232 ((when1) != (when2) \
233 || ! ((op1) == (op2) \
234 || (when1) == RELOAD_FOR_INPUT \
235 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
236 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
238 /* If we are going to reload an address, compute the reload type to
240 #define ADDR_TYPE(type) \
241 ((type) == RELOAD_FOR_INPUT_ADDRESS \
242 ? RELOAD_FOR_INPADDR_ADDRESS \
243 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
244 ? RELOAD_FOR_OUTADDR_ADDRESS \
247 static int push_secondary_reload (int, rtx, int, int, enum reg_class,
248 enum machine_mode, enum reload_type,
249 enum insn_code *, secondary_reload_info *);
250 static enum reg_class find_valid_class (enum machine_mode, enum machine_mode,
252 static int reload_inner_reg_of_subreg (rtx, enum machine_mode, int);
253 static void push_replacement (rtx *, int, enum machine_mode);
254 static void dup_replacements (rtx *, rtx *);
255 static void combine_reloads (void);
256 static int find_reusable_reload (rtx *, rtx, enum reg_class,
257 enum reload_type, int, int);
258 static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, enum machine_mode,
259 enum machine_mode, enum reg_class, int, int);
260 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
261 static struct decomposition decompose (rtx);
262 static int immune_p (rtx, rtx, struct decomposition);
263 static int alternative_allows_memconst (const char *, int);
264 static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx,
266 static rtx make_memloc (rtx, int);
267 static int maybe_memory_address_p (enum machine_mode, rtx, rtx *);
268 static int find_reloads_address (enum machine_mode, rtx *, rtx, rtx *,
269 int, enum reload_type, int, rtx);
270 static rtx subst_reg_equivs (rtx, rtx);
271 static rtx subst_indexed_address (rtx);
272 static void update_auto_inc_notes (rtx, int, int);
273 static int find_reloads_address_1 (enum machine_mode, rtx, int,
274 enum rtx_code, enum rtx_code, rtx *,
275 int, enum reload_type,int, rtx);
276 static void find_reloads_address_part (rtx, rtx *, enum reg_class,
277 enum machine_mode, int,
278 enum reload_type, int);
279 static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type,
281 static void copy_replacements_1 (rtx *, rtx *, int);
282 static int find_inc_amount (rtx, rtx);
283 static int refers_to_mem_for_reload_p (rtx);
284 static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
287 /* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
291 push_reg_equiv_alt_mem (int regno, rtx mem)
295 for (it = reg_equiv_alt_mem_list [regno]; it; it = XEXP (it, 1))
296 if (rtx_equal_p (XEXP (it, 0), mem))
299 reg_equiv_alt_mem_list [regno]
300 = alloc_EXPR_LIST (REG_EQUIV, mem,
301 reg_equiv_alt_mem_list [regno]);
304 /* Determine if any secondary reloads are needed for loading (if IN_P is
305 nonzero) or storing (if IN_P is zero) X to or from a reload register of
306 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
307 are needed, push them.
309 Return the reload number of the secondary reload we made, or -1 if
310 we didn't need one. *PICODE is set to the insn_code to use if we do
311 need a secondary reload. */
314 push_secondary_reload (int in_p, rtx x, int opnum, int optional,
315 enum reg_class reload_class,
316 enum machine_mode reload_mode, enum reload_type type,
317 enum insn_code *picode, secondary_reload_info *prev_sri)
319 enum reg_class class = NO_REGS;
320 enum reg_class scratch_class;
321 enum machine_mode mode = reload_mode;
322 enum insn_code icode = CODE_FOR_nothing;
323 enum insn_code t_icode = CODE_FOR_nothing;
324 enum reload_type secondary_type;
325 int s_reload, t_reload = -1;
326 const char *scratch_constraint;
328 secondary_reload_info sri;
330 if (type == RELOAD_FOR_INPUT_ADDRESS
331 || type == RELOAD_FOR_OUTPUT_ADDRESS
332 || type == RELOAD_FOR_INPADDR_ADDRESS
333 || type == RELOAD_FOR_OUTADDR_ADDRESS)
334 secondary_type = type;
336 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
338 *picode = CODE_FOR_nothing;
340 /* If X is a paradoxical SUBREG, use the inner value to determine both the
341 mode and object being reloaded. */
342 if (GET_CODE (x) == SUBREG
343 && (GET_MODE_SIZE (GET_MODE (x))
344 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
347 reload_mode = GET_MODE (x);
350 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
351 is still a pseudo-register by now, it *must* have an equivalent MEM
352 but we don't want to assume that), use that equivalent when seeing if
353 a secondary reload is needed since whether or not a reload is needed
354 might be sensitive to the form of the MEM. */
356 if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
357 && reg_equiv_mem[REGNO (x)] != 0)
358 x = reg_equiv_mem[REGNO (x)];
360 sri.icode = CODE_FOR_nothing;
361 sri.prev_sri = prev_sri;
362 class = targetm.secondary_reload (in_p, x, reload_class, reload_mode, &sri);
365 /* If we don't need any secondary registers, done. */
366 if (class == NO_REGS && icode == CODE_FOR_nothing)
369 if (class != NO_REGS)
370 t_reload = push_secondary_reload (in_p, x, opnum, optional, class,
371 reload_mode, type, &t_icode, &sri);
373 /* If we will be using an insn, the secondary reload is for a
376 if (icode != CODE_FOR_nothing)
378 /* If IN_P is nonzero, the reload register will be the output in
379 operand 0. If IN_P is zero, the reload register will be the input
380 in operand 1. Outputs should have an initial "=", which we must
383 /* ??? It would be useful to be able to handle only two, or more than
384 three, operands, but for now we can only handle the case of having
385 exactly three: output, input and one temp/scratch. */
386 gcc_assert (insn_data[(int) icode].n_operands == 3);
388 /* ??? We currently have no way to represent a reload that needs
389 an icode to reload from an intermediate tertiary reload register.
390 We should probably have a new field in struct reload to tag a
391 chain of scratch operand reloads onto. */
392 gcc_assert (class == NO_REGS);
394 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
395 gcc_assert (*scratch_constraint == '=');
396 scratch_constraint++;
397 if (*scratch_constraint == '&')
398 scratch_constraint++;
399 letter = *scratch_constraint;
400 scratch_class = (letter == 'r' ? GENERAL_REGS
401 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) letter,
402 scratch_constraint));
404 class = scratch_class;
405 mode = insn_data[(int) icode].operand[2].mode;
408 /* This case isn't valid, so fail. Reload is allowed to use the same
409 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
410 in the case of a secondary register, we actually need two different
411 registers for correct code. We fail here to prevent the possibility of
412 silently generating incorrect code later.
414 The convention is that secondary input reloads are valid only if the
415 secondary_class is different from class. If you have such a case, you
416 can not use secondary reloads, you must work around the problem some
419 Allow this when a reload_in/out pattern is being used. I.e. assume
420 that the generated code handles this case. */
422 gcc_assert (!in_p || class != reload_class || icode != CODE_FOR_nothing
423 || t_icode != CODE_FOR_nothing);
425 /* See if we can reuse an existing secondary reload. */
426 for (s_reload = 0; s_reload < n_reloads; s_reload++)
427 if (rld[s_reload].secondary_p
428 && (reg_class_subset_p (class, rld[s_reload].class)
429 || reg_class_subset_p (rld[s_reload].class, class))
430 && ((in_p && rld[s_reload].inmode == mode)
431 || (! in_p && rld[s_reload].outmode == mode))
432 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
433 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
434 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
435 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
436 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES)
437 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
438 opnum, rld[s_reload].opnum))
441 rld[s_reload].inmode = mode;
443 rld[s_reload].outmode = mode;
445 if (reg_class_subset_p (class, rld[s_reload].class))
446 rld[s_reload].class = class;
448 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
449 rld[s_reload].optional &= optional;
450 rld[s_reload].secondary_p = 1;
451 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
452 opnum, rld[s_reload].opnum))
453 rld[s_reload].when_needed = RELOAD_OTHER;
456 if (s_reload == n_reloads)
458 #ifdef SECONDARY_MEMORY_NEEDED
459 /* If we need a memory location to copy between the two reload regs,
460 set it up now. Note that we do the input case before making
461 the reload and the output case after. This is due to the
462 way reloads are output. */
464 if (in_p && icode == CODE_FOR_nothing
465 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
467 get_secondary_mem (x, reload_mode, opnum, type);
469 /* We may have just added new reloads. Make sure we add
470 the new reload at the end. */
471 s_reload = n_reloads;
475 /* We need to make a new secondary reload for this register class. */
476 rld[s_reload].in = rld[s_reload].out = 0;
477 rld[s_reload].class = class;
479 rld[s_reload].inmode = in_p ? mode : VOIDmode;
480 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
481 rld[s_reload].reg_rtx = 0;
482 rld[s_reload].optional = optional;
483 rld[s_reload].inc = 0;
484 /* Maybe we could combine these, but it seems too tricky. */
485 rld[s_reload].nocombine = 1;
486 rld[s_reload].in_reg = 0;
487 rld[s_reload].out_reg = 0;
488 rld[s_reload].opnum = opnum;
489 rld[s_reload].when_needed = secondary_type;
490 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
491 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
492 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
493 rld[s_reload].secondary_out_icode
494 = ! in_p ? t_icode : CODE_FOR_nothing;
495 rld[s_reload].secondary_p = 1;
499 #ifdef SECONDARY_MEMORY_NEEDED
500 if (! in_p && icode == CODE_FOR_nothing
501 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
502 get_secondary_mem (x, mode, opnum, type);
510 /* If a secondary reload is needed, return its class. If both an intermediate
511 register and a scratch register is needed, we return the class of the
512 intermediate register. */
514 secondary_reload_class (bool in_p, enum reg_class class,
515 enum machine_mode mode, rtx x)
517 enum insn_code icode;
518 secondary_reload_info sri;
520 sri.icode = CODE_FOR_nothing;
522 class = targetm.secondary_reload (in_p, x, class, mode, &sri);
525 /* If there are no secondary reloads at all, we return NO_REGS.
526 If an intermediate register is needed, we return its class. */
527 if (icode == CODE_FOR_nothing || class != NO_REGS)
530 /* No intermediate register is needed, but we have a special reload
531 pattern, which we assume for now needs a scratch register. */
532 return scratch_reload_class (icode);
535 /* ICODE is the insn_code of a reload pattern. Check that it has exactly
536 three operands, verify that operand 2 is an output operand, and return
538 ??? We'd like to be able to handle any pattern with at least 2 operands,
539 for zero or more scratch registers, but that needs more infrastructure. */
541 scratch_reload_class (enum insn_code icode)
543 const char *scratch_constraint;
545 enum reg_class class;
547 gcc_assert (insn_data[(int) icode].n_operands == 3);
548 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
549 gcc_assert (*scratch_constraint == '=');
550 scratch_constraint++;
551 if (*scratch_constraint == '&')
552 scratch_constraint++;
553 scratch_letter = *scratch_constraint;
554 if (scratch_letter == 'r')
556 class = REG_CLASS_FROM_CONSTRAINT ((unsigned char) scratch_letter,
558 gcc_assert (class != NO_REGS);
562 #ifdef SECONDARY_MEMORY_NEEDED
564 /* Return a memory location that will be used to copy X in mode MODE.
565 If we haven't already made a location for this mode in this insn,
566 call find_reloads_address on the location being returned. */
569 get_secondary_mem (rtx x ATTRIBUTE_UNUSED, enum machine_mode mode,
570 int opnum, enum reload_type type)
575 /* By default, if MODE is narrower than a word, widen it to a word.
576 This is required because most machines that require these memory
577 locations do not support short load and stores from all registers
578 (e.g., FP registers). */
580 #ifdef SECONDARY_MEMORY_NEEDED_MODE
581 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
583 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
584 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
587 /* If we already have made a MEM for this operand in MODE, return it. */
588 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
589 return secondary_memlocs_elim[(int) mode][opnum];
591 /* If this is the first time we've tried to get a MEM for this mode,
592 allocate a new one. `something_changed' in reload will get set
593 by noticing that the frame size has changed. */
595 if (secondary_memlocs[(int) mode] == 0)
597 #ifdef SECONDARY_MEMORY_NEEDED_RTX
598 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
600 secondary_memlocs[(int) mode]
601 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
605 /* Get a version of the address doing any eliminations needed. If that
606 didn't give us a new MEM, make a new one if it isn't valid. */
608 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
609 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
611 if (! mem_valid && loc == secondary_memlocs[(int) mode])
612 loc = copy_rtx (loc);
614 /* The only time the call below will do anything is if the stack
615 offset is too large. In that case IND_LEVELS doesn't matter, so we
616 can just pass a zero. Adjust the type to be the address of the
617 corresponding object. If the address was valid, save the eliminated
618 address. If it wasn't valid, we need to make a reload each time, so
623 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
624 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
627 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
631 secondary_memlocs_elim[(int) mode][opnum] = loc;
632 if (secondary_memlocs_elim_used <= (int)mode)
633 secondary_memlocs_elim_used = (int)mode + 1;
637 /* Clear any secondary memory locations we've made. */
640 clear_secondary_mem (void)
642 memset (secondary_memlocs, 0, sizeof secondary_memlocs);
644 #endif /* SECONDARY_MEMORY_NEEDED */
647 /* Find the largest class which has at least one register valid in
648 mode INNER, and which for every such register, that register number
649 plus N is also valid in OUTER (if in range) and is cheap to move
650 into REGNO. Such a class must exist. */
652 static enum reg_class
653 find_valid_class (enum machine_mode outer ATTRIBUTE_UNUSED,
654 enum machine_mode inner ATTRIBUTE_UNUSED, int n,
655 unsigned int dest_regno ATTRIBUTE_UNUSED)
660 enum reg_class best_class = NO_REGS;
661 enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
662 unsigned int best_size = 0;
665 for (class = 1; class < N_REG_CLASSES; class++)
669 for (regno = 0; regno < FIRST_PSEUDO_REGISTER - n && ! bad; regno++)
670 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno))
672 if (HARD_REGNO_MODE_OK (regno, inner))
675 if (! TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
676 || ! HARD_REGNO_MODE_OK (regno + n, outer))
683 cost = REGISTER_MOVE_COST (outer, class, dest_class);
685 if ((reg_class_size[class] > best_size
686 && (best_cost < 0 || best_cost >= cost))
690 best_size = reg_class_size[class];
691 best_cost = REGISTER_MOVE_COST (outer, class, dest_class);
695 gcc_assert (best_size != 0);
700 /* Return the number of a previously made reload that can be combined with
701 a new one, or n_reloads if none of the existing reloads can be used.
702 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
703 push_reload, they determine the kind of the new reload that we try to
704 combine. P_IN points to the corresponding value of IN, which can be
705 modified by this function.
706 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
709 find_reusable_reload (rtx *p_in, rtx out, enum reg_class class,
710 enum reload_type type, int opnum, int dont_share)
714 /* We can't merge two reloads if the output of either one is
717 if (earlyclobber_operand_p (out))
720 /* We can use an existing reload if the class is right
721 and at least one of IN and OUT is a match
722 and the other is at worst neutral.
723 (A zero compared against anything is neutral.)
725 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
726 for the same thing since that can cause us to need more reload registers
727 than we otherwise would. */
729 for (i = 0; i < n_reloads; i++)
730 if ((reg_class_subset_p (class, rld[i].class)
731 || reg_class_subset_p (rld[i].class, class))
732 /* If the existing reload has a register, it must fit our class. */
733 && (rld[i].reg_rtx == 0
734 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
735 true_regnum (rld[i].reg_rtx)))
736 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
737 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
738 || (out != 0 && MATCHES (rld[i].out, out)
739 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
740 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
741 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES)
742 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
745 /* Reloading a plain reg for input can match a reload to postincrement
746 that reg, since the postincrement's value is the right value.
747 Likewise, it can match a preincrement reload, since we regard
748 the preincrementation as happening before any ref in this insn
750 for (i = 0; i < n_reloads; i++)
751 if ((reg_class_subset_p (class, rld[i].class)
752 || reg_class_subset_p (rld[i].class, class))
753 /* If the existing reload has a register, it must fit our
755 && (rld[i].reg_rtx == 0
756 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
757 true_regnum (rld[i].reg_rtx)))
758 && out == 0 && rld[i].out == 0 && rld[i].in != 0
760 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == RTX_AUTOINC
761 && MATCHES (XEXP (rld[i].in, 0), in))
762 || (REG_P (rld[i].in)
763 && GET_RTX_CLASS (GET_CODE (in)) == RTX_AUTOINC
764 && MATCHES (XEXP (in, 0), rld[i].in)))
765 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
766 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES)
767 && MERGABLE_RELOADS (type, rld[i].when_needed,
768 opnum, rld[i].opnum))
770 /* Make sure reload_in ultimately has the increment,
771 not the plain register. */
779 /* Return nonzero if X is a SUBREG which will require reloading of its
780 SUBREG_REG expression. */
783 reload_inner_reg_of_subreg (rtx x, enum machine_mode mode, int output)
787 /* Only SUBREGs are problematical. */
788 if (GET_CODE (x) != SUBREG)
791 inner = SUBREG_REG (x);
793 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
794 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
797 /* If INNER is not a hard register, then INNER will not need to
800 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
803 /* If INNER is not ok for MODE, then INNER will need reloading. */
804 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
807 /* If the outer part is a word or smaller, INNER larger than a
808 word and the number of regs for INNER is not the same as the
809 number of words in INNER, then INNER will need reloading. */
810 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
812 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
813 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
814 != (int) hard_regno_nregs[REGNO (inner)][GET_MODE (inner)]));
817 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
818 requiring an extra reload register. The caller has already found that
819 IN contains some reference to REGNO, so check that we can produce the
820 new value in a single step. E.g. if we have
821 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
822 instruction that adds one to a register, this should succeed.
823 However, if we have something like
824 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
825 needs to be loaded into a register first, we need a separate reload
827 Such PLUS reloads are generated by find_reload_address_part.
828 The out-of-range PLUS expressions are usually introduced in the instruction
829 patterns by register elimination and substituting pseudos without a home
830 by their function-invariant equivalences. */
832 can_reload_into (rtx in, int regno, enum machine_mode mode)
836 struct recog_data save_recog_data;
838 /* For matching constraints, we often get notional input reloads where
839 we want to use the original register as the reload register. I.e.
840 technically this is a non-optional input-output reload, but IN is
841 already a valid register, and has been chosen as the reload register.
842 Speed this up, since it trivially works. */
846 /* To test MEMs properly, we'd have to take into account all the reloads
847 that are already scheduled, which can become quite complicated.
848 And since we've already handled address reloads for this MEM, it
849 should always succeed anyway. */
853 /* If we can make a simple SET insn that does the job, everything should
855 dst = gen_rtx_REG (mode, regno);
856 test_insn = make_insn_raw (gen_rtx_SET (VOIDmode, dst, in));
857 save_recog_data = recog_data;
858 if (recog_memoized (test_insn) >= 0)
860 extract_insn (test_insn);
861 r = constrain_operands (1);
863 recog_data = save_recog_data;
867 /* Record one reload that needs to be performed.
868 IN is an rtx saying where the data are to be found before this instruction.
869 OUT says where they must be stored after the instruction.
870 (IN is zero for data not read, and OUT is zero for data not written.)
871 INLOC and OUTLOC point to the places in the instructions where
872 IN and OUT were found.
873 If IN and OUT are both nonzero, it means the same register must be used
874 to reload both IN and OUT.
876 CLASS is a register class required for the reloaded data.
877 INMODE is the machine mode that the instruction requires
878 for the reg that replaces IN and OUTMODE is likewise for OUT.
880 If IN is zero, then OUT's location and mode should be passed as
883 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
885 OPTIONAL nonzero means this reload does not need to be performed:
886 it can be discarded if that is more convenient.
888 OPNUM and TYPE say what the purpose of this reload is.
890 The return value is the reload-number for this reload.
892 If both IN and OUT are nonzero, in some rare cases we might
893 want to make two separate reloads. (Actually we never do this now.)
894 Therefore, the reload-number for OUT is stored in
895 output_reloadnum when we return; the return value applies to IN.
896 Usually (presently always), when IN and OUT are nonzero,
897 the two reload-numbers are equal, but the caller should be careful to
901 push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
902 enum reg_class class, enum machine_mode inmode,
903 enum machine_mode outmode, int strict_low, int optional,
904 int opnum, enum reload_type type)
908 int dont_remove_subreg = 0;
909 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
910 int secondary_in_reload = -1, secondary_out_reload = -1;
911 enum insn_code secondary_in_icode = CODE_FOR_nothing;
912 enum insn_code secondary_out_icode = CODE_FOR_nothing;
914 /* INMODE and/or OUTMODE could be VOIDmode if no mode
915 has been specified for the operand. In that case,
916 use the operand's mode as the mode to reload. */
917 if (inmode == VOIDmode && in != 0)
918 inmode = GET_MODE (in);
919 if (outmode == VOIDmode && out != 0)
920 outmode = GET_MODE (out);
922 /* If IN is a pseudo register everywhere-equivalent to a constant, and
923 it is not in a hard register, reload straight from the constant,
924 since we want to get rid of such pseudo registers.
925 Often this is done earlier, but not always in find_reloads_address. */
926 if (in != 0 && REG_P (in))
928 int regno = REGNO (in);
930 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
931 && reg_equiv_constant[regno] != 0)
932 in = reg_equiv_constant[regno];
935 /* Likewise for OUT. Of course, OUT will never be equivalent to
936 an actual constant, but it might be equivalent to a memory location
937 (in the case of a parameter). */
938 if (out != 0 && REG_P (out))
940 int regno = REGNO (out);
942 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
943 && reg_equiv_constant[regno] != 0)
944 out = reg_equiv_constant[regno];
947 /* If we have a read-write operand with an address side-effect,
948 change either IN or OUT so the side-effect happens only once. */
949 if (in != 0 && out != 0 && MEM_P (in) && rtx_equal_p (in, out))
950 switch (GET_CODE (XEXP (in, 0)))
952 case POST_INC: case POST_DEC: case POST_MODIFY:
953 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
956 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
957 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
964 /* If we are reloading a (SUBREG constant ...), really reload just the
965 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
966 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
967 a pseudo and hence will become a MEM) with M1 wider than M2 and the
968 register is a pseudo, also reload the inside expression.
969 For machines that extend byte loads, do this for any SUBREG of a pseudo
970 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
971 M2 is an integral mode that gets extended when loaded.
972 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
973 either M1 is not valid for R or M2 is wider than a word but we only
974 need one word to store an M2-sized quantity in R.
975 (However, if OUT is nonzero, we need to reload the reg *and*
976 the subreg, so do nothing here, and let following statement handle it.)
978 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
979 we can't handle it here because CONST_INT does not indicate a mode.
981 Similarly, we must reload the inside expression if we have a
982 STRICT_LOW_PART (presumably, in == out in the cas).
984 Also reload the inner expression if it does not require a secondary
985 reload but the SUBREG does.
987 Finally, reload the inner expression if it is a register that is in
988 the class whose registers cannot be referenced in a different size
989 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
990 cannot reload just the inside since we might end up with the wrong
991 register class. But if it is inside a STRICT_LOW_PART, we have
992 no choice, so we hope we do get the right register class there. */
994 if (in != 0 && GET_CODE (in) == SUBREG
995 && (subreg_lowpart_p (in) || strict_low)
996 #ifdef CANNOT_CHANGE_MODE_CLASS
997 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, class)
999 && (CONSTANT_P (SUBREG_REG (in))
1000 || GET_CODE (SUBREG_REG (in)) == PLUS
1002 || (((REG_P (SUBREG_REG (in))
1003 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
1004 || MEM_P (SUBREG_REG (in)))
1005 && ((GET_MODE_SIZE (inmode)
1006 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1007 #ifdef LOAD_EXTEND_OP
1008 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1009 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1011 && (GET_MODE_SIZE (inmode)
1012 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1013 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
1014 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != UNKNOWN)
1016 #ifdef WORD_REGISTER_OPERATIONS
1017 || ((GET_MODE_SIZE (inmode)
1018 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1019 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1020 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1024 || (REG_P (SUBREG_REG (in))
1025 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1026 /* The case where out is nonzero
1027 is handled differently in the following statement. */
1028 && (out == 0 || subreg_lowpart_p (in))
1029 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1030 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1032 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1034 != (int) hard_regno_nregs[REGNO (SUBREG_REG (in))]
1035 [GET_MODE (SUBREG_REG (in))]))
1036 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1037 || (secondary_reload_class (1, class, inmode, in) != NO_REGS
1038 && (secondary_reload_class (1, class, GET_MODE (SUBREG_REG (in)),
1041 #ifdef CANNOT_CHANGE_MODE_CLASS
1042 || (REG_P (SUBREG_REG (in))
1043 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1044 && REG_CANNOT_CHANGE_MODE_P
1045 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1049 in_subreg_loc = inloc;
1050 inloc = &SUBREG_REG (in);
1052 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1054 /* This is supposed to happen only for paradoxical subregs made by
1055 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1056 gcc_assert (GET_MODE_SIZE (GET_MODE (in)) <= GET_MODE_SIZE (inmode));
1058 inmode = GET_MODE (in);
1061 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1062 either M1 is not valid for R or M2 is wider than a word but we only
1063 need one word to store an M2-sized quantity in R.
1065 However, we must reload the inner reg *as well as* the subreg in
1068 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1069 code above. This can happen if SUBREG_BYTE != 0. */
1071 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1073 enum reg_class in_class = class;
1075 if (REG_P (SUBREG_REG (in)))
1077 = find_valid_class (inmode, GET_MODE (SUBREG_REG (in)),
1078 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1079 GET_MODE (SUBREG_REG (in)),
1082 REGNO (SUBREG_REG (in)));
1084 /* This relies on the fact that emit_reload_insns outputs the
1085 instructions for input reloads of type RELOAD_OTHER in the same
1086 order as the reloads. Thus if the outer reload is also of type
1087 RELOAD_OTHER, we are guaranteed that this inner reload will be
1088 output before the outer reload. */
1089 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1090 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1091 dont_remove_subreg = 1;
1094 /* Similarly for paradoxical and problematical SUBREGs on the output.
1095 Note that there is no reason we need worry about the previous value
1096 of SUBREG_REG (out); even if wider than out,
1097 storing in a subreg is entitled to clobber it all
1098 (except in the case of STRICT_LOW_PART,
1099 and in that case the constraint should label it input-output.) */
1100 if (out != 0 && GET_CODE (out) == SUBREG
1101 && (subreg_lowpart_p (out) || strict_low)
1102 #ifdef CANNOT_CHANGE_MODE_CLASS
1103 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, class)
1105 && (CONSTANT_P (SUBREG_REG (out))
1107 || (((REG_P (SUBREG_REG (out))
1108 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1109 || MEM_P (SUBREG_REG (out)))
1110 && ((GET_MODE_SIZE (outmode)
1111 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1112 #ifdef WORD_REGISTER_OPERATIONS
1113 || ((GET_MODE_SIZE (outmode)
1114 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1115 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1116 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1120 || (REG_P (SUBREG_REG (out))
1121 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1122 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1123 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1125 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1127 != (int) hard_regno_nregs[REGNO (SUBREG_REG (out))]
1128 [GET_MODE (SUBREG_REG (out))]))
1129 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1130 || (secondary_reload_class (0, class, outmode, out) != NO_REGS
1131 && (secondary_reload_class (0, class, GET_MODE (SUBREG_REG (out)),
1134 #ifdef CANNOT_CHANGE_MODE_CLASS
1135 || (REG_P (SUBREG_REG (out))
1136 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1137 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1138 GET_MODE (SUBREG_REG (out)),
1143 out_subreg_loc = outloc;
1144 outloc = &SUBREG_REG (out);
1146 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1147 gcc_assert (!MEM_P (out)
1148 || GET_MODE_SIZE (GET_MODE (out))
1149 <= GET_MODE_SIZE (outmode));
1151 outmode = GET_MODE (out);
1154 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1155 either M1 is not valid for R or M2 is wider than a word but we only
1156 need one word to store an M2-sized quantity in R.
1158 However, we must reload the inner reg *as well as* the subreg in
1159 that case. In this case, the inner reg is an in-out reload. */
1161 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1163 /* This relies on the fact that emit_reload_insns outputs the
1164 instructions for output reloads of type RELOAD_OTHER in reverse
1165 order of the reloads. Thus if the outer reload is also of type
1166 RELOAD_OTHER, we are guaranteed that this inner reload will be
1167 output after the outer reload. */
1168 dont_remove_subreg = 1;
1169 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1171 find_valid_class (outmode, GET_MODE (SUBREG_REG (out)),
1172 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1173 GET_MODE (SUBREG_REG (out)),
1176 REGNO (SUBREG_REG (out))),
1177 VOIDmode, VOIDmode, 0, 0,
1178 opnum, RELOAD_OTHER);
1181 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1182 if (in != 0 && out != 0 && MEM_P (out)
1183 && (REG_P (in) || MEM_P (in))
1184 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1187 /* If IN is a SUBREG of a hard register, make a new REG. This
1188 simplifies some of the cases below. */
1190 if (in != 0 && GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))
1191 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1192 && ! dont_remove_subreg)
1193 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1195 /* Similarly for OUT. */
1196 if (out != 0 && GET_CODE (out) == SUBREG
1197 && REG_P (SUBREG_REG (out))
1198 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1199 && ! dont_remove_subreg)
1200 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1202 /* Narrow down the class of register wanted if that is
1203 desirable on this machine for efficiency. */
1205 enum reg_class preferred_class = class;
1208 preferred_class = PREFERRED_RELOAD_CLASS (in, class);
1210 /* Output reloads may need analogous treatment, different in detail. */
1211 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1213 preferred_class = PREFERRED_OUTPUT_RELOAD_CLASS (out, preferred_class);
1216 /* Discard what the target said if we cannot do it. */
1217 if (preferred_class != NO_REGS
1218 || (optional && type == RELOAD_FOR_OUTPUT))
1219 class = preferred_class;
1222 /* Make sure we use a class that can handle the actual pseudo
1223 inside any subreg. For example, on the 386, QImode regs
1224 can appear within SImode subregs. Although GENERAL_REGS
1225 can handle SImode, QImode needs a smaller class. */
1226 #ifdef LIMIT_RELOAD_CLASS
1228 class = LIMIT_RELOAD_CLASS (inmode, class);
1229 else if (in != 0 && GET_CODE (in) == SUBREG)
1230 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1233 class = LIMIT_RELOAD_CLASS (outmode, class);
1234 if (out != 0 && GET_CODE (out) == SUBREG)
1235 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1238 /* Verify that this class is at least possible for the mode that
1240 if (this_insn_is_asm)
1242 enum machine_mode mode;
1243 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1247 if (mode == VOIDmode)
1249 error_for_asm (this_insn, "cannot reload integer constant "
1250 "operand in %<asm%>");
1255 outmode = word_mode;
1257 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1258 if (HARD_REGNO_MODE_OK (i, mode)
1259 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1261 int nregs = hard_regno_nregs[i][mode];
1264 for (j = 1; j < nregs; j++)
1265 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1270 if (i == FIRST_PSEUDO_REGISTER)
1272 error_for_asm (this_insn, "impossible register constraint "
1274 /* Avoid further trouble with this insn. */
1275 PATTERN (this_insn) = gen_rtx_USE (VOIDmode, const0_rtx);
1276 /* We used to continue here setting class to ALL_REGS, but it triggers
1277 sanity check on i386 for:
1278 void foo(long double d)
1282 Returning zero here ought to be safe as we take care in
1283 find_reloads to not process the reloads when instruction was
1290 /* Optional output reloads are always OK even if we have no register class,
1291 since the function of these reloads is only to have spill_reg_store etc.
1292 set, so that the storing insn can be deleted later. */
1293 gcc_assert (class != NO_REGS
1294 || (optional != 0 && type == RELOAD_FOR_OUTPUT));
1296 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1300 /* See if we need a secondary reload register to move between CLASS
1301 and IN or CLASS and OUT. Get the icode and push any required reloads
1302 needed for each of them if so. */
1306 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1307 &secondary_in_icode, NULL);
1308 if (out != 0 && GET_CODE (out) != SCRATCH)
1309 secondary_out_reload
1310 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1311 type, &secondary_out_icode, NULL);
1313 /* We found no existing reload suitable for re-use.
1314 So add an additional reload. */
1316 #ifdef SECONDARY_MEMORY_NEEDED
1317 /* If a memory location is needed for the copy, make one. */
1320 || (GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))))
1321 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1322 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1324 get_secondary_mem (in, inmode, opnum, type);
1330 rld[i].class = class;
1331 rld[i].inmode = inmode;
1332 rld[i].outmode = outmode;
1334 rld[i].optional = optional;
1336 rld[i].nocombine = 0;
1337 rld[i].in_reg = inloc ? *inloc : 0;
1338 rld[i].out_reg = outloc ? *outloc : 0;
1339 rld[i].opnum = opnum;
1340 rld[i].when_needed = type;
1341 rld[i].secondary_in_reload = secondary_in_reload;
1342 rld[i].secondary_out_reload = secondary_out_reload;
1343 rld[i].secondary_in_icode = secondary_in_icode;
1344 rld[i].secondary_out_icode = secondary_out_icode;
1345 rld[i].secondary_p = 0;
1349 #ifdef SECONDARY_MEMORY_NEEDED
1352 || (GET_CODE (out) == SUBREG && REG_P (SUBREG_REG (out))))
1353 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1354 && SECONDARY_MEMORY_NEEDED (class,
1355 REGNO_REG_CLASS (reg_or_subregno (out)),
1357 get_secondary_mem (out, outmode, opnum, type);
1362 /* We are reusing an existing reload,
1363 but we may have additional information for it.
1364 For example, we may now have both IN and OUT
1365 while the old one may have just one of them. */
1367 /* The modes can be different. If they are, we want to reload in
1368 the larger mode, so that the value is valid for both modes. */
1369 if (inmode != VOIDmode
1370 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1371 rld[i].inmode = inmode;
1372 if (outmode != VOIDmode
1373 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1374 rld[i].outmode = outmode;
1377 rtx in_reg = inloc ? *inloc : 0;
1378 /* If we merge reloads for two distinct rtl expressions that
1379 are identical in content, there might be duplicate address
1380 reloads. Remove the extra set now, so that if we later find
1381 that we can inherit this reload, we can get rid of the
1382 address reloads altogether.
1384 Do not do this if both reloads are optional since the result
1385 would be an optional reload which could potentially leave
1386 unresolved address replacements.
1388 It is not sufficient to call transfer_replacements since
1389 choose_reload_regs will remove the replacements for address
1390 reloads of inherited reloads which results in the same
1392 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1393 && ! (rld[i].optional && optional))
1395 /* We must keep the address reload with the lower operand
1397 if (opnum > rld[i].opnum)
1399 remove_address_replacements (in);
1401 in_reg = rld[i].in_reg;
1404 remove_address_replacements (rld[i].in);
1407 rld[i].in_reg = in_reg;
1412 rld[i].out_reg = outloc ? *outloc : 0;
1414 if (reg_class_subset_p (class, rld[i].class))
1415 rld[i].class = class;
1416 rld[i].optional &= optional;
1417 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1418 opnum, rld[i].opnum))
1419 rld[i].when_needed = RELOAD_OTHER;
1420 rld[i].opnum = MIN (rld[i].opnum, opnum);
1423 /* If the ostensible rtx being reloaded differs from the rtx found
1424 in the location to substitute, this reload is not safe to combine
1425 because we cannot reliably tell whether it appears in the insn. */
1427 if (in != 0 && in != *inloc)
1428 rld[i].nocombine = 1;
1431 /* This was replaced by changes in find_reloads_address_1 and the new
1432 function inc_for_reload, which go with a new meaning of reload_inc. */
1434 /* If this is an IN/OUT reload in an insn that sets the CC,
1435 it must be for an autoincrement. It doesn't work to store
1436 the incremented value after the insn because that would clobber the CC.
1437 So we must do the increment of the value reloaded from,
1438 increment it, store it back, then decrement again. */
1439 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1443 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1444 /* If we did not find a nonzero amount-to-increment-by,
1445 that contradicts the belief that IN is being incremented
1446 in an address in this insn. */
1447 gcc_assert (rld[i].inc != 0);
1451 /* If we will replace IN and OUT with the reload-reg,
1452 record where they are located so that substitution need
1453 not do a tree walk. */
1455 if (replace_reloads)
1459 struct replacement *r = &replacements[n_replacements++];
1461 r->subreg_loc = in_subreg_loc;
1465 if (outloc != 0 && outloc != inloc)
1467 struct replacement *r = &replacements[n_replacements++];
1470 r->subreg_loc = out_subreg_loc;
1475 /* If this reload is just being introduced and it has both
1476 an incoming quantity and an outgoing quantity that are
1477 supposed to be made to match, see if either one of the two
1478 can serve as the place to reload into.
1480 If one of them is acceptable, set rld[i].reg_rtx
1483 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1485 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1488 earlyclobber_operand_p (out));
1490 /* If the outgoing register already contains the same value
1491 as the incoming one, we can dispense with loading it.
1492 The easiest way to tell the caller that is to give a phony
1493 value for the incoming operand (same as outgoing one). */
1494 if (rld[i].reg_rtx == out
1495 && (REG_P (in) || CONSTANT_P (in))
1496 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1497 static_reload_reg_p, i, inmode))
1501 /* If this is an input reload and the operand contains a register that
1502 dies in this insn and is used nowhere else, see if it is the right class
1503 to be used for this reload. Use it if so. (This occurs most commonly
1504 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1505 this if it is also an output reload that mentions the register unless
1506 the output is a SUBREG that clobbers an entire register.
1508 Note that the operand might be one of the spill regs, if it is a
1509 pseudo reg and we are in a block where spilling has not taken place.
1510 But if there is no spilling in this block, that is OK.
1511 An explicitly used hard reg cannot be a spill reg. */
1513 if (rld[i].reg_rtx == 0 && in != 0 && hard_regs_live_known)
1517 enum machine_mode rel_mode = inmode;
1519 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1522 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1523 if (REG_NOTE_KIND (note) == REG_DEAD
1524 && REG_P (XEXP (note, 0))
1525 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1526 && reg_mentioned_p (XEXP (note, 0), in)
1527 /* Check that we don't use a hardreg for an uninitialized
1528 pseudo. See also find_dummy_reload(). */
1529 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1530 || ! bitmap_bit_p (ENTRY_BLOCK_PTR->il.rtl->global_live_at_end,
1531 ORIGINAL_REGNO (XEXP (note, 0))))
1532 && ! refers_to_regno_for_reload_p (regno,
1534 + hard_regno_nregs[regno]
1536 PATTERN (this_insn), inloc)
1537 /* If this is also an output reload, IN cannot be used as
1538 the reload register if it is set in this insn unless IN
1540 && (out == 0 || in == out
1541 || ! hard_reg_set_here_p (regno,
1543 + hard_regno_nregs[regno]
1545 PATTERN (this_insn)))
1546 /* ??? Why is this code so different from the previous?
1547 Is there any simple coherent way to describe the two together?
1548 What's going on here. */
1550 || (GET_CODE (in) == SUBREG
1551 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1553 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1554 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1555 /* Make sure the operand fits in the reg that dies. */
1556 && (GET_MODE_SIZE (rel_mode)
1557 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1558 && HARD_REGNO_MODE_OK (regno, inmode)
1559 && HARD_REGNO_MODE_OK (regno, outmode))
1562 unsigned int nregs = MAX (hard_regno_nregs[regno][inmode],
1563 hard_regno_nregs[regno][outmode]);
1565 for (offs = 0; offs < nregs; offs++)
1566 if (fixed_regs[regno + offs]
1567 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1572 && (! (refers_to_regno_for_reload_p
1573 (regno, (regno + hard_regno_nregs[regno][inmode]),
1575 || can_reload_into (in, regno, inmode)))
1577 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1584 output_reloadnum = i;
1589 /* Record an additional place we must replace a value
1590 for which we have already recorded a reload.
1591 RELOADNUM is the value returned by push_reload
1592 when the reload was recorded.
1593 This is used in insn patterns that use match_dup. */
1596 push_replacement (rtx *loc, int reloadnum, enum machine_mode mode)
1598 if (replace_reloads)
1600 struct replacement *r = &replacements[n_replacements++];
1601 r->what = reloadnum;
1608 /* Duplicate any replacement we have recorded to apply at
1609 location ORIG_LOC to also be performed at DUP_LOC.
1610 This is used in insn patterns that use match_dup. */
1613 dup_replacements (rtx *dup_loc, rtx *orig_loc)
1615 int i, n = n_replacements;
1617 for (i = 0; i < n; i++)
1619 struct replacement *r = &replacements[i];
1620 if (r->where == orig_loc)
1621 push_replacement (dup_loc, r->what, r->mode);
1625 /* Transfer all replacements that used to be in reload FROM to be in
1629 transfer_replacements (int to, int from)
1633 for (i = 0; i < n_replacements; i++)
1634 if (replacements[i].what == from)
1635 replacements[i].what = to;
1638 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1639 or a subpart of it. If we have any replacements registered for IN_RTX,
1640 cancel the reloads that were supposed to load them.
1641 Return nonzero if we canceled any reloads. */
1643 remove_address_replacements (rtx in_rtx)
1646 char reload_flags[MAX_RELOADS];
1647 int something_changed = 0;
1649 memset (reload_flags, 0, sizeof reload_flags);
1650 for (i = 0, j = 0; i < n_replacements; i++)
1652 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1653 reload_flags[replacements[i].what] |= 1;
1656 replacements[j++] = replacements[i];
1657 reload_flags[replacements[i].what] |= 2;
1660 /* Note that the following store must be done before the recursive calls. */
1663 for (i = n_reloads - 1; i >= 0; i--)
1665 if (reload_flags[i] == 1)
1667 deallocate_reload_reg (i);
1668 remove_address_replacements (rld[i].in);
1670 something_changed = 1;
1673 return something_changed;
1676 /* If there is only one output reload, and it is not for an earlyclobber
1677 operand, try to combine it with a (logically unrelated) input reload
1678 to reduce the number of reload registers needed.
1680 This is safe if the input reload does not appear in
1681 the value being output-reloaded, because this implies
1682 it is not needed any more once the original insn completes.
1684 If that doesn't work, see we can use any of the registers that
1685 die in this insn as a reload register. We can if it is of the right
1686 class and does not appear in the value being output-reloaded. */
1689 combine_reloads (void)
1692 int output_reload = -1;
1693 int secondary_out = -1;
1696 /* Find the output reload; return unless there is exactly one
1697 and that one is mandatory. */
1699 for (i = 0; i < n_reloads; i++)
1700 if (rld[i].out != 0)
1702 if (output_reload >= 0)
1707 if (output_reload < 0 || rld[output_reload].optional)
1710 /* An input-output reload isn't combinable. */
1712 if (rld[output_reload].in != 0)
1715 /* If this reload is for an earlyclobber operand, we can't do anything. */
1716 if (earlyclobber_operand_p (rld[output_reload].out))
1719 /* If there is a reload for part of the address of this operand, we would
1720 need to change it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1721 its life to the point where doing this combine would not lower the
1722 number of spill registers needed. */
1723 for (i = 0; i < n_reloads; i++)
1724 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1725 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1726 && rld[i].opnum == rld[output_reload].opnum)
1729 /* Check each input reload; can we combine it? */
1731 for (i = 0; i < n_reloads; i++)
1732 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1733 /* Life span of this reload must not extend past main insn. */
1734 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1735 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1736 && rld[i].when_needed != RELOAD_OTHER
1737 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1738 == CLASS_MAX_NREGS (rld[output_reload].class,
1739 rld[output_reload].outmode))
1741 && rld[i].reg_rtx == 0
1742 #ifdef SECONDARY_MEMORY_NEEDED
1743 /* Don't combine two reloads with different secondary
1744 memory locations. */
1745 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1746 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1747 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1748 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1750 && (SMALL_REGISTER_CLASSES
1751 ? (rld[i].class == rld[output_reload].class)
1752 : (reg_class_subset_p (rld[i].class,
1753 rld[output_reload].class)
1754 || reg_class_subset_p (rld[output_reload].class,
1756 && (MATCHES (rld[i].in, rld[output_reload].out)
1757 /* Args reversed because the first arg seems to be
1758 the one that we imagine being modified
1759 while the second is the one that might be affected. */
1760 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1762 /* However, if the input is a register that appears inside
1763 the output, then we also can't share.
1764 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1765 If the same reload reg is used for both reg 69 and the
1766 result to be stored in memory, then that result
1767 will clobber the address of the memory ref. */
1768 && ! (REG_P (rld[i].in)
1769 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1770 rld[output_reload].out))))
1771 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1772 rld[i].when_needed != RELOAD_FOR_INPUT)
1773 && (reg_class_size[(int) rld[i].class]
1774 || SMALL_REGISTER_CLASSES)
1775 /* We will allow making things slightly worse by combining an
1776 input and an output, but no worse than that. */
1777 && (rld[i].when_needed == RELOAD_FOR_INPUT
1778 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1782 /* We have found a reload to combine with! */
1783 rld[i].out = rld[output_reload].out;
1784 rld[i].out_reg = rld[output_reload].out_reg;
1785 rld[i].outmode = rld[output_reload].outmode;
1786 /* Mark the old output reload as inoperative. */
1787 rld[output_reload].out = 0;
1788 /* The combined reload is needed for the entire insn. */
1789 rld[i].when_needed = RELOAD_OTHER;
1790 /* If the output reload had a secondary reload, copy it. */
1791 if (rld[output_reload].secondary_out_reload != -1)
1793 rld[i].secondary_out_reload
1794 = rld[output_reload].secondary_out_reload;
1795 rld[i].secondary_out_icode
1796 = rld[output_reload].secondary_out_icode;
1799 #ifdef SECONDARY_MEMORY_NEEDED
1800 /* Copy any secondary MEM. */
1801 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1802 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1803 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1805 /* If required, minimize the register class. */
1806 if (reg_class_subset_p (rld[output_reload].class,
1808 rld[i].class = rld[output_reload].class;
1810 /* Transfer all replacements from the old reload to the combined. */
1811 for (j = 0; j < n_replacements; j++)
1812 if (replacements[j].what == output_reload)
1813 replacements[j].what = i;
1818 /* If this insn has only one operand that is modified or written (assumed
1819 to be the first), it must be the one corresponding to this reload. It
1820 is safe to use anything that dies in this insn for that output provided
1821 that it does not occur in the output (we already know it isn't an
1822 earlyclobber. If this is an asm insn, give up. */
1824 if (INSN_CODE (this_insn) == -1)
1827 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1828 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1829 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1832 /* See if some hard register that dies in this insn and is not used in
1833 the output is the right class. Only works if the register we pick
1834 up can fully hold our output reload. */
1835 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1836 if (REG_NOTE_KIND (note) == REG_DEAD
1837 && REG_P (XEXP (note, 0))
1838 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1839 rld[output_reload].out)
1840 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1841 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1842 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1843 REGNO (XEXP (note, 0)))
1844 && (hard_regno_nregs[REGNO (XEXP (note, 0))][rld[output_reload].outmode]
1845 <= hard_regno_nregs[REGNO (XEXP (note, 0))][GET_MODE (XEXP (note, 0))])
1846 /* Ensure that a secondary or tertiary reload for this output
1847 won't want this register. */
1848 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1849 || (! (TEST_HARD_REG_BIT
1850 (reg_class_contents[(int) rld[secondary_out].class],
1851 REGNO (XEXP (note, 0))))
1852 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1853 || ! (TEST_HARD_REG_BIT
1854 (reg_class_contents[(int) rld[secondary_out].class],
1855 REGNO (XEXP (note, 0)))))))
1856 && ! fixed_regs[REGNO (XEXP (note, 0))]
1857 /* Check that we don't use a hardreg for an uninitialized
1858 pseudo. See also find_dummy_reload(). */
1859 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1860 || ! bitmap_bit_p (ENTRY_BLOCK_PTR->il.rtl->global_live_at_end,
1861 ORIGINAL_REGNO (XEXP (note, 0)))))
1863 rld[output_reload].reg_rtx
1864 = gen_rtx_REG (rld[output_reload].outmode,
1865 REGNO (XEXP (note, 0)));
1870 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1871 See if one of IN and OUT is a register that may be used;
1872 this is desirable since a spill-register won't be needed.
1873 If so, return the register rtx that proves acceptable.
1875 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1876 CLASS is the register class required for the reload.
1878 If FOR_REAL is >= 0, it is the number of the reload,
1879 and in some cases when it can be discovered that OUT doesn't need
1880 to be computed, clear out rld[FOR_REAL].out.
1882 If FOR_REAL is -1, this should not be done, because this call
1883 is just to see if a register can be found, not to find and install it.
1885 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1886 puts an additional constraint on being able to use IN for OUT since
1887 IN must not appear elsewhere in the insn (it is assumed that IN itself
1888 is safe from the earlyclobber). */
1891 find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
1892 enum machine_mode inmode, enum machine_mode outmode,
1893 enum reg_class class, int for_real, int earlyclobber)
1901 /* If operands exceed a word, we can't use either of them
1902 unless they have the same size. */
1903 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1904 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1905 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1908 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1909 respectively refers to a hard register. */
1911 /* Find the inside of any subregs. */
1912 while (GET_CODE (out) == SUBREG)
1914 if (REG_P (SUBREG_REG (out))
1915 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1916 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1917 GET_MODE (SUBREG_REG (out)),
1920 out = SUBREG_REG (out);
1922 while (GET_CODE (in) == SUBREG)
1924 if (REG_P (SUBREG_REG (in))
1925 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1926 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1927 GET_MODE (SUBREG_REG (in)),
1930 in = SUBREG_REG (in);
1933 /* Narrow down the reg class, the same way push_reload will;
1934 otherwise we might find a dummy now, but push_reload won't. */
1936 enum reg_class preferred_class = PREFERRED_RELOAD_CLASS (in, class);
1937 if (preferred_class != NO_REGS)
1938 class = preferred_class;
1941 /* See if OUT will do. */
1943 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1945 unsigned int regno = REGNO (out) + out_offset;
1946 unsigned int nwords = hard_regno_nregs[regno][outmode];
1949 /* When we consider whether the insn uses OUT,
1950 ignore references within IN. They don't prevent us
1951 from copying IN into OUT, because those refs would
1952 move into the insn that reloads IN.
1954 However, we only ignore IN in its role as this reload.
1955 If the insn uses IN elsewhere and it contains OUT,
1956 that counts. We can't be sure it's the "same" operand
1957 so it might not go through this reload. */
1959 *inloc = const0_rtx;
1961 if (regno < FIRST_PSEUDO_REGISTER
1962 && HARD_REGNO_MODE_OK (regno, outmode)
1963 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1964 PATTERN (this_insn), outloc))
1968 for (i = 0; i < nwords; i++)
1969 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1975 if (REG_P (real_out))
1978 value = gen_rtx_REG (outmode, regno);
1985 /* Consider using IN if OUT was not acceptable
1986 or if OUT dies in this insn (like the quotient in a divmod insn).
1987 We can't use IN unless it is dies in this insn,
1988 which means we must know accurately which hard regs are live.
1989 Also, the result can't go in IN if IN is used within OUT,
1990 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1991 if (hard_regs_live_known
1993 && REGNO (in) < FIRST_PSEUDO_REGISTER
1995 || find_reg_note (this_insn, REG_UNUSED, real_out))
1996 && find_reg_note (this_insn, REG_DEAD, real_in)
1997 && !fixed_regs[REGNO (in)]
1998 && HARD_REGNO_MODE_OK (REGNO (in),
1999 /* The only case where out and real_out might
2000 have different modes is where real_out
2001 is a subreg, and in that case, out
2003 (GET_MODE (out) != VOIDmode
2004 ? GET_MODE (out) : outmode))
2005 /* But only do all this if we can be sure, that this input
2006 operand doesn't correspond with an uninitialized pseudoreg.
2007 global can assign some hardreg to it, which is the same as
2008 a different pseudo also currently live (as it can ignore the
2009 conflict). So we never must introduce writes to such hardregs,
2010 as they would clobber the other live pseudo using the same.
2011 See also PR20973. */
2012 && (ORIGINAL_REGNO (in) < FIRST_PSEUDO_REGISTER
2013 || ! bitmap_bit_p (ENTRY_BLOCK_PTR->il.rtl->global_live_at_end,
2014 ORIGINAL_REGNO (in))))
2016 unsigned int regno = REGNO (in) + in_offset;
2017 unsigned int nwords = hard_regno_nregs[regno][inmode];
2019 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
2020 && ! hard_reg_set_here_p (regno, regno + nwords,
2021 PATTERN (this_insn))
2023 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
2024 PATTERN (this_insn), inloc)))
2028 for (i = 0; i < nwords; i++)
2029 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
2035 /* If we were going to use OUT as the reload reg
2036 and changed our mind, it means OUT is a dummy that
2037 dies here. So don't bother copying value to it. */
2038 if (for_real >= 0 && value == real_out)
2039 rld[for_real].out = 0;
2040 if (REG_P (real_in))
2043 value = gen_rtx_REG (inmode, regno);
2051 /* This page contains subroutines used mainly for determining
2052 whether the IN or an OUT of a reload can serve as the
2055 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2058 earlyclobber_operand_p (rtx x)
2062 for (i = 0; i < n_earlyclobbers; i++)
2063 if (reload_earlyclobbers[i] == x)
2069 /* Return 1 if expression X alters a hard reg in the range
2070 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2071 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2072 X should be the body of an instruction. */
2075 hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x)
2077 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2079 rtx op0 = SET_DEST (x);
2081 while (GET_CODE (op0) == SUBREG)
2082 op0 = SUBREG_REG (op0);
2085 unsigned int r = REGNO (op0);
2087 /* See if this reg overlaps range under consideration. */
2089 && r + hard_regno_nregs[r][GET_MODE (op0)] > beg_regno)
2093 else if (GET_CODE (x) == PARALLEL)
2095 int i = XVECLEN (x, 0) - 1;
2098 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2105 /* Return 1 if ADDR is a valid memory address for mode MODE,
2106 and check that each pseudo reg has the proper kind of
2110 strict_memory_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx addr)
2112 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2119 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2120 if they are the same hard reg, and has special hacks for
2121 autoincrement and autodecrement.
2122 This is specifically intended for find_reloads to use
2123 in determining whether two operands match.
2124 X is the operand whose number is the lower of the two.
2126 The value is 2 if Y contains a pre-increment that matches
2127 a non-incrementing address in X. */
2129 /* ??? To be completely correct, we should arrange to pass
2130 for X the output operand and for Y the input operand.
2131 For now, we assume that the output operand has the lower number
2132 because that is natural in (SET output (... input ...)). */
2135 operands_match_p (rtx x, rtx y)
2138 RTX_CODE code = GET_CODE (x);
2144 if ((code == REG || (code == SUBREG && REG_P (SUBREG_REG (x))))
2145 && (REG_P (y) || (GET_CODE (y) == SUBREG
2146 && REG_P (SUBREG_REG (y)))))
2152 i = REGNO (SUBREG_REG (x));
2153 if (i >= FIRST_PSEUDO_REGISTER)
2155 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2156 GET_MODE (SUBREG_REG (x)),
2163 if (GET_CODE (y) == SUBREG)
2165 j = REGNO (SUBREG_REG (y));
2166 if (j >= FIRST_PSEUDO_REGISTER)
2168 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2169 GET_MODE (SUBREG_REG (y)),
2176 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2177 multiple hard register group of scalar integer registers, so that
2178 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2180 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2181 && SCALAR_INT_MODE_P (GET_MODE (x))
2182 && i < FIRST_PSEUDO_REGISTER)
2183 i += hard_regno_nregs[i][GET_MODE (x)] - 1;
2184 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2185 && SCALAR_INT_MODE_P (GET_MODE (y))
2186 && j < FIRST_PSEUDO_REGISTER)
2187 j += hard_regno_nregs[j][GET_MODE (y)] - 1;
2191 /* If two operands must match, because they are really a single
2192 operand of an assembler insn, then two postincrements are invalid
2193 because the assembler insn would increment only once.
2194 On the other hand, a postincrement matches ordinary indexing
2195 if the postincrement is the output operand. */
2196 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2197 return operands_match_p (XEXP (x, 0), y);
2198 /* Two preincrements are invalid
2199 because the assembler insn would increment only once.
2200 On the other hand, a preincrement matches ordinary indexing
2201 if the preincrement is the input operand.
2202 In this case, return 2, since some callers need to do special
2203 things when this happens. */
2204 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2205 || GET_CODE (y) == PRE_MODIFY)
2206 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2210 /* Now we have disposed of all the cases in which different rtx codes
2212 if (code != GET_CODE (y))
2215 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2216 if (GET_MODE (x) != GET_MODE (y))
2226 return XEXP (x, 0) == XEXP (y, 0);
2228 return XSTR (x, 0) == XSTR (y, 0);
2234 /* Compare the elements. If any pair of corresponding elements
2235 fail to match, return 0 for the whole things. */
2238 fmt = GET_RTX_FORMAT (code);
2239 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2245 if (XWINT (x, i) != XWINT (y, i))
2250 if (XINT (x, i) != XINT (y, i))
2255 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2258 /* If any subexpression returns 2,
2259 we should return 2 if we are successful. */
2268 if (XVECLEN (x, i) != XVECLEN (y, i))
2270 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2272 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2280 /* It is believed that rtx's at this level will never
2281 contain anything but integers and other rtx's,
2282 except for within LABEL_REFs and SYMBOL_REFs. */
2287 return 1 + success_2;
2290 /* Describe the range of registers or memory referenced by X.
2291 If X is a register, set REG_FLAG and put the first register
2292 number into START and the last plus one into END.
2293 If X is a memory reference, put a base address into BASE
2294 and a range of integer offsets into START and END.
2295 If X is pushing on the stack, we can assume it causes no trouble,
2296 so we set the SAFE field. */
2298 static struct decomposition
2301 struct decomposition val;
2304 memset (&val, 0, sizeof (val));
2306 switch (GET_CODE (x))
2310 rtx base = NULL_RTX, offset = 0;
2311 rtx addr = XEXP (x, 0);
2313 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2314 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2316 val.base = XEXP (addr, 0);
2317 val.start = -GET_MODE_SIZE (GET_MODE (x));
2318 val.end = GET_MODE_SIZE (GET_MODE (x));
2319 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2323 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2325 if (GET_CODE (XEXP (addr, 1)) == PLUS
2326 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2327 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2329 val.base = XEXP (addr, 0);
2330 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2331 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2332 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2337 if (GET_CODE (addr) == CONST)
2339 addr = XEXP (addr, 0);
2342 if (GET_CODE (addr) == PLUS)
2344 if (CONSTANT_P (XEXP (addr, 0)))
2346 base = XEXP (addr, 1);
2347 offset = XEXP (addr, 0);
2349 else if (CONSTANT_P (XEXP (addr, 1)))
2351 base = XEXP (addr, 0);
2352 offset = XEXP (addr, 1);
2359 offset = const0_rtx;
2361 if (GET_CODE (offset) == CONST)
2362 offset = XEXP (offset, 0);
2363 if (GET_CODE (offset) == PLUS)
2365 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2367 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2368 offset = XEXP (offset, 0);
2370 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2372 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2373 offset = XEXP (offset, 1);
2377 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2378 offset = const0_rtx;
2381 else if (GET_CODE (offset) != CONST_INT)
2383 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2384 offset = const0_rtx;
2387 if (all_const && GET_CODE (base) == PLUS)
2388 base = gen_rtx_CONST (GET_MODE (base), base);
2390 gcc_assert (GET_CODE (offset) == CONST_INT);
2392 val.start = INTVAL (offset);
2393 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2400 val.start = true_regnum (x);
2401 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2403 /* A pseudo with no hard reg. */
2404 val.start = REGNO (x);
2405 val.end = val.start + 1;
2409 val.end = val.start + hard_regno_nregs[val.start][GET_MODE (x)];
2413 if (!REG_P (SUBREG_REG (x)))
2414 /* This could be more precise, but it's good enough. */
2415 return decompose (SUBREG_REG (x));
2417 val.start = true_regnum (x);
2418 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2419 return decompose (SUBREG_REG (x));
2422 val.end = val.start + subreg_nregs (x);
2426 /* This hasn't been assigned yet, so it can't conflict yet. */
2431 gcc_assert (CONSTANT_P (x));
2438 /* Return 1 if altering Y will not modify the value of X.
2439 Y is also described by YDATA, which should be decompose (Y). */
2442 immune_p (rtx x, rtx y, struct decomposition ydata)
2444 struct decomposition xdata;
2447 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2451 gcc_assert (MEM_P (y));
2452 /* If Y is memory and X is not, Y can't affect X. */
2456 xdata = decompose (x);
2458 if (! rtx_equal_p (xdata.base, ydata.base))
2460 /* If bases are distinct symbolic constants, there is no overlap. */
2461 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2463 /* Constants and stack slots never overlap. */
2464 if (CONSTANT_P (xdata.base)
2465 && (ydata.base == frame_pointer_rtx
2466 || ydata.base == hard_frame_pointer_rtx
2467 || ydata.base == stack_pointer_rtx))
2469 if (CONSTANT_P (ydata.base)
2470 && (xdata.base == frame_pointer_rtx
2471 || xdata.base == hard_frame_pointer_rtx
2472 || xdata.base == stack_pointer_rtx))
2474 /* If either base is variable, we don't know anything. */
2478 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2481 /* Similar, but calls decompose. */
2484 safe_from_earlyclobber (rtx op, rtx clobber)
2486 struct decomposition early_data;
2488 early_data = decompose (clobber);
2489 return immune_p (op, clobber, early_data);
2492 /* Main entry point of this file: search the body of INSN
2493 for values that need reloading and record them with push_reload.
2494 REPLACE nonzero means record also where the values occur
2495 so that subst_reloads can be used.
2497 IND_LEVELS says how many levels of indirection are supported by this
2498 machine; a value of zero means that a memory reference is not a valid
2501 LIVE_KNOWN says we have valid information about which hard
2502 regs are live at each point in the program; this is true when
2503 we are called from global_alloc but false when stupid register
2504 allocation has been done.
2506 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2507 which is nonnegative if the reg has been commandeered for reloading into.
2508 It is copied into STATIC_RELOAD_REG_P and referenced from there
2509 by various subroutines.
2511 Return TRUE if some operands need to be changed, because of swapping
2512 commutative operands, reg_equiv_address substitution, or whatever. */
2515 find_reloads (rtx insn, int replace, int ind_levels, int live_known,
2516 short *reload_reg_p)
2518 int insn_code_number;
2521 /* These start out as the constraints for the insn
2522 and they are chewed up as we consider alternatives. */
2523 char *constraints[MAX_RECOG_OPERANDS];
2524 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2526 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2527 char pref_or_nothing[MAX_RECOG_OPERANDS];
2528 /* Nonzero for a MEM operand whose entire address needs a reload.
2529 May be -1 to indicate the entire address may or may not need a reload. */
2530 int address_reloaded[MAX_RECOG_OPERANDS];
2531 /* Nonzero for an address operand that needs to be completely reloaded.
2532 May be -1 to indicate the entire operand may or may not need a reload. */
2533 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2534 /* Value of enum reload_type to use for operand. */
2535 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2536 /* Value of enum reload_type to use within address of operand. */
2537 enum reload_type address_type[MAX_RECOG_OPERANDS];
2538 /* Save the usage of each operand. */
2539 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2540 int no_input_reloads = 0, no_output_reloads = 0;
2542 int this_alternative[MAX_RECOG_OPERANDS];
2543 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2544 char this_alternative_win[MAX_RECOG_OPERANDS];
2545 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2546 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2547 int this_alternative_matches[MAX_RECOG_OPERANDS];
2549 int goal_alternative[MAX_RECOG_OPERANDS];
2550 int this_alternative_number;
2551 int goal_alternative_number = 0;
2552 int operand_reloadnum[MAX_RECOG_OPERANDS];
2553 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2554 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2555 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2556 char goal_alternative_win[MAX_RECOG_OPERANDS];
2557 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2558 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2559 int goal_alternative_swapped;
2562 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2563 rtx substed_operand[MAX_RECOG_OPERANDS];
2564 rtx body = PATTERN (insn);
2565 rtx set = single_set (insn);
2566 int goal_earlyclobber = 0, this_earlyclobber;
2567 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2573 n_earlyclobbers = 0;
2574 replace_reloads = replace;
2575 hard_regs_live_known = live_known;
2576 static_reload_reg_p = reload_reg_p;
2578 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2579 neither are insns that SET cc0. Insns that use CC0 are not allowed
2580 to have any input reloads. */
2581 if (JUMP_P (insn) || CALL_P (insn))
2582 no_output_reloads = 1;
2585 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2586 no_input_reloads = 1;
2587 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2588 no_output_reloads = 1;
2591 #ifdef SECONDARY_MEMORY_NEEDED
2592 /* The eliminated forms of any secondary memory locations are per-insn, so
2593 clear them out here. */
2595 if (secondary_memlocs_elim_used)
2597 memset (secondary_memlocs_elim, 0,
2598 sizeof (secondary_memlocs_elim[0]) * secondary_memlocs_elim_used);
2599 secondary_memlocs_elim_used = 0;
2603 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2604 is cheap to move between them. If it is not, there may not be an insn
2605 to do the copy, so we may need a reload. */
2606 if (GET_CODE (body) == SET
2607 && REG_P (SET_DEST (body))
2608 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2609 && REG_P (SET_SRC (body))
2610 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2611 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2612 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2613 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2616 extract_insn (insn);
2618 noperands = reload_n_operands = recog_data.n_operands;
2619 n_alternatives = recog_data.n_alternatives;
2621 /* Just return "no reloads" if insn has no operands with constraints. */
2622 if (noperands == 0 || n_alternatives == 0)
2625 insn_code_number = INSN_CODE (insn);
2626 this_insn_is_asm = insn_code_number < 0;
2628 memcpy (operand_mode, recog_data.operand_mode,
2629 noperands * sizeof (enum machine_mode));
2630 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2634 /* If we will need to know, later, whether some pair of operands
2635 are the same, we must compare them now and save the result.
2636 Reloading the base and index registers will clobber them
2637 and afterward they will fail to match. */
2639 for (i = 0; i < noperands; i++)
2644 substed_operand[i] = recog_data.operand[i];
2647 modified[i] = RELOAD_READ;
2649 /* Scan this operand's constraint to see if it is an output operand,
2650 an in-out operand, is commutative, or should match another. */
2654 p += CONSTRAINT_LEN (c, p);
2658 modified[i] = RELOAD_WRITE;
2661 modified[i] = RELOAD_READ_WRITE;
2665 /* The last operand should not be marked commutative. */
2666 gcc_assert (i != noperands - 1);
2668 /* We currently only support one commutative pair of
2669 operands. Some existing asm code currently uses more
2670 than one pair. Previously, that would usually work,
2671 but sometimes it would crash the compiler. We
2672 continue supporting that case as well as we can by
2673 silently ignoring all but the first pair. In the
2674 future we may handle it correctly. */
2675 if (commutative < 0)
2678 gcc_assert (this_insn_is_asm);
2681 /* Use of ISDIGIT is tempting here, but it may get expensive because
2682 of locale support we don't want. */
2683 case '0': case '1': case '2': case '3': case '4':
2684 case '5': case '6': case '7': case '8': case '9':
2686 c = strtoul (p - 1, &p, 10);
2688 operands_match[c][i]
2689 = operands_match_p (recog_data.operand[c],
2690 recog_data.operand[i]);
2692 /* An operand may not match itself. */
2693 gcc_assert (c != i);
2695 /* If C can be commuted with C+1, and C might need to match I,
2696 then C+1 might also need to match I. */
2697 if (commutative >= 0)
2699 if (c == commutative || c == commutative + 1)
2701 int other = c + (c == commutative ? 1 : -1);
2702 operands_match[other][i]
2703 = operands_match_p (recog_data.operand[other],
2704 recog_data.operand[i]);
2706 if (i == commutative || i == commutative + 1)
2708 int other = i + (i == commutative ? 1 : -1);
2709 operands_match[c][other]
2710 = operands_match_p (recog_data.operand[c],
2711 recog_data.operand[other]);
2713 /* Note that C is supposed to be less than I.
2714 No need to consider altering both C and I because in
2715 that case we would alter one into the other. */
2722 /* Examine each operand that is a memory reference or memory address
2723 and reload parts of the addresses into index registers.
2724 Also here any references to pseudo regs that didn't get hard regs
2725 but are equivalent to constants get replaced in the insn itself
2726 with those constants. Nobody will ever see them again.
2728 Finally, set up the preferred classes of each operand. */
2730 for (i = 0; i < noperands; i++)
2732 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2734 address_reloaded[i] = 0;
2735 address_operand_reloaded[i] = 0;
2736 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2737 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2740 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2741 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2744 if (*constraints[i] == 0)
2745 /* Ignore things like match_operator operands. */
2747 else if (constraints[i][0] == 'p'
2748 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
2750 address_operand_reloaded[i]
2751 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2752 recog_data.operand[i],
2753 recog_data.operand_loc[i],
2754 i, operand_type[i], ind_levels, insn);
2756 /* If we now have a simple operand where we used to have a
2757 PLUS or MULT, re-recognize and try again. */
2758 if ((OBJECT_P (*recog_data.operand_loc[i])
2759 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2760 && (GET_CODE (recog_data.operand[i]) == MULT
2761 || GET_CODE (recog_data.operand[i]) == PLUS))
2763 INSN_CODE (insn) = -1;
2764 retval = find_reloads (insn, replace, ind_levels, live_known,
2769 recog_data.operand[i] = *recog_data.operand_loc[i];
2770 substed_operand[i] = recog_data.operand[i];
2772 /* Address operands are reloaded in their existing mode,
2773 no matter what is specified in the machine description. */
2774 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2776 else if (code == MEM)
2779 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2780 recog_data.operand_loc[i],
2781 XEXP (recog_data.operand[i], 0),
2782 &XEXP (recog_data.operand[i], 0),
2783 i, address_type[i], ind_levels, insn);
2784 recog_data.operand[i] = *recog_data.operand_loc[i];
2785 substed_operand[i] = recog_data.operand[i];
2787 else if (code == SUBREG)
2789 rtx reg = SUBREG_REG (recog_data.operand[i]);
2791 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2794 && &SET_DEST (set) == recog_data.operand_loc[i],
2796 &address_reloaded[i]);
2798 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2799 that didn't get a hard register, emit a USE with a REG_EQUAL
2800 note in front so that we might inherit a previous, possibly
2806 && (GET_MODE_SIZE (GET_MODE (reg))
2807 >= GET_MODE_SIZE (GET_MODE (op))))
2808 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2810 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2812 substed_operand[i] = recog_data.operand[i] = op;
2814 else if (code == PLUS || GET_RTX_CLASS (code) == RTX_UNARY)
2815 /* We can get a PLUS as an "operand" as a result of register
2816 elimination. See eliminate_regs and gen_reload. We handle
2817 a unary operator by reloading the operand. */
2818 substed_operand[i] = recog_data.operand[i]
2819 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2820 ind_levels, 0, insn,
2821 &address_reloaded[i]);
2822 else if (code == REG)
2824 /* This is equivalent to calling find_reloads_toplev.
2825 The code is duplicated for speed.
2826 When we find a pseudo always equivalent to a constant,
2827 we replace it by the constant. We must be sure, however,
2828 that we don't try to replace it in the insn in which it
2830 int regno = REGNO (recog_data.operand[i]);
2831 if (reg_equiv_constant[regno] != 0
2832 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2834 /* Record the existing mode so that the check if constants are
2835 allowed will work when operand_mode isn't specified. */
2837 if (operand_mode[i] == VOIDmode)
2838 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2840 substed_operand[i] = recog_data.operand[i]
2841 = reg_equiv_constant[regno];
2843 if (reg_equiv_memory_loc[regno] != 0
2844 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2845 /* We need not give a valid is_set_dest argument since the case
2846 of a constant equivalence was checked above. */
2847 substed_operand[i] = recog_data.operand[i]
2848 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2849 ind_levels, 0, insn,
2850 &address_reloaded[i]);
2852 /* If the operand is still a register (we didn't replace it with an
2853 equivalent), get the preferred class to reload it into. */
2854 code = GET_CODE (recog_data.operand[i]);
2856 = ((code == REG && REGNO (recog_data.operand[i])
2857 >= FIRST_PSEUDO_REGISTER)
2858 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2862 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2863 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2866 /* If this is simply a copy from operand 1 to operand 0, merge the
2867 preferred classes for the operands. */
2868 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2869 && recog_data.operand[1] == SET_SRC (set))
2871 preferred_class[0] = preferred_class[1]
2872 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2873 pref_or_nothing[0] |= pref_or_nothing[1];
2874 pref_or_nothing[1] |= pref_or_nothing[0];
2877 /* Now see what we need for pseudo-regs that didn't get hard regs
2878 or got the wrong kind of hard reg. For this, we must consider
2879 all the operands together against the register constraints. */
2881 best = MAX_RECOG_OPERANDS * 2 + 600;
2884 goal_alternative_swapped = 0;
2887 /* The constraints are made of several alternatives.
2888 Each operand's constraint looks like foo,bar,... with commas
2889 separating the alternatives. The first alternatives for all
2890 operands go together, the second alternatives go together, etc.
2892 First loop over alternatives. */
2894 for (this_alternative_number = 0;
2895 this_alternative_number < n_alternatives;
2896 this_alternative_number++)
2898 /* Loop over operands for one constraint alternative. */
2899 /* LOSERS counts those that don't fit this alternative
2900 and would require loading. */
2902 /* BAD is set to 1 if it some operand can't fit this alternative
2903 even after reloading. */
2905 /* REJECT is a count of how undesirable this alternative says it is
2906 if any reloading is required. If the alternative matches exactly
2907 then REJECT is ignored, but otherwise it gets this much
2908 counted against it in addition to the reloading needed. Each
2909 ? counts three times here since we want the disparaging caused by
2910 a bad register class to only count 1/3 as much. */
2913 this_earlyclobber = 0;
2915 for (i = 0; i < noperands; i++)
2917 char *p = constraints[i];
2922 /* 0 => this operand can be reloaded somehow for this alternative. */
2924 /* 0 => this operand can be reloaded if the alternative allows regs. */
2928 rtx operand = recog_data.operand[i];
2930 /* Nonzero means this is a MEM that must be reloaded into a reg
2931 regardless of what the constraint says. */
2932 int force_reload = 0;
2934 /* Nonzero if a constant forced into memory would be OK for this
2937 int earlyclobber = 0;
2939 /* If the predicate accepts a unary operator, it means that
2940 we need to reload the operand, but do not do this for
2941 match_operator and friends. */
2942 if (UNARY_P (operand) && *p != 0)
2943 operand = XEXP (operand, 0);
2945 /* If the operand is a SUBREG, extract
2946 the REG or MEM (or maybe even a constant) within.
2947 (Constants can occur as a result of reg_equiv_constant.) */
2949 while (GET_CODE (operand) == SUBREG)
2951 /* Offset only matters when operand is a REG and
2952 it is a hard reg. This is because it is passed
2953 to reg_fits_class_p if it is a REG and all pseudos
2954 return 0 from that function. */
2955 if (REG_P (SUBREG_REG (operand))
2956 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2958 if (!subreg_offset_representable_p
2959 (REGNO (SUBREG_REG (operand)),
2960 GET_MODE (SUBREG_REG (operand)),
2961 SUBREG_BYTE (operand),
2962 GET_MODE (operand)))
2964 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2965 GET_MODE (SUBREG_REG (operand)),
2966 SUBREG_BYTE (operand),
2967 GET_MODE (operand));
2969 operand = SUBREG_REG (operand);
2970 /* Force reload if this is a constant or PLUS or if there may
2971 be a problem accessing OPERAND in the outer mode. */
2972 if (CONSTANT_P (operand)
2973 || GET_CODE (operand) == PLUS
2974 /* We must force a reload of paradoxical SUBREGs
2975 of a MEM because the alignment of the inner value
2976 may not be enough to do the outer reference. On
2977 big-endian machines, it may also reference outside
2980 On machines that extend byte operations and we have a
2981 SUBREG where both the inner and outer modes are no wider
2982 than a word and the inner mode is narrower, is integral,
2983 and gets extended when loaded from memory, combine.c has
2984 made assumptions about the behavior of the machine in such
2985 register access. If the data is, in fact, in memory we
2986 must always load using the size assumed to be in the
2987 register and let the insn do the different-sized
2990 This is doubly true if WORD_REGISTER_OPERATIONS. In
2991 this case eliminate_regs has left non-paradoxical
2992 subregs for push_reload to see. Make sure it does
2993 by forcing the reload.
2995 ??? When is it right at this stage to have a subreg
2996 of a mem that is _not_ to be handled specially? IMO
2997 those should have been reduced to just a mem. */
2998 || ((MEM_P (operand)
3000 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3001 #ifndef WORD_REGISTER_OPERATIONS
3002 && (((GET_MODE_BITSIZE (GET_MODE (operand))
3003 < BIGGEST_ALIGNMENT)
3004 && (GET_MODE_SIZE (operand_mode[i])
3005 > GET_MODE_SIZE (GET_MODE (operand))))
3007 #ifdef LOAD_EXTEND_OP
3008 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3009 && (GET_MODE_SIZE (GET_MODE (operand))
3011 && (GET_MODE_SIZE (operand_mode[i])
3012 > GET_MODE_SIZE (GET_MODE (operand)))
3013 && INTEGRAL_MODE_P (GET_MODE (operand))
3014 && LOAD_EXTEND_OP (GET_MODE (operand)) != UNKNOWN)
3023 this_alternative[i] = (int) NO_REGS;
3024 this_alternative_win[i] = 0;
3025 this_alternative_match_win[i] = 0;
3026 this_alternative_offmemok[i] = 0;
3027 this_alternative_earlyclobber[i] = 0;
3028 this_alternative_matches[i] = -1;
3030 /* An empty constraint or empty alternative
3031 allows anything which matched the pattern. */
3032 if (*p == 0 || *p == ',')
3035 /* Scan this alternative's specs for this operand;
3036 set WIN if the operand fits any letter in this alternative.
3037 Otherwise, clear BADOP if this operand could
3038 fit some letter after reloads,
3039 or set WINREG if this operand could fit after reloads
3040 provided the constraint allows some registers. */
3043 switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
3052 case '=': case '+': case '*':
3056 /* We only support one commutative marker, the first
3057 one. We already set commutative above. */
3069 /* Ignore rest of this alternative as far as
3070 reloading is concerned. */
3073 while (*p && *p != ',');
3077 case '0': case '1': case '2': case '3': case '4':
3078 case '5': case '6': case '7': case '8': case '9':
3079 m = strtoul (p, &end, 10);
3083 this_alternative_matches[i] = m;
3084 /* We are supposed to match a previous operand.
3085 If we do, we win if that one did.
3086 If we do not, count both of the operands as losers.
3087 (This is too conservative, since most of the time
3088 only a single reload insn will be needed to make
3089 the two operands win. As a result, this alternative
3090 may be rejected when it is actually desirable.) */
3091 if ((swapped && (m != commutative || i != commutative + 1))
3092 /* If we are matching as if two operands were swapped,
3093 also pretend that operands_match had been computed
3095 But if I is the second of those and C is the first,
3096 don't exchange them, because operands_match is valid
3097 only on one side of its diagonal. */
3099 [(m == commutative || m == commutative + 1)
3100 ? 2 * commutative + 1 - m : m]
3101 [(i == commutative || i == commutative + 1)
3102 ? 2 * commutative + 1 - i : i])
3103 : operands_match[m][i])
3105 /* If we are matching a non-offsettable address where an
3106 offsettable address was expected, then we must reject
3107 this combination, because we can't reload it. */
3108 if (this_alternative_offmemok[m]
3109 && MEM_P (recog_data.operand[m])
3110 && this_alternative[m] == (int) NO_REGS
3111 && ! this_alternative_win[m])
3114 did_match = this_alternative_win[m];
3118 /* Operands don't match. */
3121 /* Retroactively mark the operand we had to match
3122 as a loser, if it wasn't already. */
3123 if (this_alternative_win[m])
3125 this_alternative_win[m] = 0;
3126 if (this_alternative[m] == (int) NO_REGS)
3128 /* But count the pair only once in the total badness of
3129 this alternative, if the pair can be a dummy reload.
3130 The pointers in operand_loc are not swapped; swap
3131 them by hand if necessary. */
3132 if (swapped && i == commutative)
3133 loc1 = commutative + 1;
3134 else if (swapped && i == commutative + 1)
3138 if (swapped && m == commutative)
3139 loc2 = commutative + 1;
3140 else if (swapped && m == commutative + 1)
3145 = find_dummy_reload (recog_data.operand[i],
3146 recog_data.operand[m],
3147 recog_data.operand_loc[loc1],
3148 recog_data.operand_loc[loc2],
3149 operand_mode[i], operand_mode[m],
3150 this_alternative[m], -1,
3151 this_alternative_earlyclobber[m]);
3156 /* This can be fixed with reloads if the operand
3157 we are supposed to match can be fixed with reloads. */
3159 this_alternative[i] = this_alternative[m];
3161 /* If we have to reload this operand and some previous
3162 operand also had to match the same thing as this
3163 operand, we don't know how to do that. So reject this
3165 if (! did_match || force_reload)
3166 for (j = 0; j < i; j++)
3167 if (this_alternative_matches[j]
3168 == this_alternative_matches[i])
3173 /* All necessary reloads for an address_operand
3174 were handled in find_reloads_address. */
3176 = (int) base_reg_class (VOIDmode, ADDRESS, SCRATCH);
3186 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3187 && reg_renumber[REGNO (operand)] < 0))
3189 if (CONST_POOL_OK_P (operand))
3196 && ! address_reloaded[i]
3197 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3198 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3204 && ! address_reloaded[i]
3205 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3206 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3210 /* Memory operand whose address is not offsettable. */
3215 && ! (ind_levels ? offsettable_memref_p (operand)
3216 : offsettable_nonstrict_memref_p (operand))
3217 /* Certain mem addresses will become offsettable
3218 after they themselves are reloaded. This is important;
3219 we don't want our own handling of unoffsettables
3220 to override the handling of reg_equiv_address. */
3221 && !(REG_P (XEXP (operand, 0))
3223 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3227 /* Memory operand whose address is offsettable. */
3231 if ((MEM_P (operand)
3232 /* If IND_LEVELS, find_reloads_address won't reload a
3233 pseudo that didn't get a hard reg, so we have to
3234 reject that case. */
3235 && ((ind_levels ? offsettable_memref_p (operand)
3236 : offsettable_nonstrict_memref_p (operand))
3237 /* A reloaded address is offsettable because it is now
3238 just a simple register indirect. */
3239 || address_reloaded[i] == 1))
3241 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3242 && reg_renumber[REGNO (operand)] < 0
3243 /* If reg_equiv_address is nonzero, we will be
3244 loading it into a register; hence it will be
3245 offsettable, but we cannot say that reg_equiv_mem
3246 is offsettable without checking. */
3247 && ((reg_equiv_mem[REGNO (operand)] != 0
3248 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3249 || (reg_equiv_address[REGNO (operand)] != 0))))
3251 if (CONST_POOL_OK_P (operand)
3259 /* Output operand that is stored before the need for the
3260 input operands (and their index registers) is over. */
3261 earlyclobber = 1, this_earlyclobber = 1;
3266 if (GET_CODE (operand) == CONST_DOUBLE
3267 || (GET_CODE (operand) == CONST_VECTOR
3268 && (GET_MODE_CLASS (GET_MODE (operand))
3269 == MODE_VECTOR_FLOAT)))
3275 if (GET_CODE (operand) == CONST_DOUBLE
3276 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand, c, p))
3281 if (GET_CODE (operand) == CONST_INT
3282 || (GET_CODE (operand) == CONST_DOUBLE
3283 && GET_MODE (operand) == VOIDmode))
3286 if (CONSTANT_P (operand)
3287 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)))
3292 if (GET_CODE (operand) == CONST_INT
3293 || (GET_CODE (operand) == CONST_DOUBLE
3294 && GET_MODE (operand) == VOIDmode))
3306 if (GET_CODE (operand) == CONST_INT
3307 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand), c, p))
3318 /* A PLUS is never a valid operand, but reload can make
3319 it from a register when eliminating registers. */
3320 && GET_CODE (operand) != PLUS
3321 /* A SCRATCH is not a valid operand. */
3322 && GET_CODE (operand) != SCRATCH
3323 && (! CONSTANT_P (operand)
3325 || LEGITIMATE_PIC_OPERAND_P (operand))
3326 && (GENERAL_REGS == ALL_REGS
3328 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3329 && reg_renumber[REGNO (operand)] < 0)))
3331 /* Drop through into 'r' case. */
3335 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3339 if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
3341 #ifdef EXTRA_CONSTRAINT_STR
3342 if (EXTRA_MEMORY_CONSTRAINT (c, p))
3346 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3348 /* If the address was already reloaded,
3350 else if (MEM_P (operand)
3351 && address_reloaded[i] == 1)
3353 /* Likewise if the address will be reloaded because
3354 reg_equiv_address is nonzero. For reg_equiv_mem
3355 we have to check. */
3356 else if (REG_P (operand)
3357 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3358 && reg_renumber[REGNO (operand)] < 0
3359 && ((reg_equiv_mem[REGNO (operand)] != 0
3360 && EXTRA_CONSTRAINT_STR (reg_equiv_mem[REGNO (operand)], c, p))
3361 || (reg_equiv_address[REGNO (operand)] != 0)))
3364 /* If we didn't already win, we can reload
3365 constants via force_const_mem, and other
3366 MEMs by reloading the address like for 'o'. */
3367 if (CONST_POOL_OK_P (operand)
3374 if (EXTRA_ADDRESS_CONSTRAINT (c, p))
3376 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3379 /* If we didn't already win, we can reload
3380 the address into a base register. */
3382 = (int) base_reg_class (VOIDmode, ADDRESS, SCRATCH);
3387 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3394 = (int) (reg_class_subunion
3395 [this_alternative[i]]
3396 [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]);
3398 if (GET_MODE (operand) == BLKmode)
3402 && reg_fits_class_p (operand, this_alternative[i],
3403 offset, GET_MODE (recog_data.operand[i])))
3407 while ((p += len), c);
3411 /* If this operand could be handled with a reg,
3412 and some reg is allowed, then this operand can be handled. */
3413 if (winreg && this_alternative[i] != (int) NO_REGS)
3416 /* Record which operands fit this alternative. */
3417 this_alternative_earlyclobber[i] = earlyclobber;
3418 if (win && ! force_reload)
3419 this_alternative_win[i] = 1;
3420 else if (did_match && ! force_reload)
3421 this_alternative_match_win[i] = 1;
3424 int const_to_mem = 0;
3426 this_alternative_offmemok[i] = offmemok;
3430 /* Alternative loses if it has no regs for a reg operand. */
3432 && this_alternative[i] == (int) NO_REGS
3433 && this_alternative_matches[i] < 0)
3436 /* If this is a constant that is reloaded into the desired
3437 class by copying it to memory first, count that as another
3438 reload. This is consistent with other code and is
3439 required to avoid choosing another alternative when
3440 the constant is moved into memory by this function on
3441 an early reload pass. Note that the test here is
3442 precisely the same as in the code below that calls
3444 if (CONST_POOL_OK_P (operand)
3445 && ((PREFERRED_RELOAD_CLASS (operand,
3446 (enum reg_class) this_alternative[i])
3448 || no_input_reloads)
3449 && operand_mode[i] != VOIDmode)
3452 if (this_alternative[i] != (int) NO_REGS)
3456 /* Alternative loses if it requires a type of reload not
3457 permitted for this insn. We can always reload SCRATCH
3458 and objects with a REG_UNUSED note. */
3459 if (GET_CODE (operand) != SCRATCH
3460 && modified[i] != RELOAD_READ && no_output_reloads
3461 && ! find_reg_note (insn, REG_UNUSED, operand))
3463 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3467 /* If we can't reload this value at all, reject this
3468 alternative. Note that we could also lose due to
3469 LIMIT_RELOAD_CLASS, but we don't check that
3472 if (! CONSTANT_P (operand)
3473 && (enum reg_class) this_alternative[i] != NO_REGS)
3475 if (PREFERRED_RELOAD_CLASS
3476 (operand, (enum reg_class) this_alternative[i])
3480 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
3481 if (operand_type[i] == RELOAD_FOR_OUTPUT
3482 && PREFERRED_OUTPUT_RELOAD_CLASS
3483 (operand, (enum reg_class) this_alternative[i])
3489 /* We prefer to reload pseudos over reloading other things,
3490 since such reloads may be able to be eliminated later.
3491 If we are reloading a SCRATCH, we won't be generating any
3492 insns, just using a register, so it is also preferred.
3493 So bump REJECT in other cases. Don't do this in the
3494 case where we are forcing a constant into memory and
3495 it will then win since we don't want to have a different
3496 alternative match then. */
3497 if (! (REG_P (operand)
3498 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3499 && GET_CODE (operand) != SCRATCH
3500 && ! (const_to_mem && constmemok))
3503 /* Input reloads can be inherited more often than output
3504 reloads can be removed, so penalize output reloads. */
3505 if (operand_type[i] != RELOAD_FOR_INPUT
3506 && GET_CODE (operand) != SCRATCH)
3510 /* If this operand is a pseudo register that didn't get a hard
3511 reg and this alternative accepts some register, see if the
3512 class that we want is a subset of the preferred class for this
3513 register. If not, but it intersects that class, use the
3514 preferred class instead. If it does not intersect the preferred
3515 class, show that usage of this alternative should be discouraged;
3516 it will be discouraged more still if the register is `preferred
3517 or nothing'. We do this because it increases the chance of
3518 reusing our spill register in a later insn and avoiding a pair
3519 of memory stores and loads.
3521 Don't bother with this if this alternative will accept this
3524 Don't do this for a multiword operand, since it is only a
3525 small win and has the risk of requiring more spill registers,
3526 which could cause a large loss.
3528 Don't do this if the preferred class has only one register
3529 because we might otherwise exhaust the class. */
3531 if (! win && ! did_match
3532 && this_alternative[i] != (int) NO_REGS
3533 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3534 && reg_class_size [(int) preferred_class[i]] > 0
3535 && ! SMALL_REGISTER_CLASS_P (preferred_class[i]))
3537 if (! reg_class_subset_p (this_alternative[i],
3538 preferred_class[i]))
3540 /* Since we don't have a way of forming the intersection,
3541 we just do something special if the preferred class
3542 is a subset of the class we have; that's the most
3543 common case anyway. */
3544 if (reg_class_subset_p (preferred_class[i],
3545 this_alternative[i]))
3546 this_alternative[i] = (int) preferred_class[i];
3548 reject += (2 + 2 * pref_or_nothing[i]);
3553 /* Now see if any output operands that are marked "earlyclobber"
3554 in this alternative conflict with any input operands
3555 or any memory addresses. */
3557 for (i = 0; i < noperands; i++)
3558 if (this_alternative_earlyclobber[i]
3559 && (this_alternative_win[i] || this_alternative_match_win[i]))
3561 struct decomposition early_data;
3563 early_data = decompose (recog_data.operand[i]);
3565 gcc_assert (modified[i] != RELOAD_READ);
3567 if (this_alternative[i] == NO_REGS)
3569 this_alternative_earlyclobber[i] = 0;
3570 gcc_assert (this_insn_is_asm);
3571 error_for_asm (this_insn,
3572 "%<&%> constraint used with no register class");
3575 for (j = 0; j < noperands; j++)
3576 /* Is this an input operand or a memory ref? */
3577 if ((MEM_P (recog_data.operand[j])
3578 || modified[j] != RELOAD_WRITE)
3580 /* Ignore things like match_operator operands. */
3581 && *recog_data.constraints[j] != 0
3582 /* Don't count an input operand that is constrained to match
3583 the early clobber operand. */
3584 && ! (this_alternative_matches[j] == i
3585 && rtx_equal_p (recog_data.operand[i],
3586 recog_data.operand[j]))
3587 /* Is it altered by storing the earlyclobber operand? */
3588 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3591 /* If the output is in a non-empty few-regs class,
3592 it's costly to reload it, so reload the input instead. */
3593 if (SMALL_REGISTER_CLASS_P (this_alternative[i])
3594 && (REG_P (recog_data.operand[j])
3595 || GET_CODE (recog_data.operand[j]) == SUBREG))
3598 this_alternative_win[j] = 0;
3599 this_alternative_match_win[j] = 0;
3604 /* If an earlyclobber operand conflicts with something,
3605 it must be reloaded, so request this and count the cost. */
3609 this_alternative_win[i] = 0;
3610 this_alternative_match_win[j] = 0;
3611 for (j = 0; j < noperands; j++)
3612 if (this_alternative_matches[j] == i
3613 && this_alternative_match_win[j])
3615 this_alternative_win[j] = 0;
3616 this_alternative_match_win[j] = 0;
3622 /* If one alternative accepts all the operands, no reload required,
3623 choose that alternative; don't consider the remaining ones. */
3626 /* Unswap these so that they are never swapped at `finish'. */
3627 if (commutative >= 0)
3629 recog_data.operand[commutative] = substed_operand[commutative];
3630 recog_data.operand[commutative + 1]
3631 = substed_operand[commutative + 1];
3633 for (i = 0; i < noperands; i++)
3635 goal_alternative_win[i] = this_alternative_win[i];
3636 goal_alternative_match_win[i] = this_alternative_match_win[i];
3637 goal_alternative[i] = this_alternative[i];
3638 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3639 goal_alternative_matches[i] = this_alternative_matches[i];
3640 goal_alternative_earlyclobber[i]
3641 = this_alternative_earlyclobber[i];
3643 goal_alternative_number = this_alternative_number;
3644 goal_alternative_swapped = swapped;
3645 goal_earlyclobber = this_earlyclobber;
3649 /* REJECT, set by the ! and ? constraint characters and when a register
3650 would be reloaded into a non-preferred class, discourages the use of
3651 this alternative for a reload goal. REJECT is incremented by six
3652 for each ? and two for each non-preferred class. */
3653 losers = losers * 6 + reject;
3655 /* If this alternative can be made to work by reloading,
3656 and it needs less reloading than the others checked so far,
3657 record it as the chosen goal for reloading. */
3658 if (! bad && best > losers)
3660 for (i = 0; i < noperands; i++)
3662 goal_alternative[i] = this_alternative[i];
3663 goal_alternative_win[i] = this_alternative_win[i];
3664 goal_alternative_match_win[i] = this_alternative_match_win[i];
3665 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3666 goal_alternative_matches[i] = this_alternative_matches[i];
3667 goal_alternative_earlyclobber[i]
3668 = this_alternative_earlyclobber[i];
3670 goal_alternative_swapped = swapped;
3672 goal_alternative_number = this_alternative_number;
3673 goal_earlyclobber = this_earlyclobber;
3677 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3678 then we need to try each alternative twice,
3679 the second time matching those two operands
3680 as if we had exchanged them.
3681 To do this, really exchange them in operands.
3683 If we have just tried the alternatives the second time,
3684 return operands to normal and drop through. */
3686 if (commutative >= 0)
3691 enum reg_class tclass;
3694 recog_data.operand[commutative] = substed_operand[commutative + 1];
3695 recog_data.operand[commutative + 1] = substed_operand[commutative];
3696 /* Swap the duplicates too. */
3697 for (i = 0; i < recog_data.n_dups; i++)
3698 if (recog_data.dup_num[i] == commutative
3699 || recog_data.dup_num[i] == commutative + 1)
3700 *recog_data.dup_loc[i]
3701 = recog_data.operand[(int) recog_data.dup_num[i]];
3703 tclass = preferred_class[commutative];
3704 preferred_class[commutative] = preferred_class[commutative + 1];
3705 preferred_class[commutative + 1] = tclass;
3707 t = pref_or_nothing[commutative];
3708 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3709 pref_or_nothing[commutative + 1] = t;
3711 t = address_reloaded[commutative];
3712 address_reloaded[commutative] = address_reloaded[commutative + 1];
3713 address_reloaded[commutative + 1] = t;
3715 memcpy (constraints, recog_data.constraints,
3716 noperands * sizeof (char *));
3721 recog_data.operand[commutative] = substed_operand[commutative];
3722 recog_data.operand[commutative + 1]
3723 = substed_operand[commutative + 1];
3724 /* Unswap the duplicates too. */
3725 for (i = 0; i < recog_data.n_dups; i++)
3726 if (recog_data.dup_num[i] == commutative
3727 || recog_data.dup_num[i] == commutative + 1)
3728 *recog_data.dup_loc[i]
3729 = recog_data.operand[(int) recog_data.dup_num[i]];
3733 /* The operands don't meet the constraints.
3734 goal_alternative describes the alternative
3735 that we could reach by reloading the fewest operands.
3736 Reload so as to fit it. */
3738 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3740 /* No alternative works with reloads?? */
3741 if (insn_code_number >= 0)
3742 fatal_insn ("unable to generate reloads for:", insn);
3743 error_for_asm (insn, "inconsistent operand constraints in an %<asm%>");
3744 /* Avoid further trouble with this insn. */
3745 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3750 /* Jump to `finish' from above if all operands are valid already.
3751 In that case, goal_alternative_win is all 1. */
3754 /* Right now, for any pair of operands I and J that are required to match,
3756 goal_alternative_matches[J] is I.
3757 Set up goal_alternative_matched as the inverse function:
3758 goal_alternative_matched[I] = J. */
3760 for (i = 0; i < noperands; i++)
3761 goal_alternative_matched[i] = -1;
3763 for (i = 0; i < noperands; i++)
3764 if (! goal_alternative_win[i]
3765 && goal_alternative_matches[i] >= 0)
3766 goal_alternative_matched[goal_alternative_matches[i]] = i;
3768 for (i = 0; i < noperands; i++)
3769 goal_alternative_win[i] |= goal_alternative_match_win[i];
3771 /* If the best alternative is with operands 1 and 2 swapped,
3772 consider them swapped before reporting the reloads. Update the
3773 operand numbers of any reloads already pushed. */
3775 if (goal_alternative_swapped)
3779 tem = substed_operand[commutative];
3780 substed_operand[commutative] = substed_operand[commutative + 1];
3781 substed_operand[commutative + 1] = tem;
3782 tem = recog_data.operand[commutative];
3783 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3784 recog_data.operand[commutative + 1] = tem;
3785 tem = *recog_data.operand_loc[commutative];
3786 *recog_data.operand_loc[commutative]
3787 = *recog_data.operand_loc[commutative + 1];
3788 *recog_data.operand_loc[commutative + 1] = tem;
3790 for (i = 0; i < n_reloads; i++)
3792 if (rld[i].opnum == commutative)
3793 rld[i].opnum = commutative + 1;
3794 else if (rld[i].opnum == commutative + 1)
3795 rld[i].opnum = commutative;
3799 for (i = 0; i < noperands; i++)
3801 operand_reloadnum[i] = -1;
3803 /* If this is an earlyclobber operand, we need to widen the scope.
3804 The reload must remain valid from the start of the insn being
3805 reloaded until after the operand is stored into its destination.
3806 We approximate this with RELOAD_OTHER even though we know that we
3807 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3809 One special case that is worth checking is when we have an
3810 output that is earlyclobber but isn't used past the insn (typically
3811 a SCRATCH). In this case, we only need have the reload live
3812 through the insn itself, but not for any of our input or output
3814 But we must not accidentally narrow the scope of an existing
3815 RELOAD_OTHER reload - leave these alone.
3817 In any case, anything needed to address this operand can remain
3818 however they were previously categorized. */
3820 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3822 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3823 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3826 /* Any constants that aren't allowed and can't be reloaded
3827 into registers are here changed into memory references. */
3828 for (i = 0; i < noperands; i++)
3829 if (! goal_alternative_win[i]
3830 && CONST_POOL_OK_P (recog_data.operand[i])
3831 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3832 (enum reg_class) goal_alternative[i])
3834 || no_input_reloads)
3835 && operand_mode[i] != VOIDmode)
3837 substed_operand[i] = recog_data.operand[i]
3838 = find_reloads_toplev (force_const_mem (operand_mode[i],
3839 recog_data.operand[i]),
3840 i, address_type[i], ind_levels, 0, insn,
3842 if (alternative_allows_memconst (recog_data.constraints[i],
3843 goal_alternative_number))
3844 goal_alternative_win[i] = 1;
3847 /* Likewise any invalid constants appearing as operand of a PLUS
3848 that is to be reloaded. */
3849 for (i = 0; i < noperands; i++)
3850 if (! goal_alternative_win[i]
3851 && GET_CODE (recog_data.operand[i]) == PLUS
3852 && CONST_POOL_OK_P (XEXP (recog_data.operand[i], 1))
3853 && (PREFERRED_RELOAD_CLASS (XEXP (recog_data.operand[i], 1),
3854 (enum reg_class) goal_alternative[i])
3856 && operand_mode[i] != VOIDmode)
3858 rtx tem = force_const_mem (operand_mode[i],
3859 XEXP (recog_data.operand[i], 1));
3860 tem = gen_rtx_PLUS (operand_mode[i],
3861 XEXP (recog_data.operand[i], 0), tem);
3863 substed_operand[i] = recog_data.operand[i]
3864 = find_reloads_toplev (tem, i, address_type[i],
3865 ind_levels, 0, insn, NULL);
3868 /* Record the values of the earlyclobber operands for the caller. */
3869 if (goal_earlyclobber)
3870 for (i = 0; i < noperands; i++)
3871 if (goal_alternative_earlyclobber[i])
3872 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3874 /* Now record reloads for all the operands that need them. */
3875 for (i = 0; i < noperands; i++)
3876 if (! goal_alternative_win[i])
3878 /* Operands that match previous ones have already been handled. */
3879 if (goal_alternative_matches[i] >= 0)
3881 /* Handle an operand with a nonoffsettable address
3882 appearing where an offsettable address will do
3883 by reloading the address into a base register.
3885 ??? We can also do this when the operand is a register and
3886 reg_equiv_mem is not offsettable, but this is a bit tricky,
3887 so we don't bother with it. It may not be worth doing. */
3888 else if (goal_alternative_matched[i] == -1
3889 && goal_alternative_offmemok[i]
3890 && MEM_P (recog_data.operand[i]))
3892 /* If the address to be reloaded is a VOIDmode constant,
3893 use Pmode as mode of the reload register, as would have
3894 been done by find_reloads_address. */
3895 enum machine_mode address_mode;
3896 address_mode = GET_MODE (XEXP (recog_data.operand[i], 0));
3897 if (address_mode == VOIDmode)
3898 address_mode = Pmode;
3900 operand_reloadnum[i]
3901 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3902 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3903 base_reg_class (VOIDmode, MEM, SCRATCH),
3905 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3906 rld[operand_reloadnum[i]].inc
3907 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3909 /* If this operand is an output, we will have made any
3910 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3911 now we are treating part of the operand as an input, so
3912 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3914 if (modified[i] == RELOAD_WRITE)
3916 for (j = 0; j < n_reloads; j++)
3918 if (rld[j].opnum == i)
3920 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3921 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3922 else if (rld[j].when_needed
3923 == RELOAD_FOR_OUTADDR_ADDRESS)
3924 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3929 else if (goal_alternative_matched[i] == -1)
3931 operand_reloadnum[i]
3932 = push_reload ((modified[i] != RELOAD_WRITE
3933 ? recog_data.operand[i] : 0),
3934 (modified[i] != RELOAD_READ
3935 ? recog_data.operand[i] : 0),
3936 (modified[i] != RELOAD_WRITE
3937 ? recog_data.operand_loc[i] : 0),
3938 (modified[i] != RELOAD_READ
3939 ? recog_data.operand_loc[i] : 0),
3940 (enum reg_class) goal_alternative[i],
3941 (modified[i] == RELOAD_WRITE
3942 ? VOIDmode : operand_mode[i]),
3943 (modified[i] == RELOAD_READ
3944 ? VOIDmode : operand_mode[i]),
3945 (insn_code_number < 0 ? 0
3946 : insn_data[insn_code_number].operand[i].strict_low),
3947 0, i, operand_type[i]);
3949 /* In a matching pair of operands, one must be input only
3950 and the other must be output only.
3951 Pass the input operand as IN and the other as OUT. */
3952 else if (modified[i] == RELOAD_READ
3953 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3955 operand_reloadnum[i]
3956 = push_reload (recog_data.operand[i],
3957 recog_data.operand[goal_alternative_matched[i]],
3958 recog_data.operand_loc[i],
3959 recog_data.operand_loc[goal_alternative_matched[i]],
3960 (enum reg_class) goal_alternative[i],
3962 operand_mode[goal_alternative_matched[i]],
3963 0, 0, i, RELOAD_OTHER);
3964 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3966 else if (modified[i] == RELOAD_WRITE
3967 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3969 operand_reloadnum[goal_alternative_matched[i]]
3970 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3971 recog_data.operand[i],
3972 recog_data.operand_loc[goal_alternative_matched[i]],
3973 recog_data.operand_loc[i],
3974 (enum reg_class) goal_alternative[i],
3975 operand_mode[goal_alternative_matched[i]],
3977 0, 0, i, RELOAD_OTHER);
3978 operand_reloadnum[i] = output_reloadnum;
3982 gcc_assert (insn_code_number < 0);
3983 error_for_asm (insn, "inconsistent operand constraints "
3985 /* Avoid further trouble with this insn. */
3986 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3991 else if (goal_alternative_matched[i] < 0
3992 && goal_alternative_matches[i] < 0
3993 && address_operand_reloaded[i] != 1
3996 /* For each non-matching operand that's a MEM or a pseudo-register
3997 that didn't get a hard register, make an optional reload.
3998 This may get done even if the insn needs no reloads otherwise. */
4000 rtx operand = recog_data.operand[i];
4002 while (GET_CODE (operand) == SUBREG)
4003 operand = SUBREG_REG (operand);
4004 if ((MEM_P (operand)
4006 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4007 /* If this is only for an output, the optional reload would not
4008 actually cause us to use a register now, just note that
4009 something is stored here. */
4010 && ((enum reg_class) goal_alternative[i] != NO_REGS
4011 || modified[i] == RELOAD_WRITE)
4012 && ! no_input_reloads
4013 /* An optional output reload might allow to delete INSN later.
4014 We mustn't make in-out reloads on insns that are not permitted
4016 If this is an asm, we can't delete it; we must not even call
4017 push_reload for an optional output reload in this case,
4018 because we can't be sure that the constraint allows a register,
4019 and push_reload verifies the constraints for asms. */
4020 && (modified[i] == RELOAD_READ
4021 || (! no_output_reloads && ! this_insn_is_asm)))
4022 operand_reloadnum[i]
4023 = push_reload ((modified[i] != RELOAD_WRITE
4024 ? recog_data.operand[i] : 0),
4025 (modified[i] != RELOAD_READ
4026 ? recog_data.operand[i] : 0),
4027 (modified[i] != RELOAD_WRITE
4028 ? recog_data.operand_loc[i] : 0),
4029 (modified[i] != RELOAD_READ
4030 ? recog_data.operand_loc[i] : 0),
4031 (enum reg_class) goal_alternative[i],
4032 (modified[i] == RELOAD_WRITE
4033 ? VOIDmode : operand_mode[i]),
4034 (modified[i] == RELOAD_READ
4035 ? VOIDmode : operand_mode[i]),
4036 (insn_code_number < 0 ? 0
4037 : insn_data[insn_code_number].operand[i].strict_low),
4038 1, i, operand_type[i]);
4039 /* If a memory reference remains (either as a MEM or a pseudo that
4040 did not get a hard register), yet we can't make an optional
4041 reload, check if this is actually a pseudo register reference;
4042 we then need to emit a USE and/or a CLOBBER so that reload
4043 inheritance will do the right thing. */
4047 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
4048 && reg_renumber [REGNO (operand)] < 0)))
4050 operand = *recog_data.operand_loc[i];
4052 while (GET_CODE (operand) == SUBREG)
4053 operand = SUBREG_REG (operand);
4054 if (REG_P (operand))
4056 if (modified[i] != RELOAD_WRITE)
4057 /* We mark the USE with QImode so that we recognize
4058 it as one that can be safely deleted at the end
4060 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
4062 if (modified[i] != RELOAD_READ)
4063 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
4067 else if (goal_alternative_matches[i] >= 0
4068 && goal_alternative_win[goal_alternative_matches[i]]
4069 && modified[i] == RELOAD_READ
4070 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
4071 && ! no_input_reloads && ! no_output_reloads
4074 /* Similarly, make an optional reload for a pair of matching
4075 objects that are in MEM or a pseudo that didn't get a hard reg. */
4077 rtx operand = recog_data.operand[i];
4079 while (GET_CODE (operand) == SUBREG)
4080 operand = SUBREG_REG (operand);
4081 if ((MEM_P (operand)
4083 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4084 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
4086 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
4087 = push_reload (recog_data.operand[goal_alternative_matches[i]],
4088 recog_data.operand[i],
4089 recog_data.operand_loc[goal_alternative_matches[i]],
4090 recog_data.operand_loc[i],
4091 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
4092 operand_mode[goal_alternative_matches[i]],
4094 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
4097 /* Perform whatever substitutions on the operands we are supposed
4098 to make due to commutativity or replacement of registers
4099 with equivalent constants or memory slots. */
4101 for (i = 0; i < noperands; i++)
4103 /* We only do this on the last pass through reload, because it is
4104 possible for some data (like reg_equiv_address) to be changed during
4105 later passes. Moreover, we lose the opportunity to get a useful
4106 reload_{in,out}_reg when we do these replacements. */
4110 rtx substitution = substed_operand[i];
4112 *recog_data.operand_loc[i] = substitution;
4114 /* If we're replacing an operand with a LABEL_REF, we need
4115 to make sure that there's a REG_LABEL note attached to
4116 this instruction. */
4118 && GET_CODE (substitution) == LABEL_REF
4119 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
4120 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
4121 XEXP (substitution, 0),
4125 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
4128 /* If this insn pattern contains any MATCH_DUP's, make sure that
4129 they will be substituted if the operands they match are substituted.
4130 Also do now any substitutions we already did on the operands.
4132 Don't do this if we aren't making replacements because we might be
4133 propagating things allocated by frame pointer elimination into places
4134 it doesn't expect. */
4136 if (insn_code_number >= 0 && replace)
4137 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4139 int opno = recog_data.dup_num[i];
4140 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4141 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4145 /* This loses because reloading of prior insns can invalidate the equivalence
4146 (or at least find_equiv_reg isn't smart enough to find it any more),
4147 causing this insn to need more reload regs than it needed before.
4148 It may be too late to make the reload regs available.
4149 Now this optimization is done safely in choose_reload_regs. */
4151 /* For each reload of a reg into some other class of reg,
4152 search for an existing equivalent reg (same value now) in the right class.
4153 We can use it as long as we don't need to change its contents. */
4154 for (i = 0; i < n_reloads; i++)
4155 if (rld[i].reg_rtx == 0
4157 && REG_P (rld[i].in)
4161 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
4162 static_reload_reg_p, 0, rld[i].inmode);
4163 /* Prevent generation of insn to load the value
4164 because the one we found already has the value. */
4166 rld[i].in = rld[i].reg_rtx;
4170 /* If we detected error and replaced asm instruction by USE, forget about the
4172 if (GET_CODE (PATTERN (insn)) == USE
4173 && GET_CODE (XEXP (PATTERN (insn), 0)) == CONST_INT)
4176 /* Perhaps an output reload can be combined with another
4177 to reduce needs by one. */
4178 if (!goal_earlyclobber)
4181 /* If we have a pair of reloads for parts of an address, they are reloading
4182 the same object, the operands themselves were not reloaded, and they
4183 are for two operands that are supposed to match, merge the reloads and
4184 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4186 for (i = 0; i < n_reloads; i++)
4190 for (j = i + 1; j < n_reloads; j++)
4191 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4192 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4193 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4194 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4195 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4196 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4197 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4198 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4199 && rtx_equal_p (rld[i].in, rld[j].in)
4200 && (operand_reloadnum[rld[i].opnum] < 0
4201 || rld[operand_reloadnum[rld[i].opnum]].optional)
4202 && (operand_reloadnum[rld[j].opnum] < 0
4203 || rld[operand_reloadnum[rld[j].opnum]].optional)
4204 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4205 || (goal_alternative_matches[rld[j].opnum]
4208 for (k = 0; k < n_replacements; k++)
4209 if (replacements[k].what == j)
4210 replacements[k].what = i;
4212 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4213 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4214 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4216 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4221 /* Scan all the reloads and update their type.
4222 If a reload is for the address of an operand and we didn't reload
4223 that operand, change the type. Similarly, change the operand number
4224 of a reload when two operands match. If a reload is optional, treat it
4225 as though the operand isn't reloaded.
4227 ??? This latter case is somewhat odd because if we do the optional
4228 reload, it means the object is hanging around. Thus we need only
4229 do the address reload if the optional reload was NOT done.
4231 Change secondary reloads to be the address type of their operand, not
4234 If an operand's reload is now RELOAD_OTHER, change any
4235 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4236 RELOAD_FOR_OTHER_ADDRESS. */
4238 for (i = 0; i < n_reloads; i++)
4240 if (rld[i].secondary_p
4241 && rld[i].when_needed == operand_type[rld[i].opnum])
4242 rld[i].when_needed = address_type[rld[i].opnum];
4244 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4245 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4246 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4247 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4248 && (operand_reloadnum[rld[i].opnum] < 0
4249 || rld[operand_reloadnum[rld[i].opnum]].optional))
4251 /* If we have a secondary reload to go along with this reload,
4252 change its type to RELOAD_FOR_OPADDR_ADDR. */
4254 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4255 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4256 && rld[i].secondary_in_reload != -1)
4258 int secondary_in_reload = rld[i].secondary_in_reload;
4260 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4262 /* If there's a tertiary reload we have to change it also. */
4263 if (secondary_in_reload > 0
4264 && rld[secondary_in_reload].secondary_in_reload != -1)
4265 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4266 = RELOAD_FOR_OPADDR_ADDR;
4269 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4270 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4271 && rld[i].secondary_out_reload != -1)
4273 int secondary_out_reload = rld[i].secondary_out_reload;
4275 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4277 /* If there's a tertiary reload we have to change it also. */
4278 if (secondary_out_reload
4279 && rld[secondary_out_reload].secondary_out_reload != -1)
4280 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4281 = RELOAD_FOR_OPADDR_ADDR;
4284 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4285 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4286 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4288 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4291 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4292 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4293 && operand_reloadnum[rld[i].opnum] >= 0
4294 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4296 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4298 if (goal_alternative_matches[rld[i].opnum] >= 0)
4299 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4302 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4303 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4304 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4306 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4307 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4308 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4309 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4310 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4311 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4312 This is complicated by the fact that a single operand can have more
4313 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4314 choose_reload_regs without affecting code quality, and cases that
4315 actually fail are extremely rare, so it turns out to be better to fix
4316 the problem here by not generating cases that choose_reload_regs will
4318 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4319 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4321 We can reduce the register pressure by exploiting that a
4322 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4323 does not conflict with any of them, if it is only used for the first of
4324 the RELOAD_FOR_X_ADDRESS reloads. */
4326 int first_op_addr_num = -2;
4327 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4328 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4329 int need_change = 0;
4330 /* We use last_op_addr_reload and the contents of the above arrays
4331 first as flags - -2 means no instance encountered, -1 means exactly
4332 one instance encountered.
4333 If more than one instance has been encountered, we store the reload
4334 number of the first reload of the kind in question; reload numbers
4335 are known to be non-negative. */
4336 for (i = 0; i < noperands; i++)
4337 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4338 for (i = n_reloads - 1; i >= 0; i--)
4340 switch (rld[i].when_needed)
4342 case RELOAD_FOR_OPERAND_ADDRESS:
4343 if (++first_op_addr_num >= 0)
4345 first_op_addr_num = i;
4349 case RELOAD_FOR_INPUT_ADDRESS:
4350 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4352 first_inpaddr_num[rld[i].opnum] = i;
4356 case RELOAD_FOR_OUTPUT_ADDRESS:
4357 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4359 first_outpaddr_num[rld[i].opnum] = i;
4370 for (i = 0; i < n_reloads; i++)
4373 enum reload_type type;
4375 switch (rld[i].when_needed)
4377 case RELOAD_FOR_OPADDR_ADDR:
4378 first_num = first_op_addr_num;
4379 type = RELOAD_FOR_OPERAND_ADDRESS;
4381 case RELOAD_FOR_INPADDR_ADDRESS:
4382 first_num = first_inpaddr_num[rld[i].opnum];
4383 type = RELOAD_FOR_INPUT_ADDRESS;
4385 case RELOAD_FOR_OUTADDR_ADDRESS:
4386 first_num = first_outpaddr_num[rld[i].opnum];
4387 type = RELOAD_FOR_OUTPUT_ADDRESS;
4394 else if (i > first_num)
4395 rld[i].when_needed = type;
4398 /* Check if the only TYPE reload that uses reload I is
4399 reload FIRST_NUM. */
4400 for (j = n_reloads - 1; j > first_num; j--)
4402 if (rld[j].when_needed == type
4403 && (rld[i].secondary_p
4404 ? rld[j].secondary_in_reload == i
4405 : reg_mentioned_p (rld[i].in, rld[j].in)))
4407 rld[i].when_needed = type;
4416 /* See if we have any reloads that are now allowed to be merged
4417 because we've changed when the reload is needed to
4418 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4419 check for the most common cases. */
4421 for (i = 0; i < n_reloads; i++)
4422 if (rld[i].in != 0 && rld[i].out == 0
4423 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4424 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4425 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4426 for (j = 0; j < n_reloads; j++)
4427 if (i != j && rld[j].in != 0 && rld[j].out == 0
4428 && rld[j].when_needed == rld[i].when_needed
4429 && MATCHES (rld[i].in, rld[j].in)
4430 && rld[i].class == rld[j].class
4431 && !rld[i].nocombine && !rld[j].nocombine
4432 && rld[i].reg_rtx == rld[j].reg_rtx)
4434 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4435 transfer_replacements (i, j);
4440 /* If we made any reloads for addresses, see if they violate a
4441 "no input reloads" requirement for this insn. But loads that we
4442 do after the insn (such as for output addresses) are fine. */
4443 if (no_input_reloads)
4444 for (i = 0; i < n_reloads; i++)
4445 gcc_assert (rld[i].in == 0
4446 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS
4447 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS);
4450 /* Compute reload_mode and reload_nregs. */
4451 for (i = 0; i < n_reloads; i++)
4454 = (rld[i].inmode == VOIDmode
4455 || (GET_MODE_SIZE (rld[i].outmode)
4456 > GET_MODE_SIZE (rld[i].inmode)))
4457 ? rld[i].outmode : rld[i].inmode;
4459 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4462 /* Special case a simple move with an input reload and a
4463 destination of a hard reg, if the hard reg is ok, use it. */
4464 for (i = 0; i < n_reloads; i++)
4465 if (rld[i].when_needed == RELOAD_FOR_INPUT
4466 && GET_CODE (PATTERN (insn)) == SET
4467 && REG_P (SET_DEST (PATTERN (insn)))
4468 && SET_SRC (PATTERN (insn)) == rld[i].in
4469 && !elimination_target_reg_p (SET_DEST (PATTERN (insn))))
4471 rtx dest = SET_DEST (PATTERN (insn));
4472 unsigned int regno = REGNO (dest);
4474 if (regno < FIRST_PSEUDO_REGISTER
4475 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
4476 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4478 int nr = hard_regno_nregs[regno][rld[i].mode];
4481 for (nri = 1; nri < nr; nri ++)
4482 if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno + nri))
4486 rld[i].reg_rtx = dest;
4493 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4494 accepts a memory operand with constant address. */
4497 alternative_allows_memconst (const char *constraint, int altnum)
4500 /* Skip alternatives before the one requested. */
4503 while (*constraint++ != ',');
4506 /* Scan the requested alternative for 'm' or 'o'.
4507 If one of them is present, this alternative accepts memory constants. */
4508 for (; (c = *constraint) && c != ',' && c != '#';
4509 constraint += CONSTRAINT_LEN (c, constraint))
4510 if (c == 'm' || c == 'o' || EXTRA_MEMORY_CONSTRAINT (c, constraint))
4515 /* Scan X for memory references and scan the addresses for reloading.
4516 Also checks for references to "constant" regs that we want to eliminate
4517 and replaces them with the values they stand for.
4518 We may alter X destructively if it contains a reference to such.
4519 If X is just a constant reg, we return the equivalent value
4522 IND_LEVELS says how many levels of indirect addressing this machine
4525 OPNUM and TYPE identify the purpose of the reload.
4527 IS_SET_DEST is true if X is the destination of a SET, which is not
4528 appropriate to be replaced by a constant.
4530 INSN, if nonzero, is the insn in which we do the reload. It is used
4531 to determine if we may generate output reloads, and where to put USEs
4532 for pseudos that we have to replace with stack slots.
4534 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4535 result of find_reloads_address. */
4538 find_reloads_toplev (rtx x, int opnum, enum reload_type type,
4539 int ind_levels, int is_set_dest, rtx insn,
4540 int *address_reloaded)
4542 RTX_CODE code = GET_CODE (x);
4544 const char *fmt = GET_RTX_FORMAT (code);
4550 /* This code is duplicated for speed in find_reloads. */
4551 int regno = REGNO (x);
4552 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4553 x = reg_equiv_constant[regno];
4555 /* This creates (subreg (mem...)) which would cause an unnecessary
4556 reload of the mem. */
4557 else if (reg_equiv_mem[regno] != 0)
4558 x = reg_equiv_mem[regno];
4560 else if (reg_equiv_memory_loc[regno]
4561 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4563 rtx mem = make_memloc (x, regno);
4564 if (reg_equiv_address[regno]
4565 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4567 /* If this is not a toplevel operand, find_reloads doesn't see
4568 this substitution. We have to emit a USE of the pseudo so
4569 that delete_output_reload can see it. */
4570 if (replace_reloads && recog_data.operand[opnum] != x)
4571 /* We mark the USE with QImode so that we recognize it
4572 as one that can be safely deleted at the end of
4574 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4577 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4578 opnum, type, ind_levels, insn);
4579 if (!rtx_equal_p (x, mem))
4580 push_reg_equiv_alt_mem (regno, x);
4581 if (address_reloaded)
4582 *address_reloaded = i;
4591 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4592 opnum, type, ind_levels, insn);
4593 if (address_reloaded)
4594 *address_reloaded = i;
4599 if (code == SUBREG && REG_P (SUBREG_REG (x)))
4601 /* Check for SUBREG containing a REG that's equivalent to a
4602 constant. If the constant has a known value, truncate it
4603 right now. Similarly if we are extracting a single-word of a
4604 multi-word constant. If the constant is symbolic, allow it
4605 to be substituted normally. push_reload will strip the
4606 subreg later. The constant must not be VOIDmode, because we
4607 will lose the mode of the register (this should never happen
4608 because one of the cases above should handle it). */
4610 int regno = REGNO (SUBREG_REG (x));
4613 if (subreg_lowpart_p (x)
4614 && regno >= FIRST_PSEUDO_REGISTER
4615 && reg_renumber[regno] < 0
4616 && reg_equiv_constant[regno] != 0
4617 && (tem = gen_lowpart_common (GET_MODE (x),
4618 reg_equiv_constant[regno])) != 0)
4621 if (regno >= FIRST_PSEUDO_REGISTER
4622 && reg_renumber[regno] < 0
4623 && reg_equiv_constant[regno] != 0)
4626 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4627 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4632 /* If the subreg contains a reg that will be converted to a mem,
4633 convert the subreg to a narrower memref now.
4634 Otherwise, we would get (subreg (mem ...) ...),
4635 which would force reload of the mem.
4637 We also need to do this if there is an equivalent MEM that is
4638 not offsettable. In that case, alter_subreg would produce an
4639 invalid address on big-endian machines.
4641 For machines that extend byte loads, we must not reload using
4642 a wider mode if we have a paradoxical SUBREG. find_reloads will
4643 force a reload in that case. So we should not do anything here. */
4645 if (regno >= FIRST_PSEUDO_REGISTER
4646 #ifdef LOAD_EXTEND_OP
4647 && (GET_MODE_SIZE (GET_MODE (x))
4648 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4650 && (reg_equiv_address[regno] != 0
4651 || (reg_equiv_mem[regno] != 0
4652 && (! strict_memory_address_p (GET_MODE (x),
4653 XEXP (reg_equiv_mem[regno], 0))
4654 || ! offsettable_memref_p (reg_equiv_mem[regno])
4655 || num_not_at_initial_offset))))
4656 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4660 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4664 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4665 ind_levels, is_set_dest, insn,
4667 /* If we have replaced a reg with it's equivalent memory loc -
4668 that can still be handled here e.g. if it's in a paradoxical
4669 subreg - we must make the change in a copy, rather than using
4670 a destructive change. This way, find_reloads can still elect
4671 not to do the change. */
4672 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4674 x = shallow_copy_rtx (x);
4677 XEXP (x, i) = new_part;
4683 /* Return a mem ref for the memory equivalent of reg REGNO.
4684 This mem ref is not shared with anything. */
4687 make_memloc (rtx ad, int regno)
4689 /* We must rerun eliminate_regs, in case the elimination
4690 offsets have changed. */
4692 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4694 /* If TEM might contain a pseudo, we must copy it to avoid
4695 modifying it when we do the substitution for the reload. */
4696 if (rtx_varies_p (tem, 0))
4697 tem = copy_rtx (tem);
4699 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4700 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4702 /* Copy the result if it's still the same as the equivalence, to avoid
4703 modifying it when we do the substitution for the reload. */
4704 if (tem == reg_equiv_memory_loc[regno])
4705 tem = copy_rtx (tem);
4709 /* Returns true if AD could be turned into a valid memory reference
4710 to mode MODE by reloading the part pointed to by PART into a
4714 maybe_memory_address_p (enum machine_mode mode, rtx ad, rtx *part)
4718 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4721 retv = memory_address_p (mode, ad);
4727 /* Record all reloads needed for handling memory address AD
4728 which appears in *LOC in a memory reference to mode MODE
4729 which itself is found in location *MEMREFLOC.
4730 Note that we take shortcuts assuming that no multi-reg machine mode
4731 occurs as part of an address.
4733 OPNUM and TYPE specify the purpose of this reload.
4735 IND_LEVELS says how many levels of indirect addressing this machine
4738 INSN, if nonzero, is the insn in which we do the reload. It is used
4739 to determine if we may generate output reloads, and where to put USEs
4740 for pseudos that we have to replace with stack slots.
4742 Value is one if this address is reloaded or replaced as a whole; it is
4743 zero if the top level of this address was not reloaded or replaced, and
4744 it is -1 if it may or may not have been reloaded or replaced.
4746 Note that there is no verification that the address will be valid after
4747 this routine does its work. Instead, we rely on the fact that the address
4748 was valid when reload started. So we need only undo things that reload
4749 could have broken. These are wrong register types, pseudos not allocated
4750 to a hard register, and frame pointer elimination. */
4753 find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad,
4754 rtx *loc, int opnum, enum reload_type type,
4755 int ind_levels, rtx insn)
4758 int removed_and = 0;
4762 /* If the address is a register, see if it is a legitimate address and
4763 reload if not. We first handle the cases where we need not reload
4764 or where we must reload in a non-standard way. */
4770 /* If the register is equivalent to an invariant expression, substitute
4771 the invariant, and eliminate any eliminable register references. */
4772 tem = reg_equiv_constant[regno];
4774 && (tem = eliminate_regs (tem, mode, insn))
4775 && strict_memory_address_p (mode, tem))
4781 tem = reg_equiv_memory_loc[regno];
4784 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4786 tem = make_memloc (ad, regno);
4787 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4791 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4792 &XEXP (tem, 0), opnum,
4793 ADDR_TYPE (type), ind_levels, insn);
4794 if (!rtx_equal_p (tem, orig))
4795 push_reg_equiv_alt_mem (regno, tem);
4797 /* We can avoid a reload if the register's equivalent memory
4798 expression is valid as an indirect memory address.
4799 But not all addresses are valid in a mem used as an indirect
4800 address: only reg or reg+constant. */
4803 && strict_memory_address_p (mode, tem)
4804 && (REG_P (XEXP (tem, 0))
4805 || (GET_CODE (XEXP (tem, 0)) == PLUS
4806 && REG_P (XEXP (XEXP (tem, 0), 0))
4807 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4809 /* TEM is not the same as what we'll be replacing the
4810 pseudo with after reload, put a USE in front of INSN
4811 in the final reload pass. */
4813 && num_not_at_initial_offset
4814 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4817 /* We mark the USE with QImode so that we
4818 recognize it as one that can be safely
4819 deleted at the end of reload. */
4820 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4823 /* This doesn't really count as replacing the address
4824 as a whole, since it is still a memory access. */
4832 /* The only remaining case where we can avoid a reload is if this is a
4833 hard register that is valid as a base register and which is not the
4834 subject of a CLOBBER in this insn. */
4836 else if (regno < FIRST_PSEUDO_REGISTER
4837 && regno_ok_for_base_p (regno, mode, MEM, SCRATCH)
4838 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4841 /* If we do not have one of the cases above, we must do the reload. */
4842 push_reload (ad, NULL_RTX, loc, (rtx*) 0, base_reg_class (mode, MEM, SCRATCH),
4843 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4847 if (strict_memory_address_p (mode, ad))
4849 /* The address appears valid, so reloads are not needed.
4850 But the address may contain an eliminable register.
4851 This can happen because a machine with indirect addressing
4852 may consider a pseudo register by itself a valid address even when
4853 it has failed to get a hard reg.
4854 So do a tree-walk to find and eliminate all such regs. */
4856 /* But first quickly dispose of a common case. */
4857 if (GET_CODE (ad) == PLUS
4858 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4859 && REG_P (XEXP (ad, 0))
4860 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4863 subst_reg_equivs_changed = 0;
4864 *loc = subst_reg_equivs (ad, insn);
4866 if (! subst_reg_equivs_changed)
4869 /* Check result for validity after substitution. */
4870 if (strict_memory_address_p (mode, ad))
4874 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4879 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4884 *memrefloc = copy_rtx (*memrefloc);
4885 XEXP (*memrefloc, 0) = ad;
4886 move_replacements (&ad, &XEXP (*memrefloc, 0));
4892 /* The address is not valid. We have to figure out why. First see if
4893 we have an outer AND and remove it if so. Then analyze what's inside. */
4895 if (GET_CODE (ad) == AND)
4898 loc = &XEXP (ad, 0);
4902 /* One possibility for why the address is invalid is that it is itself
4903 a MEM. This can happen when the frame pointer is being eliminated, a
4904 pseudo is not allocated to a hard register, and the offset between the
4905 frame and stack pointers is not its initial value. In that case the
4906 pseudo will have been replaced by a MEM referring to the
4910 /* First ensure that the address in this MEM is valid. Then, unless
4911 indirect addresses are valid, reload the MEM into a register. */
4913 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4914 opnum, ADDR_TYPE (type),
4915 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4917 /* If tem was changed, then we must create a new memory reference to
4918 hold it and store it back into memrefloc. */
4919 if (tem != ad && memrefloc)
4921 *memrefloc = copy_rtx (*memrefloc);
4922 copy_replacements (tem, XEXP (*memrefloc, 0));
4923 loc = &XEXP (*memrefloc, 0);
4925 loc = &XEXP (*loc, 0);
4928 /* Check similar cases as for indirect addresses as above except
4929 that we can allow pseudos and a MEM since they should have been
4930 taken care of above. */
4933 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4934 || MEM_P (XEXP (tem, 0))
4935 || ! (REG_P (XEXP (tem, 0))
4936 || (GET_CODE (XEXP (tem, 0)) == PLUS
4937 && REG_P (XEXP (XEXP (tem, 0), 0))
4938 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4940 /* Must use TEM here, not AD, since it is the one that will
4941 have any subexpressions reloaded, if needed. */
4942 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
4943 base_reg_class (mode, MEM, SCRATCH), GET_MODE (tem),
4946 return ! removed_and;
4952 /* If we have address of a stack slot but it's not valid because the
4953 displacement is too large, compute the sum in a register.
4954 Handle all base registers here, not just fp/ap/sp, because on some
4955 targets (namely SH) we can also get too large displacements from
4956 big-endian corrections. */
4957 else if (GET_CODE (ad) == PLUS
4958 && REG_P (XEXP (ad, 0))
4959 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4960 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4961 && regno_ok_for_base_p (REGNO (XEXP (ad, 0)), mode, PLUS,
4965 /* Unshare the MEM rtx so we can safely alter it. */
4968 *memrefloc = copy_rtx (*memrefloc);
4969 loc = &XEXP (*memrefloc, 0);
4971 loc = &XEXP (*loc, 0);
4974 if (double_reg_address_ok)
4976 /* Unshare the sum as well. */
4977 *loc = ad = copy_rtx (ad);
4979 /* Reload the displacement into an index reg.
4980 We assume the frame pointer or arg pointer is a base reg. */
4981 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4982 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4988 /* If the sum of two regs is not necessarily valid,
4989 reload the sum into a base reg.
4990 That will at least work. */
4991 find_reloads_address_part (ad, loc,
4992 base_reg_class (mode, MEM, SCRATCH),
4993 Pmode, opnum, type, ind_levels);
4995 return ! removed_and;
4998 /* If we have an indexed stack slot, there are three possible reasons why
4999 it might be invalid: The index might need to be reloaded, the address
5000 might have been made by frame pointer elimination and hence have a
5001 constant out of range, or both reasons might apply.
5003 We can easily check for an index needing reload, but even if that is the
5004 case, we might also have an invalid constant. To avoid making the
5005 conservative assumption and requiring two reloads, we see if this address
5006 is valid when not interpreted strictly. If it is, the only problem is
5007 that the index needs a reload and find_reloads_address_1 will take care
5010 Handle all base registers here, not just fp/ap/sp, because on some
5011 targets (namely SPARC) we can also get invalid addresses from preventive
5012 subreg big-endian corrections made by find_reloads_toplev. We
5013 can also get expressions involving LO_SUM (rather than PLUS) from
5014 find_reloads_subreg_address.
5016 If we decide to do something, it must be that `double_reg_address_ok'
5017 is true. We generate a reload of the base register + constant and
5018 rework the sum so that the reload register will be added to the index.
5019 This is safe because we know the address isn't shared.
5021 We check for the base register as both the first and second operand of
5022 the innermost PLUS and/or LO_SUM. */
5024 for (op_index = 0; op_index < 2; ++op_index)
5026 rtx operand, addend;
5027 enum rtx_code inner_code;
5029 if (GET_CODE (ad) != PLUS)
5032 inner_code = GET_CODE (XEXP (ad, 0));
5033 if (!(GET_CODE (ad) == PLUS
5034 && GET_CODE (XEXP (ad, 1)) == CONST_INT
5035 && (inner_code == PLUS || inner_code == LO_SUM)))
5038 operand = XEXP (XEXP (ad, 0), op_index);
5039 if (!REG_P (operand) || REGNO (operand) >= FIRST_PSEUDO_REGISTER)
5042 addend = XEXP (XEXP (ad, 0), 1 - op_index);
5044 if ((regno_ok_for_base_p (REGNO (operand), mode, inner_code,
5046 || operand == frame_pointer_rtx
5047 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
5048 || operand == hard_frame_pointer_rtx
5050 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
5051 || operand == arg_pointer_rtx
5053 || operand == stack_pointer_rtx)
5054 && ! maybe_memory_address_p (mode, ad,
5055 &XEXP (XEXP (ad, 0), 1 - op_index)))
5060 offset_reg = plus_constant (operand, INTVAL (XEXP (ad, 1)));
5062 /* Form the adjusted address. */
5063 if (GET_CODE (XEXP (ad, 0)) == PLUS)
5064 ad = gen_rtx_PLUS (GET_MODE (ad),
5065 op_index == 0 ? offset_reg : addend,
5066 op_index == 0 ? addend : offset_reg);
5068 ad = gen_rtx_LO_SUM (GET_MODE (ad),
5069 op_index == 0 ? offset_reg : addend,
5070 op_index == 0 ? addend : offset_reg);
5073 cls = base_reg_class (mode, MEM, GET_CODE (addend));
5074 find_reloads_address_part (XEXP (ad, op_index),
5075 &XEXP (ad, op_index), cls,
5076 GET_MODE (ad), opnum, type, ind_levels);
5077 find_reloads_address_1 (mode,
5078 XEXP (ad, 1 - op_index), 1, GET_CODE (ad),
5079 GET_CODE (XEXP (ad, op_index)),
5080 &XEXP (ad, 1 - op_index), opnum,
5087 /* See if address becomes valid when an eliminable register
5088 in a sum is replaced. */
5091 if (GET_CODE (ad) == PLUS)
5092 tem = subst_indexed_address (ad);
5093 if (tem != ad && strict_memory_address_p (mode, tem))
5095 /* Ok, we win that way. Replace any additional eliminable
5098 subst_reg_equivs_changed = 0;
5099 tem = subst_reg_equivs (tem, insn);
5101 /* Make sure that didn't make the address invalid again. */
5103 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
5110 /* If constants aren't valid addresses, reload the constant address
5112 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
5114 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5115 Unshare it so we can safely alter it. */
5116 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
5117 && CONSTANT_POOL_ADDRESS_P (ad))
5119 *memrefloc = copy_rtx (*memrefloc);
5120 loc = &XEXP (*memrefloc, 0);
5122 loc = &XEXP (*loc, 0);
5125 find_reloads_address_part (ad, loc, base_reg_class (mode, MEM, SCRATCH),
5126 Pmode, opnum, type, ind_levels);
5127 return ! removed_and;
5130 return find_reloads_address_1 (mode, ad, 0, MEM, SCRATCH, loc, opnum, type,
5134 /* Find all pseudo regs appearing in AD
5135 that are eliminable in favor of equivalent values
5136 and do not have hard regs; replace them by their equivalents.
5137 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5138 front of it for pseudos that we have to replace with stack slots. */
5141 subst_reg_equivs (rtx ad, rtx insn)
5143 RTX_CODE code = GET_CODE (ad);
5162 int regno = REGNO (ad);
5164 if (reg_equiv_constant[regno] != 0)
5166 subst_reg_equivs_changed = 1;
5167 return reg_equiv_constant[regno];
5169 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
5171 rtx mem = make_memloc (ad, regno);
5172 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
5174 subst_reg_equivs_changed = 1;
5175 /* We mark the USE with QImode so that we recognize it
5176 as one that can be safely deleted at the end of
5178 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5187 /* Quickly dispose of a common case. */
5188 if (XEXP (ad, 0) == frame_pointer_rtx
5189 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
5197 fmt = GET_RTX_FORMAT (code);
5198 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5200 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5204 /* Compute the sum of X and Y, making canonicalizations assumed in an
5205 address, namely: sum constant integers, surround the sum of two
5206 constants with a CONST, put the constant as the second operand, and
5207 group the constant on the outermost sum.
5209 This routine assumes both inputs are already in canonical form. */
5212 form_sum (rtx x, rtx y)
5215 enum machine_mode mode = GET_MODE (x);
5217 if (mode == VOIDmode)
5218 mode = GET_MODE (y);
5220 if (mode == VOIDmode)
5223 if (GET_CODE (x) == CONST_INT)
5224 return plus_constant (y, INTVAL (x));
5225 else if (GET_CODE (y) == CONST_INT)
5226 return plus_constant (x, INTVAL (y));
5227 else if (CONSTANT_P (x))
5228 tem = x, x = y, y = tem;
5230 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5231 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5233 /* Note that if the operands of Y are specified in the opposite
5234 order in the recursive calls below, infinite recursion will occur. */
5235 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5236 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5238 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5239 constant will have been placed second. */
5240 if (CONSTANT_P (x) && CONSTANT_P (y))
5242 if (GET_CODE (x) == CONST)
5244 if (GET_CODE (y) == CONST)
5247 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5250 return gen_rtx_PLUS (mode, x, y);
5253 /* If ADDR is a sum containing a pseudo register that should be
5254 replaced with a constant (from reg_equiv_constant),
5255 return the result of doing so, and also apply the associative
5256 law so that the result is more likely to be a valid address.
5257 (But it is not guaranteed to be one.)
5259 Note that at most one register is replaced, even if more are
5260 replaceable. Also, we try to put the result into a canonical form
5261 so it is more likely to be a valid address.
5263 In all other cases, return ADDR. */
5266 subst_indexed_address (rtx addr)
5268 rtx op0 = 0, op1 = 0, op2 = 0;
5272 if (GET_CODE (addr) == PLUS)
5274 /* Try to find a register to replace. */
5275 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5277 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5278 && reg_renumber[regno] < 0
5279 && reg_equiv_constant[regno] != 0)
5280 op0 = reg_equiv_constant[regno];
5281 else if (REG_P (op1)
5282 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5283 && reg_renumber[regno] < 0
5284 && reg_equiv_constant[regno] != 0)
5285 op1 = reg_equiv_constant[regno];
5286 else if (GET_CODE (op0) == PLUS
5287 && (tem = subst_indexed_address (op0)) != op0)
5289 else if (GET_CODE (op1) == PLUS
5290 && (tem = subst_indexed_address (op1)) != op1)
5295 /* Pick out up to three things to add. */
5296 if (GET_CODE (op1) == PLUS)
5297 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5298 else if (GET_CODE (op0) == PLUS)
5299 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5301 /* Compute the sum. */
5303 op1 = form_sum (op1, op2);
5305 op0 = form_sum (op0, op1);
5312 /* Update the REG_INC notes for an insn. It updates all REG_INC
5313 notes for the instruction which refer to REGNO the to refer
5314 to the reload number.
5316 INSN is the insn for which any REG_INC notes need updating.
5318 REGNO is the register number which has been reloaded.
5320 RELOADNUM is the reload number. */
5323 update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
5324 int reloadnum ATTRIBUTE_UNUSED)
5329 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5330 if (REG_NOTE_KIND (link) == REG_INC
5331 && (int) REGNO (XEXP (link, 0)) == regno)
5332 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5336 /* Record the pseudo registers we must reload into hard registers in a
5337 subexpression of a would-be memory address, X referring to a value
5338 in mode MODE. (This function is not called if the address we find
5341 CONTEXT = 1 means we are considering regs as index regs,
5342 = 0 means we are considering them as base regs.
5343 OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5345 If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5346 is the code of the index part of the address. Otherwise, pass SCRATCH
5348 OPNUM and TYPE specify the purpose of any reloads made.
5350 IND_LEVELS says how many levels of indirect addressing are
5351 supported at this point in the address.
5353 INSN, if nonzero, is the insn in which we do the reload. It is used
5354 to determine if we may generate output reloads.
5356 We return nonzero if X, as a whole, is reloaded or replaced. */
5358 /* Note that we take shortcuts assuming that no multi-reg machine mode
5359 occurs as part of an address.
5360 Also, this is not fully machine-customizable; it works for machines
5361 such as VAXen and 68000's and 32000's, but other possible machines
5362 could have addressing modes that this does not handle right.
5363 If you add push_reload calls here, you need to make sure gen_reload
5364 handles those cases gracefully. */
5367 find_reloads_address_1 (enum machine_mode mode, rtx x, int context,
5368 enum rtx_code outer_code, enum rtx_code index_code,
5369 rtx *loc, int opnum, enum reload_type type,
5370 int ind_levels, rtx insn)
5372 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, OUTER, INDEX) \
5374 ? regno_ok_for_base_p (REGNO, MODE, OUTER, INDEX) \
5375 : REGNO_OK_FOR_INDEX_P (REGNO))
5377 enum reg_class context_reg_class;
5378 RTX_CODE code = GET_CODE (x);
5381 context_reg_class = INDEX_REG_CLASS;
5383 context_reg_class = base_reg_class (mode, outer_code, index_code);
5389 rtx orig_op0 = XEXP (x, 0);
5390 rtx orig_op1 = XEXP (x, 1);
5391 RTX_CODE code0 = GET_CODE (orig_op0);
5392 RTX_CODE code1 = GET_CODE (orig_op1);
5396 if (GET_CODE (op0) == SUBREG)
5398 op0 = SUBREG_REG (op0);
5399 code0 = GET_CODE (op0);
5400 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5401 op0 = gen_rtx_REG (word_mode,
5403 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5404 GET_MODE (SUBREG_REG (orig_op0)),
5405 SUBREG_BYTE (orig_op0),
5406 GET_MODE (orig_op0))));
5409 if (GET_CODE (op1) == SUBREG)
5411 op1 = SUBREG_REG (op1);
5412 code1 = GET_CODE (op1);
5413 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5414 /* ??? Why is this given op1's mode and above for
5415 ??? op0 SUBREGs we use word_mode? */
5416 op1 = gen_rtx_REG (GET_MODE (op1),
5418 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5419 GET_MODE (SUBREG_REG (orig_op1)),
5420 SUBREG_BYTE (orig_op1),
5421 GET_MODE (orig_op1))));
5423 /* Plus in the index register may be created only as a result of
5424 register rematerialization for expression like &localvar*4. Reload it.
5425 It may be possible to combine the displacement on the outer level,
5426 but it is probably not worthwhile to do so. */
5429 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5430 opnum, ADDR_TYPE (type), ind_levels, insn);
5431 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5433 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5437 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5438 || code0 == ZERO_EXTEND || code1 == MEM)
5440 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5441 &XEXP (x, 0), opnum, type, ind_levels,
5443 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5444 &XEXP (x, 1), opnum, type, ind_levels,
5448 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5449 || code1 == ZERO_EXTEND || code0 == MEM)
5451 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5452 &XEXP (x, 0), opnum, type, ind_levels,
5454 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5455 &XEXP (x, 1), opnum, type, ind_levels,
5459 else if (code0 == CONST_INT || code0 == CONST
5460 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5461 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5462 &XEXP (x, 1), opnum, type, ind_levels,
5465 else if (code1 == CONST_INT || code1 == CONST
5466 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5467 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5468 &XEXP (x, 0), opnum, type, ind_levels,
5471 else if (code0 == REG && code1 == REG)
5473 if (REGNO_OK_FOR_INDEX_P (REGNO (op0))
5474 && regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5476 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1))
5477 && regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5479 else if (regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5480 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5481 &XEXP (x, 0), opnum, type, ind_levels,
5483 else if (regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5484 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5485 &XEXP (x, 1), opnum, type, ind_levels,
5487 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1)))
5488 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5489 &XEXP (x, 0), opnum, type, ind_levels,
5491 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0)))
5492 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5493 &XEXP (x, 1), opnum, type, ind_levels,
5497 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5498 &XEXP (x, 0), opnum, type, ind_levels,
5500 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5501 &XEXP (x, 1), opnum, type, ind_levels,
5506 else if (code0 == REG)
5508 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5509 &XEXP (x, 0), opnum, type, ind_levels,
5511 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5512 &XEXP (x, 1), opnum, type, ind_levels,
5516 else if (code1 == REG)
5518 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5519 &XEXP (x, 1), opnum, type, ind_levels,
5521 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5522 &XEXP (x, 0), opnum, type, ind_levels,
5532 rtx op0 = XEXP (x, 0);
5533 rtx op1 = XEXP (x, 1);
5534 enum rtx_code index_code;
5538 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5541 /* Currently, we only support {PRE,POST}_MODIFY constructs
5542 where a base register is {inc,dec}remented by the contents
5543 of another register or by a constant value. Thus, these
5544 operands must match. */
5545 gcc_assert (op0 == XEXP (op1, 0));
5547 /* Require index register (or constant). Let's just handle the
5548 register case in the meantime... If the target allows
5549 auto-modify by a constant then we could try replacing a pseudo
5550 register with its equivalent constant where applicable.
5552 We also handle the case where the register was eliminated
5553 resulting in a PLUS subexpression.
5555 If we later decide to reload the whole PRE_MODIFY or
5556 POST_MODIFY, inc_for_reload might clobber the reload register
5557 before reading the index. The index register might therefore
5558 need to live longer than a TYPE reload normally would, so be
5559 conservative and class it as RELOAD_OTHER. */
5560 if ((REG_P (XEXP (op1, 1))
5561 && !REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5562 || GET_CODE (XEXP (op1, 1)) == PLUS)
5563 find_reloads_address_1 (mode, XEXP (op1, 1), 1, code, SCRATCH,
5564 &XEXP (op1, 1), opnum, RELOAD_OTHER,
5567 gcc_assert (REG_P (XEXP (op1, 0)));
5569 regno = REGNO (XEXP (op1, 0));
5570 index_code = GET_CODE (XEXP (op1, 1));
5572 /* A register that is incremented cannot be constant! */
5573 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5574 || reg_equiv_constant[regno] == 0);
5576 /* Handle a register that is equivalent to a memory location
5577 which cannot be addressed directly. */
5578 if (reg_equiv_memory_loc[regno] != 0
5579 && (reg_equiv_address[regno] != 0
5580 || num_not_at_initial_offset))
5582 rtx tem = make_memloc (XEXP (x, 0), regno);
5584 if (reg_equiv_address[regno]
5585 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5589 /* First reload the memory location's address.
5590 We can't use ADDR_TYPE (type) here, because we need to
5591 write back the value after reading it, hence we actually
5592 need two registers. */
5593 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5594 &XEXP (tem, 0), opnum,
5598 if (!rtx_equal_p (tem, orig))
5599 push_reg_equiv_alt_mem (regno, tem);
5601 /* Then reload the memory location into a base
5603 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5605 base_reg_class (mode, code,
5607 GET_MODE (x), GET_MODE (x), 0,
5608 0, opnum, RELOAD_OTHER);
5610 update_auto_inc_notes (this_insn, regno, reloadnum);
5615 if (reg_renumber[regno] >= 0)
5616 regno = reg_renumber[regno];
5618 /* We require a base register here... */
5619 if (!regno_ok_for_base_p (regno, GET_MODE (x), code, index_code))
5621 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5622 &XEXP (op1, 0), &XEXP (x, 0),
5623 base_reg_class (mode, code, index_code),
5624 GET_MODE (x), GET_MODE (x), 0, 0,
5625 opnum, RELOAD_OTHER);
5627 update_auto_inc_notes (this_insn, regno, reloadnum);
5637 if (REG_P (XEXP (x, 0)))
5639 int regno = REGNO (XEXP (x, 0));
5643 /* A register that is incremented cannot be constant! */
5644 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5645 || reg_equiv_constant[regno] == 0);
5647 /* Handle a register that is equivalent to a memory location
5648 which cannot be addressed directly. */
5649 if (reg_equiv_memory_loc[regno] != 0
5650 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5652 rtx tem = make_memloc (XEXP (x, 0), regno);
5653 if (reg_equiv_address[regno]
5654 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5658 /* First reload the memory location's address.
5659 We can't use ADDR_TYPE (type) here, because we need to
5660 write back the value after reading it, hence we actually
5661 need two registers. */
5662 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5663 &XEXP (tem, 0), opnum, type,
5665 if (!rtx_equal_p (tem, orig))
5666 push_reg_equiv_alt_mem (regno, tem);
5667 /* Put this inside a new increment-expression. */
5668 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5669 /* Proceed to reload that, as if it contained a register. */
5673 /* If we have a hard register that is ok as an index,
5674 don't make a reload. If an autoincrement of a nice register
5675 isn't "valid", it must be that no autoincrement is "valid".
5676 If that is true and something made an autoincrement anyway,
5677 this must be a special context where one is allowed.
5678 (For example, a "push" instruction.)
5679 We can't improve this address, so leave it alone. */
5681 /* Otherwise, reload the autoincrement into a suitable hard reg
5682 and record how much to increment by. */
5684 if (reg_renumber[regno] >= 0)
5685 regno = reg_renumber[regno];
5686 if (regno >= FIRST_PSEUDO_REGISTER
5687 || !REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5692 /* If we can output the register afterwards, do so, this
5693 saves the extra update.
5694 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5695 CALL_INSN - and it does not set CC0.
5696 But don't do this if we cannot directly address the
5697 memory location, since this will make it harder to
5698 reuse address reloads, and increases register pressure.
5699 Also don't do this if we can probably update x directly. */
5700 rtx equiv = (MEM_P (XEXP (x, 0))
5702 : reg_equiv_mem[regno]);
5703 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5704 if (insn && NONJUMP_INSN_P (insn) && equiv
5705 && memory_operand (equiv, GET_MODE (equiv))
5707 && ! sets_cc0_p (PATTERN (insn))
5709 && ! (icode != CODE_FOR_nothing
5710 && ((*insn_data[icode].operand[0].predicate)
5712 && ((*insn_data[icode].operand[1].predicate)
5715 /* We use the original pseudo for loc, so that
5716 emit_reload_insns() knows which pseudo this
5717 reload refers to and updates the pseudo rtx, not
5718 its equivalent memory location, as well as the
5719 corresponding entry in reg_last_reload_reg. */
5720 loc = &XEXP (x_orig, 0);
5723 = push_reload (x, x, loc, loc,
5725 GET_MODE (x), GET_MODE (x), 0, 0,
5726 opnum, RELOAD_OTHER);
5731 = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5733 GET_MODE (x), GET_MODE (x), 0, 0,
5736 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5741 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5751 /* Look for parts to reload in the inner expression and reload them
5752 too, in addition to this operation. Reloading all inner parts in
5753 addition to this one shouldn't be necessary, but at this point,
5754 we don't know if we can possibly omit any part that *can* be
5755 reloaded. Targets that are better off reloading just either part
5756 (or perhaps even a different part of an outer expression), should
5757 define LEGITIMIZE_RELOAD_ADDRESS. */
5758 find_reloads_address_1 (GET_MODE (XEXP (x, 0)), XEXP (x, 0),
5759 context, code, SCRATCH, &XEXP (x, 0), opnum,
5760 type, ind_levels, insn);
5761 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5763 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5767 /* This is probably the result of a substitution, by eliminate_regs, of
5768 an equivalent address for a pseudo that was not allocated to a hard
5769 register. Verify that the specified address is valid and reload it
5772 Since we know we are going to reload this item, don't decrement for
5773 the indirection level.
5775 Note that this is actually conservative: it would be slightly more
5776 efficient to use the value of SPILL_INDIRECT_LEVELS from
5779 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5780 opnum, ADDR_TYPE (type), ind_levels, insn);
5781 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5783 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5788 int regno = REGNO (x);
5790 if (reg_equiv_constant[regno] != 0)
5792 find_reloads_address_part (reg_equiv_constant[regno], loc,
5794 GET_MODE (x), opnum, type, ind_levels);
5798 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5799 that feeds this insn. */
5800 if (reg_equiv_mem[regno] != 0)
5802 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
5804 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5809 if (reg_equiv_memory_loc[regno]
5810 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5812 rtx tem = make_memloc (x, regno);
5813 if (reg_equiv_address[regno] != 0
5814 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5817 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5818 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5820 if (!rtx_equal_p (x, tem))
5821 push_reg_equiv_alt_mem (regno, x);
5825 if (reg_renumber[regno] >= 0)
5826 regno = reg_renumber[regno];
5828 if (regno >= FIRST_PSEUDO_REGISTER
5829 || !REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5832 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5834 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5838 /* If a register appearing in an address is the subject of a CLOBBER
5839 in this insn, reload it into some other register to be safe.
5840 The CLOBBER is supposed to make the register unavailable
5841 from before this insn to after it. */
5842 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5844 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5846 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5853 if (REG_P (SUBREG_REG (x)))
5855 /* If this is a SUBREG of a hard register and the resulting register
5856 is of the wrong class, reload the whole SUBREG. This avoids
5857 needless copies if SUBREG_REG is multi-word. */
5858 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5860 int regno ATTRIBUTE_UNUSED = subreg_regno (x);
5862 if (!REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5865 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5867 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5871 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5872 is larger than the class size, then reload the whole SUBREG. */
5875 enum reg_class class = context_reg_class;
5876 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5877 > reg_class_size[class])
5879 x = find_reloads_subreg_address (x, 0, opnum,
5882 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5883 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5895 const char *fmt = GET_RTX_FORMAT (code);
5898 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5901 /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
5903 find_reloads_address_1 (mode, XEXP (x, i), context, code, SCRATCH,
5904 &XEXP (x, i), opnum, type, ind_levels, insn);
5908 #undef REG_OK_FOR_CONTEXT
5912 /* X, which is found at *LOC, is a part of an address that needs to be
5913 reloaded into a register of class CLASS. If X is a constant, or if
5914 X is a PLUS that contains a constant, check that the constant is a
5915 legitimate operand and that we are supposed to be able to load
5916 it into the register.
5918 If not, force the constant into memory and reload the MEM instead.
5920 MODE is the mode to use, in case X is an integer constant.
5922 OPNUM and TYPE describe the purpose of any reloads made.
5924 IND_LEVELS says how many levels of indirect addressing this machine
5928 find_reloads_address_part (rtx x, rtx *loc, enum reg_class class,
5929 enum machine_mode mode, int opnum,
5930 enum reload_type type, int ind_levels)
5933 && (! LEGITIMATE_CONSTANT_P (x)
5934 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5938 tem = x = force_const_mem (mode, x);
5939 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5940 opnum, type, ind_levels, 0);
5943 else if (GET_CODE (x) == PLUS
5944 && CONSTANT_P (XEXP (x, 1))
5945 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5946 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5950 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5951 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5952 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5953 opnum, type, ind_levels, 0);
5956 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5957 mode, VOIDmode, 0, 0, opnum, type);
5960 /* X, a subreg of a pseudo, is a part of an address that needs to be
5963 If the pseudo is equivalent to a memory location that cannot be directly
5964 addressed, make the necessary address reloads.
5966 If address reloads have been necessary, or if the address is changed
5967 by register elimination, return the rtx of the memory location;
5968 otherwise, return X.
5970 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5973 OPNUM and TYPE identify the purpose of the reload.
5975 IND_LEVELS says how many levels of indirect addressing are
5976 supported at this point in the address.
5978 INSN, if nonzero, is the insn in which we do the reload. It is used
5979 to determine where to put USEs for pseudos that we have to replace with
5983 find_reloads_subreg_address (rtx x, int force_replace, int opnum,
5984 enum reload_type type, int ind_levels, rtx insn)
5986 int regno = REGNO (SUBREG_REG (x));
5988 if (reg_equiv_memory_loc[regno])
5990 /* If the address is not directly addressable, or if the address is not
5991 offsettable, then it must be replaced. */
5993 && (reg_equiv_address[regno]
5994 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5997 if (force_replace || num_not_at_initial_offset)
5999 rtx tem = make_memloc (SUBREG_REG (x), regno);
6001 /* If the address changes because of register elimination, then
6002 it must be replaced. */
6004 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
6006 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
6007 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
6010 enum machine_mode orig_mode = GET_MODE (orig);
6013 /* For big-endian paradoxical subregs, SUBREG_BYTE does not
6014 hold the correct (negative) byte offset. */
6015 if (BYTES_BIG_ENDIAN && outer_size > inner_size)
6016 offset = inner_size - outer_size;
6018 offset = SUBREG_BYTE (x);
6020 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
6021 PUT_MODE (tem, GET_MODE (x));
6023 /* If this was a paradoxical subreg that we replaced, the
6024 resulting memory must be sufficiently aligned to allow
6025 us to widen the mode of the memory. */
6026 if (outer_size > inner_size)
6030 base = XEXP (tem, 0);
6031 if (GET_CODE (base) == PLUS)
6033 if (GET_CODE (XEXP (base, 1)) == CONST_INT
6034 && INTVAL (XEXP (base, 1)) % outer_size != 0)
6036 base = XEXP (base, 0);
6039 || (REGNO_POINTER_ALIGN (REGNO (base))
6040 < outer_size * BITS_PER_UNIT))
6044 reloaded = find_reloads_address (GET_MODE (tem), &tem,
6045 XEXP (tem, 0), &XEXP (tem, 0),
6046 opnum, type, ind_levels, insn);
6047 /* ??? Do we need to handle nonzero offsets somehow? */
6048 if (!offset && !rtx_equal_p (tem, orig))
6049 push_reg_equiv_alt_mem (regno, tem);
6051 /* For some processors an address may be valid in the
6052 original mode but not in a smaller mode. For
6053 example, ARM accepts a scaled index register in
6054 SImode but not in HImode. find_reloads_address
6055 assumes that we pass it a valid address, and doesn't
6056 force a reload. This will probably be fine if
6057 find_reloads_address finds some reloads. But if it
6058 doesn't find any, then we may have just converted a
6059 valid address into an invalid one. Check for that
6062 && strict_memory_address_p (orig_mode, XEXP (tem, 0))
6063 && !strict_memory_address_p (GET_MODE (tem),
6065 push_reload (XEXP (tem, 0), NULL_RTX, &XEXP (tem, 0), (rtx*) 0,
6066 base_reg_class (GET_MODE (tem), MEM, SCRATCH),
6067 GET_MODE (XEXP (tem, 0)), VOIDmode, 0, 0,
6070 /* If this is not a toplevel operand, find_reloads doesn't see
6071 this substitution. We have to emit a USE of the pseudo so
6072 that delete_output_reload can see it. */
6073 if (replace_reloads && recog_data.operand[opnum] != x)
6074 /* We mark the USE with QImode so that we recognize it
6075 as one that can be safely deleted at the end of
6077 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
6087 /* Substitute into the current INSN the registers into which we have reloaded
6088 the things that need reloading. The array `replacements'
6089 contains the locations of all pointers that must be changed
6090 and says what to replace them with.
6092 Return the rtx that X translates into; usually X, but modified. */
6095 subst_reloads (rtx insn)
6099 for (i = 0; i < n_replacements; i++)
6101 struct replacement *r = &replacements[i];
6102 rtx reloadreg = rld[r->what].reg_rtx;
6105 #ifdef ENABLE_CHECKING
6106 /* Internal consistency test. Check that we don't modify
6107 anything in the equivalence arrays. Whenever something from
6108 those arrays needs to be reloaded, it must be unshared before
6109 being substituted into; the equivalence must not be modified.
6110 Otherwise, if the equivalence is used after that, it will
6111 have been modified, and the thing substituted (probably a
6112 register) is likely overwritten and not a usable equivalence. */
6115 for (check_regno = 0; check_regno < max_regno; check_regno++)
6117 #define CHECK_MODF(ARRAY) \
6118 gcc_assert (!ARRAY[check_regno] \
6119 || !loc_mentioned_in_p (r->where, \
6120 ARRAY[check_regno]))
6122 CHECK_MODF (reg_equiv_constant);
6123 CHECK_MODF (reg_equiv_memory_loc);
6124 CHECK_MODF (reg_equiv_address);
6125 CHECK_MODF (reg_equiv_mem);
6128 #endif /* ENABLE_CHECKING */
6130 /* If we're replacing a LABEL_REF with a register, add a
6131 REG_LABEL note to indicate to flow which label this
6132 register refers to. */
6133 if (GET_CODE (*r->where) == LABEL_REF
6136 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
6137 XEXP (*r->where, 0),
6139 JUMP_LABEL (insn) = XEXP (*r->where, 0);
6142 /* Encapsulate RELOADREG so its machine mode matches what
6143 used to be there. Note that gen_lowpart_common will
6144 do the wrong thing if RELOADREG is multi-word. RELOADREG
6145 will always be a REG here. */
6146 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
6147 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6149 /* If we are putting this into a SUBREG and RELOADREG is a
6150 SUBREG, we would be making nested SUBREGs, so we have to fix
6151 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
6153 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
6155 if (GET_MODE (*r->subreg_loc)
6156 == GET_MODE (SUBREG_REG (reloadreg)))
6157 *r->subreg_loc = SUBREG_REG (reloadreg);
6161 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
6163 /* When working with SUBREGs the rule is that the byte
6164 offset must be a multiple of the SUBREG's mode. */
6165 final_offset = (final_offset /
6166 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6167 final_offset = (final_offset *
6168 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6170 *r->where = SUBREG_REG (reloadreg);
6171 SUBREG_BYTE (*r->subreg_loc) = final_offset;
6175 *r->where = reloadreg;
6177 /* If reload got no reg and isn't optional, something's wrong. */
6179 gcc_assert (rld[r->what].optional);
6183 /* Make a copy of any replacements being done into X and move those
6184 copies to locations in Y, a copy of X. */
6187 copy_replacements (rtx x, rtx y)
6189 /* We can't support X being a SUBREG because we might then need to know its
6190 location if something inside it was replaced. */
6191 gcc_assert (GET_CODE (x) != SUBREG);
6193 copy_replacements_1 (&x, &y, n_replacements);
6197 copy_replacements_1 (rtx *px, rtx *py, int orig_replacements)
6201 struct replacement *r;
6205 for (j = 0; j < orig_replacements; j++)
6207 if (replacements[j].subreg_loc == px)
6209 r = &replacements[n_replacements++];
6210 r->where = replacements[j].where;
6212 r->what = replacements[j].what;
6213 r->mode = replacements[j].mode;
6215 else if (replacements[j].where == px)
6217 r = &replacements[n_replacements++];
6220 r->what = replacements[j].what;
6221 r->mode = replacements[j].mode;
6227 code = GET_CODE (x);
6228 fmt = GET_RTX_FORMAT (code);
6230 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6233 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6234 else if (fmt[i] == 'E')
6235 for (j = XVECLEN (x, i); --j >= 0; )
6236 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6241 /* Change any replacements being done to *X to be done to *Y. */
6244 move_replacements (rtx *x, rtx *y)
6248 for (i = 0; i < n_replacements; i++)
6249 if (replacements[i].subreg_loc == x)
6250 replacements[i].subreg_loc = y;
6251 else if (replacements[i].where == x)
6253 replacements[i].where = y;
6254 replacements[i].subreg_loc = 0;
6258 /* If LOC was scheduled to be replaced by something, return the replacement.
6259 Otherwise, return *LOC. */
6262 find_replacement (rtx *loc)
6264 struct replacement *r;
6266 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6268 rtx reloadreg = rld[r->what].reg_rtx;
6270 if (reloadreg && r->where == loc)
6272 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6273 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
6277 else if (reloadreg && r->subreg_loc == loc)
6279 /* RELOADREG must be either a REG or a SUBREG.
6281 ??? Is it actually still ever a SUBREG? If so, why? */
6283 if (REG_P (reloadreg))
6284 return gen_rtx_REG (GET_MODE (*loc),
6285 (REGNO (reloadreg) +
6286 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
6287 GET_MODE (SUBREG_REG (*loc)),
6290 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6294 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6296 /* When working with SUBREGs the rule is that the byte
6297 offset must be a multiple of the SUBREG's mode. */
6298 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6299 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6300 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6306 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6307 what's inside and make a new rtl if so. */
6308 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6309 || GET_CODE (*loc) == MULT)
6311 rtx x = find_replacement (&XEXP (*loc, 0));
6312 rtx y = find_replacement (&XEXP (*loc, 1));
6314 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6315 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6321 /* Return nonzero if register in range [REGNO, ENDREGNO)
6322 appears either explicitly or implicitly in X
6323 other than being stored into (except for earlyclobber operands).
6325 References contained within the substructure at LOC do not count.
6326 LOC may be zero, meaning don't ignore anything.
6328 This is similar to refers_to_regno_p in rtlanal.c except that we
6329 look at equivalences for pseudos that didn't get hard registers. */
6332 refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno,
6344 code = GET_CODE (x);
6351 /* If this is a pseudo, a hard register must not have been allocated.
6352 X must therefore either be a constant or be in memory. */
6353 if (r >= FIRST_PSEUDO_REGISTER)
6355 if (reg_equiv_memory_loc[r])
6356 return refers_to_regno_for_reload_p (regno, endregno,
6357 reg_equiv_memory_loc[r],
6360 gcc_assert (reg_equiv_constant[r] || reg_equiv_invariant[r]);
6364 return (endregno > r
6365 && regno < r + (r < FIRST_PSEUDO_REGISTER
6366 ? hard_regno_nregs[r][GET_MODE (x)]
6370 /* If this is a SUBREG of a hard reg, we can see exactly which
6371 registers are being modified. Otherwise, handle normally. */
6372 if (REG_P (SUBREG_REG (x))
6373 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6375 unsigned int inner_regno = subreg_regno (x);
6376 unsigned int inner_endregno
6377 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6378 ? subreg_nregs (x) : 1);
6380 return endregno > inner_regno && regno < inner_endregno;
6386 if (&SET_DEST (x) != loc
6387 /* Note setting a SUBREG counts as referring to the REG it is in for
6388 a pseudo but not for hard registers since we can
6389 treat each word individually. */
6390 && ((GET_CODE (SET_DEST (x)) == SUBREG
6391 && loc != &SUBREG_REG (SET_DEST (x))
6392 && REG_P (SUBREG_REG (SET_DEST (x)))
6393 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6394 && refers_to_regno_for_reload_p (regno, endregno,
6395 SUBREG_REG (SET_DEST (x)),
6397 /* If the output is an earlyclobber operand, this is
6399 || ((!REG_P (SET_DEST (x))
6400 || earlyclobber_operand_p (SET_DEST (x)))
6401 && refers_to_regno_for_reload_p (regno, endregno,
6402 SET_DEST (x), loc))))
6405 if (code == CLOBBER || loc == &SET_SRC (x))
6414 /* X does not match, so try its subexpressions. */
6416 fmt = GET_RTX_FORMAT (code);
6417 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6419 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6427 if (refers_to_regno_for_reload_p (regno, endregno,
6431 else if (fmt[i] == 'E')
6434 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6435 if (loc != &XVECEXP (x, i, j)
6436 && refers_to_regno_for_reload_p (regno, endregno,
6437 XVECEXP (x, i, j), loc))
6444 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6445 we check if any register number in X conflicts with the relevant register
6446 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6447 contains a MEM (we don't bother checking for memory addresses that can't
6448 conflict because we expect this to be a rare case.
6450 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6451 that we look at equivalences for pseudos that didn't get hard registers. */
6454 reg_overlap_mentioned_for_reload_p (rtx x, rtx in)
6456 int regno, endregno;
6458 /* Overly conservative. */
6459 if (GET_CODE (x) == STRICT_LOW_PART
6460 || GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
6463 /* If either argument is a constant, then modifying X can not affect IN. */
6464 if (CONSTANT_P (x) || CONSTANT_P (in))
6466 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == MEM)
6467 return refers_to_mem_for_reload_p (in);
6468 else if (GET_CODE (x) == SUBREG)
6470 regno = REGNO (SUBREG_REG (x));
6471 if (regno < FIRST_PSEUDO_REGISTER)
6472 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6473 GET_MODE (SUBREG_REG (x)),
6476 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6477 ? subreg_nregs (x) : 1);
6479 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6485 /* If this is a pseudo, it must not have been assigned a hard register.
6486 Therefore, it must either be in memory or be a constant. */
6488 if (regno >= FIRST_PSEUDO_REGISTER)
6490 if (reg_equiv_memory_loc[regno])
6491 return refers_to_mem_for_reload_p (in);
6492 gcc_assert (reg_equiv_constant[regno]);
6496 endregno = regno + hard_regno_nregs[regno][GET_MODE (x)];
6498 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6501 return refers_to_mem_for_reload_p (in);
6502 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6503 || GET_CODE (x) == CC0)
6504 return reg_mentioned_p (x, in);
6507 gcc_assert (GET_CODE (x) == PLUS);
6509 /* We actually want to know if X is mentioned somewhere inside IN.
6510 We must not say that (plus (sp) (const_int 124)) is in
6511 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6512 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6513 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6518 else if (GET_CODE (in) == PLUS)
6519 return (reg_overlap_mentioned_for_reload_p (x, XEXP (in, 0))
6520 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 1)));
6521 else return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6522 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6528 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6532 refers_to_mem_for_reload_p (rtx x)
6541 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6542 && reg_equiv_memory_loc[REGNO (x)]);
6544 fmt = GET_RTX_FORMAT (GET_CODE (x));
6545 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6547 && (MEM_P (XEXP (x, i))
6548 || refers_to_mem_for_reload_p (XEXP (x, i))))
6554 /* Check the insns before INSN to see if there is a suitable register
6555 containing the same value as GOAL.
6556 If OTHER is -1, look for a register in class CLASS.
6557 Otherwise, just see if register number OTHER shares GOAL's value.
6559 Return an rtx for the register found, or zero if none is found.
6561 If RELOAD_REG_P is (short *)1,
6562 we reject any hard reg that appears in reload_reg_rtx
6563 because such a hard reg is also needed coming into this insn.
6565 If RELOAD_REG_P is any other nonzero value,
6566 it is a vector indexed by hard reg number
6567 and we reject any hard reg whose element in the vector is nonnegative
6568 as well as any that appears in reload_reg_rtx.
6570 If GOAL is zero, then GOALREG is a register number; we look
6571 for an equivalent for that register.
6573 MODE is the machine mode of the value we want an equivalence for.
6574 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6576 This function is used by jump.c as well as in the reload pass.
6578 If GOAL is the sum of the stack pointer and a constant, we treat it
6579 as if it were a constant except that sp is required to be unchanging. */
6582 find_equiv_reg (rtx goal, rtx insn, enum reg_class class, int other,
6583 short *reload_reg_p, int goalreg, enum machine_mode mode)
6586 rtx goaltry, valtry, value, where;
6592 int goal_mem_addr_varies = 0;
6593 int need_stable_sp = 0;
6600 else if (REG_P (goal))
6601 regno = REGNO (goal);
6602 else if (MEM_P (goal))
6604 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6605 if (MEM_VOLATILE_P (goal))
6607 if (flag_float_store && SCALAR_FLOAT_MODE_P (GET_MODE (goal)))
6609 /* An address with side effects must be reexecuted. */
6624 else if (CONSTANT_P (goal))
6626 else if (GET_CODE (goal) == PLUS
6627 && XEXP (goal, 0) == stack_pointer_rtx
6628 && CONSTANT_P (XEXP (goal, 1)))
6629 goal_const = need_stable_sp = 1;
6630 else if (GET_CODE (goal) == PLUS
6631 && XEXP (goal, 0) == frame_pointer_rtx
6632 && CONSTANT_P (XEXP (goal, 1)))
6638 /* Scan insns back from INSN, looking for one that copies
6639 a value into or out of GOAL.
6640 Stop and give up if we reach a label. */
6646 if (p == 0 || LABEL_P (p)
6647 || num > PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS))
6650 if (NONJUMP_INSN_P (p)
6651 /* If we don't want spill regs ... */
6652 && (! (reload_reg_p != 0
6653 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6654 /* ... then ignore insns introduced by reload; they aren't
6655 useful and can cause results in reload_as_needed to be
6656 different from what they were when calculating the need for
6657 spills. If we notice an input-reload insn here, we will
6658 reject it below, but it might hide a usable equivalent.
6659 That makes bad code. It may even fail: perhaps no reg was
6660 spilled for this insn because it was assumed we would find
6662 || INSN_UID (p) < reload_first_uid))
6665 pat = single_set (p);
6667 /* First check for something that sets some reg equal to GOAL. */
6670 && true_regnum (SET_SRC (pat)) == regno
6671 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6674 && true_regnum (SET_DEST (pat)) == regno
6675 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6677 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6678 /* When looking for stack pointer + const,
6679 make sure we don't use a stack adjust. */
6680 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6681 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6683 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6684 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6686 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6687 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6688 /* If we are looking for a constant,
6689 and something equivalent to that constant was copied
6690 into a reg, we can use that reg. */
6691 || (goal_const && REG_NOTES (p) != 0
6692 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6693 && ((rtx_equal_p (XEXP (tem, 0), goal)
6695 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6696 || (REG_P (SET_DEST (pat))
6697 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6698 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6699 && GET_CODE (goal) == CONST_INT
6701 = operand_subword (XEXP (tem, 0), 0, 0,
6703 && rtx_equal_p (goal, goaltry)
6705 = operand_subword (SET_DEST (pat), 0, 0,
6707 && (valueno = true_regnum (valtry)) >= 0)))
6708 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6710 && REG_P (SET_DEST (pat))
6711 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6712 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6713 && GET_CODE (goal) == CONST_INT
6714 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6716 && rtx_equal_p (goal, goaltry)
6718 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6719 && (valueno = true_regnum (valtry)) >= 0)))
6723 if (valueno != other)
6726 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6732 for (i = hard_regno_nregs[valueno][mode] - 1; i >= 0; i--)
6733 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6746 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6747 (or copying VALUE into GOAL, if GOAL is also a register).
6748 Now verify that VALUE is really valid. */
6750 /* VALUENO is the register number of VALUE; a hard register. */
6752 /* Don't try to re-use something that is killed in this insn. We want
6753 to be able to trust REG_UNUSED notes. */
6754 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6757 /* If we propose to get the value from the stack pointer or if GOAL is
6758 a MEM based on the stack pointer, we need a stable SP. */
6759 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6760 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6764 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6765 if (GET_MODE (value) != mode)
6768 /* Reject VALUE if it was loaded from GOAL
6769 and is also a register that appears in the address of GOAL. */
6771 if (goal_mem && value == SET_DEST (single_set (where))
6772 && refers_to_regno_for_reload_p (valueno,
6774 + hard_regno_nregs[valueno][mode]),
6778 /* Reject registers that overlap GOAL. */
6780 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6781 nregs = hard_regno_nregs[regno][mode];
6784 valuenregs = hard_regno_nregs[valueno][mode];
6786 if (!goal_mem && !goal_const
6787 && regno + nregs > valueno && regno < valueno + valuenregs)
6790 /* Reject VALUE if it is one of the regs reserved for reloads.
6791 Reload1 knows how to reuse them anyway, and it would get
6792 confused if we allocated one without its knowledge.
6793 (Now that insns introduced by reload are ignored above,
6794 this case shouldn't happen, but I'm not positive.) */
6796 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6799 for (i = 0; i < valuenregs; ++i)
6800 if (reload_reg_p[valueno + i] >= 0)
6804 /* Reject VALUE if it is a register being used for an input reload
6805 even if it is not one of those reserved. */
6807 if (reload_reg_p != 0)
6810 for (i = 0; i < n_reloads; i++)
6811 if (rld[i].reg_rtx != 0 && rld[i].in)
6813 int regno1 = REGNO (rld[i].reg_rtx);
6814 int nregs1 = hard_regno_nregs[regno1]
6815 [GET_MODE (rld[i].reg_rtx)];
6816 if (regno1 < valueno + valuenregs
6817 && regno1 + nregs1 > valueno)
6823 /* We must treat frame pointer as varying here,
6824 since it can vary--in a nonlocal goto as generated by expand_goto. */
6825 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6827 /* Now verify that the values of GOAL and VALUE remain unaltered
6828 until INSN is reached. */
6837 /* Don't trust the conversion past a function call
6838 if either of the two is in a call-clobbered register, or memory. */
6843 if (goal_mem || need_stable_sp)
6846 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6847 for (i = 0; i < nregs; ++i)
6848 if (call_used_regs[regno + i]
6849 || HARD_REGNO_CALL_PART_CLOBBERED (regno + i, mode))
6852 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6853 for (i = 0; i < valuenregs; ++i)
6854 if (call_used_regs[valueno + i]
6855 || HARD_REGNO_CALL_PART_CLOBBERED (valueno + i, mode))
6863 /* Watch out for unspec_volatile, and volatile asms. */
6864 if (volatile_insn_p (pat))
6867 /* If this insn P stores in either GOAL or VALUE, return 0.
6868 If GOAL is a memory ref and this insn writes memory, return 0.
6869 If GOAL is a memory ref and its address is not constant,
6870 and this insn P changes a register used in GOAL, return 0. */
6872 if (GET_CODE (pat) == COND_EXEC)
6873 pat = COND_EXEC_CODE (pat);
6874 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6876 rtx dest = SET_DEST (pat);
6877 while (GET_CODE (dest) == SUBREG
6878 || GET_CODE (dest) == ZERO_EXTRACT
6879 || GET_CODE (dest) == STRICT_LOW_PART)
6880 dest = XEXP (dest, 0);
6883 int xregno = REGNO (dest);
6885 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6886 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
6889 if (xregno < regno + nregs && xregno + xnregs > regno)
6891 if (xregno < valueno + valuenregs
6892 && xregno + xnregs > valueno)
6894 if (goal_mem_addr_varies
6895 && reg_overlap_mentioned_for_reload_p (dest, goal))
6897 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6900 else if (goal_mem && MEM_P (dest)
6901 && ! push_operand (dest, GET_MODE (dest)))
6903 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
6904 && reg_equiv_memory_loc[regno] != 0)
6906 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6909 else if (GET_CODE (pat) == PARALLEL)
6912 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6914 rtx v1 = XVECEXP (pat, 0, i);
6915 if (GET_CODE (v1) == COND_EXEC)
6916 v1 = COND_EXEC_CODE (v1);
6917 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6919 rtx dest = SET_DEST (v1);
6920 while (GET_CODE (dest) == SUBREG
6921 || GET_CODE (dest) == ZERO_EXTRACT
6922 || GET_CODE (dest) == STRICT_LOW_PART)
6923 dest = XEXP (dest, 0);
6926 int xregno = REGNO (dest);
6928 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6929 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
6932 if (xregno < regno + nregs
6933 && xregno + xnregs > regno)
6935 if (xregno < valueno + valuenregs
6936 && xregno + xnregs > valueno)
6938 if (goal_mem_addr_varies
6939 && reg_overlap_mentioned_for_reload_p (dest,
6942 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6945 else if (goal_mem && MEM_P (dest)
6946 && ! push_operand (dest, GET_MODE (dest)))
6948 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
6949 && reg_equiv_memory_loc[regno] != 0)
6951 else if (need_stable_sp
6952 && push_operand (dest, GET_MODE (dest)))
6958 if (CALL_P (p) && CALL_INSN_FUNCTION_USAGE (p))
6962 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6963 link = XEXP (link, 1))
6965 pat = XEXP (link, 0);
6966 if (GET_CODE (pat) == CLOBBER)
6968 rtx dest = SET_DEST (pat);
6972 int xregno = REGNO (dest);
6974 = hard_regno_nregs[xregno][GET_MODE (dest)];
6976 if (xregno < regno + nregs
6977 && xregno + xnregs > regno)
6979 else if (xregno < valueno + valuenregs
6980 && xregno + xnregs > valueno)
6982 else if (goal_mem_addr_varies
6983 && reg_overlap_mentioned_for_reload_p (dest,
6988 else if (goal_mem && MEM_P (dest)
6989 && ! push_operand (dest, GET_MODE (dest)))
6991 else if (need_stable_sp
6992 && push_operand (dest, GET_MODE (dest)))
6999 /* If this insn auto-increments or auto-decrements
7000 either regno or valueno, return 0 now.
7001 If GOAL is a memory ref and its address is not constant,
7002 and this insn P increments a register used in GOAL, return 0. */
7006 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
7007 if (REG_NOTE_KIND (link) == REG_INC
7008 && REG_P (XEXP (link, 0)))
7010 int incno = REGNO (XEXP (link, 0));
7011 if (incno < regno + nregs && incno >= regno)
7013 if (incno < valueno + valuenregs && incno >= valueno)
7015 if (goal_mem_addr_varies
7016 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
7026 /* Find a place where INCED appears in an increment or decrement operator
7027 within X, and return the amount INCED is incremented or decremented by.
7028 The value is always positive. */
7031 find_inc_amount (rtx x, rtx inced)
7033 enum rtx_code code = GET_CODE (x);
7039 rtx addr = XEXP (x, 0);
7040 if ((GET_CODE (addr) == PRE_DEC
7041 || GET_CODE (addr) == POST_DEC
7042 || GET_CODE (addr) == PRE_INC
7043 || GET_CODE (addr) == POST_INC)
7044 && XEXP (addr, 0) == inced)
7045 return GET_MODE_SIZE (GET_MODE (x));
7046 else if ((GET_CODE (addr) == PRE_MODIFY
7047 || GET_CODE (addr) == POST_MODIFY)
7048 && GET_CODE (XEXP (addr, 1)) == PLUS
7049 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
7050 && XEXP (addr, 0) == inced
7051 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
7053 i = INTVAL (XEXP (XEXP (addr, 1), 1));
7054 return i < 0 ? -i : i;
7058 fmt = GET_RTX_FORMAT (code);
7059 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7063 int tem = find_inc_amount (XEXP (x, i), inced);
7070 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7072 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
7082 /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7083 REG_INC note in insn INSN. REGNO must refer to a hard register. */
7087 reg_inc_found_and_valid_p (unsigned int regno, unsigned int endregno,
7094 if (! INSN_P (insn))
7097 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
7098 if (REG_NOTE_KIND (link) == REG_INC)
7100 unsigned int test = (int) REGNO (XEXP (link, 0));
7101 if (test >= regno && test < endregno)
7108 #define reg_inc_found_and_valid_p(regno,endregno,insn) 0
7112 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7113 If SETS is 1, also consider SETs. If SETS is 2, enable checking
7114 REG_INC. REGNO must refer to a hard register. */
7117 regno_clobbered_p (unsigned int regno, rtx insn, enum machine_mode mode,
7120 unsigned int nregs, endregno;
7122 /* regno must be a hard register. */
7123 gcc_assert (regno < FIRST_PSEUDO_REGISTER);
7125 nregs = hard_regno_nregs[regno][mode];
7126 endregno = regno + nregs;
7128 if ((GET_CODE (PATTERN (insn)) == CLOBBER
7129 || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7130 && REG_P (XEXP (PATTERN (insn), 0)))
7132 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
7134 return test >= regno && test < endregno;
7137 if (sets == 2 && reg_inc_found_and_valid_p (regno, endregno, insn))
7140 if (GET_CODE (PATTERN (insn)) == PARALLEL)
7142 int i = XVECLEN (PATTERN (insn), 0) - 1;
7146 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7147 if ((GET_CODE (elt) == CLOBBER
7148 || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7149 && REG_P (XEXP (elt, 0)))
7151 unsigned int test = REGNO (XEXP (elt, 0));
7153 if (test >= regno && test < endregno)
7157 && reg_inc_found_and_valid_p (regno, endregno, elt))
7165 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7167 reload_adjust_reg_for_mode (rtx reloadreg, enum machine_mode mode)
7171 if (GET_MODE (reloadreg) == mode)
7174 regno = REGNO (reloadreg);
7176 if (WORDS_BIG_ENDIAN)
7177 regno += (int) hard_regno_nregs[regno][GET_MODE (reloadreg)]
7178 - (int) hard_regno_nregs[regno][mode];
7180 return gen_rtx_REG (mode, regno);
7183 static const char *const reload_when_needed_name[] =
7186 "RELOAD_FOR_OUTPUT",
7188 "RELOAD_FOR_INPUT_ADDRESS",
7189 "RELOAD_FOR_INPADDR_ADDRESS",
7190 "RELOAD_FOR_OUTPUT_ADDRESS",
7191 "RELOAD_FOR_OUTADDR_ADDRESS",
7192 "RELOAD_FOR_OPERAND_ADDRESS",
7193 "RELOAD_FOR_OPADDR_ADDR",
7195 "RELOAD_FOR_OTHER_ADDRESS"
7198 /* These functions are used to print the variables set by 'find_reloads' */
7201 debug_reload_to_stream (FILE *f)
7208 for (r = 0; r < n_reloads; r++)
7210 fprintf (f, "Reload %d: ", r);
7214 fprintf (f, "reload_in (%s) = ",
7215 GET_MODE_NAME (rld[r].inmode));
7216 print_inline_rtx (f, rld[r].in, 24);
7217 fprintf (f, "\n\t");
7220 if (rld[r].out != 0)
7222 fprintf (f, "reload_out (%s) = ",
7223 GET_MODE_NAME (rld[r].outmode));
7224 print_inline_rtx (f, rld[r].out, 24);
7225 fprintf (f, "\n\t");
7228 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
7230 fprintf (f, "%s (opnum = %d)",
7231 reload_when_needed_name[(int) rld[r].when_needed],
7234 if (rld[r].optional)
7235 fprintf (f, ", optional");
7237 if (rld[r].nongroup)
7238 fprintf (f, ", nongroup");
7240 if (rld[r].inc != 0)
7241 fprintf (f, ", inc by %d", rld[r].inc);
7243 if (rld[r].nocombine)
7244 fprintf (f, ", can't combine");
7246 if (rld[r].secondary_p)
7247 fprintf (f, ", secondary_reload_p");
7249 if (rld[r].in_reg != 0)
7251 fprintf (f, "\n\treload_in_reg: ");
7252 print_inline_rtx (f, rld[r].in_reg, 24);
7255 if (rld[r].out_reg != 0)
7257 fprintf (f, "\n\treload_out_reg: ");
7258 print_inline_rtx (f, rld[r].out_reg, 24);
7261 if (rld[r].reg_rtx != 0)
7263 fprintf (f, "\n\treload_reg_rtx: ");
7264 print_inline_rtx (f, rld[r].reg_rtx, 24);
7268 if (rld[r].secondary_in_reload != -1)
7270 fprintf (f, "%ssecondary_in_reload = %d",
7271 prefix, rld[r].secondary_in_reload);
7275 if (rld[r].secondary_out_reload != -1)
7276 fprintf (f, "%ssecondary_out_reload = %d\n",
7277 prefix, rld[r].secondary_out_reload);
7280 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7282 fprintf (f, "%ssecondary_in_icode = %s", prefix,
7283 insn_data[rld[r].secondary_in_icode].name);
7287 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7288 fprintf (f, "%ssecondary_out_icode = %s", prefix,
7289 insn_data[rld[r].secondary_out_icode].name);
7298 debug_reload_to_stream (stderr);