1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This file contains subroutines used only from the file reload1.c.
22 It knows how to scan one insn for operands and values
23 that need to be copied into registers to make valid code.
24 It also finds other operands and values which are valid
25 but for which equivalent values in registers exist and
26 ought to be used instead.
28 Before processing the first insn of the function, call `init_reload'.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
91 #include "insn-config.h"
92 #include "insn-codes.h"
96 #include "hard-reg-set.h"
100 #ifndef REGISTER_MOVE_COST
101 #define REGISTER_MOVE_COST(x, y) 2
104 /* The variables set up by `find_reloads' are:
106 n_reloads number of distinct reloads needed; max reload # + 1
107 tables indexed by reload number
108 reload_in rtx for value to reload from
109 reload_out rtx for where to store reload-reg afterward if nec
110 (often the same as reload_in)
111 reload_reg_class enum reg_class, saying what regs to reload into
112 reload_inmode enum machine_mode; mode this operand should have
113 when reloaded, on input.
114 reload_outmode enum machine_mode; mode this operand should have
115 when reloaded, on output.
116 reload_optional char, nonzero for an optional reload.
117 Optional reloads are ignored unless the
118 value is already sitting in a register.
119 reload_inc int, positive amount to increment or decrement by if
120 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
121 Ignored otherwise (don't assume it is zero).
122 reload_in_reg rtx. A reg for which reload_in is the equivalent.
123 If reload_in is a symbol_ref which came from
124 reg_equiv_constant, then this is the pseudo
125 which has that symbol_ref as equivalent.
126 reload_reg_rtx rtx. This is the register to reload into.
127 If it is zero when `find_reloads' returns,
128 you must find a suitable register in the class
129 specified by reload_reg_class, and store here
130 an rtx for that register with mode from
131 reload_inmode or reload_outmode.
132 reload_nocombine char, nonzero if this reload shouldn't be
133 combined with another reload.
134 reload_opnum int, operand number being reloaded. This is
135 used to group related reloads and need not always
136 be equal to the actual operand number in the insn,
137 though it current will be; for in-out operands, it
138 is one of the two operand numbers.
139 reload_when_needed enum, classifies reload as needed either for
140 addressing an input reload, addressing an output,
141 for addressing a non-reloaded mem ref,
142 or for unspecified purposes (i.e., more than one
144 reload_secondary_reload int, gives the reload number of a secondary
145 reload, when needed; otherwise -1
146 reload_secondary_p int, 1 if this is a secondary register for one
148 reload_secondary_icode enum insn_code, if a secondary reload is required,
149 gives the INSN_CODE that uses the secondary
150 reload as a scratch register, or CODE_FOR_nothing
151 if the secondary reload register is to be an
152 intermediate register. */
155 rtx reload_in[MAX_RELOADS];
156 rtx reload_out[MAX_RELOADS];
157 enum reg_class reload_reg_class[MAX_RELOADS];
158 enum machine_mode reload_inmode[MAX_RELOADS];
159 enum machine_mode reload_outmode[MAX_RELOADS];
160 rtx reload_reg_rtx[MAX_RELOADS];
161 char reload_optional[MAX_RELOADS];
162 int reload_inc[MAX_RELOADS];
163 rtx reload_in_reg[MAX_RELOADS];
164 char reload_nocombine[MAX_RELOADS];
165 int reload_opnum[MAX_RELOADS];
166 enum reload_type reload_when_needed[MAX_RELOADS];
167 int reload_secondary_reload[MAX_RELOADS];
168 int reload_secondary_p[MAX_RELOADS];
169 enum insn_code reload_secondary_icode[MAX_RELOADS];
171 /* All the "earlyclobber" operands of the current insn
172 are recorded here. */
174 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
176 int reload_n_operands;
178 /* Replacing reloads.
180 If `replace_reloads' is nonzero, then as each reload is recorded
181 an entry is made for it in the table `replacements'.
182 Then later `subst_reloads' can look through that table and
183 perform all the replacements needed. */
185 /* Nonzero means record the places to replace. */
186 static int replace_reloads;
188 /* Each replacement is recorded with a structure like this. */
191 rtx *where; /* Location to store in */
192 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
193 a SUBREG; 0 otherwise. */
194 int what; /* which reload this is for */
195 enum machine_mode mode; /* mode it must have */
198 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
200 /* Number of replacements currently recorded. */
201 static int n_replacements;
203 /* Used to track what is modified by an operand. */
206 int reg_flag; /* Nonzero if referencing a register. */
207 int safe; /* Nonzero if this can't conflict with anything. */
208 rtx base; /* Base adddress for MEM. */
209 HOST_WIDE_INT start; /* Starting offset or register number. */
210 HOST_WIDE_INT end; /* Endinf offset or register number. */
213 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
214 (see reg_equiv_address). */
215 static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
216 static int n_memlocs;
218 #ifdef SECONDARY_MEMORY_NEEDED
220 /* Save MEMs needed to copy from one class of registers to another. One MEM
221 is used per mode, but normally only one or two modes are ever used.
223 We keep two versions, before and after register elimination. The one
224 after register elimination is record separately for each operand. This
225 is done in case the address is not valid to be sure that we separately
228 static rtx secondary_memlocs[NUM_MACHINE_MODES];
229 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
232 /* The instruction we are doing reloads for;
233 so we can test whether a register dies in it. */
234 static rtx this_insn;
236 /* Nonzero if this instruction is a user-specified asm with operands. */
237 static int this_insn_is_asm;
239 /* If hard_regs_live_known is nonzero,
240 we can tell which hard regs are currently live,
241 at least enough to succeed in choosing dummy reloads. */
242 static int hard_regs_live_known;
244 /* Indexed by hard reg number,
245 element is nonegative if hard reg has been spilled.
246 This vector is passed to `find_reloads' as an argument
247 and is not changed here. */
248 static short *static_reload_reg_p;
250 /* Set to 1 in subst_reg_equivs if it changes anything. */
251 static int subst_reg_equivs_changed;
253 /* On return from push_reload, holds the reload-number for the OUT
254 operand, which can be different for that from the input operand. */
255 static int output_reloadnum;
257 static enum reg_class find_secondary_reload PROTO((rtx, enum reg_class,
258 enum machine_mode, int,
263 enum machine_mode *));
264 static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
265 enum machine_mode, enum machine_mode,
266 int, int, int, enum reload_type));
267 static void push_replacement PROTO((rtx *, int, enum machine_mode));
268 static void combine_reloads PROTO((void));
269 static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
270 enum reg_class, int));
271 static int hard_reg_set_here_p PROTO((int, int, rtx));
272 static struct decomposition decompose PROTO((rtx));
273 static int immune_p PROTO((rtx, rtx, struct decomposition));
274 static int alternative_allows_memconst PROTO((char *, int));
275 static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int));
276 static rtx make_memloc PROTO((rtx, int));
277 static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
278 int, enum reload_type, int));
279 static rtx subst_reg_equivs PROTO((rtx));
280 static rtx subst_indexed_address PROTO((rtx));
281 static int find_reloads_address_1 PROTO((rtx, int, rtx *, int,
282 enum reload_type,int));
283 static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
284 enum machine_mode, int,
285 enum reload_type, int));
286 static int find_inc_amount PROTO((rtx, rtx));
288 #ifdef HAVE_SECONDARY_RELOADS
290 /* Determine if any secondary reloads are needed for loading (if IN_P is
291 non-zero) or storing (if IN_P is zero) X to or from a reload register of
292 register class RELOAD_CLASS in mode RELOAD_MODE.
294 Return the register class of a secondary reload register, or NO_REGS if
295 none. *PMODE is set to the mode that the register is required in.
296 If the reload register is needed as a scratch register instead of an
297 intermediate register, *PICODE is set to the insn_code of the insn to be
298 used to load or store the primary reload register; otherwise *PICODE
299 is set to CODE_FOR_nothing.
301 In some cases (such as storing MQ into an external memory location on
302 the RT), both an intermediate register and a scratch register. In that
303 case, *PICODE is set to CODE_FOR_nothing, the class for the intermediate
304 register is returned, and the *PTERTIARY_... variables are set to describe
305 the scratch register. */
307 static enum reg_class
308 find_secondary_reload (x, reload_class, reload_mode, in_p, picode, pmode,
309 ptertiary_class, ptertiary_icode, ptertiary_mode)
311 enum reg_class reload_class;
312 enum machine_mode reload_mode;
314 enum insn_code *picode;
315 enum machine_mode *pmode;
316 enum reg_class *ptertiary_class;
317 enum insn_code *ptertiary_icode;
318 enum machine_mode *ptertiary_mode;
320 enum reg_class class = NO_REGS;
321 enum machine_mode mode = reload_mode;
322 enum insn_code icode = CODE_FOR_nothing;
323 enum reg_class t_class = NO_REGS;
324 enum machine_mode t_mode = VOIDmode;
325 enum insn_code t_icode = CODE_FOR_nothing;
327 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
328 is still a pseudo-register by now, it *must* have an equivalent MEM
329 but we don't want to assume that), use that equivalent when seeing if
330 a secondary reload is needed since whether or not a reload is needed
331 might be sensitive to the form of the MEM. */
333 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
334 && reg_equiv_mem[REGNO (x)] != 0)
335 x = reg_equiv_mem[REGNO (x)];
337 #ifdef SECONDARY_INPUT_RELOAD_CLASS
339 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
342 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
344 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
347 /* If we don't need any secondary registers, go away; the rest of the
348 values won't be used. */
349 if (class == NO_REGS)
352 /* Get a possible insn to use. If the predicate doesn't accept X, don't
355 icode = (in_p ? reload_in_optab[(int) reload_mode]
356 : reload_out_optab[(int) reload_mode]);
358 if (icode != CODE_FOR_nothing
359 && insn_operand_predicate[(int) icode][in_p]
360 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
361 icode = CODE_FOR_nothing;
363 /* If we will be using an insn, see if it can directly handle the reload
364 register we will be using. If it can, the secondary reload is for a
365 scratch register. If it can't, we will use the secondary reload for
366 an intermediate register and require a tertiary reload for the scratch
369 if (icode != CODE_FOR_nothing)
371 /* If IN_P is non-zero, the reload register will be the output in
372 operand 0. If IN_P is zero, the reload register will be the input
373 in operand 1. Outputs should have an initial "=", which we must
376 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
377 enum reg_class insn_class
378 = (insn_letter == 'r' ? GENERAL_REGS
379 : REG_CLASS_FROM_LETTER (insn_letter));
381 if (insn_class == NO_REGS
382 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
383 /* The scratch register's constraint must start with "=&". */
384 || insn_operand_constraint[(int) icode][2][0] != '='
385 || insn_operand_constraint[(int) icode][2][1] != '&')
388 if (reg_class_subset_p (reload_class, insn_class))
389 mode = insn_operand_mode[(int) icode][2];
392 char t_letter = insn_operand_constraint[(int) icode][2][2];
394 t_mode = insn_operand_mode[(int) icode][2];
395 t_class = (t_letter == 'r' ? GENERAL_REGS
396 : REG_CLASS_FROM_LETTER (t_letter));
398 icode = CODE_FOR_nothing;
404 *ptertiary_class = t_class;
405 *ptertiary_mode = t_mode;
406 *ptertiary_icode = t_icode;
410 #endif /* HAVE_SECONDARY_RELOADS */
412 #ifdef SECONDARY_MEMORY_NEEDED
414 /* Return a memory location that will be used to copy X in mode MODE.
415 If we haven't already made a location for this mode in this insn,
416 call find_reloads_address on the location being returned. */
419 get_secondary_mem (x, mode, opnum, type)
421 enum machine_mode mode;
423 enum reload_type type;
428 /* If MODE is narrower than a word, widen it. This is required because
429 most machines that require these memory locations do not support
430 short load and stores from all registers (e.g., FP registers). We could
431 possibly conditionalize this, but we lose nothing by doing the wider
434 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
435 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
437 /* If we already have made a MEM for this operand in MODE, return it. */
438 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
439 return secondary_memlocs_elim[(int) mode][opnum];
441 /* If this is the first time we've tried to get a MEM for this mode,
442 allocate a new one. `something_changed' in reload will get set
443 by noticing that the frame size has changed. */
445 if (secondary_memlocs[(int) mode] == 0)
447 #ifdef SECONDARY_MEMORY_NEEDED_RTX
448 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
450 secondary_memlocs[(int) mode]
451 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
455 /* Get a version of the address doing any eliminations needed. If that
456 didn't give us a new MEM, make a new one if it isn't valid. */
458 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
459 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
461 if (! mem_valid && loc == secondary_memlocs[(int) mode])
462 loc = copy_rtx (loc);
464 /* The only time the call below will do anything is if the stack
465 offset is too large. In that case IND_LEVELS doesn't matter, so we
466 can just pass a zero. Adjust the type to be the address of the
467 corresponding object. If the address was valid, save the eliminated
468 address. If it wasn't valid, we need to make a reload each time, so
473 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
474 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
477 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
481 secondary_memlocs_elim[(int) mode][opnum] = loc;
485 /* Clear any secondary memory locations we've made. */
488 clear_secondary_mem ()
490 bzero (secondary_memlocs, sizeof secondary_memlocs);
492 #endif /* SECONDARY_MEMORY_NEEDED */
494 /* Record one reload that needs to be performed.
495 IN is an rtx saying where the data are to be found before this instruction.
496 OUT says where they must be stored after the instruction.
497 (IN is zero for data not read, and OUT is zero for data not written.)
498 INLOC and OUTLOC point to the places in the instructions where
499 IN and OUT were found.
500 If IN and OUT are both non-zero, it means the same register must be used
501 to reload both IN and OUT.
503 CLASS is a register class required for the reloaded data.
504 INMODE is the machine mode that the instruction requires
505 for the reg that replaces IN and OUTMODE is likewise for OUT.
507 If IN is zero, then OUT's location and mode should be passed as
510 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
512 OPTIONAL nonzero means this reload does not need to be performed:
513 it can be discarded if that is more convenient.
515 OPNUM and TYPE say what the purpose of this reload is.
517 The return value is the reload-number for this reload.
519 If both IN and OUT are nonzero, in some rare cases we might
520 want to make two separate reloads. (Actually we never do this now.)
521 Therefore, the reload-number for OUT is stored in
522 output_reloadnum when we return; the return value applies to IN.
523 Usually (presently always), when IN and OUT are nonzero,
524 the two reload-numbers are equal, but the caller should be careful to
528 push_reload (in, out, inloc, outloc, class,
529 inmode, outmode, strict_low, optional, opnum, type)
530 register rtx in, out;
532 enum reg_class class;
533 enum machine_mode inmode, outmode;
537 enum reload_type type;
541 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
542 int secondary_reload = -1;
543 enum insn_code secondary_icode = CODE_FOR_nothing;
545 /* Compare two RTX's. */
546 #define MATCHES(x, y) \
547 (x == y || (x != 0 && (GET_CODE (x) == REG \
548 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
549 : rtx_equal_p (x, y) && ! side_effects_p (x))))
551 /* Indicates if two reloads purposes are for similar enough things that we
552 can merge their reloads. */
553 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
554 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
555 || ((when1) == (when2) && (op1) == (op2)) \
556 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
557 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
558 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
559 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
560 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
562 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
563 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
564 ((when1) != (when2) \
565 || ! ((op1) == (op2) \
566 || (when1) == RELOAD_FOR_INPUT \
567 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
568 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
570 /* INMODE and/or OUTMODE could be VOIDmode if no mode
571 has been specified for the operand. In that case,
572 use the operand's mode as the mode to reload. */
573 if (inmode == VOIDmode && in != 0)
574 inmode = GET_MODE (in);
575 if (outmode == VOIDmode && out != 0)
576 outmode = GET_MODE (out);
578 /* If IN is a pseudo register everywhere-equivalent to a constant, and
579 it is not in a hard register, reload straight from the constant,
580 since we want to get rid of such pseudo registers.
581 Often this is done earlier, but not always in find_reloads_address. */
582 if (in != 0 && GET_CODE (in) == REG)
584 register int regno = REGNO (in);
586 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
587 && reg_equiv_constant[regno] != 0)
588 in = reg_equiv_constant[regno];
591 /* Likewise for OUT. Of course, OUT will never be equivalent to
592 an actual constant, but it might be equivalent to a memory location
593 (in the case of a parameter). */
594 if (out != 0 && GET_CODE (out) == REG)
596 register int regno = REGNO (out);
598 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
599 && reg_equiv_constant[regno] != 0)
600 out = reg_equiv_constant[regno];
603 /* If we have a read-write operand with an address side-effect,
604 change either IN or OUT so the side-effect happens only once. */
605 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
607 if (GET_CODE (XEXP (in, 0)) == POST_INC
608 || GET_CODE (XEXP (in, 0)) == POST_DEC)
609 in = gen_rtx (MEM, GET_MODE (in), XEXP (XEXP (in, 0), 0));
610 if (GET_CODE (XEXP (in, 0)) == PRE_INC
611 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
612 out = gen_rtx (MEM, GET_MODE (out), XEXP (XEXP (out, 0), 0));
615 /* If we are reloading a (SUBREG (MEM ...) ...) or (SUBREG constant ...),
616 really reload just the inside expression in its own mode.
617 If we have (SUBREG:M1 (REG:M2 ...) ...) with M1 wider than M2 and the
618 register is a pseudo, this will become the same as the above case.
619 Do the same for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
620 either M1 is not valid for R or M2 is wider than a word but we only
621 need one word to store an M2-sized quantity in R.
622 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
623 we can't handle it here because CONST_INT does not indicate a mode.
625 Similarly, we must reload the inside expression if we have a
626 STRICT_LOW_PART (presumably, in == out in the cas).
628 Also reload the inner expression if it does not require a secondary
629 reload but the SUBREG does. */
631 if (in != 0 && GET_CODE (in) == SUBREG
632 && (GET_CODE (SUBREG_REG (in)) != REG
634 || (GET_CODE (SUBREG_REG (in)) == REG
635 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER
636 && (GET_MODE_SIZE (inmode)
637 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))))
638 || (GET_CODE (SUBREG_REG (in)) == REG
639 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
640 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in)), inmode)
641 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
642 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
644 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
646 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
647 GET_MODE (SUBREG_REG (in)))))))
648 #ifdef SECONDARY_INPUT_RELOAD_CLASS
649 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
650 && (SECONDARY_INPUT_RELOAD_CLASS (class,
651 GET_MODE (SUBREG_REG (in)),
657 in_subreg_loc = inloc;
658 inloc = &SUBREG_REG (in);
660 #if ! defined(BYTE_LOADS_ZERO_EXTEND) && ! defined(BYTE_LOADS_SIGN_EXTEND)
661 if (GET_CODE (in) == MEM)
662 /* This is supposed to happen only for paradoxical subregs made by
663 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
664 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
667 inmode = GET_MODE (in);
670 /* Similarly for paradoxical and problematical SUBREGs on the output.
671 Note that there is no reason we need worry about the previous value
672 of SUBREG_REG (out); even if wider than out,
673 storing in a subreg is entitled to clobber it all
674 (except in the case of STRICT_LOW_PART,
675 and in that case the constraint should label it input-output.) */
676 if (out != 0 && GET_CODE (out) == SUBREG
677 && (GET_CODE (SUBREG_REG (out)) != REG
679 || (GET_CODE (SUBREG_REG (out)) == REG
680 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER
681 && (GET_MODE_SIZE (outmode)
682 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))))
683 || (GET_CODE (SUBREG_REG (out)) == REG
684 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
685 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)), outmode)
686 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
687 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
689 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
691 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
692 GET_MODE (SUBREG_REG (out)))))))
693 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
694 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
695 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
696 GET_MODE (SUBREG_REG (out)),
702 out_subreg_loc = outloc;
703 outloc = &SUBREG_REG (out);
705 #if ! defined(BYTE_LOADS_ZERO_EXTEND) && ! defined(BYTE_LOADS_SIGN_EXTEND)
706 if (GET_CODE (out) == MEM
707 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
710 outmode = GET_MODE (out);
713 /* If IN appears in OUT, we can't share any input-only reload for IN. */
714 if (in != 0 && out != 0 && GET_CODE (out) == MEM
715 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
716 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
719 /* If IN is a SUBREG of a hard register, make a new REG. This
720 simplifies some of the cases below. */
722 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
723 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
724 in = gen_rtx (REG, GET_MODE (in),
725 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
727 /* Similarly for OUT. */
728 if (out != 0 && GET_CODE (out) == SUBREG
729 && GET_CODE (SUBREG_REG (out)) == REG
730 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
731 out = gen_rtx (REG, GET_MODE (out),
732 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
734 /* Narrow down the class of register wanted if that is
735 desirable on this machine for efficiency. */
737 class = PREFERRED_RELOAD_CLASS (in, class);
739 /* Output reloads may need analogous treatment, different in detail. */
740 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
742 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
745 /* Make sure we use a class that can handle the actual pseudo
746 inside any subreg. For example, on the 386, QImode regs
747 can appear within SImode subregs. Although GENERAL_REGS
748 can handle SImode, QImode needs a smaller class. */
749 #ifdef LIMIT_RELOAD_CLASS
751 class = LIMIT_RELOAD_CLASS (inmode, class);
752 else if (in != 0 && GET_CODE (in) == SUBREG)
753 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
756 class = LIMIT_RELOAD_CLASS (outmode, class);
757 if (out != 0 && GET_CODE (out) == SUBREG)
758 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
761 /* Verify that this class is at least possible for the mode that
763 if (this_insn_is_asm)
765 enum machine_mode mode;
766 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
770 if (mode == VOIDmode)
772 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
779 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
780 if (HARD_REGNO_MODE_OK (i, mode)
781 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
783 int nregs = HARD_REGNO_NREGS (i, mode);
786 for (j = 1; j < nregs; j++)
787 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
792 if (i == FIRST_PSEUDO_REGISTER)
794 error_for_asm (this_insn, "impossible register constraint in `asm'");
799 if (class == NO_REGS)
802 /* We can use an existing reload if the class is right
803 and at least one of IN and OUT is a match
804 and the other is at worst neutral.
805 (A zero compared against anything is neutral.)
807 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
808 for the same thing since that can cause us to need more reload registers
809 than we otherwise would. */
811 for (i = 0; i < n_reloads; i++)
812 if ((reg_class_subset_p (class, reload_reg_class[i])
813 || reg_class_subset_p (reload_reg_class[i], class))
814 /* If the existing reload has a register, it must fit our class. */
815 && (reload_reg_rtx[i] == 0
816 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
817 true_regnum (reload_reg_rtx[i])))
818 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
819 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
821 (out != 0 && MATCHES (reload_out[i], out)
822 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
823 && (reg_class_size[(int) class] == 1
824 #ifdef SMALL_REGISTER_CLASSES
828 && MERGABLE_RELOADS (type, reload_when_needed[i],
829 opnum, reload_opnum[i]))
832 /* Reloading a plain reg for input can match a reload to postincrement
833 that reg, since the postincrement's value is the right value.
834 Likewise, it can match a preincrement reload, since we regard
835 the preincrementation as happening before any ref in this insn
838 for (i = 0; i < n_reloads; i++)
839 if ((reg_class_subset_p (class, reload_reg_class[i])
840 || reg_class_subset_p (reload_reg_class[i], class))
841 /* If the existing reload has a register, it must fit our class. */
842 && (reload_reg_rtx[i] == 0
843 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
844 true_regnum (reload_reg_rtx[i])))
845 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
846 && ((GET_CODE (in) == REG
847 && (GET_CODE (reload_in[i]) == POST_INC
848 || GET_CODE (reload_in[i]) == POST_DEC
849 || GET_CODE (reload_in[i]) == PRE_INC
850 || GET_CODE (reload_in[i]) == PRE_DEC)
851 && MATCHES (XEXP (reload_in[i], 0), in))
853 (GET_CODE (reload_in[i]) == REG
854 && (GET_CODE (in) == POST_INC
855 || GET_CODE (in) == POST_DEC
856 || GET_CODE (in) == PRE_INC
857 || GET_CODE (in) == PRE_DEC)
858 && MATCHES (XEXP (in, 0), reload_in[i])))
859 && (reg_class_size[(int) class] == 1
860 #ifdef SMALL_REGISTER_CLASSES
864 && MERGABLE_RELOADS (type, reload_when_needed[i],
865 opnum, reload_opnum[i]))
867 /* Make sure reload_in ultimately has the increment,
868 not the plain register. */
869 if (GET_CODE (in) == REG)
876 #ifdef HAVE_SECONDARY_RELOADS
877 enum reg_class secondary_class = NO_REGS;
878 enum reg_class secondary_out_class = NO_REGS;
879 enum machine_mode secondary_mode = inmode;
880 enum machine_mode secondary_out_mode = outmode;
881 enum insn_code secondary_icode;
882 enum insn_code secondary_out_icode = CODE_FOR_nothing;
883 enum reg_class tertiary_class = NO_REGS;
884 enum reg_class tertiary_out_class = NO_REGS;
885 enum machine_mode tertiary_mode;
886 enum machine_mode tertiary_out_mode;
887 enum insn_code tertiary_icode;
888 enum insn_code tertiary_out_icode = CODE_FOR_nothing;
889 int tertiary_reload = -1;
891 /* See if we need a secondary reload register to move between
892 CLASS and IN or CLASS and OUT. Get the modes and icodes to
893 use for each of them if so. */
895 #ifdef SECONDARY_INPUT_RELOAD_CLASS
898 = find_secondary_reload (in, class, inmode, 1, &secondary_icode,
899 &secondary_mode, &tertiary_class,
900 &tertiary_icode, &tertiary_mode);
903 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
904 if (out != 0 && GET_CODE (out) != SCRATCH)
906 = find_secondary_reload (out, class, outmode, 0,
907 &secondary_out_icode, &secondary_out_mode,
908 &tertiary_out_class, &tertiary_out_icode,
912 /* We can only record one secondary and one tertiary reload. If both
913 IN and OUT need secondary reloads, we can only make an in-out
914 reload if neither need an insn and if the classes are compatible.
915 If they aren't, all we can do is abort since making two separate
916 reloads is invalid. */
918 if (secondary_class != NO_REGS && secondary_out_class != NO_REGS
919 && reg_class_subset_p (secondary_out_class, secondary_class))
920 secondary_class = secondary_out_class;
922 if (secondary_class != NO_REGS && secondary_out_class != NO_REGS
923 && (! reg_class_subset_p (secondary_class, secondary_out_class)
924 || secondary_icode != CODE_FOR_nothing
925 || secondary_out_icode != CODE_FOR_nothing))
928 /* If we need a secondary reload for OUT but not IN, copy the
930 if (secondary_class == NO_REGS && secondary_out_class != NO_REGS)
932 secondary_class = secondary_out_class;
933 secondary_icode = secondary_out_icode;
934 tertiary_class = tertiary_out_class;
935 tertiary_icode = tertiary_out_icode;
936 tertiary_mode = tertiary_out_mode;
939 if (secondary_class != NO_REGS)
941 /* Secondary reloads don't conflict as badly as the primary object
942 being reload. Specifically, we can always treat them as
943 being for an input or output address and hence allowed to be
944 reused in the same manner such address components could be
945 reused. This is used as the reload_type for our secondary
948 enum reload_type secondary_type
949 = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
950 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
953 /* If we need a tertiary reload, see if we have one we can reuse
956 if (tertiary_class != NO_REGS)
958 for (tertiary_reload = 0; tertiary_reload < n_reloads;
960 if (reload_secondary_p[tertiary_reload]
961 && (reg_class_subset_p (tertiary_class,
962 reload_reg_class[tertiary_reload])
963 || reg_class_subset_p (reload_reg_class[tertiary_reload],
965 && ((reload_inmode[tertiary_reload] == tertiary_mode)
966 || reload_inmode[tertiary_reload] == VOIDmode)
967 && ((reload_outmode[tertiary_reload] == tertiary_mode)
968 || reload_outmode[tertiary_reload] == VOIDmode)
969 && (reload_secondary_icode[tertiary_reload]
971 && (reg_class_size[(int) tertiary_class] == 1
972 #ifdef SMALL_REGISTER_CLASSES
976 && MERGABLE_RELOADS (secondary_type,
977 reload_when_needed[tertiary_reload],
978 opnum, reload_opnum[tertiary_reload]))
980 if (tertiary_mode != VOIDmode)
981 reload_inmode[tertiary_reload] = tertiary_mode;
982 if (tertiary_out_mode != VOIDmode)
983 reload_outmode[tertiary_reload] = tertiary_mode;
984 if (reg_class_subset_p (tertiary_class,
985 reload_reg_class[tertiary_reload]))
986 reload_reg_class[tertiary_reload] = tertiary_class;
987 if (MERGE_TO_OTHER (secondary_type,
988 reload_when_needed[tertiary_reload],
990 reload_opnum[tertiary_reload]))
991 reload_when_needed[tertiary_reload] = RELOAD_OTHER;
992 reload_opnum[tertiary_reload]
993 = MIN (reload_opnum[tertiary_reload], opnum);
994 reload_optional[tertiary_reload] &= optional;
995 reload_secondary_p[tertiary_reload] = 1;
998 if (tertiary_reload == n_reloads)
1000 /* We need to make a new tertiary reload for this register
1002 reload_in[tertiary_reload] = reload_out[tertiary_reload] = 0;
1003 reload_reg_class[tertiary_reload] = tertiary_class;
1004 reload_inmode[tertiary_reload] = tertiary_mode;
1005 reload_outmode[tertiary_reload] = tertiary_mode;
1006 reload_reg_rtx[tertiary_reload] = 0;
1007 reload_optional[tertiary_reload] = optional;
1008 reload_inc[tertiary_reload] = 0;
1009 /* Maybe we could combine these, but it seems too tricky. */
1010 reload_nocombine[tertiary_reload] = 1;
1011 reload_in_reg[tertiary_reload] = 0;
1012 reload_opnum[tertiary_reload] = opnum;
1013 reload_when_needed[tertiary_reload] = secondary_type;
1014 reload_secondary_reload[tertiary_reload] = -1;
1015 reload_secondary_icode[tertiary_reload] = CODE_FOR_nothing;
1016 reload_secondary_p[tertiary_reload] = 1;
1023 /* See if we can reuse an existing secondary reload. */
1024 for (secondary_reload = 0; secondary_reload < n_reloads;
1026 if (reload_secondary_p[secondary_reload]
1027 && (reg_class_subset_p (secondary_class,
1028 reload_reg_class[secondary_reload])
1029 || reg_class_subset_p (reload_reg_class[secondary_reload],
1031 && ((reload_inmode[secondary_reload] == secondary_mode)
1032 || reload_inmode[secondary_reload] == VOIDmode)
1033 && ((reload_outmode[secondary_reload] == secondary_out_mode)
1034 || reload_outmode[secondary_reload] == VOIDmode)
1035 && reload_secondary_reload[secondary_reload] == tertiary_reload
1036 && reload_secondary_icode[secondary_reload] == tertiary_icode
1037 && (reg_class_size[(int) secondary_class] == 1
1038 #ifdef SMALL_REGISTER_CLASSES
1042 && MERGABLE_RELOADS (secondary_type,
1043 reload_when_needed[secondary_reload],
1044 opnum, reload_opnum[secondary_reload]))
1046 if (secondary_mode != VOIDmode)
1047 reload_inmode[secondary_reload] = secondary_mode;
1048 if (secondary_out_mode != VOIDmode)
1049 reload_outmode[secondary_reload] = secondary_out_mode;
1050 if (reg_class_subset_p (secondary_class,
1051 reload_reg_class[secondary_reload]))
1052 reload_reg_class[secondary_reload] = secondary_class;
1053 if (MERGE_TO_OTHER (secondary_type,
1054 reload_when_needed[secondary_reload],
1055 opnum, reload_opnum[secondary_reload]))
1056 reload_when_needed[secondary_reload] = RELOAD_OTHER;
1057 reload_opnum[secondary_reload]
1058 = MIN (reload_opnum[secondary_reload], opnum);
1059 reload_optional[secondary_reload] &= optional;
1060 reload_secondary_p[secondary_reload] = 1;
1063 if (secondary_reload == n_reloads)
1065 /* We need to make a new secondary reload for this register
1067 reload_in[secondary_reload] = reload_out[secondary_reload] = 0;
1068 reload_reg_class[secondary_reload] = secondary_class;
1069 reload_inmode[secondary_reload] = secondary_mode;
1070 reload_outmode[secondary_reload] = secondary_out_mode;
1071 reload_reg_rtx[secondary_reload] = 0;
1072 reload_optional[secondary_reload] = optional;
1073 reload_inc[secondary_reload] = 0;
1074 /* Maybe we could combine these, but it seems too tricky. */
1075 reload_nocombine[secondary_reload] = 1;
1076 reload_in_reg[secondary_reload] = 0;
1077 reload_opnum[secondary_reload] = opnum;
1078 reload_when_needed[secondary_reload] = secondary_type;
1079 reload_secondary_reload[secondary_reload] = tertiary_reload;
1080 reload_secondary_icode[secondary_reload] = tertiary_icode;
1081 reload_secondary_p[secondary_reload] = 1;
1086 #ifdef SECONDARY_MEMORY_NEEDED
1087 /* If we need a memory location to copy between the two
1088 reload regs, set it up now. */
1090 if (in != 0 && secondary_icode == CODE_FOR_nothing
1091 && SECONDARY_MEMORY_NEEDED (secondary_class, class, inmode))
1092 get_secondary_mem (in, inmode, opnum, type);
1094 if (out != 0 && secondary_icode == CODE_FOR_nothing
1095 && SECONDARY_MEMORY_NEEDED (class, secondary_class, outmode))
1096 get_secondary_mem (out, outmode, opnum, type);
1102 /* We found no existing reload suitable for re-use.
1103 So add an additional reload. */
1106 reload_out[i] = out;
1107 reload_reg_class[i] = class;
1108 reload_inmode[i] = inmode;
1109 reload_outmode[i] = outmode;
1110 reload_reg_rtx[i] = 0;
1111 reload_optional[i] = optional;
1113 reload_nocombine[i] = 0;
1114 reload_in_reg[i] = inloc ? *inloc : 0;
1115 reload_opnum[i] = opnum;
1116 reload_when_needed[i] = type;
1117 reload_secondary_reload[i] = secondary_reload;
1118 reload_secondary_icode[i] = secondary_icode;
1119 reload_secondary_p[i] = 0;
1123 #ifdef SECONDARY_MEMORY_NEEDED
1124 /* If a memory location is needed for the copy, make one. */
1125 if (in != 0 && GET_CODE (in) == REG
1126 && REGNO (in) < FIRST_PSEUDO_REGISTER
1127 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1129 get_secondary_mem (in, inmode, opnum, type);
1131 if (out != 0 && GET_CODE (out) == REG
1132 && REGNO (out) < FIRST_PSEUDO_REGISTER
1133 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1135 get_secondary_mem (out, outmode, opnum, type);
1140 /* We are reusing an existing reload,
1141 but we may have additional information for it.
1142 For example, we may now have both IN and OUT
1143 while the old one may have just one of them. */
1145 if (inmode != VOIDmode)
1146 reload_inmode[i] = inmode;
1147 if (outmode != VOIDmode)
1148 reload_outmode[i] = outmode;
1152 reload_out[i] = out;
1153 if (reg_class_subset_p (class, reload_reg_class[i]))
1154 reload_reg_class[i] = class;
1155 reload_optional[i] &= optional;
1156 if (MERGE_TO_OTHER (type, reload_when_needed[i],
1157 opnum, reload_opnum[i]))
1158 reload_when_needed[i] = RELOAD_OTHER;
1159 reload_opnum[i] = MIN (reload_opnum[i], opnum);
1162 /* If the ostensible rtx being reload differs from the rtx found
1163 in the location to substitute, this reload is not safe to combine
1164 because we cannot reliably tell whether it appears in the insn. */
1166 if (in != 0 && in != *inloc)
1167 reload_nocombine[i] = 1;
1170 /* This was replaced by changes in find_reloads_address_1 and the new
1171 function inc_for_reload, which go with a new meaning of reload_inc. */
1173 /* If this is an IN/OUT reload in an insn that sets the CC,
1174 it must be for an autoincrement. It doesn't work to store
1175 the incremented value after the insn because that would clobber the CC.
1176 So we must do the increment of the value reloaded from,
1177 increment it, store it back, then decrement again. */
1178 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1182 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1183 /* If we did not find a nonzero amount-to-increment-by,
1184 that contradicts the belief that IN is being incremented
1185 in an address in this insn. */
1186 if (reload_inc[i] == 0)
1191 /* If we will replace IN and OUT with the reload-reg,
1192 record where they are located so that substitution need
1193 not do a tree walk. */
1195 if (replace_reloads)
1199 register struct replacement *r = &replacements[n_replacements++];
1201 r->subreg_loc = in_subreg_loc;
1205 if (outloc != 0 && outloc != inloc)
1207 register struct replacement *r = &replacements[n_replacements++];
1210 r->subreg_loc = out_subreg_loc;
1215 /* If this reload is just being introduced and it has both
1216 an incoming quantity and an outgoing quantity that are
1217 supposed to be made to match, see if either one of the two
1218 can serve as the place to reload into.
1220 If one of them is acceptable, set reload_reg_rtx[i]
1223 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1225 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1226 reload_reg_class[i], i);
1228 /* If the outgoing register already contains the same value
1229 as the incoming one, we can dispense with loading it.
1230 The easiest way to tell the caller that is to give a phony
1231 value for the incoming operand (same as outgoing one). */
1232 if (reload_reg_rtx[i] == out
1233 && (GET_CODE (in) == REG || CONSTANT_P (in))
1234 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1235 static_reload_reg_p, i, inmode))
1239 /* If this is an input reload and the operand contains a register that
1240 dies in this insn and is used nowhere else, see if it is the right class
1241 to be used for this reload. Use it if so. (This occurs most commonly
1242 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1243 this if it is also an output reload that mentions the register unless
1244 the output is a SUBREG that clobbers an entire register.
1246 Note that the operand might be one of the spill regs, if it is a
1247 pseudo reg and we are in a block where spilling has not taken place.
1248 But if there is no spilling in this block, that is OK.
1249 An explicitly used hard reg cannot be a spill reg. */
1251 if (reload_reg_rtx[i] == 0 && in != 0)
1256 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1257 if (REG_NOTE_KIND (note) == REG_DEAD
1258 && GET_CODE (XEXP (note, 0)) == REG
1259 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1260 && reg_mentioned_p (XEXP (note, 0), in)
1261 && ! refers_to_regno_for_reload_p (regno,
1263 + HARD_REGNO_NREGS (regno,
1265 PATTERN (this_insn), inloc)
1266 /* If this is also an output reload, IN cannot be used as
1267 the reload register if it is set in this insn unless IN
1269 && (out == 0 || in == out
1270 || ! hard_reg_set_here_p (regno,
1272 + HARD_REGNO_NREGS (regno,
1274 PATTERN (this_insn)))
1275 /* ??? Why is this code so different from the previous?
1276 Is there any simple coherent way to describe the two together?
1277 What's going on here. */
1279 || (GET_CODE (in) == SUBREG
1280 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1282 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1283 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1284 /* Make sure the operand fits in the reg that dies. */
1285 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1286 && HARD_REGNO_MODE_OK (regno, inmode)
1287 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1288 && HARD_REGNO_MODE_OK (regno, outmode)
1289 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1290 && !fixed_regs[regno])
1292 reload_reg_rtx[i] = gen_rtx (REG, inmode, regno);
1298 output_reloadnum = i;
1303 /* Record an additional place we must replace a value
1304 for which we have already recorded a reload.
1305 RELOADNUM is the value returned by push_reload
1306 when the reload was recorded.
1307 This is used in insn patterns that use match_dup. */
1310 push_replacement (loc, reloadnum, mode)
1313 enum machine_mode mode;
1315 if (replace_reloads)
1317 register struct replacement *r = &replacements[n_replacements++];
1318 r->what = reloadnum;
1325 /* Transfer all replacements that used to be in reload FROM to be in
1329 transfer_replacements (to, from)
1334 for (i = 0; i < n_replacements; i++)
1335 if (replacements[i].what == from)
1336 replacements[i].what = to;
1339 /* If there is only one output reload, and it is not for an earlyclobber
1340 operand, try to combine it with a (logically unrelated) input reload
1341 to reduce the number of reload registers needed.
1343 This is safe if the input reload does not appear in
1344 the value being output-reloaded, because this implies
1345 it is not needed any more once the original insn completes.
1347 If that doesn't work, see we can use any of the registers that
1348 die in this insn as a reload register. We can if it is of the right
1349 class and does not appear in the value being output-reloaded. */
1355 int output_reload = -1;
1358 /* Find the output reload; return unless there is exactly one
1359 and that one is mandatory. */
1361 for (i = 0; i < n_reloads; i++)
1362 if (reload_out[i] != 0)
1364 if (output_reload >= 0)
1369 if (output_reload < 0 || reload_optional[output_reload])
1372 /* An input-output reload isn't combinable. */
1374 if (reload_in[output_reload] != 0)
1377 /* If this reload is for an earlyclobber operand, we can't do anything. */
1379 for (i = 0; i < n_earlyclobbers; i++)
1380 if (reload_out[output_reload] == reload_earlyclobbers[i])
1383 /* Check each input reload; can we combine it? */
1385 for (i = 0; i < n_reloads; i++)
1386 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1387 /* Life span of this reload must not extend past main insn. */
1388 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
1389 && reload_when_needed[i] != RELOAD_OTHER
1390 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
1391 == CLASS_MAX_NREGS (reload_reg_class[output_reload],
1392 reload_outmode[output_reload]))
1393 && reload_inc[i] == 0
1394 && reload_reg_rtx[i] == 0
1395 /* Don't combine two reloads with different secondary reloads. */
1396 && (reload_secondary_reload[i] == reload_secondary_reload[output_reload]
1397 || reload_secondary_reload[i] == -1
1398 || reload_secondary_reload[output_reload] == -1)
1399 #ifdef SECONDARY_MEMORY_NEEDED
1400 /* Likewise for different secondary memory locations. */
1401 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
1402 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
1403 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
1404 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
1406 #ifdef SMALL_REGISTER_CLASSES
1407 && reload_reg_class[i] == reload_reg_class[output_reload]
1409 && (reg_class_subset_p (reload_reg_class[i],
1410 reload_reg_class[output_reload])
1411 || reg_class_subset_p (reload_reg_class[output_reload],
1412 reload_reg_class[i]))
1414 && (MATCHES (reload_in[i], reload_out[output_reload])
1415 /* Args reversed because the first arg seems to be
1416 the one that we imagine being modified
1417 while the second is the one that might be affected. */
1418 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1420 /* However, if the input is a register that appears inside
1421 the output, then we also can't share.
1422 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1423 If the same reload reg is used for both reg 69 and the
1424 result to be stored in memory, then that result
1425 will clobber the address of the memory ref. */
1426 && ! (GET_CODE (reload_in[i]) == REG
1427 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1428 reload_out[output_reload]))))
1429 && (reg_class_size[(int) reload_reg_class[i]]
1430 #ifdef SMALL_REGISTER_CLASSES
1434 /* We will allow making things slightly worse by combining an
1435 input and an output, but no worse than that. */
1436 && (reload_when_needed[i] == RELOAD_FOR_INPUT
1437 || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
1441 /* We have found a reload to combine with! */
1442 reload_out[i] = reload_out[output_reload];
1443 reload_outmode[i] = reload_outmode[output_reload];
1444 /* Mark the old output reload as inoperative. */
1445 reload_out[output_reload] = 0;
1446 /* The combined reload is needed for the entire insn. */
1447 reload_when_needed[i] = RELOAD_OTHER;
1448 /* If the output reload had a secondary reload, copy it. */
1449 if (reload_secondary_reload[output_reload] != -1)
1450 reload_secondary_reload[i] = reload_secondary_reload[output_reload];
1451 #ifdef SECONDARY_MEMORY_NEEDED
1452 /* Copy any secondary MEM. */
1453 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
1454 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
1455 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
1457 /* If required, minimize the register class. */
1458 if (reg_class_subset_p (reload_reg_class[output_reload],
1459 reload_reg_class[i]))
1460 reload_reg_class[i] = reload_reg_class[output_reload];
1462 /* Transfer all replacements from the old reload to the combined. */
1463 for (j = 0; j < n_replacements; j++)
1464 if (replacements[j].what == output_reload)
1465 replacements[j].what = i;
1470 /* If this insn has only one operand that is modified or written (assumed
1471 to be the first), it must be the one corresponding to this reload. It
1472 is safe to use anything that dies in this insn for that output provided
1473 that it does not occur in the output (we already know it isn't an
1474 earlyclobber. If this is an asm insn, give up. */
1476 if (INSN_CODE (this_insn) == -1)
1479 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1480 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1481 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1484 /* See if some hard register that dies in this insn and is not used in
1485 the output is the right class. Only works if the register we pick
1486 up can fully hold our output reload. */
1487 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1488 if (REG_NOTE_KIND (note) == REG_DEAD
1489 && GET_CODE (XEXP (note, 0)) == REG
1490 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1491 reload_out[output_reload])
1492 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1493 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1494 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1495 REGNO (XEXP (note, 0)))
1496 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1497 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1498 && ! fixed_regs[REGNO (XEXP (note, 0))])
1500 reload_reg_rtx[output_reload] = gen_rtx (REG,
1501 reload_outmode[output_reload],
1502 REGNO (XEXP (note, 0)));
1507 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1508 See if one of IN and OUT is a register that may be used;
1509 this is desirable since a spill-register won't be needed.
1510 If so, return the register rtx that proves acceptable.
1512 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1513 CLASS is the register class required for the reload.
1515 If FOR_REAL is >= 0, it is the number of the reload,
1516 and in some cases when it can be discovered that OUT doesn't need
1517 to be computed, clear out reload_out[FOR_REAL].
1519 If FOR_REAL is -1, this should not be done, because this call
1520 is just to see if a register can be found, not to find and install it. */
1523 find_dummy_reload (real_in, real_out, inloc, outloc, class, for_real)
1524 rtx real_in, real_out;
1525 rtx *inloc, *outloc;
1526 enum reg_class class;
1535 /* If operands exceed a word, we can't use either of them
1536 unless they have the same size. */
1537 if (GET_MODE_SIZE (GET_MODE (real_out)) != GET_MODE_SIZE (GET_MODE (real_in))
1538 && (GET_MODE_SIZE (GET_MODE (real_out)) > UNITS_PER_WORD
1539 || GET_MODE_SIZE (GET_MODE (real_in)) > UNITS_PER_WORD))
1542 /* Find the inside of any subregs. */
1543 while (GET_CODE (out) == SUBREG)
1545 out_offset = SUBREG_WORD (out);
1546 out = SUBREG_REG (out);
1548 while (GET_CODE (in) == SUBREG)
1550 in_offset = SUBREG_WORD (in);
1551 in = SUBREG_REG (in);
1554 /* Narrow down the reg class, the same way push_reload will;
1555 otherwise we might find a dummy now, but push_reload won't. */
1556 class = PREFERRED_RELOAD_CLASS (in, class);
1558 /* See if OUT will do. */
1559 if (GET_CODE (out) == REG
1560 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1562 register int regno = REGNO (out) + out_offset;
1563 int nwords = HARD_REGNO_NREGS (regno, GET_MODE (real_out));
1566 /* When we consider whether the insn uses OUT,
1567 ignore references within IN. They don't prevent us
1568 from copying IN into OUT, because those refs would
1569 move into the insn that reloads IN.
1571 However, we only ignore IN in its role as this reload.
1572 If the insn uses IN elsewhere and it contains OUT,
1573 that counts. We can't be sure it's the "same" operand
1574 so it might not go through this reload. */
1576 *inloc = const0_rtx;
1578 if (regno < FIRST_PSEUDO_REGISTER
1579 /* A fixed reg that can overlap other regs better not be used
1580 for reloading in any way. */
1581 #ifdef OVERLAPPING_REGNO_P
1582 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1584 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1585 PATTERN (this_insn), outloc))
1588 for (i = 0; i < nwords; i++)
1589 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1595 if (GET_CODE (real_out) == REG)
1598 value = gen_rtx (REG, GET_MODE (real_out), regno);
1605 /* Consider using IN if OUT was not acceptable
1606 or if OUT dies in this insn (like the quotient in a divmod insn).
1607 We can't use IN unless it is dies in this insn,
1608 which means we must know accurately which hard regs are live.
1609 Also, the result can't go in IN if IN is used within OUT. */
1610 if (hard_regs_live_known
1611 && GET_CODE (in) == REG
1612 && REGNO (in) < FIRST_PSEUDO_REGISTER
1614 || find_reg_note (this_insn, REG_UNUSED, real_out))
1615 && find_reg_note (this_insn, REG_DEAD, real_in)
1616 && !fixed_regs[REGNO (in)]
1617 && HARD_REGNO_MODE_OK (REGNO (in), GET_MODE (out)))
1619 register int regno = REGNO (in) + in_offset;
1620 int nwords = HARD_REGNO_NREGS (regno, GET_MODE (real_in));
1622 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1623 && ! hard_reg_set_here_p (regno, regno + nwords,
1624 PATTERN (this_insn)))
1627 for (i = 0; i < nwords; i++)
1628 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1634 /* If we were going to use OUT as the reload reg
1635 and changed our mind, it means OUT is a dummy that
1636 dies here. So don't bother copying value to it. */
1637 if (for_real >= 0 && value == real_out)
1638 reload_out[for_real] = 0;
1639 if (GET_CODE (real_in) == REG)
1642 value = gen_rtx (REG, GET_MODE (real_in), regno);
1650 /* This page contains subroutines used mainly for determining
1651 whether the IN or an OUT of a reload can serve as the
1654 /* Return 1 if expression X alters a hard reg in the range
1655 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1656 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1657 X should be the body of an instruction. */
1660 hard_reg_set_here_p (beg_regno, end_regno, x)
1661 register int beg_regno, end_regno;
1664 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1666 register rtx op0 = SET_DEST (x);
1667 while (GET_CODE (op0) == SUBREG)
1668 op0 = SUBREG_REG (op0);
1669 if (GET_CODE (op0) == REG)
1671 register int r = REGNO (op0);
1672 /* See if this reg overlaps range under consideration. */
1674 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1678 else if (GET_CODE (x) == PARALLEL)
1680 register int i = XVECLEN (x, 0) - 1;
1682 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1689 /* Return 1 if ADDR is a valid memory address for mode MODE,
1690 and check that each pseudo reg has the proper kind of
1694 strict_memory_address_p (mode, addr)
1695 enum machine_mode mode;
1698 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
1705 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1706 if they are the same hard reg, and has special hacks for
1707 autoincrement and autodecrement.
1708 This is specifically intended for find_reloads to use
1709 in determining whether two operands match.
1710 X is the operand whose number is the lower of the two.
1712 The value is 2 if Y contains a pre-increment that matches
1713 a non-incrementing address in X. */
1715 /* ??? To be completely correct, we should arrange to pass
1716 for X the output operand and for Y the input operand.
1717 For now, we assume that the output operand has the lower number
1718 because that is natural in (SET output (... input ...)). */
1721 operands_match_p (x, y)
1725 register RTX_CODE code = GET_CODE (x);
1731 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
1732 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
1733 && GET_CODE (SUBREG_REG (y)) == REG)))
1739 i = REGNO (SUBREG_REG (x));
1740 if (i >= FIRST_PSEUDO_REGISTER)
1742 i += SUBREG_WORD (x);
1747 if (GET_CODE (y) == SUBREG)
1749 j = REGNO (SUBREG_REG (y));
1750 if (j >= FIRST_PSEUDO_REGISTER)
1752 j += SUBREG_WORD (y);
1757 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1758 multiple hard register group, so that for example (reg:DI 0) and
1759 (reg:SI 1) will be considered the same register. */
1760 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
1761 && i < FIRST_PSEUDO_REGISTER)
1762 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
1763 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
1764 && j < FIRST_PSEUDO_REGISTER)
1765 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
1769 /* If two operands must match, because they are really a single
1770 operand of an assembler insn, then two postincrements are invalid
1771 because the assembler insn would increment only once.
1772 On the other hand, an postincrement matches ordinary indexing
1773 if the postincrement is the output operand. */
1774 if (code == POST_DEC || code == POST_INC)
1775 return operands_match_p (XEXP (x, 0), y);
1776 /* Two preincrements are invalid
1777 because the assembler insn would increment only once.
1778 On the other hand, an preincrement matches ordinary indexing
1779 if the preincrement is the input operand.
1780 In this case, return 2, since some callers need to do special
1781 things when this happens. */
1782 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
1783 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
1787 /* Now we have disposed of all the cases
1788 in which different rtx codes can match. */
1789 if (code != GET_CODE (y))
1791 if (code == LABEL_REF)
1792 return XEXP (x, 0) == XEXP (y, 0);
1793 if (code == SYMBOL_REF)
1794 return XSTR (x, 0) == XSTR (y, 0);
1796 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1798 if (GET_MODE (x) != GET_MODE (y))
1801 /* Compare the elements. If any pair of corresponding elements
1802 fail to match, return 0 for the whole things. */
1805 fmt = GET_RTX_FORMAT (code);
1806 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1812 if (XWINT (x, i) != XWINT (y, i))
1817 if (XINT (x, i) != XINT (y, i))
1822 val = operands_match_p (XEXP (x, i), XEXP (y, i));
1825 /* If any subexpression returns 2,
1826 we should return 2 if we are successful. */
1834 /* It is believed that rtx's at this level will never
1835 contain anything but integers and other rtx's,
1836 except for within LABEL_REFs and SYMBOL_REFs. */
1841 return 1 + success_2;
1844 /* Return the number of times character C occurs in string S. */
1847 n_occurrences (c, s)
1857 /* Describe the range of registers or memory referenced by X.
1858 If X is a register, set REG_FLAG and put the first register
1859 number into START and the last plus one into END.
1860 If X is a memory reference, put a base address into BASE
1861 and a range of integer offsets into START and END.
1862 If X is pushing on the stack, we can assume it causes no trouble,
1863 so we set the SAFE field. */
1865 static struct decomposition
1869 struct decomposition val;
1874 if (GET_CODE (x) == MEM)
1876 rtx base, offset = 0;
1877 rtx addr = XEXP (x, 0);
1879 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
1880 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
1882 val.base = XEXP (addr, 0);
1883 val.start = - GET_MODE_SIZE (GET_MODE (x));
1884 val.end = GET_MODE_SIZE (GET_MODE (x));
1885 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
1889 if (GET_CODE (addr) == CONST)
1891 addr = XEXP (addr, 0);
1894 if (GET_CODE (addr) == PLUS)
1896 if (CONSTANT_P (XEXP (addr, 0)))
1898 base = XEXP (addr, 1);
1899 offset = XEXP (addr, 0);
1901 else if (CONSTANT_P (XEXP (addr, 1)))
1903 base = XEXP (addr, 0);
1904 offset = XEXP (addr, 1);
1911 offset = const0_rtx;
1913 if (GET_CODE (offset) == CONST)
1914 offset = XEXP (offset, 0);
1915 if (GET_CODE (offset) == PLUS)
1917 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
1919 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 1));
1920 offset = XEXP (offset, 0);
1922 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
1924 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 0));
1925 offset = XEXP (offset, 1);
1929 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
1930 offset = const0_rtx;
1933 else if (GET_CODE (offset) != CONST_INT)
1935 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
1936 offset = const0_rtx;
1939 if (all_const && GET_CODE (base) == PLUS)
1940 base = gen_rtx (CONST, GET_MODE (base), base);
1942 if (GET_CODE (offset) != CONST_INT)
1945 val.start = INTVAL (offset);
1946 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
1950 else if (GET_CODE (x) == REG)
1953 val.start = true_regnum (x);
1956 /* A pseudo with no hard reg. */
1957 val.start = REGNO (x);
1958 val.end = val.start + 1;
1962 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
1964 else if (GET_CODE (x) == SUBREG)
1966 if (GET_CODE (SUBREG_REG (x)) != REG)
1967 /* This could be more precise, but it's good enough. */
1968 return decompose (SUBREG_REG (x));
1970 val.start = true_regnum (x);
1972 return decompose (SUBREG_REG (x));
1975 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
1977 else if (CONSTANT_P (x)
1978 /* This hasn't been assigned yet, so it can't conflict yet. */
1979 || GET_CODE (x) == SCRATCH)
1986 /* Return 1 if altering Y will not modify the value of X.
1987 Y is also described by YDATA, which should be decompose (Y). */
1990 immune_p (x, y, ydata)
1992 struct decomposition ydata;
1994 struct decomposition xdata;
1997 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2001 if (GET_CODE (y) != MEM)
2003 /* If Y is memory and X is not, Y can't affect X. */
2004 if (GET_CODE (x) != MEM)
2007 xdata = decompose (x);
2009 if (! rtx_equal_p (xdata.base, ydata.base))
2011 /* If bases are distinct symbolic constants, there is no overlap. */
2012 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2014 /* Constants and stack slots never overlap. */
2015 if (CONSTANT_P (xdata.base)
2016 && (ydata.base == frame_pointer_rtx
2017 || ydata.base == stack_pointer_rtx))
2019 if (CONSTANT_P (ydata.base)
2020 && (xdata.base == frame_pointer_rtx
2021 || xdata.base == stack_pointer_rtx))
2023 /* If either base is variable, we don't know anything. */
2028 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2031 /* Similar, but calls decompose. */
2034 safe_from_earlyclobber (op, clobber)
2037 struct decomposition early_data;
2039 early_data = decompose (clobber);
2040 return immune_p (op, clobber, early_data);
2043 /* Main entry point of this file: search the body of INSN
2044 for values that need reloading and record them with push_reload.
2045 REPLACE nonzero means record also where the values occur
2046 so that subst_reloads can be used.
2048 IND_LEVELS says how many levels of indirection are supported by this
2049 machine; a value of zero means that a memory reference is not a valid
2052 LIVE_KNOWN says we have valid information about which hard
2053 regs are live at each point in the program; this is true when
2054 we are called from global_alloc but false when stupid register
2055 allocation has been done.
2057 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2058 which is nonnegative if the reg has been commandeered for reloading into.
2059 It is copied into STATIC_RELOAD_REG_P and referenced from there
2060 by various subroutines. */
2063 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2065 int replace, ind_levels;
2067 short *reload_reg_p;
2069 #ifdef REGISTER_CONSTRAINTS
2071 register int insn_code_number;
2074 /* These are the constraints for the insn. We don't change them. */
2075 char *constraints1[MAX_RECOG_OPERANDS];
2076 /* These start out as the constraints for the insn
2077 and they are chewed up as we consider alternatives. */
2078 char *constraints[MAX_RECOG_OPERANDS];
2079 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2081 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2082 char pref_or_nothing[MAX_RECOG_OPERANDS];
2083 /* Nonzero for a MEM operand whose entire address needs a reload. */
2084 int address_reloaded[MAX_RECOG_OPERANDS];
2085 /* Value of enum reload_type to use for operand. */
2086 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2087 /* Value of enum reload_type to use within address of operand. */
2088 enum reload_type address_type[MAX_RECOG_OPERANDS];
2089 /* Save the usage of each operand. */
2090 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2091 int no_input_reloads = 0, no_output_reloads = 0;
2093 int this_alternative[MAX_RECOG_OPERANDS];
2094 char this_alternative_win[MAX_RECOG_OPERANDS];
2095 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2096 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2097 int this_alternative_matches[MAX_RECOG_OPERANDS];
2099 int goal_alternative[MAX_RECOG_OPERANDS];
2100 int this_alternative_number;
2101 int goal_alternative_number;
2102 int operand_reloadnum[MAX_RECOG_OPERANDS];
2103 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2104 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2105 char goal_alternative_win[MAX_RECOG_OPERANDS];
2106 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2107 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2108 int goal_alternative_swapped;
2111 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2112 rtx substed_operand[MAX_RECOG_OPERANDS];
2113 rtx body = PATTERN (insn);
2114 rtx set = single_set (insn);
2115 int goal_earlyclobber, this_earlyclobber;
2116 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2119 this_insn_is_asm = 0; /* Tentative. */
2123 n_earlyclobbers = 0;
2124 replace_reloads = replace;
2125 hard_regs_live_known = live_known;
2126 static_reload_reg_p = reload_reg_p;
2128 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2129 neither are insns that SET cc0. Insns that use CC0 are not allowed
2130 to have any input reloads. */
2131 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2132 no_output_reloads = 1;
2135 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2136 no_input_reloads = 1;
2137 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2138 no_output_reloads = 1;
2141 #ifdef SECONDARY_MEMORY_NEEDED
2142 /* The eliminated forms of any secondary memory locations are per-insn, so
2143 clear them out here. */
2145 bzero (secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2148 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2149 Make OPERANDS point to a vector of operand values.
2150 Make OPERAND_LOCS point to a vector of pointers to
2151 where the operands were found.
2152 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2153 constraint-strings for this insn.
2154 Return if the insn needs no reload processing. */
2156 switch (GET_CODE (body))
2166 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2167 is cheap to move between them. If it is not, there may not be an insn
2168 to do the copy, so we may need a reload. */
2169 if (GET_CODE (SET_DEST (body)) == REG
2170 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2171 && GET_CODE (SET_SRC (body)) == REG
2172 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2173 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2174 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2178 reload_n_operands = noperands = asm_noperands (body);
2181 /* This insn is an `asm' with operands. */
2183 insn_code_number = -1;
2184 this_insn_is_asm = 1;
2186 /* expand_asm_operands makes sure there aren't too many operands. */
2187 if (noperands > MAX_RECOG_OPERANDS)
2190 /* Now get the operand values and constraints out of the insn. */
2192 decode_asm_operands (body, recog_operand, recog_operand_loc,
2193 constraints, operand_mode);
2196 bcopy (constraints, constraints1, noperands * sizeof (char *));
2197 n_alternatives = n_occurrences (',', constraints[0]) + 1;
2198 for (i = 1; i < noperands; i++)
2199 if (n_alternatives != n_occurrences (',', constraints[i]) + 1)
2201 error_for_asm (insn, "operand constraints differ in number of alternatives");
2202 /* Avoid further trouble with this insn. */
2203 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
2212 /* Ordinary insn: recognize it, get the operands via insn_extract
2213 and get the constraints. */
2215 insn_code_number = recog_memoized (insn);
2216 if (insn_code_number < 0)
2217 fatal_insn_not_found (insn);
2219 reload_n_operands = noperands = insn_n_operands[insn_code_number];
2220 n_alternatives = insn_n_alternatives[insn_code_number];
2221 /* Just return "no reloads" if insn has no operands with constraints. */
2222 if (n_alternatives == 0)
2224 insn_extract (insn);
2225 for (i = 0; i < noperands; i++)
2227 constraints[i] = constraints1[i]
2228 = insn_operand_constraint[insn_code_number][i];
2229 operand_mode[i] = insn_operand_mode[insn_code_number][i];
2238 /* If we will need to know, later, whether some pair of operands
2239 are the same, we must compare them now and save the result.
2240 Reloading the base and index registers will clobber them
2241 and afterward they will fail to match. */
2243 for (i = 0; i < noperands; i++)
2248 substed_operand[i] = recog_operand[i];
2251 modified[i] = RELOAD_READ;
2253 /* Scan this operand's constraint to see if it is an output operand,
2254 an in-out operand, is commutative, or should match another. */
2259 modified[i] = RELOAD_WRITE;
2261 modified[i] = RELOAD_READ_WRITE;
2264 /* The last operand should not be marked commutative. */
2265 if (i == noperands - 1)
2267 if (this_insn_is_asm)
2268 warning_for_asm (this_insn,
2269 "`%%' constraint used with last operand");
2276 else if (c >= '0' && c <= '9')
2279 operands_match[c][i]
2280 = operands_match_p (recog_operand[c], recog_operand[i]);
2282 /* An operand may not match itself. */
2285 if (this_insn_is_asm)
2286 warning_for_asm (this_insn,
2287 "operand %d has constraint %d", i, c);
2292 /* If C can be commuted with C+1, and C might need to match I,
2293 then C+1 might also need to match I. */
2294 if (commutative >= 0)
2296 if (c == commutative || c == commutative + 1)
2298 int other = c + (c == commutative ? 1 : -1);
2299 operands_match[other][i]
2300 = operands_match_p (recog_operand[other], recog_operand[i]);
2302 if (i == commutative || i == commutative + 1)
2304 int other = i + (i == commutative ? 1 : -1);
2305 operands_match[c][other]
2306 = operands_match_p (recog_operand[c], recog_operand[other]);
2308 /* Note that C is supposed to be less than I.
2309 No need to consider altering both C and I because in
2310 that case we would alter one into the other. */
2316 /* Examine each operand that is a memory reference or memory address
2317 and reload parts of the addresses into index registers.
2318 Also here any references to pseudo regs that didn't get hard regs
2319 but are equivalent to constants get replaced in the insn itself
2320 with those constants. Nobody will ever see them again.
2322 Finally, set up the preferred classes of each operand. */
2324 for (i = 0; i < noperands; i++)
2326 register RTX_CODE code = GET_CODE (recog_operand[i]);
2328 address_reloaded[i] = 0;
2329 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2330 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2333 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2334 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2337 if (constraints[i][0] == 'p')
2339 find_reloads_address (VOIDmode, NULL_PTR,
2340 recog_operand[i], recog_operand_loc[i],
2341 i, operand_type[i], ind_levels);
2342 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2344 else if (code == MEM)
2346 if (find_reloads_address (GET_MODE (recog_operand[i]),
2347 recog_operand_loc[i],
2348 XEXP (recog_operand[i], 0),
2349 &XEXP (recog_operand[i], 0),
2350 i, address_type[i], ind_levels))
2351 address_reloaded[i] = 1;
2352 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2354 else if (code == SUBREG)
2355 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2356 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2359 && &SET_DEST (set) == recog_operand_loc[i]);
2360 else if (code == REG)
2362 /* This is equivalent to calling find_reloads_toplev.
2363 The code is duplicated for speed.
2364 When we find a pseudo always equivalent to a constant,
2365 we replace it by the constant. We must be sure, however,
2366 that we don't try to replace it in the insn in which it
2368 register int regno = REGNO (recog_operand[i]);
2369 if (reg_equiv_constant[regno] != 0
2370 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2371 substed_operand[i] = recog_operand[i]
2372 = reg_equiv_constant[regno];
2373 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2374 that feeds this insn. */
2375 if (reg_equiv_mem[regno] != 0)
2376 substed_operand[i] = recog_operand[i]
2377 = reg_equiv_mem[regno];
2379 if (reg_equiv_address[regno] != 0)
2381 /* If reg_equiv_address is not a constant address, copy it,
2382 since it may be shared. */
2383 rtx address = reg_equiv_address[regno];
2385 if (rtx_varies_p (address))
2386 address = copy_rtx (address);
2388 /* If this is an output operand, we must output a CLOBBER
2389 after INSN so find_equiv_reg knows REGNO is being written.
2390 Mark this insn specially, do we can put our output reloads
2393 if (modified[i] != RELOAD_READ)
2394 PUT_MODE (emit_insn_after (gen_rtx (CLOBBER, VOIDmode,
2399 *recog_operand_loc[i] = recog_operand[i]
2400 = gen_rtx (MEM, GET_MODE (recog_operand[i]), address);
2401 RTX_UNCHANGING_P (recog_operand[i])
2402 = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
2403 find_reloads_address (GET_MODE (recog_operand[i]),
2404 recog_operand_loc[i],
2405 XEXP (recog_operand[i], 0),
2406 &XEXP (recog_operand[i], 0),
2407 i, address_type[i], ind_levels);
2408 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2411 /* If the operand is still a register (we didn't replace it with an
2412 equivalent), get the preferred class to reload it into. */
2413 code = GET_CODE (recog_operand[i]);
2415 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
2416 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2418 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
2419 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2422 /* If this is simply a copy from operand 1 to operand 0, merge the
2423 preferred classes for the operands. */
2424 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2425 && recog_operand[1] == SET_SRC (set))
2427 preferred_class[0] = preferred_class[1]
2428 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2429 pref_or_nothing[0] |= pref_or_nothing[1];
2430 pref_or_nothing[1] |= pref_or_nothing[0];
2433 /* Now see what we need for pseudo-regs that didn't get hard regs
2434 or got the wrong kind of hard reg. For this, we must consider
2435 all the operands together against the register constraints. */
2437 best = MAX_RECOG_OPERANDS + 300;
2440 goal_alternative_swapped = 0;
2443 /* The constraints are made of several alternatives.
2444 Each operand's constraint looks like foo,bar,... with commas
2445 separating the alternatives. The first alternatives for all
2446 operands go together, the second alternatives go together, etc.
2448 First loop over alternatives. */
2450 for (this_alternative_number = 0;
2451 this_alternative_number < n_alternatives;
2452 this_alternative_number++)
2454 /* Loop over operands for one constraint alternative. */
2455 /* LOSERS counts those that don't fit this alternative
2456 and would require loading. */
2458 /* BAD is set to 1 if it some operand can't fit this alternative
2459 even after reloading. */
2461 /* REJECT is a count of how undesirable this alternative says it is
2462 if any reloading is required. If the alternative matches exactly
2463 then REJECT is ignored, but otherwise it gets this much
2464 counted against it in addition to the reloading needed. Each
2465 ? counts three times here since we want the disparaging caused by
2466 a bad register class to only count 1/3 as much. */
2469 this_earlyclobber = 0;
2471 for (i = 0; i < noperands; i++)
2473 register char *p = constraints[i];
2474 register int win = 0;
2475 /* 0 => this operand can be reloaded somehow for this alternative */
2477 /* 0 => this operand can be reloaded if the alternative allows regs. */
2480 register rtx operand = recog_operand[i];
2482 /* Nonzero means this is a MEM that must be reloaded into a reg
2483 regardless of what the constraint says. */
2484 int force_reload = 0;
2486 int earlyclobber = 0;
2488 /* If the operand is a SUBREG, extract
2489 the REG or MEM (or maybe even a constant) within.
2490 (Constants can occur as a result of reg_equiv_constant.) */
2492 while (GET_CODE (operand) == SUBREG)
2494 offset += SUBREG_WORD (operand);
2495 operand = SUBREG_REG (operand);
2496 /* Force reload if this is not a register or if there may may
2497 be a problem accessing the register in the outer mode. */
2498 if (GET_CODE (operand) != REG
2499 #if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
2500 /* ??? The comment below clearly does not match the code.
2501 What the code below actually does is set force_reload
2502 for a paradoxical subreg of a pseudo. rms and kenner
2503 can't see the point of doing this. */
2504 /* Nonparadoxical subreg of a pseudoreg.
2505 Don't to load the full width if on this machine
2506 we expected the fetch to extend. */
2507 || ((GET_MODE_SIZE (operand_mode[i])
2508 > GET_MODE_SIZE (GET_MODE (operand)))
2509 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
2511 /* Subreg of a hard reg which can't handle the subreg's mode
2512 or which would handle that mode in the wrong number of
2513 registers for subregging to work. */
2514 || (REGNO (operand) < FIRST_PSEUDO_REGISTER
2515 && (! HARD_REGNO_MODE_OK (REGNO (operand),
2517 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2518 && (GET_MODE_SIZE (GET_MODE (operand))
2520 && ((GET_MODE_SIZE (GET_MODE (operand))
2522 != HARD_REGNO_NREGS (REGNO (operand),
2523 GET_MODE (operand)))))))
2527 this_alternative[i] = (int) NO_REGS;
2528 this_alternative_win[i] = 0;
2529 this_alternative_offmemok[i] = 0;
2530 this_alternative_earlyclobber[i] = 0;
2531 this_alternative_matches[i] = -1;
2533 /* An empty constraint or empty alternative
2534 allows anything which matched the pattern. */
2535 if (*p == 0 || *p == ',')
2538 /* Scan this alternative's specs for this operand;
2539 set WIN if the operand fits any letter in this alternative.
2540 Otherwise, clear BADOP if this operand could
2541 fit some letter after reloads,
2542 or set WINREG if this operand could fit after reloads
2543 provided the constraint allows some registers. */
2545 while (*p && (c = *p++) != ',')
2554 /* The last operand should not be marked commutative. */
2555 if (i != noperands - 1)
2568 /* Ignore rest of this alternative as far as
2569 reloading is concerned. */
2570 while (*p && *p != ',') p++;
2579 this_alternative_matches[i] = c;
2580 /* We are supposed to match a previous operand.
2581 If we do, we win if that one did.
2582 If we do not, count both of the operands as losers.
2583 (This is too conservative, since most of the time
2584 only a single reload insn will be needed to make
2585 the two operands win. As a result, this alternative
2586 may be rejected when it is actually desirable.) */
2587 if ((swapped && (c != commutative || i != commutative + 1))
2588 /* If we are matching as if two operands were swapped,
2589 also pretend that operands_match had been computed
2591 But if I is the second of those and C is the first,
2592 don't exchange them, because operands_match is valid
2593 only on one side of its diagonal. */
2595 [(c == commutative || c == commutative + 1)
2596 ? 2*commutative + 1 - c : c]
2597 [(i == commutative || i == commutative + 1)
2598 ? 2*commutative + 1 - i : i])
2599 : operands_match[c][i])
2600 win = this_alternative_win[c];
2603 /* Operands don't match. */
2605 /* Retroactively mark the operand we had to match
2606 as a loser, if it wasn't already. */
2607 if (this_alternative_win[c])
2609 this_alternative_win[c] = 0;
2610 if (this_alternative[c] == (int) NO_REGS)
2612 /* But count the pair only once in the total badness of
2613 this alternative, if the pair can be a dummy reload. */
2615 = find_dummy_reload (recog_operand[i], recog_operand[c],
2616 recog_operand_loc[i], recog_operand_loc[c],
2617 this_alternative[c], -1);
2622 /* This can be fixed with reloads if the operand
2623 we are supposed to match can be fixed with reloads. */
2625 this_alternative[i] = this_alternative[c];
2629 /* All necessary reloads for an address_operand
2630 were handled in find_reloads_address. */
2631 this_alternative[i] = (int) ALL_REGS;
2638 if (GET_CODE (operand) == MEM
2639 || (GET_CODE (operand) == REG
2640 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2641 && reg_renumber[REGNO (operand)] < 0))
2643 if (CONSTANT_P (operand))
2648 if (GET_CODE (operand) == MEM
2649 && ! address_reloaded[i]
2650 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2651 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2656 if (GET_CODE (operand) == MEM
2657 && ! address_reloaded[i]
2658 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2659 || GET_CODE (XEXP (operand, 0)) == POST_INC))
2663 /* Memory operand whose address is not offsettable. */
2667 if (GET_CODE (operand) == MEM
2668 && ! (ind_levels ? offsettable_memref_p (operand)
2669 : offsettable_nonstrict_memref_p (operand))
2670 /* Certain mem addresses will become offsettable
2671 after they themselves are reloaded. This is important;
2672 we don't want our own handling of unoffsettables
2673 to override the handling of reg_equiv_address. */
2674 && !(GET_CODE (XEXP (operand, 0)) == REG
2676 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
2680 /* Memory operand whose address is offsettable. */
2684 if ((GET_CODE (operand) == MEM
2685 /* If IND_LEVELS, find_reloads_address won't reload a
2686 pseudo that didn't get a hard reg, so we have to
2687 reject that case. */
2688 && (ind_levels ? offsettable_memref_p (operand)
2689 : offsettable_nonstrict_memref_p (operand)))
2690 /* Certain mem addresses will become offsettable
2691 after they themselves are reloaded. This is important;
2692 we don't want our own handling of unoffsettables
2693 to override the handling of reg_equiv_address. */
2694 || (GET_CODE (operand) == MEM
2695 && GET_CODE (XEXP (operand, 0)) == REG
2697 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))
2698 || (GET_CODE (operand) == REG
2699 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2700 && reg_renumber[REGNO (operand)] < 0))
2702 if (CONSTANT_P (operand) || GET_CODE (operand) == MEM)
2708 /* Output operand that is stored before the need for the
2709 input operands (and their index registers) is over. */
2710 earlyclobber = 1, this_earlyclobber = 1;
2714 /* Match any floating double constant, but only if
2715 we can examine the bits of it reliably. */
2716 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
2717 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
2718 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
2720 if (GET_CODE (operand) == CONST_DOUBLE)
2725 if (GET_CODE (operand) == CONST_DOUBLE)
2731 if (GET_CODE (operand) == CONST_DOUBLE
2732 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
2737 if (GET_CODE (operand) == CONST_INT
2738 || (GET_CODE (operand) == CONST_DOUBLE
2739 && GET_MODE (operand) == VOIDmode))
2742 if (CONSTANT_P (operand)
2743 #ifdef LEGITIMATE_PIC_OPERAND_P
2744 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
2751 if (GET_CODE (operand) == CONST_INT
2752 || (GET_CODE (operand) == CONST_DOUBLE
2753 && GET_MODE (operand) == VOIDmode))
2765 if (GET_CODE (operand) == CONST_INT
2766 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
2776 /* A PLUS is never a valid operand, but reload can make
2777 it from a register when eliminating registers. */
2778 && GET_CODE (operand) != PLUS
2779 /* A SCRATCH is not a valid operand. */
2780 && GET_CODE (operand) != SCRATCH
2781 #ifdef LEGITIMATE_PIC_OPERAND_P
2782 && (! CONSTANT_P (operand)
2784 || LEGITIMATE_PIC_OPERAND_P (operand))
2786 && (GENERAL_REGS == ALL_REGS
2787 || GET_CODE (operand) != REG
2788 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
2789 && reg_renumber[REGNO (operand)] < 0)))
2791 /* Drop through into 'r' case */
2795 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
2798 #ifdef EXTRA_CONSTRAINT
2804 if (EXTRA_CONSTRAINT (operand, c))
2811 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
2814 if (GET_MODE (operand) == BLKmode)
2817 if (GET_CODE (operand) == REG
2818 && reg_fits_class_p (operand, this_alternative[i],
2819 offset, GET_MODE (recog_operand[i])))
2826 /* If this operand could be handled with a reg,
2827 and some reg is allowed, then this operand can be handled. */
2828 if (winreg && this_alternative[i] != (int) NO_REGS)
2831 /* Record which operands fit this alternative. */
2832 this_alternative_earlyclobber[i] = earlyclobber;
2833 if (win && ! force_reload)
2834 this_alternative_win[i] = 1;
2837 this_alternative_offmemok[i] = offmemok;
2841 /* Alternative loses if it has no regs for a reg operand. */
2842 if (GET_CODE (operand) == REG
2843 && this_alternative[i] == (int) NO_REGS
2844 && this_alternative_matches[i] < 0)
2847 /* Alternative loses if it requires a type of reload not
2848 permitted for this insn. We can always reload SCRATCH
2849 and objects with a REG_UNUSED note. */
2850 if (GET_CODE (operand) != SCRATCH
2851 && modified[i] != RELOAD_READ && no_output_reloads
2852 && ! find_reg_note (insn, REG_UNUSED, operand))
2854 else if (modified[i] != RELOAD_WRITE && no_input_reloads)
2857 /* We prefer to reload pseudos over reloading other things,
2858 since such reloads may be able to be eliminated later.
2859 If we are reloading a SCRATCH, we won't be generating any
2860 insns, just using a register, so it is also preferred.
2861 So bump REJECT in other cases. */
2862 if (GET_CODE (operand) != REG && GET_CODE (operand) != SCRATCH)
2866 /* If this operand is a pseudo register that didn't get a hard
2867 reg and this alternative accepts some register, see if the
2868 class that we want is a subset of the preferred class for this
2869 register. If not, but it intersects that class, use the
2870 preferred class instead. If it does not intersect the preferred
2871 class, show that usage of this alternative should be discouraged;
2872 it will be discouraged more still if the register is `preferred
2873 or nothing'. We do this because it increases the chance of
2874 reusing our spill register in a later insn and avoiding a pair
2875 of memory stores and loads.
2877 Don't bother with this if this alternative will accept this
2880 Don't do this for a multiword operand, if
2881 we have to worry about small classes, because making reg groups
2882 harder to allocate is asking for trouble.
2884 Don't do this if the preferred class has only one register
2885 because we might otherwise exhaust the class. */
2888 if (! win && this_alternative[i] != (int) NO_REGS
2889 #ifdef SMALL_REGISTER_CLASSES
2890 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2892 && reg_class_size[(int) preferred_class[i]] > 1)
2894 if (! reg_class_subset_p (this_alternative[i],
2895 preferred_class[i]))
2897 /* Since we don't have a way of forming the intersection,
2898 we just do something special if the preferred class
2899 is a subset of the class we have; that's the most
2900 common case anyway. */
2901 if (reg_class_subset_p (preferred_class[i],
2902 this_alternative[i]))
2903 this_alternative[i] = (int) preferred_class[i];
2905 reject += (1 + pref_or_nothing[i]);
2910 /* Now see if any output operands that are marked "earlyclobber"
2911 in this alternative conflict with any input operands
2912 or any memory addresses. */
2914 for (i = 0; i < noperands; i++)
2915 if (this_alternative_earlyclobber[i]
2916 && this_alternative_win[i])
2918 struct decomposition early_data;
2920 early_data = decompose (recog_operand[i]);
2922 if (modified[i] == RELOAD_READ)
2924 if (this_insn_is_asm)
2925 warning_for_asm (this_insn,
2926 "`&' constraint used with input operand");
2932 if (this_alternative[i] == NO_REGS)
2934 this_alternative_earlyclobber[i] = 0;
2935 if (this_insn_is_asm)
2936 error_for_asm (this_insn,
2937 "`&' constraint used with no register class");
2942 for (j = 0; j < noperands; j++)
2943 /* Is this an input operand or a memory ref? */
2944 if ((GET_CODE (recog_operand[j]) == MEM
2945 || modified[j] != RELOAD_WRITE)
2947 /* Ignore things like match_operator operands. */
2948 && *constraints1[j] != 0
2949 /* Don't count an input operand that is constrained to match
2950 the early clobber operand. */
2951 && ! (this_alternative_matches[j] == i
2952 && rtx_equal_p (recog_operand[i], recog_operand[j]))
2953 /* Is it altered by storing the earlyclobber operand? */
2954 && !immune_p (recog_operand[j], recog_operand[i], early_data))
2956 /* If the output is in a single-reg class,
2957 it's costly to reload it, so reload the input instead. */
2958 if (reg_class_size[this_alternative[i]] == 1
2959 && (GET_CODE (recog_operand[j]) == REG
2960 || GET_CODE (recog_operand[j]) == SUBREG))
2963 this_alternative_win[j] = 0;
2968 /* If an earlyclobber operand conflicts with something,
2969 it must be reloaded, so request this and count the cost. */
2973 this_alternative_win[i] = 0;
2974 for (j = 0; j < noperands; j++)
2975 if (this_alternative_matches[j] == i
2976 && this_alternative_win[j])
2978 this_alternative_win[j] = 0;
2984 /* If one alternative accepts all the operands, no reload required,
2985 choose that alternative; don't consider the remaining ones. */
2988 /* Unswap these so that they are never swapped at `finish'. */
2989 if (commutative >= 0)
2991 recog_operand[commutative] = substed_operand[commutative];
2992 recog_operand[commutative + 1]
2993 = substed_operand[commutative + 1];
2995 for (i = 0; i < noperands; i++)
2997 goal_alternative_win[i] = 1;
2998 goal_alternative[i] = this_alternative[i];
2999 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3000 goal_alternative_matches[i] = this_alternative_matches[i];
3001 goal_alternative_earlyclobber[i]
3002 = this_alternative_earlyclobber[i];
3004 goal_alternative_number = this_alternative_number;
3005 goal_alternative_swapped = swapped;
3006 goal_earlyclobber = this_earlyclobber;
3010 /* REJECT, set by the ! and ? constraint characters and when a register
3011 would be reloaded into a non-preferred class, discourages the use of
3012 this alternative for a reload goal. REJECT is incremented by three
3013 for each ? and one for each non-preferred class. */
3014 losers = losers * 3 + reject;
3016 /* If this alternative can be made to work by reloading,
3017 and it needs less reloading than the others checked so far,
3018 record it as the chosen goal for reloading. */
3019 if (! bad && best > losers)
3021 for (i = 0; i < noperands; i++)
3023 goal_alternative[i] = this_alternative[i];
3024 goal_alternative_win[i] = this_alternative_win[i];
3025 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3026 goal_alternative_matches[i] = this_alternative_matches[i];
3027 goal_alternative_earlyclobber[i]
3028 = this_alternative_earlyclobber[i];
3030 goal_alternative_swapped = swapped;
3032 goal_alternative_number = this_alternative_number;
3033 goal_earlyclobber = this_earlyclobber;
3037 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3038 then we need to try each alternative twice,
3039 the second time matching those two operands
3040 as if we had exchanged them.
3041 To do this, really exchange them in operands.
3043 If we have just tried the alternatives the second time,
3044 return operands to normal and drop through. */
3046 if (commutative >= 0)
3051 register enum reg_class tclass;
3054 recog_operand[commutative] = substed_operand[commutative + 1];
3055 recog_operand[commutative + 1] = substed_operand[commutative];
3057 tclass = preferred_class[commutative];
3058 preferred_class[commutative] = preferred_class[commutative + 1];
3059 preferred_class[commutative + 1] = tclass;
3061 t = pref_or_nothing[commutative];
3062 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3063 pref_or_nothing[commutative + 1] = t;
3065 bcopy (constraints1, constraints, noperands * sizeof (char *));
3070 recog_operand[commutative] = substed_operand[commutative];
3071 recog_operand[commutative + 1] = substed_operand[commutative + 1];
3075 /* The operands don't meet the constraints.
3076 goal_alternative describes the alternative
3077 that we could reach by reloading the fewest operands.
3078 Reload so as to fit it. */
3080 if (best == MAX_RECOG_OPERANDS + 300)
3082 /* No alternative works with reloads?? */
3083 if (insn_code_number >= 0)
3085 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3086 /* Avoid further trouble with this insn. */
3087 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3092 /* Jump to `finish' from above if all operands are valid already.
3093 In that case, goal_alternative_win is all 1. */
3096 /* Right now, for any pair of operands I and J that are required to match,
3098 goal_alternative_matches[J] is I.
3099 Set up goal_alternative_matched as the inverse function:
3100 goal_alternative_matched[I] = J. */
3102 for (i = 0; i < noperands; i++)
3103 goal_alternative_matched[i] = -1;
3105 for (i = 0; i < noperands; i++)
3106 if (! goal_alternative_win[i]
3107 && goal_alternative_matches[i] >= 0)
3108 goal_alternative_matched[goal_alternative_matches[i]] = i;
3110 /* If the best alternative is with operands 1 and 2 swapped,
3111 consider them swapped before reporting the reloads. Update the
3112 operand numbers of any reloads already pushed. */
3114 if (goal_alternative_swapped)
3118 tem = substed_operand[commutative];
3119 substed_operand[commutative] = substed_operand[commutative + 1];
3120 substed_operand[commutative + 1] = tem;
3121 tem = recog_operand[commutative];
3122 recog_operand[commutative] = recog_operand[commutative + 1];
3123 recog_operand[commutative + 1] = tem;
3125 for (i = 0; i < n_reloads; i++)
3127 if (reload_opnum[i] == commutative)
3128 reload_opnum[i] = commutative + 1;
3129 else if (reload_opnum[i] == commutative + 1)
3130 reload_opnum[i] = commutative;
3134 /* Perform whatever substitutions on the operands we are supposed
3135 to make due to commutativity or replacement of registers
3136 with equivalent constants or memory slots. */
3138 for (i = 0; i < noperands; i++)
3140 *recog_operand_loc[i] = substed_operand[i];
3141 /* While we are looping on operands, initialize this. */
3142 operand_reloadnum[i] = -1;
3144 /* If this is an earlyclobber operand, we need to widen the scope.
3145 The reload must remain valid from the start of the insn being
3146 reloaded until after the operand is stored into its destination.
3147 We approximate this with RELOAD_OTHER even though we know that we
3148 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3150 One special case that is worth checking is when we have an
3151 output that is earlyclobber but isn't used past the insn (typically
3152 a SCRATCH). In this case, we only need have the reload live
3153 through the insn itself, but not for any of our input or output
3156 In any case, anything needed to address this operand can remain
3157 however they were previously categorized. */
3159 if (goal_alternative_earlyclobber[i])
3161 = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
3162 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3165 /* Any constants that aren't allowed and can't be reloaded
3166 into registers are here changed into memory references. */
3167 for (i = 0; i < noperands; i++)
3168 if (! goal_alternative_win[i]
3169 && CONSTANT_P (recog_operand[i])
3170 && (PREFERRED_RELOAD_CLASS (recog_operand[i],
3171 (enum reg_class) goal_alternative[i])
3173 && operand_mode[i] != VOIDmode)
3175 *recog_operand_loc[i] = recog_operand[i]
3176 = find_reloads_toplev (force_const_mem (operand_mode[i],
3178 i, address_type[i], ind_levels, 0);
3179 if (alternative_allows_memconst (constraints1[i],
3180 goal_alternative_number))
3181 goal_alternative_win[i] = 1;
3184 /* Now record reloads for all the operands that need them. */
3185 for (i = 0; i < noperands; i++)
3186 if (! goal_alternative_win[i])
3188 /* Operands that match previous ones have already been handled. */
3189 if (goal_alternative_matches[i] >= 0)
3191 /* Handle an operand with a nonoffsettable address
3192 appearing where an offsettable address will do
3193 by reloading the address into a base register. */
3194 else if (goal_alternative_matched[i] == -1
3195 && goal_alternative_offmemok[i]
3196 && GET_CODE (recog_operand[i]) == MEM)
3198 operand_reloadnum[i]
3199 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
3200 &XEXP (recog_operand[i], 0), NULL_PTR,
3201 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
3202 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3203 reload_inc[operand_reloadnum[i]]
3204 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
3206 /* If this operand is an output, we will have made any
3207 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3208 now we are treating part of the operand as an input, so
3209 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3211 if (operand_type[i] == RELOAD_FOR_OUTPUT)
3212 for (j = 0; j < n_reloads; j++)
3213 if (reload_opnum[j] == i
3214 && reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3215 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
3217 else if (goal_alternative_matched[i] == -1)
3218 operand_reloadnum[i] =
3219 push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3220 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3221 (modified[i] != RELOAD_WRITE ?
3222 recog_operand_loc[i] : 0),
3223 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
3224 (enum reg_class) goal_alternative[i],
3225 (modified[i] == RELOAD_WRITE
3226 ? VOIDmode : operand_mode[i]),
3227 (modified[i] == RELOAD_READ
3228 ? VOIDmode : operand_mode[i]),
3229 (insn_code_number < 0 ? 0
3230 : insn_operand_strict_low[insn_code_number][i]),
3231 0, i, operand_type[i]);
3232 /* In a matching pair of operands, one must be input only
3233 and the other must be output only.
3234 Pass the input operand as IN and the other as OUT. */
3235 else if (modified[i] == RELOAD_READ
3236 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3238 operand_reloadnum[i]
3239 = push_reload (recog_operand[i],
3240 recog_operand[goal_alternative_matched[i]],
3241 recog_operand_loc[i],
3242 recog_operand_loc[goal_alternative_matched[i]],
3243 (enum reg_class) goal_alternative[i],
3245 operand_mode[goal_alternative_matched[i]],
3246 0, 0, i, RELOAD_OTHER);
3247 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3249 else if (modified[i] == RELOAD_WRITE
3250 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3252 operand_reloadnum[goal_alternative_matched[i]]
3253 = push_reload (recog_operand[goal_alternative_matched[i]],
3255 recog_operand_loc[goal_alternative_matched[i]],
3256 recog_operand_loc[i],
3257 (enum reg_class) goal_alternative[i],
3258 operand_mode[goal_alternative_matched[i]],
3260 0, 0, i, RELOAD_OTHER);
3261 operand_reloadnum[i] = output_reloadnum;
3263 else if (insn_code_number >= 0)
3267 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3268 /* Avoid further trouble with this insn. */
3269 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3274 else if (goal_alternative_matched[i] < 0
3275 && goal_alternative_matches[i] < 0
3278 /* For each non-matching operand that's a MEM or a pseudo-register
3279 that didn't get a hard register, make an optional reload.
3280 This may get done even if the insn needs no reloads otherwise. */
3282 rtx operand = recog_operand[i];
3284 while (GET_CODE (operand) == SUBREG)
3285 operand = XEXP (operand, 0);
3286 if ((GET_CODE (operand) == MEM
3287 || (GET_CODE (operand) == REG
3288 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3289 && (enum reg_class) goal_alternative[i] != NO_REGS
3290 && ! no_input_reloads
3291 /* Optional output reloads don't do anything and we mustn't
3292 make in-out reloads on insns that are not permitted output
3294 && (modified[i] == RELOAD_READ
3295 || (modified[i] == RELOAD_READ_WRITE && ! no_output_reloads)))
3296 operand_reloadnum[i]
3297 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3298 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3299 (modified[i] != RELOAD_WRITE
3300 ? recog_operand_loc[i] : 0),
3301 (modified[i] != RELOAD_READ
3302 ? recog_operand_loc[i] : 0),
3303 (enum reg_class) goal_alternative[i],
3304 (modified[i] == RELOAD_WRITE
3305 ? VOIDmode : operand_mode[i]),
3306 (modified[i] == RELOAD_READ
3307 ? VOIDmode : operand_mode[i]),
3308 (insn_code_number < 0 ? 0
3309 : insn_operand_strict_low[insn_code_number][i]),
3310 1, i, operand_type[i]);
3312 else if (goal_alternative_matches[i] >= 0
3313 && goal_alternative_win[goal_alternative_matches[i]]
3314 && modified[i] == RELOAD_READ
3315 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3316 && ! no_input_reloads && ! no_output_reloads
3319 /* Similarly, make an optional reload for a pair of matching
3320 objects that are in MEM or a pseudo that didn't get a hard reg. */
3322 rtx operand = recog_operand[i];
3324 while (GET_CODE (operand) == SUBREG)
3325 operand = XEXP (operand, 0);
3326 if ((GET_CODE (operand) == MEM
3327 || (GET_CODE (operand) == REG
3328 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3329 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3331 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3332 = push_reload (recog_operand[goal_alternative_matches[i]],
3334 recog_operand_loc[goal_alternative_matches[i]],
3335 recog_operand_loc[i],
3336 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3337 operand_mode[goal_alternative_matches[i]],
3339 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3342 /* Record the values of the earlyclobber operands for the caller. */
3343 if (goal_earlyclobber)
3344 for (i = 0; i < noperands; i++)
3345 if (goal_alternative_earlyclobber[i])
3346 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3348 /* If this insn pattern contains any MATCH_DUP's, make sure that
3349 they will be substituted if the operands they match are substituted.
3350 Also do now any substitutions we already did on the operands.
3352 Don't do this if we aren't making replacements because we might be
3353 propagating things allocated by frame pointer elimination into places
3354 it doesn't expect. */
3356 if (insn_code_number >= 0 && replace)
3357 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3359 int opno = recog_dup_num[i];
3360 *recog_dup_loc[i] = *recog_operand_loc[opno];
3361 if (operand_reloadnum[opno] >= 0)
3362 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3363 insn_operand_mode[insn_code_number][opno]);
3367 /* This loses because reloading of prior insns can invalidate the equivalence
3368 (or at least find_equiv_reg isn't smart enough to find it any more),
3369 causing this insn to need more reload regs than it needed before.
3370 It may be too late to make the reload regs available.
3371 Now this optimization is done safely in choose_reload_regs. */
3373 /* For each reload of a reg into some other class of reg,
3374 search for an existing equivalent reg (same value now) in the right class.
3375 We can use it as long as we don't need to change its contents. */
3376 for (i = 0; i < n_reloads; i++)
3377 if (reload_reg_rtx[i] == 0
3378 && reload_in[i] != 0
3379 && GET_CODE (reload_in[i]) == REG
3380 && reload_out[i] == 0)
3383 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3384 static_reload_reg_p, 0, reload_inmode[i]);
3385 /* Prevent generation of insn to load the value
3386 because the one we found already has the value. */
3387 if (reload_reg_rtx[i])
3388 reload_in[i] = reload_reg_rtx[i];
3392 /* Perhaps an output reload can be combined with another
3393 to reduce needs by one. */
3394 if (!goal_earlyclobber)
3397 /* If we have a pair of reloads for parts of an address, they are reloading
3398 the same object, the operands themselves were not reloaded, and they
3399 are for two operands that are supposed to match, merge the reloads and
3400 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3402 for (i = 0; i < n_reloads; i++)
3406 for (j = i + 1; j < n_reloads; j++)
3407 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3408 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
3409 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
3410 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3411 && rtx_equal_p (reload_in[i], reload_in[j])
3412 && (operand_reloadnum[reload_opnum[i]] < 0
3413 || reload_optional[operand_reloadnum[reload_opnum[i]]])
3414 && (operand_reloadnum[reload_opnum[j]] < 0
3415 || reload_optional[operand_reloadnum[reload_opnum[j]]])
3416 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
3417 || (goal_alternative_matches[reload_opnum[j]]
3418 == reload_opnum[i])))
3420 for (k = 0; k < n_replacements; k++)
3421 if (replacements[k].what == j)
3422 replacements[k].what = i;
3424 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3429 /* Scan all the reloads and update their type.
3430 If a reload is for the address of an operand and we didn't reload
3431 that operand, change the type. Similarly, change the operand number
3432 of a reload when two operands match. If a reload is optional, treat it
3433 as though the operand isn't reloaded.
3435 ??? This latter case is somewhat odd because if we do the optional
3436 reload, it means the object is hanging around. Thus we need only
3437 do the address reload if the optional reload was NOT done.
3439 Change secondary reloads to be the address type of their operand, not
3442 If an operand's reload is now RELOAD_OTHER, change any
3443 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3444 RELOAD_FOR_OTHER_ADDRESS. */
3446 for (i = 0; i < n_reloads; i++)
3448 if (reload_secondary_p[i]
3449 && reload_when_needed[i] == operand_type[reload_opnum[i]])
3450 reload_when_needed[i] = address_type[reload_opnum[i]];
3452 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3453 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
3454 && (operand_reloadnum[reload_opnum[i]] < 0
3455 || reload_optional[operand_reloadnum[reload_opnum[i]]]))
3456 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3458 if (reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3459 && operand_reloadnum[reload_opnum[i]] >= 0
3460 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
3462 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
3464 if (goal_alternative_matches[reload_opnum[i]] >= 0)
3465 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
3468 /* See if we have any reloads that are now allowed to be merged
3469 because we've changed when the reload is needed to
3470 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3471 check for the most common cases. */
3473 for (i = 0; i < n_reloads; i++)
3474 if (reload_in[i] != 0 && reload_out[i] == 0
3475 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
3476 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
3477 for (j = 0; j < n_reloads; j++)
3478 if (i != j && reload_in[j] != 0 && reload_out[j] == 0
3479 && reload_when_needed[j] == reload_when_needed[i]
3480 && MATCHES (reload_in[i], reload_in[j]))
3482 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
3483 transfer_replacements (i, j);
3487 #else /* no REGISTER_CONSTRAINTS */
3489 int insn_code_number;
3490 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
3492 rtx body = PATTERN (insn);
3496 n_earlyclobbers = 0;
3497 replace_reloads = replace;
3500 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3501 Store the operand values in RECOG_OPERAND and the locations
3502 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3503 Return if the insn needs no reload processing. */
3505 switch (GET_CODE (body))
3516 noperands = asm_noperands (body);
3519 /* This insn is an `asm' with operands.
3520 First, find out how many operands, and allocate space. */
3522 insn_code_number = -1;
3523 /* ??? This is a bug! ???
3524 Give up and delete this insn if it has too many operands. */
3525 if (noperands > MAX_RECOG_OPERANDS)
3528 /* Now get the operand values out of the insn. */
3530 decode_asm_operands (body, recog_operand, recog_operand_loc,
3531 NULL_PTR, NULL_PTR);
3536 /* Ordinary insn: recognize it, allocate space for operands and
3537 constraints, and get them out via insn_extract. */
3539 insn_code_number = recog_memoized (insn);
3540 noperands = insn_n_operands[insn_code_number];
3541 insn_extract (insn);
3547 for (i = 0; i < noperands; i++)
3549 register RTX_CODE code = GET_CODE (recog_operand[i]);
3550 int is_set_dest = GET_CODE (body) == SET && (i == 0);
3552 if (insn_code_number >= 0)
3553 if (insn_operand_address_p[insn_code_number][i])
3554 find_reloads_address (VOIDmode, NULL_PTR,
3555 recog_operand[i], recog_operand_loc[i],
3556 i, RELOAD_FOR_INPUT, ind_levels);
3558 /* In these cases, we can't tell if the operand is an input
3559 or an output, so be conservative. In practice it won't be
3563 find_reloads_address (GET_MODE (recog_operand[i]),
3564 recog_operand_loc[i],
3565 XEXP (recog_operand[i], 0),
3566 &XEXP (recog_operand[i], 0),
3567 i, RELOAD_OTHER, ind_levels);
3569 recog_operand[i] = *recog_operand_loc[i]
3570 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
3571 ind_levels, is_set_dest);
3574 register int regno = REGNO (recog_operand[i]);
3575 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3576 recog_operand[i] = *recog_operand_loc[i]
3577 = reg_equiv_constant[regno];
3578 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3579 that feeds this insn. */
3580 if (reg_equiv_mem[regno] != 0)
3581 recog_operand[i] = *recog_operand_loc[i]
3582 = reg_equiv_mem[regno];
3587 /* Perhaps an output reload can be combined with another
3588 to reduce needs by one. */
3589 if (!goal_earlyclobber)
3591 #endif /* no REGISTER_CONSTRAINTS */
3594 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3595 accepts a memory operand with constant address. */
3598 alternative_allows_memconst (constraint, altnum)
3603 /* Skip alternatives before the one requested. */
3606 while (*constraint++ != ',');
3609 /* Scan the requested alternative for 'm' or 'o'.
3610 If one of them is present, this alternative accepts memory constants. */
3611 while ((c = *constraint++) && c != ',' && c != '#')
3612 if (c == 'm' || c == 'o')
3617 /* Scan X for memory references and scan the addresses for reloading.
3618 Also checks for references to "constant" regs that we want to eliminate
3619 and replaces them with the values they stand for.
3620 We may alter X destructively if it contains a reference to such.
3621 If X is just a constant reg, we return the equivalent value
3624 IND_LEVELS says how many levels of indirect addressing this machine
3627 OPNUM and TYPE identify the purpose of the reload.
3629 IS_SET_DEST is true if X is the destination of a SET, which is not
3630 appropriate to be replaced by a constant. */
3633 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest)
3636 enum reload_type type;
3640 register RTX_CODE code = GET_CODE (x);
3642 register char *fmt = GET_RTX_FORMAT (code);
3647 /* This code is duplicated for speed in find_reloads. */
3648 register int regno = REGNO (x);
3649 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3650 x = reg_equiv_constant[regno];
3652 /* This creates (subreg (mem...)) which would cause an unnecessary
3653 reload of the mem. */
3654 else if (reg_equiv_mem[regno] != 0)
3655 x = reg_equiv_mem[regno];
3657 else if (reg_equiv_address[regno] != 0)
3659 /* If reg_equiv_address varies, it may be shared, so copy it. */
3660 rtx addr = reg_equiv_address[regno];
3662 if (rtx_varies_p (addr))
3663 addr = copy_rtx (addr);
3665 x = gen_rtx (MEM, GET_MODE (x), addr);
3666 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3667 find_reloads_address (GET_MODE (x), NULL_PTR,
3669 &XEXP (x, 0), opnum, type, ind_levels);
3676 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
3677 opnum, type, ind_levels);
3681 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
3683 /* Check for SUBREG containing a REG that's equivalent to a constant.
3684 If the constant has a known value, truncate it right now.
3685 Similarly if we are extracting a single-word of a multi-word
3686 constant. If the constant is symbolic, allow it to be substituted
3687 normally. push_reload will strip the subreg later. If the
3688 constant is VOIDmode, abort because we will lose the mode of
3689 the register (this should never happen because one of the cases
3690 above should handle it). */
3692 register int regno = REGNO (SUBREG_REG (x));
3695 if (subreg_lowpart_p (x)
3696 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3697 && reg_equiv_constant[regno] != 0
3698 && (tem = gen_lowpart_common (GET_MODE (x),
3699 reg_equiv_constant[regno])) != 0)
3702 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
3703 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3704 && reg_equiv_constant[regno] != 0
3705 && (tem = operand_subword (reg_equiv_constant[regno],
3707 GET_MODE (SUBREG_REG (x)))) != 0)
3710 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3711 && reg_equiv_constant[regno] != 0
3712 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
3715 /* If the subreg contains a reg that will be converted to a mem,
3716 convert the subreg to a narrower memref now.
3717 Otherwise, we would get (subreg (mem ...) ...),
3718 which would force reload of the mem.
3720 We also need to do this if there is an equivalent MEM that is
3721 not offsettable. In that case, alter_subreg would produce an
3722 invalid address on big-endian machines.
3724 For machines that extend byte loads, we must not reload using
3725 a wider mode if we have a paradoxical SUBREG. find_reloads will
3726 force a reload in that case. So we should not do anything here. */
3728 else if (regno >= FIRST_PSEUDO_REGISTER
3729 #if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
3730 && (GET_MODE_SIZE (GET_MODE (x))
3731 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3733 && (reg_equiv_address[regno] != 0
3734 || (reg_equiv_mem[regno] != 0
3735 && (! strict_memory_address_p (GET_MODE (x),
3736 XEXP (reg_equiv_mem[regno], 0))
3737 || ! offsettable_memref_p (reg_equiv_mem[regno])))))
3739 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
3740 rtx addr = (reg_equiv_address[regno] ? reg_equiv_address[regno]
3741 : XEXP (reg_equiv_mem[regno], 0));
3742 #if BYTES_BIG_ENDIAN
3744 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
3745 offset += MIN (size, UNITS_PER_WORD);
3746 size = GET_MODE_SIZE (GET_MODE (x));
3747 offset -= MIN (size, UNITS_PER_WORD);
3749 addr = plus_constant (addr, offset);
3750 x = gen_rtx (MEM, GET_MODE (x), addr);
3751 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3752 find_reloads_address (GET_MODE (x), NULL_PTR,
3754 &XEXP (x, 0), opnum, type, ind_levels);
3759 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3762 XEXP (x, i) = find_reloads_toplev (XEXP (x, i), opnum, type,
3763 ind_levels, is_set_dest);
3769 make_memloc (ad, regno)
3774 rtx tem = reg_equiv_address[regno];
3775 for (i = 0; i < n_memlocs; i++)
3776 if (rtx_equal_p (tem, XEXP (memlocs[i], 0)))
3779 /* If TEM might contain a pseudo, we must copy it to avoid
3780 modifying it when we do the substitution for the reload. */
3781 if (rtx_varies_p (tem))
3782 tem = copy_rtx (tem);
3784 tem = gen_rtx (MEM, GET_MODE (ad), tem);
3785 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3786 memlocs[n_memlocs++] = tem;
3790 /* Record all reloads needed for handling memory address AD
3791 which appears in *LOC in a memory reference to mode MODE
3792 which itself is found in location *MEMREFLOC.
3793 Note that we take shortcuts assuming that no multi-reg machine mode
3794 occurs as part of an address.
3796 OPNUM and TYPE specify the purpose of this reload.
3798 IND_LEVELS says how many levels of indirect addressing this machine
3801 Value is nonzero if this address is reloaded or replaced as a whole.
3802 This is interesting to the caller if the address is an autoincrement.
3804 Note that there is no verification that the address will be valid after
3805 this routine does its work. Instead, we rely on the fact that the address
3806 was valid when reload started. So we need only undo things that reload
3807 could have broken. These are wrong register types, pseudos not allocated
3808 to a hard register, and frame pointer elimination. */
3811 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels)
3812 enum machine_mode mode;
3817 enum reload_type type;
3823 /* If the address is a register, see if it is a legitimate address and
3824 reload if not. We first handle the cases where we need not reload
3825 or where we must reload in a non-standard way. */
3827 if (GET_CODE (ad) == REG)
3831 if (reg_equiv_constant[regno] != 0
3832 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
3834 *loc = ad = reg_equiv_constant[regno];
3838 else if (reg_equiv_address[regno] != 0)
3840 tem = make_memloc (ad, regno);
3841 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
3842 &XEXP (tem, 0), opnum, type, ind_levels);
3843 push_reload (tem, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
3844 GET_MODE (ad), VOIDmode, 0, 0,
3849 /* We can avoid a reload if the register's equivalent memory expression
3850 is valid as an indirect memory address. */
3852 else if (reg_equiv_mem[regno] != 0 && ind_levels > 0
3853 && strict_memory_address_p (mode, reg_equiv_mem[regno]))
3856 /* The only remaining case where we can avoid a reload is if this is a
3857 hard register that is valid as a base register and which is not the
3858 subject of a CLOBBER in this insn. */
3860 else if (regno < FIRST_PSEUDO_REGISTER && REGNO_OK_FOR_BASE_P (regno)
3861 && ! regno_clobbered_p (regno, this_insn))
3864 /* If we do not have one of the cases above, we must do the reload. */
3865 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
3866 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
3870 if (strict_memory_address_p (mode, ad))
3872 /* The address appears valid, so reloads are not needed.
3873 But the address may contain an eliminable register.
3874 This can happen because a machine with indirect addressing
3875 may consider a pseudo register by itself a valid address even when
3876 it has failed to get a hard reg.
3877 So do a tree-walk to find and eliminate all such regs. */
3879 /* But first quickly dispose of a common case. */
3880 if (GET_CODE (ad) == PLUS
3881 && GET_CODE (XEXP (ad, 1)) == CONST_INT
3882 && GET_CODE (XEXP (ad, 0)) == REG
3883 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
3886 subst_reg_equivs_changed = 0;
3887 *loc = subst_reg_equivs (ad);
3889 if (! subst_reg_equivs_changed)
3892 /* Check result for validity after substitution. */
3893 if (strict_memory_address_p (mode, ad))
3897 /* The address is not valid. We have to figure out why. One possibility
3898 is that it is itself a MEM. This can happen when the frame pointer is
3899 being eliminated, a pseudo is not allocated to a hard register, and the
3900 offset between the frame and stack pointers is not its initial value.
3901 In that case the pseudo will have been replaced by a MEM referring to
3902 the stack pointer. */
3903 if (GET_CODE (ad) == MEM)
3905 /* First ensure that the address in this MEM is valid. Then, unless
3906 indirect addresses are valid, reload the MEM into a register. */
3908 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
3909 opnum, type, ind_levels == 0 ? 0 : ind_levels - 1);
3911 /* If tem was changed, then we must create a new memory reference to
3912 hold it and store it back into memrefloc. */
3913 if (tem != ad && memrefloc)
3915 *memrefloc = copy_rtx (*memrefloc);
3916 copy_replacements (tem, XEXP (*memrefloc, 0));
3917 loc = &XEXP (*memrefloc, 0);
3920 /* Check similar cases as for indirect addresses as above except
3921 that we can allow pseudos and a MEM since they should have been
3922 taken care of above. */
3925 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
3926 || GET_CODE (XEXP (tem, 0)) == MEM
3927 || ! (GET_CODE (XEXP (tem, 0)) == REG
3928 || (GET_CODE (XEXP (tem, 0)) == PLUS
3929 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
3930 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
3932 /* Must use TEM here, not AD, since it is the one that will
3933 have any subexpressions reloaded, if needed. */
3934 push_reload (tem, NULL_RTX, loc, NULL_PTR,
3935 BASE_REG_CLASS, GET_MODE (tem), VOIDmode, 0,
3943 /* If we have address of a stack slot but it's not valid
3944 (displacement is too large), compute the sum in a register. */
3945 else if (GET_CODE (ad) == PLUS
3946 && (XEXP (ad, 0) == frame_pointer_rtx
3947 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3948 || XEXP (ad, 0) == arg_pointer_rtx
3950 || XEXP (ad, 0) == stack_pointer_rtx)
3951 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
3953 /* Unshare the MEM rtx so we can safely alter it. */
3956 rtx oldref = *memrefloc;
3957 *memrefloc = copy_rtx (*memrefloc);
3958 loc = &XEXP (*memrefloc, 0);
3960 if (double_reg_address_ok)
3962 /* Unshare the sum as well. */
3963 *loc = ad = copy_rtx (ad);
3964 /* Reload the displacement into an index reg.
3965 We assume the frame pointer or arg pointer is a base reg. */
3966 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
3967 INDEX_REG_CLASS, GET_MODE (ad), opnum,
3972 /* If the sum of two regs is not necessarily valid,
3973 reload the sum into a base reg.
3974 That will at least work. */
3975 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode,
3976 opnum, type, ind_levels);
3981 /* If we have an indexed stack slot, there are three possible reasons why
3982 it might be invalid: The index might need to be reloaded, the address
3983 might have been made by frame pointer elimination and hence have a
3984 constant out of range, or both reasons might apply.
3986 We can easily check for an index needing reload, but even if that is the
3987 case, we might also have an invalid constant. To avoid making the
3988 conservative assumption and requiring two reloads, we see if this address
3989 is valid when not interpreted strictly. If it is, the only problem is
3990 that the index needs a reload and find_reloads_address_1 will take care
3993 There is still a case when we might generate an extra reload,
3994 however. In certain cases eliminate_regs will return a MEM for a REG
3995 (see the code there for details). In those cases, memory_address_p
3996 applied to our address will return 0 so we will think that our offset
3997 must be too large. But it might indeed be valid and the only problem
3998 is that a MEM is present where a REG should be. This case should be
3999 very rare and there doesn't seem to be any way to avoid it.
4001 If we decide to do something here, it must be that
4002 `double_reg_address_ok' is true and that this address rtl was made by
4003 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4004 rework the sum so that the reload register will be added to the index.
4005 This is safe because we know the address isn't shared.
4007 We check for fp/ap/sp as both the first and second operand of the
4010 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4011 && GET_CODE (XEXP (ad, 0)) == PLUS
4012 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4013 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4014 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4016 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4017 && ! memory_address_p (mode, ad))
4019 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
4020 plus_constant (XEXP (XEXP (ad, 0), 0),
4021 INTVAL (XEXP (ad, 1))),
4022 XEXP (XEXP (ad, 0), 1));
4023 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4024 GET_MODE (ad), opnum, type, ind_levels);
4025 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, type, 0);
4030 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4031 && GET_CODE (XEXP (ad, 0)) == PLUS
4032 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4033 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4034 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4036 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4037 && ! memory_address_p (mode, ad))
4039 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
4040 plus_constant (XEXP (XEXP (ad, 0), 1),
4041 INTVAL (XEXP (ad, 1))),
4042 XEXP (XEXP (ad, 0), 0));
4043 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4044 GET_MODE (ad), opnum, type, ind_levels);
4045 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, type, 0);
4050 /* See if address becomes valid when an eliminable register
4051 in a sum is replaced. */
4054 if (GET_CODE (ad) == PLUS)
4055 tem = subst_indexed_address (ad);
4056 if (tem != ad && strict_memory_address_p (mode, tem))
4058 /* Ok, we win that way. Replace any additional eliminable
4061 subst_reg_equivs_changed = 0;
4062 tem = subst_reg_equivs (tem);
4064 /* Make sure that didn't make the address invalid again. */
4066 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4073 /* If constants aren't valid addresses, reload the constant address
4075 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4077 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4078 Unshare it so we can safely alter it. */
4079 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4080 && CONSTANT_POOL_ADDRESS_P (ad))
4082 rtx oldref = *memrefloc;
4083 *memrefloc = copy_rtx (*memrefloc);
4084 loc = &XEXP (*memrefloc, 0);
4087 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
4092 return find_reloads_address_1 (ad, 0, loc, opnum, type, ind_levels);
4095 /* Find all pseudo regs appearing in AD
4096 that are eliminable in favor of equivalent values
4097 and do not have hard regs; replace them by their equivalents. */
4100 subst_reg_equivs (ad)
4103 register RTX_CODE code = GET_CODE (ad);
4121 register int regno = REGNO (ad);
4123 if (reg_equiv_constant[regno] != 0)
4125 subst_reg_equivs_changed = 1;
4126 return reg_equiv_constant[regno];
4132 /* Quickly dispose of a common case. */
4133 if (XEXP (ad, 0) == frame_pointer_rtx
4134 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4138 fmt = GET_RTX_FORMAT (code);
4139 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4141 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i));
4145 /* Compute the sum of X and Y, making canonicalizations assumed in an
4146 address, namely: sum constant integers, surround the sum of two
4147 constants with a CONST, put the constant as the second operand, and
4148 group the constant on the outermost sum.
4150 This routine assumes both inputs are already in canonical form. */
4157 enum machine_mode mode = GET_MODE (x);
4159 if (mode == VOIDmode)
4160 mode = GET_MODE (y);
4162 if (mode == VOIDmode)
4165 if (GET_CODE (x) == CONST_INT)
4166 return plus_constant (y, INTVAL (x));
4167 else if (GET_CODE (y) == CONST_INT)
4168 return plus_constant (x, INTVAL (y));
4169 else if (CONSTANT_P (x))
4170 tem = x, x = y, y = tem;
4172 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
4173 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
4175 /* Note that if the operands of Y are specified in the opposite
4176 order in the recursive calls below, infinite recursion will occur. */
4177 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
4178 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
4180 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4181 constant will have been placed second. */
4182 if (CONSTANT_P (x) && CONSTANT_P (y))
4184 if (GET_CODE (x) == CONST)
4186 if (GET_CODE (y) == CONST)
4189 return gen_rtx (CONST, VOIDmode, gen_rtx (PLUS, mode, x, y));
4192 return gen_rtx (PLUS, mode, x, y);
4195 /* If ADDR is a sum containing a pseudo register that should be
4196 replaced with a constant (from reg_equiv_constant),
4197 return the result of doing so, and also apply the associative
4198 law so that the result is more likely to be a valid address.
4199 (But it is not guaranteed to be one.)
4201 Note that at most one register is replaced, even if more are
4202 replaceable. Also, we try to put the result into a canonical form
4203 so it is more likely to be a valid address.
4205 In all other cases, return ADDR. */
4208 subst_indexed_address (addr)
4211 rtx op0 = 0, op1 = 0, op2 = 0;
4215 if (GET_CODE (addr) == PLUS)
4217 /* Try to find a register to replace. */
4218 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
4219 if (GET_CODE (op0) == REG
4220 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
4221 && reg_renumber[regno] < 0
4222 && reg_equiv_constant[regno] != 0)
4223 op0 = reg_equiv_constant[regno];
4224 else if (GET_CODE (op1) == REG
4225 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
4226 && reg_renumber[regno] < 0
4227 && reg_equiv_constant[regno] != 0)
4228 op1 = reg_equiv_constant[regno];
4229 else if (GET_CODE (op0) == PLUS
4230 && (tem = subst_indexed_address (op0)) != op0)
4232 else if (GET_CODE (op1) == PLUS
4233 && (tem = subst_indexed_address (op1)) != op1)
4238 /* Pick out up to three things to add. */
4239 if (GET_CODE (op1) == PLUS)
4240 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
4241 else if (GET_CODE (op0) == PLUS)
4242 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4244 /* Compute the sum. */
4246 op1 = form_sum (op1, op2);
4248 op0 = form_sum (op0, op1);
4255 /* Record the pseudo registers we must reload into hard registers
4256 in a subexpression of a would-be memory address, X.
4257 (This function is not called if the address we find is strictly valid.)
4258 CONTEXT = 1 means we are considering regs as index regs,
4259 = 0 means we are considering them as base regs.
4261 OPNUM and TYPE specify the purpose of any reloads made.
4263 IND_LEVELS says how many levels of indirect addressing are
4264 supported at this point in the address.
4266 We return nonzero if X, as a whole, is reloaded or replaced. */
4268 /* Note that we take shortcuts assuming that no multi-reg machine mode
4269 occurs as part of an address.
4270 Also, this is not fully machine-customizable; it works for machines
4271 such as vaxes and 68000's and 32000's, but other possible machines
4272 could have addressing modes that this does not handle right. */
4275 find_reloads_address_1 (x, context, loc, opnum, type, ind_levels)
4280 enum reload_type type;
4283 register RTX_CODE code = GET_CODE (x);
4287 register rtx op0 = XEXP (x, 0);
4288 register rtx op1 = XEXP (x, 1);
4289 register RTX_CODE code0 = GET_CODE (op0);
4290 register RTX_CODE code1 = GET_CODE (op1);
4291 if (code0 == MULT || code0 == SIGN_EXTEND || code1 == MEM)
4293 find_reloads_address_1 (op0, 1, &XEXP (x, 0), opnum, type,
4295 find_reloads_address_1 (op1, 0, &XEXP (x, 1), opnum, type,
4298 else if (code1 == MULT || code1 == SIGN_EXTEND || code0 == MEM)
4300 find_reloads_address_1 (op0, 0, &XEXP (x, 0), opnum, type,
4302 find_reloads_address_1 (op1, 1, &XEXP (x, 1), opnum, type,
4305 else if (code0 == CONST_INT || code0 == CONST
4306 || code0 == SYMBOL_REF || code0 == LABEL_REF)
4307 find_reloads_address_1 (op1, 0, &XEXP (x, 1), opnum, type, ind_levels);
4308 else if (code1 == CONST_INT || code1 == CONST
4309 || code1 == SYMBOL_REF || code1 == LABEL_REF)
4310 find_reloads_address_1 (op0, 0, &XEXP (x, 0), opnum, type, ind_levels);
4311 else if (code0 == REG && code1 == REG)
4313 if (REG_OK_FOR_INDEX_P (op0)
4314 && REG_OK_FOR_BASE_P (op1))
4316 else if (REG_OK_FOR_INDEX_P (op1)
4317 && REG_OK_FOR_BASE_P (op0))
4319 else if (REG_OK_FOR_BASE_P (op1))
4320 find_reloads_address_1 (op0, 1, &XEXP (x, 0), opnum, type,
4322 else if (REG_OK_FOR_BASE_P (op0))
4323 find_reloads_address_1 (op1, 1, &XEXP (x, 1), opnum, type,
4325 else if (REG_OK_FOR_INDEX_P (op1))
4326 find_reloads_address_1 (op0, 0, &XEXP (x, 0), opnum, type,
4328 else if (REG_OK_FOR_INDEX_P (op0))
4329 find_reloads_address_1 (op1, 0, &XEXP (x, 1), opnum, type,
4333 find_reloads_address_1 (op0, 1, &XEXP (x, 0), opnum, type,
4335 find_reloads_address_1 (op1, 0, &XEXP (x, 1), opnum, type,
4339 else if (code0 == REG)
4341 find_reloads_address_1 (op0, 1, &XEXP (x, 0), opnum, type,
4343 find_reloads_address_1 (op1, 0, &XEXP (x, 1), opnum, type,
4346 else if (code1 == REG)
4348 find_reloads_address_1 (op1, 1, &XEXP (x, 1), opnum, type,
4350 find_reloads_address_1 (op0, 0, &XEXP (x, 0), opnum, type,
4354 else if (code == POST_INC || code == POST_DEC
4355 || code == PRE_INC || code == PRE_DEC)
4357 if (GET_CODE (XEXP (x, 0)) == REG)
4359 register int regno = REGNO (XEXP (x, 0));
4363 /* A register that is incremented cannot be constant! */
4364 if (regno >= FIRST_PSEUDO_REGISTER
4365 && reg_equiv_constant[regno] != 0)
4368 /* Handle a register that is equivalent to a memory location
4369 which cannot be addressed directly. */
4370 if (reg_equiv_address[regno] != 0)
4372 rtx tem = make_memloc (XEXP (x, 0), regno);
4373 /* First reload the memory location's address. */
4374 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
4375 &XEXP (tem, 0), opnum, type, ind_levels);
4376 /* Put this inside a new increment-expression. */
4377 x = gen_rtx (GET_CODE (x), GET_MODE (x), tem);
4378 /* Proceed to reload that, as if it contained a register. */
4381 /* If we have a hard register that is ok as an index,
4382 don't make a reload. If an autoincrement of a nice register
4383 isn't "valid", it must be that no autoincrement is "valid".
4384 If that is true and something made an autoincrement anyway,
4385 this must be a special context where one is allowed.
4386 (For example, a "push" instruction.)
4387 We can't improve this address, so leave it alone. */
4389 /* Otherwise, reload the autoincrement into a suitable hard reg
4390 and record how much to increment by. */
4392 if (reg_renumber[regno] >= 0)
4393 regno = reg_renumber[regno];
4394 if ((regno >= FIRST_PSEUDO_REGISTER
4395 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4396 : REGNO_OK_FOR_BASE_P (regno))))
4401 = push_reload (x, NULL_RTX, loc, NULL_PTR,
4402 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4403 GET_MODE (x), GET_MODE (x), VOIDmode, 0,
4405 reload_inc[reloadnum]
4406 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
4411 /* Update the REG_INC notes. */
4413 for (link = REG_NOTES (this_insn);
4414 link; link = XEXP (link, 1))
4415 if (REG_NOTE_KIND (link) == REG_INC
4416 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
4417 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4422 else if (GET_CODE (XEXP (x, 0)) == MEM)
4424 /* This is probably the result of a substitution, by eliminate_regs,
4425 of an equivalent address for a pseudo that was not allocated to a
4426 hard register. Verify that the specified address is valid and
4427 reload it into a register. */
4428 rtx tem = XEXP (x, 0);
4432 /* Since we know we are going to reload this item, don't decrement
4433 for the indirection level.
4435 Note that this is actually conservative: it would be slightly
4436 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4438 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
4439 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
4440 opnum, type, ind_levels);
4442 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
4443 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4444 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4445 reload_inc[reloadnum]
4446 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
4448 link = FIND_REG_INC_NOTE (this_insn, tem);
4450 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4455 else if (code == MEM)
4457 /* This is probably the result of a substitution, by eliminate_regs,
4458 of an equivalent address for a pseudo that was not allocated to a
4459 hard register. Verify that the specified address is valid and reload
4462 Since we know we are going to reload this item, don't decrement
4463 for the indirection level.
4465 Note that this is actually conservative: it would be slightly more
4466 efficient to use the value of SPILL_INDIRECT_LEVELS from
4469 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
4470 opnum, type, ind_levels);
4472 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
4473 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4474 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4477 else if (code == REG)
4479 register int regno = REGNO (x);
4481 if (reg_equiv_constant[regno] != 0)
4483 find_reloads_address_part (reg_equiv_constant[regno], loc,
4484 (context ? INDEX_REG_CLASS
4486 GET_MODE (x), opnum, type, ind_levels);
4490 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4491 that feeds this insn. */
4492 if (reg_equiv_mem[regno] != 0)
4494 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
4495 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4496 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4500 if (reg_equiv_address[regno] != 0)
4502 x = make_memloc (x, regno);
4503 find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0),
4504 opnum, type, ind_levels);
4507 if (reg_renumber[regno] >= 0)
4508 regno = reg_renumber[regno];
4509 if ((regno >= FIRST_PSEUDO_REGISTER
4510 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4511 : REGNO_OK_FOR_BASE_P (regno))))
4513 push_reload (x, NULL_RTX, loc, NULL_PTR,
4514 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4515 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4519 /* If a register appearing in an address is the subject of a CLOBBER
4520 in this insn, reload it into some other register to be safe.
4521 The CLOBBER is supposed to make the register unavailable
4522 from before this insn to after it. */
4523 if (regno_clobbered_p (regno, this_insn))
4525 push_reload (x, NULL_RTX, loc, NULL_PTR,
4526 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4527 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4533 register char *fmt = GET_RTX_FORMAT (code);
4535 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4538 find_reloads_address_1 (XEXP (x, i), context, &XEXP (x, i),
4539 opnum, type, ind_levels);
4546 /* X, which is found at *LOC, is a part of an address that needs to be
4547 reloaded into a register of class CLASS. If X is a constant, or if
4548 X is a PLUS that contains a constant, check that the constant is a
4549 legitimate operand and that we are supposed to be able to load
4550 it into the register.
4552 If not, force the constant into memory and reload the MEM instead.
4554 MODE is the mode to use, in case X is an integer constant.
4556 OPNUM and TYPE describe the purpose of any reloads made.
4558 IND_LEVELS says how many levels of indirect addressing this machine
4562 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
4565 enum reg_class class;
4566 enum machine_mode mode;
4568 enum reload_type type;
4572 && (! LEGITIMATE_CONSTANT_P (x)
4573 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
4575 rtx tem = x = force_const_mem (mode, x);
4576 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4577 opnum, type, ind_levels);
4580 else if (GET_CODE (x) == PLUS
4581 && CONSTANT_P (XEXP (x, 1))
4582 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
4583 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
4585 rtx tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
4587 x = gen_rtx (PLUS, GET_MODE (x), XEXP (x, 0), tem);
4588 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4589 opnum, type, ind_levels);
4592 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
4593 mode, VOIDmode, 0, 0, opnum, type);
4596 /* Substitute into the current INSN the registers into which we have reloaded
4597 the things that need reloading. The array `replacements'
4598 says contains the locations of all pointers that must be changed
4599 and says what to replace them with.
4601 Return the rtx that X translates into; usually X, but modified. */
4608 for (i = 0; i < n_replacements; i++)
4610 register struct replacement *r = &replacements[i];
4611 register rtx reloadreg = reload_reg_rtx[r->what];
4614 /* Encapsulate RELOADREG so its machine mode matches what
4615 used to be there. */
4616 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
4617 reloadreg = gen_lowpart_common (r->mode, reloadreg);
4619 /* If we are putting this into a SUBREG and RELOADREG is a
4620 SUBREG, we would be making nested SUBREGs, so we have to fix
4621 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
4623 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
4625 if (GET_MODE (*r->subreg_loc)
4626 == GET_MODE (SUBREG_REG (reloadreg)))
4627 *r->subreg_loc = SUBREG_REG (reloadreg);
4630 *r->where = SUBREG_REG (reloadreg);
4631 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
4635 *r->where = reloadreg;
4637 /* If reload got no reg and isn't optional, something's wrong. */
4638 else if (! reload_optional[r->what])
4643 /* Make a copy of any replacements being done into X and move those copies
4644 to locations in Y, a copy of X. We only look at the highest level of
4648 copy_replacements (x, y)
4653 enum rtx_code code = GET_CODE (x);
4654 char *fmt = GET_RTX_FORMAT (code);
4655 struct replacement *r;
4657 /* We can't support X being a SUBREG because we might then need to know its
4658 location if something inside it was replaced. */
4662 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4664 for (j = 0; j < n_replacements; j++)
4666 if (replacements[j].subreg_loc == &XEXP (x, i))
4668 r = &replacements[n_replacements++];
4669 r->where = replacements[j].where;
4670 r->subreg_loc = &XEXP (y, i);
4671 r->what = replacements[j].what;
4672 r->mode = replacements[j].mode;
4674 else if (replacements[j].where == &XEXP (x, i))
4676 r = &replacements[n_replacements++];
4677 r->where = &XEXP (y, i);
4679 r->what = replacements[j].what;
4680 r->mode = replacements[j].mode;
4685 /* If LOC was scheduled to be replaced by something, return the replacement.
4686 Otherwise, return *LOC. */
4689 find_replacement (loc)
4692 struct replacement *r;
4694 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
4696 rtx reloadreg = reload_reg_rtx[r->what];
4698 if (reloadreg && r->where == loc)
4700 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
4701 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
4705 else if (reloadreg && r->subreg_loc == loc)
4707 /* RELOADREG must be either a REG or a SUBREG.
4709 ??? Is it actually still ever a SUBREG? If so, why? */
4711 if (GET_CODE (reloadreg) == REG)
4712 return gen_rtx (REG, GET_MODE (*loc),
4713 REGNO (reloadreg) + SUBREG_WORD (*loc));
4714 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
4717 return gen_rtx (SUBREG, GET_MODE (*loc), SUBREG_REG (reloadreg),
4718 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
4725 /* Return nonzero if register in range [REGNO, ENDREGNO)
4726 appears either explicitly or implicitly in X
4727 other than being stored into.
4729 References contained within the substructure at LOC do not count.
4730 LOC may be zero, meaning don't ignore anything.
4732 This is similar to refers_to_regno_p in rtlanal.c except that we
4733 look at equivalences for pseudos that didn't get hard registers. */
4736 refers_to_regno_for_reload_p (regno, endregno, x, loc)
4737 int regno, endregno;
4742 register RTX_CODE code;
4749 code = GET_CODE (x);
4756 /* If this is a pseudo, a hard register must not have been allocated.
4757 X must therefore either be a constant or be in memory. */
4758 if (i >= FIRST_PSEUDO_REGISTER)
4760 if (reg_equiv_memory_loc[i])
4761 return refers_to_regno_for_reload_p (regno, endregno,
4762 reg_equiv_memory_loc[i],
4765 if (reg_equiv_constant[i])
4771 return (endregno > i
4772 && regno < i + (i < FIRST_PSEUDO_REGISTER
4773 ? HARD_REGNO_NREGS (i, GET_MODE (x))
4777 /* If this is a SUBREG of a hard reg, we can see exactly which
4778 registers are being modified. Otherwise, handle normally. */
4779 if (GET_CODE (SUBREG_REG (x)) == REG
4780 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
4782 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
4784 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
4785 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
4787 return endregno > inner_regno && regno < inner_endregno;
4793 if (&SET_DEST (x) != loc
4794 /* Note setting a SUBREG counts as referring to the REG it is in for
4795 a pseudo but not for hard registers since we can
4796 treat each word individually. */
4797 && ((GET_CODE (SET_DEST (x)) == SUBREG
4798 && loc != &SUBREG_REG (SET_DEST (x))
4799 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
4800 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
4801 && refers_to_regno_for_reload_p (regno, endregno,
4802 SUBREG_REG (SET_DEST (x)),
4804 || (GET_CODE (SET_DEST (x)) != REG
4805 && refers_to_regno_for_reload_p (regno, endregno,
4806 SET_DEST (x), loc))))
4809 if (code == CLOBBER || loc == &SET_SRC (x))
4815 /* X does not match, so try its subexpressions. */
4817 fmt = GET_RTX_FORMAT (code);
4818 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4820 if (fmt[i] == 'e' && loc != &XEXP (x, i))
4828 if (refers_to_regno_for_reload_p (regno, endregno,
4832 else if (fmt[i] == 'E')
4835 for (j = XVECLEN (x, i) - 1; j >=0; j--)
4836 if (loc != &XVECEXP (x, i, j)
4837 && refers_to_regno_for_reload_p (regno, endregno,
4838 XVECEXP (x, i, j), loc))
4845 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
4846 we check if any register number in X conflicts with the relevant register
4847 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
4848 contains a MEM (we don't bother checking for memory addresses that can't
4849 conflict because we expect this to be a rare case.
4851 This function is similar to reg_overlap_mention_p in rtlanal.c except
4852 that we look at equivalences for pseudos that didn't get hard registers. */
4855 reg_overlap_mentioned_for_reload_p (x, in)
4858 int regno, endregno;
4860 if (GET_CODE (x) == SUBREG)
4862 regno = REGNO (SUBREG_REG (x));
4863 if (regno < FIRST_PSEUDO_REGISTER)
4864 regno += SUBREG_WORD (x);
4866 else if (GET_CODE (x) == REG)
4870 /* If this is a pseudo, it must not have been assigned a hard register.
4871 Therefore, it must either be in memory or be a constant. */
4873 if (regno >= FIRST_PSEUDO_REGISTER)
4875 if (reg_equiv_memory_loc[regno])
4876 return refers_to_mem_for_reload_p (in);
4877 else if (reg_equiv_constant[regno])
4882 else if (CONSTANT_P (x))
4884 else if (GET_CODE (x) == MEM)
4885 return refers_to_mem_for_reload_p (in);
4886 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
4887 || GET_CODE (x) == CC0)
4888 return reg_mentioned_p (x, in);
4892 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
4893 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
4895 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
4898 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
4902 refers_to_mem_for_reload_p (x)
4908 if (GET_CODE (x) == MEM)
4911 if (GET_CODE (x) == REG)
4912 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
4913 && reg_equiv_memory_loc[REGNO (x)]);
4915 fmt = GET_RTX_FORMAT (GET_CODE (x));
4916 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4918 && (GET_CODE (XEXP (x, i)) == MEM
4919 || refers_to_mem_for_reload_p (XEXP (x, i))))
4925 /* Check the insns before INSN to see if there is a suitable register
4926 containing the same value as GOAL.
4927 If OTHER is -1, look for a register in class CLASS.
4928 Otherwise, just see if register number OTHER shares GOAL's value.
4930 Return an rtx for the register found, or zero if none is found.
4932 If RELOAD_REG_P is (short *)1,
4933 we reject any hard reg that appears in reload_reg_rtx
4934 because such a hard reg is also needed coming into this insn.
4936 If RELOAD_REG_P is any other nonzero value,
4937 it is a vector indexed by hard reg number
4938 and we reject any hard reg whose element in the vector is nonnegative
4939 as well as any that appears in reload_reg_rtx.
4941 If GOAL is zero, then GOALREG is a register number; we look
4942 for an equivalent for that register.
4944 MODE is the machine mode of the value we want an equivalence for.
4945 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
4947 This function is used by jump.c as well as in the reload pass.
4949 If GOAL is the sum of the stack pointer and a constant, we treat it
4950 as if it were a constant except that sp is required to be unchanging. */
4953 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
4956 enum reg_class class;
4958 short *reload_reg_p;
4960 enum machine_mode mode;
4962 register rtx p = insn;
4963 rtx goaltry, valtry, value, where;
4965 register int regno = -1;
4969 int goal_mem_addr_varies = 0;
4970 int need_stable_sp = 0;
4976 else if (GET_CODE (goal) == REG)
4977 regno = REGNO (goal);
4978 else if (GET_CODE (goal) == MEM)
4980 enum rtx_code code = GET_CODE (XEXP (goal, 0));
4981 if (MEM_VOLATILE_P (goal))
4983 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
4985 /* An address with side effects must be reexecuted. */
4996 else if (CONSTANT_P (goal))
4998 else if (GET_CODE (goal) == PLUS
4999 && XEXP (goal, 0) == stack_pointer_rtx
5000 && CONSTANT_P (XEXP (goal, 1)))
5001 goal_const = need_stable_sp = 1;
5005 /* On some machines, certain regs must always be rejected
5006 because they don't behave the way ordinary registers do. */
5008 #ifdef OVERLAPPING_REGNO_P
5009 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5010 && OVERLAPPING_REGNO_P (regno))
5014 /* Scan insns back from INSN, looking for one that copies
5015 a value into or out of GOAL.
5016 Stop and give up if we reach a label. */
5021 if (p == 0 || GET_CODE (p) == CODE_LABEL)
5023 if (GET_CODE (p) == INSN
5024 /* If we don't want spill regs ... */
5025 && (! (reload_reg_p != 0
5026 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
5027 /* ... then ignore insns introduced by reload; they aren't useful
5028 and can cause results in reload_as_needed to be different
5029 from what they were when calculating the need for spills.
5030 If we notice an input-reload insn here, we will reject it below,
5031 but it might hide a usable equivalent. That makes bad code.
5032 It may even abort: perhaps no reg was spilled for this insn
5033 because it was assumed we would find that equivalent. */
5034 || INSN_UID (p) < reload_first_uid))
5037 pat = single_set (p);
5038 /* First check for something that sets some reg equal to GOAL. */
5041 && true_regnum (SET_SRC (pat)) == regno
5042 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5045 && true_regnum (SET_DEST (pat)) == regno
5046 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
5048 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
5049 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5051 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
5052 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
5054 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
5055 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
5056 /* If we are looking for a constant,
5057 and something equivalent to that constant was copied
5058 into a reg, we can use that reg. */
5059 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5061 && rtx_equal_p (XEXP (tem, 0), goal)
5062 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5063 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5065 && GET_CODE (SET_DEST (pat)) == REG
5066 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5067 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5068 && GET_CODE (goal) == CONST_INT
5069 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
5071 && rtx_equal_p (goal, goaltry)
5072 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
5074 && (valueno = true_regnum (valtry)) >= 0)
5075 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5077 && GET_CODE (SET_DEST (pat)) == REG
5078 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5079 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5080 && GET_CODE (goal) == CONST_INT
5081 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
5083 && rtx_equal_p (goal, goaltry)
5085 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
5086 && (valueno = true_regnum (valtry)) >= 0)))
5089 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
5090 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
5100 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5101 (or copying VALUE into GOAL, if GOAL is also a register).
5102 Now verify that VALUE is really valid. */
5104 /* VALUENO is the register number of VALUE; a hard register. */
5106 /* Don't try to re-use something that is killed in this insn. We want
5107 to be able to trust REG_UNUSED notes. */
5108 if (find_reg_note (where, REG_UNUSED, value))
5111 /* If we propose to get the value from the stack pointer or if GOAL is
5112 a MEM based on the stack pointer, we need a stable SP. */
5113 if (valueno == STACK_POINTER_REGNUM
5114 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
5118 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5119 if (GET_MODE (value) != mode)
5122 /* Reject VALUE if it was loaded from GOAL
5123 and is also a register that appears in the address of GOAL. */
5125 if (goal_mem && value == SET_DEST (PATTERN (where))
5126 && refers_to_regno_for_reload_p (valueno,
5128 + HARD_REGNO_NREGS (valueno, mode)),
5132 /* Reject registers that overlap GOAL. */
5134 if (!goal_mem && !goal_const
5135 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
5136 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
5139 /* Reject VALUE if it is one of the regs reserved for reloads.
5140 Reload1 knows how to reuse them anyway, and it would get
5141 confused if we allocated one without its knowledge.
5142 (Now that insns introduced by reload are ignored above,
5143 this case shouldn't happen, but I'm not positive.) */
5145 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
5146 && reload_reg_p[valueno] >= 0)
5149 /* On some machines, certain regs must always be rejected
5150 because they don't behave the way ordinary registers do. */
5152 #ifdef OVERLAPPING_REGNO_P
5153 if (OVERLAPPING_REGNO_P (valueno))
5157 nregs = HARD_REGNO_NREGS (regno, mode);
5158 valuenregs = HARD_REGNO_NREGS (valueno, mode);
5160 /* Reject VALUE if it is a register being used for an input reload
5161 even if it is not one of those reserved. */
5163 if (reload_reg_p != 0)
5166 for (i = 0; i < n_reloads; i++)
5167 if (reload_reg_rtx[i] != 0 && reload_in[i])
5169 int regno1 = REGNO (reload_reg_rtx[i]);
5170 int nregs1 = HARD_REGNO_NREGS (regno1,
5171 GET_MODE (reload_reg_rtx[i]));
5172 if (regno1 < valueno + valuenregs
5173 && regno1 + nregs1 > valueno)
5179 goal_mem_addr_varies = rtx_addr_varies_p (goal);
5181 /* Now verify that the values of GOAL and VALUE remain unaltered
5182 until INSN is reached. */
5191 /* Don't trust the conversion past a function call
5192 if either of the two is in a call-clobbered register, or memory. */
5193 if (GET_CODE (p) == CALL_INSN
5194 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5195 && call_used_regs[regno])
5197 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5198 && call_used_regs[valueno])
5204 #ifdef INSN_CLOBBERS_REGNO_P
5205 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5206 && INSN_CLOBBERS_REGNO_P (p, valueno))
5207 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5208 && INSN_CLOBBERS_REGNO_P (p, regno)))
5212 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
5214 /* If this insn P stores in either GOAL or VALUE, return 0.
5215 If GOAL is a memory ref and this insn writes memory, return 0.
5216 If GOAL is a memory ref and its address is not constant,
5217 and this insn P changes a register used in GOAL, return 0. */
5220 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
5222 register rtx dest = SET_DEST (pat);
5223 while (GET_CODE (dest) == SUBREG
5224 || GET_CODE (dest) == ZERO_EXTRACT
5225 || GET_CODE (dest) == SIGN_EXTRACT
5226 || GET_CODE (dest) == STRICT_LOW_PART)
5227 dest = XEXP (dest, 0);
5228 if (GET_CODE (dest) == REG)
5230 register int xregno = REGNO (dest);
5232 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5233 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5236 if (xregno < regno + nregs && xregno + xnregs > regno)
5238 if (xregno < valueno + valuenregs
5239 && xregno + xnregs > valueno)
5241 if (goal_mem_addr_varies
5242 && reg_overlap_mentioned_for_reload_p (dest, goal))
5245 else if (goal_mem && GET_CODE (dest) == MEM
5246 && ! push_operand (dest, GET_MODE (dest)))
5248 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
5251 else if (GET_CODE (pat) == PARALLEL)
5254 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
5256 register rtx v1 = XVECEXP (pat, 0, i);
5257 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
5259 register rtx dest = SET_DEST (v1);
5260 while (GET_CODE (dest) == SUBREG
5261 || GET_CODE (dest) == ZERO_EXTRACT
5262 || GET_CODE (dest) == SIGN_EXTRACT
5263 || GET_CODE (dest) == STRICT_LOW_PART)
5264 dest = XEXP (dest, 0);
5265 if (GET_CODE (dest) == REG)
5267 register int xregno = REGNO (dest);
5269 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5270 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5273 if (xregno < regno + nregs
5274 && xregno + xnregs > regno)
5276 if (xregno < valueno + valuenregs
5277 && xregno + xnregs > valueno)
5279 if (goal_mem_addr_varies
5280 && reg_overlap_mentioned_for_reload_p (dest,
5284 else if (goal_mem && GET_CODE (dest) == MEM
5285 && ! push_operand (dest, GET_MODE (dest)))
5287 else if (need_stable_sp
5288 && push_operand (dest, GET_MODE (dest)))
5295 /* If this insn auto-increments or auto-decrements
5296 either regno or valueno, return 0 now.
5297 If GOAL is a memory ref and its address is not constant,
5298 and this insn P increments a register used in GOAL, return 0. */
5302 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
5303 if (REG_NOTE_KIND (link) == REG_INC
5304 && GET_CODE (XEXP (link, 0)) == REG)
5306 register int incno = REGNO (XEXP (link, 0));
5307 if (incno < regno + nregs && incno >= regno)
5309 if (incno < valueno + valuenregs && incno >= valueno)
5311 if (goal_mem_addr_varies
5312 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
5322 /* Find a place where INCED appears in an increment or decrement operator
5323 within X, and return the amount INCED is incremented or decremented by.
5324 The value is always positive. */
5327 find_inc_amount (x, inced)
5330 register enum rtx_code code = GET_CODE (x);
5336 register rtx addr = XEXP (x, 0);
5337 if ((GET_CODE (addr) == PRE_DEC
5338 || GET_CODE (addr) == POST_DEC
5339 || GET_CODE (addr) == PRE_INC
5340 || GET_CODE (addr) == POST_INC)
5341 && XEXP (addr, 0) == inced)
5342 return GET_MODE_SIZE (GET_MODE (x));
5345 fmt = GET_RTX_FORMAT (code);
5346 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5350 register int tem = find_inc_amount (XEXP (x, i), inced);
5357 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5359 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
5369 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5372 regno_clobbered_p (regno, insn)
5376 if (GET_CODE (PATTERN (insn)) == CLOBBER
5377 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
5378 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
5380 if (GET_CODE (PATTERN (insn)) == PARALLEL)
5382 int i = XVECLEN (PATTERN (insn), 0) - 1;
5386 rtx elt = XVECEXP (PATTERN (insn), 0, i);
5387 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
5388 && REGNO (XEXP (elt, 0)) == regno)
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