1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This file contains subroutines used only from the file reload1.c.
22 It knows how to scan one insn for operands and values
23 that need to be copied into registers to make valid code.
24 It also finds other operands and values which are valid
25 but for which equivalent values in registers exist and
26 ought to be used instead.
28 Before processing the first insn of the function, call `init_reload'.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
91 #include "insn-config.h"
92 #include "insn-codes.h"
96 #include "hard-reg-set.h"
100 #ifndef REGISTER_MOVE_COST
101 #define REGISTER_MOVE_COST(x, y) 2
104 /* The variables set up by `find_reloads' are:
106 n_reloads number of distinct reloads needed; max reload # + 1
107 tables indexed by reload number
108 reload_in rtx for value to reload from
109 reload_out rtx for where to store reload-reg afterward if nec
110 (often the same as reload_in)
111 reload_reg_class enum reg_class, saying what regs to reload into
112 reload_inmode enum machine_mode; mode this operand should have
113 when reloaded, on input.
114 reload_outmode enum machine_mode; mode this operand should have
115 when reloaded, on output.
116 reload_strict_low char; currently always zero; used to mean that this
117 reload is inside a STRICT_LOW_PART, but we don't
118 need to know this anymore.
119 reload_optional char, nonzero for an optional reload.
120 Optional reloads are ignored unless the
121 value is already sitting in a register.
122 reload_inc int, positive amount to increment or decrement by if
123 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
124 Ignored otherwise (don't assume it is zero).
125 reload_in_reg rtx. A reg for which reload_in is the equivalent.
126 If reload_in is a symbol_ref which came from
127 reg_equiv_constant, then this is the pseudo
128 which has that symbol_ref as equivalent.
129 reload_reg_rtx rtx. This is the register to reload into.
130 If it is zero when `find_reloads' returns,
131 you must find a suitable register in the class
132 specified by reload_reg_class, and store here
133 an rtx for that register with mode from
134 reload_inmode or reload_outmode.
135 reload_nocombine char, nonzero if this reload shouldn't be
136 combined with another reload.
137 reload_needed_for rtx, operand this reload is needed for address of.
138 0 means it isn't needed for addressing.
139 reload_needed_for_multiple
140 int, 1 if this reload needed for more than one thing.
141 reload_when_needed enum, classifies reload as needed either for
142 addressing an input reload, addressing an output,
143 for addressing a non-reloaded mem ref,
144 or for unspecified purposes (i.e., more than one
146 reload_secondary_reload int, gives the reload number of a secondary
147 reload, when needed; otherwise -1
148 reload_secondary_p int, 1 if this is a secondary register for one
150 reload_secondary_icode enum insn_code, if a secondary reload is required,
151 gives the INSN_CODE that uses the secondary
152 reload as a scratch register, or CODE_FOR_nothing
153 if the secondary reload register is to be an
154 intermediate register. */
157 rtx reload_in[MAX_RELOADS];
158 rtx reload_out[MAX_RELOADS];
159 enum reg_class reload_reg_class[MAX_RELOADS];
160 enum machine_mode reload_inmode[MAX_RELOADS];
161 enum machine_mode reload_outmode[MAX_RELOADS];
162 char reload_strict_low[MAX_RELOADS];
163 rtx reload_reg_rtx[MAX_RELOADS];
164 char reload_optional[MAX_RELOADS];
165 int reload_inc[MAX_RELOADS];
166 rtx reload_in_reg[MAX_RELOADS];
167 char reload_nocombine[MAX_RELOADS];
168 int reload_needed_for_multiple[MAX_RELOADS];
169 rtx reload_needed_for[MAX_RELOADS];
170 enum reload_when_needed reload_when_needed[MAX_RELOADS];
171 int reload_secondary_reload[MAX_RELOADS];
172 int reload_secondary_p[MAX_RELOADS];
173 enum insn_code reload_secondary_icode[MAX_RELOADS];
175 /* All the "earlyclobber" operands of the current insn
176 are recorded here. */
178 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
180 /* Replacing reloads.
182 If `replace_reloads' is nonzero, then as each reload is recorded
183 an entry is made for it in the table `replacements'.
184 Then later `subst_reloads' can look through that table and
185 perform all the replacements needed. */
187 /* Nonzero means record the places to replace. */
188 static int replace_reloads;
190 /* Each replacement is recorded with a structure like this. */
193 rtx *where; /* Location to store in */
194 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
195 a SUBREG; 0 otherwise. */
196 int what; /* which reload this is for */
197 enum machine_mode mode; /* mode it must have */
200 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
202 /* Number of replacements currently recorded. */
203 static int n_replacements;
205 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
206 (see reg_equiv_address). */
207 static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
208 static int n_memlocs;
210 #ifdef SECONDARY_MEMORY_NEEDED
212 /* Save MEMs needed to copy from one class of registers to another. One MEM
213 is used per mode, but normally only one or two modes are ever used.
215 We keep two versions, before and after register elimination. */
217 static rtx secondary_memlocs[NUM_MACHINE_MODES];
218 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES];
221 /* The instruction we are doing reloads for;
222 so we can test whether a register dies in it. */
223 static rtx this_insn;
225 /* Nonzero if this instruction is a user-specified asm with operands. */
226 static int this_insn_is_asm;
228 /* If hard_regs_live_known is nonzero,
229 we can tell which hard regs are currently live,
230 at least enough to succeed in choosing dummy reloads. */
231 static int hard_regs_live_known;
233 /* Indexed by hard reg number,
234 element is nonegative if hard reg has been spilled.
235 This vector is passed to `find_reloads' as an argument
236 and is not changed here. */
237 static short *static_reload_reg_p;
239 /* Set to 1 in subst_reg_equivs if it changes anything. */
240 static int subst_reg_equivs_changed;
242 /* On return from push_reload, holds the reload-number for the OUT
243 operand, which can be different for that from the input operand. */
244 static int output_reloadnum;
246 static int alternative_allows_memconst ();
247 static rtx find_dummy_reload ();
248 static rtx find_reloads_toplev ();
249 static int find_reloads_address ();
250 static int find_reloads_address_1 ();
251 static void find_reloads_address_part ();
252 static int hard_reg_set_here_p ();
253 /* static rtx forget_volatility (); */
254 static rtx subst_reg_equivs ();
255 static rtx subst_indexed_address ();
256 rtx find_equiv_reg ();
257 static int find_inc_amount ();
259 #ifdef HAVE_SECONDARY_RELOADS
261 /* Determine if any secondary reloads are needed for loading (if IN_P is
262 non-zero) or storing (if IN_P is zero) X to or from a reload register of
263 register class RELOAD_CLASS in mode RELOAD_MODE.
265 Return the register class of a secondary reload register, or NO_REGS if
266 none. *PMODE is set to the mode that the register is required in.
267 If the reload register is needed as a scratch register instead of an
268 intermediate register, *PICODE is set to the insn_code of the insn to be
269 used to load or store the primary reload register; otherwise *PICODE
270 is set to CODE_FOR_nothing.
272 In some cases (such as storing MQ into an external memory location on
273 the RT), both an intermediate register and a scratch register. In that
274 case, *PICODE is set to CODE_FOR_nothing, the class for the intermediate
275 register is returned, and the *PTERTIARY_... variables are set to describe
276 the scratch register. */
278 static enum reg_class
279 find_secondary_reload (x, reload_class, reload_mode, in_p, picode, pmode,
280 ptertiary_class, ptertiary_icode, ptertiary_mode)
282 enum reg_class reload_class;
283 enum machine_mode reload_mode;
285 enum insn_code *picode;
286 enum machine_mode *pmode;
287 enum reg_class *ptertiary_class;
288 enum insn_code *ptertiary_icode;
289 enum machine_mode *ptertiary_mode;
291 enum reg_class class = NO_REGS;
292 enum machine_mode mode = reload_mode;
293 enum insn_code icode = CODE_FOR_nothing;
294 enum reg_class t_class = NO_REGS;
295 enum machine_mode t_mode = VOIDmode;
296 enum insn_code t_icode = CODE_FOR_nothing;
298 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
299 is still a pseudo-register by now, it *must* have an equivalent MEM
300 but we don't want to assume that), use that equivalent when seeing if
301 a secondary reload is needed since whether or not a reload is needed
302 might be sensitive to the form of the MEM. */
304 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
305 && reg_equiv_mem[REGNO (x)] != 0)
306 x = reg_equiv_mem[REGNO (x)];
308 #ifdef SECONDARY_INPUT_RELOAD_CLASS
310 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
313 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
315 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
318 /* If we don't need any secondary registers, go away; the rest of the
319 values won't be used. */
320 if (class == NO_REGS)
323 /* Get a possible insn to use. If the predicate doesn't accept X, don't
326 icode = (in_p ? reload_in_optab[(int) reload_mode]
327 : reload_out_optab[(int) reload_mode]);
329 if (icode != CODE_FOR_nothing
330 && insn_operand_predicate[(int) icode][in_p]
331 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
332 icode = CODE_FOR_nothing;
334 /* If we will be using an insn, see if it can directly handle the reload
335 register we will be using. If it can, the secondary reload is for a
336 scratch register. If it can't, we will use the secondary reload for
337 an intermediate register and require a tertiary reload for the scratch
340 if (icode != CODE_FOR_nothing)
342 /* If IN_P is non-zero, the reload register will be the output in
343 operand 0. If IN_P is zero, the reload register will be the input
344 in operand 1. Outputs should have an initial "=", which we must
347 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
348 enum reg_class insn_class
349 = (insn_letter == 'r' ? GENERAL_REGS
350 : REG_CLASS_FROM_LETTER (insn_letter));
352 if (insn_class == NO_REGS
353 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
354 /* The scratch register's constraint must start with "=&". */
355 || insn_operand_constraint[(int) icode][2][0] != '='
356 || insn_operand_constraint[(int) icode][2][1] != '&')
359 if (reg_class_subset_p (reload_class, insn_class))
360 mode = insn_operand_mode[(int) icode][2];
363 char t_letter = insn_operand_constraint[(int) icode][2][2];
365 t_mode = insn_operand_mode[(int) icode][2];
366 t_class = (t_letter == 'r' ? GENERAL_REGS
367 : REG_CLASS_FROM_LETTER (t_letter));
369 icode = CODE_FOR_nothing;
375 *ptertiary_class = t_class;
376 *ptertiary_mode = t_mode;
377 *ptertiary_icode = t_icode;
381 #endif /* HAVE_SECONDARY_RELOADS */
383 #ifdef SECONDARY_MEMORY_NEEDED
385 /* Return a memory location that will be used to copy X in mode MODE.
386 If we haven't already made a location for this mode in this insn,
387 call find_reloads_address on the location being returned. */
390 get_secondary_mem (x, mode)
392 enum machine_mode mode;
397 /* If MODE is narrower than a word, widen it. This is required because
398 most machines that require these memory locations do not support
399 short load and stores from all registers (e.g., FP registers). We could
400 possibly conditionalize this, but we lose nothing by doing the wider
403 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
404 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
406 /* If we already have made a MEM for this insn, return it. */
407 if (secondary_memlocs_elim[(int) mode] != 0)
408 return secondary_memlocs_elim[(int) mode];
410 /* If this is the first time we've tried to get a MEM for this mode,
411 allocate a new one. `something_changed' in reload will get set
412 by noticing that the frame size has changed. */
414 if (secondary_memlocs[(int) mode] == 0)
415 secondary_memlocs[(int) mode]
416 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
418 /* Get a version of the address doing any eliminations needed. If that
419 didn't give us a new MEM, make a new one if it isn't valid. */
421 loc = eliminate_regs (secondary_memlocs[(int) mode], 0, NULL_RTX);
422 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
424 if (! mem_valid && loc == secondary_memlocs[(int) mode])
425 loc = copy_rtx (loc);
427 /* The only time the call below will do anything is if the stack
428 offset is too large. In that case IND_LEVELS doesn't matter, so we
429 can just pass a zero. */
431 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0), x, 0);
433 secondary_memlocs_elim[(int) mode] = loc;
438 /* Clear any secondary memory locations we've made. */
441 clear_secondary_mem ()
445 for (i = 0; i < NUM_MACHINE_MODES; i++)
446 secondary_memlocs[i] = 0;
448 #endif /* SECONDARY_MEMORY_NEEDED */
450 /* Record one (sometimes two) reload that needs to be performed.
451 IN is an rtx saying where the data are to be found before this instruction.
452 OUT says where they must be stored after the instruction.
453 (IN is zero for data not read, and OUT is zero for data not written.)
454 INLOC and OUTLOC point to the places in the instructions where
455 IN and OUT were found.
456 CLASS is a register class required for the reloaded data.
457 INMODE is the machine mode that the instruction requires
458 for the reg that replaces IN and OUTMODE is likewise for OUT.
460 If IN is zero, then OUT's location and mode should be passed as
463 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
465 OPTIONAL nonzero means this reload does not need to be performed:
466 it can be discarded if that is more convenient.
468 The return value is the reload-number for this reload.
470 If both IN and OUT are nonzero, in some rare cases we might
471 want to make two separate reloads. (Actually we never do this now.)
472 Therefore, the reload-number for OUT is stored in
473 output_reloadnum when we return; the return value applies to IN.
474 Usually (presently always), when IN and OUT are nonzero,
475 the two reload-numbers are equal, but the caller should be careful to
479 push_reload (in, out, inloc, outloc, class,
480 inmode, outmode, strict_low, optional, needed_for)
481 register rtx in, out;
483 enum reg_class class;
484 enum machine_mode inmode, outmode;
491 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
492 int secondary_reload = -1;
493 enum insn_code secondary_icode = CODE_FOR_nothing;
495 /* Compare two RTX's. */
496 #define MATCHES(x, y) \
497 (x == y || (x != 0 && (GET_CODE (x) == REG \
498 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
499 : rtx_equal_p (x, y) && ! side_effects_p (x))))
501 /* INMODE and/or OUTMODE could be VOIDmode if no mode
502 has been specified for the operand. In that case,
503 use the operand's mode as the mode to reload. */
504 if (inmode == VOIDmode && in != 0)
505 inmode = GET_MODE (in);
506 if (outmode == VOIDmode && out != 0)
507 outmode = GET_MODE (out);
509 /* If IN is a pseudo register everywhere-equivalent to a constant, and
510 it is not in a hard register, reload straight from the constant,
511 since we want to get rid of such pseudo registers.
512 Often this is done earlier, but not always in find_reloads_address. */
513 if (in != 0 && GET_CODE (in) == REG)
515 register int regno = REGNO (in);
517 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
518 && reg_equiv_constant[regno] != 0)
519 in = reg_equiv_constant[regno];
522 /* Likewise for OUT. Of course, OUT will never be equivalent to
523 an actual constant, but it might be equivalent to a memory location
524 (in the case of a parameter). */
525 if (out != 0 && GET_CODE (out) == REG)
527 register int regno = REGNO (out);
529 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
530 && reg_equiv_constant[regno] != 0)
531 out = reg_equiv_constant[regno];
534 /* If we have a read-write operand with an address side-effect,
535 change either IN or OUT so the side-effect happens only once. */
536 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
538 if (GET_CODE (XEXP (in, 0)) == POST_INC
539 || GET_CODE (XEXP (in, 0)) == POST_DEC)
540 in = gen_rtx (MEM, GET_MODE (in), XEXP (XEXP (in, 0), 0));
541 if (GET_CODE (XEXP (in, 0)) == PRE_INC
542 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
543 out = gen_rtx (MEM, GET_MODE (out), XEXP (XEXP (out, 0), 0));
546 /* If we are reloading a (SUBREG (MEM ...) ...) or (SUBREG constant ...),
547 really reload just the inside expression in its own mode.
548 If we have (SUBREG:M1 (REG:M2 ...) ...) with M1 wider than M2 and the
549 register is a pseudo, this will become the same as the above case.
550 Do the same for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
551 either M1 is not valid for R or M2 is wider than a word but we only
552 need one word to store an M2-sized quantity in R.
553 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
554 we can't handle it here because CONST_INT does not indicate a mode.
556 Similarly, we must reload the inside expression if we have a
557 STRICT_LOW_PART (presumably, in == out in the cas).
559 Also reload the inner expression if it does not require a secondary
560 reload but the SUBREG does. */
562 if (in != 0 && GET_CODE (in) == SUBREG
563 && (GET_CODE (SUBREG_REG (in)) != REG
565 || (GET_CODE (SUBREG_REG (in)) == REG
566 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER
567 && (GET_MODE_SIZE (inmode)
568 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))))
569 || (GET_CODE (SUBREG_REG (in)) == REG
570 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
571 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in)), inmode)
572 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
573 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
575 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
577 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
578 GET_MODE (SUBREG_REG (in)))))))
579 #ifdef SECONDARY_INPUT_RELOAD_CLASS
580 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
581 && (SECONDARY_INPUT_RELOAD_CLASS (class,
582 GET_MODE (SUBREG_REG (in)),
588 in_subreg_loc = inloc;
589 inloc = &SUBREG_REG (in);
591 if (GET_CODE (in) == MEM)
592 /* This is supposed to happen only for paradoxical subregs made by
593 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
594 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
596 inmode = GET_MODE (in);
599 /* Similarly for paradoxical and problematical SUBREGs on the output.
600 Note that there is no reason we need worry about the previous value
601 of SUBREG_REG (out); even if wider than out,
602 storing in a subreg is entitled to clobber it all
603 (except in the case of STRICT_LOW_PART,
604 and in that case the constraint should label it input-output.) */
605 if (out != 0 && GET_CODE (out) == SUBREG
606 && (GET_CODE (SUBREG_REG (out)) != REG
608 || (GET_CODE (SUBREG_REG (out)) == REG
609 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER
610 && (GET_MODE_SIZE (outmode)
611 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))))
612 || (GET_CODE (SUBREG_REG (out)) == REG
613 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
614 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)), outmode)
615 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
616 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
618 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
620 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
621 GET_MODE (SUBREG_REG (out)))))))
622 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
623 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
624 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
625 GET_MODE (SUBREG_REG (out)),
631 out_subreg_loc = outloc;
632 outloc = &SUBREG_REG (out);
634 if (GET_CODE (out) == MEM
635 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
637 outmode = GET_MODE (out);
640 /* That's all we use STRICT_LOW for, so clear it. At some point,
641 we may want to get rid of reload_strict_low. */
644 /* If IN appears in OUT, we can't share any input-only reload for IN. */
645 if (in != 0 && out != 0 && GET_CODE (out) == MEM
646 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
647 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
650 /* If IN is a SUBREG of a hard register, make a new REG. This
651 simplifies some of the cases below. */
653 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
654 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
655 in = gen_rtx (REG, GET_MODE (in),
656 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
658 /* Similarly for OUT. */
659 if (out != 0 && GET_CODE (out) == SUBREG
660 && GET_CODE (SUBREG_REG (out)) == REG
661 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
662 out = gen_rtx (REG, GET_MODE (out),
663 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
665 /* Narrow down the class of register wanted if that is
666 desirable on this machine for efficiency. */
668 class = PREFERRED_RELOAD_CLASS (in, class);
670 /* Output reloads may need analagous treatment, different in detail. */
671 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
673 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
676 /* Make sure we use a class that can handle the actual pseudo
677 inside any subreg. For example, on the 386, QImode regs
678 can appear within SImode subregs. Although GENERAL_REGS
679 can handle SImode, QImode needs a smaller class. */
680 #ifdef LIMIT_RELOAD_CLASS
682 class = LIMIT_RELOAD_CLASS (inmode, class);
683 else if (in != 0 && GET_CODE (in) == SUBREG)
684 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
687 class = LIMIT_RELOAD_CLASS (outmode, class);
688 if (out != 0 && GET_CODE (out) == SUBREG)
689 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
692 if (class == NO_REGS)
695 /* Verify that this class is at least possible for the mode that
697 if (this_insn_is_asm)
699 enum machine_mode mode;
700 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
704 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
705 if (HARD_REGNO_MODE_OK (i, mode)
706 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
708 int nregs = HARD_REGNO_NREGS (i, mode);
711 for (j = 1; j < nregs; j++)
712 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
717 if (i == FIRST_PSEUDO_REGISTER)
719 error_for_asm (this_insn, "impossible register constraint in `asm'");
724 /* We can use an existing reload if the class is right
725 and at least one of IN and OUT is a match
726 and the other is at worst neutral.
727 (A zero compared against anything is neutral.) */
728 for (i = 0; i < n_reloads; i++)
729 if ((reg_class_subset_p (class, reload_reg_class[i])
730 || reg_class_subset_p (reload_reg_class[i], class))
731 && reload_strict_low[i] == strict_low
732 /* If the existing reload has a register, it must fit our class. */
733 && (reload_reg_rtx[i] == 0
734 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
735 true_regnum (reload_reg_rtx[i])))
736 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
737 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
739 (out != 0 && MATCHES (reload_out[i], out)
740 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in)))))
743 /* Reloading a plain reg for input can match a reload to postincrement
744 that reg, since the postincrement's value is the right value.
745 Likewise, it can match a preincrement reload, since we regard
746 the preincrementation as happening before any ref in this insn
749 for (i = 0; i < n_reloads; i++)
750 if ((reg_class_subset_p (class, reload_reg_class[i])
751 || reg_class_subset_p (reload_reg_class[i], class))
752 /* If the existing reload has a register, it must fit our class. */
753 && (reload_reg_rtx[i] == 0
754 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
755 true_regnum (reload_reg_rtx[i])))
756 && reload_strict_low[i] == strict_low
757 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
758 && ((GET_CODE (in) == REG
759 && (GET_CODE (reload_in[i]) == POST_INC
760 || GET_CODE (reload_in[i]) == POST_DEC
761 || GET_CODE (reload_in[i]) == PRE_INC
762 || GET_CODE (reload_in[i]) == PRE_DEC)
763 && MATCHES (XEXP (reload_in[i], 0), in))
765 (GET_CODE (reload_in[i]) == REG
766 && (GET_CODE (in) == POST_INC
767 || GET_CODE (in) == POST_DEC
768 || GET_CODE (in) == PRE_INC
769 || GET_CODE (in) == PRE_DEC)
770 && MATCHES (XEXP (in, 0), reload_in[i]))))
772 /* Make sure reload_in ultimately has the increment,
773 not the plain register. */
774 if (GET_CODE (in) == REG)
781 #ifdef HAVE_SECONDARY_RELOADS
782 enum reg_class secondary_class = NO_REGS;
783 enum reg_class secondary_out_class = NO_REGS;
784 enum machine_mode secondary_mode = inmode;
785 enum machine_mode secondary_out_mode = outmode;
786 enum insn_code secondary_icode;
787 enum insn_code secondary_out_icode = CODE_FOR_nothing;
788 enum reg_class tertiary_class = NO_REGS;
789 enum reg_class tertiary_out_class = NO_REGS;
790 enum machine_mode tertiary_mode;
791 enum machine_mode tertiary_out_mode;
792 enum insn_code tertiary_icode;
793 enum insn_code tertiary_out_icode = CODE_FOR_nothing;
794 int tertiary_reload = -1;
796 /* See if we need a secondary reload register to move between
797 CLASS and IN or CLASS and OUT. Get the modes and icodes to
798 use for each of them if so. */
800 #ifdef SECONDARY_INPUT_RELOAD_CLASS
803 = find_secondary_reload (in, class, inmode, 1, &secondary_icode,
804 &secondary_mode, &tertiary_class,
805 &tertiary_icode, &tertiary_mode);
808 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
809 if (out != 0 && GET_CODE (out) != SCRATCH)
811 = find_secondary_reload (out, class, outmode, 0,
812 &secondary_out_icode, &secondary_out_mode,
813 &tertiary_out_class, &tertiary_out_icode,
817 /* We can only record one secondary and one tertiary reload. If both
818 IN and OUT need secondary reloads, we can only make an in-out
819 reload if neither need an insn and if the classes are compatible. */
821 if (secondary_class != NO_REGS && secondary_out_class != NO_REGS
822 && reg_class_subset_p (secondary_out_class, secondary_class))
823 secondary_class = secondary_out_class;
825 if (secondary_class != NO_REGS && secondary_out_class != NO_REGS
826 && (! reg_class_subset_p (secondary_class, secondary_out_class)
827 || secondary_icode != CODE_FOR_nothing
828 || secondary_out_icode != CODE_FOR_nothing))
830 push_reload (NULL_RTX, out, NULL_PTR, outloc, class,
831 VOIDmode, outmode, strict_low, optional, needed_for);
837 /* If we need a secondary reload for OUT but not IN, copy the
839 if (secondary_class == NO_REGS && secondary_out_class != NO_REGS)
841 secondary_class = secondary_out_class;
842 secondary_icode = secondary_out_icode;
843 tertiary_class = tertiary_out_class;
844 tertiary_icode = tertiary_out_icode;
845 tertiary_mode = tertiary_out_mode;
848 if (secondary_class != NO_REGS)
850 /* If we need a tertiary reload, see if we have one we can reuse
853 if (tertiary_class != NO_REGS)
855 for (tertiary_reload = 0; tertiary_reload < n_reloads;
857 if (reload_secondary_p[tertiary_reload]
858 && (reg_class_subset_p (tertiary_class,
859 reload_reg_class[tertiary_reload])
860 || reg_class_subset_p (reload_reg_class[tertiary_reload],
862 && ((reload_inmode[tertiary_reload] == tertiary_mode)
863 || reload_inmode[tertiary_reload] == VOIDmode)
864 && ((reload_outmode[tertiary_reload] == tertiary_mode)
865 || reload_outmode[tertiary_reload] == VOIDmode)
866 && (reload_secondary_icode[tertiary_reload]
867 == CODE_FOR_nothing))
870 if (tertiary_mode != VOIDmode)
871 reload_inmode[tertiary_reload] = tertiary_mode;
872 if (tertiary_out_mode != VOIDmode)
873 reload_outmode[tertiary_reload] = tertiary_mode;
874 if (reg_class_subset_p (tertiary_class,
875 reload_reg_class[tertiary_reload]))
876 reload_reg_class[tertiary_reload] = tertiary_class;
877 if (reload_needed_for[tertiary_reload] != needed_for)
878 reload_needed_for_multiple[tertiary_reload] = 1;
879 reload_optional[tertiary_reload] &= optional;
880 reload_secondary_p[tertiary_reload] = 1;
883 if (tertiary_reload == n_reloads)
885 /* We need to make a new tertiary reload for this register
887 reload_in[tertiary_reload] = reload_out[tertiary_reload] = 0;
888 reload_reg_class[tertiary_reload] = tertiary_class;
889 reload_inmode[tertiary_reload] = tertiary_mode;
890 reload_outmode[tertiary_reload] = tertiary_mode;
891 reload_reg_rtx[tertiary_reload] = 0;
892 reload_optional[tertiary_reload] = optional;
893 reload_inc[tertiary_reload] = 0;
894 reload_strict_low[tertiary_reload] = 0;
895 /* Maybe we could combine these, but it seems too tricky. */
896 reload_nocombine[tertiary_reload] = 1;
897 reload_in_reg[tertiary_reload] = 0;
898 reload_needed_for[tertiary_reload] = needed_for;
899 reload_needed_for_multiple[tertiary_reload] = 0;
900 reload_secondary_reload[tertiary_reload] = -1;
901 reload_secondary_icode[tertiary_reload] = CODE_FOR_nothing;
902 reload_secondary_p[tertiary_reload] = 1;
909 /* See if we can reuse an existing secondary reload. */
910 for (secondary_reload = 0; secondary_reload < n_reloads;
912 if (reload_secondary_p[secondary_reload]
913 && (reg_class_subset_p (secondary_class,
914 reload_reg_class[secondary_reload])
915 || reg_class_subset_p (reload_reg_class[secondary_reload],
917 && ((reload_inmode[secondary_reload] == secondary_mode)
918 || reload_inmode[secondary_reload] == VOIDmode)
919 && ((reload_outmode[secondary_reload] == secondary_out_mode)
920 || reload_outmode[secondary_reload] == VOIDmode)
921 && reload_secondary_reload[secondary_reload] == tertiary_reload
922 && reload_secondary_icode[secondary_reload] == tertiary_icode)
924 if (secondary_mode != VOIDmode)
925 reload_inmode[secondary_reload] = secondary_mode;
926 if (secondary_out_mode != VOIDmode)
927 reload_outmode[secondary_reload] = secondary_out_mode;
928 if (reg_class_subset_p (secondary_class,
929 reload_reg_class[secondary_reload]))
930 reload_reg_class[secondary_reload] = secondary_class;
931 if (reload_needed_for[secondary_reload] != needed_for)
932 reload_needed_for_multiple[secondary_reload] = 1;
933 reload_optional[secondary_reload] &= optional;
934 reload_secondary_p[secondary_reload] = 1;
937 if (secondary_reload == n_reloads)
939 /* We need to make a new secondary reload for this register
941 reload_in[secondary_reload] = reload_out[secondary_reload] = 0;
942 reload_reg_class[secondary_reload] = secondary_class;
943 reload_inmode[secondary_reload] = secondary_mode;
944 reload_outmode[secondary_reload] = secondary_out_mode;
945 reload_reg_rtx[secondary_reload] = 0;
946 reload_optional[secondary_reload] = optional;
947 reload_inc[secondary_reload] = 0;
948 reload_strict_low[secondary_reload] = 0;
949 /* Maybe we could combine these, but it seems too tricky. */
950 reload_nocombine[secondary_reload] = 1;
951 reload_in_reg[secondary_reload] = 0;
952 reload_needed_for[secondary_reload] = needed_for;
953 reload_needed_for_multiple[secondary_reload] = 0;
954 reload_secondary_reload[secondary_reload] = tertiary_reload;
955 reload_secondary_icode[secondary_reload] = tertiary_icode;
956 reload_secondary_p[secondary_reload] = 1;
961 #ifdef SECONDARY_MEMORY_NEEDED
962 /* If we need a memory location to copy between the two
963 reload regs, set it up now. */
965 if (in != 0 && secondary_icode == CODE_FOR_nothing
966 && SECONDARY_MEMORY_NEEDED (secondary_class, class, inmode))
967 get_secondary_mem (in, inmode);
969 if (out != 0 && secondary_icode == CODE_FOR_nothing
970 && SECONDARY_MEMORY_NEEDED (class, secondary_class, outmode))
971 get_secondary_mem (out, outmode);
977 /* We found no existing reload suitable for re-use.
978 So add an additional reload. */
982 reload_reg_class[i] = class;
983 reload_inmode[i] = inmode;
984 reload_outmode[i] = outmode;
985 reload_reg_rtx[i] = 0;
986 reload_optional[i] = optional;
988 reload_strict_low[i] = strict_low;
989 reload_nocombine[i] = 0;
990 reload_in_reg[i] = inloc ? *inloc : 0;
991 reload_needed_for[i] = needed_for;
992 reload_needed_for_multiple[i] = 0;
993 reload_secondary_reload[i] = secondary_reload;
994 reload_secondary_icode[i] = secondary_icode;
995 reload_secondary_p[i] = 0;
999 #ifdef SECONDARY_MEMORY_NEEDED
1000 /* If a memory location is needed for the copy, make one. */
1001 if (in != 0 && GET_CODE (in) == REG
1002 && REGNO (in) < FIRST_PSEUDO_REGISTER
1003 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1005 get_secondary_mem (in, inmode);
1007 if (out != 0 && GET_CODE (out) == REG
1008 && REGNO (out) < FIRST_PSEUDO_REGISTER
1009 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1011 get_secondary_mem (out, outmode);
1016 /* We are reusing an existing reload,
1017 but we may have additional information for it.
1018 For example, we may now have both IN and OUT
1019 while the old one may have just one of them. */
1021 if (inmode != VOIDmode)
1022 reload_inmode[i] = inmode;
1023 if (outmode != VOIDmode)
1024 reload_outmode[i] = outmode;
1028 reload_out[i] = out;
1029 if (reg_class_subset_p (class, reload_reg_class[i]))
1030 reload_reg_class[i] = class;
1031 reload_optional[i] &= optional;
1032 if (reload_needed_for[i] != needed_for)
1033 reload_needed_for_multiple[i] = 1;
1036 /* If the ostensible rtx being reload differs from the rtx found
1037 in the location to substitute, this reload is not safe to combine
1038 because we cannot reliably tell whether it appears in the insn. */
1040 if (in != 0 && in != *inloc)
1041 reload_nocombine[i] = 1;
1044 /* This was replaced by changes in find_reloads_address_1 and the new
1045 function inc_for_reload, which go with a new meaning of reload_inc. */
1047 /* If this is an IN/OUT reload in an insn that sets the CC,
1048 it must be for an autoincrement. It doesn't work to store
1049 the incremented value after the insn because that would clobber the CC.
1050 So we must do the increment of the value reloaded from,
1051 increment it, store it back, then decrement again. */
1052 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1056 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1057 /* If we did not find a nonzero amount-to-increment-by,
1058 that contradicts the belief that IN is being incremented
1059 in an address in this insn. */
1060 if (reload_inc[i] == 0)
1065 /* If we will replace IN and OUT with the reload-reg,
1066 record where they are located so that substitution need
1067 not do a tree walk. */
1069 if (replace_reloads)
1073 register struct replacement *r = &replacements[n_replacements++];
1075 r->subreg_loc = in_subreg_loc;
1079 if (outloc != 0 && outloc != inloc)
1081 register struct replacement *r = &replacements[n_replacements++];
1084 r->subreg_loc = out_subreg_loc;
1089 /* If this reload is just being introduced and it has both
1090 an incoming quantity and an outgoing quantity that are
1091 supposed to be made to match, see if either one of the two
1092 can serve as the place to reload into.
1094 If one of them is acceptable, set reload_reg_rtx[i]
1097 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1099 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1100 reload_reg_class[i], i);
1102 /* If the outgoing register already contains the same value
1103 as the incoming one, we can dispense with loading it.
1104 The easiest way to tell the caller that is to give a phony
1105 value for the incoming operand (same as outgoing one). */
1106 if (reload_reg_rtx[i] == out
1107 && (GET_CODE (in) == REG || CONSTANT_P (in))
1108 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1109 static_reload_reg_p, i, inmode))
1113 /* If this is an input reload and the operand contains a register that
1114 dies in this insn and is used nowhere else, see if it is the right class
1115 to be used for this reload. Use it if so. (This occurs most commonly
1116 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1117 this if it is also an output reload that mentions the register unless
1118 the output is a SUBREG that clobbers an entire register.
1120 Note that the operand might be one of the spill regs, if it is a
1121 pseudo reg and we are in a block where spilling has not taken place.
1122 But if there is no spilling in this block, that is OK.
1123 An explicitly used hard reg cannot be a spill reg. */
1125 if (reload_reg_rtx[i] == 0 && in != 0)
1130 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1131 if (REG_NOTE_KIND (note) == REG_DEAD
1132 && GET_CODE (XEXP (note, 0)) == REG
1133 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1134 && reg_mentioned_p (XEXP (note, 0), in)
1135 && ! refers_to_regno_for_reload_p (regno,
1137 + HARD_REGNO_NREGS (regno,
1139 PATTERN (this_insn), inloc)
1141 || (GET_CODE (in) == SUBREG
1142 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1144 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1145 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1146 /* Make sure the operand fits in the reg that dies. */
1147 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1148 && HARD_REGNO_MODE_OK (regno, inmode)
1149 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1150 && HARD_REGNO_MODE_OK (regno, outmode)
1151 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1152 && !fixed_regs[regno])
1154 reload_reg_rtx[i] = gen_rtx (REG, inmode, regno);
1160 output_reloadnum = i;
1165 /* Record an additional place we must replace a value
1166 for which we have already recorded a reload.
1167 RELOADNUM is the value returned by push_reload
1168 when the reload was recorded.
1169 This is used in insn patterns that use match_dup. */
1172 push_replacement (loc, reloadnum, mode)
1175 enum machine_mode mode;
1177 if (replace_reloads)
1179 register struct replacement *r = &replacements[n_replacements++];
1180 r->what = reloadnum;
1187 /* If there is only one output reload, and it is not for an earlyclobber
1188 operand, try to combine it with a (logically unrelated) input reload
1189 to reduce the number of reload registers needed.
1191 This is safe if the input reload does not appear in
1192 the value being output-reloaded, because this implies
1193 it is not needed any more once the original insn completes.
1195 If that doesn't work, see we can use any of the registers that
1196 die in this insn as a reload register. We can if it is of the right
1197 class and does not appear in the value being output-reloaded. */
1203 int output_reload = -1;
1206 /* Find the output reload; return unless there is exactly one
1207 and that one is mandatory. */
1209 for (i = 0; i < n_reloads; i++)
1210 if (reload_out[i] != 0)
1212 if (output_reload >= 0)
1217 if (output_reload < 0 || reload_optional[output_reload])
1220 /* An input-output reload isn't combinable. */
1222 if (reload_in[output_reload] != 0)
1225 /* If this reload is for an earlyclobber operand, we can't do anything. */
1227 for (i = 0; i < n_earlyclobbers; i++)
1228 if (reload_out[output_reload] == reload_earlyclobbers[i])
1231 /* Check each input reload; can we combine it? */
1233 for (i = 0; i < n_reloads; i++)
1234 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1235 /* Life span of this reload must not extend past main insn. */
1236 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_RELOAD_ADDRESS
1237 && reload_inmode[i] == reload_outmode[output_reload]
1238 && reload_inc[i] == 0
1239 && reload_reg_rtx[i] == 0
1240 && reload_strict_low[i] == 0
1241 /* Don't combine two reloads with different secondary reloads. */
1242 && (reload_secondary_reload[i] == reload_secondary_reload[output_reload]
1243 || reload_secondary_reload[i] == -1
1244 || reload_secondary_reload[output_reload] == -1)
1245 && (reg_class_subset_p (reload_reg_class[i],
1246 reload_reg_class[output_reload])
1247 || reg_class_subset_p (reload_reg_class[output_reload],
1248 reload_reg_class[i]))
1249 && (MATCHES (reload_in[i], reload_out[output_reload])
1250 /* Args reversed because the first arg seems to be
1251 the one that we imagine being modified
1252 while the second is the one that might be affected. */
1253 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1255 /* However, if the input is a register that appears inside
1256 the output, then we also can't share.
1257 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1258 If the same reload reg is used for both reg 69 and the
1259 result to be stored in memory, then that result
1260 will clobber the address of the memory ref. */
1261 && ! (GET_CODE (reload_in[i]) == REG
1262 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1263 reload_out[output_reload])))))
1267 /* We have found a reload to combine with! */
1268 reload_out[i] = reload_out[output_reload];
1269 reload_outmode[i] = reload_outmode[output_reload];
1270 /* Mark the old output reload as inoperative. */
1271 reload_out[output_reload] = 0;
1272 /* The combined reload is needed for the entire insn. */
1273 reload_needed_for_multiple[i] = 1;
1274 reload_when_needed[i] = RELOAD_OTHER;
1275 /* If the output reload had a secondary reload, copy it. */
1276 if (reload_secondary_reload[output_reload] != -1)
1277 reload_secondary_reload[i] = reload_secondary_reload[output_reload];
1278 /* If required, minimize the register class. */
1279 if (reg_class_subset_p (reload_reg_class[output_reload],
1280 reload_reg_class[i]))
1281 reload_reg_class[i] = reload_reg_class[output_reload];
1283 /* Transfer all replacements from the old reload to the combined. */
1284 for (j = 0; j < n_replacements; j++)
1285 if (replacements[j].what == output_reload)
1286 replacements[j].what = i;
1291 /* If this insn has only one operand that is modified or written (assumed
1292 to be the first), it must be the one corresponding to this reload. It
1293 is safe to use anything that dies in this insn for that output provided
1294 that it does not occur in the output (we already know it isn't an
1295 earlyclobber. If this is an asm insn, give up. */
1297 if (INSN_CODE (this_insn) == -1)
1300 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1301 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1302 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1305 /* See if some hard register that dies in this insn and is not used in
1306 the output is the right class. Only works if the register we pick
1307 up can fully hold our output reload. */
1308 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1309 if (REG_NOTE_KIND (note) == REG_DEAD
1310 && GET_CODE (XEXP (note, 0)) == REG
1311 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1312 reload_out[output_reload])
1313 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1314 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1315 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1316 REGNO (XEXP (note, 0)))
1317 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1318 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1319 && ! fixed_regs[REGNO (XEXP (note, 0))])
1321 reload_reg_rtx[output_reload] = gen_rtx (REG,
1322 reload_outmode[output_reload],
1323 REGNO (XEXP (note, 0)));
1328 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1329 See if one of IN and OUT is a register that may be used;
1330 this is desirable since a spill-register won't be needed.
1331 If so, return the register rtx that proves acceptable.
1333 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1334 CLASS is the register class required for the reload.
1336 If FOR_REAL is >= 0, it is the number of the reload,
1337 and in some cases when it can be discovered that OUT doesn't need
1338 to be computed, clear out reload_out[FOR_REAL].
1340 If FOR_REAL is -1, this should not be done, because this call
1341 is just to see if a register can be found, not to find and install it. */
1344 find_dummy_reload (real_in, real_out, inloc, outloc, class, for_real)
1345 rtx real_in, real_out;
1346 rtx *inloc, *outloc;
1347 enum reg_class class;
1356 /* If operands exceed a word, we can't use either of them
1357 unless they have the same size. */
1358 if (GET_MODE_SIZE (GET_MODE (real_out)) != GET_MODE_SIZE (GET_MODE (real_in))
1359 && (GET_MODE_SIZE (GET_MODE (real_out)) > UNITS_PER_WORD
1360 || GET_MODE_SIZE (GET_MODE (real_in)) > UNITS_PER_WORD))
1363 /* Find the inside of any subregs. */
1364 while (GET_CODE (out) == SUBREG)
1366 out_offset = SUBREG_WORD (out);
1367 out = SUBREG_REG (out);
1369 while (GET_CODE (in) == SUBREG)
1371 in_offset = SUBREG_WORD (in);
1372 in = SUBREG_REG (in);
1375 /* Narrow down the reg class, the same way push_reload will;
1376 otherwise we might find a dummy now, but push_reload won't. */
1377 class = PREFERRED_RELOAD_CLASS (in, class);
1379 /* See if OUT will do. */
1380 if (GET_CODE (out) == REG
1381 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1383 register int regno = REGNO (out) + out_offset;
1384 int nwords = HARD_REGNO_NREGS (regno, GET_MODE (real_out));
1387 /* When we consider whether the insn uses OUT,
1388 ignore references within IN. They don't prevent us
1389 from copying IN into OUT, because those refs would
1390 move into the insn that reloads IN.
1392 However, we only ignore IN in its role as this reload.
1393 If the insn uses IN elsewhere and it contains OUT,
1394 that counts. We can't be sure it's the "same" operand
1395 so it might not go through this reload. */
1397 *inloc = const0_rtx;
1399 if (regno < FIRST_PSEUDO_REGISTER
1400 /* A fixed reg that can overlap other regs better not be used
1401 for reloading in any way. */
1402 #ifdef OVERLAPPING_REGNO_P
1403 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1405 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1406 PATTERN (this_insn), outloc))
1409 for (i = 0; i < nwords; i++)
1410 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1416 if (GET_CODE (real_out) == REG)
1419 value = gen_rtx (REG, GET_MODE (real_out), regno);
1426 /* Consider using IN if OUT was not acceptable
1427 or if OUT dies in this insn (like the quotient in a divmod insn).
1428 We can't use IN unless it is dies in this insn,
1429 which means we must know accurately which hard regs are live.
1430 Also, the result can't go in IN if IN is used within OUT. */
1431 if (hard_regs_live_known
1432 && GET_CODE (in) == REG
1433 && REGNO (in) < FIRST_PSEUDO_REGISTER
1435 || find_reg_note (this_insn, REG_UNUSED, real_out))
1436 && find_reg_note (this_insn, REG_DEAD, real_in)
1437 && !fixed_regs[REGNO (in)]
1438 && HARD_REGNO_MODE_OK (REGNO (in), GET_MODE (out)))
1440 register int regno = REGNO (in) + in_offset;
1441 int nwords = HARD_REGNO_NREGS (regno, GET_MODE (real_in));
1443 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1444 && ! hard_reg_set_here_p (regno, regno + nwords,
1445 PATTERN (this_insn)))
1448 for (i = 0; i < nwords; i++)
1449 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1455 /* If we were going to use OUT as the reload reg
1456 and changed our mind, it means OUT is a dummy that
1457 dies here. So don't bother copying value to it. */
1458 if (for_real >= 0 && value == real_out)
1459 reload_out[for_real] = 0;
1460 if (GET_CODE (real_in) == REG)
1463 value = gen_rtx (REG, GET_MODE (real_in), regno);
1471 /* This page contains subroutines used mainly for determining
1472 whether the IN or an OUT of a reload can serve as the
1475 /* Return 1 if expression X alters a hard reg in the range
1476 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1477 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1478 X should be the body of an instruction. */
1481 hard_reg_set_here_p (beg_regno, end_regno, x)
1482 register int beg_regno, end_regno;
1485 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1487 register rtx op0 = SET_DEST (x);
1488 while (GET_CODE (op0) == SUBREG)
1489 op0 = SUBREG_REG (op0);
1490 if (GET_CODE (op0) == REG)
1492 register int r = REGNO (op0);
1493 /* See if this reg overlaps range under consideration. */
1495 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1499 else if (GET_CODE (x) == PARALLEL)
1501 register int i = XVECLEN (x, 0) - 1;
1503 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1510 /* Return 1 if ADDR is a valid memory address for mode MODE,
1511 and check that each pseudo reg has the proper kind of
1515 strict_memory_address_p (mode, addr)
1516 enum machine_mode mode;
1519 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
1527 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1528 if they are the same hard reg, and has special hacks for
1529 autoincrement and autodecrement.
1530 This is specifically intended for find_reloads to use
1531 in determining whether two operands match.
1532 X is the operand whose number is the lower of the two.
1534 The value is 2 if Y contains a pre-increment that matches
1535 a non-incrementing address in X. */
1537 /* ??? To be completely correct, we should arrange to pass
1538 for X the output operand and for Y the input operand.
1539 For now, we assume that the output operand has the lower number
1540 because that is natural in (SET output (... input ...)). */
1543 operands_match_p (x, y)
1547 register RTX_CODE code = GET_CODE (x);
1553 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
1554 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
1555 && GET_CODE (SUBREG_REG (y)) == REG)))
1561 i = REGNO (SUBREG_REG (x));
1562 if (i >= FIRST_PSEUDO_REGISTER)
1564 i += SUBREG_WORD (x);
1569 if (GET_CODE (y) == SUBREG)
1571 j = REGNO (SUBREG_REG (y));
1572 if (j >= FIRST_PSEUDO_REGISTER)
1574 j += SUBREG_WORD (y);
1581 /* If two operands must match, because they are really a single
1582 operand of an assembler insn, then two postincrements are invalid
1583 because the assembler insn would increment only once.
1584 On the other hand, an postincrement matches ordinary indexing
1585 if the postincrement is the output operand. */
1586 if (code == POST_DEC || code == POST_INC)
1587 return operands_match_p (XEXP (x, 0), y);
1588 /* Two preincrements are invalid
1589 because the assembler insn would increment only once.
1590 On the other hand, an preincrement matches ordinary indexing
1591 if the preincrement is the input operand.
1592 In this case, return 2, since some callers need to do special
1593 things when this happens. */
1594 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
1595 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
1599 /* Now we have disposed of all the cases
1600 in which different rtx codes can match. */
1601 if (code != GET_CODE (y))
1603 if (code == LABEL_REF)
1604 return XEXP (x, 0) == XEXP (y, 0);
1605 if (code == SYMBOL_REF)
1606 return XSTR (x, 0) == XSTR (y, 0);
1608 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1610 if (GET_MODE (x) != GET_MODE (y))
1613 /* Compare the elements. If any pair of corresponding elements
1614 fail to match, return 0 for the whole things. */
1617 fmt = GET_RTX_FORMAT (code);
1618 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1624 if (XWINT (x, i) != XWINT (y, i))
1629 if (XINT (x, i) != XINT (y, i))
1634 val = operands_match_p (XEXP (x, i), XEXP (y, i));
1637 /* If any subexpression returns 2,
1638 we should return 2 if we are successful. */
1646 /* It is believed that rtx's at this level will never
1647 contain anything but integers and other rtx's,
1648 except for within LABEL_REFs and SYMBOL_REFs. */
1653 return 1 + success_2;
1656 /* Return the number of times character C occurs in string S. */
1659 n_occurrences (c, s)
1669 struct decomposition
1674 HOST_WIDE_INT start;
1678 /* Describe the range of registers or memory referenced by X.
1679 If X is a register, set REG_FLAG and put the first register
1680 number into START and the last plus one into END.
1681 If X is a memory reference, put a base address into BASE
1682 and a range of integer offsets into START and END.
1683 If X is pushing on the stack, we can assume it causes no trouble,
1684 so we set the SAFE field. */
1686 static struct decomposition
1690 struct decomposition val;
1695 if (GET_CODE (x) == MEM)
1697 rtx base, offset = 0;
1698 rtx addr = XEXP (x, 0);
1700 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
1701 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
1703 val.base = XEXP (addr, 0);
1704 val.start = - GET_MODE_SIZE (GET_MODE (x));
1705 val.end = GET_MODE_SIZE (GET_MODE (x));
1706 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
1710 if (GET_CODE (addr) == CONST)
1712 addr = XEXP (addr, 0);
1715 if (GET_CODE (addr) == PLUS)
1717 if (CONSTANT_P (XEXP (addr, 0)))
1719 base = XEXP (addr, 1);
1720 offset = XEXP (addr, 0);
1722 else if (CONSTANT_P (XEXP (addr, 1)))
1724 base = XEXP (addr, 0);
1725 offset = XEXP (addr, 1);
1732 offset = const0_rtx;
1734 if (GET_CODE (offset) == CONST)
1735 offset = XEXP (offset, 0);
1736 if (GET_CODE (offset) == PLUS)
1738 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
1740 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 1));
1741 offset = XEXP (offset, 0);
1743 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
1745 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 0));
1746 offset = XEXP (offset, 1);
1750 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
1751 offset = const0_rtx;
1754 else if (GET_CODE (offset) != CONST_INT)
1756 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
1757 offset = const0_rtx;
1760 if (all_const && GET_CODE (base) == PLUS)
1761 base = gen_rtx (CONST, GET_MODE (base), base);
1763 if (GET_CODE (offset) != CONST_INT)
1766 val.start = INTVAL (offset);
1767 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
1771 else if (GET_CODE (x) == REG)
1774 val.start = true_regnum (x);
1777 /* A pseudo with no hard reg. */
1778 val.start = REGNO (x);
1779 val.end = val.start + 1;
1783 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
1785 else if (GET_CODE (x) == SUBREG)
1787 if (GET_CODE (SUBREG_REG (x)) != REG)
1788 /* This could be more precise, but it's good enough. */
1789 return decompose (SUBREG_REG (x));
1791 val.start = true_regnum (x);
1793 return decompose (SUBREG_REG (x));
1796 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
1798 else if (CONSTANT_P (x)
1799 /* This hasn't been assigned yet, so it can't conflict yet. */
1800 || GET_CODE (x) == SCRATCH)
1807 /* Return 1 if altering Y will not modify the value of X.
1808 Y is also described by YDATA, which should be decompose (Y). */
1811 immune_p (x, y, ydata)
1813 struct decomposition ydata;
1815 struct decomposition xdata;
1818 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
1822 if (GET_CODE (y) != MEM)
1824 /* If Y is memory and X is not, Y can't affect X. */
1825 if (GET_CODE (x) != MEM)
1828 xdata = decompose (x);
1830 if (! rtx_equal_p (xdata.base, ydata.base))
1832 /* If bases are distinct symbolic constants, there is no overlap. */
1833 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
1835 /* Constants and stack slots never overlap. */
1836 if (CONSTANT_P (xdata.base)
1837 && (ydata.base == frame_pointer_rtx
1838 || ydata.base == stack_pointer_rtx))
1840 if (CONSTANT_P (ydata.base)
1841 && (xdata.base == frame_pointer_rtx
1842 || xdata.base == stack_pointer_rtx))
1844 /* If either base is variable, we don't know anything. */
1849 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
1852 /* Similar, but calls decompose. */
1855 safe_from_earlyclobber (op, clobber)
1858 struct decomposition early_data;
1860 early_data = decompose (clobber);
1861 return immune_p (op, clobber, early_data);
1864 /* Main entry point of this file: search the body of INSN
1865 for values that need reloading and record them with push_reload.
1866 REPLACE nonzero means record also where the values occur
1867 so that subst_reloads can be used.
1869 IND_LEVELS says how many levels of indirection are supported by this
1870 machine; a value of zero means that a memory reference is not a valid
1873 LIVE_KNOWN says we have valid information about which hard
1874 regs are live at each point in the program; this is true when
1875 we are called from global_alloc but false when stupid register
1876 allocation has been done.
1878 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
1879 which is nonnegative if the reg has been commandeered for reloading into.
1880 It is copied into STATIC_RELOAD_REG_P and referenced from there
1881 by various subroutines. */
1884 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
1886 int replace, ind_levels;
1888 short *reload_reg_p;
1890 rtx non_reloaded_operands[MAX_RECOG_OPERANDS];
1891 int n_non_reloaded_operands = 0;
1892 #ifdef REGISTER_CONSTRAINTS
1894 enum reload_modified { RELOAD_NOTHING, RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE };
1896 register int insn_code_number;
1899 /* These are the constraints for the insn. We don't change them. */
1900 char *constraints1[MAX_RECOG_OPERANDS];
1901 /* These start out as the constraints for the insn
1902 and they are chewed up as we consider alternatives. */
1903 char *constraints[MAX_RECOG_OPERANDS];
1904 /* These are the preferred classes for an operand, or NO_REGS if it isn't
1906 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
1907 char pref_or_nothing[MAX_RECOG_OPERANDS];
1908 /* Nonzero for a MEM operand whose entire address needs a reload. */
1909 int address_reloaded[MAX_RECOG_OPERANDS];
1910 int no_input_reloads = 0, no_output_reloads = 0;
1912 int this_alternative[MAX_RECOG_OPERANDS];
1913 char this_alternative_win[MAX_RECOG_OPERANDS];
1914 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
1915 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
1916 int this_alternative_matches[MAX_RECOG_OPERANDS];
1918 int goal_alternative[MAX_RECOG_OPERANDS];
1919 int this_alternative_number;
1920 int goal_alternative_number;
1921 int operand_reloadnum[MAX_RECOG_OPERANDS];
1922 int goal_alternative_matches[MAX_RECOG_OPERANDS];
1923 int goal_alternative_matched[MAX_RECOG_OPERANDS];
1924 char goal_alternative_win[MAX_RECOG_OPERANDS];
1925 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
1926 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
1927 int goal_alternative_swapped;
1928 enum reload_modified modified[MAX_RECOG_OPERANDS];
1931 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
1932 rtx substed_operand[MAX_RECOG_OPERANDS];
1933 rtx body = PATTERN (insn);
1934 rtx set = single_set (insn);
1935 int goal_earlyclobber, this_earlyclobber;
1936 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
1939 this_insn_is_asm = 0; /* Tentative. */
1943 n_earlyclobbers = 0;
1944 replace_reloads = replace;
1945 hard_regs_live_known = live_known;
1946 static_reload_reg_p = reload_reg_p;
1948 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
1949 neither are insns that SET cc0. Insns that use CC0 are not allowed
1950 to have any input reloads. */
1951 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
1952 no_output_reloads = 1;
1955 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
1956 no_input_reloads = 1;
1957 if (reg_set_p (cc0_rtx, PATTERN (insn)))
1958 no_output_reloads = 1;
1961 #ifdef SECONDARY_MEMORY_NEEDED
1962 /* The eliminated forms of any secondary memory locations are per-insn, so
1963 clear them out here. */
1965 bzero (secondary_memlocs_elim, sizeof secondary_memlocs_elim);
1968 /* Find what kind of insn this is. NOPERANDS gets number of operands.
1969 Make OPERANDS point to a vector of operand values.
1970 Make OPERAND_LOCS point to a vector of pointers to
1971 where the operands were found.
1972 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
1973 constraint-strings for this insn.
1974 Return if the insn needs no reload processing. */
1976 switch (GET_CODE (body))
1986 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
1987 is cheap to move between them. If it is not, there may not be an insn
1988 to do the copy, so we may need a reload. */
1989 if (GET_CODE (SET_DEST (body)) == REG
1990 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
1991 && GET_CODE (SET_SRC (body)) == REG
1992 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
1993 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
1994 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
1998 noperands = asm_noperands (body);
2001 /* This insn is an `asm' with operands. */
2003 insn_code_number = -1;
2004 this_insn_is_asm = 1;
2006 /* expand_asm_operands makes sure there aren't too many operands. */
2007 if (noperands > MAX_RECOG_OPERANDS)
2010 /* Now get the operand values and constraints out of the insn. */
2012 decode_asm_operands (body, recog_operand, recog_operand_loc,
2013 constraints, operand_mode);
2016 bcopy (constraints, constraints1, noperands * sizeof (char *));
2017 n_alternatives = n_occurrences (',', constraints[0]) + 1;
2018 for (i = 1; i < noperands; i++)
2019 if (n_alternatives != n_occurrences (',', constraints[i]) + 1)
2021 error_for_asm (insn, "operand constraints differ in number of alternatives");
2022 /* Avoid further trouble with this insn. */
2023 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
2032 /* Ordinary insn: recognize it, get the operands via insn_extract
2033 and get the constraints. */
2035 insn_code_number = recog_memoized (insn);
2036 if (insn_code_number < 0)
2037 fatal_insn_not_found (insn);
2039 noperands = insn_n_operands[insn_code_number];
2040 n_alternatives = insn_n_alternatives[insn_code_number];
2041 /* Just return "no reloads" if insn has no operands with constraints. */
2042 if (n_alternatives == 0)
2044 insn_extract (insn);
2045 for (i = 0; i < noperands; i++)
2047 constraints[i] = constraints1[i]
2048 = insn_operand_constraint[insn_code_number][i];
2049 operand_mode[i] = insn_operand_mode[insn_code_number][i];
2058 /* If we will need to know, later, whether some pair of operands
2059 are the same, we must compare them now and save the result.
2060 Reloading the base and index registers will clobber them
2061 and afterward they will fail to match. */
2063 for (i = 0; i < noperands; i++)
2068 substed_operand[i] = recog_operand[i];
2071 /* Scan this operand's constraint to see if it should match another. */
2076 /* The last operand should not be marked commutative. */
2077 if (i == noperands - 1)
2079 if (this_insn_is_asm)
2080 warning_for_asm (this_insn,
2081 "`%%' constraint used with last operand");
2088 else if (c >= '0' && c <= '9')
2091 operands_match[c][i]
2092 = operands_match_p (recog_operand[c], recog_operand[i]);
2093 /* If C can be commuted with C+1, and C might need to match I,
2094 then C+1 might also need to match I. */
2095 if (commutative >= 0)
2097 if (c == commutative || c == commutative + 1)
2099 int other = c + (c == commutative ? 1 : -1);
2100 operands_match[other][i]
2101 = operands_match_p (recog_operand[other], recog_operand[i]);
2103 if (i == commutative || i == commutative + 1)
2105 int other = i + (i == commutative ? 1 : -1);
2106 operands_match[c][other]
2107 = operands_match_p (recog_operand[c], recog_operand[other]);
2109 /* Note that C is supposed to be less than I.
2110 No need to consider altering both C and I
2111 because in that case we would alter one into the other. */
2116 /* Examine each operand that is a memory reference or memory address
2117 and reload parts of the addresses into index registers.
2118 While we are at it, initialize the array `modified'.
2119 Also here any references to pseudo regs that didn't get hard regs
2120 but are equivalent to constants get replaced in the insn itself
2121 with those constants. Nobody will ever see them again.
2123 Finally, set up the preferred classes of each operand. */
2125 for (i = 0; i < noperands; i++)
2127 register RTX_CODE code = GET_CODE (recog_operand[i]);
2128 modified[i] = RELOAD_READ;
2129 address_reloaded[i] = 0;
2131 if (constraints[i][0] == 'p')
2133 find_reloads_address (VOIDmode, NULL_PTR,
2134 recog_operand[i], recog_operand_loc[i],
2135 recog_operand[i], ind_levels);
2136 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2138 else if (code == MEM)
2140 if (find_reloads_address (GET_MODE (recog_operand[i]),
2141 recog_operand_loc[i],
2142 XEXP (recog_operand[i], 0),
2143 &XEXP (recog_operand[i], 0),
2144 recog_operand[i], ind_levels))
2145 address_reloaded[i] = 1;
2146 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2148 else if (code == SUBREG)
2149 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2150 = find_reloads_toplev (recog_operand[i], ind_levels,
2152 && &SET_DEST (set) == recog_operand_loc[i]);
2153 else if (code == REG)
2155 /* This is equivalent to calling find_reloads_toplev.
2156 The code is duplicated for speed.
2157 When we find a pseudo always equivalent to a constant,
2158 we replace it by the constant. We must be sure, however,
2159 that we don't try to replace it in the insn in which it
2161 register int regno = REGNO (recog_operand[i]);
2162 if (reg_equiv_constant[regno] != 0
2163 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2164 substed_operand[i] = recog_operand[i]
2165 = reg_equiv_constant[regno];
2166 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2167 that feeds this insn. */
2168 if (reg_equiv_mem[regno] != 0)
2169 substed_operand[i] = recog_operand[i]
2170 = reg_equiv_mem[regno];
2172 if (reg_equiv_address[regno] != 0)
2174 /* If reg_equiv_address is not a constant address, copy it,
2175 since it may be shared. */
2176 rtx address = reg_equiv_address[regno];
2178 if (rtx_varies_p (address))
2179 address = copy_rtx (address);
2181 /* If this is an output operand, we must output a CLOBBER
2182 after INSN so find_equiv_reg knows REGNO is being written. */
2183 if (constraints[i][0] == '='
2184 || constraints[i][0] == '+')
2185 emit_insn_after (gen_rtx (CLOBBER, VOIDmode, recog_operand[i]),
2188 *recog_operand_loc[i] = recog_operand[i]
2189 = gen_rtx (MEM, GET_MODE (recog_operand[i]), address);
2190 RTX_UNCHANGING_P (recog_operand[i])
2191 = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
2192 find_reloads_address (GET_MODE (recog_operand[i]),
2193 recog_operand_loc[i],
2194 XEXP (recog_operand[i], 0),
2195 &XEXP (recog_operand[i], 0),
2196 recog_operand[i], ind_levels);
2197 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2200 /* If the operand is still a register (we didn't replace it with an
2201 equivalent), get the preferred class to reload it into. */
2202 code = GET_CODE (recog_operand[i]);
2204 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
2205 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2207 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
2208 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2211 /* If this is simply a copy from operand 1 to operand 0, merge the
2212 preferred classes for the operands. */
2213 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2214 && recog_operand[1] == SET_SRC (set))
2216 preferred_class[0] = preferred_class[1]
2217 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2218 pref_or_nothing[0] |= pref_or_nothing[1];
2219 pref_or_nothing[1] |= pref_or_nothing[0];
2222 /* Now see what we need for pseudo-regs that didn't get hard regs
2223 or got the wrong kind of hard reg. For this, we must consider
2224 all the operands together against the register constraints. */
2226 best = MAX_RECOG_OPERANDS + 300;
2229 goal_alternative_swapped = 0;
2232 /* The constraints are made of several alternatives.
2233 Each operand's constraint looks like foo,bar,... with commas
2234 separating the alternatives. The first alternatives for all
2235 operands go together, the second alternatives go together, etc.
2237 First loop over alternatives. */
2239 for (this_alternative_number = 0;
2240 this_alternative_number < n_alternatives;
2241 this_alternative_number++)
2243 /* Loop over operands for one constraint alternative. */
2244 /* LOSERS counts those that don't fit this alternative
2245 and would require loading. */
2247 /* BAD is set to 1 if it some operand can't fit this alternative
2248 even after reloading. */
2250 /* REJECT is a count of how undesirable this alternative says it is
2251 if any reloading is required. If the alternative matches exactly
2252 then REJECT is ignored, but otherwise it gets this much
2253 counted against it in addition to the reloading needed. Each
2254 ? counts three times here since we want the disparaging caused by
2255 a bad register class to only count 1/3 as much. */
2258 this_earlyclobber = 0;
2260 for (i = 0; i < noperands; i++)
2262 register char *p = constraints[i];
2263 register int win = 0;
2264 /* 0 => this operand can be reloaded somehow for this alternative */
2266 /* 0 => this operand can be reloaded if the alternative allows regs. */
2269 register rtx operand = recog_operand[i];
2271 /* Nonzero means this is a MEM that must be reloaded into a reg
2272 regardless of what the constraint says. */
2273 int force_reload = 0;
2275 int earlyclobber = 0;
2277 /* If the operand is a SUBREG, extract
2278 the REG or MEM (or maybe even a constant) within.
2279 (Constants can occur as a result of reg_equiv_constant.) */
2281 while (GET_CODE (operand) == SUBREG)
2283 offset += SUBREG_WORD (operand);
2284 operand = SUBREG_REG (operand);
2285 /* Force reload if this is not a register or if there may may
2286 be a problem accessing the register in the outer mode. */
2287 if (GET_CODE (operand) != REG
2288 #if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
2289 /* ??? The comment below clearly does not match the code.
2290 What the code below actually does is set force_reload
2291 for a paradoxical subreg of a pseudo. rms and kenner
2292 can't see the point of doing this. */
2293 /* Nonparadoxical subreg of a pseudoreg.
2294 Don't to load the full width if on this machine
2295 we expected the fetch to extend. */
2296 || ((GET_MODE_SIZE (operand_mode[i])
2297 > GET_MODE_SIZE (GET_MODE (operand)))
2298 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
2300 /* Subreg of a hard reg which can't handle the subreg's mode
2301 or which would handle that mode in the wrong number of
2302 registers for subregging to work. */
2303 || (REGNO (operand) < FIRST_PSEUDO_REGISTER
2304 && (! HARD_REGNO_MODE_OK (REGNO (operand),
2306 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2307 && (GET_MODE_SIZE (GET_MODE (operand))
2309 && ((GET_MODE_SIZE (GET_MODE (operand))
2311 != HARD_REGNO_NREGS (REGNO (operand),
2312 GET_MODE (operand)))))))
2316 this_alternative[i] = (int) NO_REGS;
2317 this_alternative_win[i] = 0;
2318 this_alternative_offmemok[i] = 0;
2319 this_alternative_earlyclobber[i] = 0;
2320 this_alternative_matches[i] = -1;
2322 /* An empty constraint or empty alternative
2323 allows anything which matched the pattern. */
2324 if (*p == 0 || *p == ',')
2327 /* Scan this alternative's specs for this operand;
2328 set WIN if the operand fits any letter in this alternative.
2329 Otherwise, clear BADOP if this operand could
2330 fit some letter after reloads,
2331 or set WINREG if this operand could fit after reloads
2332 provided the constraint allows some registers. */
2334 while (*p && (c = *p++) != ',')
2338 modified[i] = RELOAD_WRITE;
2342 modified[i] = RELOAD_READ_WRITE;
2349 /* The last operand should not be marked commutative. */
2350 if (i != noperands - 1)
2363 /* Ignore rest of this alternative as far as
2364 reloading is concerned. */
2365 while (*p && *p != ',') p++;
2374 this_alternative_matches[i] = c;
2375 /* We are supposed to match a previous operand.
2376 If we do, we win if that one did.
2377 If we do not, count both of the operands as losers.
2378 (This is too conservative, since most of the time
2379 only a single reload insn will be needed to make
2380 the two operands win. As a result, this alternative
2381 may be rejected when it is actually desirable.) */
2382 if ((swapped && (c != commutative || i != commutative + 1))
2383 /* If we are matching as if two operands were swapped,
2384 also pretend that operands_match had been computed
2386 But if I is the second of those and C is the first,
2387 don't exchange them, because operands_match is valid
2388 only on one side of its diagonal. */
2390 [(c == commutative || c == commutative + 1)
2391 ? 2*commutative + 1 - c : c]
2392 [(i == commutative || i == commutative + 1)
2393 ? 2*commutative + 1 - i : i])
2394 : operands_match[c][i])
2395 win = this_alternative_win[c];
2398 /* Operands don't match. */
2400 /* Retroactively mark the operand we had to match
2401 as a loser, if it wasn't already. */
2402 if (this_alternative_win[c])
2404 this_alternative_win[c] = 0;
2405 if (this_alternative[c] == (int) NO_REGS)
2407 /* But count the pair only once in the total badness of
2408 this alternative, if the pair can be a dummy reload. */
2410 = find_dummy_reload (recog_operand[i], recog_operand[c],
2411 recog_operand_loc[i], recog_operand_loc[c],
2412 this_alternative[c], -1);
2417 /* This can be fixed with reloads if the operand
2418 we are supposed to match can be fixed with reloads. */
2420 this_alternative[i] = this_alternative[c];
2424 /* All necessary reloads for an address_operand
2425 were handled in find_reloads_address. */
2426 this_alternative[i] = (int) ALL_REGS;
2433 if (GET_CODE (operand) == MEM
2434 || (GET_CODE (operand) == REG
2435 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2436 && reg_renumber[REGNO (operand)] < 0))
2438 if (CONSTANT_P (operand))
2443 if (GET_CODE (operand) == MEM
2444 && ! address_reloaded[i]
2445 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2446 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2451 if (GET_CODE (operand) == MEM
2452 && ! address_reloaded[i]
2453 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2454 || GET_CODE (XEXP (operand, 0)) == POST_INC))
2458 /* Memory operand whose address is not offsettable. */
2462 if (GET_CODE (operand) == MEM
2463 && ! (ind_levels ? offsettable_memref_p (operand)
2464 : offsettable_nonstrict_memref_p (operand))
2465 /* Certain mem addresses will become offsettable
2466 after they themselves are reloaded. This is important;
2467 we don't want our own handling of unoffsettables
2468 to override the handling of reg_equiv_address. */
2469 && !(GET_CODE (XEXP (operand, 0)) == REG
2471 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
2475 /* Memory operand whose address is offsettable. */
2479 if ((GET_CODE (operand) == MEM
2480 /* If IND_LEVELS, find_reloads_address won't reload a
2481 pseudo that didn't get a hard reg, so we have to
2482 reject that case. */
2483 && (ind_levels ? offsettable_memref_p (operand)
2484 : offsettable_nonstrict_memref_p (operand)))
2485 /* Certain mem addresses will become offsettable
2486 after they themselves are reloaded. This is important;
2487 we don't want our own handling of unoffsettables
2488 to override the handling of reg_equiv_address. */
2489 || (GET_CODE (operand) == MEM
2490 && GET_CODE (XEXP (operand, 0)) == REG
2492 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))
2493 || (GET_CODE (operand) == REG
2494 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2495 && reg_renumber[REGNO (operand)] < 0))
2497 if (CONSTANT_P (operand) || GET_CODE (operand) == MEM)
2503 /* Output operand that is stored before the need for the
2504 input operands (and their index registers) is over. */
2505 earlyclobber = 1, this_earlyclobber = 1;
2509 /* Match any floating double constant, but only if
2510 we can examine the bits of it reliably. */
2511 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
2512 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
2513 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
2515 if (GET_CODE (operand) == CONST_DOUBLE)
2520 if (GET_CODE (operand) == CONST_DOUBLE)
2526 if (GET_CODE (operand) == CONST_DOUBLE
2527 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
2532 if (GET_CODE (operand) == CONST_INT
2533 || (GET_CODE (operand) == CONST_DOUBLE
2534 && GET_MODE (operand) == VOIDmode))
2537 if (CONSTANT_P (operand)
2538 #ifdef LEGITIMATE_PIC_OPERAND_P
2539 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
2546 if (GET_CODE (operand) == CONST_INT
2547 || (GET_CODE (operand) == CONST_DOUBLE
2548 && GET_MODE (operand) == VOIDmode))
2560 if (GET_CODE (operand) == CONST_INT
2561 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
2571 /* A PLUS is never a valid operand, but reload can make
2572 it from a register when eliminating registers. */
2573 && GET_CODE (operand) != PLUS
2574 /* A SCRATCH is not a valid operand. */
2575 && GET_CODE (operand) != SCRATCH
2576 #ifdef LEGITIMATE_PIC_OPERAND_P
2577 && (! CONSTANT_P (operand)
2579 || LEGITIMATE_PIC_OPERAND_P (operand))
2581 && (GENERAL_REGS == ALL_REGS
2582 || GET_CODE (operand) != REG
2583 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
2584 && reg_renumber[REGNO (operand)] < 0)))
2586 /* Drop through into 'r' case */
2590 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
2593 #ifdef EXTRA_CONSTRAINT
2599 if (EXTRA_CONSTRAINT (operand, c))
2606 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
2609 if (GET_MODE (operand) == BLKmode)
2612 if (GET_CODE (operand) == REG
2613 && reg_fits_class_p (operand, this_alternative[i],
2614 offset, GET_MODE (recog_operand[i])))
2621 /* If this operand could be handled with a reg,
2622 and some reg is allowed, then this operand can be handled. */
2623 if (winreg && this_alternative[i] != (int) NO_REGS)
2626 /* Record which operands fit this alternative. */
2627 this_alternative_earlyclobber[i] = earlyclobber;
2628 if (win && ! force_reload)
2629 this_alternative_win[i] = 1;
2632 this_alternative_offmemok[i] = offmemok;
2636 /* Alternative loses if it has no regs for a reg operand. */
2637 if (GET_CODE (operand) == REG
2638 && this_alternative[i] == (int) NO_REGS
2639 && this_alternative_matches[i] < 0)
2642 /* Alternative loses if it requires a type of reload not
2643 permitted for this insn. We can always reload SCRATCH
2644 and objects with a REG_UNUSED note. */
2645 if (GET_CODE (operand) != SCRATCH && modified[i] != RELOAD_READ
2646 && no_output_reloads
2647 && ! find_reg_note (insn, REG_UNUSED, operand))
2649 else if (modified[i] != RELOAD_WRITE && no_input_reloads)
2652 /* We prefer to reload pseudos over reloading other things,
2653 since such reloads may be able to be eliminated later.
2654 If we are reloading a SCRATCH, we won't be generating any
2655 insns, just using a register, so it is also preferred.
2656 So bump REJECT in other cases. */
2657 if (GET_CODE (operand) != REG && GET_CODE (operand) != SCRATCH)
2661 /* If this operand is a pseudo register that didn't get a hard
2662 reg and this alternative accepts some register, see if the
2663 class that we want is a subset of the preferred class for this
2664 register. If not, but it intersects that class, use the
2665 preferred class instead. If it does not intersect the preferred
2666 class, show that usage of this alternative should be discouraged;
2667 it will be discouraged more still if the register is `preferred
2668 or nothing'. We do this because it increases the chance of
2669 reusing our spill register in a later insn and avoiding a pair
2670 of memory stores and loads.
2672 Don't bother with this if this alternative will accept this
2675 Don't do this if the preferred class has only one register
2676 because we might otherwise exhaust the class. */
2679 if (! win && this_alternative[i] != (int) NO_REGS
2680 && reg_class_size[(int) preferred_class[i]] > 1)
2682 if (! reg_class_subset_p (this_alternative[i],
2683 preferred_class[i]))
2685 /* Since we don't have a way of forming the intersection,
2686 we just do something special if the preferred class
2687 is a subset of the class we have; that's the most
2688 common case anyway. */
2689 if (reg_class_subset_p (preferred_class[i],
2690 this_alternative[i]))
2691 this_alternative[i] = (int) preferred_class[i];
2693 reject += (1 + pref_or_nothing[i]);
2698 /* Now see if any output operands that are marked "earlyclobber"
2699 in this alternative conflict with any input operands
2700 or any memory addresses. */
2702 for (i = 0; i < noperands; i++)
2703 if (this_alternative_earlyclobber[i]
2704 && this_alternative_win[i])
2706 struct decomposition early_data;
2709 early_data = decompose (recog_operand[i]);
2711 if (modified[i] == RELOAD_READ)
2713 if (this_insn_is_asm)
2714 warning_for_asm (this_insn,
2715 "`&' constraint used with input operand");
2721 if (this_alternative[i] == NO_REGS)
2723 this_alternative_earlyclobber[i] = 0;
2724 if (this_insn_is_asm)
2725 error_for_asm (this_insn,
2726 "`&' constraint used with no register class");
2731 for (j = 0; j < noperands; j++)
2732 /* Is this an input operand or a memory ref? */
2733 if ((GET_CODE (recog_operand[j]) == MEM
2734 || modified[j] != RELOAD_WRITE)
2736 /* Ignore things like match_operator operands. */
2737 && *constraints1[j] != 0
2738 /* Don't count an input operand that is constrained to match
2739 the early clobber operand. */
2740 && ! (this_alternative_matches[j] == i
2741 && rtx_equal_p (recog_operand[i], recog_operand[j]))
2742 /* Is it altered by storing the earlyclobber operand? */
2743 && !immune_p (recog_operand[j], recog_operand[i], early_data))
2745 /* If the output is in a single-reg class,
2746 it's costly to reload it, so reload the input instead. */
2747 if (reg_class_size[this_alternative[i]] == 1
2748 && (GET_CODE (recog_operand[j]) == REG
2749 || GET_CODE (recog_operand[j]) == SUBREG))
2752 this_alternative_win[j] = 0;
2757 /* If an earlyclobber operand conflicts with something,
2758 it must be reloaded, so request this and count the cost. */
2762 this_alternative_win[i] = 0;
2763 for (j = 0; j < noperands; j++)
2764 if (this_alternative_matches[j] == i
2765 && this_alternative_win[j])
2767 this_alternative_win[j] = 0;
2773 /* If one alternative accepts all the operands, no reload required,
2774 choose that alternative; don't consider the remaining ones. */
2777 /* Unswap these so that they are never swapped at `finish'. */
2778 if (commutative >= 0)
2780 recog_operand[commutative] = substed_operand[commutative];
2781 recog_operand[commutative + 1]
2782 = substed_operand[commutative + 1];
2784 for (i = 0; i < noperands; i++)
2786 goal_alternative_win[i] = 1;
2787 goal_alternative[i] = this_alternative[i];
2788 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
2789 goal_alternative_matches[i] = this_alternative_matches[i];
2790 goal_alternative_earlyclobber[i]
2791 = this_alternative_earlyclobber[i];
2793 goal_alternative_number = this_alternative_number;
2794 goal_alternative_swapped = swapped;
2795 goal_earlyclobber = this_earlyclobber;
2799 /* REJECT, set by the ! and ? constraint characters and when a register
2800 would be reloaded into a non-preferred class, discourages the use of
2801 this alternative for a reload goal. REJECT is incremented by three
2802 for each ? and one for each non-preferred class. */
2803 losers = losers * 3 + reject;
2805 /* If this alternative can be made to work by reloading,
2806 and it needs less reloading than the others checked so far,
2807 record it as the chosen goal for reloading. */
2808 if (! bad && best > losers)
2810 for (i = 0; i < noperands; i++)
2812 goal_alternative[i] = this_alternative[i];
2813 goal_alternative_win[i] = this_alternative_win[i];
2814 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
2815 goal_alternative_matches[i] = this_alternative_matches[i];
2816 goal_alternative_earlyclobber[i]
2817 = this_alternative_earlyclobber[i];
2819 goal_alternative_swapped = swapped;
2821 goal_alternative_number = this_alternative_number;
2822 goal_earlyclobber = this_earlyclobber;
2826 /* If insn is commutative (it's safe to exchange a certain pair of operands)
2827 then we need to try each alternative twice,
2828 the second time matching those two operands
2829 as if we had exchanged them.
2830 To do this, really exchange them in operands.
2832 If we have just tried the alternatives the second time,
2833 return operands to normal and drop through. */
2835 if (commutative >= 0)
2840 register enum reg_class tclass;
2843 recog_operand[commutative] = substed_operand[commutative + 1];
2844 recog_operand[commutative + 1] = substed_operand[commutative];
2846 tclass = preferred_class[commutative];
2847 preferred_class[commutative] = preferred_class[commutative + 1];
2848 preferred_class[commutative + 1] = tclass;
2850 t = pref_or_nothing[commutative];
2851 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
2852 pref_or_nothing[commutative + 1] = t;
2854 bcopy (constraints1, constraints, noperands * sizeof (char *));
2859 recog_operand[commutative] = substed_operand[commutative];
2860 recog_operand[commutative + 1] = substed_operand[commutative + 1];
2864 /* The operands don't meet the constraints.
2865 goal_alternative describes the alternative
2866 that we could reach by reloading the fewest operands.
2867 Reload so as to fit it. */
2869 if (best == MAX_RECOG_OPERANDS + 300)
2871 /* No alternative works with reloads?? */
2872 if (insn_code_number >= 0)
2874 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
2875 /* Avoid further trouble with this insn. */
2876 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
2881 /* Jump to `finish' from above if all operands are valid already.
2882 In that case, goal_alternative_win is all 1. */
2885 /* Right now, for any pair of operands I and J that are required to match,
2887 goal_alternative_matches[J] is I.
2888 Set up goal_alternative_matched as the inverse function:
2889 goal_alternative_matched[I] = J. */
2891 for (i = 0; i < noperands; i++)
2892 goal_alternative_matched[i] = -1;
2894 for (i = 0; i < noperands; i++)
2895 if (! goal_alternative_win[i]
2896 && goal_alternative_matches[i] >= 0)
2897 goal_alternative_matched[goal_alternative_matches[i]] = i;
2899 /* If the best alternative is with operands 1 and 2 swapped,
2900 consider them swapped before reporting the reloads. */
2902 if (goal_alternative_swapped)
2906 tem = substed_operand[commutative];
2907 substed_operand[commutative] = substed_operand[commutative + 1];
2908 substed_operand[commutative + 1] = tem;
2909 tem = recog_operand[commutative];
2910 recog_operand[commutative] = recog_operand[commutative + 1];
2911 recog_operand[commutative + 1] = tem;
2914 /* Perform whatever substitutions on the operands we are supposed
2915 to make due to commutativity or replacement of registers
2916 with equivalent constants or memory slots. */
2918 for (i = 0; i < noperands; i++)
2920 *recog_operand_loc[i] = substed_operand[i];
2921 /* While we are looping on operands, initialize this. */
2922 operand_reloadnum[i] = -1;
2925 /* Any constants that aren't allowed and can't be reloaded
2926 into registers are here changed into memory references. */
2927 for (i = 0; i < noperands; i++)
2928 if (! goal_alternative_win[i]
2929 && CONSTANT_P (recog_operand[i])
2930 && (PREFERRED_RELOAD_CLASS (recog_operand[i],
2931 (enum reg_class) goal_alternative[i])
2933 && operand_mode[i] != VOIDmode)
2935 *recog_operand_loc[i] = recog_operand[i]
2936 = find_reloads_toplev (force_const_mem (operand_mode[i],
2939 if (alternative_allows_memconst (constraints1[i],
2940 goal_alternative_number))
2941 goal_alternative_win[i] = 1;
2944 /* Now record reloads for all the operands that need them. */
2945 for (i = 0; i < noperands; i++)
2946 if (! goal_alternative_win[i])
2948 /* Operands that match previous ones have already been handled. */
2949 if (goal_alternative_matches[i] >= 0)
2951 /* Handle an operand with a nonoffsettable address
2952 appearing where an offsettable address will do
2953 by reloading the address into a base register. */
2954 else if (goal_alternative_matched[i] == -1
2955 && goal_alternative_offmemok[i]
2956 && GET_CODE (recog_operand[i]) == MEM)
2958 operand_reloadnum[i]
2959 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
2960 &XEXP (recog_operand[i], 0), NULL_PTR,
2961 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
2962 VOIDmode, 0, 0, NULL_RTX);
2963 reload_inc[operand_reloadnum[i]]
2964 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
2966 else if (goal_alternative_matched[i] == -1)
2967 operand_reloadnum[i] =
2968 push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
2969 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
2970 modified[i] != RELOAD_WRITE ? recog_operand_loc[i] : 0,
2971 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
2972 (enum reg_class) goal_alternative[i],
2973 (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]),
2974 (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]),
2975 (insn_code_number < 0 ? 0
2976 : insn_operand_strict_low[insn_code_number][i]),
2978 /* In a matching pair of operands, one must be input only
2979 and the other must be output only.
2980 Pass the input operand as IN and the other as OUT. */
2981 else if (modified[i] == RELOAD_READ
2982 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
2984 operand_reloadnum[i]
2985 = push_reload (recog_operand[i],
2986 recog_operand[goal_alternative_matched[i]],
2987 recog_operand_loc[i],
2988 recog_operand_loc[goal_alternative_matched[i]],
2989 (enum reg_class) goal_alternative[i],
2991 operand_mode[goal_alternative_matched[i]],
2993 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
2995 else if (modified[i] == RELOAD_WRITE
2996 && modified[goal_alternative_matched[i]] == RELOAD_READ)
2998 operand_reloadnum[goal_alternative_matched[i]]
2999 = push_reload (recog_operand[goal_alternative_matched[i]],
3001 recog_operand_loc[goal_alternative_matched[i]],
3002 recog_operand_loc[i],
3003 (enum reg_class) goal_alternative[i],
3004 operand_mode[goal_alternative_matched[i]],
3007 operand_reloadnum[i] = output_reloadnum;
3009 else if (insn_code_number >= 0)
3013 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3014 /* Avoid further trouble with this insn. */
3015 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3020 else if (goal_alternative_matched[i] < 0
3021 && goal_alternative_matches[i] < 0
3024 rtx operand = recog_operand[i];
3025 /* For each non-matching operand that's a pseudo-register
3026 that didn't get a hard register, make an optional reload.
3027 This may get done even if the insn needs no reloads otherwise. */
3028 /* (It would be safe to make an optional reload for a matching pair
3029 of operands, but we don't bother yet.) */
3030 while (GET_CODE (operand) == SUBREG)
3031 operand = XEXP (operand, 0);
3032 if (GET_CODE (operand) == REG
3033 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3034 && reg_renumber[REGNO (operand)] < 0
3035 && (enum reg_class) goal_alternative[i] != NO_REGS
3036 /* Don't make optional output reloads for jump insns
3037 (such as aobjeq on the vax). */
3038 && (modified[i] == RELOAD_READ
3039 || GET_CODE (insn) != JUMP_INSN))
3040 operand_reloadnum[i]
3041 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3042 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3043 modified[i] != RELOAD_WRITE ? recog_operand_loc[i] : 0,
3044 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
3045 (enum reg_class) goal_alternative[i],
3046 (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]),
3047 (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]),
3048 (insn_code_number < 0 ? 0
3049 : insn_operand_strict_low[insn_code_number][i]),
3051 /* Make an optional reload for an explicit mem ref. */
3052 else if (GET_CODE (operand) == MEM
3053 && (enum reg_class) goal_alternative[i] != NO_REGS
3054 /* Don't make optional output reloads for jump insns
3055 (such as aobjeq on the vax). */
3056 && (modified[i] == RELOAD_READ
3057 || GET_CODE (insn) != JUMP_INSN))
3058 operand_reloadnum[i]
3059 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3060 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3061 modified[i] != RELOAD_WRITE ? recog_operand_loc[i] : 0,
3062 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
3063 (enum reg_class) goal_alternative[i],
3064 (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]),
3065 (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]),
3066 (insn_code_number < 0 ? 0
3067 : insn_operand_strict_low[insn_code_number][i]),
3070 non_reloaded_operands[n_non_reloaded_operands++] = recog_operand[i];
3072 else if (goal_alternative_matched[i] < 0
3073 && goal_alternative_matches[i] < 0)
3074 non_reloaded_operands[n_non_reloaded_operands++] = recog_operand[i];
3076 /* Record the values of the earlyclobber operands for the caller. */
3077 if (goal_earlyclobber)
3078 for (i = 0; i < noperands; i++)
3079 if (goal_alternative_earlyclobber[i])
3080 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3082 /* If this insn pattern contains any MATCH_DUP's, make sure that
3083 they will be substituted if the operands they match are substituted.
3084 Also do now any substitutions we already did on the operands.
3086 Don't do this if we aren't making replacements because we might be
3087 propagating things allocated by frame pointer elimination into places
3088 it doesn't expect. */
3090 if (insn_code_number >= 0 && replace)
3091 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3093 int opno = recog_dup_num[i];
3094 *recog_dup_loc[i] = *recog_operand_loc[opno];
3095 if (operand_reloadnum[opno] >= 0)
3096 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3097 insn_operand_mode[insn_code_number][opno]);
3101 /* This loses because reloading of prior insns can invalidate the equivalence
3102 (or at least find_equiv_reg isn't smart enough to find it any more),
3103 causing this insn to need more reload regs than it needed before.
3104 It may be too late to make the reload regs available.
3105 Now this optimization is done safely in choose_reload_regs. */
3107 /* For each reload of a reg into some other class of reg,
3108 search for an existing equivalent reg (same value now) in the right class.
3109 We can use it as long as we don't need to change its contents. */
3110 for (i = 0; i < n_reloads; i++)
3111 if (reload_reg_rtx[i] == 0
3112 && reload_in[i] != 0
3113 && GET_CODE (reload_in[i]) == REG
3114 && reload_out[i] == 0)
3117 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3118 static_reload_reg_p, 0, reload_inmode[i]);
3119 /* Prevent generation of insn to load the value
3120 because the one we found already has the value. */
3121 if (reload_reg_rtx[i])
3122 reload_in[i] = reload_reg_rtx[i];
3126 #else /* no REGISTER_CONSTRAINTS */
3128 int insn_code_number;
3129 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
3131 rtx body = PATTERN (insn);
3135 n_earlyclobbers = 0;
3136 replace_reloads = replace;
3139 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3140 Store the operand values in RECOG_OPERAND and the locations
3141 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3142 Return if the insn needs no reload processing. */
3144 switch (GET_CODE (body))
3155 noperands = asm_noperands (body);
3158 /* This insn is an `asm' with operands.
3159 First, find out how many operands, and allocate space. */
3161 insn_code_number = -1;
3162 /* ??? This is a bug! ???
3163 Give up and delete this insn if it has too many operands. */
3164 if (noperands > MAX_RECOG_OPERANDS)
3167 /* Now get the operand values out of the insn. */
3169 decode_asm_operands (body, recog_operand, recog_operand_loc,
3170 NULL_PTR, NULL_PTR);
3175 /* Ordinary insn: recognize it, allocate space for operands and
3176 constraints, and get them out via insn_extract. */
3178 insn_code_number = recog_memoized (insn);
3179 noperands = insn_n_operands[insn_code_number];
3180 insn_extract (insn);
3186 for (i = 0; i < noperands; i++)
3188 register RTX_CODE code = GET_CODE (recog_operand[i]);
3189 int is_set_dest = GET_CODE (body) == SET && (i == 0);
3191 if (insn_code_number >= 0)
3192 if (insn_operand_address_p[insn_code_number][i])
3193 find_reloads_address (VOIDmode, NULL_PTR,
3194 recog_operand[i], recog_operand_loc[i],
3195 recog_operand[i], ind_levels);
3197 find_reloads_address (GET_MODE (recog_operand[i]),
3198 recog_operand_loc[i],
3199 XEXP (recog_operand[i], 0),
3200 &XEXP (recog_operand[i], 0),
3201 recog_operand[i], ind_levels);
3203 recog_operand[i] = *recog_operand_loc[i]
3204 = find_reloads_toplev (recog_operand[i], ind_levels, is_set_dest);
3207 register int regno = REGNO (recog_operand[i]);
3208 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3209 recog_operand[i] = *recog_operand_loc[i]
3210 = reg_equiv_constant[regno];
3211 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3212 that feeds this insn. */
3213 if (reg_equiv_mem[regno] != 0)
3214 recog_operand[i] = *recog_operand_loc[i]
3215 = reg_equiv_mem[regno];
3218 /* All operands are non-reloaded. */
3219 non_reloaded_operands[n_non_reloaded_operands++] = recog_operand[i];
3221 #endif /* no REGISTER_CONSTRAINTS */
3223 /* Determine which part of the insn each reload is needed for,
3224 based on which operand the reload is needed for.
3225 Reloads of entire operands are classified as RELOAD_OTHER.
3226 So are reloads for which a unique purpose is not known. */
3228 for (i = 0; i < n_reloads; i++)
3230 reload_when_needed[i] = RELOAD_OTHER;
3232 if (reload_needed_for[i] != 0 && ! reload_needed_for_multiple[i])
3235 int output_address = 0;
3236 int input_address = 0;
3237 int operand_address = 0;
3239 /* This reload is needed only for the address of something.
3240 Determine whether it is needed for addressing an operand
3241 being reloaded for input, whether it is needed for an
3242 operand being reloaded for output, and whether it is needed
3243 for addressing an operand that won't really be reloaded.
3245 Note that we know that this reload is needed in only one address,
3246 but we have not yet checked for the case where that same address
3247 is used in both input and output reloads.
3248 The following code detects this case. */
3250 for (j = 0; j < n_reloads; j++)
3251 if (reload_needed_for[i] == reload_in[j]
3252 || reload_needed_for[i] == reload_out[j])
3254 if (reload_optional[j])
3255 operand_address = 1;
3258 if (reload_needed_for[i] == reload_in[j])
3260 if (reload_needed_for[i] == reload_out[j])
3264 /* Don't ignore memrefs without optional reloads. */
3265 for (j = 0; j < n_non_reloaded_operands; j++)
3266 if (reload_needed_for[i] == non_reloaded_operands[j])
3267 operand_address = 1;
3269 /* If it is needed for only one of those, record which one. */
3271 if (input_address && ! output_address && ! operand_address)
3272 reload_when_needed[i] = RELOAD_FOR_INPUT_RELOAD_ADDRESS;
3273 if (output_address && ! input_address && ! operand_address)
3274 reload_when_needed[i] = RELOAD_FOR_OUTPUT_RELOAD_ADDRESS;
3275 if (operand_address && ! input_address && ! output_address)
3276 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3278 /* Indicate those RELOAD_OTHER reloads which, though they have
3279 0 for reload_output, still cannot overlap an output reload. */
3281 if (output_address && reload_when_needed[i] == RELOAD_OTHER)
3282 reload_needed_for_multiple[i] = 1;
3284 /* If we have earlyclobbers, make sure nothing overlaps them. */
3285 if (n_earlyclobbers > 0)
3287 reload_when_needed[i] = RELOAD_OTHER;
3288 reload_needed_for_multiple[i] = 1;
3293 /* Perhaps an output reload can be combined with another
3294 to reduce needs by one. */
3295 if (!goal_earlyclobber)
3299 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3300 accepts a memory operand with constant address. */
3303 alternative_allows_memconst (constraint, altnum)
3308 /* Skip alternatives before the one requested. */
3311 while (*constraint++ != ',');
3314 /* Scan the requested alternative for 'm' or 'o'.
3315 If one of them is present, this alternative accepts memory constants. */
3316 while ((c = *constraint++) && c != ',' && c != '#')
3317 if (c == 'm' || c == 'o')
3322 /* Scan X for memory references and scan the addresses for reloading.
3323 Also checks for references to "constant" regs that we want to eliminate
3324 and replaces them with the values they stand for.
3325 We may alter X destructively if it contains a reference to such.
3326 If X is just a constant reg, we return the equivalent value
3329 IND_LEVELS says how many levels of indirect addressing this machine
3332 IS_SET_DEST is true if X is the destination of a SET, which is not
3333 appropriate to be replaced by a constant. */
3336 find_reloads_toplev (x, ind_levels, is_set_dest)
3341 register RTX_CODE code = GET_CODE (x);
3343 register char *fmt = GET_RTX_FORMAT (code);
3348 /* This code is duplicated for speed in find_reloads. */
3349 register int regno = REGNO (x);
3350 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3351 x = reg_equiv_constant[regno];
3353 /* This creates (subreg (mem...)) which would cause an unnecessary
3354 reload of the mem. */
3355 else if (reg_equiv_mem[regno] != 0)
3356 x = reg_equiv_mem[regno];
3358 else if (reg_equiv_address[regno] != 0)
3360 /* If reg_equiv_address varies, it may be shared, so copy it. */
3361 rtx addr = reg_equiv_address[regno];
3363 if (rtx_varies_p (addr))
3364 addr = copy_rtx (addr);
3366 x = gen_rtx (MEM, GET_MODE (x), addr);
3367 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3368 find_reloads_address (GET_MODE (x), NULL_PTR,
3370 &XEXP (x, 0), x, ind_levels);
3377 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
3382 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
3384 /* Check for SUBREG containing a REG that's equivalent to a constant.
3385 If the constant has a known value, truncate it right now.
3386 Similarly if we are extracting a single-word of a multi-word
3387 constant. If the constant is symbolic, allow it to be substituted
3388 normally. push_reload will strip the subreg later. If the
3389 constant is VOIDmode, abort because we will lose the mode of
3390 the register (this should never happen because one of the cases
3391 above should handle it). */
3393 register int regno = REGNO (SUBREG_REG (x));
3396 if (subreg_lowpart_p (x)
3397 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3398 && reg_equiv_constant[regno] != 0
3399 && (tem = gen_lowpart_common (GET_MODE (x),
3400 reg_equiv_constant[regno])) != 0)
3403 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
3404 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3405 && reg_equiv_constant[regno] != 0
3406 && (tem = operand_subword (reg_equiv_constant[regno],
3408 GET_MODE (SUBREG_REG (x)))) != 0)
3411 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3412 && reg_equiv_constant[regno] != 0
3413 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
3416 /* If the subreg contains a reg that will be converted to a mem,
3417 convert the subreg to a narrower memref now.
3418 Otherwise, we would get (subreg (mem ...) ...),
3419 which would force reload of the mem.
3421 We also need to do this if there is an equivalent MEM that is
3422 not offsettable. In that case, alter_subreg would produce an
3423 invalid address on big-endian machines.
3425 For machines that extend byte loads, we must not reload using
3426 a wider mode if we have a paradoxical SUBREG. find_reloads will
3427 force a reload in that case. So we should not do anything here. */
3429 else if (regno >= FIRST_PSEUDO_REGISTER
3430 #if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
3431 && (GET_MODE_SIZE (GET_MODE (x))
3432 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3434 && (reg_equiv_address[regno] != 0
3435 || (reg_equiv_mem[regno] != 0
3436 && ! offsettable_memref_p (reg_equiv_mem[regno]))))
3438 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
3439 rtx addr = (reg_equiv_address[regno] ? reg_equiv_address[regno]
3440 : XEXP (reg_equiv_mem[regno], 0));
3441 #if BYTES_BIG_ENDIAN
3443 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
3444 offset += MIN (size, UNITS_PER_WORD);
3445 size = GET_MODE_SIZE (GET_MODE (x));
3446 offset -= MIN (size, UNITS_PER_WORD);
3448 addr = plus_constant (addr, offset);
3449 x = gen_rtx (MEM, GET_MODE (x), addr);
3450 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3451 find_reloads_address (GET_MODE (x), NULL_PTR,
3453 &XEXP (x, 0), x, ind_levels);
3458 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3461 XEXP (x, i) = find_reloads_toplev (XEXP (x, i),
3462 ind_levels, is_set_dest);
3468 make_memloc (ad, regno)
3473 rtx tem = reg_equiv_address[regno];
3474 for (i = 0; i < n_memlocs; i++)
3475 if (rtx_equal_p (tem, XEXP (memlocs[i], 0)))
3478 /* If TEM might contain a pseudo, we must copy it to avoid
3479 modifying it when we do the substitution for the reload. */
3480 if (rtx_varies_p (tem))
3481 tem = copy_rtx (tem);
3483 tem = gen_rtx (MEM, GET_MODE (ad), tem);
3484 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3485 memlocs[n_memlocs++] = tem;
3489 /* Record all reloads needed for handling memory address AD
3490 which appears in *LOC in a memory reference to mode MODE
3491 which itself is found in location *MEMREFLOC.
3492 Note that we take shortcuts assuming that no multi-reg machine mode
3493 occurs as part of an address.
3495 OPERAND is the operand of the insn within which this address appears.
3497 IND_LEVELS says how many levels of indirect addressing this machine
3500 Value is nonzero if this address is reloaded or replaced as a whole.
3501 This is interesting to the caller if the address is an autoincrement.
3503 Note that there is no verification that the address will be valid after
3504 this routine does its work. Instead, we rely on the fact that the address
3505 was valid when reload started. So we need only undo things that reload
3506 could have broken. These are wrong register types, pseudos not allocated
3507 to a hard register, and frame pointer elimination. */
3510 find_reloads_address (mode, memrefloc, ad, loc, operand, ind_levels)
3511 enum machine_mode mode;
3521 /* If the address is a register, see if it is a legitimate address and
3522 reload if not. We first handle the cases where we need not reload
3523 or where we must reload in a non-standard way. */
3525 if (GET_CODE (ad) == REG)
3529 if (reg_equiv_constant[regno] != 0
3530 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
3532 *loc = ad = reg_equiv_constant[regno];
3536 else if (reg_equiv_address[regno] != 0)
3538 tem = make_memloc (ad, regno);
3539 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
3540 &XEXP (tem, 0), operand, ind_levels);
3541 push_reload (tem, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
3542 GET_MODE (ad), VOIDmode, 0, 0,
3547 else if (reg_equiv_mem[regno] != 0)
3549 tem = XEXP (reg_equiv_mem[regno], 0);
3551 /* If we can't indirect any more, a pseudo must be reloaded.
3552 If the pseudo's address in its MEM is a SYMBOL_REF, it
3553 must be reloaded unless indirect_symref_ok. Otherwise, it
3554 can be reloaded if the address is REG or REG + CONST_INT. */
3557 && ! (GET_CODE (tem) == SYMBOL_REF && ! indirect_symref_ok)
3558 && ((GET_CODE (tem) == REG
3559 && REGNO (tem) < FIRST_PSEUDO_REGISTER)
3560 || (GET_CODE (tem) == PLUS
3561 && GET_CODE (XEXP (tem, 0)) == REG
3562 && REGNO (XEXP (tem, 0)) < FIRST_PSEUDO_REGISTER
3563 && GET_CODE (XEXP (tem, 1)) == CONST_INT)))
3567 /* The only remaining case where we can avoid a reload is if this is a
3568 hard register that is valid as a base register and which is not the
3569 subject of a CLOBBER in this insn. */
3571 else if (regno < FIRST_PSEUDO_REGISTER && REGNO_OK_FOR_BASE_P (regno)
3572 && ! regno_clobbered_p (regno, this_insn))
3575 /* If we do not have one of the cases above, we must do the reload. */
3576 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
3577 GET_MODE (ad), VOIDmode, 0, 0, operand);
3581 if (strict_memory_address_p (mode, ad))
3583 /* The address appears valid, so reloads are not needed.
3584 But the address may contain an eliminable register.
3585 This can happen because a machine with indirect addressing
3586 may consider a pseudo register by itself a valid address even when
3587 it has failed to get a hard reg.
3588 So do a tree-walk to find and eliminate all such regs. */
3590 /* But first quickly dispose of a common case. */
3591 if (GET_CODE (ad) == PLUS
3592 && GET_CODE (XEXP (ad, 1)) == CONST_INT
3593 && GET_CODE (XEXP (ad, 0)) == REG
3594 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
3597 subst_reg_equivs_changed = 0;
3598 *loc = subst_reg_equivs (ad);
3600 if (! subst_reg_equivs_changed)
3603 /* Check result for validity after substitution. */
3604 if (strict_memory_address_p (mode, ad))
3608 /* The address is not valid. We have to figure out why. One possibility
3609 is that it is itself a MEM. This can happen when the frame pointer is
3610 being eliminated, a pseudo is not allocated to a hard register, and the
3611 offset between the frame and stack pointers is not its initial value.
3612 In that case the pseudo will have been replaced by a MEM referring to
3613 the stack pointer. */
3614 if (GET_CODE (ad) == MEM)
3616 /* First ensure that the address in this MEM is valid. Then, unless
3617 indirect addresses are valid, reload the MEM into a register. */
3619 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
3620 operand, ind_levels == 0 ? 0 : ind_levels - 1);
3621 /* Check similar cases as for indirect addresses as above except
3622 that we can allow pseudos and a MEM since they should have been
3623 taken care of above. */
3626 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
3627 || GET_CODE (XEXP (tem, 0)) == MEM
3628 || ! (GET_CODE (XEXP (tem, 0)) == REG
3629 || (GET_CODE (XEXP (tem, 0)) == PLUS
3630 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
3631 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
3633 /* Must use TEM here, not AD, since it is the one that will
3634 have any subexpressions reloaded, if needed. */
3635 push_reload (tem, NULL_RTX, loc, NULL_PTR,
3636 BASE_REG_CLASS, GET_MODE (tem), VOIDmode, 0,
3644 /* If we have address of a stack slot but it's not valid
3645 (displacement is too large), compute the sum in a register. */
3646 else if (GET_CODE (ad) == PLUS
3647 && (XEXP (ad, 0) == frame_pointer_rtx
3648 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3649 || XEXP (ad, 0) == arg_pointer_rtx
3651 || XEXP (ad, 0) == stack_pointer_rtx)
3652 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
3654 /* Unshare the MEM rtx so we can safely alter it. */
3657 rtx oldref = *memrefloc;
3658 *memrefloc = copy_rtx (*memrefloc);
3659 loc = &XEXP (*memrefloc, 0);
3660 if (operand == oldref)
3661 operand = *memrefloc;
3663 if (double_reg_address_ok)
3665 /* Unshare the sum as well. */
3666 *loc = ad = copy_rtx (ad);
3667 /* Reload the displacement into an index reg.
3668 We assume the frame pointer or arg pointer is a base reg. */
3669 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
3670 INDEX_REG_CLASS, GET_MODE (ad), operand,
3675 /* If the sum of two regs is not necessarily valid,
3676 reload the sum into a base reg.
3677 That will at least work. */
3678 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode,
3679 operand, ind_levels);
3684 /* If we have an indexed stack slot, there are three possible reasons why
3685 it might be invalid: The index might need to be reloaded, the address
3686 might have been made by frame pointer elimination and hence have a
3687 constant out of range, or both reasons might apply.
3689 We can easily check for an index needing reload, but even if that is the
3690 case, we might also have an invalid constant. To avoid making the
3691 conservative assumption and requiring two reloads, we see if this address
3692 is valid when not interpreted strictly. If it is, the only problem is
3693 that the index needs a reload and find_reloads_address_1 will take care
3696 There is still a case when we might generate an extra reload,
3697 however. In certain cases eliminate_regs will return a MEM for a REG
3698 (see the code there for details). In those cases, memory_address_p
3699 applied to our address will return 0 so we will think that our offset
3700 must be too large. But it might indeed be valid and the only problem
3701 is that a MEM is present where a REG should be. This case should be
3702 very rare and there doesn't seem to be any way to avoid it.
3704 If we decide to do something here, it must be that
3705 `double_reg_address_ok' is true and that this address rtl was made by
3706 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
3707 rework the sum so that the reload register will be added to the index.
3708 This is safe because we know the address isn't shared.
3710 We check for fp/ap/sp as both the first and second operand of the
3713 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
3714 && GET_CODE (XEXP (ad, 0)) == PLUS
3715 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
3716 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3717 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
3719 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
3720 && ! memory_address_p (mode, ad))
3722 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
3723 plus_constant (XEXP (XEXP (ad, 0), 0),
3724 INTVAL (XEXP (ad, 1))),
3725 XEXP (XEXP (ad, 0), 1));
3726 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
3727 GET_MODE (ad), operand, ind_levels);
3728 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), operand, 0);
3733 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
3734 && GET_CODE (XEXP (ad, 0)) == PLUS
3735 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
3736 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3737 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
3739 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
3740 && ! memory_address_p (mode, ad))
3742 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
3743 plus_constant (XEXP (XEXP (ad, 0), 1),
3744 INTVAL (XEXP (ad, 1))),
3745 XEXP (XEXP (ad, 0), 0));
3746 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
3747 GET_MODE (ad), operand, ind_levels);
3748 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), operand, 0);
3753 /* See if address becomes valid when an eliminable register
3754 in a sum is replaced. */
3757 if (GET_CODE (ad) == PLUS)
3758 tem = subst_indexed_address (ad);
3759 if (tem != ad && strict_memory_address_p (mode, tem))
3761 /* Ok, we win that way. Replace any additional eliminable
3764 subst_reg_equivs_changed = 0;
3765 tem = subst_reg_equivs (tem);
3767 /* Make sure that didn't make the address invalid again. */
3769 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
3776 /* If constants aren't valid addresses, reload the constant address
3778 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
3780 /* If AD is in address in the constant pool, the MEM rtx may be shared.
3781 Unshare it so we can safely alter it. */
3782 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
3783 && CONSTANT_POOL_ADDRESS_P (ad))
3785 rtx oldref = *memrefloc;
3786 *memrefloc = copy_rtx (*memrefloc);
3787 loc = &XEXP (*memrefloc, 0);
3788 if (operand == oldref)
3789 operand = *memrefloc;
3792 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, operand,
3797 return find_reloads_address_1 (ad, 0, loc, operand, ind_levels);
3800 /* Find all pseudo regs appearing in AD
3801 that are eliminable in favor of equivalent values
3802 and do not have hard regs; replace them by their equivalents. */
3805 subst_reg_equivs (ad)
3808 register RTX_CODE code = GET_CODE (ad);
3826 register int regno = REGNO (ad);
3828 if (reg_equiv_constant[regno] != 0)
3830 subst_reg_equivs_changed = 1;
3831 return reg_equiv_constant[regno];
3837 /* Quickly dispose of a common case. */
3838 if (XEXP (ad, 0) == frame_pointer_rtx
3839 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
3843 fmt = GET_RTX_FORMAT (code);
3844 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3846 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i));
3850 /* Compute the sum of X and Y, making canonicalizations assumed in an
3851 address, namely: sum constant integers, surround the sum of two
3852 constants with a CONST, put the constant as the second operand, and
3853 group the constant on the outermost sum.
3855 This routine assumes both inputs are already in canonical form. */
3863 if (GET_CODE (x) == CONST_INT)
3864 return plus_constant (y, INTVAL (x));
3865 else if (GET_CODE (y) == CONST_INT)
3866 return plus_constant (x, INTVAL (y));
3867 else if (CONSTANT_P (x))
3868 tem = x, x = y, y = tem;
3870 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
3871 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
3873 /* Note that if the operands of Y are specified in the opposite
3874 order in the recursive calls below, infinite recursion will occur. */
3875 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
3876 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
3878 /* If both constant, encapsulate sum. Otherwise, just form sum. A
3879 constant will have been placed second. */
3880 if (CONSTANT_P (x) && CONSTANT_P (y))
3882 if (GET_CODE (x) == CONST)
3884 if (GET_CODE (y) == CONST)
3887 return gen_rtx (CONST, VOIDmode, gen_rtx (PLUS, Pmode, x, y));
3890 return gen_rtx (PLUS, Pmode, x, y);
3893 /* If ADDR is a sum containing a pseudo register that should be
3894 replaced with a constant (from reg_equiv_constant),
3895 return the result of doing so, and also apply the associative
3896 law so that the result is more likely to be a valid address.
3897 (But it is not guaranteed to be one.)
3899 Note that at most one register is replaced, even if more are
3900 replaceable. Also, we try to put the result into a canonical form
3901 so it is more likely to be a valid address.
3903 In all other cases, return ADDR. */
3906 subst_indexed_address (addr)
3909 rtx op0 = 0, op1 = 0, op2 = 0;
3913 if (GET_CODE (addr) == PLUS)
3915 /* Try to find a register to replace. */
3916 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
3917 if (GET_CODE (op0) == REG
3918 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
3919 && reg_renumber[regno] < 0
3920 && reg_equiv_constant[regno] != 0)
3921 op0 = reg_equiv_constant[regno];
3922 else if (GET_CODE (op1) == REG
3923 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
3924 && reg_renumber[regno] < 0
3925 && reg_equiv_constant[regno] != 0)
3926 op1 = reg_equiv_constant[regno];
3927 else if (GET_CODE (op0) == PLUS
3928 && (tem = subst_indexed_address (op0)) != op0)
3930 else if (GET_CODE (op1) == PLUS
3931 && (tem = subst_indexed_address (op1)) != op1)
3936 /* Pick out up to three things to add. */
3937 if (GET_CODE (op1) == PLUS)
3938 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
3939 else if (GET_CODE (op0) == PLUS)
3940 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
3942 /* Compute the sum. */
3944 op1 = form_sum (op1, op2);
3946 op0 = form_sum (op0, op1);
3953 /* Record the pseudo registers we must reload into hard registers
3954 in a subexpression of a would-be memory address, X.
3955 (This function is not called if the address we find is strictly valid.)
3956 CONTEXT = 1 means we are considering regs as index regs,
3957 = 0 means we are considering them as base regs.
3959 OPERAND is the operand of the insn within which this address appears.
3961 IND_LEVELS says how many levels of indirect addressing are
3962 supported at this point in the address.
3964 We return nonzero if X, as a whole, is reloaded or replaced. */
3966 /* Note that we take shortcuts assuming that no multi-reg machine mode
3967 occurs as part of an address.
3968 Also, this is not fully machine-customizable; it works for machines
3969 such as vaxes and 68000's and 32000's, but other possible machines
3970 could have addressing modes that this does not handle right. */
3973 find_reloads_address_1 (x, context, loc, operand, ind_levels)
3980 register RTX_CODE code = GET_CODE (x);
3984 register rtx op0 = XEXP (x, 0);
3985 register rtx op1 = XEXP (x, 1);
3986 register RTX_CODE code0 = GET_CODE (op0);
3987 register RTX_CODE code1 = GET_CODE (op1);
3988 if (code0 == MULT || code0 == SIGN_EXTEND || code1 == MEM)
3990 find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand, ind_levels);
3991 find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
3993 else if (code1 == MULT || code1 == SIGN_EXTEND || code0 == MEM)
3995 find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
3996 find_reloads_address_1 (op1, 1, &XEXP (x, 1), operand, ind_levels);
3998 else if (code0 == CONST_INT || code0 == CONST
3999 || code0 == SYMBOL_REF || code0 == LABEL_REF)
4001 find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
4003 else if (code1 == CONST_INT || code1 == CONST
4004 || code1 == SYMBOL_REF || code1 == LABEL_REF)
4006 find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
4008 else if (code0 == REG && code1 == REG)
4010 if (REG_OK_FOR_INDEX_P (op0)
4011 && REG_OK_FOR_BASE_P (op1))
4013 else if (REG_OK_FOR_INDEX_P (op1)
4014 && REG_OK_FOR_BASE_P (op0))
4016 else if (REG_OK_FOR_BASE_P (op1))
4017 find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand, ind_levels);
4018 else if (REG_OK_FOR_BASE_P (op0))
4019 find_reloads_address_1 (op1, 1, &XEXP (x, 1), operand, ind_levels);
4020 else if (REG_OK_FOR_INDEX_P (op1))
4021 find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
4022 else if (REG_OK_FOR_INDEX_P (op0))
4023 find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
4026 find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand,
4028 find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand,
4032 else if (code0 == REG)
4034 find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand, ind_levels);
4035 find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
4037 else if (code1 == REG)
4039 find_reloads_address_1 (op1, 1, &XEXP (x, 1), operand, ind_levels);
4040 find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
4043 else if (code == POST_INC || code == POST_DEC
4044 || code == PRE_INC || code == PRE_DEC)
4046 if (GET_CODE (XEXP (x, 0)) == REG)
4048 register int regno = REGNO (XEXP (x, 0));
4052 /* A register that is incremented cannot be constant! */
4053 if (regno >= FIRST_PSEUDO_REGISTER
4054 && reg_equiv_constant[regno] != 0)
4057 /* Handle a register that is equivalent to a memory location
4058 which cannot be addressed directly. */
4059 if (reg_equiv_address[regno] != 0)
4061 rtx tem = make_memloc (XEXP (x, 0), regno);
4062 /* First reload the memory location's address. */
4063 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
4064 &XEXP (tem, 0), operand, ind_levels);
4065 /* Put this inside a new increment-expression. */
4066 x = gen_rtx (GET_CODE (x), GET_MODE (x), tem);
4067 /* Proceed to reload that, as if it contained a register. */
4070 /* If we have a hard register that is ok as an index,
4071 don't make a reload. If an autoincrement of a nice register
4072 isn't "valid", it must be that no autoincrement is "valid".
4073 If that is true and something made an autoincrement anyway,
4074 this must be a special context where one is allowed.
4075 (For example, a "push" instruction.)
4076 We can't improve this address, so leave it alone. */
4078 /* Otherwise, reload the autoincrement into a suitable hard reg
4079 and record how much to increment by. */
4081 if (reg_renumber[regno] >= 0)
4082 regno = reg_renumber[regno];
4083 if ((regno >= FIRST_PSEUDO_REGISTER
4084 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4085 : REGNO_OK_FOR_BASE_P (regno))))
4090 = push_reload (x, NULL_RTX, loc, NULL_PTR,
4091 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4092 GET_MODE (x), GET_MODE (x), VOIDmode, 0, operand);
4093 reload_inc[reloadnum]
4094 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
4099 /* Update the REG_INC notes. */
4101 for (link = REG_NOTES (this_insn);
4102 link; link = XEXP (link, 1))
4103 if (REG_NOTE_KIND (link) == REG_INC
4104 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
4105 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4110 else if (GET_CODE (XEXP (x, 0)) == MEM)
4112 /* This is probably the result of a substitution, by eliminate_regs,
4113 of an equivalent address for a pseudo that was not allocated to a
4114 hard register. Verify that the specified address is valid and
4115 reload it into a register. */
4116 rtx tem = XEXP (x, 0);
4120 /* Since we know we are going to reload this item, don't decrement
4121 for the indirection level.
4123 Note that this is actually conservative: it would be slightly
4124 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4126 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
4127 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
4128 operand, ind_levels);
4130 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
4131 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4132 GET_MODE (x), VOIDmode, 0, 0, operand);
4133 reload_inc[reloadnum]
4134 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
4136 link = FIND_REG_INC_NOTE (this_insn, tem);
4138 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4143 else if (code == MEM)
4145 /* This is probably the result of a substitution, by eliminate_regs,
4146 of an equivalent address for a pseudo that was not allocated to a
4147 hard register. Verify that the specified address is valid and reload
4150 Since we know we are going to reload this item, don't decrement
4151 for the indirection level.
4153 Note that this is actually conservative: it would be slightly more
4154 efficient to use the value of SPILL_INDIRECT_LEVELS from
4157 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
4158 operand, ind_levels);
4160 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
4161 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4162 GET_MODE (x), VOIDmode, 0, 0, operand);
4165 else if (code == REG)
4167 register int regno = REGNO (x);
4169 if (reg_equiv_constant[regno] != 0)
4171 find_reloads_address_part (reg_equiv_constant[regno], loc,
4172 (context ? INDEX_REG_CLASS
4174 GET_MODE (x), operand, ind_levels);
4178 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4179 that feeds this insn. */
4180 if (reg_equiv_mem[regno] != 0)
4182 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
4183 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4184 GET_MODE (x), VOIDmode, 0, 0, operand);
4188 if (reg_equiv_address[regno] != 0)
4190 x = make_memloc (x, regno);
4191 find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0),
4192 operand, ind_levels);
4195 if (reg_renumber[regno] >= 0)
4196 regno = reg_renumber[regno];
4197 if ((regno >= FIRST_PSEUDO_REGISTER
4198 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4199 : REGNO_OK_FOR_BASE_P (regno))))
4201 push_reload (x, NULL_RTX, loc, NULL_PTR,
4202 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4203 GET_MODE (x), VOIDmode, 0, 0, operand);
4207 /* If a register appearing in an address is the subject of a CLOBBER
4208 in this insn, reload it into some other register to be safe.
4209 The CLOBBER is supposed to make the register unavailable
4210 from before this insn to after it. */
4211 if (regno_clobbered_p (regno, this_insn))
4213 push_reload (x, NULL_RTX, loc, NULL_PTR,
4214 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4215 GET_MODE (x), VOIDmode, 0, 0, operand);
4221 register char *fmt = GET_RTX_FORMAT (code);
4223 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4226 find_reloads_address_1 (XEXP (x, i), context, &XEXP (x, i),
4227 operand, ind_levels);
4234 /* X, which is found at *LOC, is a part of an address that needs to be
4235 reloaded into a register of class CLASS. If X is a constant, or if
4236 X is a PLUS that contains a constant, check that the constant is a
4237 legitimate operand and that we are supposed to be able to load
4238 it into the register.
4240 If not, force the constant into memory and reload the MEM instead.
4242 MODE is the mode to use, in case X is an integer constant.
4244 NEEDED_FOR says which operand this reload is needed for.
4246 IND_LEVELS says how many levels of indirect addressing this machine
4250 find_reloads_address_part (x, loc, class, mode, needed_for, ind_levels)
4253 enum reg_class class;
4254 enum machine_mode mode;
4259 && (! LEGITIMATE_CONSTANT_P (x)
4260 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
4262 rtx tem = x = force_const_mem (mode, x);
4263 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4264 needed_for, ind_levels);
4267 else if (GET_CODE (x) == PLUS
4268 && CONSTANT_P (XEXP (x, 1))
4269 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
4270 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
4272 rtx tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
4274 x = gen_rtx (PLUS, GET_MODE (x), XEXP (x, 0), tem);
4275 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4276 needed_for, ind_levels);
4279 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
4280 mode, VOIDmode, 0, 0, needed_for);
4283 /* Substitute into X the registers into which we have reloaded
4284 the things that need reloading. The array `replacements'
4285 says contains the locations of all pointers that must be changed
4286 and says what to replace them with.
4288 Return the rtx that X translates into; usually X, but modified. */
4295 for (i = 0; i < n_replacements; i++)
4297 register struct replacement *r = &replacements[i];
4298 register rtx reloadreg = reload_reg_rtx[r->what];
4301 /* Encapsulate RELOADREG so its machine mode matches what
4302 used to be there. */
4303 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
4304 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
4306 /* If we are putting this into a SUBREG and RELOADREG is a
4307 SUBREG, we would be making nested SUBREGs, so we have to fix
4308 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
4310 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
4312 if (GET_MODE (*r->subreg_loc)
4313 == GET_MODE (SUBREG_REG (reloadreg)))
4314 *r->subreg_loc = SUBREG_REG (reloadreg);
4317 *r->where = SUBREG_REG (reloadreg);
4318 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
4322 *r->where = reloadreg;
4324 /* If reload got no reg and isn't optional, something's wrong. */
4325 else if (! reload_optional[r->what])
4330 /* Make a copy of any replacements being done into X and move those copies
4331 to locations in Y, a copy of X. We only look at the highest level of
4335 copy_replacements (x, y)
4340 enum rtx_code code = GET_CODE (x);
4341 char *fmt = GET_RTX_FORMAT (code);
4342 struct replacement *r;
4344 /* We can't support X being a SUBREG because we might then need to know its
4345 location if something inside it was replaced. */
4349 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4351 for (j = 0; j < n_replacements; j++)
4353 if (replacements[j].subreg_loc == &XEXP (x, i))
4355 r = &replacements[n_replacements++];
4356 r->where = replacements[j].where;
4357 r->subreg_loc = &XEXP (y, i);
4358 r->what = replacements[j].what;
4359 r->mode = replacements[j].mode;
4361 else if (replacements[j].where == &XEXP (x, i))
4363 r = &replacements[n_replacements++];
4364 r->where = &XEXP (y, i);
4366 r->what = replacements[j].what;
4367 r->mode = replacements[j].mode;
4372 /* If LOC was scheduled to be replaced by something, return the replacement.
4373 Otherwise, return *LOC. */
4376 find_replacement (loc)
4379 struct replacement *r;
4381 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
4383 rtx reloadreg = reload_reg_rtx[r->what];
4385 if (reloadreg && r->where == loc)
4387 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
4388 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
4392 else if (reloadreg && r->subreg_loc == loc)
4394 /* RELOADREG must be either a REG or a SUBREG.
4396 ??? Is it actually still ever a SUBREG? If so, why? */
4398 if (GET_CODE (reloadreg) == REG)
4399 return gen_rtx (REG, GET_MODE (*loc),
4400 REGNO (reloadreg) + SUBREG_WORD (*loc));
4401 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
4404 return gen_rtx (SUBREG, GET_MODE (*loc), SUBREG_REG (reloadreg),
4405 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
4412 /* Return nonzero if register in range [REGNO, ENDREGNO)
4413 appears either explicitly or implicitly in X
4414 other than being stored into.
4416 References contained within the substructure at LOC do not count.
4417 LOC may be zero, meaning don't ignore anything.
4419 This is similar to refers_to_regno_p in rtlanal.c except that we
4420 look at equivalences for pseudos that didn't get hard registers. */
4423 refers_to_regno_for_reload_p (regno, endregno, x, loc)
4424 int regno, endregno;
4429 register RTX_CODE code;
4436 code = GET_CODE (x);
4443 /* If this is a pseudo, a hard register must not have been allocated.
4444 X must therefore either be a constant or be in memory. */
4445 if (i >= FIRST_PSEUDO_REGISTER)
4447 if (reg_equiv_memory_loc[i])
4448 return refers_to_regno_for_reload_p (regno, endregno,
4449 reg_equiv_memory_loc[i],
4452 if (reg_equiv_constant[i])
4458 return (endregno > i
4459 && regno < i + (i < FIRST_PSEUDO_REGISTER
4460 ? HARD_REGNO_NREGS (i, GET_MODE (x))
4464 /* If this is a SUBREG of a hard reg, we can see exactly which
4465 registers are being modified. Otherwise, handle normally. */
4466 if (GET_CODE (SUBREG_REG (x)) == REG
4467 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
4469 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
4471 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
4472 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
4474 return endregno > inner_regno && regno < inner_endregno;
4480 if (&SET_DEST (x) != loc
4481 /* Note setting a SUBREG counts as referring to the REG it is in for
4482 a pseudo but not for hard registers since we can
4483 treat each word individually. */
4484 && ((GET_CODE (SET_DEST (x)) == SUBREG
4485 && loc != &SUBREG_REG (SET_DEST (x))
4486 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
4487 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
4488 && refers_to_regno_for_reload_p (regno, endregno,
4489 SUBREG_REG (SET_DEST (x)),
4491 || (GET_CODE (SET_DEST (x)) != REG
4492 && refers_to_regno_for_reload_p (regno, endregno,
4493 SET_DEST (x), loc))))
4496 if (code == CLOBBER || loc == &SET_SRC (x))
4502 /* X does not match, so try its subexpressions. */
4504 fmt = GET_RTX_FORMAT (code);
4505 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4507 if (fmt[i] == 'e' && loc != &XEXP (x, i))
4515 if (refers_to_regno_for_reload_p (regno, endregno,
4519 else if (fmt[i] == 'E')
4522 for (j = XVECLEN (x, i) - 1; j >=0; j--)
4523 if (loc != &XVECEXP (x, i, j)
4524 && refers_to_regno_for_reload_p (regno, endregno,
4525 XVECEXP (x, i, j), loc))
4532 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
4533 we check if any register number in X conflicts with the relevant register
4534 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
4535 contains a MEM (we don't bother checking for memory addresses that can't
4536 conflict because we expect this to be a rare case.
4538 This function is similar to reg_overlap_mention_p in rtlanal.c except
4539 that we look at equivalences for pseudos that didn't get hard registers. */
4542 reg_overlap_mentioned_for_reload_p (x, in)
4545 int regno, endregno;
4547 if (GET_CODE (x) == SUBREG)
4549 regno = REGNO (SUBREG_REG (x));
4550 if (regno < FIRST_PSEUDO_REGISTER)
4551 regno += SUBREG_WORD (x);
4553 else if (GET_CODE (x) == REG)
4557 /* If this is a pseudo, it must not have been assigned a hard register.
4558 Therefore, it must either be in memory or be a constant. */
4560 if (regno >= FIRST_PSEUDO_REGISTER)
4562 if (reg_equiv_memory_loc[regno])
4563 return refers_to_mem_for_reload_p (in);
4564 else if (reg_equiv_constant[regno])
4569 else if (CONSTANT_P (x))
4571 else if (GET_CODE (x) == MEM)
4572 return refers_to_mem_for_reload_p (in);
4573 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
4574 || GET_CODE (x) == CC0)
4575 return reg_mentioned_p (x, in);
4579 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
4580 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
4582 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
4585 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
4589 refers_to_mem_for_reload_p (x)
4595 if (GET_CODE (x) == MEM)
4598 if (GET_CODE (x) == REG)
4599 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
4600 && reg_equiv_memory_loc[REGNO (x)]);
4602 fmt = GET_RTX_FORMAT (GET_CODE (x));
4603 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4605 && (GET_CODE (XEXP (x, i)) == MEM
4606 || refers_to_mem_for_reload_p (XEXP (x, i))))
4614 /* [[This function is currently obsolete, now that volatility
4615 is represented by a special bit `volatil' so VOLATILE is never used;
4616 and UNCHANGING has never been brought into use.]]
4618 Alter X by eliminating all VOLATILE and UNCHANGING expressions.
4619 Each of them is replaced by its operand.
4620 Thus, (PLUS (VOLATILE (MEM (REG 5))) (CONST_INT 4))
4621 becomes (PLUS (MEM (REG 5)) (CONST_INT 4)).
4623 If X is itself a VOLATILE expression,
4624 we return the expression that should replace it
4625 but we do not modify X. */
4628 forget_volatility (x)
4631 enum rtx_code code = GET_CODE (x);
4634 register rtx value = 0;
4653 fmt = GET_RTX_FORMAT (code);
4654 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4657 XEXP (x, i) = forget_volatility (XEXP (x, i));
4661 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
4662 XVECEXP (x, i, j) = forget_volatility (XVECEXP (x, i, j));
4671 /* Check the insns before INSN to see if there is a suitable register
4672 containing the same value as GOAL.
4673 If OTHER is -1, look for a register in class CLASS.
4674 Otherwise, just see if register number OTHER shares GOAL's value.
4676 Return an rtx for the register found, or zero if none is found.
4678 If RELOAD_REG_P is (short *)1,
4679 we reject any hard reg that appears in reload_reg_rtx
4680 because such a hard reg is also needed coming into this insn.
4682 If RELOAD_REG_P is any other nonzero value,
4683 it is a vector indexed by hard reg number
4684 and we reject any hard reg whose element in the vector is nonnegative
4685 as well as any that appears in reload_reg_rtx.
4687 If GOAL is zero, then GOALREG is a register number; we look
4688 for an equivalent for that register.
4690 MODE is the machine mode of the value we want an equivalence for.
4691 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
4693 This function is used by jump.c as well as in the reload pass.
4695 If GOAL is the sum of the stack pointer and a constant, we treat it
4696 as if it were a constant except that sp is required to be unchanging. */
4699 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
4702 enum reg_class class;
4704 short *reload_reg_p;
4706 enum machine_mode mode;
4708 register rtx p = insn;
4709 rtx valtry, value, where;
4711 register int regno = -1;
4715 int goal_mem_addr_varies = 0;
4716 int need_stable_sp = 0;
4722 else if (GET_CODE (goal) == REG)
4723 regno = REGNO (goal);
4724 else if (GET_CODE (goal) == MEM)
4726 enum rtx_code code = GET_CODE (XEXP (goal, 0));
4727 if (MEM_VOLATILE_P (goal))
4729 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
4731 /* An address with side effects must be reexecuted. */
4742 else if (CONSTANT_P (goal))
4744 else if (GET_CODE (goal) == PLUS
4745 && XEXP (goal, 0) == stack_pointer_rtx
4746 && CONSTANT_P (XEXP (goal, 1)))
4747 goal_const = need_stable_sp = 1;
4751 /* On some machines, certain regs must always be rejected
4752 because they don't behave the way ordinary registers do. */
4754 #ifdef OVERLAPPING_REGNO_P
4755 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
4756 && OVERLAPPING_REGNO_P (regno))
4760 /* Scan insns back from INSN, looking for one that copies
4761 a value into or out of GOAL.
4762 Stop and give up if we reach a label. */
4767 if (p == 0 || GET_CODE (p) == CODE_LABEL)
4769 if (GET_CODE (p) == INSN
4770 /* If we don't want spill regs ... */
4771 && (! (reload_reg_p != 0 && reload_reg_p != (short *)1)
4772 /* ... then ignore insns introduced by reload; they aren't useful
4773 and can cause results in reload_as_needed to be different
4774 from what they were when calculating the need for spills.
4775 If we notice an input-reload insn here, we will reject it below,
4776 but it might hide a usable equivalent. That makes bad code.
4777 It may even abort: perhaps no reg was spilled for this insn
4778 because it was assumed we would find that equivalent. */
4779 || INSN_UID (p) < reload_first_uid))
4782 pat = single_set (p);
4783 /* First check for something that sets some reg equal to GOAL. */
4786 && true_regnum (SET_SRC (pat)) == regno
4787 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
4790 && true_regnum (SET_DEST (pat)) == regno
4791 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
4793 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
4794 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
4796 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
4797 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
4799 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
4800 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
4801 /* If we are looking for a constant,
4802 and something equivalent to that constant was copied
4803 into a reg, we can use that reg. */
4804 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
4806 && rtx_equal_p (XEXP (tem, 0), goal)
4807 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
4808 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
4810 && GET_CODE (SET_DEST (pat)) == REG
4811 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
4812 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
4813 && GET_CODE (goal) == CONST_INT
4814 && INTVAL (goal) == CONST_DOUBLE_LOW (XEXP (tem, 0))
4815 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
4817 && (valueno = true_regnum (valtry)) >= 0)
4818 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
4820 && GET_CODE (SET_DEST (pat)) == REG
4821 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
4822 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
4823 && GET_CODE (goal) == CONST_INT
4824 && INTVAL (goal) == CONST_DOUBLE_HIGH (XEXP (tem, 0))
4826 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
4827 && (valueno = true_regnum (valtry)) >= 0)))
4830 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
4831 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
4841 /* We found a previous insn copying GOAL into a suitable other reg VALUE
4842 (or copying VALUE into GOAL, if GOAL is also a register).
4843 Now verify that VALUE is really valid. */
4845 /* VALUENO is the register number of VALUE; a hard register. */
4847 /* Don't try to re-use something that is killed in this insn. We want
4848 to be able to trust REG_UNUSED notes. */
4849 if (find_reg_note (where, REG_UNUSED, value))
4852 /* If we propose to get the value from the stack pointer or if GOAL is
4853 a MEM based on the stack pointer, we need a stable SP. */
4854 if (valueno == STACK_POINTER_REGNUM
4855 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
4859 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
4860 if (GET_MODE (value) != mode)
4863 /* Reject VALUE if it was loaded from GOAL
4864 and is also a register that appears in the address of GOAL. */
4866 if (goal_mem && value == SET_DEST (PATTERN (where))
4867 && refers_to_regno_for_reload_p (valueno,
4869 + HARD_REGNO_NREGS (valueno, mode)),
4873 /* Reject registers that overlap GOAL. */
4875 if (!goal_mem && !goal_const
4876 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
4877 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
4880 /* Reject VALUE if it is one of the regs reserved for reloads.
4881 Reload1 knows how to reuse them anyway, and it would get
4882 confused if we allocated one without its knowledge.
4883 (Now that insns introduced by reload are ignored above,
4884 this case shouldn't happen, but I'm not positive.) */
4886 if (reload_reg_p != 0 && reload_reg_p != (short *)1
4887 && reload_reg_p[valueno] >= 0)
4890 /* On some machines, certain regs must always be rejected
4891 because they don't behave the way ordinary registers do. */
4893 #ifdef OVERLAPPING_REGNO_P
4894 if (OVERLAPPING_REGNO_P (valueno))
4898 nregs = HARD_REGNO_NREGS (regno, mode);
4899 valuenregs = HARD_REGNO_NREGS (valueno, mode);
4901 /* Reject VALUE if it is a register being used for an input reload
4902 even if it is not one of those reserved. */
4904 if (reload_reg_p != 0)
4907 for (i = 0; i < n_reloads; i++)
4908 if (reload_reg_rtx[i] != 0 && reload_in[i])
4910 int regno1 = REGNO (reload_reg_rtx[i]);
4911 int nregs1 = HARD_REGNO_NREGS (regno1,
4912 GET_MODE (reload_reg_rtx[i]));
4913 if (regno1 < valueno + valuenregs
4914 && regno1 + nregs1 > valueno)
4920 goal_mem_addr_varies = rtx_addr_varies_p (goal);
4922 /* Now verify that the values of GOAL and VALUE remain unaltered
4923 until INSN is reached. */
4932 /* Don't trust the conversion past a function call
4933 if either of the two is in a call-clobbered register, or memory. */
4934 if (GET_CODE (p) == CALL_INSN
4935 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
4936 && call_used_regs[regno])
4938 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
4939 && call_used_regs[valueno])
4945 #ifdef INSN_CLOBBERS_REGNO_P
4946 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
4947 && INSN_CLOBBERS_REGNO_P (p, valueno))
4948 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
4949 && INSN_CLOBBERS_REGNO_P (p, regno)))
4953 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
4955 /* If this insn P stores in either GOAL or VALUE, return 0.
4956 If GOAL is a memory ref and this insn writes memory, return 0.
4957 If GOAL is a memory ref and its address is not constant,
4958 and this insn P changes a register used in GOAL, return 0. */
4961 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
4963 register rtx dest = SET_DEST (pat);
4964 while (GET_CODE (dest) == SUBREG
4965 || GET_CODE (dest) == ZERO_EXTRACT
4966 || GET_CODE (dest) == SIGN_EXTRACT
4967 || GET_CODE (dest) == STRICT_LOW_PART)
4968 dest = XEXP (dest, 0);
4969 if (GET_CODE (dest) == REG)
4971 register int xregno = REGNO (dest);
4973 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
4974 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
4977 if (xregno < regno + nregs && xregno + xnregs > regno)
4979 if (xregno < valueno + valuenregs
4980 && xregno + xnregs > valueno)
4982 if (goal_mem_addr_varies
4983 && reg_overlap_mentioned_for_reload_p (dest, goal))
4986 else if (goal_mem && GET_CODE (dest) == MEM
4987 && ! push_operand (dest, GET_MODE (dest)))
4989 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
4992 else if (GET_CODE (pat) == PARALLEL)
4995 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
4997 register rtx v1 = XVECEXP (pat, 0, i);
4998 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
5000 register rtx dest = SET_DEST (v1);
5001 while (GET_CODE (dest) == SUBREG
5002 || GET_CODE (dest) == ZERO_EXTRACT
5003 || GET_CODE (dest) == SIGN_EXTRACT
5004 || GET_CODE (dest) == STRICT_LOW_PART)
5005 dest = XEXP (dest, 0);
5006 if (GET_CODE (dest) == REG)
5008 register int xregno = REGNO (dest);
5010 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5011 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5014 if (xregno < regno + nregs
5015 && xregno + xnregs > regno)
5017 if (xregno < valueno + valuenregs
5018 && xregno + xnregs > valueno)
5020 if (goal_mem_addr_varies
5021 && reg_overlap_mentioned_for_reload_p (dest,
5025 else if (goal_mem && GET_CODE (dest) == MEM
5026 && ! push_operand (dest, GET_MODE (dest)))
5028 else if (need_stable_sp
5029 && push_operand (dest, GET_MODE (dest)))
5036 /* If this insn auto-increments or auto-decrements
5037 either regno or valueno, return 0 now.
5038 If GOAL is a memory ref and its address is not constant,
5039 and this insn P increments a register used in GOAL, return 0. */
5043 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
5044 if (REG_NOTE_KIND (link) == REG_INC
5045 && GET_CODE (XEXP (link, 0)) == REG)
5047 register int incno = REGNO (XEXP (link, 0));
5048 if (incno < regno + nregs && incno >= regno)
5050 if (incno < valueno + valuenregs && incno >= valueno)
5052 if (goal_mem_addr_varies
5053 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
5063 /* Find a place where INCED appears in an increment or decrement operator
5064 within X, and return the amount INCED is incremented or decremented by.
5065 The value is always positive. */
5068 find_inc_amount (x, inced)
5071 register enum rtx_code code = GET_CODE (x);
5077 register rtx addr = XEXP (x, 0);
5078 if ((GET_CODE (addr) == PRE_DEC
5079 || GET_CODE (addr) == POST_DEC
5080 || GET_CODE (addr) == PRE_INC
5081 || GET_CODE (addr) == POST_INC)
5082 && XEXP (addr, 0) == inced)
5083 return GET_MODE_SIZE (GET_MODE (x));
5086 fmt = GET_RTX_FORMAT (code);
5087 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5091 register int tem = find_inc_amount (XEXP (x, i), inced);
5098 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5100 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
5110 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5113 regno_clobbered_p (regno, insn)
5117 if (GET_CODE (PATTERN (insn)) == CLOBBER
5118 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
5119 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
5121 if (GET_CODE (PATTERN (insn)) == PARALLEL)
5123 int i = XVECLEN (PATTERN (insn), 0) - 1;
5127 rtx elt = XVECEXP (PATTERN (insn), 0, i);
5128 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
5129 && REGNO (XEXP (elt, 0)) == regno)
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