1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
93 #include "insn-config.h"
94 #include "insn-codes.h"
98 #include "hard-reg-set.h"
105 #ifndef REGISTER_MOVE_COST
106 #define REGISTER_MOVE_COST(x, y) 2
109 #ifndef REGNO_MODE_OK_FOR_BASE_P
110 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
113 #ifndef REG_MODE_OK_FOR_BASE_P
114 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
117 /* The variables set up by `find_reloads' are:
119 n_reloads number of distinct reloads needed; max reload # + 1
120 tables indexed by reload number
121 reload_in rtx for value to reload from
122 reload_out rtx for where to store reload-reg afterward if nec
123 (often the same as reload_in)
124 reload_reg_class enum reg_class, saying what regs to reload into
125 reload_inmode enum machine_mode; mode this operand should have
126 when reloaded, on input.
127 reload_outmode enum machine_mode; mode this operand should have
128 when reloaded, on output.
129 reload_optional char, nonzero for an optional reload.
130 Optional reloads are ignored unless the
131 value is already sitting in a register.
132 reload_nongroup char, nonzero when a reload must use a register
133 not already allocated to a group.
134 reload_inc int, positive amount to increment or decrement by if
135 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
136 Ignored otherwise (don't assume it is zero).
137 reload_in_reg rtx. A reg for which reload_in is the equivalent.
138 If reload_in is a symbol_ref which came from
139 reg_equiv_constant, then this is the pseudo
140 which has that symbol_ref as equivalent.
141 reload_reg_rtx rtx. This is the register to reload into.
142 If it is zero when `find_reloads' returns,
143 you must find a suitable register in the class
144 specified by reload_reg_class, and store here
145 an rtx for that register with mode from
146 reload_inmode or reload_outmode.
147 reload_nocombine char, nonzero if this reload shouldn't be
148 combined with another reload.
149 reload_opnum int, operand number being reloaded. This is
150 used to group related reloads and need not always
151 be equal to the actual operand number in the insn,
152 though it current will be; for in-out operands, it
153 is one of the two operand numbers.
154 reload_when_needed enum, classifies reload as needed either for
155 addressing an input reload, addressing an output,
156 for addressing a non-reloaded mem ref,
157 or for unspecified purposes (i.e., more than one
159 reload_secondary_p int, 1 if this is a secondary register for one
161 reload_secondary_in_reload
162 reload_secondary_out_reload
163 int, gives the reload number of a secondary
164 reload, when needed; otherwise -1
165 reload_secondary_in_icode
166 reload_secondary_out_icode
167 enum insn_code, if a secondary reload is required,
168 gives the INSN_CODE that uses the secondary
169 reload as a scratch register, or CODE_FOR_nothing
170 if the secondary reload register is to be an
171 intermediate register. */
174 rtx reload_in[MAX_RELOADS];
175 rtx reload_out[MAX_RELOADS];
176 enum reg_class reload_reg_class[MAX_RELOADS];
177 enum machine_mode reload_inmode[MAX_RELOADS];
178 enum machine_mode reload_outmode[MAX_RELOADS];
179 rtx reload_reg_rtx[MAX_RELOADS];
180 char reload_optional[MAX_RELOADS];
181 char reload_nongroup[MAX_RELOADS];
182 int reload_inc[MAX_RELOADS];
183 rtx reload_in_reg[MAX_RELOADS];
184 char reload_nocombine[MAX_RELOADS];
185 int reload_opnum[MAX_RELOADS];
186 enum reload_type reload_when_needed[MAX_RELOADS];
187 int reload_secondary_p[MAX_RELOADS];
188 int reload_secondary_in_reload[MAX_RELOADS];
189 int reload_secondary_out_reload[MAX_RELOADS];
190 enum insn_code reload_secondary_in_icode[MAX_RELOADS];
191 enum insn_code reload_secondary_out_icode[MAX_RELOADS];
193 /* All the "earlyclobber" operands of the current insn
194 are recorded here. */
196 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
198 int reload_n_operands;
200 /* Replacing reloads.
202 If `replace_reloads' is nonzero, then as each reload is recorded
203 an entry is made for it in the table `replacements'.
204 Then later `subst_reloads' can look through that table and
205 perform all the replacements needed. */
207 /* Nonzero means record the places to replace. */
208 static int replace_reloads;
210 /* Each replacement is recorded with a structure like this. */
213 rtx *where; /* Location to store in */
214 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
215 a SUBREG; 0 otherwise. */
216 int what; /* which reload this is for */
217 enum machine_mode mode; /* mode it must have */
220 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
222 /* Number of replacements currently recorded. */
223 static int n_replacements;
225 /* Used to track what is modified by an operand. */
228 int reg_flag; /* Nonzero if referencing a register. */
229 int safe; /* Nonzero if this can't conflict with anything. */
230 rtx base; /* Base address for MEM. */
231 HOST_WIDE_INT start; /* Starting offset or register number. */
232 HOST_WIDE_INT end; /* Ending offset or register number. */
235 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
236 (see reg_equiv_address). */
237 static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
238 static int n_memlocs;
240 #ifdef SECONDARY_MEMORY_NEEDED
242 /* Save MEMs needed to copy from one class of registers to another. One MEM
243 is used per mode, but normally only one or two modes are ever used.
245 We keep two versions, before and after register elimination. The one
246 after register elimination is record separately for each operand. This
247 is done in case the address is not valid to be sure that we separately
250 static rtx secondary_memlocs[NUM_MACHINE_MODES];
251 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
254 /* The instruction we are doing reloads for;
255 so we can test whether a register dies in it. */
256 static rtx this_insn;
258 /* Nonzero if this instruction is a user-specified asm with operands. */
259 static int this_insn_is_asm;
261 /* If hard_regs_live_known is nonzero,
262 we can tell which hard regs are currently live,
263 at least enough to succeed in choosing dummy reloads. */
264 static int hard_regs_live_known;
266 /* Indexed by hard reg number,
267 element is nonnegative if hard reg has been spilled.
268 This vector is passed to `find_reloads' as an argument
269 and is not changed here. */
270 static short *static_reload_reg_p;
272 /* Set to 1 in subst_reg_equivs if it changes anything. */
273 static int subst_reg_equivs_changed;
275 /* On return from push_reload, holds the reload-number for the OUT
276 operand, which can be different for that from the input operand. */
277 static int output_reloadnum;
279 /* Compare two RTX's. */
280 #define MATCHES(x, y) \
281 (x == y || (x != 0 && (GET_CODE (x) == REG \
282 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
283 : rtx_equal_p (x, y) && ! side_effects_p (x))))
285 /* Indicates if two reloads purposes are for similar enough things that we
286 can merge their reloads. */
287 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
288 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
289 || ((when1) == (when2) && (op1) == (op2)) \
290 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
291 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
292 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
293 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
294 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
296 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
297 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
298 ((when1) != (when2) \
299 || ! ((op1) == (op2) \
300 || (when1) == RELOAD_FOR_INPUT \
301 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
302 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
304 /* If we are going to reload an address, compute the reload type to
306 #define ADDR_TYPE(type) \
307 ((type) == RELOAD_FOR_INPUT_ADDRESS \
308 ? RELOAD_FOR_INPADDR_ADDRESS \
309 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
310 ? RELOAD_FOR_OUTADDR_ADDRESS \
313 #ifdef HAVE_SECONDARY_RELOADS
314 static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class,
315 enum machine_mode, enum reload_type,
318 static enum reg_class find_valid_class PROTO((enum machine_mode, int));
319 static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
320 enum machine_mode, enum machine_mode,
321 int, int, int, enum reload_type));
322 static void push_replacement PROTO((rtx *, int, enum machine_mode));
323 static void combine_reloads PROTO((void));
324 static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
325 enum machine_mode, enum machine_mode,
326 enum reg_class, int, int));
327 static int earlyclobber_operand_p PROTO((rtx));
328 static int hard_reg_set_here_p PROTO((int, int, rtx));
329 static struct decomposition decompose PROTO((rtx));
330 static int immune_p PROTO((rtx, rtx, struct decomposition));
331 static int alternative_allows_memconst PROTO((char *, int));
332 static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int));
333 static rtx make_memloc PROTO((rtx, int));
334 static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
335 int, enum reload_type, int, rtx));
336 static rtx subst_reg_equivs PROTO((rtx));
337 static rtx subst_indexed_address PROTO((rtx));
338 static int find_reloads_address_1 PROTO((enum machine_mode, rtx, int, rtx *,
339 int, enum reload_type,int, rtx));
340 static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
341 enum machine_mode, int,
342 enum reload_type, int));
343 static int find_inc_amount PROTO((rtx, rtx));
345 #ifdef HAVE_SECONDARY_RELOADS
347 /* Determine if any secondary reloads are needed for loading (if IN_P is
348 non-zero) or storing (if IN_P is zero) X to or from a reload register of
349 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
350 are needed, push them.
352 Return the reload number of the secondary reload we made, or -1 if
353 we didn't need one. *PICODE is set to the insn_code to use if we do
354 need a secondary reload. */
357 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
363 enum reg_class reload_class;
364 enum machine_mode reload_mode;
365 enum reload_type type;
366 enum insn_code *picode;
368 enum reg_class class = NO_REGS;
369 enum machine_mode mode = reload_mode;
370 enum insn_code icode = CODE_FOR_nothing;
371 enum reg_class t_class = NO_REGS;
372 enum machine_mode t_mode = VOIDmode;
373 enum insn_code t_icode = CODE_FOR_nothing;
374 enum reload_type secondary_type;
375 int s_reload, t_reload = -1;
377 if (type == RELOAD_FOR_INPUT_ADDRESS
378 || type == RELOAD_FOR_OUTPUT_ADDRESS
379 || type == RELOAD_FOR_INPADDR_ADDRESS
380 || type == RELOAD_FOR_OUTADDR_ADDRESS)
381 secondary_type = type;
383 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
385 *picode = CODE_FOR_nothing;
387 /* If X is a paradoxical SUBREG, use the inner value to determine both the
388 mode and object being reloaded. */
389 if (GET_CODE (x) == SUBREG
390 && (GET_MODE_SIZE (GET_MODE (x))
391 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
394 reload_mode = GET_MODE (x);
397 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
398 is still a pseudo-register by now, it *must* have an equivalent MEM
399 but we don't want to assume that), use that equivalent when seeing if
400 a secondary reload is needed since whether or not a reload is needed
401 might be sensitive to the form of the MEM. */
403 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
404 && reg_equiv_mem[REGNO (x)] != 0)
405 x = reg_equiv_mem[REGNO (x)];
407 #ifdef SECONDARY_INPUT_RELOAD_CLASS
409 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
412 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
414 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
417 /* If we don't need any secondary registers, done. */
418 if (class == NO_REGS)
421 /* Get a possible insn to use. If the predicate doesn't accept X, don't
424 icode = (in_p ? reload_in_optab[(int) reload_mode]
425 : reload_out_optab[(int) reload_mode]);
427 if (icode != CODE_FOR_nothing
428 && insn_operand_predicate[(int) icode][in_p]
429 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
430 icode = CODE_FOR_nothing;
432 /* If we will be using an insn, see if it can directly handle the reload
433 register we will be using. If it can, the secondary reload is for a
434 scratch register. If it can't, we will use the secondary reload for
435 an intermediate register and require a tertiary reload for the scratch
438 if (icode != CODE_FOR_nothing)
440 /* If IN_P is non-zero, the reload register will be the output in
441 operand 0. If IN_P is zero, the reload register will be the input
442 in operand 1. Outputs should have an initial "=", which we must
445 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
446 enum reg_class insn_class
447 = (insn_letter == 'r' ? GENERAL_REGS
448 : REG_CLASS_FROM_LETTER (insn_letter));
450 if (insn_class == NO_REGS
451 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
452 /* The scratch register's constraint must start with "=&". */
453 || insn_operand_constraint[(int) icode][2][0] != '='
454 || insn_operand_constraint[(int) icode][2][1] != '&')
457 if (reg_class_subset_p (reload_class, insn_class))
458 mode = insn_operand_mode[(int) icode][2];
461 char t_letter = insn_operand_constraint[(int) icode][2][2];
463 t_mode = insn_operand_mode[(int) icode][2];
464 t_class = (t_letter == 'r' ? GENERAL_REGS
465 : REG_CLASS_FROM_LETTER (t_letter));
467 icode = CODE_FOR_nothing;
471 /* This case isn't valid, so fail. Reload is allowed to use the same
472 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
473 in the case of a secondary register, we actually need two different
474 registers for correct code. We fail here to prevent the possibility of
475 silently generating incorrect code later.
477 The convention is that secondary input reloads are valid only if the
478 secondary_class is different from class. If you have such a case, you
479 can not use secondary reloads, you must work around the problem some
482 Allow this when MODE is not reload_mode and assume that the generated
483 code handles this case (it does on the Alpha, which is the only place
484 this currently happens). */
486 if (in_p && class == reload_class && mode == reload_mode)
489 /* If we need a tertiary reload, see if we have one we can reuse or else
492 if (t_class != NO_REGS)
494 for (t_reload = 0; t_reload < n_reloads; t_reload++)
495 if (reload_secondary_p[t_reload]
496 && (reg_class_subset_p (t_class, reload_reg_class[t_reload])
497 || reg_class_subset_p (reload_reg_class[t_reload], t_class))
498 && ((in_p && reload_inmode[t_reload] == t_mode)
499 || (! in_p && reload_outmode[t_reload] == t_mode))
500 && ((in_p && (reload_secondary_in_icode[t_reload]
501 == CODE_FOR_nothing))
502 || (! in_p &&(reload_secondary_out_icode[t_reload]
503 == CODE_FOR_nothing)))
504 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
505 && MERGABLE_RELOADS (secondary_type,
506 reload_when_needed[t_reload],
507 opnum, reload_opnum[t_reload]))
510 reload_inmode[t_reload] = t_mode;
512 reload_outmode[t_reload] = t_mode;
514 if (reg_class_subset_p (t_class, reload_reg_class[t_reload]))
515 reload_reg_class[t_reload] = t_class;
517 reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum);
518 reload_optional[t_reload] &= optional;
519 reload_secondary_p[t_reload] = 1;
520 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload],
521 opnum, reload_opnum[t_reload]))
522 reload_when_needed[t_reload] = RELOAD_OTHER;
525 if (t_reload == n_reloads)
527 /* We need to make a new tertiary reload for this register class. */
528 reload_in[t_reload] = reload_out[t_reload] = 0;
529 reload_reg_class[t_reload] = t_class;
530 reload_inmode[t_reload] = in_p ? t_mode : VOIDmode;
531 reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode;
532 reload_reg_rtx[t_reload] = 0;
533 reload_optional[t_reload] = optional;
534 reload_nongroup[t_reload] = 0;
535 reload_inc[t_reload] = 0;
536 /* Maybe we could combine these, but it seems too tricky. */
537 reload_nocombine[t_reload] = 1;
538 reload_in_reg[t_reload] = 0;
539 reload_opnum[t_reload] = opnum;
540 reload_when_needed[t_reload] = secondary_type;
541 reload_secondary_in_reload[t_reload] = -1;
542 reload_secondary_out_reload[t_reload] = -1;
543 reload_secondary_in_icode[t_reload] = CODE_FOR_nothing;
544 reload_secondary_out_icode[t_reload] = CODE_FOR_nothing;
545 reload_secondary_p[t_reload] = 1;
551 /* See if we can reuse an existing secondary reload. */
552 for (s_reload = 0; s_reload < n_reloads; s_reload++)
553 if (reload_secondary_p[s_reload]
554 && (reg_class_subset_p (class, reload_reg_class[s_reload])
555 || reg_class_subset_p (reload_reg_class[s_reload], class))
556 && ((in_p && reload_inmode[s_reload] == mode)
557 || (! in_p && reload_outmode[s_reload] == mode))
558 && ((in_p && reload_secondary_in_reload[s_reload] == t_reload)
559 || (! in_p && reload_secondary_out_reload[s_reload] == t_reload))
560 && ((in_p && reload_secondary_in_icode[s_reload] == t_icode)
561 || (! in_p && reload_secondary_out_icode[s_reload] == t_icode))
562 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
563 && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload],
564 opnum, reload_opnum[s_reload]))
567 reload_inmode[s_reload] = mode;
569 reload_outmode[s_reload] = mode;
571 if (reg_class_subset_p (class, reload_reg_class[s_reload]))
572 reload_reg_class[s_reload] = class;
574 reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum);
575 reload_optional[s_reload] &= optional;
576 reload_secondary_p[s_reload] = 1;
577 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload],
578 opnum, reload_opnum[s_reload]))
579 reload_when_needed[s_reload] = RELOAD_OTHER;
582 if (s_reload == n_reloads)
584 #ifdef SECONDARY_MEMORY_NEEDED
585 /* If we need a memory location to copy between the two reload regs,
586 set it up now. Note that we do the input case before making
587 the reload and the output case after. This is due to the
588 way reloads are output. */
590 if (in_p && icode == CODE_FOR_nothing
591 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
592 get_secondary_mem (x, reload_mode, opnum, type);
595 /* We need to make a new secondary reload for this register class. */
596 reload_in[s_reload] = reload_out[s_reload] = 0;
597 reload_reg_class[s_reload] = class;
599 reload_inmode[s_reload] = in_p ? mode : VOIDmode;
600 reload_outmode[s_reload] = ! in_p ? mode : VOIDmode;
601 reload_reg_rtx[s_reload] = 0;
602 reload_optional[s_reload] = optional;
603 reload_nongroup[s_reload] = 0;
604 reload_inc[s_reload] = 0;
605 /* Maybe we could combine these, but it seems too tricky. */
606 reload_nocombine[s_reload] = 1;
607 reload_in_reg[s_reload] = 0;
608 reload_opnum[s_reload] = opnum;
609 reload_when_needed[s_reload] = secondary_type;
610 reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1;
611 reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1;
612 reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing;
613 reload_secondary_out_icode[s_reload]
614 = ! in_p ? t_icode : CODE_FOR_nothing;
615 reload_secondary_p[s_reload] = 1;
619 #ifdef SECONDARY_MEMORY_NEEDED
620 if (! in_p && icode == CODE_FOR_nothing
621 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
622 get_secondary_mem (x, mode, opnum, type);
629 #endif /* HAVE_SECONDARY_RELOADS */
631 #ifdef SECONDARY_MEMORY_NEEDED
633 /* Return a memory location that will be used to copy X in mode MODE.
634 If we haven't already made a location for this mode in this insn,
635 call find_reloads_address on the location being returned. */
638 get_secondary_mem (x, mode, opnum, type)
640 enum machine_mode mode;
642 enum reload_type type;
647 /* By default, if MODE is narrower than a word, widen it to a word.
648 This is required because most machines that require these memory
649 locations do not support short load and stores from all registers
650 (e.g., FP registers). */
652 #ifdef SECONDARY_MEMORY_NEEDED_MODE
653 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
655 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
656 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
659 /* If we already have made a MEM for this operand in MODE, return it. */
660 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
661 return secondary_memlocs_elim[(int) mode][opnum];
663 /* If this is the first time we've tried to get a MEM for this mode,
664 allocate a new one. `something_changed' in reload will get set
665 by noticing that the frame size has changed. */
667 if (secondary_memlocs[(int) mode] == 0)
669 #ifdef SECONDARY_MEMORY_NEEDED_RTX
670 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
672 secondary_memlocs[(int) mode]
673 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
677 /* Get a version of the address doing any eliminations needed. If that
678 didn't give us a new MEM, make a new one if it isn't valid. */
680 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
681 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
683 if (! mem_valid && loc == secondary_memlocs[(int) mode])
684 loc = copy_rtx (loc);
686 /* The only time the call below will do anything is if the stack
687 offset is too large. In that case IND_LEVELS doesn't matter, so we
688 can just pass a zero. Adjust the type to be the address of the
689 corresponding object. If the address was valid, save the eliminated
690 address. If it wasn't valid, we need to make a reload each time, so
695 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
696 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
699 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
703 secondary_memlocs_elim[(int) mode][opnum] = loc;
707 /* Clear any secondary memory locations we've made. */
710 clear_secondary_mem ()
712 bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);
714 #endif /* SECONDARY_MEMORY_NEEDED */
716 /* Find the largest class for which every register number plus N is valid in
717 M1 (if in range). Abort if no such class exists. */
719 static enum reg_class
720 find_valid_class (m1, n)
721 enum machine_mode m1;
726 enum reg_class best_class;
729 for (class = 1; class < N_REG_CLASSES; class++)
732 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
733 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
734 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
735 && ! HARD_REGNO_MODE_OK (regno + n, m1))
738 if (! bad && reg_class_size[class] > best_size)
739 best_class = class, best_size = reg_class_size[class];
748 /* Record one reload that needs to be performed.
749 IN is an rtx saying where the data are to be found before this instruction.
750 OUT says where they must be stored after the instruction.
751 (IN is zero for data not read, and OUT is zero for data not written.)
752 INLOC and OUTLOC point to the places in the instructions where
753 IN and OUT were found.
754 If IN and OUT are both non-zero, it means the same register must be used
755 to reload both IN and OUT.
757 CLASS is a register class required for the reloaded data.
758 INMODE is the machine mode that the instruction requires
759 for the reg that replaces IN and OUTMODE is likewise for OUT.
761 If IN is zero, then OUT's location and mode should be passed as
764 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
766 OPTIONAL nonzero means this reload does not need to be performed:
767 it can be discarded if that is more convenient.
769 OPNUM and TYPE say what the purpose of this reload is.
771 The return value is the reload-number for this reload.
773 If both IN and OUT are nonzero, in some rare cases we might
774 want to make two separate reloads. (Actually we never do this now.)
775 Therefore, the reload-number for OUT is stored in
776 output_reloadnum when we return; the return value applies to IN.
777 Usually (presently always), when IN and OUT are nonzero,
778 the two reload-numbers are equal, but the caller should be careful to
782 push_reload (in, out, inloc, outloc, class,
783 inmode, outmode, strict_low, optional, opnum, type)
784 register rtx in, out;
786 enum reg_class class;
787 enum machine_mode inmode, outmode;
791 enum reload_type type;
795 int dont_remove_subreg = 0;
796 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
797 int secondary_in_reload = -1, secondary_out_reload = -1;
798 enum insn_code secondary_in_icode = CODE_FOR_nothing;
799 enum insn_code secondary_out_icode = CODE_FOR_nothing;
801 /* INMODE and/or OUTMODE could be VOIDmode if no mode
802 has been specified for the operand. In that case,
803 use the operand's mode as the mode to reload. */
804 if (inmode == VOIDmode && in != 0)
805 inmode = GET_MODE (in);
806 if (outmode == VOIDmode && out != 0)
807 outmode = GET_MODE (out);
809 /* If IN is a pseudo register everywhere-equivalent to a constant, and
810 it is not in a hard register, reload straight from the constant,
811 since we want to get rid of such pseudo registers.
812 Often this is done earlier, but not always in find_reloads_address. */
813 if (in != 0 && GET_CODE (in) == REG)
815 register int regno = REGNO (in);
817 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
818 && reg_equiv_constant[regno] != 0)
819 in = reg_equiv_constant[regno];
822 /* Likewise for OUT. Of course, OUT will never be equivalent to
823 an actual constant, but it might be equivalent to a memory location
824 (in the case of a parameter). */
825 if (out != 0 && GET_CODE (out) == REG)
827 register int regno = REGNO (out);
829 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
830 && reg_equiv_constant[regno] != 0)
831 out = reg_equiv_constant[regno];
834 /* If we have a read-write operand with an address side-effect,
835 change either IN or OUT so the side-effect happens only once. */
836 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
838 if (GET_CODE (XEXP (in, 0)) == POST_INC
839 || GET_CODE (XEXP (in, 0)) == POST_DEC)
840 in = gen_rtx_MEM (GET_MODE (in), XEXP (XEXP (in, 0), 0));
841 if (GET_CODE (XEXP (in, 0)) == PRE_INC
842 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
843 out = gen_rtx_MEM (GET_MODE (out), XEXP (XEXP (out, 0), 0));
846 /* If we are reloading a (SUBREG constant ...), really reload just the
847 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
848 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
849 a pseudo and hence will become a MEM) with M1 wider than M2 and the
850 register is a pseudo, also reload the inside expression.
851 For machines that extend byte loads, do this for any SUBREG of a pseudo
852 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
853 M2 is an integral mode that gets extended when loaded.
854 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
855 either M1 is not valid for R or M2 is wider than a word but we only
856 need one word to store an M2-sized quantity in R.
857 (However, if OUT is nonzero, we need to reload the reg *and*
858 the subreg, so do nothing here, and let following statement handle it.)
860 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
861 we can't handle it here because CONST_INT does not indicate a mode.
863 Similarly, we must reload the inside expression if we have a
864 STRICT_LOW_PART (presumably, in == out in the cas).
866 Also reload the inner expression if it does not require a secondary
867 reload but the SUBREG does.
869 Finally, reload the inner expression if it is a register that is in
870 the class whose registers cannot be referenced in a different size
871 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
872 cannot reload just the inside since we might end up with the wrong
875 if (in != 0 && GET_CODE (in) == SUBREG && SUBREG_WORD (in) == 0
876 #ifdef CLASS_CANNOT_CHANGE_SIZE
877 && class != CLASS_CANNOT_CHANGE_SIZE
879 && (CONSTANT_P (SUBREG_REG (in))
880 || GET_CODE (SUBREG_REG (in)) == PLUS
882 || (((GET_CODE (SUBREG_REG (in)) == REG
883 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
884 || GET_CODE (SUBREG_REG (in)) == MEM)
885 && ((GET_MODE_SIZE (inmode)
886 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
887 #ifdef LOAD_EXTEND_OP
888 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
889 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
891 && (GET_MODE_SIZE (inmode)
892 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
893 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
894 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
896 #ifdef WORD_REGISTER_OPERATIONS
897 || ((GET_MODE_SIZE (inmode)
898 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
899 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
900 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
904 || (GET_CODE (SUBREG_REG (in)) == REG
905 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
906 /* The case where out is nonzero
907 is handled differently in the following statement. */
908 && (out == 0 || SUBREG_WORD (in) == 0)
909 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
910 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
912 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
914 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
915 GET_MODE (SUBREG_REG (in)))))
916 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
919 #ifdef SECONDARY_INPUT_RELOAD_CLASS
920 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
921 && (SECONDARY_INPUT_RELOAD_CLASS (class,
922 GET_MODE (SUBREG_REG (in)),
926 #ifdef CLASS_CANNOT_CHANGE_SIZE
927 || (GET_CODE (SUBREG_REG (in)) == REG
928 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
929 && (TEST_HARD_REG_BIT
930 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
931 REGNO (SUBREG_REG (in))))
932 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
933 != GET_MODE_SIZE (inmode)))
937 in_subreg_loc = inloc;
938 inloc = &SUBREG_REG (in);
940 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
941 if (GET_CODE (in) == MEM)
942 /* This is supposed to happen only for paradoxical subregs made by
943 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
944 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
947 inmode = GET_MODE (in);
950 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
951 either M1 is not valid for R or M2 is wider than a word but we only
952 need one word to store an M2-sized quantity in R.
954 However, we must reload the inner reg *as well as* the subreg in
957 /* Similar issue for (SUBREG constant ...) if it was not handled by the
958 code above. This can happen if SUBREG_WORD != 0. */
960 if (in != 0 && GET_CODE (in) == SUBREG
961 && (CONSTANT_P (SUBREG_REG (in))
962 || (GET_CODE (SUBREG_REG (in)) == REG
963 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
964 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in))
967 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
968 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
970 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
972 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
973 GET_MODE (SUBREG_REG (in)))))))))
975 /* This relies on the fact that emit_reload_insns outputs the
976 instructions for input reloads of type RELOAD_OTHER in the same
977 order as the reloads. Thus if the outer reload is also of type
978 RELOAD_OTHER, we are guaranteed that this inner reload will be
979 output before the outer reload. */
980 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
981 find_valid_class (inmode, SUBREG_WORD (in)),
982 VOIDmode, VOIDmode, 0, 0, opnum, type);
983 dont_remove_subreg = 1;
986 /* Similarly for paradoxical and problematical SUBREGs on the output.
987 Note that there is no reason we need worry about the previous value
988 of SUBREG_REG (out); even if wider than out,
989 storing in a subreg is entitled to clobber it all
990 (except in the case of STRICT_LOW_PART,
991 and in that case the constraint should label it input-output.) */
992 if (out != 0 && GET_CODE (out) == SUBREG && SUBREG_WORD (out) == 0
993 #ifdef CLASS_CANNOT_CHANGE_SIZE
994 && class != CLASS_CANNOT_CHANGE_SIZE
996 && (CONSTANT_P (SUBREG_REG (out))
998 || (((GET_CODE (SUBREG_REG (out)) == REG
999 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1000 || GET_CODE (SUBREG_REG (out)) == MEM)
1001 && ((GET_MODE_SIZE (outmode)
1002 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1003 #ifdef WORD_REGISTER_OPERATIONS
1004 || ((GET_MODE_SIZE (outmode)
1005 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1006 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1007 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1011 || (GET_CODE (SUBREG_REG (out)) == REG
1012 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1013 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1014 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1016 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1018 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1019 GET_MODE (SUBREG_REG (out)))))
1020 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
1021 + SUBREG_WORD (out)),
1023 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1024 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1025 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1026 GET_MODE (SUBREG_REG (out)),
1030 #ifdef CLASS_CANNOT_CHANGE_SIZE
1031 || (GET_CODE (SUBREG_REG (out)) == REG
1032 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1033 && (TEST_HARD_REG_BIT
1034 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
1035 REGNO (SUBREG_REG (out))))
1036 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1037 != GET_MODE_SIZE (outmode)))
1041 out_subreg_loc = outloc;
1042 outloc = &SUBREG_REG (out);
1044 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1045 if (GET_CODE (out) == MEM
1046 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1049 outmode = GET_MODE (out);
1052 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1053 either M1 is not valid for R or M2 is wider than a word but we only
1054 need one word to store an M2-sized quantity in R.
1056 However, we must reload the inner reg *as well as* the subreg in
1057 that case. In this case, the inner reg is an in-out reload. */
1059 if (out != 0 && GET_CODE (out) == SUBREG
1060 && GET_CODE (SUBREG_REG (out)) == REG
1061 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1062 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)) + SUBREG_WORD (out),
1064 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1065 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1067 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1069 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1070 GET_MODE (SUBREG_REG (out)))))))
1072 /* This relies on the fact that emit_reload_insns outputs the
1073 instructions for output reloads of type RELOAD_OTHER in reverse
1074 order of the reloads. Thus if the outer reload is also of type
1075 RELOAD_OTHER, we are guaranteed that this inner reload will be
1076 output after the outer reload. */
1077 dont_remove_subreg = 1;
1078 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1080 find_valid_class (outmode, SUBREG_WORD (out)),
1081 VOIDmode, VOIDmode, 0, 0,
1082 opnum, RELOAD_OTHER);
1085 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1086 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1087 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1088 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1091 /* If IN is a SUBREG of a hard register, make a new REG. This
1092 simplifies some of the cases below. */
1094 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1095 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1096 && ! dont_remove_subreg)
1097 in = gen_rtx_REG (GET_MODE (in),
1098 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
1100 /* Similarly for OUT. */
1101 if (out != 0 && GET_CODE (out) == SUBREG
1102 && GET_CODE (SUBREG_REG (out)) == REG
1103 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1104 && ! dont_remove_subreg)
1105 out = gen_rtx_REG (GET_MODE (out),
1106 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
1108 /* Narrow down the class of register wanted if that is
1109 desirable on this machine for efficiency. */
1111 class = PREFERRED_RELOAD_CLASS (in, class);
1113 /* Output reloads may need analogous treatment, different in detail. */
1114 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1116 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1119 /* Make sure we use a class that can handle the actual pseudo
1120 inside any subreg. For example, on the 386, QImode regs
1121 can appear within SImode subregs. Although GENERAL_REGS
1122 can handle SImode, QImode needs a smaller class. */
1123 #ifdef LIMIT_RELOAD_CLASS
1125 class = LIMIT_RELOAD_CLASS (inmode, class);
1126 else if (in != 0 && GET_CODE (in) == SUBREG)
1127 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1130 class = LIMIT_RELOAD_CLASS (outmode, class);
1131 if (out != 0 && GET_CODE (out) == SUBREG)
1132 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1135 /* Verify that this class is at least possible for the mode that
1137 if (this_insn_is_asm)
1139 enum machine_mode mode;
1140 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1144 if (mode == VOIDmode)
1146 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1151 outmode = word_mode;
1153 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1154 if (HARD_REGNO_MODE_OK (i, mode)
1155 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1157 int nregs = HARD_REGNO_NREGS (i, mode);
1160 for (j = 1; j < nregs; j++)
1161 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1166 if (i == FIRST_PSEUDO_REGISTER)
1168 error_for_asm (this_insn, "impossible register constraint in `asm'");
1173 if (class == NO_REGS)
1176 /* We can use an existing reload if the class is right
1177 and at least one of IN and OUT is a match
1178 and the other is at worst neutral.
1179 (A zero compared against anything is neutral.)
1181 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
1182 for the same thing since that can cause us to need more reload registers
1183 than we otherwise would. */
1185 for (i = 0; i < n_reloads; i++)
1186 if ((reg_class_subset_p (class, reload_reg_class[i])
1187 || reg_class_subset_p (reload_reg_class[i], class))
1188 /* If the existing reload has a register, it must fit our class. */
1189 && (reload_reg_rtx[i] == 0
1190 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1191 true_regnum (reload_reg_rtx[i])))
1192 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
1193 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
1195 (out != 0 && MATCHES (reload_out[i], out)
1196 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
1197 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
1198 && MERGABLE_RELOADS (type, reload_when_needed[i],
1199 opnum, reload_opnum[i]))
1202 /* Reloading a plain reg for input can match a reload to postincrement
1203 that reg, since the postincrement's value is the right value.
1204 Likewise, it can match a preincrement reload, since we regard
1205 the preincrementation as happening before any ref in this insn
1206 to that register. */
1208 for (i = 0; i < n_reloads; i++)
1209 if ((reg_class_subset_p (class, reload_reg_class[i])
1210 || reg_class_subset_p (reload_reg_class[i], class))
1211 /* If the existing reload has a register, it must fit our class. */
1212 && (reload_reg_rtx[i] == 0
1213 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1214 true_regnum (reload_reg_rtx[i])))
1215 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
1216 && ((GET_CODE (in) == REG
1217 && (GET_CODE (reload_in[i]) == POST_INC
1218 || GET_CODE (reload_in[i]) == POST_DEC
1219 || GET_CODE (reload_in[i]) == PRE_INC
1220 || GET_CODE (reload_in[i]) == PRE_DEC)
1221 && MATCHES (XEXP (reload_in[i], 0), in))
1223 (GET_CODE (reload_in[i]) == REG
1224 && (GET_CODE (in) == POST_INC
1225 || GET_CODE (in) == POST_DEC
1226 || GET_CODE (in) == PRE_INC
1227 || GET_CODE (in) == PRE_DEC)
1228 && MATCHES (XEXP (in, 0), reload_in[i])))
1229 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
1230 && MERGABLE_RELOADS (type, reload_when_needed[i],
1231 opnum, reload_opnum[i]))
1233 /* Make sure reload_in ultimately has the increment,
1234 not the plain register. */
1235 if (GET_CODE (in) == REG)
1242 /* See if we need a secondary reload register to move between CLASS
1243 and IN or CLASS and OUT. Get the icode and push any required reloads
1244 needed for each of them if so. */
1246 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1249 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1250 &secondary_in_icode);
1253 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1254 if (out != 0 && GET_CODE (out) != SCRATCH)
1255 secondary_out_reload
1256 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1257 type, &secondary_out_icode);
1260 /* We found no existing reload suitable for re-use.
1261 So add an additional reload. */
1263 #ifdef SECONDARY_MEMORY_NEEDED
1264 /* If a memory location is needed for the copy, make one. */
1265 if (in != 0 && GET_CODE (in) == REG
1266 && REGNO (in) < FIRST_PSEUDO_REGISTER
1267 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1269 get_secondary_mem (in, inmode, opnum, type);
1274 reload_out[i] = out;
1275 reload_reg_class[i] = class;
1276 reload_inmode[i] = inmode;
1277 reload_outmode[i] = outmode;
1278 reload_reg_rtx[i] = 0;
1279 reload_optional[i] = optional;
1280 reload_nongroup[i] = 0;
1282 reload_nocombine[i] = 0;
1283 reload_in_reg[i] = inloc ? *inloc : 0;
1284 reload_opnum[i] = opnum;
1285 reload_when_needed[i] = type;
1286 reload_secondary_in_reload[i] = secondary_in_reload;
1287 reload_secondary_out_reload[i] = secondary_out_reload;
1288 reload_secondary_in_icode[i] = secondary_in_icode;
1289 reload_secondary_out_icode[i] = secondary_out_icode;
1290 reload_secondary_p[i] = 0;
1294 #ifdef SECONDARY_MEMORY_NEEDED
1295 if (out != 0 && GET_CODE (out) == REG
1296 && REGNO (out) < FIRST_PSEUDO_REGISTER
1297 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1299 get_secondary_mem (out, outmode, opnum, type);
1304 /* We are reusing an existing reload,
1305 but we may have additional information for it.
1306 For example, we may now have both IN and OUT
1307 while the old one may have just one of them. */
1309 /* The modes can be different. If they are, we want to reload in
1310 the larger mode, so that the value is valid for both modes. */
1311 if (inmode != VOIDmode
1312 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (reload_inmode[i]))
1313 reload_inmode[i] = inmode;
1314 if (outmode != VOIDmode
1315 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (reload_outmode[i]))
1316 reload_outmode[i] = outmode;
1320 reload_out[i] = out;
1321 if (reg_class_subset_p (class, reload_reg_class[i]))
1322 reload_reg_class[i] = class;
1323 reload_optional[i] &= optional;
1324 if (MERGE_TO_OTHER (type, reload_when_needed[i],
1325 opnum, reload_opnum[i]))
1326 reload_when_needed[i] = RELOAD_OTHER;
1327 reload_opnum[i] = MIN (reload_opnum[i], opnum);
1330 /* If the ostensible rtx being reload differs from the rtx found
1331 in the location to substitute, this reload is not safe to combine
1332 because we cannot reliably tell whether it appears in the insn. */
1334 if (in != 0 && in != *inloc)
1335 reload_nocombine[i] = 1;
1338 /* This was replaced by changes in find_reloads_address_1 and the new
1339 function inc_for_reload, which go with a new meaning of reload_inc. */
1341 /* If this is an IN/OUT reload in an insn that sets the CC,
1342 it must be for an autoincrement. It doesn't work to store
1343 the incremented value after the insn because that would clobber the CC.
1344 So we must do the increment of the value reloaded from,
1345 increment it, store it back, then decrement again. */
1346 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1350 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1351 /* If we did not find a nonzero amount-to-increment-by,
1352 that contradicts the belief that IN is being incremented
1353 in an address in this insn. */
1354 if (reload_inc[i] == 0)
1359 /* If we will replace IN and OUT with the reload-reg,
1360 record where they are located so that substitution need
1361 not do a tree walk. */
1363 if (replace_reloads)
1367 register struct replacement *r = &replacements[n_replacements++];
1369 r->subreg_loc = in_subreg_loc;
1373 if (outloc != 0 && outloc != inloc)
1375 register struct replacement *r = &replacements[n_replacements++];
1378 r->subreg_loc = out_subreg_loc;
1383 /* If this reload is just being introduced and it has both
1384 an incoming quantity and an outgoing quantity that are
1385 supposed to be made to match, see if either one of the two
1386 can serve as the place to reload into.
1388 If one of them is acceptable, set reload_reg_rtx[i]
1391 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1393 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1395 reload_reg_class[i], i,
1396 earlyclobber_operand_p (out));
1398 /* If the outgoing register already contains the same value
1399 as the incoming one, we can dispense with loading it.
1400 The easiest way to tell the caller that is to give a phony
1401 value for the incoming operand (same as outgoing one). */
1402 if (reload_reg_rtx[i] == out
1403 && (GET_CODE (in) == REG || CONSTANT_P (in))
1404 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1405 static_reload_reg_p, i, inmode))
1409 /* If this is an input reload and the operand contains a register that
1410 dies in this insn and is used nowhere else, see if it is the right class
1411 to be used for this reload. Use it if so. (This occurs most commonly
1412 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1413 this if it is also an output reload that mentions the register unless
1414 the output is a SUBREG that clobbers an entire register.
1416 Note that the operand might be one of the spill regs, if it is a
1417 pseudo reg and we are in a block where spilling has not taken place.
1418 But if there is no spilling in this block, that is OK.
1419 An explicitly used hard reg cannot be a spill reg. */
1421 if (reload_reg_rtx[i] == 0 && in != 0)
1426 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1427 if (REG_NOTE_KIND (note) == REG_DEAD
1428 && GET_CODE (XEXP (note, 0)) == REG
1429 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1430 && reg_mentioned_p (XEXP (note, 0), in)
1431 && ! refers_to_regno_for_reload_p (regno,
1433 + HARD_REGNO_NREGS (regno,
1435 PATTERN (this_insn), inloc)
1436 /* If this is also an output reload, IN cannot be used as
1437 the reload register if it is set in this insn unless IN
1439 && (out == 0 || in == out
1440 || ! hard_reg_set_here_p (regno,
1442 + HARD_REGNO_NREGS (regno,
1444 PATTERN (this_insn)))
1445 /* ??? Why is this code so different from the previous?
1446 Is there any simple coherent way to describe the two together?
1447 What's going on here. */
1449 || (GET_CODE (in) == SUBREG
1450 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1452 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1453 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1454 /* Make sure the operand fits in the reg that dies. */
1455 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1456 && HARD_REGNO_MODE_OK (regno, inmode)
1457 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1458 && HARD_REGNO_MODE_OK (regno, outmode)
1459 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1460 && !fixed_regs[regno])
1462 reload_reg_rtx[i] = gen_rtx_REG (inmode, regno);
1468 output_reloadnum = i;
1473 /* Record an additional place we must replace a value
1474 for which we have already recorded a reload.
1475 RELOADNUM is the value returned by push_reload
1476 when the reload was recorded.
1477 This is used in insn patterns that use match_dup. */
1480 push_replacement (loc, reloadnum, mode)
1483 enum machine_mode mode;
1485 if (replace_reloads)
1487 register struct replacement *r = &replacements[n_replacements++];
1488 r->what = reloadnum;
1495 /* Transfer all replacements that used to be in reload FROM to be in
1499 transfer_replacements (to, from)
1504 for (i = 0; i < n_replacements; i++)
1505 if (replacements[i].what == from)
1506 replacements[i].what = to;
1509 /* Remove all replacements in reload FROM. */
1511 remove_replacements (from)
1516 for (i = 0, j = 0; i < n_replacements; i++)
1518 if (replacements[i].what == from)
1520 replacements[j++] = replacements[i];
1524 /* If there is only one output reload, and it is not for an earlyclobber
1525 operand, try to combine it with a (logically unrelated) input reload
1526 to reduce the number of reload registers needed.
1528 This is safe if the input reload does not appear in
1529 the value being output-reloaded, because this implies
1530 it is not needed any more once the original insn completes.
1532 If that doesn't work, see we can use any of the registers that
1533 die in this insn as a reload register. We can if it is of the right
1534 class and does not appear in the value being output-reloaded. */
1540 int output_reload = -1;
1541 int secondary_out = -1;
1544 /* Find the output reload; return unless there is exactly one
1545 and that one is mandatory. */
1547 for (i = 0; i < n_reloads; i++)
1548 if (reload_out[i] != 0)
1550 if (output_reload >= 0)
1555 if (output_reload < 0 || reload_optional[output_reload])
1558 /* An input-output reload isn't combinable. */
1560 if (reload_in[output_reload] != 0)
1563 /* If this reload is for an earlyclobber operand, we can't do anything. */
1564 if (earlyclobber_operand_p (reload_out[output_reload]))
1567 /* Check each input reload; can we combine it? */
1569 for (i = 0; i < n_reloads; i++)
1570 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1571 /* Life span of this reload must not extend past main insn. */
1572 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
1573 && reload_when_needed[i] != RELOAD_FOR_OUTADDR_ADDRESS
1574 && reload_when_needed[i] != RELOAD_OTHER
1575 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
1576 == CLASS_MAX_NREGS (reload_reg_class[output_reload],
1577 reload_outmode[output_reload]))
1578 && reload_inc[i] == 0
1579 && reload_reg_rtx[i] == 0
1580 #ifdef SECONDARY_MEMORY_NEEDED
1581 /* Don't combine two reloads with different secondary
1582 memory locations. */
1583 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
1584 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
1585 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
1586 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
1588 && (SMALL_REGISTER_CLASSES
1589 ? (reload_reg_class[i] == reload_reg_class[output_reload])
1590 : (reg_class_subset_p (reload_reg_class[i],
1591 reload_reg_class[output_reload])
1592 || reg_class_subset_p (reload_reg_class[output_reload],
1593 reload_reg_class[i])))
1594 && (MATCHES (reload_in[i], reload_out[output_reload])
1595 /* Args reversed because the first arg seems to be
1596 the one that we imagine being modified
1597 while the second is the one that might be affected. */
1598 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1600 /* However, if the input is a register that appears inside
1601 the output, then we also can't share.
1602 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1603 If the same reload reg is used for both reg 69 and the
1604 result to be stored in memory, then that result
1605 will clobber the address of the memory ref. */
1606 && ! (GET_CODE (reload_in[i]) == REG
1607 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1608 reload_out[output_reload]))))
1609 && (reg_class_size[(int) reload_reg_class[i]]
1610 || SMALL_REGISTER_CLASSES)
1611 /* We will allow making things slightly worse by combining an
1612 input and an output, but no worse than that. */
1613 && (reload_when_needed[i] == RELOAD_FOR_INPUT
1614 || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
1618 /* We have found a reload to combine with! */
1619 reload_out[i] = reload_out[output_reload];
1620 reload_outmode[i] = reload_outmode[output_reload];
1621 /* Mark the old output reload as inoperative. */
1622 reload_out[output_reload] = 0;
1623 /* The combined reload is needed for the entire insn. */
1624 reload_when_needed[i] = RELOAD_OTHER;
1625 /* If the output reload had a secondary reload, copy it. */
1626 if (reload_secondary_out_reload[output_reload] != -1)
1628 reload_secondary_out_reload[i]
1629 = reload_secondary_out_reload[output_reload];
1630 reload_secondary_out_icode[i]
1631 = reload_secondary_out_icode[output_reload];
1634 #ifdef SECONDARY_MEMORY_NEEDED
1635 /* Copy any secondary MEM. */
1636 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
1637 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
1638 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
1640 /* If required, minimize the register class. */
1641 if (reg_class_subset_p (reload_reg_class[output_reload],
1642 reload_reg_class[i]))
1643 reload_reg_class[i] = reload_reg_class[output_reload];
1645 /* Transfer all replacements from the old reload to the combined. */
1646 for (j = 0; j < n_replacements; j++)
1647 if (replacements[j].what == output_reload)
1648 replacements[j].what = i;
1653 /* If this insn has only one operand that is modified or written (assumed
1654 to be the first), it must be the one corresponding to this reload. It
1655 is safe to use anything that dies in this insn for that output provided
1656 that it does not occur in the output (we already know it isn't an
1657 earlyclobber. If this is an asm insn, give up. */
1659 if (INSN_CODE (this_insn) == -1)
1662 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1663 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1664 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1667 /* See if some hard register that dies in this insn and is not used in
1668 the output is the right class. Only works if the register we pick
1669 up can fully hold our output reload. */
1670 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1671 if (REG_NOTE_KIND (note) == REG_DEAD
1672 && GET_CODE (XEXP (note, 0)) == REG
1673 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1674 reload_out[output_reload])
1675 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1676 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1677 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1678 REGNO (XEXP (note, 0)))
1679 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1680 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1681 /* Ensure that a secondary or tertiary reload for this output
1682 won't want this register. */
1683 && ((secondary_out = reload_secondary_out_reload[output_reload]) == -1
1684 || (! (TEST_HARD_REG_BIT
1685 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1686 REGNO (XEXP (note, 0))))
1687 && ((secondary_out = reload_secondary_out_reload[secondary_out]) == -1
1688 || ! (TEST_HARD_REG_BIT
1689 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1690 REGNO (XEXP (note, 0)))))))
1691 && ! fixed_regs[REGNO (XEXP (note, 0))])
1693 reload_reg_rtx[output_reload]
1694 = gen_rtx_REG (reload_outmode[output_reload],
1695 REGNO (XEXP (note, 0)));
1700 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1701 See if one of IN and OUT is a register that may be used;
1702 this is desirable since a spill-register won't be needed.
1703 If so, return the register rtx that proves acceptable.
1705 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1706 CLASS is the register class required for the reload.
1708 If FOR_REAL is >= 0, it is the number of the reload,
1709 and in some cases when it can be discovered that OUT doesn't need
1710 to be computed, clear out reload_out[FOR_REAL].
1712 If FOR_REAL is -1, this should not be done, because this call
1713 is just to see if a register can be found, not to find and install it.
1715 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1716 puts an additional constraint on being able to use IN for OUT since
1717 IN must not appear elsewhere in the insn (it is assumed that IN itself
1718 is safe from the earlyclobber). */
1721 find_dummy_reload (real_in, real_out, inloc, outloc,
1722 inmode, outmode, class, for_real, earlyclobber)
1723 rtx real_in, real_out;
1724 rtx *inloc, *outloc;
1725 enum machine_mode inmode, outmode;
1726 enum reg_class class;
1736 /* If operands exceed a word, we can't use either of them
1737 unless they have the same size. */
1738 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1739 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1740 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1743 /* Find the inside of any subregs. */
1744 while (GET_CODE (out) == SUBREG)
1746 out_offset = SUBREG_WORD (out);
1747 out = SUBREG_REG (out);
1749 while (GET_CODE (in) == SUBREG)
1751 in_offset = SUBREG_WORD (in);
1752 in = SUBREG_REG (in);
1755 /* Narrow down the reg class, the same way push_reload will;
1756 otherwise we might find a dummy now, but push_reload won't. */
1757 class = PREFERRED_RELOAD_CLASS (in, class);
1759 /* See if OUT will do. */
1760 if (GET_CODE (out) == REG
1761 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1763 register int regno = REGNO (out) + out_offset;
1764 int nwords = HARD_REGNO_NREGS (regno, outmode);
1767 /* When we consider whether the insn uses OUT,
1768 ignore references within IN. They don't prevent us
1769 from copying IN into OUT, because those refs would
1770 move into the insn that reloads IN.
1772 However, we only ignore IN in its role as this reload.
1773 If the insn uses IN elsewhere and it contains OUT,
1774 that counts. We can't be sure it's the "same" operand
1775 so it might not go through this reload. */
1777 *inloc = const0_rtx;
1779 if (regno < FIRST_PSEUDO_REGISTER
1780 /* A fixed reg that can overlap other regs better not be used
1781 for reloading in any way. */
1782 #ifdef OVERLAPPING_REGNO_P
1783 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1785 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1786 PATTERN (this_insn), outloc))
1789 for (i = 0; i < nwords; i++)
1790 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1796 if (GET_CODE (real_out) == REG)
1799 value = gen_rtx_REG (outmode, regno);
1806 /* Consider using IN if OUT was not acceptable
1807 or if OUT dies in this insn (like the quotient in a divmod insn).
1808 We can't use IN unless it is dies in this insn,
1809 which means we must know accurately which hard regs are live.
1810 Also, the result can't go in IN if IN is used within OUT,
1811 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1812 if (hard_regs_live_known
1813 && GET_CODE (in) == REG
1814 && REGNO (in) < FIRST_PSEUDO_REGISTER
1816 || find_reg_note (this_insn, REG_UNUSED, real_out))
1817 && find_reg_note (this_insn, REG_DEAD, real_in)
1818 && !fixed_regs[REGNO (in)]
1819 && HARD_REGNO_MODE_OK (REGNO (in),
1820 /* The only case where out and real_out might
1821 have different modes is where real_out
1822 is a subreg, and in that case, out
1824 (GET_MODE (out) != VOIDmode
1825 ? GET_MODE (out) : outmode)))
1827 register int regno = REGNO (in) + in_offset;
1828 int nwords = HARD_REGNO_NREGS (regno, inmode);
1830 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1831 && ! hard_reg_set_here_p (regno, regno + nwords,
1832 PATTERN (this_insn))
1834 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1835 PATTERN (this_insn), inloc)))
1838 for (i = 0; i < nwords; i++)
1839 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1845 /* If we were going to use OUT as the reload reg
1846 and changed our mind, it means OUT is a dummy that
1847 dies here. So don't bother copying value to it. */
1848 if (for_real >= 0 && value == real_out)
1849 reload_out[for_real] = 0;
1850 if (GET_CODE (real_in) == REG)
1853 value = gen_rtx_REG (inmode, regno);
1861 /* This page contains subroutines used mainly for determining
1862 whether the IN or an OUT of a reload can serve as the
1865 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1868 earlyclobber_operand_p (x)
1873 for (i = 0; i < n_earlyclobbers; i++)
1874 if (reload_earlyclobbers[i] == x)
1880 /* Return 1 if expression X alters a hard reg in the range
1881 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1882 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1883 X should be the body of an instruction. */
1886 hard_reg_set_here_p (beg_regno, end_regno, x)
1887 register int beg_regno, end_regno;
1890 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1892 register rtx op0 = SET_DEST (x);
1893 while (GET_CODE (op0) == SUBREG)
1894 op0 = SUBREG_REG (op0);
1895 if (GET_CODE (op0) == REG)
1897 register int r = REGNO (op0);
1898 /* See if this reg overlaps range under consideration. */
1900 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1904 else if (GET_CODE (x) == PARALLEL)
1906 register int i = XVECLEN (x, 0) - 1;
1908 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1915 /* Return 1 if ADDR is a valid memory address for mode MODE,
1916 and check that each pseudo reg has the proper kind of
1920 strict_memory_address_p (mode, addr)
1921 enum machine_mode mode;
1924 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
1931 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1932 if they are the same hard reg, and has special hacks for
1933 autoincrement and autodecrement.
1934 This is specifically intended for find_reloads to use
1935 in determining whether two operands match.
1936 X is the operand whose number is the lower of the two.
1938 The value is 2 if Y contains a pre-increment that matches
1939 a non-incrementing address in X. */
1941 /* ??? To be completely correct, we should arrange to pass
1942 for X the output operand and for Y the input operand.
1943 For now, we assume that the output operand has the lower number
1944 because that is natural in (SET output (... input ...)). */
1947 operands_match_p (x, y)
1951 register RTX_CODE code = GET_CODE (x);
1957 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
1958 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
1959 && GET_CODE (SUBREG_REG (y)) == REG)))
1965 i = REGNO (SUBREG_REG (x));
1966 if (i >= FIRST_PSEUDO_REGISTER)
1968 i += SUBREG_WORD (x);
1973 if (GET_CODE (y) == SUBREG)
1975 j = REGNO (SUBREG_REG (y));
1976 if (j >= FIRST_PSEUDO_REGISTER)
1978 j += SUBREG_WORD (y);
1983 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1984 multiple hard register group, so that for example (reg:DI 0) and
1985 (reg:SI 1) will be considered the same register. */
1986 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
1987 && i < FIRST_PSEUDO_REGISTER)
1988 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
1989 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
1990 && j < FIRST_PSEUDO_REGISTER)
1991 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
1995 /* If two operands must match, because they are really a single
1996 operand of an assembler insn, then two postincrements are invalid
1997 because the assembler insn would increment only once.
1998 On the other hand, an postincrement matches ordinary indexing
1999 if the postincrement is the output operand. */
2000 if (code == POST_DEC || code == POST_INC)
2001 return operands_match_p (XEXP (x, 0), y);
2002 /* Two preincrements are invalid
2003 because the assembler insn would increment only once.
2004 On the other hand, an preincrement matches ordinary indexing
2005 if the preincrement is the input operand.
2006 In this case, return 2, since some callers need to do special
2007 things when this happens. */
2008 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
2009 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2013 /* Now we have disposed of all the cases
2014 in which different rtx codes can match. */
2015 if (code != GET_CODE (y))
2017 if (code == LABEL_REF)
2018 return XEXP (x, 0) == XEXP (y, 0);
2019 if (code == SYMBOL_REF)
2020 return XSTR (x, 0) == XSTR (y, 0);
2022 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2024 if (GET_MODE (x) != GET_MODE (y))
2027 /* Compare the elements. If any pair of corresponding elements
2028 fail to match, return 0 for the whole things. */
2031 fmt = GET_RTX_FORMAT (code);
2032 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2038 if (XWINT (x, i) != XWINT (y, i))
2043 if (XINT (x, i) != XINT (y, i))
2048 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2051 /* If any subexpression returns 2,
2052 we should return 2 if we are successful. */
2060 /* It is believed that rtx's at this level will never
2061 contain anything but integers and other rtx's,
2062 except for within LABEL_REFs and SYMBOL_REFs. */
2067 return 1 + success_2;
2070 /* Return the number of times character C occurs in string S. */
2073 n_occurrences (c, s)
2083 /* Describe the range of registers or memory referenced by X.
2084 If X is a register, set REG_FLAG and put the first register
2085 number into START and the last plus one into END.
2086 If X is a memory reference, put a base address into BASE
2087 and a range of integer offsets into START and END.
2088 If X is pushing on the stack, we can assume it causes no trouble,
2089 so we set the SAFE field. */
2091 static struct decomposition
2095 struct decomposition val;
2101 if (GET_CODE (x) == MEM)
2103 rtx base, offset = 0;
2104 rtx addr = XEXP (x, 0);
2106 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2107 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2109 val.base = XEXP (addr, 0);
2110 val.start = - GET_MODE_SIZE (GET_MODE (x));
2111 val.end = GET_MODE_SIZE (GET_MODE (x));
2112 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2116 if (GET_CODE (addr) == CONST)
2118 addr = XEXP (addr, 0);
2121 if (GET_CODE (addr) == PLUS)
2123 if (CONSTANT_P (XEXP (addr, 0)))
2125 base = XEXP (addr, 1);
2126 offset = XEXP (addr, 0);
2128 else if (CONSTANT_P (XEXP (addr, 1)))
2130 base = XEXP (addr, 0);
2131 offset = XEXP (addr, 1);
2138 offset = const0_rtx;
2140 if (GET_CODE (offset) == CONST)
2141 offset = XEXP (offset, 0);
2142 if (GET_CODE (offset) == PLUS)
2144 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2146 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2147 offset = XEXP (offset, 0);
2149 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2151 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2152 offset = XEXP (offset, 1);
2156 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2157 offset = const0_rtx;
2160 else if (GET_CODE (offset) != CONST_INT)
2162 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2163 offset = const0_rtx;
2166 if (all_const && GET_CODE (base) == PLUS)
2167 base = gen_rtx_CONST (GET_MODE (base), base);
2169 if (GET_CODE (offset) != CONST_INT)
2172 val.start = INTVAL (offset);
2173 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2177 else if (GET_CODE (x) == REG)
2180 val.start = true_regnum (x);
2183 /* A pseudo with no hard reg. */
2184 val.start = REGNO (x);
2185 val.end = val.start + 1;
2189 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2191 else if (GET_CODE (x) == SUBREG)
2193 if (GET_CODE (SUBREG_REG (x)) != REG)
2194 /* This could be more precise, but it's good enough. */
2195 return decompose (SUBREG_REG (x));
2197 val.start = true_regnum (x);
2199 return decompose (SUBREG_REG (x));
2202 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2204 else if (CONSTANT_P (x)
2205 /* This hasn't been assigned yet, so it can't conflict yet. */
2206 || GET_CODE (x) == SCRATCH)
2213 /* Return 1 if altering Y will not modify the value of X.
2214 Y is also described by YDATA, which should be decompose (Y). */
2217 immune_p (x, y, ydata)
2219 struct decomposition ydata;
2221 struct decomposition xdata;
2224 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2228 if (GET_CODE (y) != MEM)
2230 /* If Y is memory and X is not, Y can't affect X. */
2231 if (GET_CODE (x) != MEM)
2234 xdata = decompose (x);
2236 if (! rtx_equal_p (xdata.base, ydata.base))
2238 /* If bases are distinct symbolic constants, there is no overlap. */
2239 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2241 /* Constants and stack slots never overlap. */
2242 if (CONSTANT_P (xdata.base)
2243 && (ydata.base == frame_pointer_rtx
2244 || ydata.base == hard_frame_pointer_rtx
2245 || ydata.base == stack_pointer_rtx))
2247 if (CONSTANT_P (ydata.base)
2248 && (xdata.base == frame_pointer_rtx
2249 || xdata.base == hard_frame_pointer_rtx
2250 || xdata.base == stack_pointer_rtx))
2252 /* If either base is variable, we don't know anything. */
2257 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2260 /* Similar, but calls decompose. */
2263 safe_from_earlyclobber (op, clobber)
2266 struct decomposition early_data;
2268 early_data = decompose (clobber);
2269 return immune_p (op, clobber, early_data);
2272 /* Main entry point of this file: search the body of INSN
2273 for values that need reloading and record them with push_reload.
2274 REPLACE nonzero means record also where the values occur
2275 so that subst_reloads can be used.
2277 IND_LEVELS says how many levels of indirection are supported by this
2278 machine; a value of zero means that a memory reference is not a valid
2281 LIVE_KNOWN says we have valid information about which hard
2282 regs are live at each point in the program; this is true when
2283 we are called from global_alloc but false when stupid register
2284 allocation has been done.
2286 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2287 which is nonnegative if the reg has been commandeered for reloading into.
2288 It is copied into STATIC_RELOAD_REG_P and referenced from there
2289 by various subroutines. */
2292 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2294 int replace, ind_levels;
2296 short *reload_reg_p;
2298 #ifdef REGISTER_CONSTRAINTS
2300 register int insn_code_number;
2303 /* These are the constraints for the insn. We don't change them. */
2304 char *constraints1[MAX_RECOG_OPERANDS];
2305 /* These start out as the constraints for the insn
2306 and they are chewed up as we consider alternatives. */
2307 char *constraints[MAX_RECOG_OPERANDS];
2308 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2310 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2311 char pref_or_nothing[MAX_RECOG_OPERANDS];
2312 /* Nonzero for a MEM operand whose entire address needs a reload. */
2313 int address_reloaded[MAX_RECOG_OPERANDS];
2314 /* Value of enum reload_type to use for operand. */
2315 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2316 /* Value of enum reload_type to use within address of operand. */
2317 enum reload_type address_type[MAX_RECOG_OPERANDS];
2318 /* Save the usage of each operand. */
2319 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2320 int no_input_reloads = 0, no_output_reloads = 0;
2322 int this_alternative[MAX_RECOG_OPERANDS];
2323 char this_alternative_win[MAX_RECOG_OPERANDS];
2324 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2325 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2326 int this_alternative_matches[MAX_RECOG_OPERANDS];
2328 int goal_alternative[MAX_RECOG_OPERANDS];
2329 int this_alternative_number;
2330 int goal_alternative_number;
2331 int operand_reloadnum[MAX_RECOG_OPERANDS];
2332 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2333 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2334 char goal_alternative_win[MAX_RECOG_OPERANDS];
2335 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2336 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2337 int goal_alternative_swapped;
2341 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2342 rtx substed_operand[MAX_RECOG_OPERANDS];
2343 rtx body = PATTERN (insn);
2344 rtx set = single_set (insn);
2345 int goal_earlyclobber, this_earlyclobber;
2346 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2349 this_insn_is_asm = 0; /* Tentative. */
2353 n_earlyclobbers = 0;
2354 replace_reloads = replace;
2355 hard_regs_live_known = live_known;
2356 static_reload_reg_p = reload_reg_p;
2358 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2359 neither are insns that SET cc0. Insns that use CC0 are not allowed
2360 to have any input reloads. */
2361 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2362 no_output_reloads = 1;
2365 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2366 no_input_reloads = 1;
2367 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2368 no_output_reloads = 1;
2371 #ifdef SECONDARY_MEMORY_NEEDED
2372 /* The eliminated forms of any secondary memory locations are per-insn, so
2373 clear them out here. */
2375 bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2378 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2379 Make OPERANDS point to a vector of operand values.
2380 Make OPERAND_LOCS point to a vector of pointers to
2381 where the operands were found.
2382 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2383 constraint-strings for this insn.
2384 Return if the insn needs no reload processing. */
2386 switch (GET_CODE (body))
2396 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2397 is cheap to move between them. If it is not, there may not be an insn
2398 to do the copy, so we may need a reload. */
2399 if (GET_CODE (SET_DEST (body)) == REG
2400 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2401 && GET_CODE (SET_SRC (body)) == REG
2402 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2403 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2404 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2408 reload_n_operands = noperands = asm_noperands (body);
2411 /* This insn is an `asm' with operands. */
2413 insn_code_number = -1;
2414 this_insn_is_asm = 1;
2416 /* expand_asm_operands makes sure there aren't too many operands. */
2417 if (noperands > MAX_RECOG_OPERANDS)
2420 /* Now get the operand values and constraints out of the insn. */
2422 decode_asm_operands (body, recog_operand, recog_operand_loc,
2423 constraints, operand_mode);
2426 bcopy ((char *) constraints, (char *) constraints1,
2427 noperands * sizeof (char *));
2428 n_alternatives = n_occurrences (',', constraints[0]) + 1;
2429 for (i = 1; i < noperands; i++)
2430 if (n_alternatives != n_occurrences (',', constraints[i]) + 1)
2432 error_for_asm (insn, "operand constraints differ in number of alternatives");
2433 /* Avoid further trouble with this insn. */
2434 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
2443 /* Ordinary insn: recognize it, get the operands via insn_extract
2444 and get the constraints. */
2446 insn_code_number = recog_memoized (insn);
2447 if (insn_code_number < 0)
2448 fatal_insn_not_found (insn);
2450 reload_n_operands = noperands = insn_n_operands[insn_code_number];
2451 n_alternatives = insn_n_alternatives[insn_code_number];
2452 /* Just return "no reloads" if insn has no operands with constraints. */
2453 if (n_alternatives == 0)
2455 insn_extract (insn);
2456 for (i = 0; i < noperands; i++)
2458 constraints[i] = constraints1[i]
2459 = insn_operand_constraint[insn_code_number][i];
2460 operand_mode[i] = insn_operand_mode[insn_code_number][i];
2469 /* If we will need to know, later, whether some pair of operands
2470 are the same, we must compare them now and save the result.
2471 Reloading the base and index registers will clobber them
2472 and afterward they will fail to match. */
2474 for (i = 0; i < noperands; i++)
2479 substed_operand[i] = recog_operand[i];
2482 modified[i] = RELOAD_READ;
2484 /* Scan this operand's constraint to see if it is an output operand,
2485 an in-out operand, is commutative, or should match another. */
2490 modified[i] = RELOAD_WRITE;
2492 modified[i] = RELOAD_READ_WRITE;
2495 /* The last operand should not be marked commutative. */
2496 if (i == noperands - 1)
2498 if (this_insn_is_asm)
2499 warning_for_asm (this_insn,
2500 "`%%' constraint used with last operand");
2507 else if (c >= '0' && c <= '9')
2510 operands_match[c][i]
2511 = operands_match_p (recog_operand[c], recog_operand[i]);
2513 /* An operand may not match itself. */
2516 if (this_insn_is_asm)
2517 warning_for_asm (this_insn,
2518 "operand %d has constraint %d", i, c);
2523 /* If C can be commuted with C+1, and C might need to match I,
2524 then C+1 might also need to match I. */
2525 if (commutative >= 0)
2527 if (c == commutative || c == commutative + 1)
2529 int other = c + (c == commutative ? 1 : -1);
2530 operands_match[other][i]
2531 = operands_match_p (recog_operand[other], recog_operand[i]);
2533 if (i == commutative || i == commutative + 1)
2535 int other = i + (i == commutative ? 1 : -1);
2536 operands_match[c][other]
2537 = operands_match_p (recog_operand[c], recog_operand[other]);
2539 /* Note that C is supposed to be less than I.
2540 No need to consider altering both C and I because in
2541 that case we would alter one into the other. */
2547 /* Examine each operand that is a memory reference or memory address
2548 and reload parts of the addresses into index registers.
2549 Also here any references to pseudo regs that didn't get hard regs
2550 but are equivalent to constants get replaced in the insn itself
2551 with those constants. Nobody will ever see them again.
2553 Finally, set up the preferred classes of each operand. */
2555 for (i = 0; i < noperands; i++)
2557 register RTX_CODE code = GET_CODE (recog_operand[i]);
2559 address_reloaded[i] = 0;
2560 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2561 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2564 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2565 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2568 if (*constraints[i] == 0)
2569 /* Ignore things like match_operator operands. */
2571 else if (constraints[i][0] == 'p')
2573 find_reloads_address (VOIDmode, NULL_PTR,
2574 recog_operand[i], recog_operand_loc[i],
2575 i, operand_type[i], ind_levels, insn);
2577 /* If we now have a simple operand where we used to have a
2578 PLUS or MULT, re-recognize and try again. */
2579 if ((GET_RTX_CLASS (GET_CODE (*recog_operand_loc[i])) == 'o'
2580 || GET_CODE (*recog_operand_loc[i]) == SUBREG)
2581 && (GET_CODE (recog_operand[i]) == MULT
2582 || GET_CODE (recog_operand[i]) == PLUS))
2584 INSN_CODE (insn) = -1;
2585 find_reloads (insn, replace, ind_levels, live_known,
2590 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2592 else if (code == MEM)
2594 if (find_reloads_address (GET_MODE (recog_operand[i]),
2595 recog_operand_loc[i],
2596 XEXP (recog_operand[i], 0),
2597 &XEXP (recog_operand[i], 0),
2598 i, address_type[i], ind_levels, insn))
2599 address_reloaded[i] = 1;
2600 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2602 else if (code == SUBREG)
2604 rtx reg = SUBREG_REG (recog_operand[i]);
2606 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2609 && &SET_DEST (set) == recog_operand_loc[i]);
2611 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2612 that didn't get a hard register, emit a USE with a REG_EQUAL
2613 note in front so that we might inherit a previous, possibly
2616 if (GET_CODE (op) == MEM
2617 && GET_CODE (reg) == REG
2618 && (GET_MODE_SIZE (GET_MODE (reg))
2619 >= GET_MODE_SIZE (GET_MODE (op))))
2620 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode, reg), insn))
2621 = gen_rtx_EXPR_LIST (REG_EQUAL,
2622 reg_equiv_memory_loc[REGNO (reg)], NULL_RTX);
2624 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i] = op;
2626 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2627 /* We can get a PLUS as an "operand" as a result of register
2628 elimination. See eliminate_regs and gen_reload. We handle
2629 a unary operator by reloading the operand. */
2630 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2631 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2633 else if (code == REG)
2635 /* This is equivalent to calling find_reloads_toplev.
2636 The code is duplicated for speed.
2637 When we find a pseudo always equivalent to a constant,
2638 we replace it by the constant. We must be sure, however,
2639 that we don't try to replace it in the insn in which it
2641 register int regno = REGNO (recog_operand[i]);
2642 if (reg_equiv_constant[regno] != 0
2643 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2644 substed_operand[i] = recog_operand[i]
2645 = reg_equiv_constant[regno];
2646 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2647 that feeds this insn. */
2648 if (reg_equiv_mem[regno] != 0)
2649 substed_operand[i] = recog_operand[i]
2650 = reg_equiv_mem[regno];
2652 if (reg_equiv_address[regno] != 0)
2654 /* If reg_equiv_address is not a constant address, copy it,
2655 since it may be shared. */
2656 /* We must rerun eliminate_regs, in case the elimination
2657 offsets have changed. */
2658 rtx address = XEXP (eliminate_regs (reg_equiv_memory_loc[regno],
2662 if (rtx_varies_p (address))
2663 address = copy_rtx (address);
2665 /* Emit a USE that shows what register is being used/modified. */
2666 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode,
2669 = gen_rtx_EXPR_LIST (REG_EQUAL,
2670 reg_equiv_memory_loc[regno],
2673 *recog_operand_loc[i] = recog_operand[i]
2674 = gen_rtx_MEM (GET_MODE (recog_operand[i]), address);
2675 RTX_UNCHANGING_P (recog_operand[i])
2676 = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
2677 find_reloads_address (GET_MODE (recog_operand[i]),
2678 recog_operand_loc[i],
2679 XEXP (recog_operand[i], 0),
2680 &XEXP (recog_operand[i], 0),
2681 i, address_type[i], ind_levels, insn);
2682 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2685 /* If the operand is still a register (we didn't replace it with an
2686 equivalent), get the preferred class to reload it into. */
2687 code = GET_CODE (recog_operand[i]);
2689 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
2690 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2692 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
2693 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2696 /* If this is simply a copy from operand 1 to operand 0, merge the
2697 preferred classes for the operands. */
2698 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2699 && recog_operand[1] == SET_SRC (set))
2701 preferred_class[0] = preferred_class[1]
2702 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2703 pref_or_nothing[0] |= pref_or_nothing[1];
2704 pref_or_nothing[1] |= pref_or_nothing[0];
2707 /* Now see what we need for pseudo-regs that didn't get hard regs
2708 or got the wrong kind of hard reg. For this, we must consider
2709 all the operands together against the register constraints. */
2711 best = MAX_RECOG_OPERANDS * 2 + 600;
2714 goal_alternative_swapped = 0;
2717 /* The constraints are made of several alternatives.
2718 Each operand's constraint looks like foo,bar,... with commas
2719 separating the alternatives. The first alternatives for all
2720 operands go together, the second alternatives go together, etc.
2722 First loop over alternatives. */
2724 for (this_alternative_number = 0;
2725 this_alternative_number < n_alternatives;
2726 this_alternative_number++)
2728 /* Loop over operands for one constraint alternative. */
2729 /* LOSERS counts those that don't fit this alternative
2730 and would require loading. */
2732 /* BAD is set to 1 if it some operand can't fit this alternative
2733 even after reloading. */
2735 /* REJECT is a count of how undesirable this alternative says it is
2736 if any reloading is required. If the alternative matches exactly
2737 then REJECT is ignored, but otherwise it gets this much
2738 counted against it in addition to the reloading needed. Each
2739 ? counts three times here since we want the disparaging caused by
2740 a bad register class to only count 1/3 as much. */
2743 this_earlyclobber = 0;
2745 for (i = 0; i < noperands; i++)
2747 register char *p = constraints[i];
2748 register int win = 0;
2749 /* 0 => this operand can be reloaded somehow for this alternative */
2751 /* 0 => this operand can be reloaded if the alternative allows regs. */
2754 register rtx operand = recog_operand[i];
2756 /* Nonzero means this is a MEM that must be reloaded into a reg
2757 regardless of what the constraint says. */
2758 int force_reload = 0;
2760 /* Nonzero if a constant forced into memory would be OK for this
2763 int earlyclobber = 0;
2765 /* If the predicate accepts a unary operator, it means that
2766 we need to reload the operand. */
2767 if (GET_RTX_CLASS (GET_CODE (operand)) == '1')
2768 operand = XEXP (operand, 0);
2770 /* If the operand is a SUBREG, extract
2771 the REG or MEM (or maybe even a constant) within.
2772 (Constants can occur as a result of reg_equiv_constant.) */
2774 while (GET_CODE (operand) == SUBREG)
2776 offset += SUBREG_WORD (operand);
2777 operand = SUBREG_REG (operand);
2778 /* Force reload if this is a constant or PLUS or if there may
2779 be a problem accessing OPERAND in the outer mode. */
2780 if (CONSTANT_P (operand)
2781 || GET_CODE (operand) == PLUS
2782 /* We must force a reload of paradoxical SUBREGs
2783 of a MEM because the alignment of the inner value
2784 may not be enough to do the outer reference. On
2785 big-endian machines, it may also reference outside
2788 On machines that extend byte operations and we have a
2789 SUBREG where both the inner and outer modes are no wider
2790 than a word and the inner mode is narrower, is integral,
2791 and gets extended when loaded from memory, combine.c has
2792 made assumptions about the behavior of the machine in such
2793 register access. If the data is, in fact, in memory we
2794 must always load using the size assumed to be in the
2795 register and let the insn do the different-sized
2798 This is doubly true if WORD_REGISTER_OPERATIONS. In
2799 this case eliminate_regs has left non-paradoxical
2800 subregs for push_reloads to see. Make sure it does
2801 by forcing the reload.
2803 ??? When is it right at this stage to have a subreg
2804 of a mem that is _not_ to be handled specialy? IMO
2805 those should have been reduced to just a mem. */
2806 || ((GET_CODE (operand) == MEM
2807 || (GET_CODE (operand)== REG
2808 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2809 #ifndef WORD_REGISTER_OPERATIONS
2810 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2811 < BIGGEST_ALIGNMENT)
2812 && (GET_MODE_SIZE (operand_mode[i])
2813 > GET_MODE_SIZE (GET_MODE (operand))))
2814 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2815 #ifdef LOAD_EXTEND_OP
2816 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2817 && (GET_MODE_SIZE (GET_MODE (operand))
2819 && (GET_MODE_SIZE (operand_mode[i])
2820 > GET_MODE_SIZE (GET_MODE (operand)))
2821 && INTEGRAL_MODE_P (GET_MODE (operand))
2822 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2827 /* Subreg of a hard reg which can't handle the subreg's mode
2828 or which would handle that mode in the wrong number of
2829 registers for subregging to work. */
2830 || (GET_CODE (operand) == REG
2831 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2832 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2833 && (GET_MODE_SIZE (GET_MODE (operand))
2835 && ((GET_MODE_SIZE (GET_MODE (operand))
2837 != HARD_REGNO_NREGS (REGNO (operand),
2838 GET_MODE (operand))))
2839 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2844 this_alternative[i] = (int) NO_REGS;
2845 this_alternative_win[i] = 0;
2846 this_alternative_offmemok[i] = 0;
2847 this_alternative_earlyclobber[i] = 0;
2848 this_alternative_matches[i] = -1;
2850 /* An empty constraint or empty alternative
2851 allows anything which matched the pattern. */
2852 if (*p == 0 || *p == ',')
2855 /* Scan this alternative's specs for this operand;
2856 set WIN if the operand fits any letter in this alternative.
2857 Otherwise, clear BADOP if this operand could
2858 fit some letter after reloads,
2859 or set WINREG if this operand could fit after reloads
2860 provided the constraint allows some registers. */
2862 while (*p && (c = *p++) != ',')
2871 /* The last operand should not be marked commutative. */
2872 if (i != noperands - 1)
2885 /* Ignore rest of this alternative as far as
2886 reloading is concerned. */
2887 while (*p && *p != ',') p++;
2896 this_alternative_matches[i] = c;
2897 /* We are supposed to match a previous operand.
2898 If we do, we win if that one did.
2899 If we do not, count both of the operands as losers.
2900 (This is too conservative, since most of the time
2901 only a single reload insn will be needed to make
2902 the two operands win. As a result, this alternative
2903 may be rejected when it is actually desirable.) */
2904 if ((swapped && (c != commutative || i != commutative + 1))
2905 /* If we are matching as if two operands were swapped,
2906 also pretend that operands_match had been computed
2908 But if I is the second of those and C is the first,
2909 don't exchange them, because operands_match is valid
2910 only on one side of its diagonal. */
2912 [(c == commutative || c == commutative + 1)
2913 ? 2*commutative + 1 - c : c]
2914 [(i == commutative || i == commutative + 1)
2915 ? 2*commutative + 1 - i : i])
2916 : operands_match[c][i])
2918 /* If we are matching a non-offsettable address where an
2919 offsettable address was expected, then we must reject
2920 this combination, because we can't reload it. */
2921 if (this_alternative_offmemok[c]
2922 && GET_CODE (recog_operand[c]) == MEM
2923 && this_alternative[c] == (int) NO_REGS
2924 && ! this_alternative_win[c])
2927 win = this_alternative_win[c];
2931 /* Operands don't match. */
2933 /* Retroactively mark the operand we had to match
2934 as a loser, if it wasn't already. */
2935 if (this_alternative_win[c])
2937 this_alternative_win[c] = 0;
2938 if (this_alternative[c] == (int) NO_REGS)
2940 /* But count the pair only once in the total badness of
2941 this alternative, if the pair can be a dummy reload. */
2943 = find_dummy_reload (recog_operand[i], recog_operand[c],
2944 recog_operand_loc[i], recog_operand_loc[c],
2945 operand_mode[i], operand_mode[c],
2946 this_alternative[c], -1,
2947 this_alternative_earlyclobber[c]);
2952 /* This can be fixed with reloads if the operand
2953 we are supposed to match can be fixed with reloads. */
2955 this_alternative[i] = this_alternative[c];
2957 /* If we have to reload this operand and some previous
2958 operand also had to match the same thing as this
2959 operand, we don't know how to do that. So reject this
2961 if (! win || force_reload)
2962 for (j = 0; j < i; j++)
2963 if (this_alternative_matches[j]
2964 == this_alternative_matches[i])
2970 /* All necessary reloads for an address_operand
2971 were handled in find_reloads_address. */
2972 this_alternative[i] = (int) BASE_REG_CLASS;
2979 if (GET_CODE (operand) == MEM
2980 || (GET_CODE (operand) == REG
2981 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2982 && reg_renumber[REGNO (operand)] < 0))
2984 if (CONSTANT_P (operand)
2985 /* force_const_mem does not accept HIGH. */
2986 && GET_CODE (operand) != HIGH)
2992 if (GET_CODE (operand) == MEM
2993 && ! address_reloaded[i]
2994 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2995 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3000 if (GET_CODE (operand) == MEM
3001 && ! address_reloaded[i]
3002 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3003 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3007 /* Memory operand whose address is not offsettable. */
3011 if (GET_CODE (operand) == MEM
3012 && ! (ind_levels ? offsettable_memref_p (operand)
3013 : offsettable_nonstrict_memref_p (operand))
3014 /* Certain mem addresses will become offsettable
3015 after they themselves are reloaded. This is important;
3016 we don't want our own handling of unoffsettables
3017 to override the handling of reg_equiv_address. */
3018 && !(GET_CODE (XEXP (operand, 0)) == REG
3020 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3024 /* Memory operand whose address is offsettable. */
3028 if ((GET_CODE (operand) == MEM
3029 /* If IND_LEVELS, find_reloads_address won't reload a
3030 pseudo that didn't get a hard reg, so we have to
3031 reject that case. */
3032 && (ind_levels ? offsettable_memref_p (operand)
3033 : offsettable_nonstrict_memref_p (operand)))
3034 /* A reloaded auto-increment address is offsettable,
3035 because it is now just a simple register indirect. */
3036 || (GET_CODE (operand) == MEM
3037 && address_reloaded[i]
3038 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3039 || GET_CODE (XEXP (operand, 0)) == PRE_DEC
3040 || GET_CODE (XEXP (operand, 0)) == POST_INC
3041 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3042 /* Certain mem addresses will become offsettable
3043 after they themselves are reloaded. This is important;
3044 we don't want our own handling of unoffsettables
3045 to override the handling of reg_equiv_address. */
3046 || (GET_CODE (operand) == MEM
3047 && GET_CODE (XEXP (operand, 0)) == REG
3049 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))
3050 || (GET_CODE (operand) == REG
3051 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3052 && reg_renumber[REGNO (operand)] < 0
3053 /* If reg_equiv_address is nonzero, we will be
3054 loading it into a register; hence it will be
3055 offsettable, but we cannot say that reg_equiv_mem
3056 is offsettable without checking. */
3057 && ((reg_equiv_mem[REGNO (operand)] != 0
3058 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3059 || (reg_equiv_address[REGNO (operand)] != 0))))
3061 /* force_const_mem does not accept HIGH. */
3062 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3063 || GET_CODE (operand) == MEM)
3070 /* Output operand that is stored before the need for the
3071 input operands (and their index registers) is over. */
3072 earlyclobber = 1, this_earlyclobber = 1;
3076 #ifndef REAL_ARITHMETIC
3077 /* Match any floating double constant, but only if
3078 we can examine the bits of it reliably. */
3079 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
3080 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
3081 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
3084 if (GET_CODE (operand) == CONST_DOUBLE)
3089 if (GET_CODE (operand) == CONST_DOUBLE)
3095 if (GET_CODE (operand) == CONST_DOUBLE
3096 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
3101 if (GET_CODE (operand) == CONST_INT
3102 || (GET_CODE (operand) == CONST_DOUBLE
3103 && GET_MODE (operand) == VOIDmode))
3106 if (CONSTANT_P (operand)
3107 #ifdef LEGITIMATE_PIC_OPERAND_P
3108 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3115 if (GET_CODE (operand) == CONST_INT
3116 || (GET_CODE (operand) == CONST_DOUBLE
3117 && GET_MODE (operand) == VOIDmode))
3129 if (GET_CODE (operand) == CONST_INT
3130 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
3140 /* A PLUS is never a valid operand, but reload can make
3141 it from a register when eliminating registers. */
3142 && GET_CODE (operand) != PLUS
3143 /* A SCRATCH is not a valid operand. */
3144 && GET_CODE (operand) != SCRATCH
3145 #ifdef LEGITIMATE_PIC_OPERAND_P
3146 && (! CONSTANT_P (operand)
3148 || LEGITIMATE_PIC_OPERAND_P (operand))
3150 && (GENERAL_REGS == ALL_REGS
3151 || GET_CODE (operand) != REG
3152 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3153 && reg_renumber[REGNO (operand)] < 0)))
3155 /* Drop through into 'r' case */
3159 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3162 #ifdef EXTRA_CONSTRAINT
3168 if (EXTRA_CONSTRAINT (operand, c))
3175 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3178 if (GET_MODE (operand) == BLKmode)
3181 if (GET_CODE (operand) == REG
3182 && reg_fits_class_p (operand, this_alternative[i],
3183 offset, GET_MODE (recog_operand[i])))
3190 /* If this operand could be handled with a reg,
3191 and some reg is allowed, then this operand can be handled. */
3192 if (winreg && this_alternative[i] != (int) NO_REGS)
3195 /* Record which operands fit this alternative. */
3196 this_alternative_earlyclobber[i] = earlyclobber;
3197 if (win && ! force_reload)
3198 this_alternative_win[i] = 1;
3201 int const_to_mem = 0;
3203 this_alternative_offmemok[i] = offmemok;
3207 /* Alternative loses if it has no regs for a reg operand. */
3208 if (GET_CODE (operand) == REG
3209 && this_alternative[i] == (int) NO_REGS
3210 && this_alternative_matches[i] < 0)
3213 /* If this is a constant that is reloaded into the desired
3214 class by copying it to memory first, count that as another
3215 reload. This is consistent with other code and is
3216 required to avoid choosing another alternative when
3217 the constant is moved into memory by this function on
3218 an early reload pass. Note that the test here is
3219 precisely the same as in the code below that calls
3221 if (CONSTANT_P (operand)
3222 /* force_const_mem does not accept HIGH. */
3223 && GET_CODE (operand) != HIGH
3224 && ((PREFERRED_RELOAD_CLASS (operand,
3225 (enum reg_class) this_alternative[i])
3227 || no_input_reloads)
3228 && operand_mode[i] != VOIDmode)
3231 if (this_alternative[i] != (int) NO_REGS)
3235 /* If we can't reload this value at all, reject this
3236 alternative. Note that we could also lose due to
3237 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3240 if (! CONSTANT_P (operand)
3241 && (enum reg_class) this_alternative[i] != NO_REGS
3242 && (PREFERRED_RELOAD_CLASS (operand,
3243 (enum reg_class) this_alternative[i])
3247 /* Alternative loses if it requires a type of reload not
3248 permitted for this insn. We can always reload SCRATCH
3249 and objects with a REG_UNUSED note. */
3250 else if (GET_CODE (operand) != SCRATCH
3251 && modified[i] != RELOAD_READ && no_output_reloads
3252 && ! find_reg_note (insn, REG_UNUSED, operand))
3254 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3259 /* We prefer to reload pseudos over reloading other things,
3260 since such reloads may be able to be eliminated later.
3261 If we are reloading a SCRATCH, we won't be generating any
3262 insns, just using a register, so it is also preferred.
3263 So bump REJECT in other cases. Don't do this in the
3264 case where we are forcing a constant into memory and
3265 it will then win since we don't want to have a different
3266 alternative match then. */
3267 if (! (GET_CODE (operand) == REG
3268 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3269 && GET_CODE (operand) != SCRATCH
3270 && ! (const_to_mem && constmemok))
3273 /* Input reloads can be inherited more often than output
3274 reloads can be removed, so penalize output reloads. */
3275 if (operand_type[i] != RELOAD_FOR_INPUT
3276 && GET_CODE (operand) != SCRATCH)
3280 /* If this operand is a pseudo register that didn't get a hard
3281 reg and this alternative accepts some register, see if the
3282 class that we want is a subset of the preferred class for this
3283 register. If not, but it intersects that class, use the
3284 preferred class instead. If it does not intersect the preferred
3285 class, show that usage of this alternative should be discouraged;
3286 it will be discouraged more still if the register is `preferred
3287 or nothing'. We do this because it increases the chance of
3288 reusing our spill register in a later insn and avoiding a pair
3289 of memory stores and loads.
3291 Don't bother with this if this alternative will accept this
3294 Don't do this for a multiword operand, since it is only a
3295 small win and has the risk of requiring more spill registers,
3296 which could cause a large loss.
3298 Don't do this if the preferred class has only one register
3299 because we might otherwise exhaust the class. */
3302 if (! win && this_alternative[i] != (int) NO_REGS
3303 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3304 && reg_class_size[(int) preferred_class[i]] > 1)
3306 if (! reg_class_subset_p (this_alternative[i],
3307 preferred_class[i]))
3309 /* Since we don't have a way of forming the intersection,
3310 we just do something special if the preferred class
3311 is a subset of the class we have; that's the most
3312 common case anyway. */
3313 if (reg_class_subset_p (preferred_class[i],
3314 this_alternative[i]))
3315 this_alternative[i] = (int) preferred_class[i];
3317 reject += (2 + 2 * pref_or_nothing[i]);
3322 /* Now see if any output operands that are marked "earlyclobber"
3323 in this alternative conflict with any input operands
3324 or any memory addresses. */
3326 for (i = 0; i < noperands; i++)
3327 if (this_alternative_earlyclobber[i]
3328 && this_alternative_win[i])
3330 struct decomposition early_data;
3332 early_data = decompose (recog_operand[i]);
3334 if (modified[i] == RELOAD_READ)
3336 if (this_insn_is_asm)
3337 warning_for_asm (this_insn,
3338 "`&' constraint used with input operand");
3344 if (this_alternative[i] == NO_REGS)
3346 this_alternative_earlyclobber[i] = 0;
3347 if (this_insn_is_asm)
3348 error_for_asm (this_insn,
3349 "`&' constraint used with no register class");
3354 for (j = 0; j < noperands; j++)
3355 /* Is this an input operand or a memory ref? */
3356 if ((GET_CODE (recog_operand[j]) == MEM
3357 || modified[j] != RELOAD_WRITE)
3359 /* Ignore things like match_operator operands. */
3360 && *constraints1[j] != 0
3361 /* Don't count an input operand that is constrained to match
3362 the early clobber operand. */
3363 && ! (this_alternative_matches[j] == i
3364 && rtx_equal_p (recog_operand[i], recog_operand[j]))
3365 /* Is it altered by storing the earlyclobber operand? */
3366 && !immune_p (recog_operand[j], recog_operand[i], early_data))
3368 /* If the output is in a single-reg class,
3369 it's costly to reload it, so reload the input instead. */
3370 if (reg_class_size[this_alternative[i]] == 1
3371 && (GET_CODE (recog_operand[j]) == REG
3372 || GET_CODE (recog_operand[j]) == SUBREG))
3375 this_alternative_win[j] = 0;
3380 /* If an earlyclobber operand conflicts with something,
3381 it must be reloaded, so request this and count the cost. */
3385 this_alternative_win[i] = 0;
3386 for (j = 0; j < noperands; j++)
3387 if (this_alternative_matches[j] == i
3388 && this_alternative_win[j])
3390 this_alternative_win[j] = 0;
3396 /* If one alternative accepts all the operands, no reload required,
3397 choose that alternative; don't consider the remaining ones. */
3400 /* Unswap these so that they are never swapped at `finish'. */
3401 if (commutative >= 0)
3403 recog_operand[commutative] = substed_operand[commutative];
3404 recog_operand[commutative + 1]
3405 = substed_operand[commutative + 1];
3407 for (i = 0; i < noperands; i++)
3409 goal_alternative_win[i] = 1;
3410 goal_alternative[i] = this_alternative[i];
3411 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3412 goal_alternative_matches[i] = this_alternative_matches[i];
3413 goal_alternative_earlyclobber[i]
3414 = this_alternative_earlyclobber[i];
3416 goal_alternative_number = this_alternative_number;
3417 goal_alternative_swapped = swapped;
3418 goal_earlyclobber = this_earlyclobber;
3422 /* REJECT, set by the ! and ? constraint characters and when a register
3423 would be reloaded into a non-preferred class, discourages the use of
3424 this alternative for a reload goal. REJECT is incremented by six
3425 for each ? and two for each non-preferred class. */
3426 losers = losers * 6 + reject;
3428 /* If this alternative can be made to work by reloading,
3429 and it needs less reloading than the others checked so far,
3430 record it as the chosen goal for reloading. */
3431 if (! bad && best > losers)
3433 for (i = 0; i < noperands; i++)
3435 goal_alternative[i] = this_alternative[i];
3436 goal_alternative_win[i] = this_alternative_win[i];
3437 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3438 goal_alternative_matches[i] = this_alternative_matches[i];
3439 goal_alternative_earlyclobber[i]
3440 = this_alternative_earlyclobber[i];
3442 goal_alternative_swapped = swapped;
3444 goal_alternative_number = this_alternative_number;
3445 goal_earlyclobber = this_earlyclobber;
3449 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3450 then we need to try each alternative twice,
3451 the second time matching those two operands
3452 as if we had exchanged them.
3453 To do this, really exchange them in operands.
3455 If we have just tried the alternatives the second time,
3456 return operands to normal and drop through. */
3458 if (commutative >= 0)
3463 register enum reg_class tclass;
3466 recog_operand[commutative] = substed_operand[commutative + 1];
3467 recog_operand[commutative + 1] = substed_operand[commutative];
3469 tclass = preferred_class[commutative];
3470 preferred_class[commutative] = preferred_class[commutative + 1];
3471 preferred_class[commutative + 1] = tclass;
3473 t = pref_or_nothing[commutative];
3474 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3475 pref_or_nothing[commutative + 1] = t;
3477 bcopy ((char *) constraints1, (char *) constraints,
3478 noperands * sizeof (char *));
3483 recog_operand[commutative] = substed_operand[commutative];
3484 recog_operand[commutative + 1] = substed_operand[commutative + 1];
3488 /* The operands don't meet the constraints.
3489 goal_alternative describes the alternative
3490 that we could reach by reloading the fewest operands.
3491 Reload so as to fit it. */
3493 if (best == MAX_RECOG_OPERANDS + 300)
3495 /* No alternative works with reloads?? */
3496 if (insn_code_number >= 0)
3498 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3499 /* Avoid further trouble with this insn. */
3500 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3505 /* Jump to `finish' from above if all operands are valid already.
3506 In that case, goal_alternative_win is all 1. */
3509 /* Right now, for any pair of operands I and J that are required to match,
3511 goal_alternative_matches[J] is I.
3512 Set up goal_alternative_matched as the inverse function:
3513 goal_alternative_matched[I] = J. */
3515 for (i = 0; i < noperands; i++)
3516 goal_alternative_matched[i] = -1;
3518 for (i = 0; i < noperands; i++)
3519 if (! goal_alternative_win[i]
3520 && goal_alternative_matches[i] >= 0)
3521 goal_alternative_matched[goal_alternative_matches[i]] = i;
3523 /* If the best alternative is with operands 1 and 2 swapped,
3524 consider them swapped before reporting the reloads. Update the
3525 operand numbers of any reloads already pushed. */
3527 if (goal_alternative_swapped)
3531 tem = substed_operand[commutative];
3532 substed_operand[commutative] = substed_operand[commutative + 1];
3533 substed_operand[commutative + 1] = tem;
3534 tem = recog_operand[commutative];
3535 recog_operand[commutative] = recog_operand[commutative + 1];
3536 recog_operand[commutative + 1] = tem;
3538 for (i = 0; i < n_reloads; i++)
3540 if (reload_opnum[i] == commutative)
3541 reload_opnum[i] = commutative + 1;
3542 else if (reload_opnum[i] == commutative + 1)
3543 reload_opnum[i] = commutative;
3547 /* Perform whatever substitutions on the operands we are supposed
3548 to make due to commutativity or replacement of registers
3549 with equivalent constants or memory slots. */
3551 for (i = 0; i < noperands; i++)
3553 *recog_operand_loc[i] = substed_operand[i];
3554 /* While we are looping on operands, initialize this. */
3555 operand_reloadnum[i] = -1;
3557 /* If this is an earlyclobber operand, we need to widen the scope.
3558 The reload must remain valid from the start of the insn being
3559 reloaded until after the operand is stored into its destination.
3560 We approximate this with RELOAD_OTHER even though we know that we
3561 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3563 One special case that is worth checking is when we have an
3564 output that is earlyclobber but isn't used past the insn (typically
3565 a SCRATCH). In this case, we only need have the reload live
3566 through the insn itself, but not for any of our input or output
3569 In any case, anything needed to address this operand can remain
3570 however they were previously categorized. */
3572 if (goal_alternative_earlyclobber[i])
3574 = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
3575 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3578 /* Any constants that aren't allowed and can't be reloaded
3579 into registers are here changed into memory references. */
3580 for (i = 0; i < noperands; i++)
3581 if (! goal_alternative_win[i]
3582 && CONSTANT_P (recog_operand[i])
3583 /* force_const_mem does not accept HIGH. */
3584 && GET_CODE (recog_operand[i]) != HIGH
3585 && ((PREFERRED_RELOAD_CLASS (recog_operand[i],
3586 (enum reg_class) goal_alternative[i])
3588 || no_input_reloads)
3589 && operand_mode[i] != VOIDmode)
3591 *recog_operand_loc[i] = recog_operand[i]
3592 = find_reloads_toplev (force_const_mem (operand_mode[i],
3594 i, address_type[i], ind_levels, 0);
3595 if (alternative_allows_memconst (constraints1[i],
3596 goal_alternative_number))
3597 goal_alternative_win[i] = 1;
3600 /* Record the values of the earlyclobber operands for the caller. */
3601 if (goal_earlyclobber)
3602 for (i = 0; i < noperands; i++)
3603 if (goal_alternative_earlyclobber[i])
3604 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3606 /* Now record reloads for all the operands that need them. */
3607 for (i = 0; i < noperands; i++)
3608 if (! goal_alternative_win[i])
3610 /* Operands that match previous ones have already been handled. */
3611 if (goal_alternative_matches[i] >= 0)
3613 /* Handle an operand with a nonoffsettable address
3614 appearing where an offsettable address will do
3615 by reloading the address into a base register.
3617 ??? We can also do this when the operand is a register and
3618 reg_equiv_mem is not offsettable, but this is a bit tricky,
3619 so we don't bother with it. It may not be worth doing. */
3620 else if (goal_alternative_matched[i] == -1
3621 && goal_alternative_offmemok[i]
3622 && GET_CODE (recog_operand[i]) == MEM)
3624 operand_reloadnum[i]
3625 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
3626 &XEXP (recog_operand[i], 0), NULL_PTR,
3627 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
3628 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3629 reload_inc[operand_reloadnum[i]]
3630 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
3632 /* If this operand is an output, we will have made any
3633 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3634 now we are treating part of the operand as an input, so
3635 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3637 if (modified[i] == RELOAD_WRITE)
3639 for (j = 0; j < n_reloads; j++)
3641 if (reload_opnum[j] == i)
3643 if (reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3644 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
3645 else if (reload_when_needed[j]
3646 == RELOAD_FOR_OUTADDR_ADDRESS)
3647 reload_when_needed[j] = RELOAD_FOR_INPADDR_ADDRESS;
3652 else if (goal_alternative_matched[i] == -1)
3653 operand_reloadnum[i]
3654 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3655 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3656 (modified[i] != RELOAD_WRITE
3657 ? recog_operand_loc[i] : 0),
3658 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
3659 (enum reg_class) goal_alternative[i],
3660 (modified[i] == RELOAD_WRITE
3661 ? VOIDmode : operand_mode[i]),
3662 (modified[i] == RELOAD_READ
3663 ? VOIDmode : operand_mode[i]),
3664 (insn_code_number < 0 ? 0
3665 : insn_operand_strict_low[insn_code_number][i]),
3666 0, i, operand_type[i]);
3667 /* In a matching pair of operands, one must be input only
3668 and the other must be output only.
3669 Pass the input operand as IN and the other as OUT. */
3670 else if (modified[i] == RELOAD_READ
3671 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3673 operand_reloadnum[i]
3674 = push_reload (recog_operand[i],
3675 recog_operand[goal_alternative_matched[i]],
3676 recog_operand_loc[i],
3677 recog_operand_loc[goal_alternative_matched[i]],
3678 (enum reg_class) goal_alternative[i],
3680 operand_mode[goal_alternative_matched[i]],
3681 0, 0, i, RELOAD_OTHER);
3682 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3684 else if (modified[i] == RELOAD_WRITE
3685 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3687 operand_reloadnum[goal_alternative_matched[i]]
3688 = push_reload (recog_operand[goal_alternative_matched[i]],
3690 recog_operand_loc[goal_alternative_matched[i]],
3691 recog_operand_loc[i],
3692 (enum reg_class) goal_alternative[i],
3693 operand_mode[goal_alternative_matched[i]],
3695 0, 0, i, RELOAD_OTHER);
3696 operand_reloadnum[i] = output_reloadnum;
3698 else if (insn_code_number >= 0)
3702 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3703 /* Avoid further trouble with this insn. */
3704 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3709 else if (goal_alternative_matched[i] < 0
3710 && goal_alternative_matches[i] < 0
3713 /* For each non-matching operand that's a MEM or a pseudo-register
3714 that didn't get a hard register, make an optional reload.
3715 This may get done even if the insn needs no reloads otherwise. */
3717 rtx operand = recog_operand[i];
3719 while (GET_CODE (operand) == SUBREG)
3720 operand = XEXP (operand, 0);
3721 if ((GET_CODE (operand) == MEM
3722 || (GET_CODE (operand) == REG
3723 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3724 && (enum reg_class) goal_alternative[i] != NO_REGS
3725 && ! no_input_reloads
3726 /* Optional output reloads don't do anything and we mustn't
3727 make in-out reloads on insns that are not permitted output
3729 && (modified[i] == RELOAD_READ
3730 || (modified[i] == RELOAD_READ_WRITE && ! no_output_reloads)))
3731 operand_reloadnum[i]
3732 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3733 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3734 (modified[i] != RELOAD_WRITE
3735 ? recog_operand_loc[i] : 0),
3736 (modified[i] != RELOAD_READ
3737 ? recog_operand_loc[i] : 0),
3738 (enum reg_class) goal_alternative[i],
3739 (modified[i] == RELOAD_WRITE
3740 ? VOIDmode : operand_mode[i]),
3741 (modified[i] == RELOAD_READ
3742 ? VOIDmode : operand_mode[i]),
3743 (insn_code_number < 0 ? 0
3744 : insn_operand_strict_low[insn_code_number][i]),
3745 1, i, operand_type[i]);
3747 else if (goal_alternative_matches[i] >= 0
3748 && goal_alternative_win[goal_alternative_matches[i]]
3749 && modified[i] == RELOAD_READ
3750 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3751 && ! no_input_reloads && ! no_output_reloads
3754 /* Similarly, make an optional reload for a pair of matching
3755 objects that are in MEM or a pseudo that didn't get a hard reg. */
3757 rtx operand = recog_operand[i];
3759 while (GET_CODE (operand) == SUBREG)
3760 operand = XEXP (operand, 0);
3761 if ((GET_CODE (operand) == MEM
3762 || (GET_CODE (operand) == REG
3763 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3764 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3766 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3767 = push_reload (recog_operand[goal_alternative_matches[i]],
3769 recog_operand_loc[goal_alternative_matches[i]],
3770 recog_operand_loc[i],
3771 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3772 operand_mode[goal_alternative_matches[i]],
3774 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3777 /* If this insn pattern contains any MATCH_DUP's, make sure that
3778 they will be substituted if the operands they match are substituted.
3779 Also do now any substitutions we already did on the operands.
3781 Don't do this if we aren't making replacements because we might be
3782 propagating things allocated by frame pointer elimination into places
3783 it doesn't expect. */
3785 if (insn_code_number >= 0 && replace)
3786 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3788 int opno = recog_dup_num[i];
3789 *recog_dup_loc[i] = *recog_operand_loc[opno];
3790 if (operand_reloadnum[opno] >= 0)
3791 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3792 insn_operand_mode[insn_code_number][opno]);
3796 /* This loses because reloading of prior insns can invalidate the equivalence
3797 (or at least find_equiv_reg isn't smart enough to find it any more),
3798 causing this insn to need more reload regs than it needed before.
3799 It may be too late to make the reload regs available.
3800 Now this optimization is done safely in choose_reload_regs. */
3802 /* For each reload of a reg into some other class of reg,
3803 search for an existing equivalent reg (same value now) in the right class.
3804 We can use it as long as we don't need to change its contents. */
3805 for (i = 0; i < n_reloads; i++)
3806 if (reload_reg_rtx[i] == 0
3807 && reload_in[i] != 0
3808 && GET_CODE (reload_in[i]) == REG
3809 && reload_out[i] == 0)
3812 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3813 static_reload_reg_p, 0, reload_inmode[i]);
3814 /* Prevent generation of insn to load the value
3815 because the one we found already has the value. */
3816 if (reload_reg_rtx[i])
3817 reload_in[i] = reload_reg_rtx[i];
3821 /* Perhaps an output reload can be combined with another
3822 to reduce needs by one. */
3823 if (!goal_earlyclobber)
3826 /* If we have a pair of reloads for parts of an address, they are reloading
3827 the same object, the operands themselves were not reloaded, and they
3828 are for two operands that are supposed to match, merge the reloads and
3829 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3831 for (i = 0; i < n_reloads; i++)
3835 for (j = i + 1; j < n_reloads; j++)
3836 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3837 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3838 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3839 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3840 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
3841 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS
3842 || reload_when_needed[j] == RELOAD_FOR_INPADDR_ADDRESS
3843 || reload_when_needed[j] == RELOAD_FOR_OUTADDR_ADDRESS)
3844 && rtx_equal_p (reload_in[i], reload_in[j])
3845 && (operand_reloadnum[reload_opnum[i]] < 0
3846 || reload_optional[operand_reloadnum[reload_opnum[i]]])
3847 && (operand_reloadnum[reload_opnum[j]] < 0
3848 || reload_optional[operand_reloadnum[reload_opnum[j]]])
3849 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
3850 || (goal_alternative_matches[reload_opnum[j]]
3851 == reload_opnum[i])))
3853 for (k = 0; k < n_replacements; k++)
3854 if (replacements[k].what == j)
3855 replacements[k].what = i;
3857 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3858 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3859 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
3861 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3866 /* Scan all the reloads and update their type.
3867 If a reload is for the address of an operand and we didn't reload
3868 that operand, change the type. Similarly, change the operand number
3869 of a reload when two operands match. If a reload is optional, treat it
3870 as though the operand isn't reloaded.
3872 ??? This latter case is somewhat odd because if we do the optional
3873 reload, it means the object is hanging around. Thus we need only
3874 do the address reload if the optional reload was NOT done.
3876 Change secondary reloads to be the address type of their operand, not
3879 If an operand's reload is now RELOAD_OTHER, change any
3880 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3881 RELOAD_FOR_OTHER_ADDRESS. */
3883 for (i = 0; i < n_reloads; i++)
3885 if (reload_secondary_p[i]
3886 && reload_when_needed[i] == operand_type[reload_opnum[i]])
3887 reload_when_needed[i] = address_type[reload_opnum[i]];
3889 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3890 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3891 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3892 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3893 && (operand_reloadnum[reload_opnum[i]] < 0
3894 || reload_optional[operand_reloadnum[reload_opnum[i]]]))
3896 /* If we have a secondary reload to go along with this reload,
3897 change its type to RELOAD_FOR_OPADDR_ADDR. */
3899 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3900 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
3901 && reload_secondary_in_reload[i] != -1)
3903 int secondary_in_reload = reload_secondary_in_reload[i];
3905 reload_when_needed[secondary_in_reload]
3906 = RELOAD_FOR_OPADDR_ADDR;
3908 /* If there's a tertiary reload we have to change it also. */
3909 if (secondary_in_reload > 0
3910 && reload_secondary_in_reload[secondary_in_reload] != -1)
3911 reload_when_needed[reload_secondary_in_reload[secondary_in_reload]]
3912 = RELOAD_FOR_OPADDR_ADDR;
3915 if ((reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3916 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3917 && reload_secondary_out_reload[i] != -1)
3919 int secondary_out_reload = reload_secondary_out_reload[i];
3921 reload_when_needed[secondary_out_reload]
3922 = RELOAD_FOR_OPADDR_ADDR;
3924 /* If there's a tertiary reload we have to change it also. */
3925 if (secondary_out_reload
3926 && reload_secondary_out_reload[secondary_out_reload] != -1)
3927 reload_when_needed[reload_secondary_out_reload[secondary_out_reload]]
3928 = RELOAD_FOR_OPADDR_ADDR;
3931 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3934 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3935 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
3936 && operand_reloadnum[reload_opnum[i]] >= 0
3937 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
3939 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
3941 if (goal_alternative_matches[reload_opnum[i]] >= 0)
3942 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
3945 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
3946 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
3947 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
3949 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
3950 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
3951 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
3952 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
3953 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
3954 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
3955 This is complicated by the fact that a single operand can have more
3956 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
3957 choose_reload_regs without affecting code quality, and cases that
3958 actually fail are extremely rare, so it turns out to be better to fix
3959 the problem here by not generating cases that choose_reload_regs will
3963 int op_addr_reloads = 0;
3964 for (i = 0; i < n_reloads; i++)
3965 if (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS)
3968 if (op_addr_reloads > 1)
3969 for (i = 0; i < n_reloads; i++)
3970 if (reload_when_needed[i] == RELOAD_FOR_OPADDR_ADDR)
3971 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3974 /* See if we have any reloads that are now allowed to be merged
3975 because we've changed when the reload is needed to
3976 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3977 check for the most common cases. */
3979 for (i = 0; i < n_reloads; i++)
3980 if (reload_in[i] != 0 && reload_out[i] == 0
3981 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
3982 || reload_when_needed[i] == RELOAD_FOR_OPADDR_ADDR
3983 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
3984 for (j = 0; j < n_reloads; j++)
3985 if (i != j && reload_in[j] != 0 && reload_out[j] == 0
3986 && reload_when_needed[j] == reload_when_needed[i]
3987 && MATCHES (reload_in[i], reload_in[j])
3988 && reload_reg_class[i] == reload_reg_class[j]
3989 && !reload_nocombine[i] && !reload_nocombine[j]
3990 && reload_reg_rtx[i] == reload_reg_rtx[j])
3992 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
3993 transfer_replacements (i, j);
3997 /* Set which reloads must use registers not used in any group. Start
3998 with those that conflict with a group and then include ones that
3999 conflict with ones that are already known to conflict with a group. */
4002 for (i = 0; i < n_reloads; i++)
4004 enum machine_mode mode = reload_inmode[i];
4005 enum reg_class class = reload_reg_class[i];
4008 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode))
4009 mode = reload_outmode[i];
4010 size = CLASS_MAX_NREGS (class, mode);
4013 for (j = 0; j < n_reloads; j++)
4014 if ((CLASS_MAX_NREGS (reload_reg_class[j],
4015 (GET_MODE_SIZE (reload_outmode[j])
4016 > GET_MODE_SIZE (reload_inmode[j]))
4017 ? reload_outmode[j] : reload_inmode[j])
4019 && !reload_optional[j]
4020 && (reload_in[j] != 0 || reload_out[j] != 0
4021 || reload_secondary_p[j])
4022 && reloads_conflict (i, j)
4023 && reg_classes_intersect_p (class, reload_reg_class[j]))
4025 reload_nongroup[i] = 1;
4035 for (i = 0; i < n_reloads; i++)
4037 enum machine_mode mode = reload_inmode[i];
4038 enum reg_class class = reload_reg_class[i];
4041 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode))
4042 mode = reload_outmode[i];
4043 size = CLASS_MAX_NREGS (class, mode);
4045 if (! reload_nongroup[i] && size == 1)
4046 for (j = 0; j < n_reloads; j++)
4047 if (reload_nongroup[j]
4048 && reloads_conflict (i, j)
4049 && reg_classes_intersect_p (class, reload_reg_class[j]))
4051 reload_nongroup[i] = 1;
4058 #else /* no REGISTER_CONSTRAINTS */
4060 int insn_code_number;
4061 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
4063 rtx body = PATTERN (insn);
4067 n_earlyclobbers = 0;
4068 replace_reloads = replace;
4071 /* Find what kind of insn this is. NOPERANDS gets number of operands.
4072 Store the operand values in RECOG_OPERAND and the locations
4073 of the words in the insn that point to them in RECOG_OPERAND_LOC.
4074 Return if the insn needs no reload processing. */
4076 switch (GET_CODE (body))
4087 noperands = asm_noperands (body);
4090 /* This insn is an `asm' with operands.
4091 First, find out how many operands, and allocate space. */
4093 insn_code_number = -1;
4094 /* ??? This is a bug! ???
4095 Give up and delete this insn if it has too many operands. */
4096 if (noperands > MAX_RECOG_OPERANDS)
4099 /* Now get the operand values out of the insn. */
4101 decode_asm_operands (body, recog_operand, recog_operand_loc,
4102 NULL_PTR, NULL_PTR);
4107 /* Ordinary insn: recognize it, allocate space for operands and
4108 constraints, and get them out via insn_extract. */
4110 insn_code_number = recog_memoized (insn);
4111 noperands = insn_n_operands[insn_code_number];
4112 insn_extract (insn);
4118 for (i = 0; i < noperands; i++)
4120 register RTX_CODE code = GET_CODE (recog_operand[i]);
4121 int is_set_dest = GET_CODE (body) == SET && (i == 0);
4123 if (insn_code_number >= 0)
4124 if (insn_operand_address_p[insn_code_number][i])
4125 find_reloads_address (VOIDmode, NULL_PTR,
4126 recog_operand[i], recog_operand_loc[i],
4127 i, RELOAD_FOR_INPUT, ind_levels, insn);
4129 /* In these cases, we can't tell if the operand is an input
4130 or an output, so be conservative. In practice it won't be
4134 find_reloads_address (GET_MODE (recog_operand[i]),
4135 recog_operand_loc[i],
4136 XEXP (recog_operand[i], 0),
4137 &XEXP (recog_operand[i], 0),
4138 i, RELOAD_OTHER, ind_levels, insn);
4140 recog_operand[i] = *recog_operand_loc[i]
4141 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
4142 ind_levels, is_set_dest);
4145 register int regno = REGNO (recog_operand[i]);
4146 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4147 recog_operand[i] = *recog_operand_loc[i]
4148 = reg_equiv_constant[regno];
4149 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4150 that feeds this insn. */
4151 if (reg_equiv_mem[regno] != 0)
4152 recog_operand[i] = *recog_operand_loc[i]
4153 = reg_equiv_mem[regno];
4158 /* Perhaps an output reload can be combined with another
4159 to reduce needs by one. */
4160 if (!goal_earlyclobber)
4162 #endif /* no REGISTER_CONSTRAINTS */
4165 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4166 accepts a memory operand with constant address. */
4169 alternative_allows_memconst (constraint, altnum)
4174 /* Skip alternatives before the one requested. */
4177 while (*constraint++ != ',');
4180 /* Scan the requested alternative for 'm' or 'o'.
4181 If one of them is present, this alternative accepts memory constants. */
4182 while ((c = *constraint++) && c != ',' && c != '#')
4183 if (c == 'm' || c == 'o')
4188 /* Scan X for memory references and scan the addresses for reloading.
4189 Also checks for references to "constant" regs that we want to eliminate
4190 and replaces them with the values they stand for.
4191 We may alter X destructively if it contains a reference to such.
4192 If X is just a constant reg, we return the equivalent value
4195 IND_LEVELS says how many levels of indirect addressing this machine
4198 OPNUM and TYPE identify the purpose of the reload.
4200 IS_SET_DEST is true if X is the destination of a SET, which is not
4201 appropriate to be replaced by a constant. */
4204 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest)
4207 enum reload_type type;
4211 register RTX_CODE code = GET_CODE (x);
4213 register char *fmt = GET_RTX_FORMAT (code);
4218 /* This code is duplicated for speed in find_reloads. */
4219 register int regno = REGNO (x);
4220 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4221 x = reg_equiv_constant[regno];
4223 /* This creates (subreg (mem...)) which would cause an unnecessary
4224 reload of the mem. */
4225 else if (reg_equiv_mem[regno] != 0)
4226 x = reg_equiv_mem[regno];
4228 else if (reg_equiv_address[regno] != 0)
4230 /* If reg_equiv_address varies, it may be shared, so copy it. */
4231 /* We must rerun eliminate_regs, in case the elimination
4232 offsets have changed. */
4233 rtx addr = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0,
4237 if (rtx_varies_p (addr))
4238 addr = copy_rtx (addr);
4240 x = gen_rtx_MEM (GET_MODE (x), addr);
4241 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4242 find_reloads_address (GET_MODE (x), NULL_PTR,
4244 &XEXP (x, 0), opnum, type, ind_levels, 0);
4251 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4252 opnum, type, ind_levels, 0);
4256 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4258 /* Check for SUBREG containing a REG that's equivalent to a constant.
4259 If the constant has a known value, truncate it right now.
4260 Similarly if we are extracting a single-word of a multi-word
4261 constant. If the constant is symbolic, allow it to be substituted
4262 normally. push_reload will strip the subreg later. If the
4263 constant is VOIDmode, abort because we will lose the mode of
4264 the register (this should never happen because one of the cases
4265 above should handle it). */
4267 register int regno = REGNO (SUBREG_REG (x));
4270 if (subreg_lowpart_p (x)
4271 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4272 && reg_equiv_constant[regno] != 0
4273 && (tem = gen_lowpart_common (GET_MODE (x),
4274 reg_equiv_constant[regno])) != 0)
4277 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
4278 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4279 && reg_equiv_constant[regno] != 0
4280 && (tem = operand_subword (reg_equiv_constant[regno],
4282 GET_MODE (SUBREG_REG (x)))) != 0)
4285 /* If the SUBREG is wider than a word, the above test will fail.
4286 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4287 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4288 a 32 bit target. We still can - and have to - handle this
4289 for non-paradoxical subregs of CONST_INTs. */
4290 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4291 && reg_equiv_constant[regno] != 0
4292 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT
4293 && (GET_MODE_SIZE (GET_MODE (x))
4294 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
4296 int shift = SUBREG_WORD (x) * BITS_PER_WORD;
4297 if (WORDS_BIG_ENDIAN)
4298 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
4299 - GET_MODE_BITSIZE (GET_MODE (x))
4301 /* Here we use the knowledge that CONST_INTs have a
4302 HOST_WIDE_INT field. */
4303 if (shift >= HOST_BITS_PER_WIDE_INT)
4304 shift = HOST_BITS_PER_WIDE_INT - 1;
4305 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift);
4308 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4309 && reg_equiv_constant[regno] != 0
4310 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
4313 /* If the subreg contains a reg that will be converted to a mem,
4314 convert the subreg to a narrower memref now.
4315 Otherwise, we would get (subreg (mem ...) ...),
4316 which would force reload of the mem.
4318 We also need to do this if there is an equivalent MEM that is
4319 not offsettable. In that case, alter_subreg would produce an
4320 invalid address on big-endian machines.
4322 For machines that extend byte loads, we must not reload using
4323 a wider mode if we have a paradoxical SUBREG. find_reloads will
4324 force a reload in that case. So we should not do anything here. */
4326 else if (regno >= FIRST_PSEUDO_REGISTER
4327 #ifdef LOAD_EXTEND_OP
4328 && (GET_MODE_SIZE (GET_MODE (x))
4329 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4331 && (reg_equiv_address[regno] != 0
4332 || (reg_equiv_mem[regno] != 0
4333 && (! strict_memory_address_p (GET_MODE (x),
4334 XEXP (reg_equiv_mem[regno], 0))
4335 || ! offsettable_memref_p (reg_equiv_mem[regno])))))
4337 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
4338 /* We must rerun eliminate_regs, in case the elimination
4339 offsets have changed. */
4340 rtx addr = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0,
4343 if (BYTES_BIG_ENDIAN)
4346 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
4347 offset += MIN (size, UNITS_PER_WORD);
4348 size = GET_MODE_SIZE (GET_MODE (x));
4349 offset -= MIN (size, UNITS_PER_WORD);
4351 addr = plus_constant (addr, offset);
4352 x = gen_rtx_MEM (GET_MODE (x), addr);
4353 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4354 find_reloads_address (GET_MODE (x), NULL_PTR,
4356 &XEXP (x, 0), opnum, type, ind_levels, 0);
4361 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4364 XEXP (x, i) = find_reloads_toplev (XEXP (x, i), opnum, type,
4365 ind_levels, is_set_dest);
4370 /* Return a mem ref for the memory equivalent of reg REGNO.
4371 This mem ref is not shared with anything. */
4374 make_memloc (ad, regno)
4381 /* We must rerun eliminate_regs, in case the elimination
4382 offsets have changed. */
4383 rtx tem = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4385 #if 0 /* We cannot safely reuse a memloc made here;
4386 if the pseudo appears twice, and its mem needs a reload,
4387 it gets two separate reloads assigned, but it only
4388 gets substituted with the second of them;
4389 then it can get used before that reload reg gets loaded up. */
4390 for (i = 0; i < n_memlocs; i++)
4391 if (rtx_equal_p (tem, XEXP (memlocs[i], 0)))
4395 /* If TEM might contain a pseudo, we must copy it to avoid
4396 modifying it when we do the substitution for the reload. */
4397 if (rtx_varies_p (tem))
4398 tem = copy_rtx (tem);
4400 tem = gen_rtx_MEM (GET_MODE (ad), tem);
4401 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4402 memlocs[n_memlocs++] = tem;
4406 /* Record all reloads needed for handling memory address AD
4407 which appears in *LOC in a memory reference to mode MODE
4408 which itself is found in location *MEMREFLOC.
4409 Note that we take shortcuts assuming that no multi-reg machine mode
4410 occurs as part of an address.
4412 OPNUM and TYPE specify the purpose of this reload.
4414 IND_LEVELS says how many levels of indirect addressing this machine
4417 INSN, if nonzero, is the insn in which we do the reload. It is used
4418 to determine if we may generate output reloads.
4420 Value is nonzero if this address is reloaded or replaced as a whole.
4421 This is interesting to the caller if the address is an autoincrement.
4423 Note that there is no verification that the address will be valid after
4424 this routine does its work. Instead, we rely on the fact that the address
4425 was valid when reload started. So we need only undo things that reload
4426 could have broken. These are wrong register types, pseudos not allocated
4427 to a hard register, and frame pointer elimination. */
4430 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn)
4431 enum machine_mode mode;
4436 enum reload_type type;
4443 /* If the address is a register, see if it is a legitimate address and
4444 reload if not. We first handle the cases where we need not reload
4445 or where we must reload in a non-standard way. */
4447 if (GET_CODE (ad) == REG)
4451 if (reg_equiv_constant[regno] != 0
4452 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
4454 *loc = ad = reg_equiv_constant[regno];
4458 else if (reg_equiv_address[regno] != 0)
4460 tem = make_memloc (ad, regno);
4461 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
4462 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
4464 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4465 reload_address_base_reg_class,
4466 GET_MODE (ad), VOIDmode, 0, 0,
4471 /* We can avoid a reload if the register's equivalent memory expression
4472 is valid as an indirect memory address.
4473 But not all addresses are valid in a mem used as an indirect address:
4474 only reg or reg+constant. */
4476 else if (reg_equiv_mem[regno] != 0 && ind_levels > 0
4477 && strict_memory_address_p (mode, reg_equiv_mem[regno])
4478 && (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == REG
4479 || (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == PLUS
4480 && GET_CODE (XEXP (XEXP (reg_equiv_mem[regno], 0), 0)) == REG
4481 && CONSTANT_P (XEXP (XEXP (reg_equiv_mem[regno], 0), 1)))))
4484 /* The only remaining case where we can avoid a reload is if this is a
4485 hard register that is valid as a base register and which is not the
4486 subject of a CLOBBER in this insn. */
4488 else if (regno < FIRST_PSEUDO_REGISTER
4489 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4490 && ! regno_clobbered_p (regno, this_insn))
4493 /* If we do not have one of the cases above, we must do the reload. */
4494 push_reload (ad, NULL_RTX, loc, NULL_PTR, reload_address_base_reg_class,
4495 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4499 if (strict_memory_address_p (mode, ad))
4501 /* The address appears valid, so reloads are not needed.
4502 But the address may contain an eliminable register.
4503 This can happen because a machine with indirect addressing
4504 may consider a pseudo register by itself a valid address even when
4505 it has failed to get a hard reg.
4506 So do a tree-walk to find and eliminate all such regs. */
4508 /* But first quickly dispose of a common case. */
4509 if (GET_CODE (ad) == PLUS
4510 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4511 && GET_CODE (XEXP (ad, 0)) == REG
4512 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4515 subst_reg_equivs_changed = 0;
4516 *loc = subst_reg_equivs (ad);
4518 if (! subst_reg_equivs_changed)
4521 /* Check result for validity after substitution. */
4522 if (strict_memory_address_p (mode, ad))
4526 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4531 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4536 *memrefloc = copy_rtx (*memrefloc);
4537 XEXP (*memrefloc, 0) = ad;
4538 move_replacements (&ad, &XEXP (*memrefloc, 0));
4544 /* The address is not valid. We have to figure out why. One possibility
4545 is that it is itself a MEM. This can happen when the frame pointer is
4546 being eliminated, a pseudo is not allocated to a hard register, and the
4547 offset between the frame and stack pointers is not its initial value.
4548 In that case the pseudo will have been replaced by a MEM referring to
4549 the stack pointer. */
4550 if (GET_CODE (ad) == MEM)
4552 /* First ensure that the address in this MEM is valid. Then, unless
4553 indirect addresses are valid, reload the MEM into a register. */
4555 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4556 opnum, ADDR_TYPE (type),
4557 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4559 /* If tem was changed, then we must create a new memory reference to
4560 hold it and store it back into memrefloc. */
4561 if (tem != ad && memrefloc)
4563 *memrefloc = copy_rtx (*memrefloc);
4564 copy_replacements (tem, XEXP (*memrefloc, 0));
4565 loc = &XEXP (*memrefloc, 0);
4568 /* Check similar cases as for indirect addresses as above except
4569 that we can allow pseudos and a MEM since they should have been
4570 taken care of above. */
4573 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4574 || GET_CODE (XEXP (tem, 0)) == MEM
4575 || ! (GET_CODE (XEXP (tem, 0)) == REG
4576 || (GET_CODE (XEXP (tem, 0)) == PLUS
4577 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4578 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4580 /* Must use TEM here, not AD, since it is the one that will
4581 have any subexpressions reloaded, if needed. */
4582 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4583 reload_address_base_reg_class, GET_MODE (tem),
4592 /* If we have address of a stack slot but it's not valid because the
4593 displacement is too large, compute the sum in a register.
4594 Handle all base registers here, not just fp/ap/sp, because on some
4595 targets (namely SH) we can also get too large displacements from
4596 big-endian corrections. */
4597 else if (GET_CODE (ad) == PLUS
4598 && GET_CODE (XEXP (ad, 0)) == REG
4599 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4600 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4601 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4603 /* Unshare the MEM rtx so we can safely alter it. */
4606 *memrefloc = copy_rtx (*memrefloc);
4607 loc = &XEXP (*memrefloc, 0);
4609 if (double_reg_address_ok)
4611 /* Unshare the sum as well. */
4612 *loc = ad = copy_rtx (ad);
4613 /* Reload the displacement into an index reg.
4614 We assume the frame pointer or arg pointer is a base reg. */
4615 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4616 reload_address_index_reg_class,
4617 GET_MODE (ad), opnum, type, ind_levels);
4621 /* If the sum of two regs is not necessarily valid,
4622 reload the sum into a base reg.
4623 That will at least work. */
4624 find_reloads_address_part (ad, loc, reload_address_base_reg_class,
4625 Pmode, opnum, type, ind_levels);
4630 /* If we have an indexed stack slot, there are three possible reasons why
4631 it might be invalid: The index might need to be reloaded, the address
4632 might have been made by frame pointer elimination and hence have a
4633 constant out of range, or both reasons might apply.
4635 We can easily check for an index needing reload, but even if that is the
4636 case, we might also have an invalid constant. To avoid making the
4637 conservative assumption and requiring two reloads, we see if this address
4638 is valid when not interpreted strictly. If it is, the only problem is
4639 that the index needs a reload and find_reloads_address_1 will take care
4642 There is still a case when we might generate an extra reload,
4643 however. In certain cases eliminate_regs will return a MEM for a REG
4644 (see the code there for details). In those cases, memory_address_p
4645 applied to our address will return 0 so we will think that our offset
4646 must be too large. But it might indeed be valid and the only problem
4647 is that a MEM is present where a REG should be. This case should be
4648 very rare and there doesn't seem to be any way to avoid it.
4650 If we decide to do something here, it must be that
4651 `double_reg_address_ok' is true and that this address rtl was made by
4652 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4653 rework the sum so that the reload register will be added to the index.
4654 This is safe because we know the address isn't shared.
4656 We check for fp/ap/sp as both the first and second operand of the
4659 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4660 && GET_CODE (XEXP (ad, 0)) == PLUS
4661 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4662 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4663 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4665 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4666 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4668 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4669 && ! memory_address_p (mode, ad))
4671 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4672 plus_constant (XEXP (XEXP (ad, 0), 0),
4673 INTVAL (XEXP (ad, 1))),
4674 XEXP (XEXP (ad, 0), 1));
4675 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0),
4676 reload_address_base_reg_class,
4677 GET_MODE (ad), opnum, type, ind_levels);
4678 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4684 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4685 && GET_CODE (XEXP (ad, 0)) == PLUS
4686 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4687 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4688 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4690 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4691 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4693 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4694 && ! memory_address_p (mode, ad))
4696 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4697 XEXP (XEXP (ad, 0), 0),
4698 plus_constant (XEXP (XEXP (ad, 0), 1),
4699 INTVAL (XEXP (ad, 1))));
4700 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4701 reload_address_base_reg_class,
4702 GET_MODE (ad), opnum, type, ind_levels);
4703 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4709 /* See if address becomes valid when an eliminable register
4710 in a sum is replaced. */
4713 if (GET_CODE (ad) == PLUS)
4714 tem = subst_indexed_address (ad);
4715 if (tem != ad && strict_memory_address_p (mode, tem))
4717 /* Ok, we win that way. Replace any additional eliminable
4720 subst_reg_equivs_changed = 0;
4721 tem = subst_reg_equivs (tem);
4723 /* Make sure that didn't make the address invalid again. */
4725 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4732 /* If constants aren't valid addresses, reload the constant address
4734 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4736 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4737 Unshare it so we can safely alter it. */
4738 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4739 && CONSTANT_POOL_ADDRESS_P (ad))
4741 *memrefloc = copy_rtx (*memrefloc);
4742 loc = &XEXP (*memrefloc, 0);
4745 find_reloads_address_part (ad, loc, reload_address_base_reg_class,
4751 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
4755 /* Find all pseudo regs appearing in AD
4756 that are eliminable in favor of equivalent values
4757 and do not have hard regs; replace them by their equivalents. */
4760 subst_reg_equivs (ad)
4763 register RTX_CODE code = GET_CODE (ad);
4781 register int regno = REGNO (ad);
4783 if (reg_equiv_constant[regno] != 0)
4785 subst_reg_equivs_changed = 1;
4786 return reg_equiv_constant[regno];
4792 /* Quickly dispose of a common case. */
4793 if (XEXP (ad, 0) == frame_pointer_rtx
4794 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4802 fmt = GET_RTX_FORMAT (code);
4803 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4805 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i));
4809 /* Compute the sum of X and Y, making canonicalizations assumed in an
4810 address, namely: sum constant integers, surround the sum of two
4811 constants with a CONST, put the constant as the second operand, and
4812 group the constant on the outermost sum.
4814 This routine assumes both inputs are already in canonical form. */
4821 enum machine_mode mode = GET_MODE (x);
4823 if (mode == VOIDmode)
4824 mode = GET_MODE (y);
4826 if (mode == VOIDmode)
4829 if (GET_CODE (x) == CONST_INT)
4830 return plus_constant (y, INTVAL (x));
4831 else if (GET_CODE (y) == CONST_INT)
4832 return plus_constant (x, INTVAL (y));
4833 else if (CONSTANT_P (x))
4834 tem = x, x = y, y = tem;
4836 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
4837 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
4839 /* Note that if the operands of Y are specified in the opposite
4840 order in the recursive calls below, infinite recursion will occur. */
4841 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
4842 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
4844 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4845 constant will have been placed second. */
4846 if (CONSTANT_P (x) && CONSTANT_P (y))
4848 if (GET_CODE (x) == CONST)
4850 if (GET_CODE (y) == CONST)
4853 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
4856 return gen_rtx_PLUS (mode, x, y);
4859 /* If ADDR is a sum containing a pseudo register that should be
4860 replaced with a constant (from reg_equiv_constant),
4861 return the result of doing so, and also apply the associative
4862 law so that the result is more likely to be a valid address.
4863 (But it is not guaranteed to be one.)
4865 Note that at most one register is replaced, even if more are
4866 replaceable. Also, we try to put the result into a canonical form
4867 so it is more likely to be a valid address.
4869 In all other cases, return ADDR. */
4872 subst_indexed_address (addr)
4875 rtx op0 = 0, op1 = 0, op2 = 0;
4879 if (GET_CODE (addr) == PLUS)
4881 /* Try to find a register to replace. */
4882 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
4883 if (GET_CODE (op0) == REG
4884 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
4885 && reg_renumber[regno] < 0
4886 && reg_equiv_constant[regno] != 0)
4887 op0 = reg_equiv_constant[regno];
4888 else if (GET_CODE (op1) == REG
4889 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
4890 && reg_renumber[regno] < 0
4891 && reg_equiv_constant[regno] != 0)
4892 op1 = reg_equiv_constant[regno];
4893 else if (GET_CODE (op0) == PLUS
4894 && (tem = subst_indexed_address (op0)) != op0)
4896 else if (GET_CODE (op1) == PLUS
4897 && (tem = subst_indexed_address (op1)) != op1)
4902 /* Pick out up to three things to add. */
4903 if (GET_CODE (op1) == PLUS)
4904 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
4905 else if (GET_CODE (op0) == PLUS)
4906 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4908 /* Compute the sum. */
4910 op1 = form_sum (op1, op2);
4912 op0 = form_sum (op0, op1);
4919 /* Record the pseudo registers we must reload into hard registers in a
4920 subexpression of a would-be memory address, X referring to a value
4921 in mode MODE. (This function is not called if the address we find
4924 CONTEXT = 1 means we are considering regs as index regs,
4925 = 0 means we are considering them as base regs.
4927 OPNUM and TYPE specify the purpose of any reloads made.
4929 IND_LEVELS says how many levels of indirect addressing are
4930 supported at this point in the address.
4932 INSN, if nonzero, is the insn in which we do the reload. It is used
4933 to determine if we may generate output reloads.
4935 We return nonzero if X, as a whole, is reloaded or replaced. */
4937 /* Note that we take shortcuts assuming that no multi-reg machine mode
4938 occurs as part of an address.
4939 Also, this is not fully machine-customizable; it works for machines
4940 such as vaxes and 68000's and 32000's, but other possible machines
4941 could have addressing modes that this does not handle right. */
4944 find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
4945 enum machine_mode mode;
4950 enum reload_type type;
4954 register RTX_CODE code = GET_CODE (x);
4960 register rtx orig_op0 = XEXP (x, 0);
4961 register rtx orig_op1 = XEXP (x, 1);
4962 register RTX_CODE code0 = GET_CODE (orig_op0);
4963 register RTX_CODE code1 = GET_CODE (orig_op1);
4964 register rtx op0 = orig_op0;
4965 register rtx op1 = orig_op1;
4967 if (GET_CODE (op0) == SUBREG)
4969 op0 = SUBREG_REG (op0);
4970 code0 = GET_CODE (op0);
4971 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
4972 op0 = gen_rtx_REG (word_mode,
4973 REGNO (op0) + SUBREG_WORD (orig_op0));
4976 if (GET_CODE (op1) == SUBREG)
4978 op1 = SUBREG_REG (op1);
4979 code1 = GET_CODE (op1);
4980 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
4981 op1 = gen_rtx_REG (GET_MODE (op1),
4982 REGNO (op1) + SUBREG_WORD (orig_op1));
4985 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
4986 || code0 == ZERO_EXTEND || code1 == MEM)
4988 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
4989 type, ind_levels, insn);
4990 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
4991 type, ind_levels, insn);
4994 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
4995 || code1 == ZERO_EXTEND || code0 == MEM)
4997 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
4998 type, ind_levels, insn);
4999 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5000 type, ind_levels, insn);
5003 else if (code0 == CONST_INT || code0 == CONST
5004 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5005 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5006 type, ind_levels, insn);
5008 else if (code1 == CONST_INT || code1 == CONST
5009 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5010 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5011 type, ind_levels, insn);
5013 else if (code0 == REG && code1 == REG)
5015 if (REG_OK_FOR_INDEX_P (op0)
5016 && REG_MODE_OK_FOR_BASE_P (op1, mode))
5018 else if (REG_OK_FOR_INDEX_P (op1)
5019 && REG_MODE_OK_FOR_BASE_P (op0, mode))
5021 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5022 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5023 type, ind_levels, insn);
5024 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5025 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5026 type, ind_levels, insn);
5027 else if (REG_OK_FOR_INDEX_P (op1))
5028 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5029 type, ind_levels, insn);
5030 else if (REG_OK_FOR_INDEX_P (op0))
5031 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5032 type, ind_levels, insn);
5035 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5036 type, ind_levels, insn);
5037 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5038 type, ind_levels, insn);
5042 else if (code0 == REG)
5044 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5045 type, ind_levels, insn);
5046 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5047 type, ind_levels, insn);
5050 else if (code1 == REG)
5052 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5053 type, ind_levels, insn);
5054 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5055 type, ind_levels, insn);
5065 if (GET_CODE (XEXP (x, 0)) == REG)
5067 register int regno = REGNO (XEXP (x, 0));
5071 /* A register that is incremented cannot be constant! */
5072 if (regno >= FIRST_PSEUDO_REGISTER
5073 && reg_equiv_constant[regno] != 0)
5076 /* Handle a register that is equivalent to a memory location
5077 which cannot be addressed directly. */
5078 if (reg_equiv_address[regno] != 0)
5080 rtx tem = make_memloc (XEXP (x, 0), regno);
5081 /* First reload the memory location's address.
5082 We can't use ADDR_TYPE (type) here, because we need to
5083 write back the value after reading it, hence we actually
5084 need two registers. */
5085 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
5086 &XEXP (tem, 0), opnum, type,
5088 /* Put this inside a new increment-expression. */
5089 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5090 /* Proceed to reload that, as if it contained a register. */
5093 /* If we have a hard register that is ok as an index,
5094 don't make a reload. If an autoincrement of a nice register
5095 isn't "valid", it must be that no autoincrement is "valid".
5096 If that is true and something made an autoincrement anyway,
5097 this must be a special context where one is allowed.
5098 (For example, a "push" instruction.)
5099 We can't improve this address, so leave it alone. */
5101 /* Otherwise, reload the autoincrement into a suitable hard reg
5102 and record how much to increment by. */
5104 if (reg_renumber[regno] >= 0)
5105 regno = reg_renumber[regno];
5106 if ((regno >= FIRST_PSEUDO_REGISTER
5107 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5108 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5115 /* If we can output the register afterwards, do so, this
5116 saves the extra update.
5117 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5118 CALL_INSN - and it does not set CC0.
5119 But don't do this if we cannot directly address the
5120 memory location, since this will make it harder to
5121 reuse address reloads, and increases register pressure.
5122 Also don't do this if we can probably update x directly. */
5123 rtx equiv = reg_equiv_mem[regno];
5124 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5125 if (insn && GET_CODE (insn) == INSN && equiv
5127 && ! sets_cc0_p (PATTERN (insn))
5129 && ! (icode != CODE_FOR_nothing
5130 && (*insn_operand_predicate[icode][0]) (equiv, Pmode)
5131 && (*insn_operand_predicate[icode][1]) (equiv, Pmode)))
5136 = push_reload (x, x, loc, loc,
5138 ? reload_address_index_reg_class
5139 : reload_address_base_reg_class),
5140 GET_MODE (x), GET_MODE (x), 0, 0,
5141 opnum, RELOAD_OTHER);
5146 = push_reload (x, NULL_RTX, loc, NULL_PTR,
5148 ? reload_address_index_reg_class
5149 : reload_address_base_reg_class),
5150 GET_MODE (x), GET_MODE (x), 0, 0,
5152 reload_inc[reloadnum]
5153 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5159 /* Update the REG_INC notes. */
5161 for (link = REG_NOTES (this_insn);
5162 link; link = XEXP (link, 1))
5163 if (REG_NOTE_KIND (link) == REG_INC
5164 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
5165 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5171 else if (GET_CODE (XEXP (x, 0)) == MEM)
5173 /* This is probably the result of a substitution, by eliminate_regs,
5174 of an equivalent address for a pseudo that was not allocated to a
5175 hard register. Verify that the specified address is valid and
5176 reload it into a register. */
5177 rtx tem = XEXP (x, 0);
5181 /* Since we know we are going to reload this item, don't decrement
5182 for the indirection level.
5184 Note that this is actually conservative: it would be slightly
5185 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5187 /* We can't use ADDR_TYPE (type) here, because we need to
5188 write back the value after reading it, hence we actually
5189 need two registers. */
5190 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5191 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5192 opnum, type, ind_levels, insn);
5194 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
5196 ? reload_address_index_reg_class
5197 : reload_address_base_reg_class),
5198 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5199 reload_inc[reloadnum]
5200 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5202 link = FIND_REG_INC_NOTE (this_insn, tem);
5204 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5211 /* This is probably the result of a substitution, by eliminate_regs, of
5212 an equivalent address for a pseudo that was not allocated to a hard
5213 register. Verify that the specified address is valid and reload it
5216 Since we know we are going to reload this item, don't decrement for
5217 the indirection level.
5219 Note that this is actually conservative: it would be slightly more
5220 efficient to use the value of SPILL_INDIRECT_LEVELS from
5223 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5224 opnum, ADDR_TYPE (type), ind_levels, insn);
5225 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
5226 (context ? reload_address_index_reg_class
5227 : reload_address_base_reg_class),
5228 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5233 register int regno = REGNO (x);
5235 if (reg_equiv_constant[regno] != 0)
5237 find_reloads_address_part (reg_equiv_constant[regno], loc,
5239 ? reload_address_index_reg_class
5240 : reload_address_base_reg_class),
5241 GET_MODE (x), opnum, type, ind_levels);
5245 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5246 that feeds this insn. */
5247 if (reg_equiv_mem[regno] != 0)
5249 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
5251 ? reload_address_index_reg_class
5252 : reload_address_base_reg_class),
5253 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5258 if (reg_equiv_address[regno] != 0)
5260 x = make_memloc (x, regno);
5261 find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0),
5262 opnum, ADDR_TYPE (type), ind_levels, insn);
5265 if (reg_renumber[regno] >= 0)
5266 regno = reg_renumber[regno];
5268 if ((regno >= FIRST_PSEUDO_REGISTER
5269 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5270 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5272 push_reload (x, NULL_RTX, loc, NULL_PTR,
5274 ? reload_address_index_reg_class
5275 : reload_address_base_reg_class),
5276 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5280 /* If a register appearing in an address is the subject of a CLOBBER
5281 in this insn, reload it into some other register to be safe.
5282 The CLOBBER is supposed to make the register unavailable
5283 from before this insn to after it. */
5284 if (regno_clobbered_p (regno, this_insn))
5286 push_reload (x, NULL_RTX, loc, NULL_PTR,
5288 ? reload_address_index_reg_class
5289 : reload_address_base_reg_class),
5290 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5297 if (GET_CODE (SUBREG_REG (x)) == REG)
5299 /* If this is a SUBREG of a hard register and the resulting register
5300 is of the wrong class, reload the whole SUBREG. This avoids
5301 needless copies if SUBREG_REG is multi-word. */
5302 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5304 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5306 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5307 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5309 push_reload (x, NULL_RTX, loc, NULL_PTR,
5311 ? reload_address_index_reg_class
5312 : reload_address_base_reg_class),
5313 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5317 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5318 is larger than the class size, then reload the whole SUBREG. */
5321 enum reg_class class = (context
5322 ? reload_address_index_reg_class
5323 : reload_address_base_reg_class);
5324 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5325 > reg_class_size[class])
5327 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5328 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5340 register char *fmt = GET_RTX_FORMAT (code);
5343 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5346 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5347 opnum, type, ind_levels, insn);
5354 /* X, which is found at *LOC, is a part of an address that needs to be
5355 reloaded into a register of class CLASS. If X is a constant, or if
5356 X is a PLUS that contains a constant, check that the constant is a
5357 legitimate operand and that we are supposed to be able to load
5358 it into the register.
5360 If not, force the constant into memory and reload the MEM instead.
5362 MODE is the mode to use, in case X is an integer constant.
5364 OPNUM and TYPE describe the purpose of any reloads made.
5366 IND_LEVELS says how many levels of indirect addressing this machine
5370 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
5373 enum reg_class class;
5374 enum machine_mode mode;
5376 enum reload_type type;
5380 && (! LEGITIMATE_CONSTANT_P (x)
5381 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5383 rtx tem = x = force_const_mem (mode, x);
5384 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5385 opnum, type, ind_levels, 0);
5388 else if (GET_CODE (x) == PLUS
5389 && CONSTANT_P (XEXP (x, 1))
5390 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5391 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5393 rtx tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5395 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5396 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5397 opnum, type, ind_levels, 0);
5400 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5401 mode, VOIDmode, 0, 0, opnum, type);
5404 /* Substitute into the current INSN the registers into which we have reloaded
5405 the things that need reloading. The array `replacements'
5406 says contains the locations of all pointers that must be changed
5407 and says what to replace them with.
5409 Return the rtx that X translates into; usually X, but modified. */
5416 for (i = 0; i < n_replacements; i++)
5418 register struct replacement *r = &replacements[i];
5419 register rtx reloadreg = reload_reg_rtx[r->what];
5422 /* Encapsulate RELOADREG so its machine mode matches what
5423 used to be there. Note that gen_lowpart_common will
5424 do the wrong thing if RELOADREG is multi-word. RELOADREG
5425 will always be a REG here. */
5426 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5427 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5429 /* If we are putting this into a SUBREG and RELOADREG is a
5430 SUBREG, we would be making nested SUBREGs, so we have to fix
5431 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5433 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5435 if (GET_MODE (*r->subreg_loc)
5436 == GET_MODE (SUBREG_REG (reloadreg)))
5437 *r->subreg_loc = SUBREG_REG (reloadreg);
5440 *r->where = SUBREG_REG (reloadreg);
5441 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
5445 *r->where = reloadreg;
5447 /* If reload got no reg and isn't optional, something's wrong. */
5448 else if (! reload_optional[r->what])
5453 /* Make a copy of any replacements being done into X and move those copies
5454 to locations in Y, a copy of X. We only look at the highest level of
5458 copy_replacements (x, y)
5463 enum rtx_code code = GET_CODE (x);
5464 char *fmt = GET_RTX_FORMAT (code);
5465 struct replacement *r;
5467 /* We can't support X being a SUBREG because we might then need to know its
5468 location if something inside it was replaced. */
5472 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5474 for (j = 0; j < n_replacements; j++)
5476 if (replacements[j].subreg_loc == &XEXP (x, i))
5478 r = &replacements[n_replacements++];
5479 r->where = replacements[j].where;
5480 r->subreg_loc = &XEXP (y, i);
5481 r->what = replacements[j].what;
5482 r->mode = replacements[j].mode;
5484 else if (replacements[j].where == &XEXP (x, i))
5486 r = &replacements[n_replacements++];
5487 r->where = &XEXP (y, i);
5489 r->what = replacements[j].what;
5490 r->mode = replacements[j].mode;
5495 /* Change any replacements being done to *X to be done to *Y */
5498 move_replacements (x, y)
5504 for (i = 0; i < n_replacements; i++)
5505 if (replacements[i].subreg_loc == x)
5506 replacements[i].subreg_loc = y;
5507 else if (replacements[i].where == x)
5509 replacements[i].where = y;
5510 replacements[i].subreg_loc = 0;
5514 /* If LOC was scheduled to be replaced by something, return the replacement.
5515 Otherwise, return *LOC. */
5518 find_replacement (loc)
5521 struct replacement *r;
5523 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
5525 rtx reloadreg = reload_reg_rtx[r->what];
5527 if (reloadreg && r->where == loc)
5529 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
5530 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5534 else if (reloadreg && r->subreg_loc == loc)
5536 /* RELOADREG must be either a REG or a SUBREG.
5538 ??? Is it actually still ever a SUBREG? If so, why? */
5540 if (GET_CODE (reloadreg) == REG)
5541 return gen_rtx_REG (GET_MODE (*loc),
5542 REGNO (reloadreg) + SUBREG_WORD (*loc));
5543 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
5546 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
5547 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
5551 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5552 what's inside and make a new rtl if so. */
5553 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
5554 || GET_CODE (*loc) == MULT)
5556 rtx x = find_replacement (&XEXP (*loc, 0));
5557 rtx y = find_replacement (&XEXP (*loc, 1));
5559 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
5560 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
5566 /* Return nonzero if register in range [REGNO, ENDREGNO)
5567 appears either explicitly or implicitly in X
5568 other than being stored into (except for earlyclobber operands).
5570 References contained within the substructure at LOC do not count.
5571 LOC may be zero, meaning don't ignore anything.
5573 This is similar to refers_to_regno_p in rtlanal.c except that we
5574 look at equivalences for pseudos that didn't get hard registers. */
5577 refers_to_regno_for_reload_p (regno, endregno, x, loc)
5578 int regno, endregno;
5583 register RTX_CODE code;
5590 code = GET_CODE (x);
5597 /* If this is a pseudo, a hard register must not have been allocated.
5598 X must therefore either be a constant or be in memory. */
5599 if (i >= FIRST_PSEUDO_REGISTER)
5601 if (reg_equiv_memory_loc[i])
5602 return refers_to_regno_for_reload_p (regno, endregno,
5603 reg_equiv_memory_loc[i],
5606 if (reg_equiv_constant[i])
5612 return (endregno > i
5613 && regno < i + (i < FIRST_PSEUDO_REGISTER
5614 ? HARD_REGNO_NREGS (i, GET_MODE (x))
5618 /* If this is a SUBREG of a hard reg, we can see exactly which
5619 registers are being modified. Otherwise, handle normally. */
5620 if (GET_CODE (SUBREG_REG (x)) == REG
5621 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5623 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5625 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
5626 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5628 return endregno > inner_regno && regno < inner_endregno;
5634 if (&SET_DEST (x) != loc
5635 /* Note setting a SUBREG counts as referring to the REG it is in for
5636 a pseudo but not for hard registers since we can
5637 treat each word individually. */
5638 && ((GET_CODE (SET_DEST (x)) == SUBREG
5639 && loc != &SUBREG_REG (SET_DEST (x))
5640 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
5641 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
5642 && refers_to_regno_for_reload_p (regno, endregno,
5643 SUBREG_REG (SET_DEST (x)),
5645 /* If the output is an earlyclobber operand, this is
5647 || ((GET_CODE (SET_DEST (x)) != REG
5648 || earlyclobber_operand_p (SET_DEST (x)))
5649 && refers_to_regno_for_reload_p (regno, endregno,
5650 SET_DEST (x), loc))))
5653 if (code == CLOBBER || loc == &SET_SRC (x))
5662 /* X does not match, so try its subexpressions. */
5664 fmt = GET_RTX_FORMAT (code);
5665 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5667 if (fmt[i] == 'e' && loc != &XEXP (x, i))
5675 if (refers_to_regno_for_reload_p (regno, endregno,
5679 else if (fmt[i] == 'E')
5682 for (j = XVECLEN (x, i) - 1; j >=0; j--)
5683 if (loc != &XVECEXP (x, i, j)
5684 && refers_to_regno_for_reload_p (regno, endregno,
5685 XVECEXP (x, i, j), loc))
5692 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5693 we check if any register number in X conflicts with the relevant register
5694 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5695 contains a MEM (we don't bother checking for memory addresses that can't
5696 conflict because we expect this to be a rare case.
5698 This function is similar to reg_overlap_mention_p in rtlanal.c except
5699 that we look at equivalences for pseudos that didn't get hard registers. */
5702 reg_overlap_mentioned_for_reload_p (x, in)
5705 int regno, endregno;
5707 if (GET_CODE (x) == SUBREG)
5709 regno = REGNO (SUBREG_REG (x));
5710 if (regno < FIRST_PSEUDO_REGISTER)
5711 regno += SUBREG_WORD (x);
5713 else if (GET_CODE (x) == REG)
5717 /* If this is a pseudo, it must not have been assigned a hard register.
5718 Therefore, it must either be in memory or be a constant. */
5720 if (regno >= FIRST_PSEUDO_REGISTER)
5722 if (reg_equiv_memory_loc[regno])
5723 return refers_to_mem_for_reload_p (in);
5724 else if (reg_equiv_constant[regno])
5729 else if (CONSTANT_P (x))
5731 else if (GET_CODE (x) == MEM)
5732 return refers_to_mem_for_reload_p (in);
5733 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
5734 || GET_CODE (x) == CC0)
5735 return reg_mentioned_p (x, in);
5739 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
5740 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5742 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
5745 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5749 refers_to_mem_for_reload_p (x)
5755 if (GET_CODE (x) == MEM)
5758 if (GET_CODE (x) == REG)
5759 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
5760 && reg_equiv_memory_loc[REGNO (x)]);
5762 fmt = GET_RTX_FORMAT (GET_CODE (x));
5763 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
5765 && (GET_CODE (XEXP (x, i)) == MEM
5766 || refers_to_mem_for_reload_p (XEXP (x, i))))
5772 /* Check the insns before INSN to see if there is a suitable register
5773 containing the same value as GOAL.
5774 If OTHER is -1, look for a register in class CLASS.
5775 Otherwise, just see if register number OTHER shares GOAL's value.
5777 Return an rtx for the register found, or zero if none is found.
5779 If RELOAD_REG_P is (short *)1,
5780 we reject any hard reg that appears in reload_reg_rtx
5781 because such a hard reg is also needed coming into this insn.
5783 If RELOAD_REG_P is any other nonzero value,
5784 it is a vector indexed by hard reg number
5785 and we reject any hard reg whose element in the vector is nonnegative
5786 as well as any that appears in reload_reg_rtx.
5788 If GOAL is zero, then GOALREG is a register number; we look
5789 for an equivalent for that register.
5791 MODE is the machine mode of the value we want an equivalence for.
5792 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5794 This function is used by jump.c as well as in the reload pass.
5796 If GOAL is the sum of the stack pointer and a constant, we treat it
5797 as if it were a constant except that sp is required to be unchanging. */
5800 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
5803 enum reg_class class;
5805 short *reload_reg_p;
5807 enum machine_mode mode;
5809 register rtx p = insn;
5810 rtx goaltry, valtry, value, where;
5812 register int regno = -1;
5816 int goal_mem_addr_varies = 0;
5817 int need_stable_sp = 0;
5823 else if (GET_CODE (goal) == REG)
5824 regno = REGNO (goal);
5825 else if (GET_CODE (goal) == MEM)
5827 enum rtx_code code = GET_CODE (XEXP (goal, 0));
5828 if (MEM_VOLATILE_P (goal))
5830 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
5832 /* An address with side effects must be reexecuted. */
5845 else if (CONSTANT_P (goal))
5847 else if (GET_CODE (goal) == PLUS
5848 && XEXP (goal, 0) == stack_pointer_rtx
5849 && CONSTANT_P (XEXP (goal, 1)))
5850 goal_const = need_stable_sp = 1;
5851 else if (GET_CODE (goal) == PLUS
5852 && XEXP (goal, 0) == frame_pointer_rtx
5853 && CONSTANT_P (XEXP (goal, 1)))
5858 /* On some machines, certain regs must always be rejected
5859 because they don't behave the way ordinary registers do. */
5861 #ifdef OVERLAPPING_REGNO_P
5862 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5863 && OVERLAPPING_REGNO_P (regno))
5867 /* Scan insns back from INSN, looking for one that copies
5868 a value into or out of GOAL.
5869 Stop and give up if we reach a label. */
5874 if (p == 0 || GET_CODE (p) == CODE_LABEL)
5876 if (GET_CODE (p) == INSN
5877 /* If we don't want spill regs ... */
5878 && (! (reload_reg_p != 0
5879 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
5880 /* ... then ignore insns introduced by reload; they aren't useful
5881 and can cause results in reload_as_needed to be different
5882 from what they were when calculating the need for spills.
5883 If we notice an input-reload insn here, we will reject it below,
5884 but it might hide a usable equivalent. That makes bad code.
5885 It may even abort: perhaps no reg was spilled for this insn
5886 because it was assumed we would find that equivalent. */
5887 || INSN_UID (p) < reload_first_uid))
5890 pat = single_set (p);
5891 /* First check for something that sets some reg equal to GOAL. */
5894 && true_regnum (SET_SRC (pat)) == regno
5895 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5898 && true_regnum (SET_DEST (pat)) == regno
5899 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
5901 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
5902 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5904 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
5905 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
5907 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
5908 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
5909 /* If we are looking for a constant,
5910 and something equivalent to that constant was copied
5911 into a reg, we can use that reg. */
5912 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5914 && rtx_equal_p (XEXP (tem, 0), goal)
5915 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5916 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5918 && GET_CODE (SET_DEST (pat)) == REG
5919 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5920 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5921 && GET_CODE (goal) == CONST_INT
5922 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
5924 && rtx_equal_p (goal, goaltry)
5925 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
5927 && (valueno = true_regnum (valtry)) >= 0)
5928 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5930 && GET_CODE (SET_DEST (pat)) == REG
5931 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5932 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5933 && GET_CODE (goal) == CONST_INT
5934 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
5936 && rtx_equal_p (goal, goaltry)
5938 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
5939 && (valueno = true_regnum (valtry)) >= 0)))
5942 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
5943 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
5953 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5954 (or copying VALUE into GOAL, if GOAL is also a register).
5955 Now verify that VALUE is really valid. */
5957 /* VALUENO is the register number of VALUE; a hard register. */
5959 /* Don't try to re-use something that is killed in this insn. We want
5960 to be able to trust REG_UNUSED notes. */
5961 if (find_reg_note (where, REG_UNUSED, value))
5964 /* If we propose to get the value from the stack pointer or if GOAL is
5965 a MEM based on the stack pointer, we need a stable SP. */
5966 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
5967 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
5971 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5972 if (GET_MODE (value) != mode)
5975 /* Reject VALUE if it was loaded from GOAL
5976 and is also a register that appears in the address of GOAL. */
5978 if (goal_mem && value == SET_DEST (single_set (where))
5979 && refers_to_regno_for_reload_p (valueno,
5981 + HARD_REGNO_NREGS (valueno, mode)),
5985 /* Reject registers that overlap GOAL. */
5987 if (!goal_mem && !goal_const
5988 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
5989 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
5992 /* Reject VALUE if it is one of the regs reserved for reloads.
5993 Reload1 knows how to reuse them anyway, and it would get
5994 confused if we allocated one without its knowledge.
5995 (Now that insns introduced by reload are ignored above,
5996 this case shouldn't happen, but I'm not positive.) */
5998 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
5999 && reload_reg_p[valueno] >= 0)
6002 /* On some machines, certain regs must always be rejected
6003 because they don't behave the way ordinary registers do. */
6005 #ifdef OVERLAPPING_REGNO_P
6006 if (OVERLAPPING_REGNO_P (valueno))
6010 nregs = HARD_REGNO_NREGS (regno, mode);
6011 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6013 /* Reject VALUE if it is a register being used for an input reload
6014 even if it is not one of those reserved. */
6016 if (reload_reg_p != 0)
6019 for (i = 0; i < n_reloads; i++)
6020 if (reload_reg_rtx[i] != 0 && reload_in[i])
6022 int regno1 = REGNO (reload_reg_rtx[i]);
6023 int nregs1 = HARD_REGNO_NREGS (regno1,
6024 GET_MODE (reload_reg_rtx[i]));
6025 if (regno1 < valueno + valuenregs
6026 && regno1 + nregs1 > valueno)
6032 /* We must treat frame pointer as varying here,
6033 since it can vary--in a nonlocal goto as generated by expand_goto. */
6034 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6036 /* Now verify that the values of GOAL and VALUE remain unaltered
6037 until INSN is reached. */
6046 /* Don't trust the conversion past a function call
6047 if either of the two is in a call-clobbered register, or memory. */
6048 if (GET_CODE (p) == CALL_INSN
6049 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6050 && call_used_regs[regno])
6052 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
6053 && call_used_regs[valueno])
6059 #ifdef NON_SAVING_SETJMP
6060 if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE
6061 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6065 #ifdef INSN_CLOBBERS_REGNO_P
6066 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
6067 && INSN_CLOBBERS_REGNO_P (p, valueno))
6068 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6069 && INSN_CLOBBERS_REGNO_P (p, regno)))
6073 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
6075 /* If this insn P stores in either GOAL or VALUE, return 0.
6076 If GOAL is a memory ref and this insn writes memory, return 0.
6077 If GOAL is a memory ref and its address is not constant,
6078 and this insn P changes a register used in GOAL, return 0. */
6081 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6083 register rtx dest = SET_DEST (pat);
6084 while (GET_CODE (dest) == SUBREG
6085 || GET_CODE (dest) == ZERO_EXTRACT
6086 || GET_CODE (dest) == SIGN_EXTRACT
6087 || GET_CODE (dest) == STRICT_LOW_PART)
6088 dest = XEXP (dest, 0);
6089 if (GET_CODE (dest) == REG)
6091 register int xregno = REGNO (dest);
6093 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6094 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6097 if (xregno < regno + nregs && xregno + xnregs > regno)
6099 if (xregno < valueno + valuenregs
6100 && xregno + xnregs > valueno)
6102 if (goal_mem_addr_varies
6103 && reg_overlap_mentioned_for_reload_p (dest, goal))
6106 else if (goal_mem && GET_CODE (dest) == MEM
6107 && ! push_operand (dest, GET_MODE (dest)))
6109 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6110 && reg_equiv_memory_loc[regno] != 0)
6112 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6115 else if (GET_CODE (pat) == PARALLEL)
6118 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6120 register rtx v1 = XVECEXP (pat, 0, i);
6121 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6123 register rtx dest = SET_DEST (v1);
6124 while (GET_CODE (dest) == SUBREG
6125 || GET_CODE (dest) == ZERO_EXTRACT
6126 || GET_CODE (dest) == SIGN_EXTRACT
6127 || GET_CODE (dest) == STRICT_LOW_PART)
6128 dest = XEXP (dest, 0);
6129 if (GET_CODE (dest) == REG)
6131 register int xregno = REGNO (dest);
6133 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6134 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6137 if (xregno < regno + nregs
6138 && xregno + xnregs > regno)
6140 if (xregno < valueno + valuenregs
6141 && xregno + xnregs > valueno)
6143 if (goal_mem_addr_varies
6144 && reg_overlap_mentioned_for_reload_p (dest,
6148 else if (goal_mem && GET_CODE (dest) == MEM
6149 && ! push_operand (dest, GET_MODE (dest)))
6151 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6152 && reg_equiv_memory_loc[regno] != 0)
6154 else if (need_stable_sp
6155 && push_operand (dest, GET_MODE (dest)))
6161 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
6165 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6166 link = XEXP (link, 1))
6168 pat = XEXP (link, 0);
6169 if (GET_CODE (pat) == CLOBBER)
6171 register rtx dest = SET_DEST (pat);
6172 while (GET_CODE (dest) == SUBREG
6173 || GET_CODE (dest) == ZERO_EXTRACT
6174 || GET_CODE (dest) == SIGN_EXTRACT
6175 || GET_CODE (dest) == STRICT_LOW_PART)
6176 dest = XEXP (dest, 0);
6177 if (GET_CODE (dest) == REG)
6179 register int xregno = REGNO (dest);
6181 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6182 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6185 if (xregno < regno + nregs
6186 && xregno + xnregs > regno)
6188 if (xregno < valueno + valuenregs
6189 && xregno + xnregs > valueno)
6191 if (goal_mem_addr_varies
6192 && reg_overlap_mentioned_for_reload_p (dest,
6196 else if (goal_mem && GET_CODE (dest) == MEM
6197 && ! push_operand (dest, GET_MODE (dest)))
6199 else if (need_stable_sp
6200 && push_operand (dest, GET_MODE (dest)))
6207 /* If this insn auto-increments or auto-decrements
6208 either regno or valueno, return 0 now.
6209 If GOAL is a memory ref and its address is not constant,
6210 and this insn P increments a register used in GOAL, return 0. */
6214 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6215 if (REG_NOTE_KIND (link) == REG_INC
6216 && GET_CODE (XEXP (link, 0)) == REG)
6218 register int incno = REGNO (XEXP (link, 0));
6219 if (incno < regno + nregs && incno >= regno)
6221 if (incno < valueno + valuenregs && incno >= valueno)
6223 if (goal_mem_addr_varies
6224 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6234 /* Find a place where INCED appears in an increment or decrement operator
6235 within X, and return the amount INCED is incremented or decremented by.
6236 The value is always positive. */
6239 find_inc_amount (x, inced)
6242 register enum rtx_code code = GET_CODE (x);
6248 register rtx addr = XEXP (x, 0);
6249 if ((GET_CODE (addr) == PRE_DEC
6250 || GET_CODE (addr) == POST_DEC
6251 || GET_CODE (addr) == PRE_INC
6252 || GET_CODE (addr) == POST_INC)
6253 && XEXP (addr, 0) == inced)
6254 return GET_MODE_SIZE (GET_MODE (x));
6257 fmt = GET_RTX_FORMAT (code);
6258 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6262 register int tem = find_inc_amount (XEXP (x, i), inced);
6269 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6271 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6281 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6284 regno_clobbered_p (regno, insn)
6288 if (GET_CODE (PATTERN (insn)) == CLOBBER
6289 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6290 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
6292 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6294 int i = XVECLEN (PATTERN (insn), 0) - 1;
6298 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6299 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
6300 && REGNO (XEXP (elt, 0)) == regno)
6308 static char *reload_when_needed_name[] =
6311 "RELOAD_FOR_OUTPUT",
6313 "RELOAD_FOR_INPUT_ADDRESS",
6314 "RELOAD_FOR_INPADDR_ADDRESS",
6315 "RELOAD_FOR_OUTPUT_ADDRESS",
6316 "RELOAD_FOR_OUTADDR_ADDRESS",
6317 "RELOAD_FOR_OPERAND_ADDRESS",
6318 "RELOAD_FOR_OPADDR_ADDR",
6320 "RELOAD_FOR_OTHER_ADDRESS"
6323 static char *reg_class_names[] = REG_CLASS_NAMES;
6325 /* These functions are used to print the variables set by 'find_reloads' */
6328 debug_reload_to_stream (f)
6336 for (r = 0; r < n_reloads; r++)
6338 fprintf (f, "Reload %d: ", r);
6340 if (reload_in[r] != 0)
6342 fprintf (f, "reload_in (%s) = ",
6343 GET_MODE_NAME (reload_inmode[r]));
6344 print_inline_rtx (f, reload_in[r], 24);
6345 fprintf (f, "\n\t");
6348 if (reload_out[r] != 0)
6350 fprintf (f, "reload_out (%s) = ",
6351 GET_MODE_NAME (reload_outmode[r]));
6352 print_inline_rtx (f, reload_out[r], 24);
6353 fprintf (f, "\n\t");
6356 fprintf (f, "%s, ", reg_class_names[(int) reload_reg_class[r]]);
6358 fprintf (f, "%s (opnum = %d)",
6359 reload_when_needed_name[(int) reload_when_needed[r]],
6362 if (reload_optional[r])
6363 fprintf (f, ", optional");
6365 if (reload_nongroup[r])
6366 fprintf (stderr, ", nongroup");
6368 if (reload_inc[r] != 0)
6369 fprintf (f, ", inc by %d", reload_inc[r]);
6371 if (reload_nocombine[r])
6372 fprintf (f, ", can't combine");
6374 if (reload_secondary_p[r])
6375 fprintf (f, ", secondary_reload_p");
6377 if (reload_in_reg[r] != 0)
6379 fprintf (f, "\n\treload_in_reg: ");
6380 print_inline_rtx (f, reload_in_reg[r], 24);
6383 if (reload_reg_rtx[r] != 0)
6385 fprintf (f, "\n\treload_reg_rtx: ");
6386 print_inline_rtx (f, reload_reg_rtx[r], 24);
6390 if (reload_secondary_in_reload[r] != -1)
6392 fprintf (f, "%ssecondary_in_reload = %d",
6393 prefix, reload_secondary_in_reload[r]);
6397 if (reload_secondary_out_reload[r] != -1)
6398 fprintf (f, "%ssecondary_out_reload = %d\n",
6399 prefix, reload_secondary_out_reload[r]);
6402 if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
6404 fprintf (stderr, "%ssecondary_in_icode = %s", prefix,
6405 insn_name[reload_secondary_in_icode[r]]);
6409 if (reload_secondary_out_icode[r] != CODE_FOR_nothing)
6410 fprintf (stderr, "%ssecondary_out_icode = %s", prefix,
6411 insn_name[reload_secondary_out_icode[r]]);
6420 debug_reload_to_stream (stderr);
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