1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This file contains subroutines used only from the file reload1.c.
22 It knows how to scan one insn for operands and values
23 that need to be copied into registers to make valid code.
24 It also finds other operands and values which are valid
25 but for which equivalent values in registers exist and
26 ought to be used instead.
28 Before processing the first insn of the function, call `init_reload'.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
91 #include "insn-config.h"
92 #include "insn-codes.h"
96 #include "hard-reg-set.h"
100 #ifndef REGISTER_MOVE_COST
101 #define REGISTER_MOVE_COST(x, y) 2
104 /* The variables set up by `find_reloads' are:
106 n_reloads number of distinct reloads needed; max reload # + 1
107 tables indexed by reload number
108 reload_in rtx for value to reload from
109 reload_out rtx for where to store reload-reg afterward if nec
110 (often the same as reload_in)
111 reload_reg_class enum reg_class, saying what regs to reload into
112 reload_inmode enum machine_mode; mode this operand should have
113 when reloaded, on input.
114 reload_outmode enum machine_mode; mode this operand should have
115 when reloaded, on output.
116 reload_strict_low char; currently always zero; used to mean that this
117 reload is inside a STRICT_LOW_PART, but we don't
118 need to know this anymore.
119 reload_optional char, nonzero for an optional reload.
120 Optional reloads are ignored unless the
121 value is already sitting in a register.
122 reload_inc int, positive amount to increment or decrement by if
123 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
124 Ignored otherwise (don't assume it is zero).
125 reload_in_reg rtx. A reg for which reload_in is the equivalent.
126 If reload_in is a symbol_ref which came from
127 reg_equiv_constant, then this is the pseudo
128 which has that symbol_ref as equivalent.
129 reload_reg_rtx rtx. This is the register to reload into.
130 If it is zero when `find_reloads' returns,
131 you must find a suitable register in the class
132 specified by reload_reg_class, and store here
133 an rtx for that register with mode from
134 reload_inmode or reload_outmode.
135 reload_nocombine char, nonzero if this reload shouldn't be
136 combined with another reload.
137 reload_needed_for rtx, operand this reload is needed for address of.
138 0 means it isn't needed for addressing.
139 reload_needed_for_multiple
140 int, 1 if this reload needed for more than one thing.
141 reload_when_needed enum, classifies reload as needed either for
142 addressing an input reload, addressing an output,
143 for addressing a non-reloaded mem ref,
144 or for unspecified purposes (i.e., more than one
146 reload_secondary_reload int, gives the reload number of a secondary
147 reload, when needed; otherwise -1
148 reload_secondary_p int, 1 if this is a secondary register for one
150 reload_secondary_icode enum insn_code, if a secondary reload is required,
151 gives the INSN_CODE that uses the secondary
152 reload as a scratch register, or CODE_FOR_nothing
153 if the secondary reload register is to be an
154 intermediate register. */
157 rtx reload_in[MAX_RELOADS];
158 rtx reload_out[MAX_RELOADS];
159 enum reg_class reload_reg_class[MAX_RELOADS];
160 enum machine_mode reload_inmode[MAX_RELOADS];
161 enum machine_mode reload_outmode[MAX_RELOADS];
162 char reload_strict_low[MAX_RELOADS];
163 rtx reload_reg_rtx[MAX_RELOADS];
164 char reload_optional[MAX_RELOADS];
165 int reload_inc[MAX_RELOADS];
166 rtx reload_in_reg[MAX_RELOADS];
167 char reload_nocombine[MAX_RELOADS];
168 int reload_needed_for_multiple[MAX_RELOADS];
169 rtx reload_needed_for[MAX_RELOADS];
170 enum reload_when_needed reload_when_needed[MAX_RELOADS];
171 int reload_secondary_reload[MAX_RELOADS];
172 int reload_secondary_p[MAX_RELOADS];
173 enum insn_code reload_secondary_icode[MAX_RELOADS];
175 /* All the "earlyclobber" operands of the current insn
176 are recorded here. */
178 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
180 /* Replacing reloads.
182 If `replace_reloads' is nonzero, then as each reload is recorded
183 an entry is made for it in the table `replacements'.
184 Then later `subst_reloads' can look through that table and
185 perform all the replacements needed. */
187 /* Nonzero means record the places to replace. */
188 static int replace_reloads;
190 /* Each replacement is recorded with a structure like this. */
193 rtx *where; /* Location to store in */
194 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
195 a SUBREG; 0 otherwise. */
196 int what; /* which reload this is for */
197 enum machine_mode mode; /* mode it must have */
200 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
202 /* Number of replacements currently recorded. */
203 static int n_replacements;
205 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
206 (see reg_equiv_address). */
207 static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
208 static int n_memlocs;
210 #ifdef SECONDARY_MEMORY_NEEDED
212 /* Save MEMs needed to copy from one class of registers to another. One MEM
213 is used per mode, but normally only one or two modes are ever used.
215 We keep two versions, before and after register elimination. */
217 static rtx secondary_memlocs[NUM_MACHINE_MODES];
218 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES];
221 /* The instruction we are doing reloads for;
222 so we can test whether a register dies in it. */
223 static rtx this_insn;
225 /* Nonzero if this instruction is a user-specified asm with operands. */
226 static int this_insn_is_asm;
228 /* If hard_regs_live_known is nonzero,
229 we can tell which hard regs are currently live,
230 at least enough to succeed in choosing dummy reloads. */
231 static int hard_regs_live_known;
233 /* Indexed by hard reg number,
234 element is nonegative if hard reg has been spilled.
235 This vector is passed to `find_reloads' as an argument
236 and is not changed here. */
237 static short *static_reload_reg_p;
239 /* Set to 1 in subst_reg_equivs if it changes anything. */
240 static int subst_reg_equivs_changed;
242 /* On return from push_reload, holds the reload-number for the OUT
243 operand, which can be different for that from the input operand. */
244 static int output_reloadnum;
246 static int alternative_allows_memconst ();
247 static rtx find_dummy_reload ();
248 static rtx find_reloads_toplev ();
249 static int find_reloads_address ();
250 static int find_reloads_address_1 ();
251 static void find_reloads_address_part ();
252 static int hard_reg_set_here_p ();
253 /* static rtx forget_volatility (); */
254 static rtx subst_reg_equivs ();
255 static rtx subst_indexed_address ();
256 rtx find_equiv_reg ();
257 static int find_inc_amount ();
259 #ifdef HAVE_SECONDARY_RELOADS
261 /* Determine if any secondary reloads are needed for loading (if IN_P is
262 non-zero) or storing (if IN_P is zero) X to or from a reload register of
263 register class RELOAD_CLASS in mode RELOAD_MODE.
265 Return the register class of a secondary reload register, or NO_REGS if
266 none. *PMODE is set to the mode that the register is required in.
267 If the reload register is needed as a scratch register instead of an
268 intermediate register, *PICODE is set to the insn_code of the insn to be
269 used to load or store the primary reload register; otherwise *PICODE
270 is set to CODE_FOR_nothing.
272 In some cases (such as storing MQ into an external memory location on
273 the RT), both an intermediate register and a scratch register. In that
274 case, *PICODE is set to CODE_FOR_nothing, the class for the intermediate
275 register is returned, and the *PTERTIARY_... variables are set to describe
276 the scratch register. */
278 static enum reg_class
279 find_secondary_reload (x, reload_class, reload_mode, in_p, picode, pmode,
280 ptertiary_class, ptertiary_icode, ptertiary_mode)
282 enum reg_class reload_class;
283 enum machine_mode reload_mode;
285 enum insn_code *picode;
286 enum machine_mode *pmode;
287 enum reg_class *ptertiary_class;
288 enum insn_code *ptertiary_icode;
289 enum machine_mode *ptertiary_mode;
291 enum reg_class class = NO_REGS;
292 enum machine_mode mode = reload_mode;
293 enum insn_code icode = CODE_FOR_nothing;
294 enum reg_class t_class = NO_REGS;
295 enum machine_mode t_mode = VOIDmode;
296 enum insn_code t_icode = CODE_FOR_nothing;
298 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
299 is still a pseudo-register by now, it *must* have an equivalent MEM
300 but we don't want to assume that), use that equivalent when seeing if
301 a secondary reload is needed since whether or not a reload is needed
302 might be sensitive to the form of the MEM. */
304 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
305 && reg_equiv_mem[REGNO (x)] != 0)
306 x = reg_equiv_mem[REGNO (x)];
308 #ifdef SECONDARY_INPUT_RELOAD_CLASS
310 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
313 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
315 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
318 /* If we don't need any secondary registers, go away; the rest of the
319 values won't be used. */
320 if (class == NO_REGS)
323 /* Get a possible insn to use. If the predicate doesn't accept X, don't
326 icode = (in_p ? reload_in_optab[(int) reload_mode]
327 : reload_out_optab[(int) reload_mode]);
329 if (icode != CODE_FOR_nothing
330 && insn_operand_predicate[(int) icode][in_p]
331 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
332 icode = CODE_FOR_nothing;
334 /* If we will be using an insn, see if it can directly handle the reload
335 register we will be using. If it can, the secondary reload is for a
336 scratch register. If it can't, we will use the secondary reload for
337 an intermediate register and require a tertiary reload for the scratch
340 if (icode != CODE_FOR_nothing)
342 /* If IN_P is non-zero, the reload register will be the output in
343 operand 0. If IN_P is zero, the reload register will be the input
344 in operand 1. Outputs should have an initial "=", which we must
347 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
348 enum reg_class insn_class
349 = (insn_letter == 'r' ? GENERAL_REGS
350 : REG_CLASS_FROM_LETTER (insn_letter));
352 if (insn_class == NO_REGS
353 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
354 /* The scratch register's constraint must start with "=&". */
355 || insn_operand_constraint[(int) icode][2][0] != '='
356 || insn_operand_constraint[(int) icode][2][1] != '&')
359 if (reg_class_subset_p (reload_class, insn_class))
360 mode = insn_operand_mode[(int) icode][2];
363 char t_letter = insn_operand_constraint[(int) icode][2][2];
365 t_mode = insn_operand_mode[(int) icode][2];
366 t_class = (t_letter == 'r' ? GENERAL_REGS
367 : REG_CLASS_FROM_LETTER (t_letter));
369 icode = CODE_FOR_nothing;
375 *ptertiary_class = t_class;
376 *ptertiary_mode = t_mode;
377 *ptertiary_icode = t_icode;
381 #endif /* HAVE_SECONDARY_RELOADS */
383 #ifdef SECONDARY_MEMORY_NEEDED
385 /* Return a memory location that will be used to copy X in mode MODE.
386 If we haven't already made a location for this mode in this insn,
387 call find_reloads_address on the location being returned. */
390 get_secondary_mem (x, mode)
392 enum machine_mode mode;
397 /* If MODE is narrower than a word, widen it. This is required because
398 most machines that require these memory locations do not support
399 short load and stores from all registers (e.g., FP registers). We could
400 possibly conditionalize this, but we lose nothing by doing the wider
403 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
404 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
406 /* If we already have made a MEM for this insn, return it. */
407 if (secondary_memlocs_elim[(int) mode] != 0)
408 return secondary_memlocs_elim[(int) mode];
410 /* If this is the first time we've tried to get a MEM for this mode,
411 allocate a new one. `something_changed' in reload will get set
412 by noticing that the frame size has changed. */
414 if (secondary_memlocs[(int) mode] == 0)
415 secondary_memlocs[(int) mode]
416 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
418 /* Get a version of the address doing any eliminations needed. If that
419 didn't give us a new MEM, make a new one if it isn't valid. */
421 loc = eliminate_regs (secondary_memlocs[(int) mode], 0, NULL_RTX);
422 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
424 if (! mem_valid && loc == secondary_memlocs[(int) mode])
425 loc = copy_rtx (loc);
427 /* The only time the call below will do anything is if the stack
428 offset is too large. In that case IND_LEVELS doesn't matter, so we
429 can just pass a zero. */
431 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0), x, 0);
433 secondary_memlocs_elim[(int) mode] = loc;
438 /* Clear any secondary memory locations we've made. */
441 clear_secondary_mem ()
445 for (i = 0; i < NUM_MACHINE_MODES; i++)
446 secondary_memlocs[i] = 0;
448 #endif /* SECONDARY_MEMORY_NEEDED */
450 /* Record one (sometimes two) reload that needs to be performed.
451 IN is an rtx saying where the data are to be found before this instruction.
452 OUT says where they must be stored after the instruction.
453 (IN is zero for data not read, and OUT is zero for data not written.)
454 INLOC and OUTLOC point to the places in the instructions where
455 IN and OUT were found.
456 CLASS is a register class required for the reloaded data.
457 INMODE is the machine mode that the instruction requires
458 for the reg that replaces IN and OUTMODE is likewise for OUT.
460 If IN is zero, then OUT's location and mode should be passed as
463 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
465 OPTIONAL nonzero means this reload does not need to be performed:
466 it can be discarded if that is more convenient.
468 The return value is the reload-number for this reload.
470 If both IN and OUT are nonzero, in some rare cases we might
471 want to make two separate reloads. (Actually we never do this now.)
472 Therefore, the reload-number for OUT is stored in
473 output_reloadnum when we return; the return value applies to IN.
474 Usually (presently always), when IN and OUT are nonzero,
475 the two reload-numbers are equal, but the caller should be careful to
479 push_reload (in, out, inloc, outloc, class,
480 inmode, outmode, strict_low, optional, needed_for)
481 register rtx in, out;
483 enum reg_class class;
484 enum machine_mode inmode, outmode;
491 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
492 int secondary_reload = -1;
493 enum insn_code secondary_icode = CODE_FOR_nothing;
495 /* Compare two RTX's. */
496 #define MATCHES(x, y) \
497 (x == y || (x != 0 && (GET_CODE (x) == REG \
498 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
499 : rtx_equal_p (x, y) && ! side_effects_p (x))))
501 /* INMODE and/or OUTMODE could be VOIDmode if no mode
502 has been specified for the operand. In that case,
503 use the operand's mode as the mode to reload. */
504 if (inmode == VOIDmode && in != 0)
505 inmode = GET_MODE (in);
506 if (outmode == VOIDmode && out != 0)
507 outmode = GET_MODE (out);
509 /* If IN is a pseudo register everywhere-equivalent to a constant, and
510 it is not in a hard register, reload straight from the constant,
511 since we want to get rid of such pseudo registers.
512 Often this is done earlier, but not always in find_reloads_address. */
513 if (in != 0 && GET_CODE (in) == REG)
515 register int regno = REGNO (in);
517 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
518 && reg_equiv_constant[regno] != 0)
519 in = reg_equiv_constant[regno];
522 /* Likewise for OUT. Of course, OUT will never be equivalent to
523 an actual constant, but it might be equivalent to a memory location
524 (in the case of a parameter). */
525 if (out != 0 && GET_CODE (out) == REG)
527 register int regno = REGNO (out);
529 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
530 && reg_equiv_constant[regno] != 0)
531 out = reg_equiv_constant[regno];
534 /* If we have a read-write operand with an address side-effect,
535 change either IN or OUT so the side-effect happens only once. */
536 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
538 if (GET_CODE (XEXP (in, 0)) == POST_INC
539 || GET_CODE (XEXP (in, 0)) == POST_DEC)
540 in = gen_rtx (MEM, GET_MODE (in), XEXP (XEXP (in, 0), 0));
541 if (GET_CODE (XEXP (in, 0)) == PRE_INC
542 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
543 out = gen_rtx (MEM, GET_MODE (out), XEXP (XEXP (out, 0), 0));
546 /* If we are reloading a (SUBREG (MEM ...) ...) or (SUBREG constant ...),
547 really reload just the inside expression in its own mode.
548 If we have (SUBREG:M1 (REG:M2 ...) ...) with M1 wider than M2 and the
549 register is a pseudo, this will become the same as the above case.
550 Do the same for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
551 either M1 is not valid for R or M2 is wider than a word but we only
552 need one word to store an M2-sized quantity in R.
553 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
554 we can't handle it here because CONST_INT does not indicate a mode.
556 Similarly, we must reload the inside expression if we have a
557 STRICT_LOW_PART (presumably, in == out in the cas).
559 Also reload the inner expression if it does not require a secondary
560 reload but the SUBREG does. */
562 if (in != 0 && GET_CODE (in) == SUBREG
563 && (GET_CODE (SUBREG_REG (in)) != REG
565 || (GET_CODE (SUBREG_REG (in)) == REG
566 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER
567 && (GET_MODE_SIZE (inmode)
568 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))))
569 || (GET_CODE (SUBREG_REG (in)) == REG
570 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
571 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in)), inmode)
572 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
573 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
575 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
577 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
578 GET_MODE (SUBREG_REG (in)))))))
579 #ifdef SECONDARY_INPUT_RELOAD_CLASS
580 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
581 && (SECONDARY_INPUT_RELOAD_CLASS (class,
582 GET_MODE (SUBREG_REG (in)),
588 in_subreg_loc = inloc;
589 inloc = &SUBREG_REG (in);
591 if (GET_CODE (in) == MEM)
592 /* This is supposed to happen only for paradoxical subregs made by
593 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
594 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
596 inmode = GET_MODE (in);
599 /* Similarly for paradoxical and problematical SUBREGs on the output.
600 Note that there is no reason we need worry about the previous value
601 of SUBREG_REG (out); even if wider than out,
602 storing in a subreg is entitled to clobber it all
603 (except in the case of STRICT_LOW_PART,
604 and in that case the constraint should label it input-output.) */
605 if (out != 0 && GET_CODE (out) == SUBREG
606 && (GET_CODE (SUBREG_REG (out)) != REG
608 || (GET_CODE (SUBREG_REG (out)) == REG
609 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER
610 && (GET_MODE_SIZE (outmode)
611 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))))
612 || (GET_CODE (SUBREG_REG (out)) == REG
613 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
614 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)), outmode)
615 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
616 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
618 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
620 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
621 GET_MODE (SUBREG_REG (out)))))))
622 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
623 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
624 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
625 GET_MODE (SUBREG_REG (out)),
631 out_subreg_loc = outloc;
632 outloc = &SUBREG_REG (out);
634 if (GET_CODE (out) == MEM
635 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
637 outmode = GET_MODE (out);
640 /* That's all we use STRICT_LOW for, so clear it. At some point,
641 we may want to get rid of reload_strict_low. */
644 /* If IN appears in OUT, we can't share any input-only reload for IN. */
645 if (in != 0 && out != 0 && GET_CODE (out) == MEM
646 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
647 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
650 /* If IN is a SUBREG of a hard register, make a new REG. This
651 simplifies some of the cases below. */
653 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
654 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
655 in = gen_rtx (REG, GET_MODE (in),
656 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
658 /* Similarly for OUT. */
659 if (out != 0 && GET_CODE (out) == SUBREG
660 && GET_CODE (SUBREG_REG (out)) == REG
661 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
662 out = gen_rtx (REG, GET_MODE (out),
663 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
665 /* Narrow down the class of register wanted if that is
666 desirable on this machine for efficiency. */
668 class = PREFERRED_RELOAD_CLASS (in, class);
670 /* Make sure we use a class that can handle the actual pseudo
671 inside any subreg. For example, on the 386, QImode regs
672 can appear within SImode subregs. Although GENERAL_REGS
673 can handle SImode, QImode needs a smaller class. */
674 #ifdef LIMIT_RELOAD_CLASS
676 class = LIMIT_RELOAD_CLASS (inmode, class);
677 else if (in != 0 && GET_CODE (in) == SUBREG)
678 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
681 class = LIMIT_RELOAD_CLASS (outmode, class);
682 if (out != 0 && GET_CODE (out) == SUBREG)
683 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
686 if (class == NO_REGS)
689 /* Verify that this class is at least possible for the mode that
691 if (this_insn_is_asm)
693 enum machine_mode mode;
694 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
698 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
699 if (HARD_REGNO_MODE_OK (i, mode)
700 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
702 int nregs = HARD_REGNO_NREGS (i, mode);
705 for (j = 1; j < nregs; j++)
706 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
711 if (i == FIRST_PSEUDO_REGISTER)
713 error_for_asm (this_insn, "impossible register constraint in `asm'");
718 /* We can use an existing reload if the class is right
719 and at least one of IN and OUT is a match
720 and the other is at worst neutral.
721 (A zero compared against anything is neutral.) */
722 for (i = 0; i < n_reloads; i++)
723 if ((reg_class_subset_p (class, reload_reg_class[i])
724 || reg_class_subset_p (reload_reg_class[i], class))
725 && reload_strict_low[i] == strict_low
726 /* If the existing reload has a register, it must fit our class. */
727 && (reload_reg_rtx[i] == 0
728 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
729 true_regnum (reload_reg_rtx[i])))
730 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
731 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
733 (out != 0 && MATCHES (reload_out[i], out)
734 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in)))))
737 /* Reloading a plain reg for input can match a reload to postincrement
738 that reg, since the postincrement's value is the right value.
739 Likewise, it can match a preincrement reload, since we regard
740 the preincrementation as happening before any ref in this insn
743 for (i = 0; i < n_reloads; i++)
744 if ((reg_class_subset_p (class, reload_reg_class[i])
745 || reg_class_subset_p (reload_reg_class[i], class))
746 /* If the existing reload has a register, it must fit our class. */
747 && (reload_reg_rtx[i] == 0
748 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
749 true_regnum (reload_reg_rtx[i])))
750 && reload_strict_low[i] == strict_low
751 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
752 && ((GET_CODE (in) == REG
753 && (GET_CODE (reload_in[i]) == POST_INC
754 || GET_CODE (reload_in[i]) == POST_DEC
755 || GET_CODE (reload_in[i]) == PRE_INC
756 || GET_CODE (reload_in[i]) == PRE_DEC)
757 && MATCHES (XEXP (reload_in[i], 0), in))
759 (GET_CODE (reload_in[i]) == REG
760 && (GET_CODE (in) == POST_INC
761 || GET_CODE (in) == POST_DEC
762 || GET_CODE (in) == PRE_INC
763 || GET_CODE (in) == PRE_DEC)
764 && MATCHES (XEXP (in, 0), reload_in[i]))))
766 /* Make sure reload_in ultimately has the increment,
767 not the plain register. */
768 if (GET_CODE (in) == REG)
775 #ifdef HAVE_SECONDARY_RELOADS
776 enum reg_class secondary_class = NO_REGS;
777 enum reg_class secondary_out_class = NO_REGS;
778 enum machine_mode secondary_mode = inmode;
779 enum machine_mode secondary_out_mode = outmode;
780 enum insn_code secondary_icode;
781 enum insn_code secondary_out_icode = CODE_FOR_nothing;
782 enum reg_class tertiary_class = NO_REGS;
783 enum reg_class tertiary_out_class = NO_REGS;
784 enum machine_mode tertiary_mode;
785 enum machine_mode tertiary_out_mode;
786 enum insn_code tertiary_icode;
787 enum insn_code tertiary_out_icode = CODE_FOR_nothing;
788 int tertiary_reload = -1;
790 /* See if we need a secondary reload register to move between
791 CLASS and IN or CLASS and OUT. Get the modes and icodes to
792 use for each of them if so. */
794 #ifdef SECONDARY_INPUT_RELOAD_CLASS
797 = find_secondary_reload (in, class, inmode, 1, &secondary_icode,
798 &secondary_mode, &tertiary_class,
799 &tertiary_icode, &tertiary_mode);
802 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
803 if (out != 0 && GET_CODE (out) != SCRATCH)
805 = find_secondary_reload (out, class, outmode, 0,
806 &secondary_out_icode, &secondary_out_mode,
807 &tertiary_out_class, &tertiary_out_icode,
811 /* We can only record one secondary and one tertiary reload. If both
812 IN and OUT need secondary reloads, we can only make an in-out
813 reload if neither need an insn and if the classes are compatible. */
815 if (secondary_class != NO_REGS && secondary_out_class != NO_REGS
816 && reg_class_subset_p (secondary_out_class, secondary_class))
817 secondary_class = secondary_out_class;
819 if (secondary_class != NO_REGS && secondary_out_class != NO_REGS
820 && (! reg_class_subset_p (secondary_class, secondary_out_class)
821 || secondary_icode != CODE_FOR_nothing
822 || secondary_out_icode != CODE_FOR_nothing))
824 push_reload (NULL_RTX, out, NULL_PTR, outloc, class,
825 VOIDmode, outmode, strict_low, optional, needed_for);
831 /* If we need a secondary reload for OUT but not IN, copy the
833 if (secondary_class == NO_REGS && secondary_out_class != NO_REGS)
835 secondary_class = secondary_out_class;
836 secondary_icode = secondary_out_icode;
837 tertiary_class = tertiary_out_class;
838 tertiary_icode = tertiary_out_icode;
839 tertiary_mode = tertiary_out_mode;
842 if (secondary_class != NO_REGS)
844 /* If we need a tertiary reload, see if we have one we can reuse
847 if (tertiary_class != NO_REGS)
849 for (tertiary_reload = 0; tertiary_reload < n_reloads;
851 if (reload_secondary_p[tertiary_reload]
852 && (reg_class_subset_p (tertiary_class,
853 reload_reg_class[tertiary_reload])
854 || reg_class_subset_p (reload_reg_class[tertiary_reload],
856 && ((reload_inmode[tertiary_reload] == tertiary_mode)
857 || reload_inmode[tertiary_reload] == VOIDmode)
858 && ((reload_outmode[tertiary_reload] == tertiary_mode)
859 || reload_outmode[tertiary_reload] == VOIDmode)
860 && (reload_secondary_icode[tertiary_reload]
861 == CODE_FOR_nothing))
864 if (tertiary_mode != VOIDmode)
865 reload_inmode[tertiary_reload] = tertiary_mode;
866 if (tertiary_out_mode != VOIDmode)
867 reload_outmode[tertiary_reload] = tertiary_mode;
868 if (reg_class_subset_p (tertiary_class,
869 reload_reg_class[tertiary_reload]))
870 reload_reg_class[tertiary_reload] = tertiary_class;
871 if (reload_needed_for[tertiary_reload] != needed_for)
872 reload_needed_for_multiple[tertiary_reload] = 1;
873 reload_optional[tertiary_reload] &= optional;
874 reload_secondary_p[tertiary_reload] = 1;
877 if (tertiary_reload == n_reloads)
879 /* We need to make a new tertiary reload for this register
881 reload_in[tertiary_reload] = reload_out[tertiary_reload] = 0;
882 reload_reg_class[tertiary_reload] = tertiary_class;
883 reload_inmode[tertiary_reload] = tertiary_mode;
884 reload_outmode[tertiary_reload] = tertiary_mode;
885 reload_reg_rtx[tertiary_reload] = 0;
886 reload_optional[tertiary_reload] = optional;
887 reload_inc[tertiary_reload] = 0;
888 reload_strict_low[tertiary_reload] = 0;
889 /* Maybe we could combine these, but it seems too tricky. */
890 reload_nocombine[tertiary_reload] = 1;
891 reload_in_reg[tertiary_reload] = 0;
892 reload_needed_for[tertiary_reload] = needed_for;
893 reload_needed_for_multiple[tertiary_reload] = 0;
894 reload_secondary_reload[tertiary_reload] = -1;
895 reload_secondary_icode[tertiary_reload] = CODE_FOR_nothing;
896 reload_secondary_p[tertiary_reload] = 1;
903 /* See if we can reuse an existing secondary reload. */
904 for (secondary_reload = 0; secondary_reload < n_reloads;
906 if (reload_secondary_p[secondary_reload]
907 && (reg_class_subset_p (secondary_class,
908 reload_reg_class[secondary_reload])
909 || reg_class_subset_p (reload_reg_class[secondary_reload],
911 && ((reload_inmode[secondary_reload] == secondary_mode)
912 || reload_inmode[secondary_reload] == VOIDmode)
913 && ((reload_outmode[secondary_reload] == secondary_out_mode)
914 || reload_outmode[secondary_reload] == VOIDmode)
915 && reload_secondary_reload[secondary_reload] == tertiary_reload
916 && reload_secondary_icode[secondary_reload] == tertiary_icode)
918 if (secondary_mode != VOIDmode)
919 reload_inmode[secondary_reload] = secondary_mode;
920 if (secondary_out_mode != VOIDmode)
921 reload_outmode[secondary_reload] = secondary_out_mode;
922 if (reg_class_subset_p (secondary_class,
923 reload_reg_class[secondary_reload]))
924 reload_reg_class[secondary_reload] = secondary_class;
925 if (reload_needed_for[secondary_reload] != needed_for)
926 reload_needed_for_multiple[secondary_reload] = 1;
927 reload_optional[secondary_reload] &= optional;
928 reload_secondary_p[secondary_reload] = 1;
931 if (secondary_reload == n_reloads)
933 /* We need to make a new secondary reload for this register
935 reload_in[secondary_reload] = reload_out[secondary_reload] = 0;
936 reload_reg_class[secondary_reload] = secondary_class;
937 reload_inmode[secondary_reload] = secondary_mode;
938 reload_outmode[secondary_reload] = secondary_out_mode;
939 reload_reg_rtx[secondary_reload] = 0;
940 reload_optional[secondary_reload] = optional;
941 reload_inc[secondary_reload] = 0;
942 reload_strict_low[secondary_reload] = 0;
943 /* Maybe we could combine these, but it seems too tricky. */
944 reload_nocombine[secondary_reload] = 1;
945 reload_in_reg[secondary_reload] = 0;
946 reload_needed_for[secondary_reload] = needed_for;
947 reload_needed_for_multiple[secondary_reload] = 0;
948 reload_secondary_reload[secondary_reload] = tertiary_reload;
949 reload_secondary_icode[secondary_reload] = tertiary_icode;
950 reload_secondary_p[secondary_reload] = 1;
955 #ifdef SECONDARY_MEMORY_NEEDED
956 /* If we need a memory location to copy between the two
957 reload regs, set it up now. */
959 if (in != 0 && secondary_icode == CODE_FOR_nothing
960 && SECONDARY_MEMORY_NEEDED (secondary_class, class, inmode))
961 get_secondary_mem (in, inmode);
963 if (out != 0 && secondary_icode == CODE_FOR_nothing
964 && SECONDARY_MEMORY_NEEDED (class, secondary_class, outmode))
965 get_secondary_mem (out, outmode);
971 /* We found no existing reload suitable for re-use.
972 So add an additional reload. */
976 reload_reg_class[i] = class;
977 reload_inmode[i] = inmode;
978 reload_outmode[i] = outmode;
979 reload_reg_rtx[i] = 0;
980 reload_optional[i] = optional;
982 reload_strict_low[i] = strict_low;
983 reload_nocombine[i] = 0;
984 reload_in_reg[i] = inloc ? *inloc : 0;
985 reload_needed_for[i] = needed_for;
986 reload_needed_for_multiple[i] = 0;
987 reload_secondary_reload[i] = secondary_reload;
988 reload_secondary_icode[i] = secondary_icode;
989 reload_secondary_p[i] = 0;
993 #ifdef SECONDARY_MEMORY_NEEDED
994 /* If a memory location is needed for the copy, make one. */
995 if (in != 0 && GET_CODE (in) == REG
996 && REGNO (in) < FIRST_PSEUDO_REGISTER
997 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
999 get_secondary_mem (in, inmode);
1001 if (out != 0 && GET_CODE (out) == REG
1002 && REGNO (out) < FIRST_PSEUDO_REGISTER
1003 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1005 get_secondary_mem (out, outmode);
1010 /* We are reusing an existing reload,
1011 but we may have additional information for it.
1012 For example, we may now have both IN and OUT
1013 while the old one may have just one of them. */
1015 if (inmode != VOIDmode)
1016 reload_inmode[i] = inmode;
1017 if (outmode != VOIDmode)
1018 reload_outmode[i] = outmode;
1022 reload_out[i] = out;
1023 if (reg_class_subset_p (class, reload_reg_class[i]))
1024 reload_reg_class[i] = class;
1025 reload_optional[i] &= optional;
1026 if (reload_needed_for[i] != needed_for)
1027 reload_needed_for_multiple[i] = 1;
1030 /* If the ostensible rtx being reload differs from the rtx found
1031 in the location to substitute, this reload is not safe to combine
1032 because we cannot reliably tell whether it appears in the insn. */
1034 if (in != 0 && in != *inloc)
1035 reload_nocombine[i] = 1;
1038 /* This was replaced by changes in find_reloads_address_1 and the new
1039 function inc_for_reload, which go with a new meaning of reload_inc. */
1041 /* If this is an IN/OUT reload in an insn that sets the CC,
1042 it must be for an autoincrement. It doesn't work to store
1043 the incremented value after the insn because that would clobber the CC.
1044 So we must do the increment of the value reloaded from,
1045 increment it, store it back, then decrement again. */
1046 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1050 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1051 /* If we did not find a nonzero amount-to-increment-by,
1052 that contradicts the belief that IN is being incremented
1053 in an address in this insn. */
1054 if (reload_inc[i] == 0)
1059 /* If we will replace IN and OUT with the reload-reg,
1060 record where they are located so that substitution need
1061 not do a tree walk. */
1063 if (replace_reloads)
1067 register struct replacement *r = &replacements[n_replacements++];
1069 r->subreg_loc = in_subreg_loc;
1073 if (outloc != 0 && outloc != inloc)
1075 register struct replacement *r = &replacements[n_replacements++];
1078 r->subreg_loc = out_subreg_loc;
1083 /* If this reload is just being introduced and it has both
1084 an incoming quantity and an outgoing quantity that are
1085 supposed to be made to match, see if either one of the two
1086 can serve as the place to reload into.
1088 If one of them is acceptable, set reload_reg_rtx[i]
1091 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1093 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1094 reload_reg_class[i], i);
1096 /* If the outgoing register already contains the same value
1097 as the incoming one, we can dispense with loading it.
1098 The easiest way to tell the caller that is to give a phony
1099 value for the incoming operand (same as outgoing one). */
1100 if (reload_reg_rtx[i] == out
1101 && (GET_CODE (in) == REG || CONSTANT_P (in))
1102 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1103 static_reload_reg_p, i, inmode))
1107 /* If this is an input reload and the operand contains a register that
1108 dies in this insn and is used nowhere else, see if it is the right class
1109 to be used for this reload. Use it if so. (This occurs most commonly
1110 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1111 this if it is also an output reload that mentions the register unless
1112 the output is a SUBREG that clobbers an entire register.
1114 Note that the operand might be one of the spill regs, if it is a
1115 pseudo reg and we are in a block where spilling has not taken place.
1116 But if there is no spilling in this block, that is OK.
1117 An explicitly used hard reg cannot be a spill reg. */
1119 if (reload_reg_rtx[i] == 0 && in != 0)
1124 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1125 if (REG_NOTE_KIND (note) == REG_DEAD
1126 && GET_CODE (XEXP (note, 0)) == REG
1127 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1128 && reg_mentioned_p (XEXP (note, 0), in)
1129 && ! refers_to_regno_for_reload_p (regno,
1131 + HARD_REGNO_NREGS (regno,
1133 PATTERN (this_insn), inloc)
1135 || (GET_CODE (in) == SUBREG
1136 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1138 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1139 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1140 /* Make sure the operand fits in the reg that dies. */
1141 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1142 && HARD_REGNO_MODE_OK (regno, inmode)
1143 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1144 && HARD_REGNO_MODE_OK (regno, outmode)
1145 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1146 && !fixed_regs[regno])
1148 reload_reg_rtx[i] = gen_rtx (REG, inmode, regno);
1154 output_reloadnum = i;
1159 /* Record an additional place we must replace a value
1160 for which we have already recorded a reload.
1161 RELOADNUM is the value returned by push_reload
1162 when the reload was recorded.
1163 This is used in insn patterns that use match_dup. */
1166 push_replacement (loc, reloadnum, mode)
1169 enum machine_mode mode;
1171 if (replace_reloads)
1173 register struct replacement *r = &replacements[n_replacements++];
1174 r->what = reloadnum;
1181 /* If there is only one output reload, and it is not for an earlyclobber
1182 operand, try to combine it with a (logically unrelated) input reload
1183 to reduce the number of reload registers needed.
1185 This is safe if the input reload does not appear in
1186 the value being output-reloaded, because this implies
1187 it is not needed any more once the original insn completes.
1189 If that doesn't work, see we can use any of the registers that
1190 die in this insn as a reload register. We can if it is of the right
1191 class and does not appear in the value being output-reloaded. */
1197 int output_reload = -1;
1200 /* Find the output reload; return unless there is exactly one
1201 and that one is mandatory. */
1203 for (i = 0; i < n_reloads; i++)
1204 if (reload_out[i] != 0)
1206 if (output_reload >= 0)
1211 if (output_reload < 0 || reload_optional[output_reload])
1214 /* An input-output reload isn't combinable. */
1216 if (reload_in[output_reload] != 0)
1219 /* If this reload is for an earlyclobber operand, we can't do anything. */
1221 for (i = 0; i < n_earlyclobbers; i++)
1222 if (reload_out[output_reload] == reload_earlyclobbers[i])
1225 /* Check each input reload; can we combine it? */
1227 for (i = 0; i < n_reloads; i++)
1228 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1229 /* Life span of this reload must not extend past main insn. */
1230 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_RELOAD_ADDRESS
1231 && reload_inmode[i] == reload_outmode[output_reload]
1232 && reload_inc[i] == 0
1233 && reload_reg_rtx[i] == 0
1234 && reload_strict_low[i] == 0
1235 /* Don't combine two reloads with different secondary reloads. */
1236 && (reload_secondary_reload[i] == reload_secondary_reload[output_reload]
1237 || reload_secondary_reload[i] == -1
1238 || reload_secondary_reload[output_reload] == -1)
1239 && (reg_class_subset_p (reload_reg_class[i],
1240 reload_reg_class[output_reload])
1241 || reg_class_subset_p (reload_reg_class[output_reload],
1242 reload_reg_class[i]))
1243 && (MATCHES (reload_in[i], reload_out[output_reload])
1244 /* Args reversed because the first arg seems to be
1245 the one that we imagine being modified
1246 while the second is the one that might be affected. */
1247 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1249 /* However, if the input is a register that appears inside
1250 the output, then we also can't share.
1251 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1252 If the same reload reg is used for both reg 69 and the
1253 result to be stored in memory, then that result
1254 will clobber the address of the memory ref. */
1255 && ! (GET_CODE (reload_in[i]) == REG
1256 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1257 reload_out[output_reload])))))
1261 /* We have found a reload to combine with! */
1262 reload_out[i] = reload_out[output_reload];
1263 reload_outmode[i] = reload_outmode[output_reload];
1264 /* Mark the old output reload as inoperative. */
1265 reload_out[output_reload] = 0;
1266 /* The combined reload is needed for the entire insn. */
1267 reload_needed_for_multiple[i] = 1;
1268 reload_when_needed[i] = RELOAD_OTHER;
1269 /* If the output reload had a secondary reload, copy it. */
1270 if (reload_secondary_reload[output_reload] != -1)
1271 reload_secondary_reload[i] = reload_secondary_reload[output_reload];
1272 /* If required, minimize the register class. */
1273 if (reg_class_subset_p (reload_reg_class[output_reload],
1274 reload_reg_class[i]))
1275 reload_reg_class[i] = reload_reg_class[output_reload];
1277 /* Transfer all replacements from the old reload to the combined. */
1278 for (j = 0; j < n_replacements; j++)
1279 if (replacements[j].what == output_reload)
1280 replacements[j].what = i;
1285 /* If this insn has only one operand that is modified or written (assumed
1286 to be the first), it must be the one corresponding to this reload. It
1287 is safe to use anything that dies in this insn for that output provided
1288 that it does not occur in the output (we already know it isn't an
1289 earlyclobber. If this is an asm insn, give up. */
1291 if (INSN_CODE (this_insn) == -1)
1294 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1295 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1296 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1299 /* See if some hard register that dies in this insn and is not used in
1300 the output is the right class. Only works if the register we pick
1301 up can fully hold our output reload. */
1302 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1303 if (REG_NOTE_KIND (note) == REG_DEAD
1304 && GET_CODE (XEXP (note, 0)) == REG
1305 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1306 reload_out[output_reload])
1307 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1308 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1309 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1310 REGNO (XEXP (note, 0)))
1311 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1312 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1313 && ! fixed_regs[REGNO (XEXP (note, 0))])
1315 reload_reg_rtx[output_reload] = gen_rtx (REG,
1316 reload_outmode[output_reload],
1317 REGNO (XEXP (note, 0)));
1322 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1323 See if one of IN and OUT is a register that may be used;
1324 this is desirable since a spill-register won't be needed.
1325 If so, return the register rtx that proves acceptable.
1327 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1328 CLASS is the register class required for the reload.
1330 If FOR_REAL is >= 0, it is the number of the reload,
1331 and in some cases when it can be discovered that OUT doesn't need
1332 to be computed, clear out reload_out[FOR_REAL].
1334 If FOR_REAL is -1, this should not be done, because this call
1335 is just to see if a register can be found, not to find and install it. */
1338 find_dummy_reload (real_in, real_out, inloc, outloc, class, for_real)
1339 rtx real_in, real_out;
1340 rtx *inloc, *outloc;
1341 enum reg_class class;
1350 /* If operands exceed a word, we can't use either of them
1351 unless they have the same size. */
1352 if (GET_MODE_SIZE (GET_MODE (real_out)) != GET_MODE_SIZE (GET_MODE (real_in))
1353 && (GET_MODE_SIZE (GET_MODE (real_out)) > UNITS_PER_WORD
1354 || GET_MODE_SIZE (GET_MODE (real_in)) > UNITS_PER_WORD))
1357 /* Find the inside of any subregs. */
1358 while (GET_CODE (out) == SUBREG)
1360 out_offset = SUBREG_WORD (out);
1361 out = SUBREG_REG (out);
1363 while (GET_CODE (in) == SUBREG)
1365 in_offset = SUBREG_WORD (in);
1366 in = SUBREG_REG (in);
1369 /* Narrow down the reg class, the same way push_reload will;
1370 otherwise we might find a dummy now, but push_reload won't. */
1371 class = PREFERRED_RELOAD_CLASS (in, class);
1373 /* See if OUT will do. */
1374 if (GET_CODE (out) == REG
1375 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1377 register int regno = REGNO (out) + out_offset;
1378 int nwords = HARD_REGNO_NREGS (regno, GET_MODE (real_out));
1380 /* When we consider whether the insn uses OUT,
1381 ignore references within IN. They don't prevent us
1382 from copying IN into OUT, because those refs would
1383 move into the insn that reloads IN.
1385 However, we only ignore IN in its role as this reload.
1386 If the insn uses IN elsewhere and it contains OUT,
1387 that counts. We can't be sure it's the "same" operand
1388 so it might not go through this reload. */
1389 *inloc = const0_rtx;
1391 if (regno < FIRST_PSEUDO_REGISTER
1392 /* A fixed reg that can overlap other regs better not be used
1393 for reloading in any way. */
1394 #ifdef OVERLAPPING_REGNO_P
1395 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1397 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1398 PATTERN (this_insn), outloc))
1401 for (i = 0; i < nwords; i++)
1402 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1408 if (GET_CODE (real_out) == REG)
1411 value = gen_rtx (REG, GET_MODE (real_out), regno);
1418 /* Consider using IN if OUT was not acceptable
1419 or if OUT dies in this insn (like the quotient in a divmod insn).
1420 We can't use IN unless it is dies in this insn,
1421 which means we must know accurately which hard regs are live.
1422 Also, the result can't go in IN if IN is used within OUT. */
1423 if (hard_regs_live_known
1424 && GET_CODE (in) == REG
1425 && REGNO (in) < FIRST_PSEUDO_REGISTER
1427 || find_reg_note (this_insn, REG_UNUSED, real_out))
1428 && find_reg_note (this_insn, REG_DEAD, real_in)
1429 && !fixed_regs[REGNO (in)]
1430 && HARD_REGNO_MODE_OK (REGNO (in), GET_MODE (out)))
1432 register int regno = REGNO (in) + in_offset;
1433 int nwords = HARD_REGNO_NREGS (regno, GET_MODE (real_in));
1435 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1436 && ! hard_reg_set_here_p (regno, regno + nwords,
1437 PATTERN (this_insn)))
1440 for (i = 0; i < nwords; i++)
1441 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1447 /* If we were going to use OUT as the reload reg
1448 and changed our mind, it means OUT is a dummy that
1449 dies here. So don't bother copying value to it. */
1450 if (for_real >= 0 && value == real_out)
1451 reload_out[for_real] = 0;
1452 if (GET_CODE (real_in) == REG)
1455 value = gen_rtx (REG, GET_MODE (real_in), regno);
1463 /* This page contains subroutines used mainly for determining
1464 whether the IN or an OUT of a reload can serve as the
1467 /* Return 1 if expression X alters a hard reg in the range
1468 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1469 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1470 X should be the body of an instruction. */
1473 hard_reg_set_here_p (beg_regno, end_regno, x)
1474 register int beg_regno, end_regno;
1477 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1479 register rtx op0 = SET_DEST (x);
1480 while (GET_CODE (op0) == SUBREG)
1481 op0 = SUBREG_REG (op0);
1482 if (GET_CODE (op0) == REG)
1484 register int r = REGNO (op0);
1485 /* See if this reg overlaps range under consideration. */
1487 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1491 else if (GET_CODE (x) == PARALLEL)
1493 register int i = XVECLEN (x, 0) - 1;
1495 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1502 /* Return 1 if ADDR is a valid memory address for mode MODE,
1503 and check that each pseudo reg has the proper kind of
1507 strict_memory_address_p (mode, addr)
1508 enum machine_mode mode;
1511 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
1519 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1520 if they are the same hard reg, and has special hacks for
1521 autoincrement and autodecrement.
1522 This is specifically intended for find_reloads to use
1523 in determining whether two operands match.
1524 X is the operand whose number is the lower of the two.
1526 The value is 2 if Y contains a pre-increment that matches
1527 a non-incrementing address in X. */
1529 /* ??? To be completely correct, we should arrange to pass
1530 for X the output operand and for Y the input operand.
1531 For now, we assume that the output operand has the lower number
1532 because that is natural in (SET output (... input ...)). */
1535 operands_match_p (x, y)
1539 register RTX_CODE code = GET_CODE (x);
1545 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
1546 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
1547 && GET_CODE (SUBREG_REG (y)) == REG)))
1553 i = REGNO (SUBREG_REG (x));
1554 if (i >= FIRST_PSEUDO_REGISTER)
1556 i += SUBREG_WORD (x);
1561 if (GET_CODE (y) == SUBREG)
1563 j = REGNO (SUBREG_REG (y));
1564 if (j >= FIRST_PSEUDO_REGISTER)
1566 j += SUBREG_WORD (y);
1573 /* If two operands must match, because they are really a single
1574 operand of an assembler insn, then two postincrements are invalid
1575 because the assembler insn would increment only once.
1576 On the other hand, an postincrement matches ordinary indexing
1577 if the postincrement is the output operand. */
1578 if (code == POST_DEC || code == POST_INC)
1579 return operands_match_p (XEXP (x, 0), y);
1580 /* Two preincrements are invalid
1581 because the assembler insn would increment only once.
1582 On the other hand, an preincrement matches ordinary indexing
1583 if the preincrement is the input operand.
1584 In this case, return 2, since some callers need to do special
1585 things when this happens. */
1586 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
1587 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
1591 /* Now we have disposed of all the cases
1592 in which different rtx codes can match. */
1593 if (code != GET_CODE (y))
1595 if (code == LABEL_REF)
1596 return XEXP (x, 0) == XEXP (y, 0);
1597 if (code == SYMBOL_REF)
1598 return XSTR (x, 0) == XSTR (y, 0);
1600 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1602 if (GET_MODE (x) != GET_MODE (y))
1605 /* Compare the elements. If any pair of corresponding elements
1606 fail to match, return 0 for the whole things. */
1609 fmt = GET_RTX_FORMAT (code);
1610 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1616 if (XWINT (x, i) != XWINT (y, i))
1621 if (XINT (x, i) != XINT (y, i))
1626 val = operands_match_p (XEXP (x, i), XEXP (y, i));
1629 /* If any subexpression returns 2,
1630 we should return 2 if we are successful. */
1638 /* It is believed that rtx's at this level will never
1639 contain anything but integers and other rtx's,
1640 except for within LABEL_REFs and SYMBOL_REFs. */
1645 return 1 + success_2;
1648 /* Return the number of times character C occurs in string S. */
1651 n_occurrences (c, s)
1661 struct decomposition
1666 HOST_WIDE_INT start;
1670 /* Describe the range of registers or memory referenced by X.
1671 If X is a register, set REG_FLAG and put the first register
1672 number into START and the last plus one into END.
1673 If X is a memory reference, put a base address into BASE
1674 and a range of integer offsets into START and END.
1675 If X is pushing on the stack, we can assume it causes no trouble,
1676 so we set the SAFE field. */
1678 static struct decomposition
1682 struct decomposition val;
1687 if (GET_CODE (x) == MEM)
1689 rtx base, offset = 0;
1690 rtx addr = XEXP (x, 0);
1692 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
1693 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
1695 val.base = XEXP (addr, 0);
1696 val.start = - GET_MODE_SIZE (GET_MODE (x));
1697 val.end = GET_MODE_SIZE (GET_MODE (x));
1698 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
1702 if (GET_CODE (addr) == CONST)
1704 addr = XEXP (addr, 0);
1707 if (GET_CODE (addr) == PLUS)
1709 if (CONSTANT_P (XEXP (addr, 0)))
1711 base = XEXP (addr, 1);
1712 offset = XEXP (addr, 0);
1714 else if (CONSTANT_P (XEXP (addr, 1)))
1716 base = XEXP (addr, 0);
1717 offset = XEXP (addr, 1);
1724 offset = const0_rtx;
1726 if (GET_CODE (offset) == CONST)
1727 offset = XEXP (offset, 0);
1728 if (GET_CODE (offset) == PLUS)
1730 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
1732 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 1));
1733 offset = XEXP (offset, 0);
1735 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
1737 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 0));
1738 offset = XEXP (offset, 1);
1742 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
1743 offset = const0_rtx;
1746 else if (GET_CODE (offset) != CONST_INT)
1748 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
1749 offset = const0_rtx;
1752 if (all_const && GET_CODE (base) == PLUS)
1753 base = gen_rtx (CONST, GET_MODE (base), base);
1755 if (GET_CODE (offset) != CONST_INT)
1758 val.start = INTVAL (offset);
1759 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
1763 else if (GET_CODE (x) == REG)
1766 val.start = true_regnum (x);
1769 /* A pseudo with no hard reg. */
1770 val.start = REGNO (x);
1771 val.end = val.start + 1;
1775 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
1777 else if (GET_CODE (x) == SUBREG)
1779 if (GET_CODE (SUBREG_REG (x)) != REG)
1780 /* This could be more precise, but it's good enough. */
1781 return decompose (SUBREG_REG (x));
1783 val.start = true_regnum (x);
1785 return decompose (SUBREG_REG (x));
1788 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
1790 else if (CONSTANT_P (x)
1791 /* This hasn't been assigned yet, so it can't conflict yet. */
1792 || GET_CODE (x) == SCRATCH)
1799 /* Return 1 if altering Y will not modify the value of X.
1800 Y is also described by YDATA, which should be decompose (Y). */
1803 immune_p (x, y, ydata)
1805 struct decomposition ydata;
1807 struct decomposition xdata;
1810 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
1814 if (GET_CODE (y) != MEM)
1816 /* If Y is memory and X is not, Y can't affect X. */
1817 if (GET_CODE (x) != MEM)
1820 xdata = decompose (x);
1822 if (! rtx_equal_p (xdata.base, ydata.base))
1824 /* If bases are distinct symbolic constants, there is no overlap. */
1825 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
1827 /* Constants and stack slots never overlap. */
1828 if (CONSTANT_P (xdata.base)
1829 && (ydata.base == frame_pointer_rtx
1830 || ydata.base == stack_pointer_rtx))
1832 if (CONSTANT_P (ydata.base)
1833 && (xdata.base == frame_pointer_rtx
1834 || xdata.base == stack_pointer_rtx))
1836 /* If either base is variable, we don't know anything. */
1841 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
1844 /* Similar, but calls decompose. */
1847 safe_from_earlyclobber (op, clobber)
1850 struct decomposition early_data;
1852 early_data = decompose (clobber);
1853 return immune_p (op, clobber, early_data);
1856 /* Main entry point of this file: search the body of INSN
1857 for values that need reloading and record them with push_reload.
1858 REPLACE nonzero means record also where the values occur
1859 so that subst_reloads can be used.
1861 IND_LEVELS says how many levels of indirection are supported by this
1862 machine; a value of zero means that a memory reference is not a valid
1865 LIVE_KNOWN says we have valid information about which hard
1866 regs are live at each point in the program; this is true when
1867 we are called from global_alloc but false when stupid register
1868 allocation has been done.
1870 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
1871 which is nonnegative if the reg has been commandeered for reloading into.
1872 It is copied into STATIC_RELOAD_REG_P and referenced from there
1873 by various subroutines. */
1876 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
1878 int replace, ind_levels;
1880 short *reload_reg_p;
1882 rtx non_reloaded_operands[MAX_RECOG_OPERANDS];
1883 int n_non_reloaded_operands = 0;
1884 #ifdef REGISTER_CONSTRAINTS
1886 enum reload_modified { RELOAD_NOTHING, RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE };
1888 register int insn_code_number;
1891 /* These are the constraints for the insn. We don't change them. */
1892 char *constraints1[MAX_RECOG_OPERANDS];
1893 /* These start out as the constraints for the insn
1894 and they are chewed up as we consider alternatives. */
1895 char *constraints[MAX_RECOG_OPERANDS];
1896 /* These are the preferred classes for an operand, or NO_REGS if it isn't
1898 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
1899 char pref_or_nothing[MAX_RECOG_OPERANDS];
1900 /* Nonzero for a MEM operand whose entire address needs a reload. */
1901 int address_reloaded[MAX_RECOG_OPERANDS];
1902 int no_input_reloads = 0, no_output_reloads = 0;
1904 int this_alternative[MAX_RECOG_OPERANDS];
1905 char this_alternative_win[MAX_RECOG_OPERANDS];
1906 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
1907 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
1908 int this_alternative_matches[MAX_RECOG_OPERANDS];
1910 int goal_alternative[MAX_RECOG_OPERANDS];
1911 int this_alternative_number;
1912 int goal_alternative_number;
1913 int operand_reloadnum[MAX_RECOG_OPERANDS];
1914 int goal_alternative_matches[MAX_RECOG_OPERANDS];
1915 int goal_alternative_matched[MAX_RECOG_OPERANDS];
1916 char goal_alternative_win[MAX_RECOG_OPERANDS];
1917 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
1918 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
1919 int goal_alternative_swapped;
1920 enum reload_modified modified[MAX_RECOG_OPERANDS];
1923 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
1924 rtx substed_operand[MAX_RECOG_OPERANDS];
1925 rtx body = PATTERN (insn);
1926 rtx set = single_set (insn);
1927 int goal_earlyclobber, this_earlyclobber;
1928 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
1931 this_insn_is_asm = 0; /* Tentative. */
1935 n_earlyclobbers = 0;
1936 replace_reloads = replace;
1937 hard_regs_live_known = live_known;
1938 static_reload_reg_p = reload_reg_p;
1940 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
1941 neither are insns that SET cc0. Insns that use CC0 are not allowed
1942 to have any input reloads. */
1943 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
1944 no_output_reloads = 1;
1947 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
1948 no_input_reloads = 1;
1949 if (reg_set_p (cc0_rtx, PATTERN (insn)))
1950 no_output_reloads = 1;
1953 #ifdef SECONDARY_MEMORY_NEEDED
1954 /* The eliminated forms of any secondary memory locations are per-insn, so
1955 clear them out here. */
1957 bzero (secondary_memlocs_elim, sizeof secondary_memlocs_elim);
1960 /* Find what kind of insn this is. NOPERANDS gets number of operands.
1961 Make OPERANDS point to a vector of operand values.
1962 Make OPERAND_LOCS point to a vector of pointers to
1963 where the operands were found.
1964 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
1965 constraint-strings for this insn.
1966 Return if the insn needs no reload processing. */
1968 switch (GET_CODE (body))
1978 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
1979 is cheap to move between them. If it is not, there may not be an insn
1980 to do the copy, so we may need a reload. */
1981 if (GET_CODE (SET_DEST (body)) == REG
1982 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
1983 && GET_CODE (SET_SRC (body)) == REG
1984 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
1985 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
1986 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
1990 noperands = asm_noperands (body);
1993 /* This insn is an `asm' with operands. */
1995 insn_code_number = -1;
1996 this_insn_is_asm = 1;
1998 /* expand_asm_operands makes sure there aren't too many operands. */
1999 if (noperands > MAX_RECOG_OPERANDS)
2002 /* Now get the operand values and constraints out of the insn. */
2004 decode_asm_operands (body, recog_operand, recog_operand_loc,
2005 constraints, operand_mode);
2008 bcopy (constraints, constraints1, noperands * sizeof (char *));
2009 n_alternatives = n_occurrences (',', constraints[0]) + 1;
2010 for (i = 1; i < noperands; i++)
2011 if (n_alternatives != n_occurrences (',', constraints[i]) + 1)
2013 error_for_asm (insn, "operand constraints differ in number of alternatives");
2014 /* Avoid further trouble with this insn. */
2015 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
2024 /* Ordinary insn: recognize it, get the operands via insn_extract
2025 and get the constraints. */
2027 insn_code_number = recog_memoized (insn);
2028 if (insn_code_number < 0)
2029 fatal_insn_not_found (insn);
2031 noperands = insn_n_operands[insn_code_number];
2032 n_alternatives = insn_n_alternatives[insn_code_number];
2033 /* Just return "no reloads" if insn has no operands with constraints. */
2034 if (n_alternatives == 0)
2036 insn_extract (insn);
2037 for (i = 0; i < noperands; i++)
2039 constraints[i] = constraints1[i]
2040 = insn_operand_constraint[insn_code_number][i];
2041 operand_mode[i] = insn_operand_mode[insn_code_number][i];
2050 /* If we will need to know, later, whether some pair of operands
2051 are the same, we must compare them now and save the result.
2052 Reloading the base and index registers will clobber them
2053 and afterward they will fail to match. */
2055 for (i = 0; i < noperands; i++)
2060 substed_operand[i] = recog_operand[i];
2063 /* Scan this operand's constraint to see if it should match another. */
2068 /* The last operand should not be marked commutative. */
2069 if (i == noperands - 1)
2071 if (this_insn_is_asm)
2072 warning_for_asm (this_insn,
2073 "`%%' constraint used with last operand");
2080 else if (c >= '0' && c <= '9')
2083 operands_match[c][i]
2084 = operands_match_p (recog_operand[c], recog_operand[i]);
2085 /* If C can be commuted with C+1, and C might need to match I,
2086 then C+1 might also need to match I. */
2087 if (commutative >= 0)
2089 if (c == commutative || c == commutative + 1)
2091 int other = c + (c == commutative ? 1 : -1);
2092 operands_match[other][i]
2093 = operands_match_p (recog_operand[other], recog_operand[i]);
2095 if (i == commutative || i == commutative + 1)
2097 int other = i + (i == commutative ? 1 : -1);
2098 operands_match[c][other]
2099 = operands_match_p (recog_operand[c], recog_operand[other]);
2101 /* Note that C is supposed to be less than I.
2102 No need to consider altering both C and I
2103 because in that case we would alter one into the other. */
2108 /* Examine each operand that is a memory reference or memory address
2109 and reload parts of the addresses into index registers.
2110 While we are at it, initialize the array `modified'.
2111 Also here any references to pseudo regs that didn't get hard regs
2112 but are equivalent to constants get replaced in the insn itself
2113 with those constants. Nobody will ever see them again.
2115 Finally, set up the preferred classes of each operand. */
2117 for (i = 0; i < noperands; i++)
2119 register RTX_CODE code = GET_CODE (recog_operand[i]);
2120 modified[i] = RELOAD_READ;
2121 address_reloaded[i] = 0;
2123 if (constraints[i][0] == 'p')
2125 find_reloads_address (VOIDmode, NULL_PTR,
2126 recog_operand[i], recog_operand_loc[i],
2127 recog_operand[i], ind_levels);
2128 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2130 else if (code == MEM)
2132 if (find_reloads_address (GET_MODE (recog_operand[i]),
2133 recog_operand_loc[i],
2134 XEXP (recog_operand[i], 0),
2135 &XEXP (recog_operand[i], 0),
2136 recog_operand[i], ind_levels))
2137 address_reloaded[i] = 1;
2138 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2140 else if (code == SUBREG)
2141 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2142 = find_reloads_toplev (recog_operand[i], ind_levels,
2144 && &SET_DEST (set) == recog_operand_loc[i]);
2145 else if (code == REG)
2147 /* This is equivalent to calling find_reloads_toplev.
2148 The code is duplicated for speed.
2149 When we find a pseudo always equivalent to a constant,
2150 we replace it by the constant. We must be sure, however,
2151 that we don't try to replace it in the insn in which it
2153 register int regno = REGNO (recog_operand[i]);
2154 if (reg_equiv_constant[regno] != 0
2155 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2156 substed_operand[i] = recog_operand[i]
2157 = reg_equiv_constant[regno];
2158 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2159 that feeds this insn. */
2160 if (reg_equiv_mem[regno] != 0)
2161 substed_operand[i] = recog_operand[i]
2162 = reg_equiv_mem[regno];
2164 if (reg_equiv_address[regno] != 0)
2166 /* If reg_equiv_address is not a constant address, copy it,
2167 since it may be shared. */
2168 rtx address = reg_equiv_address[regno];
2170 if (rtx_varies_p (address))
2171 address = copy_rtx (address);
2173 /* If this is an output operand, we must output a CLOBBER
2174 after INSN so find_equiv_reg knows REGNO is being written. */
2175 if (constraints[i][0] == '='
2176 || constraints[i][0] == '+')
2177 emit_insn_after (gen_rtx (CLOBBER, VOIDmode, recog_operand[i]),
2180 *recog_operand_loc[i] = recog_operand[i]
2181 = gen_rtx (MEM, GET_MODE (recog_operand[i]), address);
2182 RTX_UNCHANGING_P (recog_operand[i])
2183 = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
2184 find_reloads_address (GET_MODE (recog_operand[i]),
2185 recog_operand_loc[i],
2186 XEXP (recog_operand[i], 0),
2187 &XEXP (recog_operand[i], 0),
2188 recog_operand[i], ind_levels);
2189 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2192 /* If the operand is still a register (we didn't replace it with an
2193 equivalent), get the preferred class to reload it into. */
2194 code = GET_CODE (recog_operand[i]);
2196 = ((code == REG && REGNO (recog_operand[i]) > FIRST_PSEUDO_REGISTER)
2197 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2199 = (code == REG && REGNO (recog_operand[i]) > FIRST_PSEUDO_REGISTER
2200 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2203 /* If this is simply a copy from operand 1 to operand 0, merge the
2204 preferred classes for the operands. */
2205 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2206 && recog_operand[1] == SET_SRC (set))
2208 preferred_class[0] = preferred_class[1]
2209 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2210 pref_or_nothing[0] |= pref_or_nothing[1];
2211 pref_or_nothing[1] |= pref_or_nothing[0];
2214 /* Now see what we need for pseudo-regs that didn't get hard regs
2215 or got the wrong kind of hard reg. For this, we must consider
2216 all the operands together against the register constraints. */
2218 best = MAX_RECOG_OPERANDS + 300;
2221 goal_alternative_swapped = 0;
2224 /* The constraints are made of several alternatives.
2225 Each operand's constraint looks like foo,bar,... with commas
2226 separating the alternatives. The first alternatives for all
2227 operands go together, the second alternatives go together, etc.
2229 First loop over alternatives. */
2231 for (this_alternative_number = 0;
2232 this_alternative_number < n_alternatives;
2233 this_alternative_number++)
2235 /* Loop over operands for one constraint alternative. */
2236 /* LOSERS counts those that don't fit this alternative
2237 and would require loading. */
2239 /* BAD is set to 1 if it some operand can't fit this alternative
2240 even after reloading. */
2242 /* REJECT is a count of how undesirable this alternative says it is
2243 if any reloading is required. If the alternative matches exactly
2244 then REJECT is ignored, but otherwise it gets this much
2245 counted against it in addition to the reloading needed. Each
2246 ? counts three times here since we want the disparaging caused by
2247 a bad register class to only count 1/3 as much. */
2250 this_earlyclobber = 0;
2252 for (i = 0; i < noperands; i++)
2254 register char *p = constraints[i];
2255 register int win = 0;
2256 /* 0 => this operand can be reloaded somehow for this alternative */
2258 /* 0 => this operand can be reloaded if the alternative allows regs. */
2261 register rtx operand = recog_operand[i];
2263 /* Nonzero means this is a MEM that must be reloaded into a reg
2264 regardless of what the constraint says. */
2265 int force_reload = 0;
2267 int earlyclobber = 0;
2269 /* If the operand is a SUBREG, extract
2270 the REG or MEM (or maybe even a constant) within.
2271 (Constants can occur as a result of reg_equiv_constant.) */
2273 while (GET_CODE (operand) == SUBREG)
2275 offset += SUBREG_WORD (operand);
2276 operand = SUBREG_REG (operand);
2277 /* Force reload if this is not a register or if there may may
2278 be a problem accessing the register in the outer mode. */
2279 if (GET_CODE (operand) != REG
2280 #ifdef BYTE_LOADS_ZERO_EXTEND
2281 /* Nonparadoxical subreg of a pseudoreg.
2282 Don't to load the full width if on this machine
2283 we expected the fetch to zero-extend. */
2284 || ((GET_MODE_SIZE (operand_mode[i])
2285 > GET_MODE_SIZE (GET_MODE (operand)))
2286 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
2287 #endif /* BYTE_LOADS_ZERO_EXTEND */
2288 /* Subreg of a hard reg which can't handle the subreg's mode
2289 or which would handle that mode in the wrong number of
2290 registers for subregging to work. */
2291 || (REGNO (operand) < FIRST_PSEUDO_REGISTER
2292 && (! HARD_REGNO_MODE_OK (REGNO (operand),
2294 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2295 && (GET_MODE_SIZE (GET_MODE (operand))
2297 && ((GET_MODE_SIZE (GET_MODE (operand))
2299 != HARD_REGNO_NREGS (REGNO (operand),
2300 GET_MODE (operand)))))))
2304 this_alternative[i] = (int) NO_REGS;
2305 this_alternative_win[i] = 0;
2306 this_alternative_offmemok[i] = 0;
2307 this_alternative_earlyclobber[i] = 0;
2308 this_alternative_matches[i] = -1;
2310 /* An empty constraint or empty alternative
2311 allows anything which matched the pattern. */
2312 if (*p == 0 || *p == ',')
2315 /* Scan this alternative's specs for this operand;
2316 set WIN if the operand fits any letter in this alternative.
2317 Otherwise, clear BADOP if this operand could
2318 fit some letter after reloads,
2319 or set WINREG if this operand could fit after reloads
2320 provided the constraint allows some registers. */
2322 while (*p && (c = *p++) != ',')
2326 modified[i] = RELOAD_WRITE;
2330 modified[i] = RELOAD_READ_WRITE;
2349 /* Ignore rest of this alternative as far as
2350 reloading is concerned. */
2351 while (*p && *p != ',') p++;
2360 this_alternative_matches[i] = c;
2361 /* We are supposed to match a previous operand.
2362 If we do, we win if that one did.
2363 If we do not, count both of the operands as losers.
2364 (This is too conservative, since most of the time
2365 only a single reload insn will be needed to make
2366 the two operands win. As a result, this alternative
2367 may be rejected when it is actually desirable.) */
2368 if ((swapped && (c != commutative || i != commutative + 1))
2369 /* If we are matching as if two operands were swapped,
2370 also pretend that operands_match had been computed
2372 But if I is the second of those and C is the first,
2373 don't exchange them, because operands_match is valid
2374 only on one side of its diagonal. */
2376 [(c == commutative || c == commutative + 1)
2377 ? 2*commutative + 1 - c : c]
2378 [(i == commutative || i == commutative + 1)
2379 ? 2*commutative + 1 - i : i])
2380 : operands_match[c][i])
2381 win = this_alternative_win[c];
2384 /* Operands don't match. */
2386 /* Retroactively mark the operand we had to match
2387 as a loser, if it wasn't already. */
2388 if (this_alternative_win[c])
2390 this_alternative_win[c] = 0;
2391 if (this_alternative[c] == (int) NO_REGS)
2393 /* But count the pair only once in the total badness of
2394 this alternative, if the pair can be a dummy reload. */
2396 = find_dummy_reload (recog_operand[i], recog_operand[c],
2397 recog_operand_loc[i], recog_operand_loc[c],
2398 this_alternative[c], -1);
2403 /* This can be fixed with reloads if the operand
2404 we are supposed to match can be fixed with reloads. */
2406 this_alternative[i] = this_alternative[c];
2410 /* All necessary reloads for an address_operand
2411 were handled in find_reloads_address. */
2412 this_alternative[i] = (int) ALL_REGS;
2419 if (GET_CODE (operand) == MEM
2420 || (GET_CODE (operand) == REG
2421 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2422 && reg_renumber[REGNO (operand)] < 0))
2424 if (CONSTANT_P (operand))
2429 if (GET_CODE (operand) == MEM
2430 && ! address_reloaded[i]
2431 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2432 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2437 if (GET_CODE (operand) == MEM
2438 && ! address_reloaded[i]
2439 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2440 || GET_CODE (XEXP (operand, 0)) == POST_INC))
2444 /* Memory operand whose address is not offsettable. */
2448 if (GET_CODE (operand) == MEM
2449 && ! (ind_levels ? offsettable_memref_p (operand)
2450 : offsettable_nonstrict_memref_p (operand))
2451 /* Certain mem addresses will become offsettable
2452 after they themselves are reloaded. This is important;
2453 we don't want our own handling of unoffsettables
2454 to override the handling of reg_equiv_address. */
2455 && !(GET_CODE (XEXP (operand, 0)) == REG
2457 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
2461 /* Memory operand whose address is offsettable. */
2465 if ((GET_CODE (operand) == MEM
2466 /* If IND_LEVELS, find_reloads_address won't reload a
2467 pseudo that didn't get a hard reg, so we have to
2468 reject that case. */
2469 && (ind_levels ? offsettable_memref_p (operand)
2470 : offsettable_nonstrict_memref_p (operand)))
2471 /* Certain mem addresses will become offsettable
2472 after they themselves are reloaded. This is important;
2473 we don't want our own handling of unoffsettables
2474 to override the handling of reg_equiv_address. */
2475 || (GET_CODE (operand) == MEM
2476 && GET_CODE (XEXP (operand, 0)) == REG
2478 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))
2479 || (GET_CODE (operand) == REG
2480 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2481 && reg_renumber[REGNO (operand)] < 0))
2483 if (CONSTANT_P (operand) || GET_CODE (operand) == MEM)
2489 /* Output operand that is stored before the need for the
2490 input operands (and their index registers) is over. */
2491 earlyclobber = 1, this_earlyclobber = 1;
2495 /* Match any floating double constant, but only if
2496 we can examine the bits of it reliably. */
2497 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
2498 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
2499 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
2501 if (GET_CODE (operand) == CONST_DOUBLE)
2506 if (GET_CODE (operand) == CONST_DOUBLE)
2512 if (GET_CODE (operand) == CONST_DOUBLE
2513 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
2518 if (GET_CODE (operand) == CONST_INT
2519 || (GET_CODE (operand) == CONST_DOUBLE
2520 && GET_MODE (operand) == VOIDmode))
2523 if (CONSTANT_P (operand)
2524 #ifdef LEGITIMATE_PIC_OPERAND_P
2525 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
2532 if (GET_CODE (operand) == CONST_INT
2533 || (GET_CODE (operand) == CONST_DOUBLE
2534 && GET_MODE (operand) == VOIDmode))
2546 if (GET_CODE (operand) == CONST_INT
2547 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
2557 /* A PLUS is never a valid operand, but reload can make
2558 it from a register when eliminating registers. */
2559 && GET_CODE (operand) != PLUS
2560 /* A SCRATCH is not a valid operand. */
2561 && GET_CODE (operand) != SCRATCH
2562 #ifdef LEGITIMATE_PIC_OPERAND_P
2563 && (! CONSTANT_P (operand)
2565 || LEGITIMATE_PIC_OPERAND_P (operand))
2567 && (GENERAL_REGS == ALL_REGS
2568 || GET_CODE (operand) != REG
2569 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
2570 && reg_renumber[REGNO (operand)] < 0)))
2572 /* Drop through into 'r' case */
2576 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
2579 #ifdef EXTRA_CONSTRAINT
2585 if (EXTRA_CONSTRAINT (operand, c))
2592 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
2595 if (GET_MODE (operand) == BLKmode)
2598 if (GET_CODE (operand) == REG
2599 && reg_fits_class_p (operand, this_alternative[i],
2600 offset, GET_MODE (recog_operand[i])))
2607 /* If this operand could be handled with a reg,
2608 and some reg is allowed, then this operand can be handled. */
2609 if (winreg && this_alternative[i] != (int) NO_REGS)
2612 /* Record which operands fit this alternative. */
2613 this_alternative_earlyclobber[i] = earlyclobber;
2614 if (win && ! force_reload)
2615 this_alternative_win[i] = 1;
2618 this_alternative_offmemok[i] = offmemok;
2622 /* Alternative loses if it has no regs for a reg operand. */
2623 if (GET_CODE (operand) == REG
2624 && this_alternative[i] == (int) NO_REGS
2625 && this_alternative_matches[i] < 0)
2628 /* Alternative loses if it requires a type of reload not
2629 permitted for this insn. We can always reload SCRATCH
2630 and objects with a REG_UNUSED note. */
2631 if (GET_CODE (operand) != SCRATCH && modified[i] != RELOAD_READ
2632 && no_output_reloads
2633 && ! find_reg_note (insn, REG_UNUSED, operand))
2635 else if (modified[i] != RELOAD_WRITE && no_input_reloads)
2638 /* We prefer to reload pseudos over reloading other things,
2639 since such reloads may be able to be eliminated later.
2640 If we are reloading a SCRATCH, we won't be generating any
2641 insns, just using a register, so it is also preferred.
2642 So bump REJECT in other cases. */
2643 if (GET_CODE (operand) != REG && GET_CODE (operand) != SCRATCH)
2647 /* If this operand is a pseudo register that didn't get a hard
2648 reg and this alternative accepts some register, see if the
2649 class that we want is a subset of the preferred class for this
2650 register. If not, but it intersects that class, use the
2651 preferred class instead. If it does not intersect the preferred
2652 class, show that usage of this alternative should be discouraged;
2653 it will be discouraged more still if the register is `preferred
2654 or nothing'. We do this because it increases the chance of
2655 reusing our spill register in a later insn and avoiding a pair
2656 of memory stores and loads.
2658 Don't bother with this if this alternative will accept this
2661 Don't do this if the preferred class has only one register
2662 because we might otherwise exhaust the class. */
2665 if (! win && this_alternative[i] != (int) NO_REGS
2666 && reg_class_size[(int) preferred_class[i]] > 1)
2668 if (! reg_class_subset_p (this_alternative[i],
2669 preferred_class[i]))
2671 /* Since we don't have a way of forming the intersection,
2672 we just do something special if the preferred class
2673 is a subset of the class we have; that's the most
2674 common case anyway. */
2675 if (reg_class_subset_p (preferred_class[i],
2676 this_alternative[i]))
2677 this_alternative[i] = (int) preferred_class[i];
2679 reject += (1 + pref_or_nothing[i]);
2684 /* Now see if any output operands that are marked "earlyclobber"
2685 in this alternative conflict with any input operands
2686 or any memory addresses. */
2688 for (i = 0; i < noperands; i++)
2689 if (this_alternative_earlyclobber[i]
2690 && this_alternative_win[i])
2692 struct decomposition early_data;
2695 early_data = decompose (recog_operand[i]);
2697 if (modified[i] == RELOAD_READ)
2699 if (this_insn_is_asm)
2700 warning_for_asm (this_insn,
2701 "`&' constraint used with input operand");
2707 if (this_alternative[i] == NO_REGS)
2709 this_alternative_earlyclobber[i] = 0;
2710 if (this_insn_is_asm)
2711 error_for_asm (this_insn,
2712 "`&' constraint used with no register class");
2717 for (j = 0; j < noperands; j++)
2718 /* Is this an input operand or a memory ref? */
2719 if ((GET_CODE (recog_operand[j]) == MEM
2720 || modified[j] != RELOAD_WRITE)
2722 /* Ignore things like match_operator operands. */
2723 && *constraints1[j] != 0
2724 /* Don't count an input operand that is constrained to match
2725 the early clobber operand. */
2726 && ! (this_alternative_matches[j] == i
2727 && rtx_equal_p (recog_operand[i], recog_operand[j]))
2728 /* Is it altered by storing the earlyclobber operand? */
2729 && !immune_p (recog_operand[j], recog_operand[i], early_data))
2731 /* If the output is in a single-reg class,
2732 it's costly to reload it, so reload the input instead. */
2733 if (reg_class_size[this_alternative[i]] == 1
2734 && (GET_CODE (recog_operand[j]) == REG
2735 || GET_CODE (recog_operand[j]) == SUBREG))
2738 this_alternative_win[j] = 0;
2743 /* If an earlyclobber operand conflicts with something,
2744 it must be reloaded, so request this and count the cost. */
2748 this_alternative_win[i] = 0;
2749 for (j = 0; j < noperands; j++)
2750 if (this_alternative_matches[j] == i
2751 && this_alternative_win[j])
2753 this_alternative_win[j] = 0;
2759 /* If one alternative accepts all the operands, no reload required,
2760 choose that alternative; don't consider the remaining ones. */
2763 /* Unswap these so that they are never swapped at `finish'. */
2764 if (commutative >= 0)
2766 recog_operand[commutative] = substed_operand[commutative];
2767 recog_operand[commutative + 1]
2768 = substed_operand[commutative + 1];
2770 for (i = 0; i < noperands; i++)
2772 goal_alternative_win[i] = 1;
2773 goal_alternative[i] = this_alternative[i];
2774 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
2775 goal_alternative_matches[i] = this_alternative_matches[i];
2776 goal_alternative_earlyclobber[i]
2777 = this_alternative_earlyclobber[i];
2779 goal_alternative_number = this_alternative_number;
2780 goal_alternative_swapped = swapped;
2781 goal_earlyclobber = this_earlyclobber;
2785 /* REJECT, set by the ! and ? constraint characters and when a register
2786 would be reloaded into a non-preferred class, discourages the use of
2787 this alternative for a reload goal. REJECT is incremented by three
2788 for each ? and one for each non-preferred class. */
2789 losers = losers * 3 + reject;
2791 /* If this alternative can be made to work by reloading,
2792 and it needs less reloading than the others checked so far,
2793 record it as the chosen goal for reloading. */
2794 if (! bad && best > losers)
2796 for (i = 0; i < noperands; i++)
2798 goal_alternative[i] = this_alternative[i];
2799 goal_alternative_win[i] = this_alternative_win[i];
2800 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
2801 goal_alternative_matches[i] = this_alternative_matches[i];
2802 goal_alternative_earlyclobber[i]
2803 = this_alternative_earlyclobber[i];
2805 goal_alternative_swapped = swapped;
2807 goal_alternative_number = this_alternative_number;
2808 goal_earlyclobber = this_earlyclobber;
2812 /* If insn is commutative (it's safe to exchange a certain pair of operands)
2813 then we need to try each alternative twice,
2814 the second time matching those two operands
2815 as if we had exchanged them.
2816 To do this, really exchange them in operands.
2818 If we have just tried the alternatives the second time,
2819 return operands to normal and drop through. */
2821 if (commutative >= 0)
2826 register enum reg_class tclass;
2829 recog_operand[commutative] = substed_operand[commutative + 1];
2830 recog_operand[commutative + 1] = substed_operand[commutative];
2832 tclass = preferred_class[commutative];
2833 preferred_class[commutative] = preferred_class[commutative + 1];
2834 preferred_class[commutative + 1] = tclass;
2836 t = pref_or_nothing[commutative];
2837 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
2838 pref_or_nothing[commutative + 1] = t;
2840 bcopy (constraints1, constraints, noperands * sizeof (char *));
2845 recog_operand[commutative] = substed_operand[commutative];
2846 recog_operand[commutative + 1] = substed_operand[commutative + 1];
2850 /* The operands don't meet the constraints.
2851 goal_alternative describes the alternative
2852 that we could reach by reloading the fewest operands.
2853 Reload so as to fit it. */
2855 if (best == MAX_RECOG_OPERANDS + 300)
2857 /* No alternative works with reloads?? */
2858 if (insn_code_number >= 0)
2860 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
2861 /* Avoid further trouble with this insn. */
2862 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
2867 /* Jump to `finish' from above if all operands are valid already.
2868 In that case, goal_alternative_win is all 1. */
2871 /* Right now, for any pair of operands I and J that are required to match,
2873 goal_alternative_matches[J] is I.
2874 Set up goal_alternative_matched as the inverse function:
2875 goal_alternative_matched[I] = J. */
2877 for (i = 0; i < noperands; i++)
2878 goal_alternative_matched[i] = -1;
2880 for (i = 0; i < noperands; i++)
2881 if (! goal_alternative_win[i]
2882 && goal_alternative_matches[i] >= 0)
2883 goal_alternative_matched[goal_alternative_matches[i]] = i;
2885 /* If the best alternative is with operands 1 and 2 swapped,
2886 consider them swapped before reporting the reloads. */
2888 if (goal_alternative_swapped)
2892 tem = substed_operand[commutative];
2893 substed_operand[commutative] = substed_operand[commutative + 1];
2894 substed_operand[commutative + 1] = tem;
2895 tem = recog_operand[commutative];
2896 recog_operand[commutative] = recog_operand[commutative + 1];
2897 recog_operand[commutative + 1] = tem;
2900 /* Perform whatever substitutions on the operands we are supposed
2901 to make due to commutativity or replacement of registers
2902 with equivalent constants or memory slots. */
2904 for (i = 0; i < noperands; i++)
2906 *recog_operand_loc[i] = substed_operand[i];
2907 /* While we are looping on operands, initialize this. */
2908 operand_reloadnum[i] = -1;
2911 /* Any constants that aren't allowed and can't be reloaded
2912 into registers are here changed into memory references. */
2913 for (i = 0; i < noperands; i++)
2914 if (! goal_alternative_win[i]
2915 && CONSTANT_P (recog_operand[i])
2916 && (PREFERRED_RELOAD_CLASS (recog_operand[i],
2917 (enum reg_class) goal_alternative[i])
2919 && operand_mode[i] != VOIDmode)
2921 *recog_operand_loc[i] = recog_operand[i]
2922 = find_reloads_toplev (force_const_mem (operand_mode[i],
2925 if (alternative_allows_memconst (constraints1[i],
2926 goal_alternative_number))
2927 goal_alternative_win[i] = 1;
2930 /* Now record reloads for all the operands that need them. */
2931 for (i = 0; i < noperands; i++)
2932 if (! goal_alternative_win[i])
2934 /* Operands that match previous ones have already been handled. */
2935 if (goal_alternative_matches[i] >= 0)
2937 /* Handle an operand with a nonoffsettable address
2938 appearing where an offsettable address will do
2939 by reloading the address into a base register. */
2940 else if (goal_alternative_matched[i] == -1
2941 && goal_alternative_offmemok[i]
2942 && GET_CODE (recog_operand[i]) == MEM)
2944 operand_reloadnum[i]
2945 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
2946 &XEXP (recog_operand[i], 0), NULL_PTR,
2947 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
2948 VOIDmode, 0, 0, NULL_RTX);
2949 reload_inc[operand_reloadnum[i]]
2950 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
2952 else if (goal_alternative_matched[i] == -1)
2953 operand_reloadnum[i] =
2954 push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
2955 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
2956 modified[i] != RELOAD_WRITE ? recog_operand_loc[i] : 0,
2957 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
2958 (enum reg_class) goal_alternative[i],
2959 (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]),
2960 (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]),
2961 (insn_code_number < 0 ? 0
2962 : insn_operand_strict_low[insn_code_number][i]),
2964 /* In a matching pair of operands, one must be input only
2965 and the other must be output only.
2966 Pass the input operand as IN and the other as OUT. */
2967 else if (modified[i] == RELOAD_READ
2968 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
2970 operand_reloadnum[i]
2971 = push_reload (recog_operand[i],
2972 recog_operand[goal_alternative_matched[i]],
2973 recog_operand_loc[i],
2974 recog_operand_loc[goal_alternative_matched[i]],
2975 (enum reg_class) goal_alternative[i],
2977 operand_mode[goal_alternative_matched[i]],
2979 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
2981 else if (modified[i] == RELOAD_WRITE
2982 && modified[goal_alternative_matched[i]] == RELOAD_READ)
2984 operand_reloadnum[goal_alternative_matched[i]]
2985 = push_reload (recog_operand[goal_alternative_matched[i]],
2987 recog_operand_loc[goal_alternative_matched[i]],
2988 recog_operand_loc[i],
2989 (enum reg_class) goal_alternative[i],
2990 operand_mode[goal_alternative_matched[i]],
2993 operand_reloadnum[i] = output_reloadnum;
2995 else if (insn_code_number >= 0)
2999 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3000 /* Avoid further trouble with this insn. */
3001 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3006 else if (goal_alternative_matched[i] < 0
3007 && goal_alternative_matches[i] < 0
3010 rtx operand = recog_operand[i];
3011 /* For each non-matching operand that's a pseudo-register
3012 that didn't get a hard register, make an optional reload.
3013 This may get done even if the insn needs no reloads otherwise. */
3014 /* (It would be safe to make an optional reload for a matching pair
3015 of operands, but we don't bother yet.) */
3016 while (GET_CODE (operand) == SUBREG)
3017 operand = XEXP (operand, 0);
3018 if (GET_CODE (operand) == REG
3019 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3020 && reg_renumber[REGNO (operand)] < 0
3021 && (enum reg_class) goal_alternative[i] != NO_REGS
3022 /* Don't make optional output reloads for jump insns
3023 (such as aobjeq on the vax). */
3024 && (modified[i] == RELOAD_READ
3025 || GET_CODE (insn) != JUMP_INSN))
3026 operand_reloadnum[i]
3027 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3028 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3029 modified[i] != RELOAD_WRITE ? recog_operand_loc[i] : 0,
3030 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
3031 (enum reg_class) goal_alternative[i],
3032 (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]),
3033 (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]),
3034 (insn_code_number < 0 ? 0
3035 : insn_operand_strict_low[insn_code_number][i]),
3037 /* Make an optional reload for an explicit mem ref. */
3038 else if (GET_CODE (operand) == MEM
3039 && (enum reg_class) goal_alternative[i] != NO_REGS
3040 /* Don't make optional output reloads for jump insns
3041 (such as aobjeq on the vax). */
3042 && (modified[i] == RELOAD_READ
3043 || GET_CODE (insn) != JUMP_INSN))
3044 operand_reloadnum[i]
3045 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3046 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3047 modified[i] != RELOAD_WRITE ? recog_operand_loc[i] : 0,
3048 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
3049 (enum reg_class) goal_alternative[i],
3050 (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]),
3051 (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]),
3052 (insn_code_number < 0 ? 0
3053 : insn_operand_strict_low[insn_code_number][i]),
3056 non_reloaded_operands[n_non_reloaded_operands++] = recog_operand[i];
3058 else if (goal_alternative_matched[i] < 0
3059 && goal_alternative_matches[i] < 0)
3060 non_reloaded_operands[n_non_reloaded_operands++] = recog_operand[i];
3062 /* Record the values of the earlyclobber operands for the caller. */
3063 if (goal_earlyclobber)
3064 for (i = 0; i < noperands; i++)
3065 if (goal_alternative_earlyclobber[i])
3066 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3068 /* If this insn pattern contains any MATCH_DUP's, make sure that
3069 they will be substituted if the operands they match are substituted.
3070 Also do now any substitutions we already did on the operands.
3072 Don't do this if we aren't making replacements because we might be
3073 propagating things allocated by frame pointer elimination into places
3074 it doesn't expect. */
3076 if (insn_code_number >= 0 && replace)
3077 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3079 int opno = recog_dup_num[i];
3080 *recog_dup_loc[i] = *recog_operand_loc[opno];
3081 if (operand_reloadnum[opno] >= 0)
3082 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3083 insn_operand_mode[insn_code_number][opno]);
3087 /* This loses because reloading of prior insns can invalidate the equivalence
3088 (or at least find_equiv_reg isn't smart enough to find it any more),
3089 causing this insn to need more reload regs than it needed before.
3090 It may be too late to make the reload regs available.
3091 Now this optimization is done safely in choose_reload_regs. */
3093 /* For each reload of a reg into some other class of reg,
3094 search for an existing equivalent reg (same value now) in the right class.
3095 We can use it as long as we don't need to change its contents. */
3096 for (i = 0; i < n_reloads; i++)
3097 if (reload_reg_rtx[i] == 0
3098 && reload_in[i] != 0
3099 && GET_CODE (reload_in[i]) == REG
3100 && reload_out[i] == 0)
3103 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3104 static_reload_reg_p, 0, reload_inmode[i]);
3105 /* Prevent generation of insn to load the value
3106 because the one we found already has the value. */
3107 if (reload_reg_rtx[i])
3108 reload_in[i] = reload_reg_rtx[i];
3112 #else /* no REGISTER_CONSTRAINTS */
3114 int insn_code_number;
3115 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
3117 rtx body = PATTERN (insn);
3121 n_earlyclobbers = 0;
3122 replace_reloads = replace;
3125 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3126 Store the operand values in RECOG_OPERAND and the locations
3127 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3128 Return if the insn needs no reload processing. */
3130 switch (GET_CODE (body))
3141 noperands = asm_noperands (body);
3144 /* This insn is an `asm' with operands.
3145 First, find out how many operands, and allocate space. */
3147 insn_code_number = -1;
3148 /* ??? This is a bug! ???
3149 Give up and delete this insn if it has too many operands. */
3150 if (noperands > MAX_RECOG_OPERANDS)
3153 /* Now get the operand values out of the insn. */
3155 decode_asm_operands (body, recog_operand, recog_operand_loc,
3156 NULL_PTR, NULL_PTR);
3161 /* Ordinary insn: recognize it, allocate space for operands and
3162 constraints, and get them out via insn_extract. */
3164 insn_code_number = recog_memoized (insn);
3165 noperands = insn_n_operands[insn_code_number];
3166 insn_extract (insn);
3172 for (i = 0; i < noperands; i++)
3174 register RTX_CODE code = GET_CODE (recog_operand[i]);
3175 int is_set_dest = GET_CODE (body) == SET && (i == 0);
3177 if (insn_code_number >= 0)
3178 if (insn_operand_address_p[insn_code_number][i])
3179 find_reloads_address (VOIDmode, NULL_PTR,
3180 recog_operand[i], recog_operand_loc[i],
3181 recog_operand[i], ind_levels);
3183 find_reloads_address (GET_MODE (recog_operand[i]),
3184 recog_operand_loc[i],
3185 XEXP (recog_operand[i], 0),
3186 &XEXP (recog_operand[i], 0),
3187 recog_operand[i], ind_levels);
3189 recog_operand[i] = *recog_operand_loc[i]
3190 = find_reloads_toplev (recog_operand[i], ind_levels, is_set_dest);
3193 register int regno = REGNO (recog_operand[i]);
3194 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3195 recog_operand[i] = *recog_operand_loc[i]
3196 = reg_equiv_constant[regno];
3197 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3198 that feeds this insn. */
3199 if (reg_equiv_mem[regno] != 0)
3200 recog_operand[i] = *recog_operand_loc[i]
3201 = reg_equiv_mem[regno];
3204 /* All operands are non-reloaded. */
3205 non_reloaded_operands[n_non_reloaded_operands++] = recog_operand[i];
3207 #endif /* no REGISTER_CONSTRAINTS */
3209 /* Determine which part of the insn each reload is needed for,
3210 based on which operand the reload is needed for.
3211 Reloads of entire operands are classified as RELOAD_OTHER.
3212 So are reloads for which a unique purpose is not known. */
3214 for (i = 0; i < n_reloads; i++)
3216 reload_when_needed[i] = RELOAD_OTHER;
3218 if (reload_needed_for[i] != 0 && ! reload_needed_for_multiple[i])
3221 int output_address = 0;
3222 int input_address = 0;
3223 int operand_address = 0;
3225 /* This reload is needed only for the address of something.
3226 Determine whether it is needed for addressing an operand
3227 being reloaded for input, whether it is needed for an
3228 operand being reloaded for output, and whether it is needed
3229 for addressing an operand that won't really be reloaded.
3231 Note that we know that this reload is needed in only one address,
3232 but we have not yet checked for the case where that same address
3233 is used in both input and output reloads.
3234 The following code detects this case. */
3236 for (j = 0; j < n_reloads; j++)
3237 if (reload_needed_for[i] == reload_in[j]
3238 || reload_needed_for[i] == reload_out[j])
3240 if (reload_optional[j])
3241 operand_address = 1;
3244 if (reload_needed_for[i] == reload_in[j])
3246 if (reload_needed_for[i] == reload_out[j])
3250 /* Don't ignore memrefs without optional reloads. */
3251 for (j = 0; j < n_non_reloaded_operands; j++)
3252 if (reload_needed_for[i] == non_reloaded_operands[j])
3253 operand_address = 1;
3255 /* If it is needed for only one of those, record which one. */
3257 if (input_address && ! output_address && ! operand_address)
3258 reload_when_needed[i] = RELOAD_FOR_INPUT_RELOAD_ADDRESS;
3259 if (output_address && ! input_address && ! operand_address)
3260 reload_when_needed[i] = RELOAD_FOR_OUTPUT_RELOAD_ADDRESS;
3261 if (operand_address && ! input_address && ! output_address)
3262 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3264 /* Indicate those RELOAD_OTHER reloads which, though they have
3265 0 for reload_output, still cannot overlap an output reload. */
3267 if (output_address && reload_when_needed[i] == RELOAD_OTHER)
3268 reload_needed_for_multiple[i] = 1;
3272 /* Perhaps an output reload can be combined with another
3273 to reduce needs by one. */
3274 if (!goal_earlyclobber)
3278 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3279 accepts a memory operand with constant address. */
3282 alternative_allows_memconst (constraint, altnum)
3287 /* Skip alternatives before the one requested. */
3290 while (*constraint++ != ',');
3293 /* Scan the requested alternative for 'm' or 'o'.
3294 If one of them is present, this alternative accepts memory constants. */
3295 while ((c = *constraint++) && c != ',' && c != '#')
3296 if (c == 'm' || c == 'o')
3301 /* Scan X for memory references and scan the addresses for reloading.
3302 Also checks for references to "constant" regs that we want to eliminate
3303 and replaces them with the values they stand for.
3304 We may alter X destructively if it contains a reference to such.
3305 If X is just a constant reg, we return the equivalent value
3308 IND_LEVELS says how many levels of indirect addressing this machine
3311 IS_SET_DEST is true if X is the destination of a SET, which is not
3312 appropriate to be replaced by a constant. */
3315 find_reloads_toplev (x, ind_levels, is_set_dest)
3320 register RTX_CODE code = GET_CODE (x);
3322 register char *fmt = GET_RTX_FORMAT (code);
3327 /* This code is duplicated for speed in find_reloads. */
3328 register int regno = REGNO (x);
3329 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3330 x = reg_equiv_constant[regno];
3332 /* This creates (subreg (mem...)) which would cause an unnecessary
3333 reload of the mem. */
3334 else if (reg_equiv_mem[regno] != 0)
3335 x = reg_equiv_mem[regno];
3337 else if (reg_equiv_address[regno] != 0)
3339 /* If reg_equiv_address varies, it may be shared, so copy it. */
3340 rtx addr = reg_equiv_address[regno];
3342 if (rtx_varies_p (addr))
3343 addr = copy_rtx (addr);
3345 x = gen_rtx (MEM, GET_MODE (x), addr);
3346 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3347 find_reloads_address (GET_MODE (x), NULL_PTR,
3349 &XEXP (x, 0), x, ind_levels);
3356 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
3361 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
3363 /* Check for SUBREG containing a REG that's equivalent to a constant.
3364 If the constant has a known value, truncate it right now.
3365 Similarly if we are extracting a single-word of a multi-word
3366 constant. If the constant is symbolic, allow it to be substituted
3367 normally. push_reload will strip the subreg later. If the
3368 constant is VOIDmode, abort because we will lose the mode of
3369 the register (this should never happen because one of the cases
3370 above should handle it). */
3372 register int regno = REGNO (SUBREG_REG (x));
3375 if (subreg_lowpart_p (x)
3376 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3377 && reg_equiv_constant[regno] != 0
3378 && (tem = gen_lowpart_common (GET_MODE (x),
3379 reg_equiv_constant[regno])) != 0)
3382 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
3383 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3384 && reg_equiv_constant[regno] != 0
3385 && (tem = operand_subword (reg_equiv_constant[regno],
3387 GET_MODE (SUBREG_REG (x)))) != 0)
3390 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3391 && reg_equiv_constant[regno] != 0
3392 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
3395 /* If the subreg contains a reg that will be converted to a mem,
3396 convert the subreg to a narrower memref now.
3397 Otherwise, we would get (subreg (mem ...) ...),
3398 which would force reload of the mem.
3400 We also need to do this if there is an equivalent MEM that is
3401 not offsettable. In that case, alter_subreg would produce an
3402 invalid address on big-endian machines.
3404 For machines that zero-extend byte loads, we must not reload using
3405 a wider mode if we have a paradoxical SUBREG. find_reloads will
3406 force a reload in that case. So we should not do anything here. */
3408 else if (regno >= FIRST_PSEUDO_REGISTER
3409 #ifdef BYTE_LOADS_ZERO_EXTEND
3410 && (GET_MODE_SIZE (GET_MODE (x))
3411 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3413 && (reg_equiv_address[regno] != 0
3414 || (reg_equiv_mem[regno] != 0
3415 && ! offsettable_memref_p (reg_equiv_mem[regno]))))
3417 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
3418 rtx addr = (reg_equiv_address[regno] ? reg_equiv_address[regno]
3419 : XEXP (reg_equiv_mem[regno], 0));
3420 #if BYTES_BIG_ENDIAN
3422 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
3423 offset += MIN (size, UNITS_PER_WORD);
3424 size = GET_MODE_SIZE (GET_MODE (x));
3425 offset -= MIN (size, UNITS_PER_WORD);
3427 addr = plus_constant (addr, offset);
3428 x = gen_rtx (MEM, GET_MODE (x), addr);
3429 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3430 find_reloads_address (GET_MODE (x), NULL_PTR,
3432 &XEXP (x, 0), x, ind_levels);
3437 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3440 XEXP (x, i) = find_reloads_toplev (XEXP (x, i),
3441 ind_levels, is_set_dest);
3447 make_memloc (ad, regno)
3452 rtx tem = reg_equiv_address[regno];
3453 for (i = 0; i < n_memlocs; i++)
3454 if (rtx_equal_p (tem, XEXP (memlocs[i], 0)))
3457 /* If TEM might contain a pseudo, we must copy it to avoid
3458 modifying it when we do the substitution for the reload. */
3459 if (rtx_varies_p (tem))
3460 tem = copy_rtx (tem);
3462 tem = gen_rtx (MEM, GET_MODE (ad), tem);
3463 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3464 memlocs[n_memlocs++] = tem;
3468 /* Record all reloads needed for handling memory address AD
3469 which appears in *LOC in a memory reference to mode MODE
3470 which itself is found in location *MEMREFLOC.
3471 Note that we take shortcuts assuming that no multi-reg machine mode
3472 occurs as part of an address.
3474 OPERAND is the operand of the insn within which this address appears.
3476 IND_LEVELS says how many levels of indirect addressing this machine
3479 Value is nonzero if this address is reloaded or replaced as a whole.
3480 This is interesting to the caller if the address is an autoincrement.
3482 Note that there is no verification that the address will be valid after
3483 this routine does its work. Instead, we rely on the fact that the address
3484 was valid when reload started. So we need only undo things that reload
3485 could have broken. These are wrong register types, pseudos not allocated
3486 to a hard register, and frame pointer elimination. */
3489 find_reloads_address (mode, memrefloc, ad, loc, operand, ind_levels)
3490 enum machine_mode mode;
3500 /* If the address is a register, see if it is a legitimate address and
3501 reload if not. We first handle the cases where we need not reload
3502 or where we must reload in a non-standard way. */
3504 if (GET_CODE (ad) == REG)
3508 if (reg_equiv_constant[regno] != 0
3509 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
3511 *loc = ad = reg_equiv_constant[regno];
3515 else if (reg_equiv_address[regno] != 0)
3517 tem = make_memloc (ad, regno);
3518 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
3519 &XEXP (tem, 0), operand, ind_levels);
3520 push_reload (tem, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
3521 GET_MODE (ad), VOIDmode, 0, 0,
3526 else if (reg_equiv_mem[regno] != 0)
3528 tem = XEXP (reg_equiv_mem[regno], 0);
3530 /* If we can't indirect any more, a pseudo must be reloaded.
3531 If the pseudo's address in its MEM is a SYMBOL_REF, it
3532 must be reloaded unless indirect_symref_ok. Otherwise, it
3533 can be reloaded if the address is REG or REG + CONST_INT. */
3536 && ! (GET_CODE (tem) == SYMBOL_REF && ! indirect_symref_ok)
3537 && ((GET_CODE (tem) == REG
3538 && REGNO (tem) < FIRST_PSEUDO_REGISTER)
3539 || (GET_CODE (tem) == PLUS
3540 && GET_CODE (XEXP (tem, 0)) == REG
3541 && REGNO (XEXP (tem, 0)) < FIRST_PSEUDO_REGISTER
3542 && GET_CODE (XEXP (tem, 1)) == CONST_INT)))
3546 /* The only remaining case where we can avoid a reload is if this is a
3547 hard register that is valid as a base register and which is not the
3548 subject of a CLOBBER in this insn. */
3550 else if (regno < FIRST_PSEUDO_REGISTER && REGNO_OK_FOR_BASE_P (regno)
3551 && ! regno_clobbered_p (regno, this_insn))
3554 /* If we do not have one of the cases above, we must do the reload. */
3555 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
3556 GET_MODE (ad), VOIDmode, 0, 0, operand);
3560 if (strict_memory_address_p (mode, ad))
3562 /* The address appears valid, so reloads are not needed.
3563 But the address may contain an eliminable register.
3564 This can happen because a machine with indirect addressing
3565 may consider a pseudo register by itself a valid address even when
3566 it has failed to get a hard reg.
3567 So do a tree-walk to find and eliminate all such regs. */
3569 /* But first quickly dispose of a common case. */
3570 if (GET_CODE (ad) == PLUS
3571 && GET_CODE (XEXP (ad, 1)) == CONST_INT
3572 && GET_CODE (XEXP (ad, 0)) == REG
3573 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
3576 subst_reg_equivs_changed = 0;
3577 *loc = subst_reg_equivs (ad);
3579 if (! subst_reg_equivs_changed)
3582 /* Check result for validity after substitution. */
3583 if (strict_memory_address_p (mode, ad))
3587 /* The address is not valid. We have to figure out why. One possibility
3588 is that it is itself a MEM. This can happen when the frame pointer is
3589 being eliminated, a pseudo is not allocated to a hard register, and the
3590 offset between the frame and stack pointers is not its initial value.
3591 In that case the pseudo will have been replaced by a MEM referring to
3592 the stack pointer. */
3593 if (GET_CODE (ad) == MEM)
3595 /* First ensure that the address in this MEM is valid. Then, unless
3596 indirect addresses are valid, reload the MEM into a register. */
3598 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
3599 operand, ind_levels == 0 ? 0 : ind_levels - 1);
3600 /* Check similar cases as for indirect addresses as above except
3601 that we can allow pseudos and a MEM since they should have been
3602 taken care of above. */
3605 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
3606 || GET_CODE (XEXP (tem, 0)) == MEM
3607 || ! (GET_CODE (XEXP (tem, 0)) == REG
3608 || (GET_CODE (XEXP (tem, 0)) == PLUS
3609 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
3610 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
3612 /* Must use TEM here, not AD, since it is the one that will
3613 have any subexpressions reloaded, if needed. */
3614 push_reload (tem, NULL_RTX, loc, NULL_PTR,
3615 BASE_REG_CLASS, GET_MODE (tem), VOIDmode, 0,
3623 /* If we have address of a stack slot but it's not valid
3624 (displacement is too large), compute the sum in a register. */
3625 else if (GET_CODE (ad) == PLUS
3626 && (XEXP (ad, 0) == frame_pointer_rtx
3627 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3628 || XEXP (ad, 0) == arg_pointer_rtx
3630 || XEXP (ad, 0) == stack_pointer_rtx)
3631 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
3633 /* Unshare the MEM rtx so we can safely alter it. */
3636 rtx oldref = *memrefloc;
3637 *memrefloc = copy_rtx (*memrefloc);
3638 loc = &XEXP (*memrefloc, 0);
3639 if (operand == oldref)
3640 operand = *memrefloc;
3642 if (double_reg_address_ok)
3644 /* Unshare the sum as well. */
3645 *loc = ad = copy_rtx (ad);
3646 /* Reload the displacement into an index reg.
3647 We assume the frame pointer or arg pointer is a base reg. */
3648 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
3649 INDEX_REG_CLASS, GET_MODE (ad), operand,
3654 /* If the sum of two regs is not necessarily valid,
3655 reload the sum into a base reg.
3656 That will at least work. */
3657 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode,
3658 operand, ind_levels);
3663 /* If we have an indexed stack slot, there are three possible reasons why
3664 it might be invalid: The index might need to be reloaded, the address
3665 might have been made by frame pointer elimination and hence have a
3666 constant out of range, or both reasons might apply.
3668 We can easily check for an index needing reload, but even if that is the
3669 case, we might also have an invalid constant. To avoid making the
3670 conservative assumption and requiring two reloads, we see if this address
3671 is valid when not interpreted strictly. If it is, the only problem is
3672 that the index needs a reload and find_reloads_address_1 will take care
3675 There is still a case when we might generate an extra reload,
3676 however. In certain cases eliminate_regs will return a MEM for a REG
3677 (see the code there for details). In those cases, memory_address_p
3678 applied to our address will return 0 so we will think that our offset
3679 must be too large. But it might indeed be valid and the only problem
3680 is that a MEM is present where a REG should be. This case should be
3681 very rare and there doesn't seem to be any way to avoid it.
3683 If we decide to do something here, it must be that
3684 `double_reg_address_ok' is true and that this address rtl was made by
3685 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
3686 rework the sum so that the reload register will be added to the index.
3687 This is safe because we know the address isn't shared.
3689 We check for fp/ap/sp as both the first and second operand of the
3692 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
3693 && GET_CODE (XEXP (ad, 0)) == PLUS
3694 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
3695 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3696 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
3698 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
3699 && ! memory_address_p (mode, ad))
3701 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
3702 plus_constant (XEXP (XEXP (ad, 0), 0),
3703 INTVAL (XEXP (ad, 1))),
3704 XEXP (XEXP (ad, 0), 1));
3705 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
3706 GET_MODE (ad), operand, ind_levels);
3707 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), operand, 0);
3712 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
3713 && GET_CODE (XEXP (ad, 0)) == PLUS
3714 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
3715 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3716 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
3718 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
3719 && ! memory_address_p (mode, ad))
3721 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
3722 plus_constant (XEXP (XEXP (ad, 0), 1),
3723 INTVAL (XEXP (ad, 1))),
3724 XEXP (XEXP (ad, 0), 0));
3725 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
3726 GET_MODE (ad), operand, ind_levels);
3727 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), operand, 0);
3732 /* See if address becomes valid when an eliminable register
3733 in a sum is replaced. */
3736 if (GET_CODE (ad) == PLUS)
3737 tem = subst_indexed_address (ad);
3738 if (tem != ad && strict_memory_address_p (mode, tem))
3740 /* Ok, we win that way. Replace any additional eliminable
3743 subst_reg_equivs_changed = 0;
3744 tem = subst_reg_equivs (tem);
3746 /* Make sure that didn't make the address invalid again. */
3748 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
3755 /* If constants aren't valid addresses, reload the constant address
3757 if (CONSTANT_ADDRESS_P (ad) && ! strict_memory_address_p (mode, ad))
3759 /* If AD is in address in the constant pool, the MEM rtx may be shared.
3760 Unshare it so we can safely alter it. */
3761 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
3762 && CONSTANT_POOL_ADDRESS_P (ad))
3764 rtx oldref = *memrefloc;
3765 *memrefloc = copy_rtx (*memrefloc);
3766 loc = &XEXP (*memrefloc, 0);
3767 if (operand == oldref)
3768 operand = *memrefloc;
3771 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, operand,
3776 return find_reloads_address_1 (ad, 0, loc, operand, ind_levels);
3779 /* Find all pseudo regs appearing in AD
3780 that are eliminable in favor of equivalent values
3781 and do not have hard regs; replace them by their equivalents. */
3784 subst_reg_equivs (ad)
3787 register RTX_CODE code = GET_CODE (ad);
3805 register int regno = REGNO (ad);
3807 if (reg_equiv_constant[regno] != 0)
3809 subst_reg_equivs_changed = 1;
3810 return reg_equiv_constant[regno];
3816 /* Quickly dispose of a common case. */
3817 if (XEXP (ad, 0) == frame_pointer_rtx
3818 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
3822 fmt = GET_RTX_FORMAT (code);
3823 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3825 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i));
3829 /* Compute the sum of X and Y, making canonicalizations assumed in an
3830 address, namely: sum constant integers, surround the sum of two
3831 constants with a CONST, put the constant as the second operand, and
3832 group the constant on the outermost sum.
3834 This routine assumes both inputs are already in canonical form. */
3842 if (GET_CODE (x) == CONST_INT)
3843 return plus_constant (y, INTVAL (x));
3844 else if (GET_CODE (y) == CONST_INT)
3845 return plus_constant (x, INTVAL (y));
3846 else if (CONSTANT_P (x))
3847 tem = x, x = y, y = tem;
3849 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
3850 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
3852 /* Note that if the operands of Y are specified in the opposite
3853 order in the recursive calls below, infinite recursion will occur. */
3854 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
3855 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
3857 /* If both constant, encapsulate sum. Otherwise, just form sum. A
3858 constant will have been placed second. */
3859 if (CONSTANT_P (x) && CONSTANT_P (y))
3861 if (GET_CODE (x) == CONST)
3863 if (GET_CODE (y) == CONST)
3866 return gen_rtx (CONST, VOIDmode, gen_rtx (PLUS, Pmode, x, y));
3869 return gen_rtx (PLUS, Pmode, x, y);
3872 /* If ADDR is a sum containing a pseudo register that should be
3873 replaced with a constant (from reg_equiv_constant),
3874 return the result of doing so, and also apply the associative
3875 law so that the result is more likely to be a valid address.
3876 (But it is not guaranteed to be one.)
3878 Note that at most one register is replaced, even if more are
3879 replaceable. Also, we try to put the result into a canonical form
3880 so it is more likely to be a valid address.
3882 In all other cases, return ADDR. */
3885 subst_indexed_address (addr)
3888 rtx op0 = 0, op1 = 0, op2 = 0;
3892 if (GET_CODE (addr) == PLUS)
3894 /* Try to find a register to replace. */
3895 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
3896 if (GET_CODE (op0) == REG
3897 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
3898 && reg_renumber[regno] < 0
3899 && reg_equiv_constant[regno] != 0)
3900 op0 = reg_equiv_constant[regno];
3901 else if (GET_CODE (op1) == REG
3902 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
3903 && reg_renumber[regno] < 0
3904 && reg_equiv_constant[regno] != 0)
3905 op1 = reg_equiv_constant[regno];
3906 else if (GET_CODE (op0) == PLUS
3907 && (tem = subst_indexed_address (op0)) != op0)
3909 else if (GET_CODE (op1) == PLUS
3910 && (tem = subst_indexed_address (op1)) != op1)
3915 /* Pick out up to three things to add. */
3916 if (GET_CODE (op1) == PLUS)
3917 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
3918 else if (GET_CODE (op0) == PLUS)
3919 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
3921 /* Compute the sum. */
3923 op1 = form_sum (op1, op2);
3925 op0 = form_sum (op0, op1);
3932 /* Record the pseudo registers we must reload into hard registers
3933 in a subexpression of a would-be memory address, X.
3934 (This function is not called if the address we find is strictly valid.)
3935 CONTEXT = 1 means we are considering regs as index regs,
3936 = 0 means we are considering them as base regs.
3938 OPERAND is the operand of the insn within which this address appears.
3940 IND_LEVELS says how many levels of indirect addressing are
3941 supported at this point in the address.
3943 We return nonzero if X, as a whole, is reloaded or replaced. */
3945 /* Note that we take shortcuts assuming that no multi-reg machine mode
3946 occurs as part of an address.
3947 Also, this is not fully machine-customizable; it works for machines
3948 such as vaxes and 68000's and 32000's, but other possible machines
3949 could have addressing modes that this does not handle right. */
3952 find_reloads_address_1 (x, context, loc, operand, ind_levels)
3959 register RTX_CODE code = GET_CODE (x);
3963 register rtx op0 = XEXP (x, 0);
3964 register rtx op1 = XEXP (x, 1);
3965 register RTX_CODE code0 = GET_CODE (op0);
3966 register RTX_CODE code1 = GET_CODE (op1);
3967 if (code0 == MULT || code0 == SIGN_EXTEND || code1 == MEM)
3969 find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand, ind_levels);
3970 find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
3972 else if (code1 == MULT || code1 == SIGN_EXTEND || code0 == MEM)
3974 find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
3975 find_reloads_address_1 (op1, 1, &XEXP (x, 1), operand, ind_levels);
3977 else if (code0 == CONST_INT || code0 == CONST
3978 || code0 == SYMBOL_REF || code0 == LABEL_REF)
3980 find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
3982 else if (code1 == CONST_INT || code1 == CONST
3983 || code1 == SYMBOL_REF || code1 == LABEL_REF)
3985 find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
3987 else if (code0 == REG && code1 == REG)
3989 if (REG_OK_FOR_INDEX_P (op0)
3990 && REG_OK_FOR_BASE_P (op1))
3992 else if (REG_OK_FOR_INDEX_P (op1)
3993 && REG_OK_FOR_BASE_P (op0))
3995 else if (REG_OK_FOR_BASE_P (op1))
3996 find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand, ind_levels);
3997 else if (REG_OK_FOR_BASE_P (op0))
3998 find_reloads_address_1 (op1, 1, &XEXP (x, 1), operand, ind_levels);
3999 else if (REG_OK_FOR_INDEX_P (op1))
4000 find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
4001 else if (REG_OK_FOR_INDEX_P (op0))
4002 find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
4005 find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand,
4007 find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand,
4011 else if (code0 == REG)
4013 find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand, ind_levels);
4014 find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
4016 else if (code1 == REG)
4018 find_reloads_address_1 (op1, 1, &XEXP (x, 1), operand, ind_levels);
4019 find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
4022 else if (code == POST_INC || code == POST_DEC
4023 || code == PRE_INC || code == PRE_DEC)
4025 if (GET_CODE (XEXP (x, 0)) == REG)
4027 register int regno = REGNO (XEXP (x, 0));
4031 /* A register that is incremented cannot be constant! */
4032 if (regno >= FIRST_PSEUDO_REGISTER
4033 && reg_equiv_constant[regno] != 0)
4036 /* Handle a register that is equivalent to a memory location
4037 which cannot be addressed directly. */
4038 if (reg_equiv_address[regno] != 0)
4040 rtx tem = make_memloc (XEXP (x, 0), regno);
4041 /* First reload the memory location's address. */
4042 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
4043 &XEXP (tem, 0), operand, ind_levels);
4044 /* Put this inside a new increment-expression. */
4045 x = gen_rtx (GET_CODE (x), GET_MODE (x), tem);
4046 /* Proceed to reload that, as if it contained a register. */
4049 /* If we have a hard register that is ok as an index,
4050 don't make a reload. If an autoincrement of a nice register
4051 isn't "valid", it must be that no autoincrement is "valid".
4052 If that is true and something made an autoincrement anyway,
4053 this must be a special context where one is allowed.
4054 (For example, a "push" instruction.)
4055 We can't improve this address, so leave it alone. */
4057 /* Otherwise, reload the autoincrement into a suitable hard reg
4058 and record how much to increment by. */
4060 if (reg_renumber[regno] >= 0)
4061 regno = reg_renumber[regno];
4062 if ((regno >= FIRST_PSEUDO_REGISTER
4063 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4064 : REGNO_OK_FOR_BASE_P (regno))))
4069 = push_reload (x, NULL_RTX, loc, NULL_PTR,
4070 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4071 GET_MODE (x), GET_MODE (x), VOIDmode, 0, operand);
4072 reload_inc[reloadnum]
4073 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
4078 /* Update the REG_INC notes. */
4080 for (link = REG_NOTES (this_insn);
4081 link; link = XEXP (link, 1))
4082 if (REG_NOTE_KIND (link) == REG_INC
4083 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
4084 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4089 else if (GET_CODE (XEXP (x, 0)) == MEM)
4091 /* This is probably the result of a substitution, by eliminate_regs,
4092 of an equivalent address for a pseudo that was not allocated to a
4093 hard register. Verify that the specified address is valid and
4094 reload it into a register. */
4095 rtx tem = XEXP (x, 0);
4099 /* Since we know we are going to reload this item, don't decrement
4100 for the indirection level.
4102 Note that this is actually conservative: it would be slightly
4103 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4105 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
4106 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
4107 operand, ind_levels);
4109 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
4110 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4111 GET_MODE (x), VOIDmode, 0, 0, operand);
4112 reload_inc[reloadnum]
4113 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
4115 link = FIND_REG_INC_NOTE (this_insn, tem);
4117 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4122 else if (code == MEM)
4124 /* This is probably the result of a substitution, by eliminate_regs,
4125 of an equivalent address for a pseudo that was not allocated to a
4126 hard register. Verify that the specified address is valid and reload
4129 Since we know we are going to reload this item, don't decrement
4130 for the indirection level.
4132 Note that this is actually conservative: it would be slightly more
4133 efficient to use the value of SPILL_INDIRECT_LEVELS from
4136 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
4137 operand, ind_levels);
4139 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
4140 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4141 GET_MODE (x), VOIDmode, 0, 0, operand);
4144 else if (code == REG)
4146 register int regno = REGNO (x);
4148 if (reg_equiv_constant[regno] != 0)
4150 push_reload (reg_equiv_constant[regno], NULL_RTX, loc, NULL_PTR,
4151 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4152 GET_MODE (x), VOIDmode, 0, 0, operand);
4156 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4157 that feeds this insn. */
4158 if (reg_equiv_mem[regno] != 0)
4160 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
4161 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4162 GET_MODE (x), VOIDmode, 0, 0, operand);
4166 if (reg_equiv_address[regno] != 0)
4168 x = make_memloc (x, regno);
4169 find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0),
4170 operand, ind_levels);
4173 if (reg_renumber[regno] >= 0)
4174 regno = reg_renumber[regno];
4175 if ((regno >= FIRST_PSEUDO_REGISTER
4176 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4177 : REGNO_OK_FOR_BASE_P (regno))))
4179 push_reload (x, NULL_RTX, loc, NULL_PTR,
4180 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4181 GET_MODE (x), VOIDmode, 0, 0, operand);
4185 /* If a register appearing in an address is the subject of a CLOBBER
4186 in this insn, reload it into some other register to be safe.
4187 The CLOBBER is supposed to make the register unavailable
4188 from before this insn to after it. */
4189 if (regno_clobbered_p (regno, this_insn))
4191 push_reload (x, NULL_RTX, loc, NULL_PTR,
4192 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4193 GET_MODE (x), VOIDmode, 0, 0, operand);
4199 register char *fmt = GET_RTX_FORMAT (code);
4201 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4204 find_reloads_address_1 (XEXP (x, i), context, &XEXP (x, i),
4205 operand, ind_levels);
4212 /* X, which is found at *LOC, is a part of an address that needs to be
4213 reloaded into a register of class CLASS. If X is a constant, or if
4214 X is a PLUS that contains a constant, check that the constant is a
4215 legitimate operand and that we are supposed to be able to load
4216 it into the register.
4218 If not, force the constant into memory and reload the MEM instead.
4220 MODE is the mode to use, in case X is an integer constant.
4222 NEEDED_FOR says which operand this reload is needed for.
4224 IND_LEVELS says how many levels of indirect addressing this machine
4228 find_reloads_address_part (x, loc, class, mode, needed_for, ind_levels)
4231 enum reg_class class;
4232 enum machine_mode mode;
4237 && (! LEGITIMATE_CONSTANT_P (x)
4238 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
4240 rtx tem = x = force_const_mem (mode, x);
4241 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4242 needed_for, ind_levels);
4245 else if (GET_CODE (x) == PLUS
4246 && CONSTANT_P (XEXP (x, 1))
4247 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
4248 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
4250 rtx tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
4252 x = gen_rtx (PLUS, GET_MODE (x), XEXP (x, 0), tem);
4253 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4254 needed_for, ind_levels);
4257 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
4258 mode, VOIDmode, 0, 0, needed_for);
4261 /* Substitute into X the registers into which we have reloaded
4262 the things that need reloading. The array `replacements'
4263 says contains the locations of all pointers that must be changed
4264 and says what to replace them with.
4266 Return the rtx that X translates into; usually X, but modified. */
4273 for (i = 0; i < n_replacements; i++)
4275 register struct replacement *r = &replacements[i];
4276 register rtx reloadreg = reload_reg_rtx[r->what];
4279 /* Encapsulate RELOADREG so its machine mode matches what
4280 used to be there. */
4281 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
4282 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
4284 /* If we are putting this into a SUBREG and RELOADREG is a
4285 SUBREG, we would be making nested SUBREGs, so we have to fix
4286 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
4288 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
4290 if (GET_MODE (*r->subreg_loc)
4291 == GET_MODE (SUBREG_REG (reloadreg)))
4292 *r->subreg_loc = SUBREG_REG (reloadreg);
4295 *r->where = SUBREG_REG (reloadreg);
4296 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
4300 *r->where = reloadreg;
4302 /* If reload got no reg and isn't optional, something's wrong. */
4303 else if (! reload_optional[r->what])
4308 /* Make a copy of any replacements being done into X and move those copies
4309 to locations in Y, a copy of X. We only look at the highest level of
4313 copy_replacements (x, y)
4318 enum rtx_code code = GET_CODE (x);
4319 char *fmt = GET_RTX_FORMAT (code);
4320 struct replacement *r;
4322 /* We can't support X being a SUBREG because we might then need to know its
4323 location if something inside it was replaced. */
4327 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4329 for (j = 0; j < n_replacements; j++)
4331 if (replacements[j].subreg_loc == &XEXP (x, i))
4333 r = &replacements[n_replacements++];
4334 r->where = replacements[j].where;
4335 r->subreg_loc = &XEXP (y, i);
4336 r->what = replacements[j].what;
4337 r->mode = replacements[j].mode;
4339 else if (replacements[j].where == &XEXP (x, i))
4341 r = &replacements[n_replacements++];
4342 r->where = &XEXP (y, i);
4344 r->what = replacements[j].what;
4345 r->mode = replacements[j].mode;
4350 /* If LOC was scheduled to be replaced by something, return the replacement.
4351 Otherwise, return *LOC. */
4354 find_replacement (loc)
4357 struct replacement *r;
4359 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
4361 rtx reloadreg = reload_reg_rtx[r->what];
4363 if (reloadreg && r->where == loc)
4365 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
4366 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
4370 else if (reloadreg && r->subreg_loc == loc)
4372 /* RELOADREG must be either a REG or a SUBREG.
4374 ??? Is it actually still ever a SUBREG? If so, why? */
4376 if (GET_CODE (reloadreg) == REG)
4377 return gen_rtx (REG, GET_MODE (*loc),
4378 REGNO (reloadreg) + SUBREG_WORD (*loc));
4379 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
4382 return gen_rtx (SUBREG, GET_MODE (*loc), SUBREG_REG (reloadreg),
4383 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
4390 /* Return nonzero if register in range [REGNO, ENDREGNO)
4391 appears either explicitly or implicitly in X
4392 other than being stored into.
4394 References contained within the substructure at LOC do not count.
4395 LOC may be zero, meaning don't ignore anything.
4397 This is similar to refers_to_regno_p in rtlanal.c except that we
4398 look at equivalences for pseudos that didn't get hard registers. */
4401 refers_to_regno_for_reload_p (regno, endregno, x, loc)
4402 int regno, endregno;
4407 register RTX_CODE code;
4414 code = GET_CODE (x);
4421 /* If this is a pseudo, a hard register must not have been allocated.
4422 X must therefore either be a constant or be in memory. */
4423 if (i >= FIRST_PSEUDO_REGISTER)
4425 if (reg_equiv_memory_loc[i])
4426 return refers_to_regno_for_reload_p (regno, endregno,
4427 reg_equiv_memory_loc[i],
4430 if (reg_equiv_constant[i])
4436 return (endregno > i
4437 && regno < i + (i < FIRST_PSEUDO_REGISTER
4438 ? HARD_REGNO_NREGS (i, GET_MODE (x))
4442 /* If this is a SUBREG of a hard reg, we can see exactly which
4443 registers are being modified. Otherwise, handle normally. */
4444 if (GET_CODE (SUBREG_REG (x)) == REG
4445 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
4447 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
4449 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
4450 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
4452 return endregno > inner_regno && regno < inner_endregno;
4458 if (&SET_DEST (x) != loc
4459 /* Note setting a SUBREG counts as referring to the REG it is in for
4460 a pseudo but not for hard registers since we can
4461 treat each word individually. */
4462 && ((GET_CODE (SET_DEST (x)) == SUBREG
4463 && loc != &SUBREG_REG (SET_DEST (x))
4464 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
4465 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
4466 && refers_to_regno_for_reload_p (regno, endregno,
4467 SUBREG_REG (SET_DEST (x)),
4469 || (GET_CODE (SET_DEST (x)) != REG
4470 && refers_to_regno_for_reload_p (regno, endregno,
4471 SET_DEST (x), loc))))
4474 if (code == CLOBBER || loc == &SET_SRC (x))
4480 /* X does not match, so try its subexpressions. */
4482 fmt = GET_RTX_FORMAT (code);
4483 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4485 if (fmt[i] == 'e' && loc != &XEXP (x, i))
4493 if (refers_to_regno_for_reload_p (regno, endregno,
4497 else if (fmt[i] == 'E')
4500 for (j = XVECLEN (x, i) - 1; j >=0; j--)
4501 if (loc != &XVECEXP (x, i, j)
4502 && refers_to_regno_for_reload_p (regno, endregno,
4503 XVECEXP (x, i, j), loc))
4510 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
4511 we check if any register number in X conflicts with the relevant register
4512 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
4513 contains a MEM (we don't bother checking for memory addresses that can't
4514 conflict because we expect this to be a rare case.
4516 This function is similar to reg_overlap_mention_p in rtlanal.c except
4517 that we look at equivalences for pseudos that didn't get hard registers. */
4520 reg_overlap_mentioned_for_reload_p (x, in)
4523 int regno, endregno;
4525 if (GET_CODE (x) == SUBREG)
4527 regno = REGNO (SUBREG_REG (x));
4528 if (regno < FIRST_PSEUDO_REGISTER)
4529 regno += SUBREG_WORD (x);
4531 else if (GET_CODE (x) == REG)
4535 /* If this is a pseudo, it must not have been assigned a hard register.
4536 Therefore, it must either be in memory or be a constant. */
4538 if (regno >= FIRST_PSEUDO_REGISTER)
4540 if (reg_equiv_memory_loc[regno])
4541 return refers_to_mem_for_reload_p (in);
4542 else if (reg_equiv_constant[regno])
4547 else if (CONSTANT_P (x))
4549 else if (GET_CODE (x) == MEM)
4550 return refers_to_mem_for_reload_p (in);
4551 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
4552 || GET_CODE (x) == CC0)
4553 return reg_mentioned_p (x, in);
4557 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
4558 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
4560 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
4563 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
4567 refers_to_mem_for_reload_p (x)
4573 if (GET_CODE (x) == MEM)
4576 if (GET_CODE (x) == REG)
4577 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
4578 && reg_equiv_memory_loc[REGNO (x)]);
4580 fmt = GET_RTX_FORMAT (GET_CODE (x));
4581 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4583 && (GET_CODE (XEXP (x, i)) == MEM
4584 || refers_to_mem_for_reload_p (XEXP (x, i))))
4592 /* [[This function is currently obsolete, now that volatility
4593 is represented by a special bit `volatil' so VOLATILE is never used;
4594 and UNCHANGING has never been brought into use.]]
4596 Alter X by eliminating all VOLATILE and UNCHANGING expressions.
4597 Each of them is replaced by its operand.
4598 Thus, (PLUS (VOLATILE (MEM (REG 5))) (CONST_INT 4))
4599 becomes (PLUS (MEM (REG 5)) (CONST_INT 4)).
4601 If X is itself a VOLATILE expression,
4602 we return the expression that should replace it
4603 but we do not modify X. */
4606 forget_volatility (x)
4609 enum rtx_code code = GET_CODE (x);
4612 register rtx value = 0;
4631 fmt = GET_RTX_FORMAT (code);
4632 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4635 XEXP (x, i) = forget_volatility (XEXP (x, i));
4639 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
4640 XVECEXP (x, i, j) = forget_volatility (XVECEXP (x, i, j));
4649 /* Check the insns before INSN to see if there is a suitable register
4650 containing the same value as GOAL.
4651 If OTHER is -1, look for a register in class CLASS.
4652 Otherwise, just see if register number OTHER shares GOAL's value.
4654 Return an rtx for the register found, or zero if none is found.
4656 If RELOAD_REG_P is (short *)1,
4657 we reject any hard reg that appears in reload_reg_rtx
4658 because such a hard reg is also needed coming into this insn.
4660 If RELOAD_REG_P is any other nonzero value,
4661 it is a vector indexed by hard reg number
4662 and we reject any hard reg whose element in the vector is nonnegative
4663 as well as any that appears in reload_reg_rtx.
4665 If GOAL is zero, then GOALREG is a register number; we look
4666 for an equivalent for that register.
4668 MODE is the machine mode of the value we want an equivalence for.
4669 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
4671 This function is used by jump.c as well as in the reload pass.
4673 If GOAL is the sum of the stack pointer and a constant, we treat it
4674 as if it were a constant except that sp is required to be unchanging. */
4677 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
4680 enum reg_class class;
4682 short *reload_reg_p;
4684 enum machine_mode mode;
4686 register rtx p = insn;
4687 rtx valtry, value, where;
4689 register int regno = -1;
4693 int goal_mem_addr_varies = 0;
4694 int need_stable_sp = 0;
4700 else if (GET_CODE (goal) == REG)
4701 regno = REGNO (goal);
4702 else if (GET_CODE (goal) == MEM)
4704 enum rtx_code code = GET_CODE (XEXP (goal, 0));
4705 if (MEM_VOLATILE_P (goal))
4707 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
4709 /* An address with side effects must be reexecuted. */
4720 else if (CONSTANT_P (goal))
4722 else if (GET_CODE (goal) == PLUS
4723 && XEXP (goal, 0) == stack_pointer_rtx
4724 && CONSTANT_P (XEXP (goal, 1)))
4725 goal_const = need_stable_sp = 1;
4729 /* On some machines, certain regs must always be rejected
4730 because they don't behave the way ordinary registers do. */
4732 #ifdef OVERLAPPING_REGNO_P
4733 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
4734 && OVERLAPPING_REGNO_P (regno))
4738 /* Scan insns back from INSN, looking for one that copies
4739 a value into or out of GOAL.
4740 Stop and give up if we reach a label. */
4745 if (p == 0 || GET_CODE (p) == CODE_LABEL)
4747 if (GET_CODE (p) == INSN
4748 /* If we don't want spill regs ... */
4749 && (! (reload_reg_p != 0 && reload_reg_p != (short *)1)
4750 /* ... then ignore insns introduced by reload; they aren't useful
4751 and can cause results in reload_as_needed to be different
4752 from what they were when calculating the need for spills.
4753 If we notice an input-reload insn here, we will reject it below,
4754 but it might hide a usable equivalent. That makes bad code.
4755 It may even abort: perhaps no reg was spilled for this insn
4756 because it was assumed we would find that equivalent. */
4757 || INSN_UID (p) < reload_first_uid))
4760 pat = single_set (p);
4761 /* First check for something that sets some reg equal to GOAL. */
4764 && true_regnum (SET_SRC (pat)) == regno
4765 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
4768 && true_regnum (SET_DEST (pat)) == regno
4769 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
4771 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
4772 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
4774 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
4775 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
4777 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
4778 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
4779 /* If we are looking for a constant,
4780 and something equivalent to that constant was copied
4781 into a reg, we can use that reg. */
4782 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
4784 && rtx_equal_p (XEXP (tem, 0), goal)
4785 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
4786 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
4788 && GET_CODE (SET_DEST (pat)) == REG
4789 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
4790 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
4791 && GET_CODE (goal) == CONST_INT
4792 && INTVAL (goal) == CONST_DOUBLE_LOW (XEXP (tem, 0))
4793 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
4795 && (valueno = true_regnum (valtry)) >= 0)
4796 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
4798 && GET_CODE (SET_DEST (pat)) == REG
4799 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
4800 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
4801 && GET_CODE (goal) == CONST_INT
4802 && INTVAL (goal) == CONST_DOUBLE_HIGH (XEXP (tem, 0))
4804 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
4805 && (valueno = true_regnum (valtry)) >= 0)))
4808 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
4809 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
4819 /* We found a previous insn copying GOAL into a suitable other reg VALUE
4820 (or copying VALUE into GOAL, if GOAL is also a register).
4821 Now verify that VALUE is really valid. */
4823 /* VALUENO is the register number of VALUE; a hard register. */
4825 /* Don't try to re-use something that is killed in this insn. We want
4826 to be able to trust REG_UNUSED notes. */
4827 if (find_reg_note (where, REG_UNUSED, value))
4830 /* If we propose to get the value from the stack pointer or if GOAL is
4831 a MEM based on the stack pointer, we need a stable SP. */
4832 if (valueno == STACK_POINTER_REGNUM
4833 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
4837 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
4838 if (GET_MODE (value) != mode)
4841 /* Reject VALUE if it was loaded from GOAL
4842 and is also a register that appears in the address of GOAL. */
4844 if (goal_mem && value == SET_DEST (PATTERN (where))
4845 && refers_to_regno_for_reload_p (valueno,
4847 + HARD_REGNO_NREGS (valueno, mode)),
4851 /* Reject registers that overlap GOAL. */
4853 if (!goal_mem && !goal_const
4854 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
4855 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
4858 /* Reject VALUE if it is one of the regs reserved for reloads.
4859 Reload1 knows how to reuse them anyway, and it would get
4860 confused if we allocated one without its knowledge.
4861 (Now that insns introduced by reload are ignored above,
4862 this case shouldn't happen, but I'm not positive.) */
4864 if (reload_reg_p != 0 && reload_reg_p != (short *)1
4865 && reload_reg_p[valueno] >= 0)
4868 /* On some machines, certain regs must always be rejected
4869 because they don't behave the way ordinary registers do. */
4871 #ifdef OVERLAPPING_REGNO_P
4872 if (OVERLAPPING_REGNO_P (valueno))
4876 nregs = HARD_REGNO_NREGS (regno, mode);
4877 valuenregs = HARD_REGNO_NREGS (valueno, mode);
4879 /* Reject VALUE if it is a register being used for an input reload
4880 even if it is not one of those reserved. */
4882 if (reload_reg_p != 0)
4885 for (i = 0; i < n_reloads; i++)
4886 if (reload_reg_rtx[i] != 0 && reload_in[i])
4888 int regno1 = REGNO (reload_reg_rtx[i]);
4889 int nregs1 = HARD_REGNO_NREGS (regno1,
4890 GET_MODE (reload_reg_rtx[i]));
4891 if (regno1 < valueno + valuenregs
4892 && regno1 + nregs1 > valueno)
4898 goal_mem_addr_varies = rtx_addr_varies_p (goal);
4900 /* Now verify that the values of GOAL and VALUE remain unaltered
4901 until INSN is reached. */
4910 /* Don't trust the conversion past a function call
4911 if either of the two is in a call-clobbered register, or memory. */
4912 if (GET_CODE (p) == CALL_INSN
4913 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
4914 && call_used_regs[regno])
4916 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
4917 && call_used_regs[valueno])
4923 #ifdef INSN_CLOBBERS_REGNO_P
4924 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
4925 && INSN_CLOBBERS_REGNO_P (p, valueno))
4926 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
4927 && INSN_CLOBBERS_REGNO_P (p, regno)))
4931 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
4933 /* If this insn P stores in either GOAL or VALUE, return 0.
4934 If GOAL is a memory ref and this insn writes memory, return 0.
4935 If GOAL is a memory ref and its address is not constant,
4936 and this insn P changes a register used in GOAL, return 0. */
4939 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
4941 register rtx dest = SET_DEST (pat);
4942 while (GET_CODE (dest) == SUBREG
4943 || GET_CODE (dest) == ZERO_EXTRACT
4944 || GET_CODE (dest) == SIGN_EXTRACT
4945 || GET_CODE (dest) == STRICT_LOW_PART)
4946 dest = XEXP (dest, 0);
4947 if (GET_CODE (dest) == REG)
4949 register int xregno = REGNO (dest);
4951 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
4952 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
4955 if (xregno < regno + nregs && xregno + xnregs > regno)
4957 if (xregno < valueno + valuenregs
4958 && xregno + xnregs > valueno)
4960 if (goal_mem_addr_varies
4961 && reg_overlap_mentioned_for_reload_p (dest, goal))
4964 else if (goal_mem && GET_CODE (dest) == MEM
4965 && ! push_operand (dest, GET_MODE (dest)))
4967 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
4970 else if (GET_CODE (pat) == PARALLEL)
4973 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
4975 register rtx v1 = XVECEXP (pat, 0, i);
4976 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
4978 register rtx dest = SET_DEST (v1);
4979 while (GET_CODE (dest) == SUBREG
4980 || GET_CODE (dest) == ZERO_EXTRACT
4981 || GET_CODE (dest) == SIGN_EXTRACT
4982 || GET_CODE (dest) == STRICT_LOW_PART)
4983 dest = XEXP (dest, 0);
4984 if (GET_CODE (dest) == REG)
4986 register int xregno = REGNO (dest);
4988 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
4989 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
4992 if (xregno < regno + nregs
4993 && xregno + xnregs > regno)
4995 if (xregno < valueno + valuenregs
4996 && xregno + xnregs > valueno)
4998 if (goal_mem_addr_varies
4999 && reg_overlap_mentioned_for_reload_p (dest,
5003 else if (goal_mem && GET_CODE (dest) == MEM
5004 && ! push_operand (dest, GET_MODE (dest)))
5006 else if (need_stable_sp
5007 && push_operand (dest, GET_MODE (dest)))
5014 /* If this insn auto-increments or auto-decrements
5015 either regno or valueno, return 0 now.
5016 If GOAL is a memory ref and its address is not constant,
5017 and this insn P increments a register used in GOAL, return 0. */
5021 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
5022 if (REG_NOTE_KIND (link) == REG_INC
5023 && GET_CODE (XEXP (link, 0)) == REG)
5025 register int incno = REGNO (XEXP (link, 0));
5026 if (incno < regno + nregs && incno >= regno)
5028 if (incno < valueno + valuenregs && incno >= valueno)
5030 if (goal_mem_addr_varies
5031 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
5041 /* Find a place where INCED appears in an increment or decrement operator
5042 within X, and return the amount INCED is incremented or decremented by.
5043 The value is always positive. */
5046 find_inc_amount (x, inced)
5049 register enum rtx_code code = GET_CODE (x);
5055 register rtx addr = XEXP (x, 0);
5056 if ((GET_CODE (addr) == PRE_DEC
5057 || GET_CODE (addr) == POST_DEC
5058 || GET_CODE (addr) == PRE_INC
5059 || GET_CODE (addr) == POST_INC)
5060 && XEXP (addr, 0) == inced)
5061 return GET_MODE_SIZE (GET_MODE (x));
5064 fmt = GET_RTX_FORMAT (code);
5065 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5069 register int tem = find_inc_amount (XEXP (x, i), inced);
5076 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5078 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
5088 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5091 regno_clobbered_p (regno, insn)
5095 if (GET_CODE (PATTERN (insn)) == CLOBBER
5096 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
5097 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
5099 if (GET_CODE (PATTERN (insn)) == PARALLEL)
5101 int i = XVECLEN (PATTERN (insn), 0) - 1;
5105 rtx elt = XVECEXP (PATTERN (insn), 0, i);
5106 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
5107 && REGNO (XEXP (elt, 0)) == regno)