1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92-6, 1997 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
93 #include "insn-config.h"
94 #include "insn-codes.h"
98 #include "hard-reg-set.h"
104 #ifndef REGISTER_MOVE_COST
105 #define REGISTER_MOVE_COST(x, y) 2
108 #ifndef REGNO_MODE_OK_FOR_BASE_P
109 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
112 #ifndef REG_MODE_OK_FOR_BASE_P
113 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
116 /* The variables set up by `find_reloads' are:
118 n_reloads number of distinct reloads needed; max reload # + 1
119 tables indexed by reload number
120 reload_in rtx for value to reload from
121 reload_out rtx for where to store reload-reg afterward if nec
122 (often the same as reload_in)
123 reload_reg_class enum reg_class, saying what regs to reload into
124 reload_inmode enum machine_mode; mode this operand should have
125 when reloaded, on input.
126 reload_outmode enum machine_mode; mode this operand should have
127 when reloaded, on output.
128 reload_optional char, nonzero for an optional reload.
129 Optional reloads are ignored unless the
130 value is already sitting in a register.
131 reload_inc int, positive amount to increment or decrement by if
132 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
133 Ignored otherwise (don't assume it is zero).
134 reload_in_reg rtx. A reg for which reload_in is the equivalent.
135 If reload_in is a symbol_ref which came from
136 reg_equiv_constant, then this is the pseudo
137 which has that symbol_ref as equivalent.
138 reload_reg_rtx rtx. This is the register to reload into.
139 If it is zero when `find_reloads' returns,
140 you must find a suitable register in the class
141 specified by reload_reg_class, and store here
142 an rtx for that register with mode from
143 reload_inmode or reload_outmode.
144 reload_nocombine char, nonzero if this reload shouldn't be
145 combined with another reload.
146 reload_opnum int, operand number being reloaded. This is
147 used to group related reloads and need not always
148 be equal to the actual operand number in the insn,
149 though it current will be; for in-out operands, it
150 is one of the two operand numbers.
151 reload_when_needed enum, classifies reload as needed either for
152 addressing an input reload, addressing an output,
153 for addressing a non-reloaded mem ref,
154 or for unspecified purposes (i.e., more than one
156 reload_secondary_p int, 1 if this is a secondary register for one
158 reload_secondary_in_reload
159 reload_secondary_out_reload
160 int, gives the reload number of a secondary
161 reload, when needed; otherwise -1
162 reload_secondary_in_icode
163 reload_secondary_out_icode
164 enum insn_code, if a secondary reload is required,
165 gives the INSN_CODE that uses the secondary
166 reload as a scratch register, or CODE_FOR_nothing
167 if the secondary reload register is to be an
168 intermediate register. */
171 rtx reload_in[MAX_RELOADS];
172 rtx reload_out[MAX_RELOADS];
173 enum reg_class reload_reg_class[MAX_RELOADS];
174 enum machine_mode reload_inmode[MAX_RELOADS];
175 enum machine_mode reload_outmode[MAX_RELOADS];
176 rtx reload_reg_rtx[MAX_RELOADS];
177 char reload_optional[MAX_RELOADS];
178 int reload_inc[MAX_RELOADS];
179 rtx reload_in_reg[MAX_RELOADS];
180 char reload_nocombine[MAX_RELOADS];
181 int reload_opnum[MAX_RELOADS];
182 enum reload_type reload_when_needed[MAX_RELOADS];
183 int reload_secondary_p[MAX_RELOADS];
184 int reload_secondary_in_reload[MAX_RELOADS];
185 int reload_secondary_out_reload[MAX_RELOADS];
186 enum insn_code reload_secondary_in_icode[MAX_RELOADS];
187 enum insn_code reload_secondary_out_icode[MAX_RELOADS];
189 /* All the "earlyclobber" operands of the current insn
190 are recorded here. */
192 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
194 int reload_n_operands;
196 /* Replacing reloads.
198 If `replace_reloads' is nonzero, then as each reload is recorded
199 an entry is made for it in the table `replacements'.
200 Then later `subst_reloads' can look through that table and
201 perform all the replacements needed. */
203 /* Nonzero means record the places to replace. */
204 static int replace_reloads;
206 /* Each replacement is recorded with a structure like this. */
209 rtx *where; /* Location to store in */
210 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
211 a SUBREG; 0 otherwise. */
212 int what; /* which reload this is for */
213 enum machine_mode mode; /* mode it must have */
216 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
218 /* Number of replacements currently recorded. */
219 static int n_replacements;
221 /* Used to track what is modified by an operand. */
224 int reg_flag; /* Nonzero if referencing a register. */
225 int safe; /* Nonzero if this can't conflict with anything. */
226 rtx base; /* Base address for MEM. */
227 HOST_WIDE_INT start; /* Starting offset or register number. */
228 HOST_WIDE_INT end; /* Ending offset or register number. */
231 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
232 (see reg_equiv_address). */
233 static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
234 static int n_memlocs;
236 #ifdef SECONDARY_MEMORY_NEEDED
238 /* Save MEMs needed to copy from one class of registers to another. One MEM
239 is used per mode, but normally only one or two modes are ever used.
241 We keep two versions, before and after register elimination. The one
242 after register elimination is record separately for each operand. This
243 is done in case the address is not valid to be sure that we separately
246 static rtx secondary_memlocs[NUM_MACHINE_MODES];
247 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
250 /* The instruction we are doing reloads for;
251 so we can test whether a register dies in it. */
252 static rtx this_insn;
254 /* Nonzero if this instruction is a user-specified asm with operands. */
255 static int this_insn_is_asm;
257 /* If hard_regs_live_known is nonzero,
258 we can tell which hard regs are currently live,
259 at least enough to succeed in choosing dummy reloads. */
260 static int hard_regs_live_known;
262 /* Indexed by hard reg number,
263 element is nonnegative if hard reg has been spilled.
264 This vector is passed to `find_reloads' as an argument
265 and is not changed here. */
266 static short *static_reload_reg_p;
268 /* Set to 1 in subst_reg_equivs if it changes anything. */
269 static int subst_reg_equivs_changed;
271 /* On return from push_reload, holds the reload-number for the OUT
272 operand, which can be different for that from the input operand. */
273 static int output_reloadnum;
275 /* Compare two RTX's. */
276 #define MATCHES(x, y) \
277 (x == y || (x != 0 && (GET_CODE (x) == REG \
278 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
279 : rtx_equal_p (x, y) && ! side_effects_p (x))))
281 /* Indicates if two reloads purposes are for similar enough things that we
282 can merge their reloads. */
283 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
284 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
285 || ((when1) == (when2) && (op1) == (op2)) \
286 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
287 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
288 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
289 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
290 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
292 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
293 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
294 ((when1) != (when2) \
295 || ! ((op1) == (op2) \
296 || (when1) == RELOAD_FOR_INPUT \
297 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
298 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
300 /* If we are going to reload an address, compute the reload type to
302 #define ADDR_TYPE(type) \
303 ((type) == RELOAD_FOR_INPUT_ADDRESS \
304 ? RELOAD_FOR_INPADDR_ADDRESS \
305 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
306 ? RELOAD_FOR_OUTADDR_ADDRESS \
309 static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class,
310 enum machine_mode, enum reload_type,
312 static enum reg_class find_valid_class PROTO((enum machine_mode, int));
313 static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
314 enum machine_mode, enum machine_mode,
315 int, int, int, enum reload_type));
316 static void push_replacement PROTO((rtx *, int, enum machine_mode));
317 static void combine_reloads PROTO((void));
318 static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
319 enum machine_mode, enum machine_mode,
320 enum reg_class, int, int));
321 static int earlyclobber_operand_p PROTO((rtx));
322 static int hard_reg_set_here_p PROTO((int, int, rtx));
323 static struct decomposition decompose PROTO((rtx));
324 static int immune_p PROTO((rtx, rtx, struct decomposition));
325 static int alternative_allows_memconst PROTO((char *, int));
326 static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int));
327 static rtx make_memloc PROTO((rtx, int));
328 static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
329 int, enum reload_type, int, rtx));
330 static rtx subst_reg_equivs PROTO((rtx));
331 static rtx subst_indexed_address PROTO((rtx));
332 static int find_reloads_address_1 PROTO((enum machine_mode, rtx, int, rtx *,
333 int, enum reload_type,int, rtx));
334 static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
335 enum machine_mode, int,
336 enum reload_type, int));
337 static int find_inc_amount PROTO((rtx, rtx));
339 #ifdef HAVE_SECONDARY_RELOADS
341 /* Determine if any secondary reloads are needed for loading (if IN_P is
342 non-zero) or storing (if IN_P is zero) X to or from a reload register of
343 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
344 are needed, push them.
346 Return the reload number of the secondary reload we made, or -1 if
347 we didn't need one. *PICODE is set to the insn_code to use if we do
348 need a secondary reload. */
351 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
357 enum reg_class reload_class;
358 enum machine_mode reload_mode;
359 enum reload_type type;
360 enum insn_code *picode;
362 enum reg_class class = NO_REGS;
363 enum machine_mode mode = reload_mode;
364 enum insn_code icode = CODE_FOR_nothing;
365 enum reg_class t_class = NO_REGS;
366 enum machine_mode t_mode = VOIDmode;
367 enum insn_code t_icode = CODE_FOR_nothing;
368 enum reload_type secondary_type;
370 int s_reload, t_reload = -1;
372 if (type == RELOAD_FOR_INPUT_ADDRESS
373 || type == RELOAD_FOR_OUTPUT_ADDRESS
374 || type == RELOAD_FOR_INPADDR_ADDRESS
375 || type == RELOAD_FOR_OUTADDR_ADDRESS)
376 secondary_type = type;
378 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
380 *picode = CODE_FOR_nothing;
382 /* If X is a paradoxical SUBREG, use the inner value to determine both the
383 mode and object being reloaded. */
384 if (GET_CODE (x) == SUBREG
385 && (GET_MODE_SIZE (GET_MODE (x))
386 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
389 reload_mode = GET_MODE (x);
392 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
393 is still a pseudo-register by now, it *must* have an equivalent MEM
394 but we don't want to assume that), use that equivalent when seeing if
395 a secondary reload is needed since whether or not a reload is needed
396 might be sensitive to the form of the MEM. */
398 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
399 && reg_equiv_mem[REGNO (x)] != 0)
400 x = reg_equiv_mem[REGNO (x)];
402 #ifdef SECONDARY_INPUT_RELOAD_CLASS
404 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
407 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
409 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
412 /* If we don't need any secondary registers, done. */
413 if (class == NO_REGS)
416 /* Get a possible insn to use. If the predicate doesn't accept X, don't
419 icode = (in_p ? reload_in_optab[(int) reload_mode]
420 : reload_out_optab[(int) reload_mode]);
422 if (icode != CODE_FOR_nothing
423 && insn_operand_predicate[(int) icode][in_p]
424 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
425 icode = CODE_FOR_nothing;
427 /* If we will be using an insn, see if it can directly handle the reload
428 register we will be using. If it can, the secondary reload is for a
429 scratch register. If it can't, we will use the secondary reload for
430 an intermediate register and require a tertiary reload for the scratch
433 if (icode != CODE_FOR_nothing)
435 /* If IN_P is non-zero, the reload register will be the output in
436 operand 0. If IN_P is zero, the reload register will be the input
437 in operand 1. Outputs should have an initial "=", which we must
440 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
441 enum reg_class insn_class
442 = (insn_letter == 'r' ? GENERAL_REGS
443 : REG_CLASS_FROM_LETTER (insn_letter));
445 if (insn_class == NO_REGS
446 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
447 /* The scratch register's constraint must start with "=&". */
448 || insn_operand_constraint[(int) icode][2][0] != '='
449 || insn_operand_constraint[(int) icode][2][1] != '&')
452 if (reg_class_subset_p (reload_class, insn_class))
453 mode = insn_operand_mode[(int) icode][2];
456 char t_letter = insn_operand_constraint[(int) icode][2][2];
458 t_mode = insn_operand_mode[(int) icode][2];
459 t_class = (t_letter == 'r' ? GENERAL_REGS
460 : REG_CLASS_FROM_LETTER (t_letter));
462 icode = CODE_FOR_nothing;
466 /* This case isn't valid, so fail. Reload is allowed to use the same
467 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
468 in the case of a secondary register, we actually need two different
469 registers for correct code. We fail here to prevent the possibility of
470 silently generating incorrect code later.
472 The convention is that secondary input reloads are valid only if the
473 secondary_class is different from class. If you have such a case, you
474 can not use secondary reloads, you must work around the problem some
477 Allow this when MODE is not reload_mode and assume that the generated
478 code handles this case (it does on the Alpha, which is the only place
479 this currently happens). */
481 if (in_p && class == reload_class && mode == reload_mode)
484 /* If we need a tertiary reload, see if we have one we can reuse or else
487 if (t_class != NO_REGS)
489 for (t_reload = 0; t_reload < n_reloads; t_reload++)
490 if (reload_secondary_p[t_reload]
491 && (reg_class_subset_p (t_class, reload_reg_class[t_reload])
492 || reg_class_subset_p (reload_reg_class[t_reload], t_class))
493 && ((in_p && reload_inmode[t_reload] == t_mode)
494 || (! in_p && reload_outmode[t_reload] == t_mode))
495 && ((in_p && (reload_secondary_in_icode[t_reload]
496 == CODE_FOR_nothing))
497 || (! in_p &&(reload_secondary_out_icode[t_reload]
498 == CODE_FOR_nothing)))
499 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
500 && MERGABLE_RELOADS (secondary_type,
501 reload_when_needed[t_reload],
502 opnum, reload_opnum[t_reload]))
505 reload_inmode[t_reload] = t_mode;
507 reload_outmode[t_reload] = t_mode;
509 if (reg_class_subset_p (t_class, reload_reg_class[t_reload]))
510 reload_reg_class[t_reload] = t_class;
512 reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum);
513 reload_optional[t_reload] &= optional;
514 reload_secondary_p[t_reload] = 1;
515 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload],
516 opnum, reload_opnum[t_reload]))
517 reload_when_needed[t_reload] = RELOAD_OTHER;
520 if (t_reload == n_reloads)
522 /* We need to make a new tertiary reload for this register class. */
523 reload_in[t_reload] = reload_out[t_reload] = 0;
524 reload_reg_class[t_reload] = t_class;
525 reload_inmode[t_reload] = in_p ? t_mode : VOIDmode;
526 reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode;
527 reload_reg_rtx[t_reload] = 0;
528 reload_optional[t_reload] = optional;
529 reload_inc[t_reload] = 0;
530 /* Maybe we could combine these, but it seems too tricky. */
531 reload_nocombine[t_reload] = 1;
532 reload_in_reg[t_reload] = 0;
533 reload_opnum[t_reload] = opnum;
534 reload_when_needed[t_reload] = secondary_type;
535 reload_secondary_in_reload[t_reload] = -1;
536 reload_secondary_out_reload[t_reload] = -1;
537 reload_secondary_in_icode[t_reload] = CODE_FOR_nothing;
538 reload_secondary_out_icode[t_reload] = CODE_FOR_nothing;
539 reload_secondary_p[t_reload] = 1;
545 /* See if we can reuse an existing secondary reload. */
546 for (s_reload = 0; s_reload < n_reloads; s_reload++)
547 if (reload_secondary_p[s_reload]
548 && (reg_class_subset_p (class, reload_reg_class[s_reload])
549 || reg_class_subset_p (reload_reg_class[s_reload], class))
550 && ((in_p && reload_inmode[s_reload] == mode)
551 || (! in_p && reload_outmode[s_reload] == mode))
552 && ((in_p && reload_secondary_in_reload[s_reload] == t_reload)
553 || (! in_p && reload_secondary_out_reload[s_reload] == t_reload))
554 && ((in_p && reload_secondary_in_icode[s_reload] == t_icode)
555 || (! in_p && reload_secondary_out_icode[s_reload] == t_icode))
556 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
557 && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload],
558 opnum, reload_opnum[s_reload]))
561 reload_inmode[s_reload] = mode;
563 reload_outmode[s_reload] = mode;
565 if (reg_class_subset_p (class, reload_reg_class[s_reload]))
566 reload_reg_class[s_reload] = class;
568 reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum);
569 reload_optional[s_reload] &= optional;
570 reload_secondary_p[s_reload] = 1;
571 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload],
572 opnum, reload_opnum[s_reload]))
573 reload_when_needed[s_reload] = RELOAD_OTHER;
576 if (s_reload == n_reloads)
578 #ifdef SECONDARY_MEMORY_NEEDED
579 /* If we need a memory location to copy between the two reload regs,
580 set it up now. Note that we do the input case before making
581 the reload and the output case after. This is due to the
582 way reloads are output. */
584 if (in_p && icode == CODE_FOR_nothing
585 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
586 get_secondary_mem (x, reload_mode, opnum, type);
589 /* We need to make a new secondary reload for this register class. */
590 reload_in[s_reload] = reload_out[s_reload] = 0;
591 reload_reg_class[s_reload] = class;
593 reload_inmode[s_reload] = in_p ? mode : VOIDmode;
594 reload_outmode[s_reload] = ! in_p ? mode : VOIDmode;
595 reload_reg_rtx[s_reload] = 0;
596 reload_optional[s_reload] = optional;
597 reload_inc[s_reload] = 0;
598 /* Maybe we could combine these, but it seems too tricky. */
599 reload_nocombine[s_reload] = 1;
600 reload_in_reg[s_reload] = 0;
601 reload_opnum[s_reload] = opnum;
602 reload_when_needed[s_reload] = secondary_type;
603 reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1;
604 reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1;
605 reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing;
606 reload_secondary_out_icode[s_reload]
607 = ! in_p ? t_icode : CODE_FOR_nothing;
608 reload_secondary_p[s_reload] = 1;
612 #ifdef SECONDARY_MEMORY_NEEDED
613 if (! in_p && icode == CODE_FOR_nothing
614 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
615 get_secondary_mem (x, mode, opnum, type);
622 #endif /* HAVE_SECONDARY_RELOADS */
624 #ifdef SECONDARY_MEMORY_NEEDED
626 /* Return a memory location that will be used to copy X in mode MODE.
627 If we haven't already made a location for this mode in this insn,
628 call find_reloads_address on the location being returned. */
631 get_secondary_mem (x, mode, opnum, type)
633 enum machine_mode mode;
635 enum reload_type type;
640 /* By default, if MODE is narrower than a word, widen it to a word.
641 This is required because most machines that require these memory
642 locations do not support short load and stores from all registers
643 (e.g., FP registers). */
645 #ifdef SECONDARY_MEMORY_NEEDED_MODE
646 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
648 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
649 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
652 /* If we already have made a MEM for this operand in MODE, return it. */
653 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
654 return secondary_memlocs_elim[(int) mode][opnum];
656 /* If this is the first time we've tried to get a MEM for this mode,
657 allocate a new one. `something_changed' in reload will get set
658 by noticing that the frame size has changed. */
660 if (secondary_memlocs[(int) mode] == 0)
662 #ifdef SECONDARY_MEMORY_NEEDED_RTX
663 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
665 secondary_memlocs[(int) mode]
666 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
670 /* Get a version of the address doing any eliminations needed. If that
671 didn't give us a new MEM, make a new one if it isn't valid. */
673 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
674 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
676 if (! mem_valid && loc == secondary_memlocs[(int) mode])
677 loc = copy_rtx (loc);
679 /* The only time the call below will do anything is if the stack
680 offset is too large. In that case IND_LEVELS doesn't matter, so we
681 can just pass a zero. Adjust the type to be the address of the
682 corresponding object. If the address was valid, save the eliminated
683 address. If it wasn't valid, we need to make a reload each time, so
688 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
689 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
692 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
696 secondary_memlocs_elim[(int) mode][opnum] = loc;
700 /* Clear any secondary memory locations we've made. */
703 clear_secondary_mem ()
705 bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);
707 #endif /* SECONDARY_MEMORY_NEEDED */
709 /* Find the largest class for which every register number plus N is valid in
710 M1 (if in range). Abort if no such class exists. */
712 static enum reg_class
713 find_valid_class (m1, n)
714 enum machine_mode m1;
719 enum reg_class best_class;
722 for (class = 1; class < N_REG_CLASSES; class++)
725 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
726 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
727 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
728 && ! HARD_REGNO_MODE_OK (regno + n, m1))
731 if (! bad && reg_class_size[class] > best_size)
732 best_class = class, best_size = reg_class_size[class];
741 /* Record one reload that needs to be performed.
742 IN is an rtx saying where the data are to be found before this instruction.
743 OUT says where they must be stored after the instruction.
744 (IN is zero for data not read, and OUT is zero for data not written.)
745 INLOC and OUTLOC point to the places in the instructions where
746 IN and OUT were found.
747 If IN and OUT are both non-zero, it means the same register must be used
748 to reload both IN and OUT.
750 CLASS is a register class required for the reloaded data.
751 INMODE is the machine mode that the instruction requires
752 for the reg that replaces IN and OUTMODE is likewise for OUT.
754 If IN is zero, then OUT's location and mode should be passed as
757 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
759 OPTIONAL nonzero means this reload does not need to be performed:
760 it can be discarded if that is more convenient.
762 OPNUM and TYPE say what the purpose of this reload is.
764 The return value is the reload-number for this reload.
766 If both IN and OUT are nonzero, in some rare cases we might
767 want to make two separate reloads. (Actually we never do this now.)
768 Therefore, the reload-number for OUT is stored in
769 output_reloadnum when we return; the return value applies to IN.
770 Usually (presently always), when IN and OUT are nonzero,
771 the two reload-numbers are equal, but the caller should be careful to
775 push_reload (in, out, inloc, outloc, class,
776 inmode, outmode, strict_low, optional, opnum, type)
777 register rtx in, out;
779 enum reg_class class;
780 enum machine_mode inmode, outmode;
784 enum reload_type type;
788 int dont_remove_subreg = 0;
789 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
790 int secondary_in_reload = -1, secondary_out_reload = -1;
791 enum insn_code secondary_in_icode = CODE_FOR_nothing;
792 enum insn_code secondary_out_icode = CODE_FOR_nothing;
794 /* INMODE and/or OUTMODE could be VOIDmode if no mode
795 has been specified for the operand. In that case,
796 use the operand's mode as the mode to reload. */
797 if (inmode == VOIDmode && in != 0)
798 inmode = GET_MODE (in);
799 if (outmode == VOIDmode && out != 0)
800 outmode = GET_MODE (out);
802 /* If IN is a pseudo register everywhere-equivalent to a constant, and
803 it is not in a hard register, reload straight from the constant,
804 since we want to get rid of such pseudo registers.
805 Often this is done earlier, but not always in find_reloads_address. */
806 if (in != 0 && GET_CODE (in) == REG)
808 register int regno = REGNO (in);
810 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
811 && reg_equiv_constant[regno] != 0)
812 in = reg_equiv_constant[regno];
815 /* Likewise for OUT. Of course, OUT will never be equivalent to
816 an actual constant, but it might be equivalent to a memory location
817 (in the case of a parameter). */
818 if (out != 0 && GET_CODE (out) == REG)
820 register int regno = REGNO (out);
822 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
823 && reg_equiv_constant[regno] != 0)
824 out = reg_equiv_constant[regno];
827 /* If we have a read-write operand with an address side-effect,
828 change either IN or OUT so the side-effect happens only once. */
829 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
831 if (GET_CODE (XEXP (in, 0)) == POST_INC
832 || GET_CODE (XEXP (in, 0)) == POST_DEC)
833 in = gen_rtx_MEM (GET_MODE (in), XEXP (XEXP (in, 0), 0));
834 if (GET_CODE (XEXP (in, 0)) == PRE_INC
835 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
836 out = gen_rtx_MEM (GET_MODE (out), XEXP (XEXP (out, 0), 0));
839 /* If we are reloading a (SUBREG constant ...), really reload just the
840 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
841 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
842 a pseudo and hence will become a MEM) with M1 wider than M2 and the
843 register is a pseudo, also reload the inside expression.
844 For machines that extend byte loads, do this for any SUBREG of a pseudo
845 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
846 M2 is an integral mode that gets extended when loaded.
847 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
848 either M1 is not valid for R or M2 is wider than a word but we only
849 need one word to store an M2-sized quantity in R.
850 (However, if OUT is nonzero, we need to reload the reg *and*
851 the subreg, so do nothing here, and let following statement handle it.)
853 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
854 we can't handle it here because CONST_INT does not indicate a mode.
856 Similarly, we must reload the inside expression if we have a
857 STRICT_LOW_PART (presumably, in == out in the cas).
859 Also reload the inner expression if it does not require a secondary
860 reload but the SUBREG does.
862 Finally, reload the inner expression if it is a register that is in
863 the class whose registers cannot be referenced in a different size
864 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
865 cannot reload just the inside since we might end up with the wrong
868 if (in != 0 && GET_CODE (in) == SUBREG && SUBREG_WORD (in) == 0
869 #ifdef CLASS_CANNOT_CHANGE_SIZE
870 && class != CLASS_CANNOT_CHANGE_SIZE
872 && (CONSTANT_P (SUBREG_REG (in))
873 || GET_CODE (SUBREG_REG (in)) == PLUS
875 || (((GET_CODE (SUBREG_REG (in)) == REG
876 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
877 || GET_CODE (SUBREG_REG (in)) == MEM)
878 && ((GET_MODE_SIZE (inmode)
879 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
880 #ifdef LOAD_EXTEND_OP
881 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
882 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
884 && (GET_MODE_SIZE (inmode)
885 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
886 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
887 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
890 || (GET_CODE (SUBREG_REG (in)) == REG
891 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
892 /* The case where out is nonzero
893 is handled differently in the following statement. */
894 && (out == 0 || SUBREG_WORD (in) == 0)
895 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
896 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
898 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
900 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
901 GET_MODE (SUBREG_REG (in)))))
902 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
905 #ifdef SECONDARY_INPUT_RELOAD_CLASS
906 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
907 && (SECONDARY_INPUT_RELOAD_CLASS (class,
908 GET_MODE (SUBREG_REG (in)),
912 #ifdef CLASS_CANNOT_CHANGE_SIZE
913 || (GET_CODE (SUBREG_REG (in)) == REG
914 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
915 && (TEST_HARD_REG_BIT
916 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
917 REGNO (SUBREG_REG (in))))
918 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
919 != GET_MODE_SIZE (inmode)))
923 in_subreg_loc = inloc;
924 inloc = &SUBREG_REG (in);
926 #ifndef LOAD_EXTEND_OP
927 if (GET_CODE (in) == MEM)
928 /* This is supposed to happen only for paradoxical subregs made by
929 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
930 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
933 inmode = GET_MODE (in);
936 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
937 either M1 is not valid for R or M2 is wider than a word but we only
938 need one word to store an M2-sized quantity in R.
940 However, we must reload the inner reg *as well as* the subreg in
943 /* Similar issue for (SUBREG constant ...) if it was not handled by the
944 code above. This can happen if SUBREG_WORD != 0. */
946 if (in != 0 && GET_CODE (in) == SUBREG
947 && (CONSTANT_P (SUBREG_REG (in))
948 || (GET_CODE (SUBREG_REG (in)) == REG
949 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
950 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in))
953 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
954 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
956 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
958 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
959 GET_MODE (SUBREG_REG (in)))))))))
961 /* This relies on the fact that emit_reload_insns outputs the
962 instructions for input reloads of type RELOAD_OTHER in the same
963 order as the reloads. Thus if the outer reload is also of type
964 RELOAD_OTHER, we are guaranteed that this inner reload will be
965 output before the outer reload. */
966 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
967 find_valid_class (inmode, SUBREG_WORD (in)),
968 VOIDmode, VOIDmode, 0, 0, opnum, type);
969 dont_remove_subreg = 1;
972 /* Similarly for paradoxical and problematical SUBREGs on the output.
973 Note that there is no reason we need worry about the previous value
974 of SUBREG_REG (out); even if wider than out,
975 storing in a subreg is entitled to clobber it all
976 (except in the case of STRICT_LOW_PART,
977 and in that case the constraint should label it input-output.) */
978 if (out != 0 && GET_CODE (out) == SUBREG && SUBREG_WORD (out) == 0
979 #ifdef CLASS_CANNOT_CHANGE_SIZE
980 && class != CLASS_CANNOT_CHANGE_SIZE
982 && (CONSTANT_P (SUBREG_REG (out))
984 || (((GET_CODE (SUBREG_REG (out)) == REG
985 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
986 || GET_CODE (SUBREG_REG (out)) == MEM)
987 && ((GET_MODE_SIZE (outmode)
988 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
989 #ifdef WORD_REGISTER_OPERATIONS
990 || ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
991 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
995 || (GET_CODE (SUBREG_REG (out)) == REG
996 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
997 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
998 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1000 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1002 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1003 GET_MODE (SUBREG_REG (out)))))
1004 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
1005 + SUBREG_WORD (out)),
1007 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1008 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1009 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1010 GET_MODE (SUBREG_REG (out)),
1014 #ifdef CLASS_CANNOT_CHANGE_SIZE
1015 || (GET_CODE (SUBREG_REG (out)) == REG
1016 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1017 && (TEST_HARD_REG_BIT
1018 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
1019 REGNO (SUBREG_REG (out))))
1020 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1021 != GET_MODE_SIZE (outmode)))
1025 out_subreg_loc = outloc;
1026 outloc = &SUBREG_REG (out);
1028 #ifndef LOAD_EXTEND_OP
1029 if (GET_CODE (out) == MEM
1030 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1033 outmode = GET_MODE (out);
1036 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1037 either M1 is not valid for R or M2 is wider than a word but we only
1038 need one word to store an M2-sized quantity in R.
1040 However, we must reload the inner reg *as well as* the subreg in
1041 that case. In this case, the inner reg is an in-out reload. */
1043 if (out != 0 && GET_CODE (out) == SUBREG
1044 && GET_CODE (SUBREG_REG (out)) == REG
1045 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1046 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)) + SUBREG_WORD (out),
1048 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1049 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1051 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1053 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1054 GET_MODE (SUBREG_REG (out)))))))
1056 /* This relies on the fact that emit_reload_insns outputs the
1057 instructions for output reloads of type RELOAD_OTHER in reverse
1058 order of the reloads. Thus if the outer reload is also of type
1059 RELOAD_OTHER, we are guaranteed that this inner reload will be
1060 output after the outer reload. */
1061 dont_remove_subreg = 1;
1062 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1064 find_valid_class (outmode, SUBREG_WORD (out)),
1065 VOIDmode, VOIDmode, 0, 0,
1066 opnum, RELOAD_OTHER);
1069 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1070 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1071 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1072 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1075 /* If IN is a SUBREG of a hard register, make a new REG. This
1076 simplifies some of the cases below. */
1078 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1079 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1080 && ! dont_remove_subreg)
1081 in = gen_rtx_REG (GET_MODE (in),
1082 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
1084 /* Similarly for OUT. */
1085 if (out != 0 && GET_CODE (out) == SUBREG
1086 && GET_CODE (SUBREG_REG (out)) == REG
1087 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1088 && ! dont_remove_subreg)
1089 out = gen_rtx_REG (GET_MODE (out),
1090 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
1092 /* Narrow down the class of register wanted if that is
1093 desirable on this machine for efficiency. */
1095 class = PREFERRED_RELOAD_CLASS (in, class);
1097 /* Output reloads may need analogous treatment, different in detail. */
1098 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1100 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1103 /* Make sure we use a class that can handle the actual pseudo
1104 inside any subreg. For example, on the 386, QImode regs
1105 can appear within SImode subregs. Although GENERAL_REGS
1106 can handle SImode, QImode needs a smaller class. */
1107 #ifdef LIMIT_RELOAD_CLASS
1109 class = LIMIT_RELOAD_CLASS (inmode, class);
1110 else if (in != 0 && GET_CODE (in) == SUBREG)
1111 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1114 class = LIMIT_RELOAD_CLASS (outmode, class);
1115 if (out != 0 && GET_CODE (out) == SUBREG)
1116 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1119 /* Verify that this class is at least possible for the mode that
1121 if (this_insn_is_asm)
1123 enum machine_mode mode;
1124 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1128 if (mode == VOIDmode)
1130 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1135 outmode = word_mode;
1137 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1138 if (HARD_REGNO_MODE_OK (i, mode)
1139 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1141 int nregs = HARD_REGNO_NREGS (i, mode);
1144 for (j = 1; j < nregs; j++)
1145 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1150 if (i == FIRST_PSEUDO_REGISTER)
1152 error_for_asm (this_insn, "impossible register constraint in `asm'");
1157 if (class == NO_REGS)
1160 /* We can use an existing reload if the class is right
1161 and at least one of IN and OUT is a match
1162 and the other is at worst neutral.
1163 (A zero compared against anything is neutral.)
1165 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
1166 for the same thing since that can cause us to need more reload registers
1167 than we otherwise would. */
1169 for (i = 0; i < n_reloads; i++)
1170 if ((reg_class_subset_p (class, reload_reg_class[i])
1171 || reg_class_subset_p (reload_reg_class[i], class))
1172 /* If the existing reload has a register, it must fit our class. */
1173 && (reload_reg_rtx[i] == 0
1174 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1175 true_regnum (reload_reg_rtx[i])))
1176 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
1177 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
1179 (out != 0 && MATCHES (reload_out[i], out)
1180 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
1181 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
1182 && MERGABLE_RELOADS (type, reload_when_needed[i],
1183 opnum, reload_opnum[i]))
1186 /* Reloading a plain reg for input can match a reload to postincrement
1187 that reg, since the postincrement's value is the right value.
1188 Likewise, it can match a preincrement reload, since we regard
1189 the preincrementation as happening before any ref in this insn
1190 to that register. */
1192 for (i = 0; i < n_reloads; i++)
1193 if ((reg_class_subset_p (class, reload_reg_class[i])
1194 || reg_class_subset_p (reload_reg_class[i], class))
1195 /* If the existing reload has a register, it must fit our class. */
1196 && (reload_reg_rtx[i] == 0
1197 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1198 true_regnum (reload_reg_rtx[i])))
1199 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
1200 && ((GET_CODE (in) == REG
1201 && (GET_CODE (reload_in[i]) == POST_INC
1202 || GET_CODE (reload_in[i]) == POST_DEC
1203 || GET_CODE (reload_in[i]) == PRE_INC
1204 || GET_CODE (reload_in[i]) == PRE_DEC)
1205 && MATCHES (XEXP (reload_in[i], 0), in))
1207 (GET_CODE (reload_in[i]) == REG
1208 && (GET_CODE (in) == POST_INC
1209 || GET_CODE (in) == POST_DEC
1210 || GET_CODE (in) == PRE_INC
1211 || GET_CODE (in) == PRE_DEC)
1212 && MATCHES (XEXP (in, 0), reload_in[i])))
1213 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
1214 && MERGABLE_RELOADS (type, reload_when_needed[i],
1215 opnum, reload_opnum[i]))
1217 /* Make sure reload_in ultimately has the increment,
1218 not the plain register. */
1219 if (GET_CODE (in) == REG)
1226 /* See if we need a secondary reload register to move between CLASS
1227 and IN or CLASS and OUT. Get the icode and push any required reloads
1228 needed for each of them if so. */
1230 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1233 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1234 &secondary_in_icode);
1237 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1238 if (out != 0 && GET_CODE (out) != SCRATCH)
1239 secondary_out_reload
1240 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1241 type, &secondary_out_icode);
1244 /* We found no existing reload suitable for re-use.
1245 So add an additional reload. */
1247 #ifdef SECONDARY_MEMORY_NEEDED
1248 /* If a memory location is needed for the copy, make one. */
1249 if (in != 0 && GET_CODE (in) == REG
1250 && REGNO (in) < FIRST_PSEUDO_REGISTER
1251 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1253 get_secondary_mem (in, inmode, opnum, type);
1258 reload_out[i] = out;
1259 reload_reg_class[i] = class;
1260 reload_inmode[i] = inmode;
1261 reload_outmode[i] = outmode;
1262 reload_reg_rtx[i] = 0;
1263 reload_optional[i] = optional;
1265 reload_nocombine[i] = 0;
1266 reload_in_reg[i] = inloc ? *inloc : 0;
1267 reload_opnum[i] = opnum;
1268 reload_when_needed[i] = type;
1269 reload_secondary_in_reload[i] = secondary_in_reload;
1270 reload_secondary_out_reload[i] = secondary_out_reload;
1271 reload_secondary_in_icode[i] = secondary_in_icode;
1272 reload_secondary_out_icode[i] = secondary_out_icode;
1273 reload_secondary_p[i] = 0;
1277 #ifdef SECONDARY_MEMORY_NEEDED
1278 if (out != 0 && GET_CODE (out) == REG
1279 && REGNO (out) < FIRST_PSEUDO_REGISTER
1280 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1282 get_secondary_mem (out, outmode, opnum, type);
1287 /* We are reusing an existing reload,
1288 but we may have additional information for it.
1289 For example, we may now have both IN and OUT
1290 while the old one may have just one of them. */
1292 /* The modes can be different. If they are, we want to reload in
1293 the larger mode, so that the value is valid for both modes. */
1294 if (inmode != VOIDmode
1295 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (reload_inmode[i]))
1296 reload_inmode[i] = inmode;
1297 if (outmode != VOIDmode
1298 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (reload_outmode[i]))
1299 reload_outmode[i] = outmode;
1303 reload_out[i] = out;
1304 if (reg_class_subset_p (class, reload_reg_class[i]))
1305 reload_reg_class[i] = class;
1306 reload_optional[i] &= optional;
1307 if (MERGE_TO_OTHER (type, reload_when_needed[i],
1308 opnum, reload_opnum[i]))
1309 reload_when_needed[i] = RELOAD_OTHER;
1310 reload_opnum[i] = MIN (reload_opnum[i], opnum);
1313 /* If the ostensible rtx being reload differs from the rtx found
1314 in the location to substitute, this reload is not safe to combine
1315 because we cannot reliably tell whether it appears in the insn. */
1317 if (in != 0 && in != *inloc)
1318 reload_nocombine[i] = 1;
1321 /* This was replaced by changes in find_reloads_address_1 and the new
1322 function inc_for_reload, which go with a new meaning of reload_inc. */
1324 /* If this is an IN/OUT reload in an insn that sets the CC,
1325 it must be for an autoincrement. It doesn't work to store
1326 the incremented value after the insn because that would clobber the CC.
1327 So we must do the increment of the value reloaded from,
1328 increment it, store it back, then decrement again. */
1329 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1333 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1334 /* If we did not find a nonzero amount-to-increment-by,
1335 that contradicts the belief that IN is being incremented
1336 in an address in this insn. */
1337 if (reload_inc[i] == 0)
1342 /* If we will replace IN and OUT with the reload-reg,
1343 record where they are located so that substitution need
1344 not do a tree walk. */
1346 if (replace_reloads)
1350 register struct replacement *r = &replacements[n_replacements++];
1352 r->subreg_loc = in_subreg_loc;
1356 if (outloc != 0 && outloc != inloc)
1358 register struct replacement *r = &replacements[n_replacements++];
1361 r->subreg_loc = out_subreg_loc;
1366 /* If this reload is just being introduced and it has both
1367 an incoming quantity and an outgoing quantity that are
1368 supposed to be made to match, see if either one of the two
1369 can serve as the place to reload into.
1371 If one of them is acceptable, set reload_reg_rtx[i]
1374 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1376 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1378 reload_reg_class[i], i,
1379 earlyclobber_operand_p (out));
1381 /* If the outgoing register already contains the same value
1382 as the incoming one, we can dispense with loading it.
1383 The easiest way to tell the caller that is to give a phony
1384 value for the incoming operand (same as outgoing one). */
1385 if (reload_reg_rtx[i] == out
1386 && (GET_CODE (in) == REG || CONSTANT_P (in))
1387 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1388 static_reload_reg_p, i, inmode))
1392 /* If this is an input reload and the operand contains a register that
1393 dies in this insn and is used nowhere else, see if it is the right class
1394 to be used for this reload. Use it if so. (This occurs most commonly
1395 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1396 this if it is also an output reload that mentions the register unless
1397 the output is a SUBREG that clobbers an entire register.
1399 Note that the operand might be one of the spill regs, if it is a
1400 pseudo reg and we are in a block where spilling has not taken place.
1401 But if there is no spilling in this block, that is OK.
1402 An explicitly used hard reg cannot be a spill reg. */
1404 if (reload_reg_rtx[i] == 0 && in != 0)
1409 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1410 if (REG_NOTE_KIND (note) == REG_DEAD
1411 && GET_CODE (XEXP (note, 0)) == REG
1412 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1413 && reg_mentioned_p (XEXP (note, 0), in)
1414 && ! refers_to_regno_for_reload_p (regno,
1416 + HARD_REGNO_NREGS (regno,
1418 PATTERN (this_insn), inloc)
1419 /* If this is also an output reload, IN cannot be used as
1420 the reload register if it is set in this insn unless IN
1422 && (out == 0 || in == out
1423 || ! hard_reg_set_here_p (regno,
1425 + HARD_REGNO_NREGS (regno,
1427 PATTERN (this_insn)))
1428 /* ??? Why is this code so different from the previous?
1429 Is there any simple coherent way to describe the two together?
1430 What's going on here. */
1432 || (GET_CODE (in) == SUBREG
1433 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1435 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1436 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1437 /* Make sure the operand fits in the reg that dies. */
1438 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1439 && HARD_REGNO_MODE_OK (regno, inmode)
1440 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1441 && HARD_REGNO_MODE_OK (regno, outmode)
1442 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1443 && !fixed_regs[regno])
1445 reload_reg_rtx[i] = gen_rtx_REG (inmode, regno);
1451 output_reloadnum = i;
1456 /* Record an additional place we must replace a value
1457 for which we have already recorded a reload.
1458 RELOADNUM is the value returned by push_reload
1459 when the reload was recorded.
1460 This is used in insn patterns that use match_dup. */
1463 push_replacement (loc, reloadnum, mode)
1466 enum machine_mode mode;
1468 if (replace_reloads)
1470 register struct replacement *r = &replacements[n_replacements++];
1471 r->what = reloadnum;
1478 /* Transfer all replacements that used to be in reload FROM to be in
1482 transfer_replacements (to, from)
1487 for (i = 0; i < n_replacements; i++)
1488 if (replacements[i].what == from)
1489 replacements[i].what = to;
1492 /* If there is only one output reload, and it is not for an earlyclobber
1493 operand, try to combine it with a (logically unrelated) input reload
1494 to reduce the number of reload registers needed.
1496 This is safe if the input reload does not appear in
1497 the value being output-reloaded, because this implies
1498 it is not needed any more once the original insn completes.
1500 If that doesn't work, see we can use any of the registers that
1501 die in this insn as a reload register. We can if it is of the right
1502 class and does not appear in the value being output-reloaded. */
1508 int output_reload = -1;
1509 int secondary_out = -1;
1512 /* Find the output reload; return unless there is exactly one
1513 and that one is mandatory. */
1515 for (i = 0; i < n_reloads; i++)
1516 if (reload_out[i] != 0)
1518 if (output_reload >= 0)
1523 if (output_reload < 0 || reload_optional[output_reload])
1526 /* An input-output reload isn't combinable. */
1528 if (reload_in[output_reload] != 0)
1531 /* If this reload is for an earlyclobber operand, we can't do anything. */
1532 if (earlyclobber_operand_p (reload_out[output_reload]))
1535 /* Check each input reload; can we combine it? */
1537 for (i = 0; i < n_reloads; i++)
1538 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1539 /* Life span of this reload must not extend past main insn. */
1540 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
1541 && reload_when_needed[i] != RELOAD_FOR_OUTADDR_ADDRESS
1542 && reload_when_needed[i] != RELOAD_OTHER
1543 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
1544 == CLASS_MAX_NREGS (reload_reg_class[output_reload],
1545 reload_outmode[output_reload]))
1546 && reload_inc[i] == 0
1547 && reload_reg_rtx[i] == 0
1548 #ifdef SECONDARY_MEMORY_NEEDED
1549 /* Don't combine two reloads with different secondary
1550 memory locations. */
1551 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
1552 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
1553 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
1554 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
1556 && (SMALL_REGISTER_CLASSES
1557 ? (reload_reg_class[i] == reload_reg_class[output_reload])
1558 : (reg_class_subset_p (reload_reg_class[i],
1559 reload_reg_class[output_reload])
1560 || reg_class_subset_p (reload_reg_class[output_reload],
1561 reload_reg_class[i])))
1562 && (MATCHES (reload_in[i], reload_out[output_reload])
1563 /* Args reversed because the first arg seems to be
1564 the one that we imagine being modified
1565 while the second is the one that might be affected. */
1566 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1568 /* However, if the input is a register that appears inside
1569 the output, then we also can't share.
1570 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1571 If the same reload reg is used for both reg 69 and the
1572 result to be stored in memory, then that result
1573 will clobber the address of the memory ref. */
1574 && ! (GET_CODE (reload_in[i]) == REG
1575 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1576 reload_out[output_reload]))))
1577 && (reg_class_size[(int) reload_reg_class[i]]
1578 || SMALL_REGISTER_CLASSES)
1579 /* We will allow making things slightly worse by combining an
1580 input and an output, but no worse than that. */
1581 && (reload_when_needed[i] == RELOAD_FOR_INPUT
1582 || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
1586 /* We have found a reload to combine with! */
1587 reload_out[i] = reload_out[output_reload];
1588 reload_outmode[i] = reload_outmode[output_reload];
1589 /* Mark the old output reload as inoperative. */
1590 reload_out[output_reload] = 0;
1591 /* The combined reload is needed for the entire insn. */
1592 reload_when_needed[i] = RELOAD_OTHER;
1593 /* If the output reload had a secondary reload, copy it. */
1594 if (reload_secondary_out_reload[output_reload] != -1)
1596 reload_secondary_out_reload[i]
1597 = reload_secondary_out_reload[output_reload];
1598 reload_secondary_out_icode[i]
1599 = reload_secondary_out_icode[output_reload];
1602 #ifdef SECONDARY_MEMORY_NEEDED
1603 /* Copy any secondary MEM. */
1604 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
1605 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
1606 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
1608 /* If required, minimize the register class. */
1609 if (reg_class_subset_p (reload_reg_class[output_reload],
1610 reload_reg_class[i]))
1611 reload_reg_class[i] = reload_reg_class[output_reload];
1613 /* Transfer all replacements from the old reload to the combined. */
1614 for (j = 0; j < n_replacements; j++)
1615 if (replacements[j].what == output_reload)
1616 replacements[j].what = i;
1621 /* If this insn has only one operand that is modified or written (assumed
1622 to be the first), it must be the one corresponding to this reload. It
1623 is safe to use anything that dies in this insn for that output provided
1624 that it does not occur in the output (we already know it isn't an
1625 earlyclobber. If this is an asm insn, give up. */
1627 if (INSN_CODE (this_insn) == -1)
1630 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1631 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1632 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1635 /* See if some hard register that dies in this insn and is not used in
1636 the output is the right class. Only works if the register we pick
1637 up can fully hold our output reload. */
1638 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1639 if (REG_NOTE_KIND (note) == REG_DEAD
1640 && GET_CODE (XEXP (note, 0)) == REG
1641 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1642 reload_out[output_reload])
1643 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1644 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1645 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1646 REGNO (XEXP (note, 0)))
1647 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1648 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1649 /* Ensure that a secondary or tertiary reload for this output
1650 won't want this register. */
1651 && ((secondary_out = reload_secondary_out_reload[output_reload]) == -1
1652 || (! (TEST_HARD_REG_BIT
1653 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1654 REGNO (XEXP (note, 0))))
1655 && ((secondary_out = reload_secondary_out_reload[secondary_out]) == -1
1656 || ! (TEST_HARD_REG_BIT
1657 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1658 REGNO (XEXP (note, 0)))))))
1659 && ! fixed_regs[REGNO (XEXP (note, 0))])
1661 reload_reg_rtx[output_reload]
1662 = gen_rtx_REG (reload_outmode[output_reload],
1663 REGNO (XEXP (note, 0)));
1668 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1669 See if one of IN and OUT is a register that may be used;
1670 this is desirable since a spill-register won't be needed.
1671 If so, return the register rtx that proves acceptable.
1673 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1674 CLASS is the register class required for the reload.
1676 If FOR_REAL is >= 0, it is the number of the reload,
1677 and in some cases when it can be discovered that OUT doesn't need
1678 to be computed, clear out reload_out[FOR_REAL].
1680 If FOR_REAL is -1, this should not be done, because this call
1681 is just to see if a register can be found, not to find and install it.
1683 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1684 puts an additional constraint on being able to use IN for OUT since
1685 IN must not appear elsewhere in the insn (it is assumed that IN itself
1686 is safe from the earlyclobber). */
1689 find_dummy_reload (real_in, real_out, inloc, outloc,
1690 inmode, outmode, class, for_real, earlyclobber)
1691 rtx real_in, real_out;
1692 rtx *inloc, *outloc;
1693 enum machine_mode inmode, outmode;
1694 enum reg_class class;
1704 /* If operands exceed a word, we can't use either of them
1705 unless they have the same size. */
1706 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1707 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1708 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1711 /* Find the inside of any subregs. */
1712 while (GET_CODE (out) == SUBREG)
1714 out_offset = SUBREG_WORD (out);
1715 out = SUBREG_REG (out);
1717 while (GET_CODE (in) == SUBREG)
1719 in_offset = SUBREG_WORD (in);
1720 in = SUBREG_REG (in);
1723 /* Narrow down the reg class, the same way push_reload will;
1724 otherwise we might find a dummy now, but push_reload won't. */
1725 class = PREFERRED_RELOAD_CLASS (in, class);
1727 /* See if OUT will do. */
1728 if (GET_CODE (out) == REG
1729 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1731 register int regno = REGNO (out) + out_offset;
1732 int nwords = HARD_REGNO_NREGS (regno, outmode);
1735 /* When we consider whether the insn uses OUT,
1736 ignore references within IN. They don't prevent us
1737 from copying IN into OUT, because those refs would
1738 move into the insn that reloads IN.
1740 However, we only ignore IN in its role as this reload.
1741 If the insn uses IN elsewhere and it contains OUT,
1742 that counts. We can't be sure it's the "same" operand
1743 so it might not go through this reload. */
1745 *inloc = const0_rtx;
1747 if (regno < FIRST_PSEUDO_REGISTER
1748 /* A fixed reg that can overlap other regs better not be used
1749 for reloading in any way. */
1750 #ifdef OVERLAPPING_REGNO_P
1751 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1753 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1754 PATTERN (this_insn), outloc))
1757 for (i = 0; i < nwords; i++)
1758 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1764 if (GET_CODE (real_out) == REG)
1767 value = gen_rtx_REG (outmode, regno);
1774 /* Consider using IN if OUT was not acceptable
1775 or if OUT dies in this insn (like the quotient in a divmod insn).
1776 We can't use IN unless it is dies in this insn,
1777 which means we must know accurately which hard regs are live.
1778 Also, the result can't go in IN if IN is used within OUT,
1779 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1780 if (hard_regs_live_known
1781 && GET_CODE (in) == REG
1782 && REGNO (in) < FIRST_PSEUDO_REGISTER
1784 || find_reg_note (this_insn, REG_UNUSED, real_out))
1785 && find_reg_note (this_insn, REG_DEAD, real_in)
1786 && !fixed_regs[REGNO (in)]
1787 && HARD_REGNO_MODE_OK (REGNO (in),
1788 /* The only case where out and real_out might
1789 have different modes is where real_out
1790 is a subreg, and in that case, out
1792 (GET_MODE (out) != VOIDmode
1793 ? GET_MODE (out) : outmode)))
1795 register int regno = REGNO (in) + in_offset;
1796 int nwords = HARD_REGNO_NREGS (regno, inmode);
1798 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1799 && ! hard_reg_set_here_p (regno, regno + nwords,
1800 PATTERN (this_insn))
1802 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1803 PATTERN (this_insn), inloc)))
1806 for (i = 0; i < nwords; i++)
1807 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1813 /* If we were going to use OUT as the reload reg
1814 and changed our mind, it means OUT is a dummy that
1815 dies here. So don't bother copying value to it. */
1816 if (for_real >= 0 && value == real_out)
1817 reload_out[for_real] = 0;
1818 if (GET_CODE (real_in) == REG)
1821 value = gen_rtx_REG (inmode, regno);
1829 /* This page contains subroutines used mainly for determining
1830 whether the IN or an OUT of a reload can serve as the
1833 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1836 earlyclobber_operand_p (x)
1841 for (i = 0; i < n_earlyclobbers; i++)
1842 if (reload_earlyclobbers[i] == x)
1848 /* Return 1 if expression X alters a hard reg in the range
1849 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1850 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1851 X should be the body of an instruction. */
1854 hard_reg_set_here_p (beg_regno, end_regno, x)
1855 register int beg_regno, end_regno;
1858 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1860 register rtx op0 = SET_DEST (x);
1861 while (GET_CODE (op0) == SUBREG)
1862 op0 = SUBREG_REG (op0);
1863 if (GET_CODE (op0) == REG)
1865 register int r = REGNO (op0);
1866 /* See if this reg overlaps range under consideration. */
1868 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1872 else if (GET_CODE (x) == PARALLEL)
1874 register int i = XVECLEN (x, 0) - 1;
1876 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1883 /* Return 1 if ADDR is a valid memory address for mode MODE,
1884 and check that each pseudo reg has the proper kind of
1888 strict_memory_address_p (mode, addr)
1889 enum machine_mode mode;
1892 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
1899 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1900 if they are the same hard reg, and has special hacks for
1901 autoincrement and autodecrement.
1902 This is specifically intended for find_reloads to use
1903 in determining whether two operands match.
1904 X is the operand whose number is the lower of the two.
1906 The value is 2 if Y contains a pre-increment that matches
1907 a non-incrementing address in X. */
1909 /* ??? To be completely correct, we should arrange to pass
1910 for X the output operand and for Y the input operand.
1911 For now, we assume that the output operand has the lower number
1912 because that is natural in (SET output (... input ...)). */
1915 operands_match_p (x, y)
1919 register RTX_CODE code = GET_CODE (x);
1925 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
1926 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
1927 && GET_CODE (SUBREG_REG (y)) == REG)))
1933 i = REGNO (SUBREG_REG (x));
1934 if (i >= FIRST_PSEUDO_REGISTER)
1936 i += SUBREG_WORD (x);
1941 if (GET_CODE (y) == SUBREG)
1943 j = REGNO (SUBREG_REG (y));
1944 if (j >= FIRST_PSEUDO_REGISTER)
1946 j += SUBREG_WORD (y);
1951 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1952 multiple hard register group, so that for example (reg:DI 0) and
1953 (reg:SI 1) will be considered the same register. */
1954 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
1955 && i < FIRST_PSEUDO_REGISTER)
1956 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
1957 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
1958 && j < FIRST_PSEUDO_REGISTER)
1959 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
1963 /* If two operands must match, because they are really a single
1964 operand of an assembler insn, then two postincrements are invalid
1965 because the assembler insn would increment only once.
1966 On the other hand, an postincrement matches ordinary indexing
1967 if the postincrement is the output operand. */
1968 if (code == POST_DEC || code == POST_INC)
1969 return operands_match_p (XEXP (x, 0), y);
1970 /* Two preincrements are invalid
1971 because the assembler insn would increment only once.
1972 On the other hand, an preincrement matches ordinary indexing
1973 if the preincrement is the input operand.
1974 In this case, return 2, since some callers need to do special
1975 things when this happens. */
1976 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
1977 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
1981 /* Now we have disposed of all the cases
1982 in which different rtx codes can match. */
1983 if (code != GET_CODE (y))
1985 if (code == LABEL_REF)
1986 return XEXP (x, 0) == XEXP (y, 0);
1987 if (code == SYMBOL_REF)
1988 return XSTR (x, 0) == XSTR (y, 0);
1990 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1992 if (GET_MODE (x) != GET_MODE (y))
1995 /* Compare the elements. If any pair of corresponding elements
1996 fail to match, return 0 for the whole things. */
1999 fmt = GET_RTX_FORMAT (code);
2000 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2006 if (XWINT (x, i) != XWINT (y, i))
2011 if (XINT (x, i) != XINT (y, i))
2016 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2019 /* If any subexpression returns 2,
2020 we should return 2 if we are successful. */
2028 /* It is believed that rtx's at this level will never
2029 contain anything but integers and other rtx's,
2030 except for within LABEL_REFs and SYMBOL_REFs. */
2035 return 1 + success_2;
2038 /* Return the number of times character C occurs in string S. */
2041 n_occurrences (c, s)
2051 /* Describe the range of registers or memory referenced by X.
2052 If X is a register, set REG_FLAG and put the first register
2053 number into START and the last plus one into END.
2054 If X is a memory reference, put a base address into BASE
2055 and a range of integer offsets into START and END.
2056 If X is pushing on the stack, we can assume it causes no trouble,
2057 so we set the SAFE field. */
2059 static struct decomposition
2063 struct decomposition val;
2069 if (GET_CODE (x) == MEM)
2071 rtx base, offset = 0;
2072 rtx addr = XEXP (x, 0);
2074 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2075 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2077 val.base = XEXP (addr, 0);
2078 val.start = - GET_MODE_SIZE (GET_MODE (x));
2079 val.end = GET_MODE_SIZE (GET_MODE (x));
2080 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2084 if (GET_CODE (addr) == CONST)
2086 addr = XEXP (addr, 0);
2089 if (GET_CODE (addr) == PLUS)
2091 if (CONSTANT_P (XEXP (addr, 0)))
2093 base = XEXP (addr, 1);
2094 offset = XEXP (addr, 0);
2096 else if (CONSTANT_P (XEXP (addr, 1)))
2098 base = XEXP (addr, 0);
2099 offset = XEXP (addr, 1);
2106 offset = const0_rtx;
2108 if (GET_CODE (offset) == CONST)
2109 offset = XEXP (offset, 0);
2110 if (GET_CODE (offset) == PLUS)
2112 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2114 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2115 offset = XEXP (offset, 0);
2117 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2119 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2120 offset = XEXP (offset, 1);
2124 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2125 offset = const0_rtx;
2128 else if (GET_CODE (offset) != CONST_INT)
2130 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2131 offset = const0_rtx;
2134 if (all_const && GET_CODE (base) == PLUS)
2135 base = gen_rtx_CONST (GET_MODE (base), base);
2137 if (GET_CODE (offset) != CONST_INT)
2140 val.start = INTVAL (offset);
2141 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2145 else if (GET_CODE (x) == REG)
2148 val.start = true_regnum (x);
2151 /* A pseudo with no hard reg. */
2152 val.start = REGNO (x);
2153 val.end = val.start + 1;
2157 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2159 else if (GET_CODE (x) == SUBREG)
2161 if (GET_CODE (SUBREG_REG (x)) != REG)
2162 /* This could be more precise, but it's good enough. */
2163 return decompose (SUBREG_REG (x));
2165 val.start = true_regnum (x);
2167 return decompose (SUBREG_REG (x));
2170 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2172 else if (CONSTANT_P (x)
2173 /* This hasn't been assigned yet, so it can't conflict yet. */
2174 || GET_CODE (x) == SCRATCH)
2181 /* Return 1 if altering Y will not modify the value of X.
2182 Y is also described by YDATA, which should be decompose (Y). */
2185 immune_p (x, y, ydata)
2187 struct decomposition ydata;
2189 struct decomposition xdata;
2192 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2196 if (GET_CODE (y) != MEM)
2198 /* If Y is memory and X is not, Y can't affect X. */
2199 if (GET_CODE (x) != MEM)
2202 xdata = decompose (x);
2204 if (! rtx_equal_p (xdata.base, ydata.base))
2206 /* If bases are distinct symbolic constants, there is no overlap. */
2207 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2209 /* Constants and stack slots never overlap. */
2210 if (CONSTANT_P (xdata.base)
2211 && (ydata.base == frame_pointer_rtx
2212 || ydata.base == hard_frame_pointer_rtx
2213 || ydata.base == stack_pointer_rtx))
2215 if (CONSTANT_P (ydata.base)
2216 && (xdata.base == frame_pointer_rtx
2217 || xdata.base == hard_frame_pointer_rtx
2218 || xdata.base == stack_pointer_rtx))
2220 /* If either base is variable, we don't know anything. */
2225 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2228 /* Similar, but calls decompose. */
2231 safe_from_earlyclobber (op, clobber)
2234 struct decomposition early_data;
2236 early_data = decompose (clobber);
2237 return immune_p (op, clobber, early_data);
2240 /* Main entry point of this file: search the body of INSN
2241 for values that need reloading and record them with push_reload.
2242 REPLACE nonzero means record also where the values occur
2243 so that subst_reloads can be used.
2245 IND_LEVELS says how many levels of indirection are supported by this
2246 machine; a value of zero means that a memory reference is not a valid
2249 LIVE_KNOWN says we have valid information about which hard
2250 regs are live at each point in the program; this is true when
2251 we are called from global_alloc but false when stupid register
2252 allocation has been done.
2254 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2255 which is nonnegative if the reg has been commandeered for reloading into.
2256 It is copied into STATIC_RELOAD_REG_P and referenced from there
2257 by various subroutines. */
2260 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2262 int replace, ind_levels;
2264 short *reload_reg_p;
2266 #ifdef REGISTER_CONSTRAINTS
2268 register int insn_code_number;
2271 /* These are the constraints for the insn. We don't change them. */
2272 char *constraints1[MAX_RECOG_OPERANDS];
2273 /* These start out as the constraints for the insn
2274 and they are chewed up as we consider alternatives. */
2275 char *constraints[MAX_RECOG_OPERANDS];
2276 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2278 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2279 char pref_or_nothing[MAX_RECOG_OPERANDS];
2280 /* Nonzero for a MEM operand whose entire address needs a reload. */
2281 int address_reloaded[MAX_RECOG_OPERANDS];
2282 /* Value of enum reload_type to use for operand. */
2283 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2284 /* Value of enum reload_type to use within address of operand. */
2285 enum reload_type address_type[MAX_RECOG_OPERANDS];
2286 /* Save the usage of each operand. */
2287 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2288 int no_input_reloads = 0, no_output_reloads = 0;
2290 int this_alternative[MAX_RECOG_OPERANDS];
2291 char this_alternative_win[MAX_RECOG_OPERANDS];
2292 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2293 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2294 int this_alternative_matches[MAX_RECOG_OPERANDS];
2296 int goal_alternative[MAX_RECOG_OPERANDS];
2297 int this_alternative_number;
2298 int goal_alternative_number;
2299 int operand_reloadnum[MAX_RECOG_OPERANDS];
2300 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2301 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2302 char goal_alternative_win[MAX_RECOG_OPERANDS];
2303 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2304 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2305 int goal_alternative_swapped;
2308 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2309 rtx substed_operand[MAX_RECOG_OPERANDS];
2310 rtx body = PATTERN (insn);
2311 rtx set = single_set (insn);
2312 int goal_earlyclobber, this_earlyclobber;
2313 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2316 this_insn_is_asm = 0; /* Tentative. */
2320 n_earlyclobbers = 0;
2321 replace_reloads = replace;
2322 hard_regs_live_known = live_known;
2323 static_reload_reg_p = reload_reg_p;
2325 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2326 neither are insns that SET cc0. Insns that use CC0 are not allowed
2327 to have any input reloads. */
2328 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2329 no_output_reloads = 1;
2332 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2333 no_input_reloads = 1;
2334 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2335 no_output_reloads = 1;
2338 #ifdef SECONDARY_MEMORY_NEEDED
2339 /* The eliminated forms of any secondary memory locations are per-insn, so
2340 clear them out here. */
2342 bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2345 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2346 Make OPERANDS point to a vector of operand values.
2347 Make OPERAND_LOCS point to a vector of pointers to
2348 where the operands were found.
2349 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2350 constraint-strings for this insn.
2351 Return if the insn needs no reload processing. */
2353 switch (GET_CODE (body))
2363 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2364 is cheap to move between them. If it is not, there may not be an insn
2365 to do the copy, so we may need a reload. */
2366 if (GET_CODE (SET_DEST (body)) == REG
2367 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2368 && GET_CODE (SET_SRC (body)) == REG
2369 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2370 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2371 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2375 reload_n_operands = noperands = asm_noperands (body);
2378 /* This insn is an `asm' with operands. */
2380 insn_code_number = -1;
2381 this_insn_is_asm = 1;
2383 /* expand_asm_operands makes sure there aren't too many operands. */
2384 if (noperands > MAX_RECOG_OPERANDS)
2387 /* Now get the operand values and constraints out of the insn. */
2389 decode_asm_operands (body, recog_operand, recog_operand_loc,
2390 constraints, operand_mode);
2393 bcopy ((char *) constraints, (char *) constraints1,
2394 noperands * sizeof (char *));
2395 n_alternatives = n_occurrences (',', constraints[0]) + 1;
2396 for (i = 1; i < noperands; i++)
2397 if (n_alternatives != n_occurrences (',', constraints[i]) + 1)
2399 error_for_asm (insn, "operand constraints differ in number of alternatives");
2400 /* Avoid further trouble with this insn. */
2401 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
2410 /* Ordinary insn: recognize it, get the operands via insn_extract
2411 and get the constraints. */
2413 insn_code_number = recog_memoized (insn);
2414 if (insn_code_number < 0)
2415 fatal_insn_not_found (insn);
2417 reload_n_operands = noperands = insn_n_operands[insn_code_number];
2418 n_alternatives = insn_n_alternatives[insn_code_number];
2419 /* Just return "no reloads" if insn has no operands with constraints. */
2420 if (n_alternatives == 0)
2422 insn_extract (insn);
2423 for (i = 0; i < noperands; i++)
2425 constraints[i] = constraints1[i]
2426 = insn_operand_constraint[insn_code_number][i];
2427 operand_mode[i] = insn_operand_mode[insn_code_number][i];
2436 /* If we will need to know, later, whether some pair of operands
2437 are the same, we must compare them now and save the result.
2438 Reloading the base and index registers will clobber them
2439 and afterward they will fail to match. */
2441 for (i = 0; i < noperands; i++)
2446 substed_operand[i] = recog_operand[i];
2449 modified[i] = RELOAD_READ;
2451 /* Scan this operand's constraint to see if it is an output operand,
2452 an in-out operand, is commutative, or should match another. */
2457 modified[i] = RELOAD_WRITE;
2459 modified[i] = RELOAD_READ_WRITE;
2462 /* The last operand should not be marked commutative. */
2463 if (i == noperands - 1)
2465 if (this_insn_is_asm)
2466 warning_for_asm (this_insn,
2467 "`%%' constraint used with last operand");
2474 else if (c >= '0' && c <= '9')
2477 operands_match[c][i]
2478 = operands_match_p (recog_operand[c], recog_operand[i]);
2480 /* An operand may not match itself. */
2483 if (this_insn_is_asm)
2484 warning_for_asm (this_insn,
2485 "operand %d has constraint %d", i, c);
2490 /* If C can be commuted with C+1, and C might need to match I,
2491 then C+1 might also need to match I. */
2492 if (commutative >= 0)
2494 if (c == commutative || c == commutative + 1)
2496 int other = c + (c == commutative ? 1 : -1);
2497 operands_match[other][i]
2498 = operands_match_p (recog_operand[other], recog_operand[i]);
2500 if (i == commutative || i == commutative + 1)
2502 int other = i + (i == commutative ? 1 : -1);
2503 operands_match[c][other]
2504 = operands_match_p (recog_operand[c], recog_operand[other]);
2506 /* Note that C is supposed to be less than I.
2507 No need to consider altering both C and I because in
2508 that case we would alter one into the other. */
2514 /* Examine each operand that is a memory reference or memory address
2515 and reload parts of the addresses into index registers.
2516 Also here any references to pseudo regs that didn't get hard regs
2517 but are equivalent to constants get replaced in the insn itself
2518 with those constants. Nobody will ever see them again.
2520 Finally, set up the preferred classes of each operand. */
2522 for (i = 0; i < noperands; i++)
2524 register RTX_CODE code = GET_CODE (recog_operand[i]);
2526 address_reloaded[i] = 0;
2527 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2528 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2531 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2532 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2535 if (*constraints[i] == 0)
2536 /* Ignore things like match_operator operands. */
2538 else if (constraints[i][0] == 'p')
2540 find_reloads_address (VOIDmode, NULL_PTR,
2541 recog_operand[i], recog_operand_loc[i],
2542 i, operand_type[i], ind_levels, insn);
2544 /* If we now have a simple operand where we used to have a
2545 PLUS or MULT, re-recognize and try again. */
2546 if ((GET_RTX_CLASS (GET_CODE (*recog_operand_loc[i])) == 'o'
2547 || GET_CODE (*recog_operand_loc[i]) == SUBREG)
2548 && (GET_CODE (recog_operand[i]) == MULT
2549 || GET_CODE (recog_operand[i]) == PLUS))
2551 INSN_CODE (insn) = -1;
2552 find_reloads (insn, replace, ind_levels, live_known,
2557 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2559 else if (code == MEM)
2561 if (find_reloads_address (GET_MODE (recog_operand[i]),
2562 recog_operand_loc[i],
2563 XEXP (recog_operand[i], 0),
2564 &XEXP (recog_operand[i], 0),
2565 i, address_type[i], ind_levels, insn))
2566 address_reloaded[i] = 1;
2567 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2569 else if (code == SUBREG)
2570 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2571 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2574 && &SET_DEST (set) == recog_operand_loc[i]);
2575 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2576 /* We can get a PLUS as an "operand" as a result of register
2577 elimination. See eliminate_regs and gen_reload. We handle
2578 a unary operator by reloading the operand. */
2579 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2580 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2582 else if (code == REG)
2584 /* This is equivalent to calling find_reloads_toplev.
2585 The code is duplicated for speed.
2586 When we find a pseudo always equivalent to a constant,
2587 we replace it by the constant. We must be sure, however,
2588 that we don't try to replace it in the insn in which it
2590 register int regno = REGNO (recog_operand[i]);
2591 if (reg_equiv_constant[regno] != 0
2592 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2593 substed_operand[i] = recog_operand[i]
2594 = reg_equiv_constant[regno];
2595 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2596 that feeds this insn. */
2597 if (reg_equiv_mem[regno] != 0)
2598 substed_operand[i] = recog_operand[i]
2599 = reg_equiv_mem[regno];
2601 if (reg_equiv_address[regno] != 0)
2603 /* If reg_equiv_address is not a constant address, copy it,
2604 since it may be shared. */
2605 /* We must rerun eliminate_regs, in case the elimination
2606 offsets have changed. */
2607 rtx address = XEXP (eliminate_regs (reg_equiv_memory_loc[regno],
2611 if (rtx_varies_p (address))
2612 address = copy_rtx (address);
2614 /* If this is an output operand, we must output a CLOBBER
2615 after INSN so find_equiv_reg knows REGNO is being written.
2616 Mark this insn specially, do we can put our output reloads
2619 if (modified[i] != RELOAD_READ)
2620 PUT_MODE (emit_insn_after (gen_rtx_CLOBBER (VOIDmode,
2625 *recog_operand_loc[i] = recog_operand[i]
2626 = gen_rtx_MEM (GET_MODE (recog_operand[i]), address);
2627 RTX_UNCHANGING_P (recog_operand[i])
2628 = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
2629 find_reloads_address (GET_MODE (recog_operand[i]),
2630 recog_operand_loc[i],
2631 XEXP (recog_operand[i], 0),
2632 &XEXP (recog_operand[i], 0),
2633 i, address_type[i], ind_levels, insn);
2634 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2637 /* If the operand is still a register (we didn't replace it with an
2638 equivalent), get the preferred class to reload it into. */
2639 code = GET_CODE (recog_operand[i]);
2641 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
2642 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2644 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
2645 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2648 /* If this is simply a copy from operand 1 to operand 0, merge the
2649 preferred classes for the operands. */
2650 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2651 && recog_operand[1] == SET_SRC (set))
2653 preferred_class[0] = preferred_class[1]
2654 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2655 pref_or_nothing[0] |= pref_or_nothing[1];
2656 pref_or_nothing[1] |= pref_or_nothing[0];
2659 /* Now see what we need for pseudo-regs that didn't get hard regs
2660 or got the wrong kind of hard reg. For this, we must consider
2661 all the operands together against the register constraints. */
2663 best = MAX_RECOG_OPERANDS + 300;
2666 goal_alternative_swapped = 0;
2669 /* The constraints are made of several alternatives.
2670 Each operand's constraint looks like foo,bar,... with commas
2671 separating the alternatives. The first alternatives for all
2672 operands go together, the second alternatives go together, etc.
2674 First loop over alternatives. */
2676 for (this_alternative_number = 0;
2677 this_alternative_number < n_alternatives;
2678 this_alternative_number++)
2680 /* Loop over operands for one constraint alternative. */
2681 /* LOSERS counts those that don't fit this alternative
2682 and would require loading. */
2684 /* BAD is set to 1 if it some operand can't fit this alternative
2685 even after reloading. */
2687 /* REJECT is a count of how undesirable this alternative says it is
2688 if any reloading is required. If the alternative matches exactly
2689 then REJECT is ignored, but otherwise it gets this much
2690 counted against it in addition to the reloading needed. Each
2691 ? counts three times here since we want the disparaging caused by
2692 a bad register class to only count 1/3 as much. */
2695 this_earlyclobber = 0;
2697 for (i = 0; i < noperands; i++)
2699 register char *p = constraints[i];
2700 register int win = 0;
2701 /* 0 => this operand can be reloaded somehow for this alternative */
2703 /* 0 => this operand can be reloaded if the alternative allows regs. */
2706 register rtx operand = recog_operand[i];
2708 /* Nonzero means this is a MEM that must be reloaded into a reg
2709 regardless of what the constraint says. */
2710 int force_reload = 0;
2712 /* Nonzero if a constant forced into memory would be OK for this
2715 int earlyclobber = 0;
2717 /* If the predicate accepts a unary operator, it means that
2718 we need to reload the operand. */
2719 if (GET_RTX_CLASS (GET_CODE (operand)) == '1')
2720 operand = XEXP (operand, 0);
2722 /* If the operand is a SUBREG, extract
2723 the REG or MEM (or maybe even a constant) within.
2724 (Constants can occur as a result of reg_equiv_constant.) */
2726 while (GET_CODE (operand) == SUBREG)
2728 offset += SUBREG_WORD (operand);
2729 operand = SUBREG_REG (operand);
2730 /* Force reload if this is a constant or PLUS or if there may may
2731 be a problem accessing OPERAND in the outer mode. */
2732 if (CONSTANT_P (operand)
2733 || GET_CODE (operand) == PLUS
2734 /* We must force a reload of paradoxical SUBREGs
2735 of a MEM because the alignment of the inner value
2736 may not be enough to do the outer reference. On
2737 big-endian machines, it may also reference outside
2740 On machines that extend byte operations and we have a
2741 SUBREG where both the inner and outer modes are no wider
2742 than a word and the inner mode is narrower, is integral,
2743 and gets extended when loaded from memory, combine.c has
2744 made assumptions about the behavior of the machine in such
2745 register access. If the data is, in fact, in memory we
2746 must always load using the size assumed to be in the
2747 register and let the insn do the different-sized
2749 || ((GET_CODE (operand) == MEM
2750 || (GET_CODE (operand)== REG
2751 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2752 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2753 < BIGGEST_ALIGNMENT)
2754 && (GET_MODE_SIZE (operand_mode[i])
2755 > GET_MODE_SIZE (GET_MODE (operand))))
2756 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2757 #ifdef LOAD_EXTEND_OP
2758 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2759 && (GET_MODE_SIZE (GET_MODE (operand))
2761 && (GET_MODE_SIZE (operand_mode[i])
2762 > GET_MODE_SIZE (GET_MODE (operand)))
2763 && INTEGRAL_MODE_P (GET_MODE (operand))
2764 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2767 /* Subreg of a hard reg which can't handle the subreg's mode
2768 or which would handle that mode in the wrong number of
2769 registers for subregging to work. */
2770 || (GET_CODE (operand) == REG
2771 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2772 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2773 && (GET_MODE_SIZE (GET_MODE (operand))
2775 && ((GET_MODE_SIZE (GET_MODE (operand))
2777 != HARD_REGNO_NREGS (REGNO (operand),
2778 GET_MODE (operand))))
2779 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2784 this_alternative[i] = (int) NO_REGS;
2785 this_alternative_win[i] = 0;
2786 this_alternative_offmemok[i] = 0;
2787 this_alternative_earlyclobber[i] = 0;
2788 this_alternative_matches[i] = -1;
2790 /* An empty constraint or empty alternative
2791 allows anything which matched the pattern. */
2792 if (*p == 0 || *p == ',')
2795 /* Scan this alternative's specs for this operand;
2796 set WIN if the operand fits any letter in this alternative.
2797 Otherwise, clear BADOP if this operand could
2798 fit some letter after reloads,
2799 or set WINREG if this operand could fit after reloads
2800 provided the constraint allows some registers. */
2802 while (*p && (c = *p++) != ',')
2811 /* The last operand should not be marked commutative. */
2812 if (i != noperands - 1)
2825 /* Ignore rest of this alternative as far as
2826 reloading is concerned. */
2827 while (*p && *p != ',') p++;
2836 this_alternative_matches[i] = c;
2837 /* We are supposed to match a previous operand.
2838 If we do, we win if that one did.
2839 If we do not, count both of the operands as losers.
2840 (This is too conservative, since most of the time
2841 only a single reload insn will be needed to make
2842 the two operands win. As a result, this alternative
2843 may be rejected when it is actually desirable.) */
2844 if ((swapped && (c != commutative || i != commutative + 1))
2845 /* If we are matching as if two operands were swapped,
2846 also pretend that operands_match had been computed
2848 But if I is the second of those and C is the first,
2849 don't exchange them, because operands_match is valid
2850 only on one side of its diagonal. */
2852 [(c == commutative || c == commutative + 1)
2853 ? 2*commutative + 1 - c : c]
2854 [(i == commutative || i == commutative + 1)
2855 ? 2*commutative + 1 - i : i])
2856 : operands_match[c][i])
2858 /* If we are matching a non-offsettable address where an
2859 offsettable address was expected, then we must reject
2860 this combination, because we can't reload it. */
2861 if (this_alternative_offmemok[c]
2862 && GET_CODE (recog_operand[c]) == MEM
2863 && this_alternative[c] == (int) NO_REGS
2864 && ! this_alternative_win[c])
2867 win = this_alternative_win[c];
2871 /* Operands don't match. */
2873 /* Retroactively mark the operand we had to match
2874 as a loser, if it wasn't already. */
2875 if (this_alternative_win[c])
2877 this_alternative_win[c] = 0;
2878 if (this_alternative[c] == (int) NO_REGS)
2880 /* But count the pair only once in the total badness of
2881 this alternative, if the pair can be a dummy reload. */
2883 = find_dummy_reload (recog_operand[i], recog_operand[c],
2884 recog_operand_loc[i], recog_operand_loc[c],
2885 operand_mode[i], operand_mode[c],
2886 this_alternative[c], -1,
2887 this_alternative_earlyclobber[c]);
2892 /* This can be fixed with reloads if the operand
2893 we are supposed to match can be fixed with reloads. */
2895 this_alternative[i] = this_alternative[c];
2897 /* If we have to reload this operand and some previous
2898 operand also had to match the same thing as this
2899 operand, we don't know how to do that. So reject this
2901 if (! win || force_reload)
2902 for (j = 0; j < i; j++)
2903 if (this_alternative_matches[j]
2904 == this_alternative_matches[i])
2910 /* All necessary reloads for an address_operand
2911 were handled in find_reloads_address. */
2912 this_alternative[i] = (int) BASE_REG_CLASS;
2919 if (GET_CODE (operand) == MEM
2920 || (GET_CODE (operand) == REG
2921 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2922 && reg_renumber[REGNO (operand)] < 0))
2924 if (CONSTANT_P (operand)
2925 /* force_const_mem does not accept HIGH. */
2926 && GET_CODE (operand) != HIGH)
2932 if (GET_CODE (operand) == MEM
2933 && ! address_reloaded[i]
2934 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2935 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2940 if (GET_CODE (operand) == MEM
2941 && ! address_reloaded[i]
2942 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2943 || GET_CODE (XEXP (operand, 0)) == POST_INC))
2947 /* Memory operand whose address is not offsettable. */
2951 if (GET_CODE (operand) == MEM
2952 && ! (ind_levels ? offsettable_memref_p (operand)
2953 : offsettable_nonstrict_memref_p (operand))
2954 /* Certain mem addresses will become offsettable
2955 after they themselves are reloaded. This is important;
2956 we don't want our own handling of unoffsettables
2957 to override the handling of reg_equiv_address. */
2958 && !(GET_CODE (XEXP (operand, 0)) == REG
2960 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
2964 /* Memory operand whose address is offsettable. */
2968 if ((GET_CODE (operand) == MEM
2969 /* If IND_LEVELS, find_reloads_address won't reload a
2970 pseudo that didn't get a hard reg, so we have to
2971 reject that case. */
2972 && (ind_levels ? offsettable_memref_p (operand)
2973 : offsettable_nonstrict_memref_p (operand)))
2974 /* A reloaded auto-increment address is offsettable,
2975 because it is now just a simple register indirect. */
2976 || (GET_CODE (operand) == MEM
2977 && address_reloaded[i]
2978 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2979 || GET_CODE (XEXP (operand, 0)) == PRE_DEC
2980 || GET_CODE (XEXP (operand, 0)) == POST_INC
2981 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2982 /* Certain mem addresses will become offsettable
2983 after they themselves are reloaded. This is important;
2984 we don't want our own handling of unoffsettables
2985 to override the handling of reg_equiv_address. */
2986 || (GET_CODE (operand) == MEM
2987 && GET_CODE (XEXP (operand, 0)) == REG
2989 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))
2990 || (GET_CODE (operand) == REG
2991 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2992 && reg_renumber[REGNO (operand)] < 0
2993 /* If reg_equiv_address is nonzero, we will be
2994 loading it into a register; hence it will be
2995 offsettable, but we cannot say that reg_equiv_mem
2996 is offsettable without checking. */
2997 && ((reg_equiv_mem[REGNO (operand)] != 0
2998 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
2999 || (reg_equiv_address[REGNO (operand)] != 0))))
3001 /* force_const_mem does not accept HIGH. */
3002 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3003 || GET_CODE (operand) == MEM)
3010 /* Output operand that is stored before the need for the
3011 input operands (and their index registers) is over. */
3012 earlyclobber = 1, this_earlyclobber = 1;
3016 #ifndef REAL_ARITHMETIC
3017 /* Match any floating double constant, but only if
3018 we can examine the bits of it reliably. */
3019 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
3020 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
3021 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
3024 if (GET_CODE (operand) == CONST_DOUBLE)
3029 if (GET_CODE (operand) == CONST_DOUBLE)
3035 if (GET_CODE (operand) == CONST_DOUBLE
3036 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
3041 if (GET_CODE (operand) == CONST_INT
3042 || (GET_CODE (operand) == CONST_DOUBLE
3043 && GET_MODE (operand) == VOIDmode))
3046 if (CONSTANT_P (operand)
3047 #ifdef LEGITIMATE_PIC_OPERAND_P
3048 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3055 if (GET_CODE (operand) == CONST_INT
3056 || (GET_CODE (operand) == CONST_DOUBLE
3057 && GET_MODE (operand) == VOIDmode))
3069 if (GET_CODE (operand) == CONST_INT
3070 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
3080 /* A PLUS is never a valid operand, but reload can make
3081 it from a register when eliminating registers. */
3082 && GET_CODE (operand) != PLUS
3083 /* A SCRATCH is not a valid operand. */
3084 && GET_CODE (operand) != SCRATCH
3085 #ifdef LEGITIMATE_PIC_OPERAND_P
3086 && (! CONSTANT_P (operand)
3088 || LEGITIMATE_PIC_OPERAND_P (operand))
3090 && (GENERAL_REGS == ALL_REGS
3091 || GET_CODE (operand) != REG
3092 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3093 && reg_renumber[REGNO (operand)] < 0)))
3095 /* Drop through into 'r' case */
3099 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3102 #ifdef EXTRA_CONSTRAINT
3108 if (EXTRA_CONSTRAINT (operand, c))
3115 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3118 if (GET_MODE (operand) == BLKmode)
3121 if (GET_CODE (operand) == REG
3122 && reg_fits_class_p (operand, this_alternative[i],
3123 offset, GET_MODE (recog_operand[i])))
3130 /* If this operand could be handled with a reg,
3131 and some reg is allowed, then this operand can be handled. */
3132 if (winreg && this_alternative[i] != (int) NO_REGS)
3135 /* Record which operands fit this alternative. */
3136 this_alternative_earlyclobber[i] = earlyclobber;
3137 if (win && ! force_reload)
3138 this_alternative_win[i] = 1;
3141 int const_to_mem = 0;
3143 this_alternative_offmemok[i] = offmemok;
3147 /* Alternative loses if it has no regs for a reg operand. */
3148 if (GET_CODE (operand) == REG
3149 && this_alternative[i] == (int) NO_REGS
3150 && this_alternative_matches[i] < 0)
3153 /* Alternative loses if it requires a type of reload not
3154 permitted for this insn. We can always reload SCRATCH
3155 and objects with a REG_UNUSED note. */
3156 if (GET_CODE (operand) != SCRATCH
3157 && modified[i] != RELOAD_READ && no_output_reloads
3158 && ! find_reg_note (insn, REG_UNUSED, operand))
3160 else if (modified[i] != RELOAD_WRITE && no_input_reloads)
3163 /* If this is a constant that is reloaded into the desired
3164 class by copying it to memory first, count that as another
3165 reload. This is consistent with other code and is
3166 required to avoid choosing another alternative when
3167 the constant is moved into memory by this function on
3168 an early reload pass. Note that the test here is
3169 precisely the same as in the code below that calls
3171 if (CONSTANT_P (operand)
3172 /* force_const_mem does not accept HIGH. */
3173 && GET_CODE (operand) != HIGH
3174 && (PREFERRED_RELOAD_CLASS (operand,
3175 (enum reg_class) this_alternative[i])
3177 && operand_mode[i] != VOIDmode)
3180 if (this_alternative[i] != (int) NO_REGS)
3184 /* If we can't reload this value at all, reject this
3185 alternative. Note that we could also lose due to
3186 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3189 if (! CONSTANT_P (operand)
3190 && (enum reg_class) this_alternative[i] != NO_REGS
3191 && (PREFERRED_RELOAD_CLASS (operand,
3192 (enum reg_class) this_alternative[i])
3196 /* We prefer to reload pseudos over reloading other things,
3197 since such reloads may be able to be eliminated later.
3198 If we are reloading a SCRATCH, we won't be generating any
3199 insns, just using a register, so it is also preferred.
3200 So bump REJECT in other cases. Don't do this in the
3201 case where we are forcing a constant into memory and
3202 it will then win since we don't want to have a different
3203 alternative match then. */
3204 if (! (GET_CODE (operand) == REG
3205 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3206 && GET_CODE (operand) != SCRATCH
3207 && ! (const_to_mem && constmemok))
3211 /* If this operand is a pseudo register that didn't get a hard
3212 reg and this alternative accepts some register, see if the
3213 class that we want is a subset of the preferred class for this
3214 register. If not, but it intersects that class, use the
3215 preferred class instead. If it does not intersect the preferred
3216 class, show that usage of this alternative should be discouraged;
3217 it will be discouraged more still if the register is `preferred
3218 or nothing'. We do this because it increases the chance of
3219 reusing our spill register in a later insn and avoiding a pair
3220 of memory stores and loads.
3222 Don't bother with this if this alternative will accept this
3225 Don't do this for a multiword operand, since it is only a
3226 small win and has the risk of requiring more spill registers,
3227 which could cause a large loss.
3229 Don't do this if the preferred class has only one register
3230 because we might otherwise exhaust the class. */
3233 if (! win && this_alternative[i] != (int) NO_REGS
3234 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3235 && reg_class_size[(int) preferred_class[i]] > 1)
3237 if (! reg_class_subset_p (this_alternative[i],
3238 preferred_class[i]))
3240 /* Since we don't have a way of forming the intersection,
3241 we just do something special if the preferred class
3242 is a subset of the class we have; that's the most
3243 common case anyway. */
3244 if (reg_class_subset_p (preferred_class[i],
3245 this_alternative[i]))
3246 this_alternative[i] = (int) preferred_class[i];
3248 reject += (1 + pref_or_nothing[i]);
3253 /* Now see if any output operands that are marked "earlyclobber"
3254 in this alternative conflict with any input operands
3255 or any memory addresses. */
3257 for (i = 0; i < noperands; i++)
3258 if (this_alternative_earlyclobber[i]
3259 && this_alternative_win[i])
3261 struct decomposition early_data;
3263 early_data = decompose (recog_operand[i]);
3265 if (modified[i] == RELOAD_READ)
3267 if (this_insn_is_asm)
3268 warning_for_asm (this_insn,
3269 "`&' constraint used with input operand");
3275 if (this_alternative[i] == NO_REGS)
3277 this_alternative_earlyclobber[i] = 0;
3278 if (this_insn_is_asm)
3279 error_for_asm (this_insn,
3280 "`&' constraint used with no register class");
3285 for (j = 0; j < noperands; j++)
3286 /* Is this an input operand or a memory ref? */
3287 if ((GET_CODE (recog_operand[j]) == MEM
3288 || modified[j] != RELOAD_WRITE)
3290 /* Ignore things like match_operator operands. */
3291 && *constraints1[j] != 0
3292 /* Don't count an input operand that is constrained to match
3293 the early clobber operand. */
3294 && ! (this_alternative_matches[j] == i
3295 && rtx_equal_p (recog_operand[i], recog_operand[j]))
3296 /* Is it altered by storing the earlyclobber operand? */
3297 && !immune_p (recog_operand[j], recog_operand[i], early_data))
3299 /* If the output is in a single-reg class,
3300 it's costly to reload it, so reload the input instead. */
3301 if (reg_class_size[this_alternative[i]] == 1
3302 && (GET_CODE (recog_operand[j]) == REG
3303 || GET_CODE (recog_operand[j]) == SUBREG))
3306 this_alternative_win[j] = 0;
3311 /* If an earlyclobber operand conflicts with something,
3312 it must be reloaded, so request this and count the cost. */
3316 this_alternative_win[i] = 0;
3317 for (j = 0; j < noperands; j++)
3318 if (this_alternative_matches[j] == i
3319 && this_alternative_win[j])
3321 this_alternative_win[j] = 0;
3327 /* If one alternative accepts all the operands, no reload required,
3328 choose that alternative; don't consider the remaining ones. */
3331 /* Unswap these so that they are never swapped at `finish'. */
3332 if (commutative >= 0)
3334 recog_operand[commutative] = substed_operand[commutative];
3335 recog_operand[commutative + 1]
3336 = substed_operand[commutative + 1];
3338 for (i = 0; i < noperands; i++)
3340 goal_alternative_win[i] = 1;
3341 goal_alternative[i] = this_alternative[i];
3342 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3343 goal_alternative_matches[i] = this_alternative_matches[i];
3344 goal_alternative_earlyclobber[i]
3345 = this_alternative_earlyclobber[i];
3347 goal_alternative_number = this_alternative_number;
3348 goal_alternative_swapped = swapped;
3349 goal_earlyclobber = this_earlyclobber;
3353 /* REJECT, set by the ! and ? constraint characters and when a register
3354 would be reloaded into a non-preferred class, discourages the use of
3355 this alternative for a reload goal. REJECT is incremented by three
3356 for each ? and one for each non-preferred class. */
3357 losers = losers * 3 + reject;
3359 /* If this alternative can be made to work by reloading,
3360 and it needs less reloading than the others checked so far,
3361 record it as the chosen goal for reloading. */
3362 if (! bad && best > losers)
3364 for (i = 0; i < noperands; i++)
3366 goal_alternative[i] = this_alternative[i];
3367 goal_alternative_win[i] = this_alternative_win[i];
3368 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3369 goal_alternative_matches[i] = this_alternative_matches[i];
3370 goal_alternative_earlyclobber[i]
3371 = this_alternative_earlyclobber[i];
3373 goal_alternative_swapped = swapped;
3375 goal_alternative_number = this_alternative_number;
3376 goal_earlyclobber = this_earlyclobber;
3380 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3381 then we need to try each alternative twice,
3382 the second time matching those two operands
3383 as if we had exchanged them.
3384 To do this, really exchange them in operands.
3386 If we have just tried the alternatives the second time,
3387 return operands to normal and drop through. */
3389 if (commutative >= 0)
3394 register enum reg_class tclass;
3397 recog_operand[commutative] = substed_operand[commutative + 1];
3398 recog_operand[commutative + 1] = substed_operand[commutative];
3400 tclass = preferred_class[commutative];
3401 preferred_class[commutative] = preferred_class[commutative + 1];
3402 preferred_class[commutative + 1] = tclass;
3404 t = pref_or_nothing[commutative];
3405 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3406 pref_or_nothing[commutative + 1] = t;
3408 bcopy ((char *) constraints1, (char *) constraints,
3409 noperands * sizeof (char *));
3414 recog_operand[commutative] = substed_operand[commutative];
3415 recog_operand[commutative + 1] = substed_operand[commutative + 1];
3419 /* The operands don't meet the constraints.
3420 goal_alternative describes the alternative
3421 that we could reach by reloading the fewest operands.
3422 Reload so as to fit it. */
3424 if (best == MAX_RECOG_OPERANDS + 300)
3426 /* No alternative works with reloads?? */
3427 if (insn_code_number >= 0)
3429 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3430 /* Avoid further trouble with this insn. */
3431 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3436 /* Jump to `finish' from above if all operands are valid already.
3437 In that case, goal_alternative_win is all 1. */
3440 /* Right now, for any pair of operands I and J that are required to match,
3442 goal_alternative_matches[J] is I.
3443 Set up goal_alternative_matched as the inverse function:
3444 goal_alternative_matched[I] = J. */
3446 for (i = 0; i < noperands; i++)
3447 goal_alternative_matched[i] = -1;
3449 for (i = 0; i < noperands; i++)
3450 if (! goal_alternative_win[i]
3451 && goal_alternative_matches[i] >= 0)
3452 goal_alternative_matched[goal_alternative_matches[i]] = i;
3454 /* If the best alternative is with operands 1 and 2 swapped,
3455 consider them swapped before reporting the reloads. Update the
3456 operand numbers of any reloads already pushed. */
3458 if (goal_alternative_swapped)
3462 tem = substed_operand[commutative];
3463 substed_operand[commutative] = substed_operand[commutative + 1];
3464 substed_operand[commutative + 1] = tem;
3465 tem = recog_operand[commutative];
3466 recog_operand[commutative] = recog_operand[commutative + 1];
3467 recog_operand[commutative + 1] = tem;
3469 for (i = 0; i < n_reloads; i++)
3471 if (reload_opnum[i] == commutative)
3472 reload_opnum[i] = commutative + 1;
3473 else if (reload_opnum[i] == commutative + 1)
3474 reload_opnum[i] = commutative;
3478 /* Perform whatever substitutions on the operands we are supposed
3479 to make due to commutativity or replacement of registers
3480 with equivalent constants or memory slots. */
3482 for (i = 0; i < noperands; i++)
3484 *recog_operand_loc[i] = substed_operand[i];
3485 /* While we are looping on operands, initialize this. */
3486 operand_reloadnum[i] = -1;
3488 /* If this is an earlyclobber operand, we need to widen the scope.
3489 The reload must remain valid from the start of the insn being
3490 reloaded until after the operand is stored into its destination.
3491 We approximate this with RELOAD_OTHER even though we know that we
3492 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3494 One special case that is worth checking is when we have an
3495 output that is earlyclobber but isn't used past the insn (typically
3496 a SCRATCH). In this case, we only need have the reload live
3497 through the insn itself, but not for any of our input or output
3500 In any case, anything needed to address this operand can remain
3501 however they were previously categorized. */
3503 if (goal_alternative_earlyclobber[i])
3505 = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
3506 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3509 /* Any constants that aren't allowed and can't be reloaded
3510 into registers are here changed into memory references. */
3511 for (i = 0; i < noperands; i++)
3512 if (! goal_alternative_win[i]
3513 && CONSTANT_P (recog_operand[i])
3514 /* force_const_mem does not accept HIGH. */
3515 && GET_CODE (recog_operand[i]) != HIGH
3516 && (PREFERRED_RELOAD_CLASS (recog_operand[i],
3517 (enum reg_class) goal_alternative[i])
3519 && operand_mode[i] != VOIDmode)
3521 *recog_operand_loc[i] = recog_operand[i]
3522 = find_reloads_toplev (force_const_mem (operand_mode[i],
3524 i, address_type[i], ind_levels, 0);
3525 if (alternative_allows_memconst (constraints1[i],
3526 goal_alternative_number))
3527 goal_alternative_win[i] = 1;
3530 /* Record the values of the earlyclobber operands for the caller. */
3531 if (goal_earlyclobber)
3532 for (i = 0; i < noperands; i++)
3533 if (goal_alternative_earlyclobber[i])
3534 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3536 /* Now record reloads for all the operands that need them. */
3537 for (i = 0; i < noperands; i++)
3538 if (! goal_alternative_win[i])
3540 /* Operands that match previous ones have already been handled. */
3541 if (goal_alternative_matches[i] >= 0)
3543 /* Handle an operand with a nonoffsettable address
3544 appearing where an offsettable address will do
3545 by reloading the address into a base register.
3547 ??? We can also do this when the operand is a register and
3548 reg_equiv_mem is not offsettable, but this is a bit tricky,
3549 so we don't bother with it. It may not be worth doing. */
3550 else if (goal_alternative_matched[i] == -1
3551 && goal_alternative_offmemok[i]
3552 && GET_CODE (recog_operand[i]) == MEM)
3554 operand_reloadnum[i]
3555 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
3556 &XEXP (recog_operand[i], 0), NULL_PTR,
3557 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
3558 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3559 reload_inc[operand_reloadnum[i]]
3560 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
3562 /* If this operand is an output, we will have made any
3563 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3564 now we are treating part of the operand as an input, so
3565 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3567 if (modified[i] == RELOAD_WRITE)
3569 for (j = 0; j < n_reloads; j++)
3571 if (reload_opnum[j] == i)
3573 if (reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3574 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
3575 else if (reload_when_needed[j]
3576 == RELOAD_FOR_OUTADDR_ADDRESS)
3577 reload_when_needed[j] = RELOAD_FOR_INPADDR_ADDRESS;
3582 else if (goal_alternative_matched[i] == -1)
3583 operand_reloadnum[i]
3584 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3585 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3586 (modified[i] != RELOAD_WRITE
3587 ? recog_operand_loc[i] : 0),
3588 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
3589 (enum reg_class) goal_alternative[i],
3590 (modified[i] == RELOAD_WRITE
3591 ? VOIDmode : operand_mode[i]),
3592 (modified[i] == RELOAD_READ
3593 ? VOIDmode : operand_mode[i]),
3594 (insn_code_number < 0 ? 0
3595 : insn_operand_strict_low[insn_code_number][i]),
3596 0, i, operand_type[i]);
3597 /* In a matching pair of operands, one must be input only
3598 and the other must be output only.
3599 Pass the input operand as IN and the other as OUT. */
3600 else if (modified[i] == RELOAD_READ
3601 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3603 operand_reloadnum[i]
3604 = push_reload (recog_operand[i],
3605 recog_operand[goal_alternative_matched[i]],
3606 recog_operand_loc[i],
3607 recog_operand_loc[goal_alternative_matched[i]],
3608 (enum reg_class) goal_alternative[i],
3610 operand_mode[goal_alternative_matched[i]],
3611 0, 0, i, RELOAD_OTHER);
3612 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3614 else if (modified[i] == RELOAD_WRITE
3615 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3617 operand_reloadnum[goal_alternative_matched[i]]
3618 = push_reload (recog_operand[goal_alternative_matched[i]],
3620 recog_operand_loc[goal_alternative_matched[i]],
3621 recog_operand_loc[i],
3622 (enum reg_class) goal_alternative[i],
3623 operand_mode[goal_alternative_matched[i]],
3625 0, 0, i, RELOAD_OTHER);
3626 operand_reloadnum[i] = output_reloadnum;
3628 else if (insn_code_number >= 0)
3632 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3633 /* Avoid further trouble with this insn. */
3634 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3639 else if (goal_alternative_matched[i] < 0
3640 && goal_alternative_matches[i] < 0
3643 /* For each non-matching operand that's a MEM or a pseudo-register
3644 that didn't get a hard register, make an optional reload.
3645 This may get done even if the insn needs no reloads otherwise. */
3647 rtx operand = recog_operand[i];
3649 while (GET_CODE (operand) == SUBREG)
3650 operand = XEXP (operand, 0);
3651 if ((GET_CODE (operand) == MEM
3652 || (GET_CODE (operand) == REG
3653 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3654 && (enum reg_class) goal_alternative[i] != NO_REGS
3655 && ! no_input_reloads
3656 /* Optional output reloads don't do anything and we mustn't
3657 make in-out reloads on insns that are not permitted output
3659 && (modified[i] == RELOAD_READ
3660 || (modified[i] == RELOAD_READ_WRITE && ! no_output_reloads)))
3661 operand_reloadnum[i]
3662 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3663 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3664 (modified[i] != RELOAD_WRITE
3665 ? recog_operand_loc[i] : 0),
3666 (modified[i] != RELOAD_READ
3667 ? recog_operand_loc[i] : 0),
3668 (enum reg_class) goal_alternative[i],
3669 (modified[i] == RELOAD_WRITE
3670 ? VOIDmode : operand_mode[i]),
3671 (modified[i] == RELOAD_READ
3672 ? VOIDmode : operand_mode[i]),
3673 (insn_code_number < 0 ? 0
3674 : insn_operand_strict_low[insn_code_number][i]),
3675 1, i, operand_type[i]);
3677 else if (goal_alternative_matches[i] >= 0
3678 && goal_alternative_win[goal_alternative_matches[i]]
3679 && modified[i] == RELOAD_READ
3680 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3681 && ! no_input_reloads && ! no_output_reloads
3684 /* Similarly, make an optional reload for a pair of matching
3685 objects that are in MEM or a pseudo that didn't get a hard reg. */
3687 rtx operand = recog_operand[i];
3689 while (GET_CODE (operand) == SUBREG)
3690 operand = XEXP (operand, 0);
3691 if ((GET_CODE (operand) == MEM
3692 || (GET_CODE (operand) == REG
3693 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3694 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3696 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3697 = push_reload (recog_operand[goal_alternative_matches[i]],
3699 recog_operand_loc[goal_alternative_matches[i]],
3700 recog_operand_loc[i],
3701 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3702 operand_mode[goal_alternative_matches[i]],
3704 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3707 /* If this insn pattern contains any MATCH_DUP's, make sure that
3708 they will be substituted if the operands they match are substituted.
3709 Also do now any substitutions we already did on the operands.
3711 Don't do this if we aren't making replacements because we might be
3712 propagating things allocated by frame pointer elimination into places
3713 it doesn't expect. */
3715 if (insn_code_number >= 0 && replace)
3716 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3718 int opno = recog_dup_num[i];
3719 *recog_dup_loc[i] = *recog_operand_loc[opno];
3720 if (operand_reloadnum[opno] >= 0)
3721 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3722 insn_operand_mode[insn_code_number][opno]);
3726 /* This loses because reloading of prior insns can invalidate the equivalence
3727 (or at least find_equiv_reg isn't smart enough to find it any more),
3728 causing this insn to need more reload regs than it needed before.
3729 It may be too late to make the reload regs available.
3730 Now this optimization is done safely in choose_reload_regs. */
3732 /* For each reload of a reg into some other class of reg,
3733 search for an existing equivalent reg (same value now) in the right class.
3734 We can use it as long as we don't need to change its contents. */
3735 for (i = 0; i < n_reloads; i++)
3736 if (reload_reg_rtx[i] == 0
3737 && reload_in[i] != 0
3738 && GET_CODE (reload_in[i]) == REG
3739 && reload_out[i] == 0)
3742 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3743 static_reload_reg_p, 0, reload_inmode[i]);
3744 /* Prevent generation of insn to load the value
3745 because the one we found already has the value. */
3746 if (reload_reg_rtx[i])
3747 reload_in[i] = reload_reg_rtx[i];
3751 /* Perhaps an output reload can be combined with another
3752 to reduce needs by one. */
3753 if (!goal_earlyclobber)
3756 /* If we have a pair of reloads for parts of an address, they are reloading
3757 the same object, the operands themselves were not reloaded, and they
3758 are for two operands that are supposed to match, merge the reloads and
3759 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3761 for (i = 0; i < n_reloads; i++)
3765 for (j = i + 1; j < n_reloads; j++)
3766 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3767 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3768 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3769 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3770 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
3771 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS
3772 || reload_when_needed[j] == RELOAD_FOR_INPADDR_ADDRESS
3773 || reload_when_needed[j] == RELOAD_FOR_OUTADDR_ADDRESS)
3774 && rtx_equal_p (reload_in[i], reload_in[j])
3775 && (operand_reloadnum[reload_opnum[i]] < 0
3776 || reload_optional[operand_reloadnum[reload_opnum[i]]])
3777 && (operand_reloadnum[reload_opnum[j]] < 0
3778 || reload_optional[operand_reloadnum[reload_opnum[j]]])
3779 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
3780 || (goal_alternative_matches[reload_opnum[j]]
3781 == reload_opnum[i])))
3783 for (k = 0; k < n_replacements; k++)
3784 if (replacements[k].what == j)
3785 replacements[k].what = i;
3787 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3788 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3789 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
3791 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3796 /* Scan all the reloads and update their type.
3797 If a reload is for the address of an operand and we didn't reload
3798 that operand, change the type. Similarly, change the operand number
3799 of a reload when two operands match. If a reload is optional, treat it
3800 as though the operand isn't reloaded.
3802 ??? This latter case is somewhat odd because if we do the optional
3803 reload, it means the object is hanging around. Thus we need only
3804 do the address reload if the optional reload was NOT done.
3806 Change secondary reloads to be the address type of their operand, not
3809 If an operand's reload is now RELOAD_OTHER, change any
3810 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3811 RELOAD_FOR_OTHER_ADDRESS. */
3813 for (i = 0; i < n_reloads; i++)
3815 if (reload_secondary_p[i]
3816 && reload_when_needed[i] == operand_type[reload_opnum[i]])
3817 reload_when_needed[i] = address_type[reload_opnum[i]];
3819 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3820 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3821 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3822 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3823 && (operand_reloadnum[reload_opnum[i]] < 0
3824 || reload_optional[operand_reloadnum[reload_opnum[i]]]))
3826 /* If we have a secondary reload to go along with this reload,
3827 change its type to RELOAD_FOR_OPADDR_ADDR. */
3829 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3830 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
3831 && reload_secondary_in_reload[i] != -1)
3833 int secondary_in_reload = reload_secondary_in_reload[i];
3835 reload_when_needed[secondary_in_reload]
3836 = RELOAD_FOR_OPADDR_ADDR;
3838 /* If there's a tertiary reload we have to change it also. */
3839 if (secondary_in_reload > 0
3840 && reload_secondary_in_reload[secondary_in_reload] != -1)
3841 reload_when_needed[reload_secondary_in_reload[secondary_in_reload]]
3842 = RELOAD_FOR_OPADDR_ADDR;
3845 if ((reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3846 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3847 && reload_secondary_out_reload[i] != -1)
3849 int secondary_out_reload = reload_secondary_out_reload[i];
3851 reload_when_needed[secondary_out_reload]
3852 = RELOAD_FOR_OPADDR_ADDR;
3854 /* If there's a tertiary reload we have to change it also. */
3855 if (secondary_out_reload
3856 && reload_secondary_out_reload[secondary_out_reload] != -1)
3857 reload_when_needed[reload_secondary_out_reload[secondary_out_reload]]
3858 = RELOAD_FOR_OPADDR_ADDR;
3860 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3861 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3862 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
3864 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3867 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3868 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
3869 && operand_reloadnum[reload_opnum[i]] >= 0
3870 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
3872 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
3874 if (goal_alternative_matches[reload_opnum[i]] >= 0)
3875 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
3878 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
3879 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
3880 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
3882 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
3883 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
3884 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
3885 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
3886 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
3887 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
3888 This is complicated by the fact that a single operand can have more
3889 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
3890 choose_reload_regs without affecting code quality, and cases that
3891 actually fail are extremely rare, so it turns out to be better to fix
3892 the problem here by not generating cases that choose_reload_regs will
3896 int op_addr_reloads = 0;
3897 for (i = 0; i < n_reloads; i++)
3898 if (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS)
3901 if (op_addr_reloads > 1)
3902 for (i = 0; i < n_reloads; i++)
3903 if (reload_when_needed[i] == RELOAD_FOR_OPADDR_ADDR)
3904 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3907 /* See if we have any reloads that are now allowed to be merged
3908 because we've changed when the reload is needed to
3909 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3910 check for the most common cases. */
3912 for (i = 0; i < n_reloads; i++)
3913 if (reload_in[i] != 0 && reload_out[i] == 0
3914 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
3915 || reload_when_needed[i] == RELOAD_FOR_OPADDR_ADDR
3916 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
3917 for (j = 0; j < n_reloads; j++)
3918 if (i != j && reload_in[j] != 0 && reload_out[j] == 0
3919 && reload_when_needed[j] == reload_when_needed[i]
3920 && MATCHES (reload_in[i], reload_in[j])
3921 && reload_reg_class[i] == reload_reg_class[j]
3922 && !reload_nocombine[i] && !reload_nocombine[j]
3923 && reload_reg_rtx[i] == reload_reg_rtx[j])
3925 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
3926 transfer_replacements (i, j);
3930 #else /* no REGISTER_CONSTRAINTS */
3932 int insn_code_number;
3933 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
3935 rtx body = PATTERN (insn);
3939 n_earlyclobbers = 0;
3940 replace_reloads = replace;
3943 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3944 Store the operand values in RECOG_OPERAND and the locations
3945 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3946 Return if the insn needs no reload processing. */
3948 switch (GET_CODE (body))
3959 noperands = asm_noperands (body);
3962 /* This insn is an `asm' with operands.
3963 First, find out how many operands, and allocate space. */
3965 insn_code_number = -1;
3966 /* ??? This is a bug! ???
3967 Give up and delete this insn if it has too many operands. */
3968 if (noperands > MAX_RECOG_OPERANDS)
3971 /* Now get the operand values out of the insn. */
3973 decode_asm_operands (body, recog_operand, recog_operand_loc,
3974 NULL_PTR, NULL_PTR);
3979 /* Ordinary insn: recognize it, allocate space for operands and
3980 constraints, and get them out via insn_extract. */
3982 insn_code_number = recog_memoized (insn);
3983 noperands = insn_n_operands[insn_code_number];
3984 insn_extract (insn);
3990 for (i = 0; i < noperands; i++)
3992 register RTX_CODE code = GET_CODE (recog_operand[i]);
3993 int is_set_dest = GET_CODE (body) == SET && (i == 0);
3995 if (insn_code_number >= 0)
3996 if (insn_operand_address_p[insn_code_number][i])
3997 find_reloads_address (VOIDmode, NULL_PTR,
3998 recog_operand[i], recog_operand_loc[i],
3999 i, RELOAD_FOR_INPUT, ind_levels, insn);
4001 /* In these cases, we can't tell if the operand is an input
4002 or an output, so be conservative. In practice it won't be
4006 find_reloads_address (GET_MODE (recog_operand[i]),
4007 recog_operand_loc[i],
4008 XEXP (recog_operand[i], 0),
4009 &XEXP (recog_operand[i], 0),
4010 i, RELOAD_OTHER, ind_levels, insn);
4012 recog_operand[i] = *recog_operand_loc[i]
4013 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
4014 ind_levels, is_set_dest);
4017 register int regno = REGNO (recog_operand[i]);
4018 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4019 recog_operand[i] = *recog_operand_loc[i]
4020 = reg_equiv_constant[regno];
4021 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4022 that feeds this insn. */
4023 if (reg_equiv_mem[regno] != 0)
4024 recog_operand[i] = *recog_operand_loc[i]
4025 = reg_equiv_mem[regno];
4030 /* Perhaps an output reload can be combined with another
4031 to reduce needs by one. */
4032 if (!goal_earlyclobber)
4034 #endif /* no REGISTER_CONSTRAINTS */
4037 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4038 accepts a memory operand with constant address. */
4041 alternative_allows_memconst (constraint, altnum)
4046 /* Skip alternatives before the one requested. */
4049 while (*constraint++ != ',');
4052 /* Scan the requested alternative for 'm' or 'o'.
4053 If one of them is present, this alternative accepts memory constants. */
4054 while ((c = *constraint++) && c != ',' && c != '#')
4055 if (c == 'm' || c == 'o')
4060 /* Scan X for memory references and scan the addresses for reloading.
4061 Also checks for references to "constant" regs that we want to eliminate
4062 and replaces them with the values they stand for.
4063 We may alter X destructively if it contains a reference to such.
4064 If X is just a constant reg, we return the equivalent value
4067 IND_LEVELS says how many levels of indirect addressing this machine
4070 OPNUM and TYPE identify the purpose of the reload.
4072 IS_SET_DEST is true if X is the destination of a SET, which is not
4073 appropriate to be replaced by a constant. */
4076 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest)
4079 enum reload_type type;
4083 register RTX_CODE code = GET_CODE (x);
4085 register char *fmt = GET_RTX_FORMAT (code);
4090 /* This code is duplicated for speed in find_reloads. */
4091 register int regno = REGNO (x);
4092 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4093 x = reg_equiv_constant[regno];
4095 /* This creates (subreg (mem...)) which would cause an unnecessary
4096 reload of the mem. */
4097 else if (reg_equiv_mem[regno] != 0)
4098 x = reg_equiv_mem[regno];
4100 else if (reg_equiv_address[regno] != 0)
4102 /* If reg_equiv_address varies, it may be shared, so copy it. */
4103 /* We must rerun eliminate_regs, in case the elimination
4104 offsets have changed. */
4105 rtx addr = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0,
4109 if (rtx_varies_p (addr))
4110 addr = copy_rtx (addr);
4112 x = gen_rtx_MEM (GET_MODE (x), addr);
4113 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4114 find_reloads_address (GET_MODE (x), NULL_PTR,
4116 &XEXP (x, 0), opnum, type, ind_levels, 0);
4123 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4124 opnum, type, ind_levels, 0);
4128 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4130 /* Check for SUBREG containing a REG that's equivalent to a constant.
4131 If the constant has a known value, truncate it right now.
4132 Similarly if we are extracting a single-word of a multi-word
4133 constant. If the constant is symbolic, allow it to be substituted
4134 normally. push_reload will strip the subreg later. If the
4135 constant is VOIDmode, abort because we will lose the mode of
4136 the register (this should never happen because one of the cases
4137 above should handle it). */
4139 register int regno = REGNO (SUBREG_REG (x));
4142 if (subreg_lowpart_p (x)
4143 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4144 && reg_equiv_constant[regno] != 0
4145 && (tem = gen_lowpart_common (GET_MODE (x),
4146 reg_equiv_constant[regno])) != 0)
4149 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
4150 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4151 && reg_equiv_constant[regno] != 0
4152 && (tem = operand_subword (reg_equiv_constant[regno],
4154 GET_MODE (SUBREG_REG (x)))) != 0)
4157 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4158 && reg_equiv_constant[regno] != 0
4159 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
4162 /* If the subreg contains a reg that will be converted to a mem,
4163 convert the subreg to a narrower memref now.
4164 Otherwise, we would get (subreg (mem ...) ...),
4165 which would force reload of the mem.
4167 We also need to do this if there is an equivalent MEM that is
4168 not offsettable. In that case, alter_subreg would produce an
4169 invalid address on big-endian machines.
4171 For machines that extend byte loads, we must not reload using
4172 a wider mode if we have a paradoxical SUBREG. find_reloads will
4173 force a reload in that case. So we should not do anything here. */
4175 else if (regno >= FIRST_PSEUDO_REGISTER
4176 #ifdef LOAD_EXTEND_OP
4177 && (GET_MODE_SIZE (GET_MODE (x))
4178 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4180 && (reg_equiv_address[regno] != 0
4181 || (reg_equiv_mem[regno] != 0
4182 && (! strict_memory_address_p (GET_MODE (x),
4183 XEXP (reg_equiv_mem[regno], 0))
4184 || ! offsettable_memref_p (reg_equiv_mem[regno])))))
4186 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
4187 /* We must rerun eliminate_regs, in case the elimination
4188 offsets have changed. */
4189 rtx addr = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0,
4192 if (BYTES_BIG_ENDIAN)
4195 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
4196 offset += MIN (size, UNITS_PER_WORD);
4197 size = GET_MODE_SIZE (GET_MODE (x));
4198 offset -= MIN (size, UNITS_PER_WORD);
4200 addr = plus_constant (addr, offset);
4201 x = gen_rtx_MEM (GET_MODE (x), addr);
4202 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4203 find_reloads_address (GET_MODE (x), NULL_PTR,
4205 &XEXP (x, 0), opnum, type, ind_levels, 0);
4210 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4213 XEXP (x, i) = find_reloads_toplev (XEXP (x, i), opnum, type,
4214 ind_levels, is_set_dest);
4219 /* Return a mem ref for the memory equivalent of reg REGNO.
4220 This mem ref is not shared with anything. */
4223 make_memloc (ad, regno)
4228 /* We must rerun eliminate_regs, in case the elimination
4229 offsets have changed. */
4230 rtx tem = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4232 #if 0 /* We cannot safely reuse a memloc made here;
4233 if the pseudo appears twice, and its mem needs a reload,
4234 it gets two separate reloads assigned, but it only
4235 gets substituted with the second of them;
4236 then it can get used before that reload reg gets loaded up. */
4237 for (i = 0; i < n_memlocs; i++)
4238 if (rtx_equal_p (tem, XEXP (memlocs[i], 0)))
4242 /* If TEM might contain a pseudo, we must copy it to avoid
4243 modifying it when we do the substitution for the reload. */
4244 if (rtx_varies_p (tem))
4245 tem = copy_rtx (tem);
4247 tem = gen_rtx_MEM (GET_MODE (ad), tem);
4248 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4249 memlocs[n_memlocs++] = tem;
4253 /* Record all reloads needed for handling memory address AD
4254 which appears in *LOC in a memory reference to mode MODE
4255 which itself is found in location *MEMREFLOC.
4256 Note that we take shortcuts assuming that no multi-reg machine mode
4257 occurs as part of an address.
4259 OPNUM and TYPE specify the purpose of this reload.
4261 IND_LEVELS says how many levels of indirect addressing this machine
4264 INSN, if nonzero, is the insn in which we do the reload. It is used
4265 to determine if we may generate output reloads.
4267 Value is nonzero if this address is reloaded or replaced as a whole.
4268 This is interesting to the caller if the address is an autoincrement.
4270 Note that there is no verification that the address will be valid after
4271 this routine does its work. Instead, we rely on the fact that the address
4272 was valid when reload started. So we need only undo things that reload
4273 could have broken. These are wrong register types, pseudos not allocated
4274 to a hard register, and frame pointer elimination. */
4277 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn)
4278 enum machine_mode mode;
4283 enum reload_type type;
4290 /* If the address is a register, see if it is a legitimate address and
4291 reload if not. We first handle the cases where we need not reload
4292 or where we must reload in a non-standard way. */
4294 if (GET_CODE (ad) == REG)
4298 if (reg_equiv_constant[regno] != 0
4299 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
4301 *loc = ad = reg_equiv_constant[regno];
4305 else if (reg_equiv_address[regno] != 0)
4307 tem = make_memloc (ad, regno);
4308 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
4309 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
4311 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4312 reload_address_base_reg_class,
4313 GET_MODE (ad), VOIDmode, 0, 0,
4318 /* We can avoid a reload if the register's equivalent memory expression
4319 is valid as an indirect memory address.
4320 But not all addresses are valid in a mem used as an indirect address:
4321 only reg or reg+constant. */
4323 else if (reg_equiv_mem[regno] != 0 && ind_levels > 0
4324 && strict_memory_address_p (mode, reg_equiv_mem[regno])
4325 && (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == REG
4326 || (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == PLUS
4327 && GET_CODE (XEXP (XEXP (reg_equiv_mem[regno], 0), 0)) == REG
4328 && CONSTANT_P (XEXP (XEXP (reg_equiv_mem[regno], 0), 1)))))
4331 /* The only remaining case where we can avoid a reload is if this is a
4332 hard register that is valid as a base register and which is not the
4333 subject of a CLOBBER in this insn. */
4335 else if (regno < FIRST_PSEUDO_REGISTER
4336 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4337 && ! regno_clobbered_p (regno, this_insn))
4340 /* If we do not have one of the cases above, we must do the reload. */
4341 push_reload (ad, NULL_RTX, loc, NULL_PTR, reload_address_base_reg_class,
4342 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4346 if (strict_memory_address_p (mode, ad))
4348 /* The address appears valid, so reloads are not needed.
4349 But the address may contain an eliminable register.
4350 This can happen because a machine with indirect addressing
4351 may consider a pseudo register by itself a valid address even when
4352 it has failed to get a hard reg.
4353 So do a tree-walk to find and eliminate all such regs. */
4355 /* But first quickly dispose of a common case. */
4356 if (GET_CODE (ad) == PLUS
4357 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4358 && GET_CODE (XEXP (ad, 0)) == REG
4359 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4362 subst_reg_equivs_changed = 0;
4363 *loc = subst_reg_equivs (ad);
4365 if (! subst_reg_equivs_changed)
4368 /* Check result for validity after substitution. */
4369 if (strict_memory_address_p (mode, ad))
4373 /* The address is not valid. We have to figure out why. One possibility
4374 is that it is itself a MEM. This can happen when the frame pointer is
4375 being eliminated, a pseudo is not allocated to a hard register, and the
4376 offset between the frame and stack pointers is not its initial value.
4377 In that case the pseudo will have been replaced by a MEM referring to
4378 the stack pointer. */
4379 if (GET_CODE (ad) == MEM)
4381 /* First ensure that the address in this MEM is valid. Then, unless
4382 indirect addresses are valid, reload the MEM into a register. */
4384 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4385 opnum, ADDR_TYPE (type),
4386 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4388 /* If tem was changed, then we must create a new memory reference to
4389 hold it and store it back into memrefloc. */
4390 if (tem != ad && memrefloc)
4392 *memrefloc = copy_rtx (*memrefloc);
4393 copy_replacements (tem, XEXP (*memrefloc, 0));
4394 loc = &XEXP (*memrefloc, 0);
4397 /* Check similar cases as for indirect addresses as above except
4398 that we can allow pseudos and a MEM since they should have been
4399 taken care of above. */
4402 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4403 || GET_CODE (XEXP (tem, 0)) == MEM
4404 || ! (GET_CODE (XEXP (tem, 0)) == REG
4405 || (GET_CODE (XEXP (tem, 0)) == PLUS
4406 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4407 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4409 /* Must use TEM here, not AD, since it is the one that will
4410 have any subexpressions reloaded, if needed. */
4411 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4412 reload_address_base_reg_class, GET_MODE (tem),
4421 /* If we have address of a stack slot but it's not valid because the
4422 displacement is too large, compute the sum in a register.
4423 Handle all base registers here, not just fp/ap/sp, because on some
4424 targets (namely SH) we can also get too large displacements from
4425 big-endian corrections. */
4426 else if (GET_CODE (ad) == PLUS
4427 && GET_CODE (XEXP (ad, 0)) == REG
4428 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4429 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4430 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4432 /* Unshare the MEM rtx so we can safely alter it. */
4435 *memrefloc = copy_rtx (*memrefloc);
4436 loc = &XEXP (*memrefloc, 0);
4438 if (double_reg_address_ok)
4440 /* Unshare the sum as well. */
4441 *loc = ad = copy_rtx (ad);
4442 /* Reload the displacement into an index reg.
4443 We assume the frame pointer or arg pointer is a base reg. */
4444 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4445 reload_address_index_reg_class,
4446 GET_MODE (ad), opnum, type, ind_levels);
4450 /* If the sum of two regs is not necessarily valid,
4451 reload the sum into a base reg.
4452 That will at least work. */
4453 find_reloads_address_part (ad, loc, reload_address_base_reg_class,
4454 Pmode, opnum, type, ind_levels);
4459 /* If we have an indexed stack slot, there are three possible reasons why
4460 it might be invalid: The index might need to be reloaded, the address
4461 might have been made by frame pointer elimination and hence have a
4462 constant out of range, or both reasons might apply.
4464 We can easily check for an index needing reload, but even if that is the
4465 case, we might also have an invalid constant. To avoid making the
4466 conservative assumption and requiring two reloads, we see if this address
4467 is valid when not interpreted strictly. If it is, the only problem is
4468 that the index needs a reload and find_reloads_address_1 will take care
4471 There is still a case when we might generate an extra reload,
4472 however. In certain cases eliminate_regs will return a MEM for a REG
4473 (see the code there for details). In those cases, memory_address_p
4474 applied to our address will return 0 so we will think that our offset
4475 must be too large. But it might indeed be valid and the only problem
4476 is that a MEM is present where a REG should be. This case should be
4477 very rare and there doesn't seem to be any way to avoid it.
4479 If we decide to do something here, it must be that
4480 `double_reg_address_ok' is true and that this address rtl was made by
4481 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4482 rework the sum so that the reload register will be added to the index.
4483 This is safe because we know the address isn't shared.
4485 We check for fp/ap/sp as both the first and second operand of the
4488 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4489 && GET_CODE (XEXP (ad, 0)) == PLUS
4490 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4491 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4492 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4494 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4495 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4497 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4498 && ! memory_address_p (mode, ad))
4500 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4501 plus_constant (XEXP (XEXP (ad, 0), 0),
4502 INTVAL (XEXP (ad, 1))),
4503 XEXP (XEXP (ad, 0), 1));
4504 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0),
4505 reload_address_base_reg_class,
4506 GET_MODE (ad), opnum, type, ind_levels);
4507 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4513 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4514 && GET_CODE (XEXP (ad, 0)) == PLUS
4515 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4516 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4517 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4519 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4520 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4522 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4523 && ! memory_address_p (mode, ad))
4525 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4526 XEXP (XEXP (ad, 0), 0),
4527 plus_constant (XEXP (XEXP (ad, 0), 1),
4528 INTVAL (XEXP (ad, 1))));
4529 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4530 reload_address_base_reg_class,
4531 GET_MODE (ad), opnum, type, ind_levels);
4532 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4538 /* See if address becomes valid when an eliminable register
4539 in a sum is replaced. */
4542 if (GET_CODE (ad) == PLUS)
4543 tem = subst_indexed_address (ad);
4544 if (tem != ad && strict_memory_address_p (mode, tem))
4546 /* Ok, we win that way. Replace any additional eliminable
4549 subst_reg_equivs_changed = 0;
4550 tem = subst_reg_equivs (tem);
4552 /* Make sure that didn't make the address invalid again. */
4554 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4561 /* If constants aren't valid addresses, reload the constant address
4563 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4565 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4566 Unshare it so we can safely alter it. */
4567 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4568 && CONSTANT_POOL_ADDRESS_P (ad))
4570 *memrefloc = copy_rtx (*memrefloc);
4571 loc = &XEXP (*memrefloc, 0);
4574 find_reloads_address_part (ad, loc, reload_address_base_reg_class,
4580 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
4584 /* Find all pseudo regs appearing in AD
4585 that are eliminable in favor of equivalent values
4586 and do not have hard regs; replace them by their equivalents. */
4589 subst_reg_equivs (ad)
4592 register RTX_CODE code = GET_CODE (ad);
4610 register int regno = REGNO (ad);
4612 if (reg_equiv_constant[regno] != 0)
4614 subst_reg_equivs_changed = 1;
4615 return reg_equiv_constant[regno];
4621 /* Quickly dispose of a common case. */
4622 if (XEXP (ad, 0) == frame_pointer_rtx
4623 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4631 fmt = GET_RTX_FORMAT (code);
4632 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4634 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i));
4638 /* Compute the sum of X and Y, making canonicalizations assumed in an
4639 address, namely: sum constant integers, surround the sum of two
4640 constants with a CONST, put the constant as the second operand, and
4641 group the constant on the outermost sum.
4643 This routine assumes both inputs are already in canonical form. */
4650 enum machine_mode mode = GET_MODE (x);
4652 if (mode == VOIDmode)
4653 mode = GET_MODE (y);
4655 if (mode == VOIDmode)
4658 if (GET_CODE (x) == CONST_INT)
4659 return plus_constant (y, INTVAL (x));
4660 else if (GET_CODE (y) == CONST_INT)
4661 return plus_constant (x, INTVAL (y));
4662 else if (CONSTANT_P (x))
4663 tem = x, x = y, y = tem;
4665 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
4666 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
4668 /* Note that if the operands of Y are specified in the opposite
4669 order in the recursive calls below, infinite recursion will occur. */
4670 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
4671 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
4673 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4674 constant will have been placed second. */
4675 if (CONSTANT_P (x) && CONSTANT_P (y))
4677 if (GET_CODE (x) == CONST)
4679 if (GET_CODE (y) == CONST)
4682 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
4685 return gen_rtx_PLUS (mode, x, y);
4688 /* If ADDR is a sum containing a pseudo register that should be
4689 replaced with a constant (from reg_equiv_constant),
4690 return the result of doing so, and also apply the associative
4691 law so that the result is more likely to be a valid address.
4692 (But it is not guaranteed to be one.)
4694 Note that at most one register is replaced, even if more are
4695 replaceable. Also, we try to put the result into a canonical form
4696 so it is more likely to be a valid address.
4698 In all other cases, return ADDR. */
4701 subst_indexed_address (addr)
4704 rtx op0 = 0, op1 = 0, op2 = 0;
4708 if (GET_CODE (addr) == PLUS)
4710 /* Try to find a register to replace. */
4711 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
4712 if (GET_CODE (op0) == REG
4713 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
4714 && reg_renumber[regno] < 0
4715 && reg_equiv_constant[regno] != 0)
4716 op0 = reg_equiv_constant[regno];
4717 else if (GET_CODE (op1) == REG
4718 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
4719 && reg_renumber[regno] < 0
4720 && reg_equiv_constant[regno] != 0)
4721 op1 = reg_equiv_constant[regno];
4722 else if (GET_CODE (op0) == PLUS
4723 && (tem = subst_indexed_address (op0)) != op0)
4725 else if (GET_CODE (op1) == PLUS
4726 && (tem = subst_indexed_address (op1)) != op1)
4731 /* Pick out up to three things to add. */
4732 if (GET_CODE (op1) == PLUS)
4733 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
4734 else if (GET_CODE (op0) == PLUS)
4735 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4737 /* Compute the sum. */
4739 op1 = form_sum (op1, op2);
4741 op0 = form_sum (op0, op1);
4748 /* Record the pseudo registers we must reload into hard registers in a
4749 subexpression of a would-be memory address, X referring to a value
4750 in mode MODE. (This function is not called if the address we find
4753 CONTEXT = 1 means we are considering regs as index regs,
4754 = 0 means we are considering them as base regs.
4756 OPNUM and TYPE specify the purpose of any reloads made.
4758 IND_LEVELS says how many levels of indirect addressing are
4759 supported at this point in the address.
4761 INSN, if nonzero, is the insn in which we do the reload. It is used
4762 to determine if we may generate output reloads.
4764 We return nonzero if X, as a whole, is reloaded or replaced. */
4766 /* Note that we take shortcuts assuming that no multi-reg machine mode
4767 occurs as part of an address.
4768 Also, this is not fully machine-customizable; it works for machines
4769 such as vaxes and 68000's and 32000's, but other possible machines
4770 could have addressing modes that this does not handle right. */
4773 find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
4774 enum machine_mode mode;
4779 enum reload_type type;
4783 register RTX_CODE code = GET_CODE (x);
4789 register rtx orig_op0 = XEXP (x, 0);
4790 register rtx orig_op1 = XEXP (x, 1);
4791 register RTX_CODE code0 = GET_CODE (orig_op0);
4792 register RTX_CODE code1 = GET_CODE (orig_op1);
4793 register rtx op0 = orig_op0;
4794 register rtx op1 = orig_op1;
4796 if (GET_CODE (op0) == SUBREG)
4798 op0 = SUBREG_REG (op0);
4799 code0 = GET_CODE (op0);
4800 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
4801 op0 = gen_rtx_REG (word_mode,
4802 REGNO (op0) + SUBREG_WORD (orig_op0));
4805 if (GET_CODE (op1) == SUBREG)
4807 op1 = SUBREG_REG (op1);
4808 code1 = GET_CODE (op1);
4809 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
4810 op1 = gen_rtx_REG (GET_MODE (op1),
4811 REGNO (op1) + SUBREG_WORD (orig_op1));
4814 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
4815 || code0 == ZERO_EXTEND || code1 == MEM)
4817 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
4818 type, ind_levels, insn);
4819 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
4820 type, ind_levels, insn);
4823 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
4824 || code1 == ZERO_EXTEND || code0 == MEM)
4826 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
4827 type, ind_levels, insn);
4828 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
4829 type, ind_levels, insn);
4832 else if (code0 == CONST_INT || code0 == CONST
4833 || code0 == SYMBOL_REF || code0 == LABEL_REF)
4834 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
4835 type, ind_levels, insn);
4837 else if (code1 == CONST_INT || code1 == CONST
4838 || code1 == SYMBOL_REF || code1 == LABEL_REF)
4839 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
4840 type, ind_levels, insn);
4842 else if (code0 == REG && code1 == REG)
4844 if (REG_OK_FOR_INDEX_P (op0)
4845 && REG_MODE_OK_FOR_BASE_P (op1, mode))
4847 else if (REG_OK_FOR_INDEX_P (op1)
4848 && REG_MODE_OK_FOR_BASE_P (op0, mode))
4850 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
4851 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
4852 type, ind_levels, insn);
4853 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
4854 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
4855 type, ind_levels, insn);
4856 else if (REG_OK_FOR_INDEX_P (op1))
4857 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
4858 type, ind_levels, insn);
4859 else if (REG_OK_FOR_INDEX_P (op0))
4860 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
4861 type, ind_levels, insn);
4864 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
4865 type, ind_levels, insn);
4866 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
4867 type, ind_levels, insn);
4871 else if (code0 == REG)
4873 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
4874 type, ind_levels, insn);
4875 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
4876 type, ind_levels, insn);
4879 else if (code1 == REG)
4881 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
4882 type, ind_levels, insn);
4883 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
4884 type, ind_levels, insn);
4894 if (GET_CODE (XEXP (x, 0)) == REG)
4896 register int regno = REGNO (XEXP (x, 0));
4900 /* A register that is incremented cannot be constant! */
4901 if (regno >= FIRST_PSEUDO_REGISTER
4902 && reg_equiv_constant[regno] != 0)
4905 /* Handle a register that is equivalent to a memory location
4906 which cannot be addressed directly. */
4907 if (reg_equiv_address[regno] != 0)
4909 rtx tem = make_memloc (XEXP (x, 0), regno);
4910 /* First reload the memory location's address.
4911 We can't use ADDR_TYPE (type) here, because we need to
4912 write back the value after reading it, hence we actually
4913 need two registers. */
4914 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
4915 &XEXP (tem, 0), opnum, type,
4917 /* Put this inside a new increment-expression. */
4918 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
4919 /* Proceed to reload that, as if it contained a register. */
4922 /* If we have a hard register that is ok as an index,
4923 don't make a reload. If an autoincrement of a nice register
4924 isn't "valid", it must be that no autoincrement is "valid".
4925 If that is true and something made an autoincrement anyway,
4926 this must be a special context where one is allowed.
4927 (For example, a "push" instruction.)
4928 We can't improve this address, so leave it alone. */
4930 /* Otherwise, reload the autoincrement into a suitable hard reg
4931 and record how much to increment by. */
4933 if (reg_renumber[regno] >= 0)
4934 regno = reg_renumber[regno];
4935 if ((regno >= FIRST_PSEUDO_REGISTER
4936 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4937 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
4942 /* If we can output the register afterwards, do so, this
4943 saves the extra update.
4944 We can do so if we have an INSN - i.e. no JUMP_INSN nor
4945 CALL_INSN - and it does not set CC0.
4946 But don't do this if we cannot directly address the
4947 memory location, since this will make it harder to
4948 reuse address reloads, and increases register pressure.
4949 Also don't do this if we can probably update x directly. */
4950 rtx equiv = reg_equiv_mem[regno];
4951 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
4952 if (insn && GET_CODE (insn) == INSN && equiv
4954 && ! sets_cc0_p (PATTERN (insn))
4956 && ! (icode != CODE_FOR_nothing
4957 && (*insn_operand_predicate[icode][0]) (equiv, Pmode)
4958 && (*insn_operand_predicate[icode][1]) (equiv, Pmode)))
4963 = push_reload (x, x, loc, loc,
4965 ? reload_address_index_reg_class
4966 : reload_address_base_reg_class),
4967 GET_MODE (x), GET_MODE (x), 0, 0,
4968 opnum, RELOAD_OTHER);
4973 = push_reload (x, NULL_RTX, loc, NULL_PTR,
4975 ? reload_address_index_reg_class
4976 : reload_address_base_reg_class),
4977 GET_MODE (x), GET_MODE (x), 0, 0,
4979 reload_inc[reloadnum]
4980 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
4986 /* Update the REG_INC notes. */
4988 for (link = REG_NOTES (this_insn);
4989 link; link = XEXP (link, 1))
4990 if (REG_NOTE_KIND (link) == REG_INC
4991 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
4992 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4998 else if (GET_CODE (XEXP (x, 0)) == MEM)
5000 /* This is probably the result of a substitution, by eliminate_regs,
5001 of an equivalent address for a pseudo that was not allocated to a
5002 hard register. Verify that the specified address is valid and
5003 reload it into a register. */
5004 rtx tem = XEXP (x, 0);
5008 /* Since we know we are going to reload this item, don't decrement
5009 for the indirection level.
5011 Note that this is actually conservative: it would be slightly
5012 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5014 /* We can't use ADDR_TYPE (type) here, because we need to
5015 write back the value after reading it, hence we actually
5016 need two registers. */
5017 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5018 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5019 opnum, type, ind_levels, insn);
5021 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
5023 ? reload_address_index_reg_class
5024 : reload_address_base_reg_class),
5025 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5026 reload_inc[reloadnum]
5027 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5029 link = FIND_REG_INC_NOTE (this_insn, tem);
5031 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5038 /* This is probably the result of a substitution, by eliminate_regs, of
5039 an equivalent address for a pseudo that was not allocated to a hard
5040 register. Verify that the specified address is valid and reload it
5043 Since we know we are going to reload this item, don't decrement for
5044 the indirection level.
5046 Note that this is actually conservative: it would be slightly more
5047 efficient to use the value of SPILL_INDIRECT_LEVELS from
5050 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5051 opnum, ADDR_TYPE (type), ind_levels, insn);
5052 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
5053 (context ? reload_address_index_reg_class
5054 : reload_address_base_reg_class),
5055 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5060 register int regno = REGNO (x);
5062 if (reg_equiv_constant[regno] != 0)
5064 find_reloads_address_part (reg_equiv_constant[regno], loc,
5066 ? reload_address_index_reg_class
5067 : reload_address_base_reg_class),
5068 GET_MODE (x), opnum, type, ind_levels);
5072 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5073 that feeds this insn. */
5074 if (reg_equiv_mem[regno] != 0)
5076 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
5078 ? reload_address_index_reg_class
5079 : reload_address_base_reg_class),
5080 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5085 if (reg_equiv_address[regno] != 0)
5087 x = make_memloc (x, regno);
5088 find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0),
5089 opnum, ADDR_TYPE (type), ind_levels, insn);
5092 if (reg_renumber[regno] >= 0)
5093 regno = reg_renumber[regno];
5095 if ((regno >= FIRST_PSEUDO_REGISTER
5096 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5097 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5099 push_reload (x, NULL_RTX, loc, NULL_PTR,
5101 ? reload_address_index_reg_class
5102 : reload_address_base_reg_class),
5103 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5107 /* If a register appearing in an address is the subject of a CLOBBER
5108 in this insn, reload it into some other register to be safe.
5109 The CLOBBER is supposed to make the register unavailable
5110 from before this insn to after it. */
5111 if (regno_clobbered_p (regno, this_insn))
5113 push_reload (x, NULL_RTX, loc, NULL_PTR,
5115 ? reload_address_index_reg_class
5116 : reload_address_base_reg_class),
5117 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5124 if (GET_CODE (SUBREG_REG (x)) == REG)
5126 /* If this is a SUBREG of a hard register and the resulting register
5127 is of the wrong class, reload the whole SUBREG. This avoids
5128 needless copies if SUBREG_REG is multi-word. */
5129 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5131 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5133 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5134 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5136 push_reload (x, NULL_RTX, loc, NULL_PTR,
5138 ? reload_address_index_reg_class
5139 : reload_address_base_reg_class),
5140 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5144 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5145 is larger than the class size, then reload the whole SUBREG. */
5148 enum reg_class class = (context
5149 ? reload_address_index_reg_class
5150 : reload_address_base_reg_class);
5151 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5152 > reg_class_size[class])
5154 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5155 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5167 register char *fmt = GET_RTX_FORMAT (code);
5170 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5173 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5174 opnum, type, ind_levels, insn);
5181 /* X, which is found at *LOC, is a part of an address that needs to be
5182 reloaded into a register of class CLASS. If X is a constant, or if
5183 X is a PLUS that contains a constant, check that the constant is a
5184 legitimate operand and that we are supposed to be able to load
5185 it into the register.
5187 If not, force the constant into memory and reload the MEM instead.
5189 MODE is the mode to use, in case X is an integer constant.
5191 OPNUM and TYPE describe the purpose of any reloads made.
5193 IND_LEVELS says how many levels of indirect addressing this machine
5197 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
5200 enum reg_class class;
5201 enum machine_mode mode;
5203 enum reload_type type;
5207 && (! LEGITIMATE_CONSTANT_P (x)
5208 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5210 rtx tem = x = force_const_mem (mode, x);
5211 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5212 opnum, type, ind_levels, 0);
5215 else if (GET_CODE (x) == PLUS
5216 && CONSTANT_P (XEXP (x, 1))
5217 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5218 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5220 rtx tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5222 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5223 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5224 opnum, type, ind_levels, 0);
5227 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5228 mode, VOIDmode, 0, 0, opnum, type);
5231 /* Substitute into the current INSN the registers into which we have reloaded
5232 the things that need reloading. The array `replacements'
5233 says contains the locations of all pointers that must be changed
5234 and says what to replace them with.
5236 Return the rtx that X translates into; usually X, but modified. */
5243 for (i = 0; i < n_replacements; i++)
5245 register struct replacement *r = &replacements[i];
5246 register rtx reloadreg = reload_reg_rtx[r->what];
5249 /* Encapsulate RELOADREG so its machine mode matches what
5250 used to be there. Note that gen_lowpart_common will
5251 do the wrong thing if RELOADREG is multi-word. RELOADREG
5252 will always be a REG here. */
5253 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5254 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5256 /* If we are putting this into a SUBREG and RELOADREG is a
5257 SUBREG, we would be making nested SUBREGs, so we have to fix
5258 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5260 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5262 if (GET_MODE (*r->subreg_loc)
5263 == GET_MODE (SUBREG_REG (reloadreg)))
5264 *r->subreg_loc = SUBREG_REG (reloadreg);
5267 *r->where = SUBREG_REG (reloadreg);
5268 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
5272 *r->where = reloadreg;
5274 /* If reload got no reg and isn't optional, something's wrong. */
5275 else if (! reload_optional[r->what])
5280 /* Make a copy of any replacements being done into X and move those copies
5281 to locations in Y, a copy of X. We only look at the highest level of
5285 copy_replacements (x, y)
5290 enum rtx_code code = GET_CODE (x);
5291 char *fmt = GET_RTX_FORMAT (code);
5292 struct replacement *r;
5294 /* We can't support X being a SUBREG because we might then need to know its
5295 location if something inside it was replaced. */
5299 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5301 for (j = 0; j < n_replacements; j++)
5303 if (replacements[j].subreg_loc == &XEXP (x, i))
5305 r = &replacements[n_replacements++];
5306 r->where = replacements[j].where;
5307 r->subreg_loc = &XEXP (y, i);
5308 r->what = replacements[j].what;
5309 r->mode = replacements[j].mode;
5311 else if (replacements[j].where == &XEXP (x, i))
5313 r = &replacements[n_replacements++];
5314 r->where = &XEXP (y, i);
5316 r->what = replacements[j].what;
5317 r->mode = replacements[j].mode;
5322 /* If LOC was scheduled to be replaced by something, return the replacement.
5323 Otherwise, return *LOC. */
5326 find_replacement (loc)
5329 struct replacement *r;
5331 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
5333 rtx reloadreg = reload_reg_rtx[r->what];
5335 if (reloadreg && r->where == loc)
5337 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
5338 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5342 else if (reloadreg && r->subreg_loc == loc)
5344 /* RELOADREG must be either a REG or a SUBREG.
5346 ??? Is it actually still ever a SUBREG? If so, why? */
5348 if (GET_CODE (reloadreg) == REG)
5349 return gen_rtx_REG (GET_MODE (*loc),
5350 REGNO (reloadreg) + SUBREG_WORD (*loc));
5351 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
5354 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
5355 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
5359 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5360 what's inside and make a new rtl if so. */
5361 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
5362 || GET_CODE (*loc) == MULT)
5364 rtx x = find_replacement (&XEXP (*loc, 0));
5365 rtx y = find_replacement (&XEXP (*loc, 1));
5367 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
5368 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
5374 /* Return nonzero if register in range [REGNO, ENDREGNO)
5375 appears either explicitly or implicitly in X
5376 other than being stored into (except for earlyclobber operands).
5378 References contained within the substructure at LOC do not count.
5379 LOC may be zero, meaning don't ignore anything.
5381 This is similar to refers_to_regno_p in rtlanal.c except that we
5382 look at equivalences for pseudos that didn't get hard registers. */
5385 refers_to_regno_for_reload_p (regno, endregno, x, loc)
5386 int regno, endregno;
5391 register RTX_CODE code;
5398 code = GET_CODE (x);
5405 /* If this is a pseudo, a hard register must not have been allocated.
5406 X must therefore either be a constant or be in memory. */
5407 if (i >= FIRST_PSEUDO_REGISTER)
5409 if (reg_equiv_memory_loc[i])
5410 return refers_to_regno_for_reload_p (regno, endregno,
5411 reg_equiv_memory_loc[i],
5414 if (reg_equiv_constant[i])
5420 return (endregno > i
5421 && regno < i + (i < FIRST_PSEUDO_REGISTER
5422 ? HARD_REGNO_NREGS (i, GET_MODE (x))
5426 /* If this is a SUBREG of a hard reg, we can see exactly which
5427 registers are being modified. Otherwise, handle normally. */
5428 if (GET_CODE (SUBREG_REG (x)) == REG
5429 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5431 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5433 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
5434 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5436 return endregno > inner_regno && regno < inner_endregno;
5442 if (&SET_DEST (x) != loc
5443 /* Note setting a SUBREG counts as referring to the REG it is in for
5444 a pseudo but not for hard registers since we can
5445 treat each word individually. */
5446 && ((GET_CODE (SET_DEST (x)) == SUBREG
5447 && loc != &SUBREG_REG (SET_DEST (x))
5448 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
5449 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
5450 && refers_to_regno_for_reload_p (regno, endregno,
5451 SUBREG_REG (SET_DEST (x)),
5453 /* If the output is an earlyclobber operand, this is
5455 || ((GET_CODE (SET_DEST (x)) != REG
5456 || earlyclobber_operand_p (SET_DEST (x)))
5457 && refers_to_regno_for_reload_p (regno, endregno,
5458 SET_DEST (x), loc))))
5461 if (code == CLOBBER || loc == &SET_SRC (x))
5470 /* X does not match, so try its subexpressions. */
5472 fmt = GET_RTX_FORMAT (code);
5473 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5475 if (fmt[i] == 'e' && loc != &XEXP (x, i))
5483 if (refers_to_regno_for_reload_p (regno, endregno,
5487 else if (fmt[i] == 'E')
5490 for (j = XVECLEN (x, i) - 1; j >=0; j--)
5491 if (loc != &XVECEXP (x, i, j)
5492 && refers_to_regno_for_reload_p (regno, endregno,
5493 XVECEXP (x, i, j), loc))
5500 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5501 we check if any register number in X conflicts with the relevant register
5502 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5503 contains a MEM (we don't bother checking for memory addresses that can't
5504 conflict because we expect this to be a rare case.
5506 This function is similar to reg_overlap_mention_p in rtlanal.c except
5507 that we look at equivalences for pseudos that didn't get hard registers. */
5510 reg_overlap_mentioned_for_reload_p (x, in)
5513 int regno, endregno;
5515 if (GET_CODE (x) == SUBREG)
5517 regno = REGNO (SUBREG_REG (x));
5518 if (regno < FIRST_PSEUDO_REGISTER)
5519 regno += SUBREG_WORD (x);
5521 else if (GET_CODE (x) == REG)
5525 /* If this is a pseudo, it must not have been assigned a hard register.
5526 Therefore, it must either be in memory or be a constant. */
5528 if (regno >= FIRST_PSEUDO_REGISTER)
5530 if (reg_equiv_memory_loc[regno])
5531 return refers_to_mem_for_reload_p (in);
5532 else if (reg_equiv_constant[regno])
5537 else if (CONSTANT_P (x))
5539 else if (GET_CODE (x) == MEM)
5540 return refers_to_mem_for_reload_p (in);
5541 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
5542 || GET_CODE (x) == CC0)
5543 return reg_mentioned_p (x, in);
5547 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
5548 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5550 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
5553 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5557 refers_to_mem_for_reload_p (x)
5563 if (GET_CODE (x) == MEM)
5566 if (GET_CODE (x) == REG)
5567 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
5568 && reg_equiv_memory_loc[REGNO (x)]);
5570 fmt = GET_RTX_FORMAT (GET_CODE (x));
5571 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
5573 && (GET_CODE (XEXP (x, i)) == MEM
5574 || refers_to_mem_for_reload_p (XEXP (x, i))))
5580 /* Check the insns before INSN to see if there is a suitable register
5581 containing the same value as GOAL.
5582 If OTHER is -1, look for a register in class CLASS.
5583 Otherwise, just see if register number OTHER shares GOAL's value.
5585 Return an rtx for the register found, or zero if none is found.
5587 If RELOAD_REG_P is (short *)1,
5588 we reject any hard reg that appears in reload_reg_rtx
5589 because such a hard reg is also needed coming into this insn.
5591 If RELOAD_REG_P is any other nonzero value,
5592 it is a vector indexed by hard reg number
5593 and we reject any hard reg whose element in the vector is nonnegative
5594 as well as any that appears in reload_reg_rtx.
5596 If GOAL is zero, then GOALREG is a register number; we look
5597 for an equivalent for that register.
5599 MODE is the machine mode of the value we want an equivalence for.
5600 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5602 This function is used by jump.c as well as in the reload pass.
5604 If GOAL is the sum of the stack pointer and a constant, we treat it
5605 as if it were a constant except that sp is required to be unchanging. */
5608 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
5611 enum reg_class class;
5613 short *reload_reg_p;
5615 enum machine_mode mode;
5617 register rtx p = insn;
5618 rtx goaltry, valtry, value, where;
5620 register int regno = -1;
5624 int goal_mem_addr_varies = 0;
5625 int need_stable_sp = 0;
5631 else if (GET_CODE (goal) == REG)
5632 regno = REGNO (goal);
5633 else if (GET_CODE (goal) == MEM)
5635 enum rtx_code code = GET_CODE (XEXP (goal, 0));
5636 if (MEM_VOLATILE_P (goal))
5638 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
5640 /* An address with side effects must be reexecuted. */
5653 else if (CONSTANT_P (goal))
5655 else if (GET_CODE (goal) == PLUS
5656 && XEXP (goal, 0) == stack_pointer_rtx
5657 && CONSTANT_P (XEXP (goal, 1)))
5658 goal_const = need_stable_sp = 1;
5662 /* On some machines, certain regs must always be rejected
5663 because they don't behave the way ordinary registers do. */
5665 #ifdef OVERLAPPING_REGNO_P
5666 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5667 && OVERLAPPING_REGNO_P (regno))
5671 /* Scan insns back from INSN, looking for one that copies
5672 a value into or out of GOAL.
5673 Stop and give up if we reach a label. */
5678 if (p == 0 || GET_CODE (p) == CODE_LABEL)
5680 if (GET_CODE (p) == INSN
5681 /* If we don't want spill regs ... */
5682 && (! (reload_reg_p != 0
5683 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
5684 /* ... then ignore insns introduced by reload; they aren't useful
5685 and can cause results in reload_as_needed to be different
5686 from what they were when calculating the need for spills.
5687 If we notice an input-reload insn here, we will reject it below,
5688 but it might hide a usable equivalent. That makes bad code.
5689 It may even abort: perhaps no reg was spilled for this insn
5690 because it was assumed we would find that equivalent. */
5691 || INSN_UID (p) < reload_first_uid))
5694 pat = single_set (p);
5695 /* First check for something that sets some reg equal to GOAL. */
5698 && true_regnum (SET_SRC (pat)) == regno
5699 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5702 && true_regnum (SET_DEST (pat)) == regno
5703 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
5705 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
5706 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5708 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
5709 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
5711 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
5712 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
5713 /* If we are looking for a constant,
5714 and something equivalent to that constant was copied
5715 into a reg, we can use that reg. */
5716 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5718 && rtx_equal_p (XEXP (tem, 0), goal)
5719 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5720 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5722 && GET_CODE (SET_DEST (pat)) == REG
5723 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5724 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5725 && GET_CODE (goal) == CONST_INT
5726 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
5728 && rtx_equal_p (goal, goaltry)
5729 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
5731 && (valueno = true_regnum (valtry)) >= 0)
5732 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5734 && GET_CODE (SET_DEST (pat)) == REG
5735 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5736 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5737 && GET_CODE (goal) == CONST_INT
5738 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
5740 && rtx_equal_p (goal, goaltry)
5742 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
5743 && (valueno = true_regnum (valtry)) >= 0)))
5746 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
5747 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
5757 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5758 (or copying VALUE into GOAL, if GOAL is also a register).
5759 Now verify that VALUE is really valid. */
5761 /* VALUENO is the register number of VALUE; a hard register. */
5763 /* Don't try to re-use something that is killed in this insn. We want
5764 to be able to trust REG_UNUSED notes. */
5765 if (find_reg_note (where, REG_UNUSED, value))
5768 /* If we propose to get the value from the stack pointer or if GOAL is
5769 a MEM based on the stack pointer, we need a stable SP. */
5770 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
5771 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
5775 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5776 if (GET_MODE (value) != mode)
5779 /* Reject VALUE if it was loaded from GOAL
5780 and is also a register that appears in the address of GOAL. */
5782 if (goal_mem && value == SET_DEST (single_set (where))
5783 && refers_to_regno_for_reload_p (valueno,
5785 + HARD_REGNO_NREGS (valueno, mode)),
5789 /* Reject registers that overlap GOAL. */
5791 if (!goal_mem && !goal_const
5792 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
5793 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
5796 /* Reject VALUE if it is one of the regs reserved for reloads.
5797 Reload1 knows how to reuse them anyway, and it would get
5798 confused if we allocated one without its knowledge.
5799 (Now that insns introduced by reload are ignored above,
5800 this case shouldn't happen, but I'm not positive.) */
5802 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
5803 && reload_reg_p[valueno] >= 0)
5806 /* On some machines, certain regs must always be rejected
5807 because they don't behave the way ordinary registers do. */
5809 #ifdef OVERLAPPING_REGNO_P
5810 if (OVERLAPPING_REGNO_P (valueno))
5814 nregs = HARD_REGNO_NREGS (regno, mode);
5815 valuenregs = HARD_REGNO_NREGS (valueno, mode);
5817 /* Reject VALUE if it is a register being used for an input reload
5818 even if it is not one of those reserved. */
5820 if (reload_reg_p != 0)
5823 for (i = 0; i < n_reloads; i++)
5824 if (reload_reg_rtx[i] != 0 && reload_in[i])
5826 int regno1 = REGNO (reload_reg_rtx[i]);
5827 int nregs1 = HARD_REGNO_NREGS (regno1,
5828 GET_MODE (reload_reg_rtx[i]));
5829 if (regno1 < valueno + valuenregs
5830 && regno1 + nregs1 > valueno)
5836 /* We must treat frame pointer as varying here,
5837 since it can vary--in a nonlocal goto as generated by expand_goto. */
5838 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
5840 /* Now verify that the values of GOAL and VALUE remain unaltered
5841 until INSN is reached. */
5850 /* Don't trust the conversion past a function call
5851 if either of the two is in a call-clobbered register, or memory. */
5852 if (GET_CODE (p) == CALL_INSN
5853 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5854 && call_used_regs[regno])
5856 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5857 && call_used_regs[valueno])
5863 #ifdef NON_SAVING_SETJMP
5864 if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE
5865 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
5869 #ifdef INSN_CLOBBERS_REGNO_P
5870 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5871 && INSN_CLOBBERS_REGNO_P (p, valueno))
5872 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5873 && INSN_CLOBBERS_REGNO_P (p, regno)))
5877 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
5879 /* If this insn P stores in either GOAL or VALUE, return 0.
5880 If GOAL is a memory ref and this insn writes memory, return 0.
5881 If GOAL is a memory ref and its address is not constant,
5882 and this insn P changes a register used in GOAL, return 0. */
5885 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
5887 register rtx dest = SET_DEST (pat);
5888 while (GET_CODE (dest) == SUBREG
5889 || GET_CODE (dest) == ZERO_EXTRACT
5890 || GET_CODE (dest) == SIGN_EXTRACT
5891 || GET_CODE (dest) == STRICT_LOW_PART)
5892 dest = XEXP (dest, 0);
5893 if (GET_CODE (dest) == REG)
5895 register int xregno = REGNO (dest);
5897 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5898 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5901 if (xregno < regno + nregs && xregno + xnregs > regno)
5903 if (xregno < valueno + valuenregs
5904 && xregno + xnregs > valueno)
5906 if (goal_mem_addr_varies
5907 && reg_overlap_mentioned_for_reload_p (dest, goal))
5910 else if (goal_mem && GET_CODE (dest) == MEM
5911 && ! push_operand (dest, GET_MODE (dest)))
5913 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
5914 && reg_equiv_memory_loc[regno] != 0)
5916 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
5919 else if (GET_CODE (pat) == PARALLEL)
5922 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
5924 register rtx v1 = XVECEXP (pat, 0, i);
5925 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
5927 register rtx dest = SET_DEST (v1);
5928 while (GET_CODE (dest) == SUBREG
5929 || GET_CODE (dest) == ZERO_EXTRACT
5930 || GET_CODE (dest) == SIGN_EXTRACT
5931 || GET_CODE (dest) == STRICT_LOW_PART)
5932 dest = XEXP (dest, 0);
5933 if (GET_CODE (dest) == REG)
5935 register int xregno = REGNO (dest);
5937 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5938 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5941 if (xregno < regno + nregs
5942 && xregno + xnregs > regno)
5944 if (xregno < valueno + valuenregs
5945 && xregno + xnregs > valueno)
5947 if (goal_mem_addr_varies
5948 && reg_overlap_mentioned_for_reload_p (dest,
5952 else if (goal_mem && GET_CODE (dest) == MEM
5953 && ! push_operand (dest, GET_MODE (dest)))
5955 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
5956 && reg_equiv_memory_loc[regno] != 0)
5958 else if (need_stable_sp
5959 && push_operand (dest, GET_MODE (dest)))
5965 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
5969 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
5970 link = XEXP (link, 1))
5972 pat = XEXP (link, 0);
5973 if (GET_CODE (pat) == CLOBBER)
5975 register rtx dest = SET_DEST (pat);
5976 while (GET_CODE (dest) == SUBREG
5977 || GET_CODE (dest) == ZERO_EXTRACT
5978 || GET_CODE (dest) == SIGN_EXTRACT
5979 || GET_CODE (dest) == STRICT_LOW_PART)
5980 dest = XEXP (dest, 0);
5981 if (GET_CODE (dest) == REG)
5983 register int xregno = REGNO (dest);
5985 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5986 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5989 if (xregno < regno + nregs
5990 && xregno + xnregs > regno)
5992 if (xregno < valueno + valuenregs
5993 && xregno + xnregs > valueno)
5995 if (goal_mem_addr_varies
5996 && reg_overlap_mentioned_for_reload_p (dest,
6000 else if (goal_mem && GET_CODE (dest) == MEM
6001 && ! push_operand (dest, GET_MODE (dest)))
6003 else if (need_stable_sp
6004 && push_operand (dest, GET_MODE (dest)))
6011 /* If this insn auto-increments or auto-decrements
6012 either regno or valueno, return 0 now.
6013 If GOAL is a memory ref and its address is not constant,
6014 and this insn P increments a register used in GOAL, return 0. */
6018 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6019 if (REG_NOTE_KIND (link) == REG_INC
6020 && GET_CODE (XEXP (link, 0)) == REG)
6022 register int incno = REGNO (XEXP (link, 0));
6023 if (incno < regno + nregs && incno >= regno)
6025 if (incno < valueno + valuenregs && incno >= valueno)
6027 if (goal_mem_addr_varies
6028 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6038 /* Find a place where INCED appears in an increment or decrement operator
6039 within X, and return the amount INCED is incremented or decremented by.
6040 The value is always positive. */
6043 find_inc_amount (x, inced)
6046 register enum rtx_code code = GET_CODE (x);
6052 register rtx addr = XEXP (x, 0);
6053 if ((GET_CODE (addr) == PRE_DEC
6054 || GET_CODE (addr) == POST_DEC
6055 || GET_CODE (addr) == PRE_INC
6056 || GET_CODE (addr) == POST_INC)
6057 && XEXP (addr, 0) == inced)
6058 return GET_MODE_SIZE (GET_MODE (x));
6061 fmt = GET_RTX_FORMAT (code);
6062 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6066 register int tem = find_inc_amount (XEXP (x, i), inced);
6073 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6075 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6085 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6088 regno_clobbered_p (regno, insn)
6092 if (GET_CODE (PATTERN (insn)) == CLOBBER
6093 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6094 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
6096 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6098 int i = XVECLEN (PATTERN (insn), 0) - 1;
6102 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6103 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
6104 && REGNO (XEXP (elt, 0)) == regno)
6112 static char *reload_when_needed_name[] =
6115 "RELOAD_FOR_OUTPUT",
6117 "RELOAD_FOR_INPUT_ADDRESS",
6118 "RELOAD_FOR_INPADDR_ADDRESS",
6119 "RELOAD_FOR_OUTPUT_ADDRESS",
6120 "RELOAD_FOR_OUTADDR_ADDRESS",
6121 "RELOAD_FOR_OPERAND_ADDRESS",
6122 "RELOAD_FOR_OPADDR_ADDR",
6124 "RELOAD_FOR_OTHER_ADDRESS"
6127 static char *reg_class_names[] = REG_CLASS_NAMES;
6129 /* These functions are used to print the variables set by 'find_reloads' */
6132 debug_reload_to_stream (f)
6140 for (r = 0; r < n_reloads; r++)
6142 fprintf (f, "Reload %d: ", r);
6144 if (reload_in[r] != 0)
6146 fprintf (f, "reload_in (%s) = ",
6147 GET_MODE_NAME (reload_inmode[r]));
6148 print_inline_rtx (f, reload_in[r], 24);
6149 fprintf (f, "\n\t");
6152 if (reload_out[r] != 0)
6154 fprintf (f, "reload_out (%s) = ",
6155 GET_MODE_NAME (reload_outmode[r]));
6156 print_inline_rtx (f, reload_out[r], 24);
6157 fprintf (f, "\n\t");
6160 fprintf (f, "%s, ", reg_class_names[(int) reload_reg_class[r]]);
6162 fprintf (f, "%s (opnum = %d)",
6163 reload_when_needed_name[(int) reload_when_needed[r]],
6166 if (reload_optional[r])
6167 fprintf (f, ", optional");
6169 if (reload_inc[r] != 0)
6170 fprintf (f, ", inc by %d", reload_inc[r]);
6172 if (reload_nocombine[r])
6173 fprintf (f, ", can't combine");
6175 if (reload_secondary_p[r])
6176 fprintf (f, ", secondary_reload_p");
6178 if (reload_in_reg[r] != 0)
6180 fprintf (f, "\n\treload_in_reg: ");
6181 print_inline_rtx (f, reload_in_reg[r], 24);
6184 if (reload_reg_rtx[r] != 0)
6186 fprintf (f, "\n\treload_reg_rtx: ");
6187 print_inline_rtx (f, reload_reg_rtx[r], 24);
6191 if (reload_secondary_in_reload[r] != -1)
6193 fprintf (f, "%ssecondary_in_reload = %d",
6194 prefix, reload_secondary_in_reload[r]);
6198 if (reload_secondary_out_reload[r] != -1)
6199 fprintf (f, "%ssecondary_out_reload = %d\n",
6200 prefix, reload_secondary_out_reload[r]);
6203 if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
6205 fprintf (f, "%ssecondary_in_icode = %s", prefix, insn_name[r]);
6209 if (reload_secondary_out_icode[r] != CODE_FOR_nothing)
6210 fprintf (f, "%ssecondary_out_icode = %s", prefix, insn_name[r]);
6219 debug_reload_to_stream (stderr);