1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* This file contains subroutines used only from the file reload1.c.
24 It knows how to scan one insn for operands and values
25 that need to be copied into registers to make valid code.
26 It also finds other operands and values which are valid
27 but for which equivalent values in registers exist and
28 ought to be used instead.
30 Before processing the first insn of the function, call `init_reload'.
32 To scan an insn, call `find_reloads'. This does two things:
33 1. sets up tables describing which values must be reloaded
34 for this insn, and what kind of hard regs they must be reloaded into;
35 2. optionally record the locations where those values appear in
36 the data, so they can be replaced properly later.
37 This is done only if the second arg to `find_reloads' is nonzero.
39 The third arg to `find_reloads' specifies the number of levels
40 of indirect addressing supported by the machine. If it is zero,
41 indirect addressing is not valid. If it is one, (MEM (REG n))
42 is valid even if (REG n) did not get a hard register; if it is two,
43 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
44 hard register, and similarly for higher values.
46 Then you must choose the hard regs to reload those pseudo regs into,
47 and generate appropriate load insns before this insn and perhaps
48 also store insns after this insn. Set up the array `reload_reg_rtx'
49 to contain the REG rtx's for the registers you used. In some
50 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
51 for certain reloads. Then that tells you which register to use,
52 so you do not need to allocate one. But you still do need to add extra
53 instructions to copy the value into and out of that register.
55 Finally you must call `subst_reloads' to substitute the reload reg rtx's
56 into the locations already recorded.
60 find_reloads can alter the operands of the instruction it is called on.
62 1. Two operands of any sort may be interchanged, if they are in a
63 commutative instruction.
64 This happens only if find_reloads thinks the instruction will compile
67 2. Pseudo-registers that are equivalent to constants are replaced
68 with those constants if they are not in hard registers.
70 1 happens every time find_reloads is called.
71 2 happens only when REPLACE is 1, which is only when
72 actually doing the reloads, not when just counting them.
75 Using a reload register for several reloads in one insn:
77 When an insn has reloads, it is considered as having three parts:
78 the input reloads, the insn itself after reloading, and the output reloads.
79 Reloads of values used in memory addresses are often needed for only one part.
81 When this is so, reload_when_needed records which part needs the reload.
82 Two reloads for different parts of the insn can share the same reload
85 When a reload is used for addresses in multiple parts, or when it is
86 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
87 a register with any other reload. */
95 #include "insn-config.h"
96 #include "insn-codes.h"
100 #include "hard-reg-set.h"
104 #include "function.h"
108 #ifndef REGISTER_MOVE_COST
109 #define REGISTER_MOVE_COST(x, y) 2
112 #ifndef REGNO_MODE_OK_FOR_BASE_P
113 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
116 #ifndef REG_MODE_OK_FOR_BASE_P
117 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
120 /* All reloads of the current insn are recorded here. See reload.h for
123 struct reload rld[MAX_RELOADS];
125 /* All the "earlyclobber" operands of the current insn
126 are recorded here. */
128 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
130 int reload_n_operands;
132 /* Replacing reloads.
134 If `replace_reloads' is nonzero, then as each reload is recorded
135 an entry is made for it in the table `replacements'.
136 Then later `subst_reloads' can look through that table and
137 perform all the replacements needed. */
139 /* Nonzero means record the places to replace. */
140 static int replace_reloads;
142 /* Each replacement is recorded with a structure like this. */
145 rtx *where; /* Location to store in */
146 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
147 a SUBREG; 0 otherwise. */
148 int what; /* which reload this is for */
149 enum machine_mode mode; /* mode it must have */
152 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
154 /* Number of replacements currently recorded. */
155 static int n_replacements;
157 /* Used to track what is modified by an operand. */
160 int reg_flag; /* Nonzero if referencing a register. */
161 int safe; /* Nonzero if this can't conflict with anything. */
162 rtx base; /* Base address for MEM. */
163 HOST_WIDE_INT start; /* Starting offset or register number. */
164 HOST_WIDE_INT end; /* Ending offset or register number. */
167 #ifdef SECONDARY_MEMORY_NEEDED
169 /* Save MEMs needed to copy from one class of registers to another. One MEM
170 is used per mode, but normally only one or two modes are ever used.
172 We keep two versions, before and after register elimination. The one
173 after register elimination is record separately for each operand. This
174 is done in case the address is not valid to be sure that we separately
177 static rtx secondary_memlocs[NUM_MACHINE_MODES];
178 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
181 /* The instruction we are doing reloads for;
182 so we can test whether a register dies in it. */
183 static rtx this_insn;
185 /* Nonzero if this instruction is a user-specified asm with operands. */
186 static int this_insn_is_asm;
188 /* If hard_regs_live_known is nonzero,
189 we can tell which hard regs are currently live,
190 at least enough to succeed in choosing dummy reloads. */
191 static int hard_regs_live_known;
193 /* Indexed by hard reg number,
194 element is nonnegative if hard reg has been spilled.
195 This vector is passed to `find_reloads' as an argument
196 and is not changed here. */
197 static short *static_reload_reg_p;
199 /* Set to 1 in subst_reg_equivs if it changes anything. */
200 static int subst_reg_equivs_changed;
202 /* On return from push_reload, holds the reload-number for the OUT
203 operand, which can be different for that from the input operand. */
204 static int output_reloadnum;
206 /* Compare two RTX's. */
207 #define MATCHES(x, y) \
208 (x == y || (x != 0 && (GET_CODE (x) == REG \
209 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
210 : rtx_equal_p (x, y) && ! side_effects_p (x))))
212 /* Indicates if two reloads purposes are for similar enough things that we
213 can merge their reloads. */
214 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
215 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
216 || ((when1) == (when2) && (op1) == (op2)) \
217 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
218 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
219 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
220 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
221 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
223 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
224 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
225 ((when1) != (when2) \
226 || ! ((op1) == (op2) \
227 || (when1) == RELOAD_FOR_INPUT \
228 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
229 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
231 /* If we are going to reload an address, compute the reload type to
233 #define ADDR_TYPE(type) \
234 ((type) == RELOAD_FOR_INPUT_ADDRESS \
235 ? RELOAD_FOR_INPADDR_ADDRESS \
236 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
237 ? RELOAD_FOR_OUTADDR_ADDRESS \
240 #ifdef HAVE_SECONDARY_RELOADS
241 static int push_secondary_reload PARAMS ((int, rtx, int, int, enum reg_class,
242 enum machine_mode, enum reload_type,
245 static enum reg_class find_valid_class PARAMS ((enum machine_mode, int));
246 static int push_reload PARAMS ((rtx, rtx, rtx *, rtx *, enum reg_class,
247 enum machine_mode, enum machine_mode,
248 int, int, int, enum reload_type));
249 static void push_replacement PARAMS ((rtx *, int, enum machine_mode));
250 static void combine_reloads PARAMS ((void));
251 static int find_reusable_reload PARAMS ((rtx *, rtx, enum reg_class,
252 enum reload_type, int, int));
253 static rtx find_dummy_reload PARAMS ((rtx, rtx, rtx *, rtx *,
254 enum machine_mode, enum machine_mode,
255 enum reg_class, int, int));
256 static int hard_reg_set_here_p PARAMS ((unsigned int, unsigned int, rtx));
257 static struct decomposition decompose PARAMS ((rtx));
258 static int immune_p PARAMS ((rtx, rtx, struct decomposition));
259 static int alternative_allows_memconst PARAMS ((const char *, int));
260 static rtx find_reloads_toplev PARAMS ((rtx, int, enum reload_type, int,
262 static rtx make_memloc PARAMS ((rtx, int));
263 static int find_reloads_address PARAMS ((enum machine_mode, rtx *, rtx, rtx *,
264 int, enum reload_type, int, rtx));
265 static rtx subst_reg_equivs PARAMS ((rtx, rtx));
266 static rtx subst_indexed_address PARAMS ((rtx));
267 static int find_reloads_address_1 PARAMS ((enum machine_mode, rtx, int, rtx *,
268 int, enum reload_type,int, rtx));
269 static void find_reloads_address_part PARAMS ((rtx, rtx *, enum reg_class,
270 enum machine_mode, int,
271 enum reload_type, int));
272 static rtx find_reloads_subreg_address PARAMS ((rtx, int, int, enum reload_type,
274 static int find_inc_amount PARAMS ((rtx, rtx));
275 extern void debug_reload_to_stream PARAMS ((FILE *));
276 extern void debug_reload PARAMS ((void));
278 #ifdef HAVE_SECONDARY_RELOADS
280 /* Determine if any secondary reloads are needed for loading (if IN_P is
281 non-zero) or storing (if IN_P is zero) X to or from a reload register of
282 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
283 are needed, push them.
285 Return the reload number of the secondary reload we made, or -1 if
286 we didn't need one. *PICODE is set to the insn_code to use if we do
287 need a secondary reload. */
290 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
296 enum reg_class reload_class;
297 enum machine_mode reload_mode;
298 enum reload_type type;
299 enum insn_code *picode;
301 enum reg_class class = NO_REGS;
302 enum machine_mode mode = reload_mode;
303 enum insn_code icode = CODE_FOR_nothing;
304 enum reg_class t_class = NO_REGS;
305 enum machine_mode t_mode = VOIDmode;
306 enum insn_code t_icode = CODE_FOR_nothing;
307 enum reload_type secondary_type;
308 int s_reload, t_reload = -1;
310 if (type == RELOAD_FOR_INPUT_ADDRESS
311 || type == RELOAD_FOR_OUTPUT_ADDRESS
312 || type == RELOAD_FOR_INPADDR_ADDRESS
313 || type == RELOAD_FOR_OUTADDR_ADDRESS)
314 secondary_type = type;
316 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
318 *picode = CODE_FOR_nothing;
320 /* If X is a paradoxical SUBREG, use the inner value to determine both the
321 mode and object being reloaded. */
322 if (GET_CODE (x) == SUBREG
323 && (GET_MODE_SIZE (GET_MODE (x))
324 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
327 reload_mode = GET_MODE (x);
330 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
331 is still a pseudo-register by now, it *must* have an equivalent MEM
332 but we don't want to assume that), use that equivalent when seeing if
333 a secondary reload is needed since whether or not a reload is needed
334 might be sensitive to the form of the MEM. */
336 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
337 && reg_equiv_mem[REGNO (x)] != 0)
338 x = reg_equiv_mem[REGNO (x)];
340 #ifdef SECONDARY_INPUT_RELOAD_CLASS
342 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
345 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
347 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
350 /* If we don't need any secondary registers, done. */
351 if (class == NO_REGS)
354 /* Get a possible insn to use. If the predicate doesn't accept X, don't
357 icode = (in_p ? reload_in_optab[(int) reload_mode]
358 : reload_out_optab[(int) reload_mode]);
360 if (icode != CODE_FOR_nothing
361 && insn_data[(int) icode].operand[in_p].predicate
362 && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode)))
363 icode = CODE_FOR_nothing;
365 /* If we will be using an insn, see if it can directly handle the reload
366 register we will be using. If it can, the secondary reload is for a
367 scratch register. If it can't, we will use the secondary reload for
368 an intermediate register and require a tertiary reload for the scratch
371 if (icode != CODE_FOR_nothing)
373 /* If IN_P is non-zero, the reload register will be the output in
374 operand 0. If IN_P is zero, the reload register will be the input
375 in operand 1. Outputs should have an initial "=", which we must
379 = insn_data[(int) icode].operand[!in_p].constraint[in_p];
380 enum reg_class insn_class
381 = (insn_letter == 'r' ? GENERAL_REGS
382 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter));
384 if (insn_class == NO_REGS
386 && insn_data[(int) icode].operand[!in_p].constraint[0] != '=')
387 /* The scratch register's constraint must start with "=&". */
388 || insn_data[(int) icode].operand[2].constraint[0] != '='
389 || insn_data[(int) icode].operand[2].constraint[1] != '&')
392 if (reg_class_subset_p (reload_class, insn_class))
393 mode = insn_data[(int) icode].operand[2].mode;
396 char t_letter = insn_data[(int) icode].operand[2].constraint[2];
398 t_mode = insn_data[(int) icode].operand[2].mode;
399 t_class = (t_letter == 'r' ? GENERAL_REGS
400 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter));
402 icode = CODE_FOR_nothing;
406 /* This case isn't valid, so fail. Reload is allowed to use the same
407 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
408 in the case of a secondary register, we actually need two different
409 registers for correct code. We fail here to prevent the possibility of
410 silently generating incorrect code later.
412 The convention is that secondary input reloads are valid only if the
413 secondary_class is different from class. If you have such a case, you
414 can not use secondary reloads, you must work around the problem some
417 Allow this when MODE is not reload_mode and assume that the generated
418 code handles this case (it does on the Alpha, which is the only place
419 this currently happens). */
421 if (in_p && class == reload_class && mode == reload_mode)
424 /* If we need a tertiary reload, see if we have one we can reuse or else
427 if (t_class != NO_REGS)
429 for (t_reload = 0; t_reload < n_reloads; t_reload++)
430 if (rld[t_reload].secondary_p
431 && (reg_class_subset_p (t_class, rld[t_reload].class)
432 || reg_class_subset_p (rld[t_reload].class, t_class))
433 && ((in_p && rld[t_reload].inmode == t_mode)
434 || (! in_p && rld[t_reload].outmode == t_mode))
435 && ((in_p && (rld[t_reload].secondary_in_icode
436 == CODE_FOR_nothing))
437 || (! in_p &&(rld[t_reload].secondary_out_icode
438 == CODE_FOR_nothing)))
439 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
440 && MERGABLE_RELOADS (secondary_type,
441 rld[t_reload].when_needed,
442 opnum, rld[t_reload].opnum))
445 rld[t_reload].inmode = t_mode;
447 rld[t_reload].outmode = t_mode;
449 if (reg_class_subset_p (t_class, rld[t_reload].class))
450 rld[t_reload].class = t_class;
452 rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum);
453 rld[t_reload].optional &= optional;
454 rld[t_reload].secondary_p = 1;
455 if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed,
456 opnum, rld[t_reload].opnum))
457 rld[t_reload].when_needed = RELOAD_OTHER;
460 if (t_reload == n_reloads)
462 /* We need to make a new tertiary reload for this register class. */
463 rld[t_reload].in = rld[t_reload].out = 0;
464 rld[t_reload].class = t_class;
465 rld[t_reload].inmode = in_p ? t_mode : VOIDmode;
466 rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode;
467 rld[t_reload].reg_rtx = 0;
468 rld[t_reload].optional = optional;
469 rld[t_reload].inc = 0;
470 /* Maybe we could combine these, but it seems too tricky. */
471 rld[t_reload].nocombine = 1;
472 rld[t_reload].in_reg = 0;
473 rld[t_reload].out_reg = 0;
474 rld[t_reload].opnum = opnum;
475 rld[t_reload].when_needed = secondary_type;
476 rld[t_reload].secondary_in_reload = -1;
477 rld[t_reload].secondary_out_reload = -1;
478 rld[t_reload].secondary_in_icode = CODE_FOR_nothing;
479 rld[t_reload].secondary_out_icode = CODE_FOR_nothing;
480 rld[t_reload].secondary_p = 1;
486 /* See if we can reuse an existing secondary reload. */
487 for (s_reload = 0; s_reload < n_reloads; s_reload++)
488 if (rld[s_reload].secondary_p
489 && (reg_class_subset_p (class, rld[s_reload].class)
490 || reg_class_subset_p (rld[s_reload].class, class))
491 && ((in_p && rld[s_reload].inmode == mode)
492 || (! in_p && rld[s_reload].outmode == mode))
493 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
494 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
495 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
496 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
497 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
498 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
499 opnum, rld[s_reload].opnum))
502 rld[s_reload].inmode = mode;
504 rld[s_reload].outmode = mode;
506 if (reg_class_subset_p (class, rld[s_reload].class))
507 rld[s_reload].class = class;
509 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
510 rld[s_reload].optional &= optional;
511 rld[s_reload].secondary_p = 1;
512 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
513 opnum, rld[s_reload].opnum))
514 rld[s_reload].when_needed = RELOAD_OTHER;
517 if (s_reload == n_reloads)
519 #ifdef SECONDARY_MEMORY_NEEDED
520 /* If we need a memory location to copy between the two reload regs,
521 set it up now. Note that we do the input case before making
522 the reload and the output case after. This is due to the
523 way reloads are output. */
525 if (in_p && icode == CODE_FOR_nothing
526 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
528 get_secondary_mem (x, reload_mode, opnum, type);
530 /* We may have just added new reloads. Make sure we add
531 the new reload at the end. */
532 s_reload = n_reloads;
536 /* We need to make a new secondary reload for this register class. */
537 rld[s_reload].in = rld[s_reload].out = 0;
538 rld[s_reload].class = class;
540 rld[s_reload].inmode = in_p ? mode : VOIDmode;
541 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
542 rld[s_reload].reg_rtx = 0;
543 rld[s_reload].optional = optional;
544 rld[s_reload].inc = 0;
545 /* Maybe we could combine these, but it seems too tricky. */
546 rld[s_reload].nocombine = 1;
547 rld[s_reload].in_reg = 0;
548 rld[s_reload].out_reg = 0;
549 rld[s_reload].opnum = opnum;
550 rld[s_reload].when_needed = secondary_type;
551 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
552 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
553 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
554 rld[s_reload].secondary_out_icode
555 = ! in_p ? t_icode : CODE_FOR_nothing;
556 rld[s_reload].secondary_p = 1;
560 #ifdef SECONDARY_MEMORY_NEEDED
561 if (! in_p && icode == CODE_FOR_nothing
562 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
563 get_secondary_mem (x, mode, opnum, type);
570 #endif /* HAVE_SECONDARY_RELOADS */
572 #ifdef SECONDARY_MEMORY_NEEDED
574 /* Return a memory location that will be used to copy X in mode MODE.
575 If we haven't already made a location for this mode in this insn,
576 call find_reloads_address on the location being returned. */
579 get_secondary_mem (x, mode, opnum, type)
580 rtx x ATTRIBUTE_UNUSED;
581 enum machine_mode mode;
583 enum reload_type type;
588 /* By default, if MODE is narrower than a word, widen it to a word.
589 This is required because most machines that require these memory
590 locations do not support short load and stores from all registers
591 (e.g., FP registers). */
593 #ifdef SECONDARY_MEMORY_NEEDED_MODE
594 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
596 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
597 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
600 /* If we already have made a MEM for this operand in MODE, return it. */
601 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
602 return secondary_memlocs_elim[(int) mode][opnum];
604 /* If this is the first time we've tried to get a MEM for this mode,
605 allocate a new one. `something_changed' in reload will get set
606 by noticing that the frame size has changed. */
608 if (secondary_memlocs[(int) mode] == 0)
610 #ifdef SECONDARY_MEMORY_NEEDED_RTX
611 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
613 secondary_memlocs[(int) mode]
614 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
618 /* Get a version of the address doing any eliminations needed. If that
619 didn't give us a new MEM, make a new one if it isn't valid. */
621 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
622 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
624 if (! mem_valid && loc == secondary_memlocs[(int) mode])
625 loc = copy_rtx (loc);
627 /* The only time the call below will do anything is if the stack
628 offset is too large. In that case IND_LEVELS doesn't matter, so we
629 can just pass a zero. Adjust the type to be the address of the
630 corresponding object. If the address was valid, save the eliminated
631 address. If it wasn't valid, we need to make a reload each time, so
636 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
637 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
640 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
644 secondary_memlocs_elim[(int) mode][opnum] = loc;
648 /* Clear any secondary memory locations we've made. */
651 clear_secondary_mem ()
653 bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);
655 #endif /* SECONDARY_MEMORY_NEEDED */
657 /* Find the largest class for which every register number plus N is valid in
658 M1 (if in range). Abort if no such class exists. */
660 static enum reg_class
661 find_valid_class (m1, n)
662 enum machine_mode m1 ATTRIBUTE_UNUSED;
667 enum reg_class best_class = NO_REGS;
668 unsigned int best_size = 0;
670 for (class = 1; class < N_REG_CLASSES; class++)
673 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
674 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
675 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
676 && ! HARD_REGNO_MODE_OK (regno + n, m1))
679 if (! bad && reg_class_size[class] > best_size)
680 best_class = class, best_size = reg_class_size[class];
689 /* Return the number of a previously made reload that can be combined with
690 a new one, or n_reloads if none of the existing reloads can be used.
691 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
692 push_reload, they determine the kind of the new reload that we try to
693 combine. P_IN points to the corresponding value of IN, which can be
694 modified by this function.
695 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
697 find_reusable_reload (p_in, out, class, type, opnum, dont_share)
699 enum reg_class class;
700 enum reload_type type;
701 int opnum, dont_share;
705 /* We can't merge two reloads if the output of either one is
708 if (earlyclobber_operand_p (out))
711 /* We can use an existing reload if the class is right
712 and at least one of IN and OUT is a match
713 and the other is at worst neutral.
714 (A zero compared against anything is neutral.)
716 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
717 for the same thing since that can cause us to need more reload registers
718 than we otherwise would. */
720 for (i = 0; i < n_reloads; i++)
721 if ((reg_class_subset_p (class, rld[i].class)
722 || reg_class_subset_p (rld[i].class, class))
723 /* If the existing reload has a register, it must fit our class. */
724 && (rld[i].reg_rtx == 0
725 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
726 true_regnum (rld[i].reg_rtx)))
727 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
728 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
729 || (out != 0 && MATCHES (rld[i].out, out)
730 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
731 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
732 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
733 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
736 /* Reloading a plain reg for input can match a reload to postincrement
737 that reg, since the postincrement's value is the right value.
738 Likewise, it can match a preincrement reload, since we regard
739 the preincrementation as happening before any ref in this insn
741 for (i = 0; i < n_reloads; i++)
742 if ((reg_class_subset_p (class, rld[i].class)
743 || reg_class_subset_p (rld[i].class, class))
744 /* If the existing reload has a register, it must fit our
746 && (rld[i].reg_rtx == 0
747 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
748 true_regnum (rld[i].reg_rtx)))
749 && out == 0 && rld[i].out == 0 && rld[i].in != 0
750 && ((GET_CODE (in) == REG
751 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == 'a'
752 && MATCHES (XEXP (rld[i].in, 0), in))
753 || (GET_CODE (rld[i].in) == REG
754 && GET_RTX_CLASS (GET_CODE (in)) == 'a'
755 && MATCHES (XEXP (in, 0), rld[i].in)))
756 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
757 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
758 && MERGABLE_RELOADS (type, rld[i].when_needed,
759 opnum, rld[i].opnum))
761 /* Make sure reload_in ultimately has the increment,
762 not the plain register. */
763 if (GET_CODE (in) == REG)
770 /* Record one reload that needs to be performed.
771 IN is an rtx saying where the data are to be found before this instruction.
772 OUT says where they must be stored after the instruction.
773 (IN is zero for data not read, and OUT is zero for data not written.)
774 INLOC and OUTLOC point to the places in the instructions where
775 IN and OUT were found.
776 If IN and OUT are both non-zero, it means the same register must be used
777 to reload both IN and OUT.
779 CLASS is a register class required for the reloaded data.
780 INMODE is the machine mode that the instruction requires
781 for the reg that replaces IN and OUTMODE is likewise for OUT.
783 If IN is zero, then OUT's location and mode should be passed as
786 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
788 OPTIONAL nonzero means this reload does not need to be performed:
789 it can be discarded if that is more convenient.
791 OPNUM and TYPE say what the purpose of this reload is.
793 The return value is the reload-number for this reload.
795 If both IN and OUT are nonzero, in some rare cases we might
796 want to make two separate reloads. (Actually we never do this now.)
797 Therefore, the reload-number for OUT is stored in
798 output_reloadnum when we return; the return value applies to IN.
799 Usually (presently always), when IN and OUT are nonzero,
800 the two reload-numbers are equal, but the caller should be careful to
804 push_reload (in, out, inloc, outloc, class,
805 inmode, outmode, strict_low, optional, opnum, type)
808 enum reg_class class;
809 enum machine_mode inmode, outmode;
813 enum reload_type type;
817 int dont_remove_subreg = 0;
818 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
819 int secondary_in_reload = -1, secondary_out_reload = -1;
820 enum insn_code secondary_in_icode = CODE_FOR_nothing;
821 enum insn_code secondary_out_icode = CODE_FOR_nothing;
823 /* INMODE and/or OUTMODE could be VOIDmode if no mode
824 has been specified for the operand. In that case,
825 use the operand's mode as the mode to reload. */
826 if (inmode == VOIDmode && in != 0)
827 inmode = GET_MODE (in);
828 if (outmode == VOIDmode && out != 0)
829 outmode = GET_MODE (out);
831 /* If IN is a pseudo register everywhere-equivalent to a constant, and
832 it is not in a hard register, reload straight from the constant,
833 since we want to get rid of such pseudo registers.
834 Often this is done earlier, but not always in find_reloads_address. */
835 if (in != 0 && GET_CODE (in) == REG)
837 register int regno = REGNO (in);
839 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
840 && reg_equiv_constant[regno] != 0)
841 in = reg_equiv_constant[regno];
844 /* Likewise for OUT. Of course, OUT will never be equivalent to
845 an actual constant, but it might be equivalent to a memory location
846 (in the case of a parameter). */
847 if (out != 0 && GET_CODE (out) == REG)
849 register int regno = REGNO (out);
851 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
852 && reg_equiv_constant[regno] != 0)
853 out = reg_equiv_constant[regno];
856 /* If we have a read-write operand with an address side-effect,
857 change either IN or OUT so the side-effect happens only once. */
858 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
860 if (GET_CODE (XEXP (in, 0)) == POST_INC
861 || GET_CODE (XEXP (in, 0)) == POST_DEC
862 || GET_CODE (XEXP (in, 0)) == POST_MODIFY)
864 rtx new = gen_rtx_MEM (GET_MODE (in), XEXP (XEXP (in, 0), 0));
866 MEM_COPY_ATTRIBUTES (new, in);
869 if (GET_CODE (XEXP (in, 0)) == PRE_INC
870 || GET_CODE (XEXP (in, 0)) == PRE_DEC
871 || GET_CODE (XEXP (in, 0)) == PRE_MODIFY)
873 rtx new = gen_rtx_MEM (GET_MODE (out), XEXP (XEXP (out, 0), 0));
875 MEM_COPY_ATTRIBUTES (new, out);
880 /* If we are reloading a (SUBREG constant ...), really reload just the
881 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
882 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
883 a pseudo and hence will become a MEM) with M1 wider than M2 and the
884 register is a pseudo, also reload the inside expression.
885 For machines that extend byte loads, do this for any SUBREG of a pseudo
886 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
887 M2 is an integral mode that gets extended when loaded.
888 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
889 either M1 is not valid for R or M2 is wider than a word but we only
890 need one word to store an M2-sized quantity in R.
891 (However, if OUT is nonzero, we need to reload the reg *and*
892 the subreg, so do nothing here, and let following statement handle it.)
894 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
895 we can't handle it here because CONST_INT does not indicate a mode.
897 Similarly, we must reload the inside expression if we have a
898 STRICT_LOW_PART (presumably, in == out in the cas).
900 Also reload the inner expression if it does not require a secondary
901 reload but the SUBREG does.
903 Finally, reload the inner expression if it is a register that is in
904 the class whose registers cannot be referenced in a different size
905 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
906 cannot reload just the inside since we might end up with the wrong
907 register class. But if it is inside a STRICT_LOW_PART, we have
908 no choice, so we hope we do get the right register class there. */
910 if (in != 0 && GET_CODE (in) == SUBREG
911 && (SUBREG_WORD (in) == 0 || strict_low)
912 #ifdef CLASS_CANNOT_CHANGE_MODE
913 && class != CLASS_CANNOT_CHANGE_MODE
915 && (CONSTANT_P (SUBREG_REG (in))
916 || GET_CODE (SUBREG_REG (in)) == PLUS
918 || (((GET_CODE (SUBREG_REG (in)) == REG
919 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
920 || GET_CODE (SUBREG_REG (in)) == MEM)
921 && ((GET_MODE_SIZE (inmode)
922 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
923 #ifdef LOAD_EXTEND_OP
924 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
925 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
927 && (GET_MODE_SIZE (inmode)
928 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
929 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
930 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
932 #ifdef WORD_REGISTER_OPERATIONS
933 || ((GET_MODE_SIZE (inmode)
934 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
935 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
936 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
940 || (GET_CODE (SUBREG_REG (in)) == REG
941 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
942 /* The case where out is nonzero
943 is handled differently in the following statement. */
944 && (out == 0 || SUBREG_WORD (in) == 0)
945 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
946 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
948 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
950 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
951 GET_MODE (SUBREG_REG (in)))))
952 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
955 #ifdef SECONDARY_INPUT_RELOAD_CLASS
956 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
957 && (SECONDARY_INPUT_RELOAD_CLASS (class,
958 GET_MODE (SUBREG_REG (in)),
962 #ifdef CLASS_CANNOT_CHANGE_MODE
963 || (GET_CODE (SUBREG_REG (in)) == REG
964 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
965 && (TEST_HARD_REG_BIT
966 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
967 REGNO (SUBREG_REG (in))))
968 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)),
973 in_subreg_loc = inloc;
974 inloc = &SUBREG_REG (in);
976 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
977 if (GET_CODE (in) == MEM)
978 /* This is supposed to happen only for paradoxical subregs made by
979 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
980 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
983 inmode = GET_MODE (in);
986 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
987 either M1 is not valid for R or M2 is wider than a word but we only
988 need one word to store an M2-sized quantity in R.
990 However, we must reload the inner reg *as well as* the subreg in
993 /* Similar issue for (SUBREG constant ...) if it was not handled by the
994 code above. This can happen if SUBREG_WORD != 0. */
996 if (in != 0 && GET_CODE (in) == SUBREG
997 && (CONSTANT_P (SUBREG_REG (in))
998 || (GET_CODE (SUBREG_REG (in)) == REG
999 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1000 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in))
1003 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1004 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1006 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1008 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1009 GET_MODE (SUBREG_REG (in)))))))))
1011 /* This relies on the fact that emit_reload_insns outputs the
1012 instructions for input reloads of type RELOAD_OTHER in the same
1013 order as the reloads. Thus if the outer reload is also of type
1014 RELOAD_OTHER, we are guaranteed that this inner reload will be
1015 output before the outer reload. */
1016 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
1017 find_valid_class (inmode, SUBREG_WORD (in)),
1018 VOIDmode, VOIDmode, 0, 0, opnum, type);
1019 dont_remove_subreg = 1;
1022 /* Similarly for paradoxical and problematical SUBREGs on the output.
1023 Note that there is no reason we need worry about the previous value
1024 of SUBREG_REG (out); even if wider than out,
1025 storing in a subreg is entitled to clobber it all
1026 (except in the case of STRICT_LOW_PART,
1027 and in that case the constraint should label it input-output.) */
1028 if (out != 0 && GET_CODE (out) == SUBREG
1029 && (SUBREG_WORD (out) == 0 || strict_low)
1030 #ifdef CLASS_CANNOT_CHANGE_MODE
1031 && class != CLASS_CANNOT_CHANGE_MODE
1033 && (CONSTANT_P (SUBREG_REG (out))
1035 || (((GET_CODE (SUBREG_REG (out)) == REG
1036 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1037 || GET_CODE (SUBREG_REG (out)) == MEM)
1038 && ((GET_MODE_SIZE (outmode)
1039 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1040 #ifdef WORD_REGISTER_OPERATIONS
1041 || ((GET_MODE_SIZE (outmode)
1042 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1043 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1044 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1048 || (GET_CODE (SUBREG_REG (out)) == REG
1049 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1050 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1051 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1053 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1055 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1056 GET_MODE (SUBREG_REG (out)))))
1057 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
1058 + SUBREG_WORD (out)),
1060 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1061 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1062 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1063 GET_MODE (SUBREG_REG (out)),
1067 #ifdef CLASS_CANNOT_CHANGE_MODE
1068 || (GET_CODE (SUBREG_REG (out)) == REG
1069 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1070 && (TEST_HARD_REG_BIT
1071 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
1072 REGNO (SUBREG_REG (out))))
1073 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)),
1078 out_subreg_loc = outloc;
1079 outloc = &SUBREG_REG (out);
1081 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1082 if (GET_CODE (out) == MEM
1083 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1086 outmode = GET_MODE (out);
1089 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1090 either M1 is not valid for R or M2 is wider than a word but we only
1091 need one word to store an M2-sized quantity in R.
1093 However, we must reload the inner reg *as well as* the subreg in
1094 that case. In this case, the inner reg is an in-out reload. */
1096 if (out != 0 && GET_CODE (out) == SUBREG
1097 && GET_CODE (SUBREG_REG (out)) == REG
1098 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1099 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)) + SUBREG_WORD (out),
1101 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1102 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1104 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1106 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1107 GET_MODE (SUBREG_REG (out)))))))
1109 /* This relies on the fact that emit_reload_insns outputs the
1110 instructions for output reloads of type RELOAD_OTHER in reverse
1111 order of the reloads. Thus if the outer reload is also of type
1112 RELOAD_OTHER, we are guaranteed that this inner reload will be
1113 output after the outer reload. */
1114 dont_remove_subreg = 1;
1115 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1117 find_valid_class (outmode, SUBREG_WORD (out)),
1118 VOIDmode, VOIDmode, 0, 0,
1119 opnum, RELOAD_OTHER);
1122 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1123 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1124 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1125 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1128 /* If IN is a SUBREG of a hard register, make a new REG. This
1129 simplifies some of the cases below. */
1131 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1132 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1133 && ! dont_remove_subreg)
1134 in = gen_rtx_REG (GET_MODE (in),
1135 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
1137 /* Similarly for OUT. */
1138 if (out != 0 && GET_CODE (out) == SUBREG
1139 && GET_CODE (SUBREG_REG (out)) == REG
1140 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1141 && ! dont_remove_subreg)
1142 out = gen_rtx_REG (GET_MODE (out),
1143 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
1145 /* Narrow down the class of register wanted if that is
1146 desirable on this machine for efficiency. */
1148 class = PREFERRED_RELOAD_CLASS (in, class);
1150 /* Output reloads may need analogous treatment, different in detail. */
1151 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1153 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1156 /* Make sure we use a class that can handle the actual pseudo
1157 inside any subreg. For example, on the 386, QImode regs
1158 can appear within SImode subregs. Although GENERAL_REGS
1159 can handle SImode, QImode needs a smaller class. */
1160 #ifdef LIMIT_RELOAD_CLASS
1162 class = LIMIT_RELOAD_CLASS (inmode, class);
1163 else if (in != 0 && GET_CODE (in) == SUBREG)
1164 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1167 class = LIMIT_RELOAD_CLASS (outmode, class);
1168 if (out != 0 && GET_CODE (out) == SUBREG)
1169 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1172 /* Verify that this class is at least possible for the mode that
1174 if (this_insn_is_asm)
1176 enum machine_mode mode;
1177 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1181 if (mode == VOIDmode)
1183 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1188 outmode = word_mode;
1190 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1191 if (HARD_REGNO_MODE_OK (i, mode)
1192 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1194 int nregs = HARD_REGNO_NREGS (i, mode);
1197 for (j = 1; j < nregs; j++)
1198 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1203 if (i == FIRST_PSEUDO_REGISTER)
1205 error_for_asm (this_insn, "impossible register constraint in `asm'");
1210 /* Optional output reloads are always OK even if we have no register class,
1211 since the function of these reloads is only to have spill_reg_store etc.
1212 set, so that the storing insn can be deleted later. */
1213 if (class == NO_REGS
1214 && (optional == 0 || type != RELOAD_FOR_OUTPUT))
1217 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1221 /* See if we need a secondary reload register to move between CLASS
1222 and IN or CLASS and OUT. Get the icode and push any required reloads
1223 needed for each of them if so. */
1225 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1228 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1229 &secondary_in_icode);
1232 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1233 if (out != 0 && GET_CODE (out) != SCRATCH)
1234 secondary_out_reload
1235 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1236 type, &secondary_out_icode);
1239 /* We found no existing reload suitable for re-use.
1240 So add an additional reload. */
1242 #ifdef SECONDARY_MEMORY_NEEDED
1243 /* If a memory location is needed for the copy, make one. */
1244 if (in != 0 && GET_CODE (in) == REG
1245 && REGNO (in) < FIRST_PSEUDO_REGISTER
1246 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1248 get_secondary_mem (in, inmode, opnum, type);
1254 rld[i].class = class;
1255 rld[i].inmode = inmode;
1256 rld[i].outmode = outmode;
1258 rld[i].optional = optional;
1260 rld[i].nocombine = 0;
1261 rld[i].in_reg = inloc ? *inloc : 0;
1262 rld[i].out_reg = outloc ? *outloc : 0;
1263 rld[i].opnum = opnum;
1264 rld[i].when_needed = type;
1265 rld[i].secondary_in_reload = secondary_in_reload;
1266 rld[i].secondary_out_reload = secondary_out_reload;
1267 rld[i].secondary_in_icode = secondary_in_icode;
1268 rld[i].secondary_out_icode = secondary_out_icode;
1269 rld[i].secondary_p = 0;
1273 #ifdef SECONDARY_MEMORY_NEEDED
1274 if (out != 0 && GET_CODE (out) == REG
1275 && REGNO (out) < FIRST_PSEUDO_REGISTER
1276 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1278 get_secondary_mem (out, outmode, opnum, type);
1283 /* We are reusing an existing reload,
1284 but we may have additional information for it.
1285 For example, we may now have both IN and OUT
1286 while the old one may have just one of them. */
1288 /* The modes can be different. If they are, we want to reload in
1289 the larger mode, so that the value is valid for both modes. */
1290 if (inmode != VOIDmode
1291 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1292 rld[i].inmode = inmode;
1293 if (outmode != VOIDmode
1294 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1295 rld[i].outmode = outmode;
1298 rtx in_reg = inloc ? *inloc : 0;
1299 /* If we merge reloads for two distinct rtl expressions that
1300 are identical in content, there might be duplicate address
1301 reloads. Remove the extra set now, so that if we later find
1302 that we can inherit this reload, we can get rid of the
1303 address reloads altogether.
1305 Do not do this if both reloads are optional since the result
1306 would be an optional reload which could potentially leave
1307 unresolved address replacements.
1309 It is not sufficient to call transfer_replacements since
1310 choose_reload_regs will remove the replacements for address
1311 reloads of inherited reloads which results in the same
1313 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1314 && ! (rld[i].optional && optional))
1316 /* We must keep the address reload with the lower operand
1318 if (opnum > rld[i].opnum)
1320 remove_address_replacements (in);
1322 in_reg = rld[i].in_reg;
1325 remove_address_replacements (rld[i].in);
1328 rld[i].in_reg = in_reg;
1333 rld[i].out_reg = outloc ? *outloc : 0;
1335 if (reg_class_subset_p (class, rld[i].class))
1336 rld[i].class = class;
1337 rld[i].optional &= optional;
1338 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1339 opnum, rld[i].opnum))
1340 rld[i].when_needed = RELOAD_OTHER;
1341 rld[i].opnum = MIN (rld[i].opnum, opnum);
1344 /* If the ostensible rtx being reload differs from the rtx found
1345 in the location to substitute, this reload is not safe to combine
1346 because we cannot reliably tell whether it appears in the insn. */
1348 if (in != 0 && in != *inloc)
1349 rld[i].nocombine = 1;
1352 /* This was replaced by changes in find_reloads_address_1 and the new
1353 function inc_for_reload, which go with a new meaning of reload_inc. */
1355 /* If this is an IN/OUT reload in an insn that sets the CC,
1356 it must be for an autoincrement. It doesn't work to store
1357 the incremented value after the insn because that would clobber the CC.
1358 So we must do the increment of the value reloaded from,
1359 increment it, store it back, then decrement again. */
1360 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1364 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1365 /* If we did not find a nonzero amount-to-increment-by,
1366 that contradicts the belief that IN is being incremented
1367 in an address in this insn. */
1368 if (rld[i].inc == 0)
1373 /* If we will replace IN and OUT with the reload-reg,
1374 record where they are located so that substitution need
1375 not do a tree walk. */
1377 if (replace_reloads)
1381 register struct replacement *r = &replacements[n_replacements++];
1383 r->subreg_loc = in_subreg_loc;
1387 if (outloc != 0 && outloc != inloc)
1389 register struct replacement *r = &replacements[n_replacements++];
1392 r->subreg_loc = out_subreg_loc;
1397 /* If this reload is just being introduced and it has both
1398 an incoming quantity and an outgoing quantity that are
1399 supposed to be made to match, see if either one of the two
1400 can serve as the place to reload into.
1402 If one of them is acceptable, set rld[i].reg_rtx
1405 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1407 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1410 earlyclobber_operand_p (out));
1412 /* If the outgoing register already contains the same value
1413 as the incoming one, we can dispense with loading it.
1414 The easiest way to tell the caller that is to give a phony
1415 value for the incoming operand (same as outgoing one). */
1416 if (rld[i].reg_rtx == out
1417 && (GET_CODE (in) == REG || CONSTANT_P (in))
1418 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1419 static_reload_reg_p, i, inmode))
1423 /* If this is an input reload and the operand contains a register that
1424 dies in this insn and is used nowhere else, see if it is the right class
1425 to be used for this reload. Use it if so. (This occurs most commonly
1426 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1427 this if it is also an output reload that mentions the register unless
1428 the output is a SUBREG that clobbers an entire register.
1430 Note that the operand might be one of the spill regs, if it is a
1431 pseudo reg and we are in a block where spilling has not taken place.
1432 But if there is no spilling in this block, that is OK.
1433 An explicitly used hard reg cannot be a spill reg. */
1435 if (rld[i].reg_rtx == 0 && in != 0)
1440 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1441 if (REG_NOTE_KIND (note) == REG_DEAD
1442 && GET_CODE (XEXP (note, 0)) == REG
1443 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1444 && reg_mentioned_p (XEXP (note, 0), in)
1445 && ! refers_to_regno_for_reload_p (regno,
1447 + HARD_REGNO_NREGS (regno,
1449 PATTERN (this_insn), inloc)
1450 /* If this is also an output reload, IN cannot be used as
1451 the reload register if it is set in this insn unless IN
1453 && (out == 0 || in == out
1454 || ! hard_reg_set_here_p (regno,
1456 + HARD_REGNO_NREGS (regno,
1458 PATTERN (this_insn)))
1459 /* ??? Why is this code so different from the previous?
1460 Is there any simple coherent way to describe the two together?
1461 What's going on here. */
1463 || (GET_CODE (in) == SUBREG
1464 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1466 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1467 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1468 /* Make sure the operand fits in the reg that dies. */
1469 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1470 && HARD_REGNO_MODE_OK (regno, inmode)
1471 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1472 && HARD_REGNO_MODE_OK (regno, outmode))
1475 unsigned int nregs = MAX (HARD_REGNO_NREGS (regno, inmode),
1476 HARD_REGNO_NREGS (regno, outmode));
1478 for (offs = 0; offs < nregs; offs++)
1479 if (fixed_regs[regno + offs]
1480 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1486 rld[i].reg_rtx = gen_rtx_REG (inmode, regno);
1493 output_reloadnum = i;
1498 /* Record an additional place we must replace a value
1499 for which we have already recorded a reload.
1500 RELOADNUM is the value returned by push_reload
1501 when the reload was recorded.
1502 This is used in insn patterns that use match_dup. */
1505 push_replacement (loc, reloadnum, mode)
1508 enum machine_mode mode;
1510 if (replace_reloads)
1512 register struct replacement *r = &replacements[n_replacements++];
1513 r->what = reloadnum;
1520 /* Transfer all replacements that used to be in reload FROM to be in
1524 transfer_replacements (to, from)
1529 for (i = 0; i < n_replacements; i++)
1530 if (replacements[i].what == from)
1531 replacements[i].what = to;
1534 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1535 or a subpart of it. If we have any replacements registered for IN_RTX,
1536 cancel the reloads that were supposed to load them.
1537 Return non-zero if we canceled any reloads. */
1539 remove_address_replacements (in_rtx)
1543 char reload_flags[MAX_RELOADS];
1544 int something_changed = 0;
1546 bzero (reload_flags, sizeof reload_flags);
1547 for (i = 0, j = 0; i < n_replacements; i++)
1549 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1550 reload_flags[replacements[i].what] |= 1;
1553 replacements[j++] = replacements[i];
1554 reload_flags[replacements[i].what] |= 2;
1557 /* Note that the following store must be done before the recursive calls. */
1560 for (i = n_reloads - 1; i >= 0; i--)
1562 if (reload_flags[i] == 1)
1564 deallocate_reload_reg (i);
1565 remove_address_replacements (rld[i].in);
1567 something_changed = 1;
1570 return something_changed;
1573 /* If there is only one output reload, and it is not for an earlyclobber
1574 operand, try to combine it with a (logically unrelated) input reload
1575 to reduce the number of reload registers needed.
1577 This is safe if the input reload does not appear in
1578 the value being output-reloaded, because this implies
1579 it is not needed any more once the original insn completes.
1581 If that doesn't work, see we can use any of the registers that
1582 die in this insn as a reload register. We can if it is of the right
1583 class and does not appear in the value being output-reloaded. */
1589 int output_reload = -1;
1590 int secondary_out = -1;
1593 /* Find the output reload; return unless there is exactly one
1594 and that one is mandatory. */
1596 for (i = 0; i < n_reloads; i++)
1597 if (rld[i].out != 0)
1599 if (output_reload >= 0)
1604 if (output_reload < 0 || rld[output_reload].optional)
1607 /* An input-output reload isn't combinable. */
1609 if (rld[output_reload].in != 0)
1612 /* If this reload is for an earlyclobber operand, we can't do anything. */
1613 if (earlyclobber_operand_p (rld[output_reload].out))
1616 /* Check each input reload; can we combine it? */
1618 for (i = 0; i < n_reloads; i++)
1619 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1620 /* Life span of this reload must not extend past main insn. */
1621 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1622 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1623 && rld[i].when_needed != RELOAD_OTHER
1624 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1625 == CLASS_MAX_NREGS (rld[output_reload].class,
1626 rld[output_reload].outmode))
1628 && rld[i].reg_rtx == 0
1629 #ifdef SECONDARY_MEMORY_NEEDED
1630 /* Don't combine two reloads with different secondary
1631 memory locations. */
1632 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1633 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1634 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1635 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1637 && (SMALL_REGISTER_CLASSES
1638 ? (rld[i].class == rld[output_reload].class)
1639 : (reg_class_subset_p (rld[i].class,
1640 rld[output_reload].class)
1641 || reg_class_subset_p (rld[output_reload].class,
1643 && (MATCHES (rld[i].in, rld[output_reload].out)
1644 /* Args reversed because the first arg seems to be
1645 the one that we imagine being modified
1646 while the second is the one that might be affected. */
1647 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1649 /* However, if the input is a register that appears inside
1650 the output, then we also can't share.
1651 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1652 If the same reload reg is used for both reg 69 and the
1653 result to be stored in memory, then that result
1654 will clobber the address of the memory ref. */
1655 && ! (GET_CODE (rld[i].in) == REG
1656 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1657 rld[output_reload].out))))
1658 && (reg_class_size[(int) rld[i].class]
1659 || SMALL_REGISTER_CLASSES)
1660 /* We will allow making things slightly worse by combining an
1661 input and an output, but no worse than that. */
1662 && (rld[i].when_needed == RELOAD_FOR_INPUT
1663 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1667 /* We have found a reload to combine with! */
1668 rld[i].out = rld[output_reload].out;
1669 rld[i].out_reg = rld[output_reload].out_reg;
1670 rld[i].outmode = rld[output_reload].outmode;
1671 /* Mark the old output reload as inoperative. */
1672 rld[output_reload].out = 0;
1673 /* The combined reload is needed for the entire insn. */
1674 rld[i].when_needed = RELOAD_OTHER;
1675 /* If the output reload had a secondary reload, copy it. */
1676 if (rld[output_reload].secondary_out_reload != -1)
1678 rld[i].secondary_out_reload
1679 = rld[output_reload].secondary_out_reload;
1680 rld[i].secondary_out_icode
1681 = rld[output_reload].secondary_out_icode;
1684 #ifdef SECONDARY_MEMORY_NEEDED
1685 /* Copy any secondary MEM. */
1686 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1687 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1688 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1690 /* If required, minimize the register class. */
1691 if (reg_class_subset_p (rld[output_reload].class,
1693 rld[i].class = rld[output_reload].class;
1695 /* Transfer all replacements from the old reload to the combined. */
1696 for (j = 0; j < n_replacements; j++)
1697 if (replacements[j].what == output_reload)
1698 replacements[j].what = i;
1703 /* If this insn has only one operand that is modified or written (assumed
1704 to be the first), it must be the one corresponding to this reload. It
1705 is safe to use anything that dies in this insn for that output provided
1706 that it does not occur in the output (we already know it isn't an
1707 earlyclobber. If this is an asm insn, give up. */
1709 if (INSN_CODE (this_insn) == -1)
1712 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1713 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1714 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1717 /* See if some hard register that dies in this insn and is not used in
1718 the output is the right class. Only works if the register we pick
1719 up can fully hold our output reload. */
1720 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1721 if (REG_NOTE_KIND (note) == REG_DEAD
1722 && GET_CODE (XEXP (note, 0)) == REG
1723 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1724 rld[output_reload].out)
1725 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1726 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1727 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1728 REGNO (XEXP (note, 0)))
1729 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1730 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1731 /* Ensure that a secondary or tertiary reload for this output
1732 won't want this register. */
1733 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1734 || (! (TEST_HARD_REG_BIT
1735 (reg_class_contents[(int) rld[secondary_out].class],
1736 REGNO (XEXP (note, 0))))
1737 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1738 || ! (TEST_HARD_REG_BIT
1739 (reg_class_contents[(int) rld[secondary_out].class],
1740 REGNO (XEXP (note, 0)))))))
1741 && ! fixed_regs[REGNO (XEXP (note, 0))])
1743 rld[output_reload].reg_rtx
1744 = gen_rtx_REG (rld[output_reload].outmode,
1745 REGNO (XEXP (note, 0)));
1750 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1751 See if one of IN and OUT is a register that may be used;
1752 this is desirable since a spill-register won't be needed.
1753 If so, return the register rtx that proves acceptable.
1755 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1756 CLASS is the register class required for the reload.
1758 If FOR_REAL is >= 0, it is the number of the reload,
1759 and in some cases when it can be discovered that OUT doesn't need
1760 to be computed, clear out rld[FOR_REAL].out.
1762 If FOR_REAL is -1, this should not be done, because this call
1763 is just to see if a register can be found, not to find and install it.
1765 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1766 puts an additional constraint on being able to use IN for OUT since
1767 IN must not appear elsewhere in the insn (it is assumed that IN itself
1768 is safe from the earlyclobber). */
1771 find_dummy_reload (real_in, real_out, inloc, outloc,
1772 inmode, outmode, class, for_real, earlyclobber)
1773 rtx real_in, real_out;
1774 rtx *inloc, *outloc;
1775 enum machine_mode inmode, outmode;
1776 enum reg_class class;
1786 /* If operands exceed a word, we can't use either of them
1787 unless they have the same size. */
1788 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1789 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1790 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1793 /* Find the inside of any subregs. */
1794 while (GET_CODE (out) == SUBREG)
1796 out_offset = SUBREG_WORD (out);
1797 out = SUBREG_REG (out);
1799 while (GET_CODE (in) == SUBREG)
1801 in_offset = SUBREG_WORD (in);
1802 in = SUBREG_REG (in);
1805 /* Narrow down the reg class, the same way push_reload will;
1806 otherwise we might find a dummy now, but push_reload won't. */
1807 class = PREFERRED_RELOAD_CLASS (in, class);
1809 /* See if OUT will do. */
1810 if (GET_CODE (out) == REG
1811 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1813 unsigned int regno = REGNO (out) + out_offset;
1814 unsigned int nwords = HARD_REGNO_NREGS (regno, outmode);
1817 /* When we consider whether the insn uses OUT,
1818 ignore references within IN. They don't prevent us
1819 from copying IN into OUT, because those refs would
1820 move into the insn that reloads IN.
1822 However, we only ignore IN in its role as this reload.
1823 If the insn uses IN elsewhere and it contains OUT,
1824 that counts. We can't be sure it's the "same" operand
1825 so it might not go through this reload. */
1827 *inloc = const0_rtx;
1829 if (regno < FIRST_PSEUDO_REGISTER
1830 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1831 PATTERN (this_insn), outloc))
1835 for (i = 0; i < nwords; i++)
1836 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1842 if (GET_CODE (real_out) == REG)
1845 value = gen_rtx_REG (outmode, regno);
1852 /* Consider using IN if OUT was not acceptable
1853 or if OUT dies in this insn (like the quotient in a divmod insn).
1854 We can't use IN unless it is dies in this insn,
1855 which means we must know accurately which hard regs are live.
1856 Also, the result can't go in IN if IN is used within OUT,
1857 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1858 if (hard_regs_live_known
1859 && GET_CODE (in) == REG
1860 && REGNO (in) < FIRST_PSEUDO_REGISTER
1862 || find_reg_note (this_insn, REG_UNUSED, real_out))
1863 && find_reg_note (this_insn, REG_DEAD, real_in)
1864 && !fixed_regs[REGNO (in)]
1865 && HARD_REGNO_MODE_OK (REGNO (in),
1866 /* The only case where out and real_out might
1867 have different modes is where real_out
1868 is a subreg, and in that case, out
1870 (GET_MODE (out) != VOIDmode
1871 ? GET_MODE (out) : outmode)))
1873 unsigned int regno = REGNO (in) + in_offset;
1874 unsigned int nwords = HARD_REGNO_NREGS (regno, inmode);
1876 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1877 && ! hard_reg_set_here_p (regno, regno + nwords,
1878 PATTERN (this_insn))
1880 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1881 PATTERN (this_insn), inloc)))
1885 for (i = 0; i < nwords; i++)
1886 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1892 /* If we were going to use OUT as the reload reg
1893 and changed our mind, it means OUT is a dummy that
1894 dies here. So don't bother copying value to it. */
1895 if (for_real >= 0 && value == real_out)
1896 rld[for_real].out = 0;
1897 if (GET_CODE (real_in) == REG)
1900 value = gen_rtx_REG (inmode, regno);
1908 /* This page contains subroutines used mainly for determining
1909 whether the IN or an OUT of a reload can serve as the
1912 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1915 earlyclobber_operand_p (x)
1920 for (i = 0; i < n_earlyclobbers; i++)
1921 if (reload_earlyclobbers[i] == x)
1927 /* Return 1 if expression X alters a hard reg in the range
1928 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1929 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1930 X should be the body of an instruction. */
1933 hard_reg_set_here_p (beg_regno, end_regno, x)
1934 unsigned int beg_regno, end_regno;
1937 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1939 register rtx op0 = SET_DEST (x);
1941 while (GET_CODE (op0) == SUBREG)
1942 op0 = SUBREG_REG (op0);
1943 if (GET_CODE (op0) == REG)
1945 unsigned int r = REGNO (op0);
1947 /* See if this reg overlaps range under consideration. */
1949 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1953 else if (GET_CODE (x) == PARALLEL)
1955 register int i = XVECLEN (x, 0) - 1;
1958 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1965 /* Return 1 if ADDR is a valid memory address for mode MODE,
1966 and check that each pseudo reg has the proper kind of
1970 strict_memory_address_p (mode, addr)
1971 enum machine_mode mode ATTRIBUTE_UNUSED;
1974 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
1981 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1982 if they are the same hard reg, and has special hacks for
1983 autoincrement and autodecrement.
1984 This is specifically intended for find_reloads to use
1985 in determining whether two operands match.
1986 X is the operand whose number is the lower of the two.
1988 The value is 2 if Y contains a pre-increment that matches
1989 a non-incrementing address in X. */
1991 /* ??? To be completely correct, we should arrange to pass
1992 for X the output operand and for Y the input operand.
1993 For now, we assume that the output operand has the lower number
1994 because that is natural in (SET output (... input ...)). */
1997 operands_match_p (x, y)
2001 register RTX_CODE code = GET_CODE (x);
2002 register const char *fmt;
2007 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2008 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2009 && GET_CODE (SUBREG_REG (y)) == REG)))
2015 i = REGNO (SUBREG_REG (x));
2016 if (i >= FIRST_PSEUDO_REGISTER)
2018 i += SUBREG_WORD (x);
2023 if (GET_CODE (y) == SUBREG)
2025 j = REGNO (SUBREG_REG (y));
2026 if (j >= FIRST_PSEUDO_REGISTER)
2028 j += SUBREG_WORD (y);
2033 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2034 multiple hard register group, so that for example (reg:DI 0) and
2035 (reg:SI 1) will be considered the same register. */
2036 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2037 && i < FIRST_PSEUDO_REGISTER)
2038 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
2039 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2040 && j < FIRST_PSEUDO_REGISTER)
2041 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
2045 /* If two operands must match, because they are really a single
2046 operand of an assembler insn, then two postincrements are invalid
2047 because the assembler insn would increment only once.
2048 On the other hand, an postincrement matches ordinary indexing
2049 if the postincrement is the output operand. */
2050 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2051 return operands_match_p (XEXP (x, 0), y);
2052 /* Two preincrements are invalid
2053 because the assembler insn would increment only once.
2054 On the other hand, an preincrement matches ordinary indexing
2055 if the preincrement is the input operand.
2056 In this case, return 2, since some callers need to do special
2057 things when this happens. */
2058 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2059 || GET_CODE (y) == PRE_MODIFY)
2060 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2064 /* Now we have disposed of all the cases
2065 in which different rtx codes can match. */
2066 if (code != GET_CODE (y))
2068 if (code == LABEL_REF)
2069 return XEXP (x, 0) == XEXP (y, 0);
2070 if (code == SYMBOL_REF)
2071 return XSTR (x, 0) == XSTR (y, 0);
2073 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2075 if (GET_MODE (x) != GET_MODE (y))
2078 /* Compare the elements. If any pair of corresponding elements
2079 fail to match, return 0 for the whole things. */
2082 fmt = GET_RTX_FORMAT (code);
2083 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2089 if (XWINT (x, i) != XWINT (y, i))
2094 if (XINT (x, i) != XINT (y, i))
2099 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2102 /* If any subexpression returns 2,
2103 we should return 2 if we are successful. */
2112 if (XVECLEN (x, i) != XVECLEN (y, i))
2114 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2116 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2124 /* It is believed that rtx's at this level will never
2125 contain anything but integers and other rtx's,
2126 except for within LABEL_REFs and SYMBOL_REFs. */
2131 return 1 + success_2;
2134 /* Describe the range of registers or memory referenced by X.
2135 If X is a register, set REG_FLAG and put the first register
2136 number into START and the last plus one into END.
2137 If X is a memory reference, put a base address into BASE
2138 and a range of integer offsets into START and END.
2139 If X is pushing on the stack, we can assume it causes no trouble,
2140 so we set the SAFE field. */
2142 static struct decomposition
2146 struct decomposition val;
2152 if (GET_CODE (x) == MEM)
2154 rtx base = NULL_RTX, offset = 0;
2155 rtx addr = XEXP (x, 0);
2157 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2158 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2160 val.base = XEXP (addr, 0);
2161 val.start = - GET_MODE_SIZE (GET_MODE (x));
2162 val.end = GET_MODE_SIZE (GET_MODE (x));
2163 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2167 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2169 if (GET_CODE (XEXP (addr, 1)) == PLUS
2170 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2171 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2173 val.base = XEXP (addr, 0);
2174 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2175 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2176 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2181 if (GET_CODE (addr) == CONST)
2183 addr = XEXP (addr, 0);
2186 if (GET_CODE (addr) == PLUS)
2188 if (CONSTANT_P (XEXP (addr, 0)))
2190 base = XEXP (addr, 1);
2191 offset = XEXP (addr, 0);
2193 else if (CONSTANT_P (XEXP (addr, 1)))
2195 base = XEXP (addr, 0);
2196 offset = XEXP (addr, 1);
2203 offset = const0_rtx;
2205 if (GET_CODE (offset) == CONST)
2206 offset = XEXP (offset, 0);
2207 if (GET_CODE (offset) == PLUS)
2209 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2211 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2212 offset = XEXP (offset, 0);
2214 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2216 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2217 offset = XEXP (offset, 1);
2221 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2222 offset = const0_rtx;
2225 else if (GET_CODE (offset) != CONST_INT)
2227 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2228 offset = const0_rtx;
2231 if (all_const && GET_CODE (base) == PLUS)
2232 base = gen_rtx_CONST (GET_MODE (base), base);
2234 if (GET_CODE (offset) != CONST_INT)
2237 val.start = INTVAL (offset);
2238 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2242 else if (GET_CODE (x) == REG)
2245 val.start = true_regnum (x);
2248 /* A pseudo with no hard reg. */
2249 val.start = REGNO (x);
2250 val.end = val.start + 1;
2254 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2256 else if (GET_CODE (x) == SUBREG)
2258 if (GET_CODE (SUBREG_REG (x)) != REG)
2259 /* This could be more precise, but it's good enough. */
2260 return decompose (SUBREG_REG (x));
2262 val.start = true_regnum (x);
2264 return decompose (SUBREG_REG (x));
2267 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2269 else if (CONSTANT_P (x)
2270 /* This hasn't been assigned yet, so it can't conflict yet. */
2271 || GET_CODE (x) == SCRATCH)
2278 /* Return 1 if altering Y will not modify the value of X.
2279 Y is also described by YDATA, which should be decompose (Y). */
2282 immune_p (x, y, ydata)
2284 struct decomposition ydata;
2286 struct decomposition xdata;
2289 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2293 if (GET_CODE (y) != MEM)
2295 /* If Y is memory and X is not, Y can't affect X. */
2296 if (GET_CODE (x) != MEM)
2299 xdata = decompose (x);
2301 if (! rtx_equal_p (xdata.base, ydata.base))
2303 /* If bases are distinct symbolic constants, there is no overlap. */
2304 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2306 /* Constants and stack slots never overlap. */
2307 if (CONSTANT_P (xdata.base)
2308 && (ydata.base == frame_pointer_rtx
2309 || ydata.base == hard_frame_pointer_rtx
2310 || ydata.base == stack_pointer_rtx))
2312 if (CONSTANT_P (ydata.base)
2313 && (xdata.base == frame_pointer_rtx
2314 || xdata.base == hard_frame_pointer_rtx
2315 || xdata.base == stack_pointer_rtx))
2317 /* If either base is variable, we don't know anything. */
2322 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2325 /* Similar, but calls decompose. */
2328 safe_from_earlyclobber (op, clobber)
2331 struct decomposition early_data;
2333 early_data = decompose (clobber);
2334 return immune_p (op, clobber, early_data);
2337 /* Main entry point of this file: search the body of INSN
2338 for values that need reloading and record them with push_reload.
2339 REPLACE nonzero means record also where the values occur
2340 so that subst_reloads can be used.
2342 IND_LEVELS says how many levels of indirection are supported by this
2343 machine; a value of zero means that a memory reference is not a valid
2346 LIVE_KNOWN says we have valid information about which hard
2347 regs are live at each point in the program; this is true when
2348 we are called from global_alloc but false when stupid register
2349 allocation has been done.
2351 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2352 which is nonnegative if the reg has been commandeered for reloading into.
2353 It is copied into STATIC_RELOAD_REG_P and referenced from there
2354 by various subroutines.
2356 Return TRUE if some operands need to be changed, because of swapping
2357 commutative operands, reg_equiv_address substitution, or whatever. */
2360 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2362 int replace, ind_levels;
2364 short *reload_reg_p;
2366 register int insn_code_number;
2369 /* These start out as the constraints for the insn
2370 and they are chewed up as we consider alternatives. */
2371 char *constraints[MAX_RECOG_OPERANDS];
2372 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2374 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2375 char pref_or_nothing[MAX_RECOG_OPERANDS];
2376 /* Nonzero for a MEM operand whose entire address needs a reload. */
2377 int address_reloaded[MAX_RECOG_OPERANDS];
2378 /* Value of enum reload_type to use for operand. */
2379 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2380 /* Value of enum reload_type to use within address of operand. */
2381 enum reload_type address_type[MAX_RECOG_OPERANDS];
2382 /* Save the usage of each operand. */
2383 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2384 int no_input_reloads = 0, no_output_reloads = 0;
2386 int this_alternative[MAX_RECOG_OPERANDS];
2387 char this_alternative_win[MAX_RECOG_OPERANDS];
2388 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2389 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2390 int this_alternative_matches[MAX_RECOG_OPERANDS];
2392 int goal_alternative[MAX_RECOG_OPERANDS];
2393 int this_alternative_number;
2394 int goal_alternative_number = 0;
2395 int operand_reloadnum[MAX_RECOG_OPERANDS];
2396 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2397 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2398 char goal_alternative_win[MAX_RECOG_OPERANDS];
2399 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2400 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2401 int goal_alternative_swapped;
2404 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2405 rtx substed_operand[MAX_RECOG_OPERANDS];
2406 rtx body = PATTERN (insn);
2407 rtx set = single_set (insn);
2408 int goal_earlyclobber = 0, this_earlyclobber;
2409 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2415 n_earlyclobbers = 0;
2416 replace_reloads = replace;
2417 hard_regs_live_known = live_known;
2418 static_reload_reg_p = reload_reg_p;
2420 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2421 neither are insns that SET cc0. Insns that use CC0 are not allowed
2422 to have any input reloads. */
2423 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2424 no_output_reloads = 1;
2427 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2428 no_input_reloads = 1;
2429 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2430 no_output_reloads = 1;
2433 #ifdef SECONDARY_MEMORY_NEEDED
2434 /* The eliminated forms of any secondary memory locations are per-insn, so
2435 clear them out here. */
2437 bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2440 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2441 is cheap to move between them. If it is not, there may not be an insn
2442 to do the copy, so we may need a reload. */
2443 if (GET_CODE (body) == SET
2444 && GET_CODE (SET_DEST (body)) == REG
2445 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2446 && GET_CODE (SET_SRC (body)) == REG
2447 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2448 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2449 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2452 extract_insn (insn);
2454 noperands = reload_n_operands = recog_data.n_operands;
2455 n_alternatives = recog_data.n_alternatives;
2457 /* Just return "no reloads" if insn has no operands with constraints. */
2458 if (noperands == 0 || n_alternatives == 0)
2461 insn_code_number = INSN_CODE (insn);
2462 this_insn_is_asm = insn_code_number < 0;
2464 memcpy (operand_mode, recog_data.operand_mode,
2465 noperands * sizeof (enum machine_mode));
2466 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2470 /* If we will need to know, later, whether some pair of operands
2471 are the same, we must compare them now and save the result.
2472 Reloading the base and index registers will clobber them
2473 and afterward they will fail to match. */
2475 for (i = 0; i < noperands; i++)
2480 substed_operand[i] = recog_data.operand[i];
2483 modified[i] = RELOAD_READ;
2485 /* Scan this operand's constraint to see if it is an output operand,
2486 an in-out operand, is commutative, or should match another. */
2491 modified[i] = RELOAD_WRITE;
2493 modified[i] = RELOAD_READ_WRITE;
2496 /* The last operand should not be marked commutative. */
2497 if (i == noperands - 1)
2502 else if (c >= '0' && c <= '9')
2505 operands_match[c][i]
2506 = operands_match_p (recog_data.operand[c],
2507 recog_data.operand[i]);
2509 /* An operand may not match itself. */
2513 /* If C can be commuted with C+1, and C might need to match I,
2514 then C+1 might also need to match I. */
2515 if (commutative >= 0)
2517 if (c == commutative || c == commutative + 1)
2519 int other = c + (c == commutative ? 1 : -1);
2520 operands_match[other][i]
2521 = operands_match_p (recog_data.operand[other],
2522 recog_data.operand[i]);
2524 if (i == commutative || i == commutative + 1)
2526 int other = i + (i == commutative ? 1 : -1);
2527 operands_match[c][other]
2528 = operands_match_p (recog_data.operand[c],
2529 recog_data.operand[other]);
2531 /* Note that C is supposed to be less than I.
2532 No need to consider altering both C and I because in
2533 that case we would alter one into the other. */
2539 /* Examine each operand that is a memory reference or memory address
2540 and reload parts of the addresses into index registers.
2541 Also here any references to pseudo regs that didn't get hard regs
2542 but are equivalent to constants get replaced in the insn itself
2543 with those constants. Nobody will ever see them again.
2545 Finally, set up the preferred classes of each operand. */
2547 for (i = 0; i < noperands; i++)
2549 register RTX_CODE code = GET_CODE (recog_data.operand[i]);
2551 address_reloaded[i] = 0;
2552 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2553 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2556 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2557 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2560 if (*constraints[i] == 0)
2561 /* Ignore things like match_operator operands. */
2563 else if (constraints[i][0] == 'p')
2565 find_reloads_address (VOIDmode, NULL_PTR,
2566 recog_data.operand[i],
2567 recog_data.operand_loc[i],
2568 i, operand_type[i], ind_levels, insn);
2570 /* If we now have a simple operand where we used to have a
2571 PLUS or MULT, re-recognize and try again. */
2572 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
2573 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2574 && (GET_CODE (recog_data.operand[i]) == MULT
2575 || GET_CODE (recog_data.operand[i]) == PLUS))
2577 INSN_CODE (insn) = -1;
2578 retval = find_reloads (insn, replace, ind_levels, live_known,
2583 recog_data.operand[i] = *recog_data.operand_loc[i];
2584 substed_operand[i] = recog_data.operand[i];
2586 else if (code == MEM)
2589 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2590 recog_data.operand_loc[i],
2591 XEXP (recog_data.operand[i], 0),
2592 &XEXP (recog_data.operand[i], 0),
2593 i, address_type[i], ind_levels, insn);
2594 recog_data.operand[i] = *recog_data.operand_loc[i];
2595 substed_operand[i] = recog_data.operand[i];
2597 else if (code == SUBREG)
2599 rtx reg = SUBREG_REG (recog_data.operand[i]);
2601 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2604 && &SET_DEST (set) == recog_data.operand_loc[i],
2606 &address_reloaded[i]);
2608 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2609 that didn't get a hard register, emit a USE with a REG_EQUAL
2610 note in front so that we might inherit a previous, possibly
2614 && GET_CODE (op) == MEM
2615 && GET_CODE (reg) == REG
2616 && (GET_MODE_SIZE (GET_MODE (reg))
2617 >= GET_MODE_SIZE (GET_MODE (op))))
2618 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode, reg), insn))
2619 = gen_rtx_EXPR_LIST (REG_EQUAL,
2620 reg_equiv_memory_loc[REGNO (reg)], NULL_RTX);
2622 substed_operand[i] = recog_data.operand[i] = op;
2624 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2625 /* We can get a PLUS as an "operand" as a result of register
2626 elimination. See eliminate_regs and gen_reload. We handle
2627 a unary operator by reloading the operand. */
2628 substed_operand[i] = recog_data.operand[i]
2629 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2630 ind_levels, 0, insn,
2631 &address_reloaded[i]);
2632 else if (code == REG)
2634 /* This is equivalent to calling find_reloads_toplev.
2635 The code is duplicated for speed.
2636 When we find a pseudo always equivalent to a constant,
2637 we replace it by the constant. We must be sure, however,
2638 that we don't try to replace it in the insn in which it
2640 register int regno = REGNO (recog_data.operand[i]);
2641 if (reg_equiv_constant[regno] != 0
2642 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2644 /* Record the existing mode so that the check if constants are
2645 allowed will work when operand_mode isn't specified. */
2647 if (operand_mode[i] == VOIDmode)
2648 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2650 substed_operand[i] = recog_data.operand[i]
2651 = reg_equiv_constant[regno];
2653 if (reg_equiv_memory_loc[regno] != 0
2654 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2655 /* We need not give a valid is_set_dest argument since the case
2656 of a constant equivalence was checked above. */
2657 substed_operand[i] = recog_data.operand[i]
2658 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2659 ind_levels, 0, insn,
2660 &address_reloaded[i]);
2662 /* If the operand is still a register (we didn't replace it with an
2663 equivalent), get the preferred class to reload it into. */
2664 code = GET_CODE (recog_data.operand[i]);
2666 = ((code == REG && REGNO (recog_data.operand[i])
2667 >= FIRST_PSEUDO_REGISTER)
2668 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2672 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2673 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2676 /* If this is simply a copy from operand 1 to operand 0, merge the
2677 preferred classes for the operands. */
2678 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2679 && recog_data.operand[1] == SET_SRC (set))
2681 preferred_class[0] = preferred_class[1]
2682 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2683 pref_or_nothing[0] |= pref_or_nothing[1];
2684 pref_or_nothing[1] |= pref_or_nothing[0];
2687 /* Now see what we need for pseudo-regs that didn't get hard regs
2688 or got the wrong kind of hard reg. For this, we must consider
2689 all the operands together against the register constraints. */
2691 best = MAX_RECOG_OPERANDS * 2 + 600;
2694 goal_alternative_swapped = 0;
2697 /* The constraints are made of several alternatives.
2698 Each operand's constraint looks like foo,bar,... with commas
2699 separating the alternatives. The first alternatives for all
2700 operands go together, the second alternatives go together, etc.
2702 First loop over alternatives. */
2704 for (this_alternative_number = 0;
2705 this_alternative_number < n_alternatives;
2706 this_alternative_number++)
2708 /* Loop over operands for one constraint alternative. */
2709 /* LOSERS counts those that don't fit this alternative
2710 and would require loading. */
2712 /* BAD is set to 1 if it some operand can't fit this alternative
2713 even after reloading. */
2715 /* REJECT is a count of how undesirable this alternative says it is
2716 if any reloading is required. If the alternative matches exactly
2717 then REJECT is ignored, but otherwise it gets this much
2718 counted against it in addition to the reloading needed. Each
2719 ? counts three times here since we want the disparaging caused by
2720 a bad register class to only count 1/3 as much. */
2723 this_earlyclobber = 0;
2725 for (i = 0; i < noperands; i++)
2727 register char *p = constraints[i];
2728 register int win = 0;
2729 /* 0 => this operand can be reloaded somehow for this alternative */
2731 /* 0 => this operand can be reloaded if the alternative allows regs. */
2734 register rtx operand = recog_data.operand[i];
2736 /* Nonzero means this is a MEM that must be reloaded into a reg
2737 regardless of what the constraint says. */
2738 int force_reload = 0;
2740 /* Nonzero if a constant forced into memory would be OK for this
2743 int earlyclobber = 0;
2745 /* If the predicate accepts a unary operator, it means that
2746 we need to reload the operand, but do not do this for
2747 match_operator and friends. */
2748 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2749 operand = XEXP (operand, 0);
2751 /* If the operand is a SUBREG, extract
2752 the REG or MEM (or maybe even a constant) within.
2753 (Constants can occur as a result of reg_equiv_constant.) */
2755 while (GET_CODE (operand) == SUBREG)
2757 offset += SUBREG_WORD (operand);
2758 operand = SUBREG_REG (operand);
2759 /* Force reload if this is a constant or PLUS or if there may
2760 be a problem accessing OPERAND in the outer mode. */
2761 if (CONSTANT_P (operand)
2762 || GET_CODE (operand) == PLUS
2763 /* We must force a reload of paradoxical SUBREGs
2764 of a MEM because the alignment of the inner value
2765 may not be enough to do the outer reference. On
2766 big-endian machines, it may also reference outside
2769 On machines that extend byte operations and we have a
2770 SUBREG where both the inner and outer modes are no wider
2771 than a word and the inner mode is narrower, is integral,
2772 and gets extended when loaded from memory, combine.c has
2773 made assumptions about the behavior of the machine in such
2774 register access. If the data is, in fact, in memory we
2775 must always load using the size assumed to be in the
2776 register and let the insn do the different-sized
2779 This is doubly true if WORD_REGISTER_OPERATIONS. In
2780 this case eliminate_regs has left non-paradoxical
2781 subregs for push_reloads to see. Make sure it does
2782 by forcing the reload.
2784 ??? When is it right at this stage to have a subreg
2785 of a mem that is _not_ to be handled specialy? IMO
2786 those should have been reduced to just a mem. */
2787 || ((GET_CODE (operand) == MEM
2788 || (GET_CODE (operand)== REG
2789 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2790 #ifndef WORD_REGISTER_OPERATIONS
2791 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2792 < BIGGEST_ALIGNMENT)
2793 && (GET_MODE_SIZE (operand_mode[i])
2794 > GET_MODE_SIZE (GET_MODE (operand))))
2795 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2796 #ifdef LOAD_EXTEND_OP
2797 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2798 && (GET_MODE_SIZE (GET_MODE (operand))
2800 && (GET_MODE_SIZE (operand_mode[i])
2801 > GET_MODE_SIZE (GET_MODE (operand)))
2802 && INTEGRAL_MODE_P (GET_MODE (operand))
2803 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2808 /* Subreg of a hard reg which can't handle the subreg's mode
2809 or which would handle that mode in the wrong number of
2810 registers for subregging to work. */
2811 || (GET_CODE (operand) == REG
2812 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2813 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2814 && (GET_MODE_SIZE (GET_MODE (operand))
2816 && ((GET_MODE_SIZE (GET_MODE (operand))
2818 != HARD_REGNO_NREGS (REGNO (operand),
2819 GET_MODE (operand))))
2820 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2825 this_alternative[i] = (int) NO_REGS;
2826 this_alternative_win[i] = 0;
2827 this_alternative_offmemok[i] = 0;
2828 this_alternative_earlyclobber[i] = 0;
2829 this_alternative_matches[i] = -1;
2831 /* An empty constraint or empty alternative
2832 allows anything which matched the pattern. */
2833 if (*p == 0 || *p == ',')
2836 /* Scan this alternative's specs for this operand;
2837 set WIN if the operand fits any letter in this alternative.
2838 Otherwise, clear BADOP if this operand could
2839 fit some letter after reloads,
2840 or set WINREG if this operand could fit after reloads
2841 provided the constraint allows some registers. */
2843 while (*p && (c = *p++) != ',')
2846 case '=': case '+': case '*':
2850 /* The last operand should not be marked commutative. */
2851 if (i != noperands - 1)
2864 /* Ignore rest of this alternative as far as
2865 reloading is concerned. */
2866 while (*p && *p != ',') p++;
2869 case '0': case '1': case '2': case '3': case '4':
2870 case '5': case '6': case '7': case '8': case '9':
2873 this_alternative_matches[i] = c;
2874 /* We are supposed to match a previous operand.
2875 If we do, we win if that one did.
2876 If we do not, count both of the operands as losers.
2877 (This is too conservative, since most of the time
2878 only a single reload insn will be needed to make
2879 the two operands win. As a result, this alternative
2880 may be rejected when it is actually desirable.) */
2881 if ((swapped && (c != commutative || i != commutative + 1))
2882 /* If we are matching as if two operands were swapped,
2883 also pretend that operands_match had been computed
2885 But if I is the second of those and C is the first,
2886 don't exchange them, because operands_match is valid
2887 only on one side of its diagonal. */
2889 [(c == commutative || c == commutative + 1)
2890 ? 2*commutative + 1 - c : c]
2891 [(i == commutative || i == commutative + 1)
2892 ? 2*commutative + 1 - i : i])
2893 : operands_match[c][i])
2895 /* If we are matching a non-offsettable address where an
2896 offsettable address was expected, then we must reject
2897 this combination, because we can't reload it. */
2898 if (this_alternative_offmemok[c]
2899 && GET_CODE (recog_data.operand[c]) == MEM
2900 && this_alternative[c] == (int) NO_REGS
2901 && ! this_alternative_win[c])
2904 win = this_alternative_win[c];
2908 /* Operands don't match. */
2910 /* Retroactively mark the operand we had to match
2911 as a loser, if it wasn't already. */
2912 if (this_alternative_win[c])
2914 this_alternative_win[c] = 0;
2915 if (this_alternative[c] == (int) NO_REGS)
2917 /* But count the pair only once in the total badness of
2918 this alternative, if the pair can be a dummy reload. */
2920 = find_dummy_reload (recog_data.operand[i],
2921 recog_data.operand[c],
2922 recog_data.operand_loc[i],
2923 recog_data.operand_loc[c],
2924 operand_mode[i], operand_mode[c],
2925 this_alternative[c], -1,
2926 this_alternative_earlyclobber[c]);
2931 /* This can be fixed with reloads if the operand
2932 we are supposed to match can be fixed with reloads. */
2934 this_alternative[i] = this_alternative[c];
2936 /* If we have to reload this operand and some previous
2937 operand also had to match the same thing as this
2938 operand, we don't know how to do that. So reject this
2940 if (! win || force_reload)
2941 for (j = 0; j < i; j++)
2942 if (this_alternative_matches[j]
2943 == this_alternative_matches[i])
2949 /* All necessary reloads for an address_operand
2950 were handled in find_reloads_address. */
2951 this_alternative[i] = (int) BASE_REG_CLASS;
2958 if (GET_CODE (operand) == MEM
2959 || (GET_CODE (operand) == REG
2960 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2961 && reg_renumber[REGNO (operand)] < 0))
2963 if (CONSTANT_P (operand)
2964 /* force_const_mem does not accept HIGH. */
2965 && GET_CODE (operand) != HIGH)
2971 if (GET_CODE (operand) == MEM
2972 && ! address_reloaded[i]
2973 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2974 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2979 if (GET_CODE (operand) == MEM
2980 && ! address_reloaded[i]
2981 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2982 || GET_CODE (XEXP (operand, 0)) == POST_INC))
2986 /* Memory operand whose address is not offsettable. */
2990 if (GET_CODE (operand) == MEM
2991 && ! (ind_levels ? offsettable_memref_p (operand)
2992 : offsettable_nonstrict_memref_p (operand))
2993 /* Certain mem addresses will become offsettable
2994 after they themselves are reloaded. This is important;
2995 we don't want our own handling of unoffsettables
2996 to override the handling of reg_equiv_address. */
2997 && !(GET_CODE (XEXP (operand, 0)) == REG
2999 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3003 /* Memory operand whose address is offsettable. */
3007 if ((GET_CODE (operand) == MEM
3008 /* If IND_LEVELS, find_reloads_address won't reload a
3009 pseudo that didn't get a hard reg, so we have to
3010 reject that case. */
3011 && ((ind_levels ? offsettable_memref_p (operand)
3012 : offsettable_nonstrict_memref_p (operand))
3013 /* A reloaded address is offsettable because it is now
3014 just a simple register indirect. */
3015 || address_reloaded[i]))
3016 || (GET_CODE (operand) == REG
3017 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3018 && reg_renumber[REGNO (operand)] < 0
3019 /* If reg_equiv_address is nonzero, we will be
3020 loading it into a register; hence it will be
3021 offsettable, but we cannot say that reg_equiv_mem
3022 is offsettable without checking. */
3023 && ((reg_equiv_mem[REGNO (operand)] != 0
3024 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3025 || (reg_equiv_address[REGNO (operand)] != 0))))
3027 /* force_const_mem does not accept HIGH. */
3028 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3029 || GET_CODE (operand) == MEM)
3036 /* Output operand that is stored before the need for the
3037 input operands (and their index registers) is over. */
3038 earlyclobber = 1, this_earlyclobber = 1;
3042 #ifndef REAL_ARITHMETIC
3043 /* Match any floating double constant, but only if
3044 we can examine the bits of it reliably. */
3045 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
3046 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
3047 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
3050 if (GET_CODE (operand) == CONST_DOUBLE)
3055 if (GET_CODE (operand) == CONST_DOUBLE)
3061 if (GET_CODE (operand) == CONST_DOUBLE
3062 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
3067 if (GET_CODE (operand) == CONST_INT
3068 || (GET_CODE (operand) == CONST_DOUBLE
3069 && GET_MODE (operand) == VOIDmode))
3072 if (CONSTANT_P (operand)
3073 #ifdef LEGITIMATE_PIC_OPERAND_P
3074 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3081 if (GET_CODE (operand) == CONST_INT
3082 || (GET_CODE (operand) == CONST_DOUBLE
3083 && GET_MODE (operand) == VOIDmode))
3095 if (GET_CODE (operand) == CONST_INT
3096 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
3106 /* A PLUS is never a valid operand, but reload can make
3107 it from a register when eliminating registers. */
3108 && GET_CODE (operand) != PLUS
3109 /* A SCRATCH is not a valid operand. */
3110 && GET_CODE (operand) != SCRATCH
3111 #ifdef LEGITIMATE_PIC_OPERAND_P
3112 && (! CONSTANT_P (operand)
3114 || LEGITIMATE_PIC_OPERAND_P (operand))
3116 && (GENERAL_REGS == ALL_REGS
3117 || GET_CODE (operand) != REG
3118 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3119 && reg_renumber[REGNO (operand)] < 0)))
3121 /* Drop through into 'r' case */
3125 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3128 #ifdef EXTRA_CONSTRAINT
3134 if (EXTRA_CONSTRAINT (operand, c))
3141 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3144 if (GET_MODE (operand) == BLKmode)
3147 if (GET_CODE (operand) == REG
3148 && reg_fits_class_p (operand, this_alternative[i],
3149 offset, GET_MODE (recog_data.operand[i])))
3156 /* If this operand could be handled with a reg,
3157 and some reg is allowed, then this operand can be handled. */
3158 if (winreg && this_alternative[i] != (int) NO_REGS)
3161 /* Record which operands fit this alternative. */
3162 this_alternative_earlyclobber[i] = earlyclobber;
3163 if (win && ! force_reload)
3164 this_alternative_win[i] = 1;
3167 int const_to_mem = 0;
3169 this_alternative_offmemok[i] = offmemok;
3173 /* Alternative loses if it has no regs for a reg operand. */
3174 if (GET_CODE (operand) == REG
3175 && this_alternative[i] == (int) NO_REGS
3176 && this_alternative_matches[i] < 0)
3179 /* If this is a constant that is reloaded into the desired
3180 class by copying it to memory first, count that as another
3181 reload. This is consistent with other code and is
3182 required to avoid choosing another alternative when
3183 the constant is moved into memory by this function on
3184 an early reload pass. Note that the test here is
3185 precisely the same as in the code below that calls
3187 if (CONSTANT_P (operand)
3188 /* force_const_mem does not accept HIGH. */
3189 && GET_CODE (operand) != HIGH
3190 && ((PREFERRED_RELOAD_CLASS (operand,
3191 (enum reg_class) this_alternative[i])
3193 || no_input_reloads)
3194 && operand_mode[i] != VOIDmode)
3197 if (this_alternative[i] != (int) NO_REGS)
3201 /* If we can't reload this value at all, reject this
3202 alternative. Note that we could also lose due to
3203 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3206 if (! CONSTANT_P (operand)
3207 && (enum reg_class) this_alternative[i] != NO_REGS
3208 && (PREFERRED_RELOAD_CLASS (operand,
3209 (enum reg_class) this_alternative[i])
3213 /* Alternative loses if it requires a type of reload not
3214 permitted for this insn. We can always reload SCRATCH
3215 and objects with a REG_UNUSED note. */
3216 else if (GET_CODE (operand) != SCRATCH
3217 && modified[i] != RELOAD_READ && no_output_reloads
3218 && ! find_reg_note (insn, REG_UNUSED, operand))
3220 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3225 /* We prefer to reload pseudos over reloading other things,
3226 since such reloads may be able to be eliminated later.
3227 If we are reloading a SCRATCH, we won't be generating any
3228 insns, just using a register, so it is also preferred.
3229 So bump REJECT in other cases. Don't do this in the
3230 case where we are forcing a constant into memory and
3231 it will then win since we don't want to have a different
3232 alternative match then. */
3233 if (! (GET_CODE (operand) == REG
3234 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3235 && GET_CODE (operand) != SCRATCH
3236 && ! (const_to_mem && constmemok))
3239 /* Input reloads can be inherited more often than output
3240 reloads can be removed, so penalize output reloads. */
3241 if (operand_type[i] != RELOAD_FOR_INPUT
3242 && GET_CODE (operand) != SCRATCH)
3246 /* If this operand is a pseudo register that didn't get a hard
3247 reg and this alternative accepts some register, see if the
3248 class that we want is a subset of the preferred class for this
3249 register. If not, but it intersects that class, use the
3250 preferred class instead. If it does not intersect the preferred
3251 class, show that usage of this alternative should be discouraged;
3252 it will be discouraged more still if the register is `preferred
3253 or nothing'. We do this because it increases the chance of
3254 reusing our spill register in a later insn and avoiding a pair
3255 of memory stores and loads.
3257 Don't bother with this if this alternative will accept this
3260 Don't do this for a multiword operand, since it is only a
3261 small win and has the risk of requiring more spill registers,
3262 which could cause a large loss.
3264 Don't do this if the preferred class has only one register
3265 because we might otherwise exhaust the class. */
3268 if (! win && this_alternative[i] != (int) NO_REGS
3269 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3270 && reg_class_size[(int) preferred_class[i]] > 1)
3272 if (! reg_class_subset_p (this_alternative[i],
3273 preferred_class[i]))
3275 /* Since we don't have a way of forming the intersection,
3276 we just do something special if the preferred class
3277 is a subset of the class we have; that's the most
3278 common case anyway. */
3279 if (reg_class_subset_p (preferred_class[i],
3280 this_alternative[i]))
3281 this_alternative[i] = (int) preferred_class[i];
3283 reject += (2 + 2 * pref_or_nothing[i]);
3288 /* Now see if any output operands that are marked "earlyclobber"
3289 in this alternative conflict with any input operands
3290 or any memory addresses. */
3292 for (i = 0; i < noperands; i++)
3293 if (this_alternative_earlyclobber[i]
3294 && this_alternative_win[i])
3296 struct decomposition early_data;
3298 early_data = decompose (recog_data.operand[i]);
3300 if (modified[i] == RELOAD_READ)
3303 if (this_alternative[i] == NO_REGS)
3305 this_alternative_earlyclobber[i] = 0;
3306 if (this_insn_is_asm)
3307 error_for_asm (this_insn,
3308 "`&' constraint used with no register class");
3313 for (j = 0; j < noperands; j++)
3314 /* Is this an input operand or a memory ref? */
3315 if ((GET_CODE (recog_data.operand[j]) == MEM
3316 || modified[j] != RELOAD_WRITE)
3318 /* Ignore things like match_operator operands. */
3319 && *recog_data.constraints[j] != 0
3320 /* Don't count an input operand that is constrained to match
3321 the early clobber operand. */
3322 && ! (this_alternative_matches[j] == i
3323 && rtx_equal_p (recog_data.operand[i],
3324 recog_data.operand[j]))
3325 /* Is it altered by storing the earlyclobber operand? */
3326 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3329 /* If the output is in a single-reg class,
3330 it's costly to reload it, so reload the input instead. */
3331 if (reg_class_size[this_alternative[i]] == 1
3332 && (GET_CODE (recog_data.operand[j]) == REG
3333 || GET_CODE (recog_data.operand[j]) == SUBREG))
3336 this_alternative_win[j] = 0;
3341 /* If an earlyclobber operand conflicts with something,
3342 it must be reloaded, so request this and count the cost. */
3346 this_alternative_win[i] = 0;
3347 for (j = 0; j < noperands; j++)
3348 if (this_alternative_matches[j] == i
3349 && this_alternative_win[j])
3351 this_alternative_win[j] = 0;
3357 /* If one alternative accepts all the operands, no reload required,
3358 choose that alternative; don't consider the remaining ones. */
3361 /* Unswap these so that they are never swapped at `finish'. */
3362 if (commutative >= 0)
3364 recog_data.operand[commutative] = substed_operand[commutative];
3365 recog_data.operand[commutative + 1]
3366 = substed_operand[commutative + 1];
3368 for (i = 0; i < noperands; i++)
3370 goal_alternative_win[i] = 1;
3371 goal_alternative[i] = this_alternative[i];
3372 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3373 goal_alternative_matches[i] = this_alternative_matches[i];
3374 goal_alternative_earlyclobber[i]
3375 = this_alternative_earlyclobber[i];
3377 goal_alternative_number = this_alternative_number;
3378 goal_alternative_swapped = swapped;
3379 goal_earlyclobber = this_earlyclobber;
3383 /* REJECT, set by the ! and ? constraint characters and when a register
3384 would be reloaded into a non-preferred class, discourages the use of
3385 this alternative for a reload goal. REJECT is incremented by six
3386 for each ? and two for each non-preferred class. */
3387 losers = losers * 6 + reject;
3389 /* If this alternative can be made to work by reloading,
3390 and it needs less reloading than the others checked so far,
3391 record it as the chosen goal for reloading. */
3392 if (! bad && best > losers)
3394 for (i = 0; i < noperands; i++)
3396 goal_alternative[i] = this_alternative[i];
3397 goal_alternative_win[i] = this_alternative_win[i];
3398 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3399 goal_alternative_matches[i] = this_alternative_matches[i];
3400 goal_alternative_earlyclobber[i]
3401 = this_alternative_earlyclobber[i];
3403 goal_alternative_swapped = swapped;
3405 goal_alternative_number = this_alternative_number;
3406 goal_earlyclobber = this_earlyclobber;
3410 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3411 then we need to try each alternative twice,
3412 the second time matching those two operands
3413 as if we had exchanged them.
3414 To do this, really exchange them in operands.
3416 If we have just tried the alternatives the second time,
3417 return operands to normal and drop through. */
3419 if (commutative >= 0)
3424 register enum reg_class tclass;
3427 recog_data.operand[commutative] = substed_operand[commutative + 1];
3428 recog_data.operand[commutative + 1] = substed_operand[commutative];
3430 tclass = preferred_class[commutative];
3431 preferred_class[commutative] = preferred_class[commutative + 1];
3432 preferred_class[commutative + 1] = tclass;
3434 t = pref_or_nothing[commutative];
3435 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3436 pref_or_nothing[commutative + 1] = t;
3438 memcpy (constraints, recog_data.constraints,
3439 noperands * sizeof (char *));
3444 recog_data.operand[commutative] = substed_operand[commutative];
3445 recog_data.operand[commutative + 1]
3446 = substed_operand[commutative + 1];
3450 /* The operands don't meet the constraints.
3451 goal_alternative describes the alternative
3452 that we could reach by reloading the fewest operands.
3453 Reload so as to fit it. */
3455 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3457 /* No alternative works with reloads?? */
3458 if (insn_code_number >= 0)
3459 fatal_insn ("Unable to generate reloads for:", insn);
3460 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3461 /* Avoid further trouble with this insn. */
3462 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3467 /* Jump to `finish' from above if all operands are valid already.
3468 In that case, goal_alternative_win is all 1. */
3471 /* Right now, for any pair of operands I and J that are required to match,
3473 goal_alternative_matches[J] is I.
3474 Set up goal_alternative_matched as the inverse function:
3475 goal_alternative_matched[I] = J. */
3477 for (i = 0; i < noperands; i++)
3478 goal_alternative_matched[i] = -1;
3480 for (i = 0; i < noperands; i++)
3481 if (! goal_alternative_win[i]
3482 && goal_alternative_matches[i] >= 0)
3483 goal_alternative_matched[goal_alternative_matches[i]] = i;
3485 /* If the best alternative is with operands 1 and 2 swapped,
3486 consider them swapped before reporting the reloads. Update the
3487 operand numbers of any reloads already pushed. */
3489 if (goal_alternative_swapped)
3493 tem = substed_operand[commutative];
3494 substed_operand[commutative] = substed_operand[commutative + 1];
3495 substed_operand[commutative + 1] = tem;
3496 tem = recog_data.operand[commutative];
3497 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3498 recog_data.operand[commutative + 1] = tem;
3499 tem = *recog_data.operand_loc[commutative];
3500 *recog_data.operand_loc[commutative]
3501 = *recog_data.operand_loc[commutative + 1];
3502 *recog_data.operand_loc[commutative+1] = tem;
3504 for (i = 0; i < n_reloads; i++)
3506 if (rld[i].opnum == commutative)
3507 rld[i].opnum = commutative + 1;
3508 else if (rld[i].opnum == commutative + 1)
3509 rld[i].opnum = commutative;
3513 for (i = 0; i < noperands; i++)
3515 operand_reloadnum[i] = -1;
3517 /* If this is an earlyclobber operand, we need to widen the scope.
3518 The reload must remain valid from the start of the insn being
3519 reloaded until after the operand is stored into its destination.
3520 We approximate this with RELOAD_OTHER even though we know that we
3521 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3523 One special case that is worth checking is when we have an
3524 output that is earlyclobber but isn't used past the insn (typically
3525 a SCRATCH). In this case, we only need have the reload live
3526 through the insn itself, but not for any of our input or output
3528 But we must not accidentally narrow the scope of an existing
3529 RELOAD_OTHER reload - leave these alone.
3531 In any case, anything needed to address this operand can remain
3532 however they were previously categorized. */
3534 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3536 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3537 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3540 /* Any constants that aren't allowed and can't be reloaded
3541 into registers are here changed into memory references. */
3542 for (i = 0; i < noperands; i++)
3543 if (! goal_alternative_win[i]
3544 && CONSTANT_P (recog_data.operand[i])
3545 /* force_const_mem does not accept HIGH. */
3546 && GET_CODE (recog_data.operand[i]) != HIGH
3547 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3548 (enum reg_class) goal_alternative[i])
3550 || no_input_reloads)
3551 && operand_mode[i] != VOIDmode)
3553 substed_operand[i] = recog_data.operand[i]
3554 = find_reloads_toplev (force_const_mem (operand_mode[i],
3555 recog_data.operand[i]),
3556 i, address_type[i], ind_levels, 0, insn,
3558 if (alternative_allows_memconst (recog_data.constraints[i],
3559 goal_alternative_number))
3560 goal_alternative_win[i] = 1;
3563 /* Record the values of the earlyclobber operands for the caller. */
3564 if (goal_earlyclobber)
3565 for (i = 0; i < noperands; i++)
3566 if (goal_alternative_earlyclobber[i])
3567 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3569 /* Now record reloads for all the operands that need them. */
3570 for (i = 0; i < noperands; i++)
3571 if (! goal_alternative_win[i])
3573 /* Operands that match previous ones have already been handled. */
3574 if (goal_alternative_matches[i] >= 0)
3576 /* Handle an operand with a nonoffsettable address
3577 appearing where an offsettable address will do
3578 by reloading the address into a base register.
3580 ??? We can also do this when the operand is a register and
3581 reg_equiv_mem is not offsettable, but this is a bit tricky,
3582 so we don't bother with it. It may not be worth doing. */
3583 else if (goal_alternative_matched[i] == -1
3584 && goal_alternative_offmemok[i]
3585 && GET_CODE (recog_data.operand[i]) == MEM)
3587 operand_reloadnum[i]
3588 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3589 &XEXP (recog_data.operand[i], 0), NULL_PTR,
3591 GET_MODE (XEXP (recog_data.operand[i], 0)),
3592 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3593 rld[operand_reloadnum[i]].inc
3594 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3596 /* If this operand is an output, we will have made any
3597 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3598 now we are treating part of the operand as an input, so
3599 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3601 if (modified[i] == RELOAD_WRITE)
3603 for (j = 0; j < n_reloads; j++)
3605 if (rld[j].opnum == i)
3607 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3608 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3609 else if (rld[j].when_needed
3610 == RELOAD_FOR_OUTADDR_ADDRESS)
3611 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3616 else if (goal_alternative_matched[i] == -1)
3618 operand_reloadnum[i]
3619 = push_reload ((modified[i] != RELOAD_WRITE
3620 ? recog_data.operand[i] : 0),
3621 (modified[i] != RELOAD_READ
3622 ? recog_data.operand[i] : 0),
3623 (modified[i] != RELOAD_WRITE
3624 ? recog_data.operand_loc[i] : 0),
3625 (modified[i] != RELOAD_READ
3626 ? recog_data.operand_loc[i] : 0),
3627 (enum reg_class) goal_alternative[i],
3628 (modified[i] == RELOAD_WRITE
3629 ? VOIDmode : operand_mode[i]),
3630 (modified[i] == RELOAD_READ
3631 ? VOIDmode : operand_mode[i]),
3632 (insn_code_number < 0 ? 0
3633 : insn_data[insn_code_number].operand[i].strict_low),
3634 0, i, operand_type[i]);
3636 /* In a matching pair of operands, one must be input only
3637 and the other must be output only.
3638 Pass the input operand as IN and the other as OUT. */
3639 else if (modified[i] == RELOAD_READ
3640 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3642 operand_reloadnum[i]
3643 = push_reload (recog_data.operand[i],
3644 recog_data.operand[goal_alternative_matched[i]],
3645 recog_data.operand_loc[i],
3646 recog_data.operand_loc[goal_alternative_matched[i]],
3647 (enum reg_class) goal_alternative[i],
3649 operand_mode[goal_alternative_matched[i]],
3650 0, 0, i, RELOAD_OTHER);
3651 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3653 else if (modified[i] == RELOAD_WRITE
3654 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3656 operand_reloadnum[goal_alternative_matched[i]]
3657 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3658 recog_data.operand[i],
3659 recog_data.operand_loc[goal_alternative_matched[i]],
3660 recog_data.operand_loc[i],
3661 (enum reg_class) goal_alternative[i],
3662 operand_mode[goal_alternative_matched[i]],
3664 0, 0, i, RELOAD_OTHER);
3665 operand_reloadnum[i] = output_reloadnum;
3667 else if (insn_code_number >= 0)
3671 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3672 /* Avoid further trouble with this insn. */
3673 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3678 else if (goal_alternative_matched[i] < 0
3679 && goal_alternative_matches[i] < 0
3682 /* For each non-matching operand that's a MEM or a pseudo-register
3683 that didn't get a hard register, make an optional reload.
3684 This may get done even if the insn needs no reloads otherwise. */
3686 rtx operand = recog_data.operand[i];
3688 while (GET_CODE (operand) == SUBREG)
3689 operand = XEXP (operand, 0);
3690 if ((GET_CODE (operand) == MEM
3691 || (GET_CODE (operand) == REG
3692 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3693 /* If this is only for an output, the optional reload would not
3694 actually cause us to use a register now, just note that
3695 something is stored here. */
3696 && ((enum reg_class) goal_alternative[i] != NO_REGS
3697 || modified[i] == RELOAD_WRITE)
3698 && ! no_input_reloads
3699 /* An optional output reload might allow to delete INSN later.
3700 We mustn't make in-out reloads on insns that are not permitted
3702 If this is an asm, we can't delete it; we must not even call
3703 push_reload for an optional output reload in this case,
3704 because we can't be sure that the constraint allows a register,
3705 and push_reload verifies the constraints for asms. */
3706 && (modified[i] == RELOAD_READ
3707 || (! no_output_reloads && ! this_insn_is_asm)))
3708 operand_reloadnum[i]
3709 = push_reload ((modified[i] != RELOAD_WRITE
3710 ? recog_data.operand[i] : 0),
3711 (modified[i] != RELOAD_READ
3712 ? recog_data.operand[i] : 0),
3713 (modified[i] != RELOAD_WRITE
3714 ? recog_data.operand_loc[i] : 0),
3715 (modified[i] != RELOAD_READ
3716 ? recog_data.operand_loc[i] : 0),
3717 (enum reg_class) goal_alternative[i],
3718 (modified[i] == RELOAD_WRITE
3719 ? VOIDmode : operand_mode[i]),
3720 (modified[i] == RELOAD_READ
3721 ? VOIDmode : operand_mode[i]),
3722 (insn_code_number < 0 ? 0
3723 : insn_data[insn_code_number].operand[i].strict_low),
3724 1, i, operand_type[i]);
3725 /* If a memory reference remains (either as a MEM or a pseudo that
3726 did not get a hard register), yet we can't make an optional
3727 reload, check if this is actually a pseudo register reference;
3728 we then need to emit a USE and/or a CLOBBER so that reload
3729 inheritance will do the right thing. */
3731 && (GET_CODE (operand) == MEM
3732 || (GET_CODE (operand) == REG
3733 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3734 && reg_renumber [REGNO (operand)] < 0)))
3736 operand = *recog_data.operand_loc[i];
3738 while (GET_CODE (operand) == SUBREG)
3739 operand = XEXP (operand, 0);
3740 if (GET_CODE (operand) == REG)
3742 if (modified[i] != RELOAD_WRITE)
3743 emit_insn_before (gen_rtx_USE (VOIDmode, operand), insn);
3744 if (modified[i] != RELOAD_READ)
3745 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3749 else if (goal_alternative_matches[i] >= 0
3750 && goal_alternative_win[goal_alternative_matches[i]]
3751 && modified[i] == RELOAD_READ
3752 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3753 && ! no_input_reloads && ! no_output_reloads
3756 /* Similarly, make an optional reload for a pair of matching
3757 objects that are in MEM or a pseudo that didn't get a hard reg. */
3759 rtx operand = recog_data.operand[i];
3761 while (GET_CODE (operand) == SUBREG)
3762 operand = XEXP (operand, 0);
3763 if ((GET_CODE (operand) == MEM
3764 || (GET_CODE (operand) == REG
3765 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3766 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3768 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3769 = push_reload (recog_data.operand[goal_alternative_matches[i]],
3770 recog_data.operand[i],
3771 recog_data.operand_loc[goal_alternative_matches[i]],
3772 recog_data.operand_loc[i],
3773 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3774 operand_mode[goal_alternative_matches[i]],
3776 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3779 /* Perform whatever substitutions on the operands we are supposed
3780 to make due to commutativity or replacement of registers
3781 with equivalent constants or memory slots. */
3783 for (i = 0; i < noperands; i++)
3785 /* We only do this on the last pass through reload, because it is
3786 possible for some data (like reg_equiv_address) to be changed during
3787 later passes. Moreover, we loose the opportunity to get a useful
3788 reload_{in,out}_reg when we do these replacements. */
3792 rtx substitution = substed_operand[i];
3794 *recog_data.operand_loc[i] = substitution;
3796 /* If we're replacing an operand with a LABEL_REF, we need
3797 to make sure that there's a REG_LABEL note attached to
3798 this instruction. */
3799 if (GET_CODE (insn) != JUMP_INSN
3800 && GET_CODE (substitution) == LABEL_REF
3801 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
3802 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL,
3803 XEXP (substitution, 0),
3807 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
3810 /* If this insn pattern contains any MATCH_DUP's, make sure that
3811 they will be substituted if the operands they match are substituted.
3812 Also do now any substitutions we already did on the operands.
3814 Don't do this if we aren't making replacements because we might be
3815 propagating things allocated by frame pointer elimination into places
3816 it doesn't expect. */
3818 if (insn_code_number >= 0 && replace)
3819 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
3821 int opno = recog_data.dup_num[i];
3822 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
3823 if (operand_reloadnum[opno] >= 0)
3824 push_replacement (recog_data.dup_loc[i], operand_reloadnum[opno],
3825 insn_data[insn_code_number].operand[opno].mode);
3829 /* This loses because reloading of prior insns can invalidate the equivalence
3830 (or at least find_equiv_reg isn't smart enough to find it any more),
3831 causing this insn to need more reload regs than it needed before.
3832 It may be too late to make the reload regs available.
3833 Now this optimization is done safely in choose_reload_regs. */
3835 /* For each reload of a reg into some other class of reg,
3836 search for an existing equivalent reg (same value now) in the right class.
3837 We can use it as long as we don't need to change its contents. */
3838 for (i = 0; i < n_reloads; i++)
3839 if (rld[i].reg_rtx == 0
3841 && GET_CODE (rld[i].in) == REG
3845 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
3846 static_reload_reg_p, 0, rld[i].inmode);
3847 /* Prevent generation of insn to load the value
3848 because the one we found already has the value. */
3850 rld[i].in = rld[i].reg_rtx;
3854 /* Perhaps an output reload can be combined with another
3855 to reduce needs by one. */
3856 if (!goal_earlyclobber)
3859 /* If we have a pair of reloads for parts of an address, they are reloading
3860 the same object, the operands themselves were not reloaded, and they
3861 are for two operands that are supposed to match, merge the reloads and
3862 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3864 for (i = 0; i < n_reloads; i++)
3868 for (j = i + 1; j < n_reloads; j++)
3869 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
3870 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
3871 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3872 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3873 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
3874 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
3875 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3876 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3877 && rtx_equal_p (rld[i].in, rld[j].in)
3878 && (operand_reloadnum[rld[i].opnum] < 0
3879 || rld[operand_reloadnum[rld[i].opnum]].optional)
3880 && (operand_reloadnum[rld[j].opnum] < 0
3881 || rld[operand_reloadnum[rld[j].opnum]].optional)
3882 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
3883 || (goal_alternative_matches[rld[j].opnum]
3886 for (k = 0; k < n_replacements; k++)
3887 if (replacements[k].what == j)
3888 replacements[k].what = i;
3890 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3891 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3892 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
3894 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
3899 /* Scan all the reloads and update their type.
3900 If a reload is for the address of an operand and we didn't reload
3901 that operand, change the type. Similarly, change the operand number
3902 of a reload when two operands match. If a reload is optional, treat it
3903 as though the operand isn't reloaded.
3905 ??? This latter case is somewhat odd because if we do the optional
3906 reload, it means the object is hanging around. Thus we need only
3907 do the address reload if the optional reload was NOT done.
3909 Change secondary reloads to be the address type of their operand, not
3912 If an operand's reload is now RELOAD_OTHER, change any
3913 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3914 RELOAD_FOR_OTHER_ADDRESS. */
3916 for (i = 0; i < n_reloads; i++)
3918 if (rld[i].secondary_p
3919 && rld[i].when_needed == operand_type[rld[i].opnum])
3920 rld[i].when_needed = address_type[rld[i].opnum];
3922 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
3923 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
3924 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3925 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3926 && (operand_reloadnum[rld[i].opnum] < 0
3927 || rld[operand_reloadnum[rld[i].opnum]].optional))
3929 /* If we have a secondary reload to go along with this reload,
3930 change its type to RELOAD_FOR_OPADDR_ADDR. */
3932 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
3933 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
3934 && rld[i].secondary_in_reload != -1)
3936 int secondary_in_reload = rld[i].secondary_in_reload;
3938 rld[secondary_in_reload].when_needed
3939 = RELOAD_FOR_OPADDR_ADDR;
3941 /* If there's a tertiary reload we have to change it also. */
3942 if (secondary_in_reload > 0
3943 && rld[secondary_in_reload].secondary_in_reload != -1)
3944 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
3945 = RELOAD_FOR_OPADDR_ADDR;
3948 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
3949 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3950 && rld[i].secondary_out_reload != -1)
3952 int secondary_out_reload = rld[i].secondary_out_reload;
3954 rld[secondary_out_reload].when_needed
3955 = RELOAD_FOR_OPADDR_ADDR;
3957 /* If there's a tertiary reload we have to change it also. */
3958 if (secondary_out_reload
3959 && rld[secondary_out_reload].secondary_out_reload != -1)
3960 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
3961 = RELOAD_FOR_OPADDR_ADDR;
3964 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3965 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3966 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
3968 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
3971 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
3972 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
3973 && operand_reloadnum[rld[i].opnum] >= 0
3974 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
3976 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
3978 if (goal_alternative_matches[rld[i].opnum] >= 0)
3979 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
3982 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
3983 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
3984 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
3986 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
3987 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
3988 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
3989 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
3990 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
3991 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
3992 This is complicated by the fact that a single operand can have more
3993 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
3994 choose_reload_regs without affecting code quality, and cases that
3995 actually fail are extremely rare, so it turns out to be better to fix
3996 the problem here by not generating cases that choose_reload_regs will
3998 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
3999 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4001 We can reduce the register pressure by exploiting that a
4002 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4003 does not conflict with any of them, if it is only used for the first of
4004 the RELOAD_FOR_X_ADDRESS reloads. */
4006 int first_op_addr_num = -2;
4007 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4008 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4010 /* We use last_op_addr_reload and the contents of the above arrays
4011 first as flags - -2 means no instance encountered, -1 means exactly
4012 one instance encountered.
4013 If more than one instance has been encountered, we store the reload
4014 number of the first reload of the kind in question; reload numbers
4015 are known to be non-negative. */
4016 for (i = 0; i < noperands; i++)
4017 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4018 for (i = n_reloads - 1; i >= 0; i--)
4020 switch (rld[i].when_needed)
4022 case RELOAD_FOR_OPERAND_ADDRESS:
4023 if (++first_op_addr_num >= 0)
4025 first_op_addr_num = i;
4029 case RELOAD_FOR_INPUT_ADDRESS:
4030 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4032 first_inpaddr_num[rld[i].opnum] = i;
4036 case RELOAD_FOR_OUTPUT_ADDRESS:
4037 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4039 first_outpaddr_num[rld[i].opnum] = i;
4050 for (i = 0; i < n_reloads; i++)
4053 enum reload_type type;
4055 switch (rld[i].when_needed)
4057 case RELOAD_FOR_OPADDR_ADDR:
4058 first_num = first_op_addr_num;
4059 type = RELOAD_FOR_OPERAND_ADDRESS;
4061 case RELOAD_FOR_INPADDR_ADDRESS:
4062 first_num = first_inpaddr_num[rld[i].opnum];
4063 type = RELOAD_FOR_INPUT_ADDRESS;
4065 case RELOAD_FOR_OUTADDR_ADDRESS:
4066 first_num = first_outpaddr_num[rld[i].opnum];
4067 type = RELOAD_FOR_OUTPUT_ADDRESS;
4074 else if (i > first_num)
4075 rld[i].when_needed = type;
4078 /* Check if the only TYPE reload that uses reload I is
4079 reload FIRST_NUM. */
4080 for (j = n_reloads - 1; j > first_num; j--)
4082 if (rld[j].when_needed == type
4083 && (rld[i].secondary_p
4084 ? rld[j].secondary_in_reload == i
4085 : reg_mentioned_p (rld[i].in, rld[j].in)))
4087 rld[i].when_needed = type;
4096 /* See if we have any reloads that are now allowed to be merged
4097 because we've changed when the reload is needed to
4098 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4099 check for the most common cases. */
4101 for (i = 0; i < n_reloads; i++)
4102 if (rld[i].in != 0 && rld[i].out == 0
4103 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4104 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4105 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4106 for (j = 0; j < n_reloads; j++)
4107 if (i != j && rld[j].in != 0 && rld[j].out == 0
4108 && rld[j].when_needed == rld[i].when_needed
4109 && MATCHES (rld[i].in, rld[j].in)
4110 && rld[i].class == rld[j].class
4111 && !rld[i].nocombine && !rld[j].nocombine
4112 && rld[i].reg_rtx == rld[j].reg_rtx)
4114 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4115 transfer_replacements (i, j);
4120 /* If we made any reloads for addresses, see if they violate a
4121 "no input reloads" requirement for this insn. But loads that we
4122 do after the insn (such as for output addresses) are fine. */
4123 if (no_input_reloads)
4124 for (i = 0; i < n_reloads; i++)
4126 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
4127 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS)
4131 /* Compute reload_mode and reload_nregs. */
4132 for (i = 0; i < n_reloads; i++)
4135 = (rld[i].inmode == VOIDmode
4136 || (GET_MODE_SIZE (rld[i].outmode)
4137 > GET_MODE_SIZE (rld[i].inmode)))
4138 ? rld[i].outmode : rld[i].inmode;
4140 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4146 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4147 accepts a memory operand with constant address. */
4150 alternative_allows_memconst (constraint, altnum)
4151 const char *constraint;
4155 /* Skip alternatives before the one requested. */
4158 while (*constraint++ != ',');
4161 /* Scan the requested alternative for 'm' or 'o'.
4162 If one of them is present, this alternative accepts memory constants. */
4163 while ((c = *constraint++) && c != ',' && c != '#')
4164 if (c == 'm' || c == 'o')
4169 /* Scan X for memory references and scan the addresses for reloading.
4170 Also checks for references to "constant" regs that we want to eliminate
4171 and replaces them with the values they stand for.
4172 We may alter X destructively if it contains a reference to such.
4173 If X is just a constant reg, we return the equivalent value
4176 IND_LEVELS says how many levels of indirect addressing this machine
4179 OPNUM and TYPE identify the purpose of the reload.
4181 IS_SET_DEST is true if X is the destination of a SET, which is not
4182 appropriate to be replaced by a constant.
4184 INSN, if nonzero, is the insn in which we do the reload. It is used
4185 to determine if we may generate output reloads, and where to put USEs
4186 for pseudos that we have to replace with stack slots.
4188 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4189 result of find_reloads_address. */
4192 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn,
4196 enum reload_type type;
4200 int *address_reloaded;
4202 register RTX_CODE code = GET_CODE (x);
4204 register const char *fmt = GET_RTX_FORMAT (code);
4210 /* This code is duplicated for speed in find_reloads. */
4211 register int regno = REGNO (x);
4212 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4213 x = reg_equiv_constant[regno];
4215 /* This creates (subreg (mem...)) which would cause an unnecessary
4216 reload of the mem. */
4217 else if (reg_equiv_mem[regno] != 0)
4218 x = reg_equiv_mem[regno];
4220 else if (reg_equiv_memory_loc[regno]
4221 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4223 rtx mem = make_memloc (x, regno);
4224 if (reg_equiv_address[regno]
4225 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4227 /* If this is not a toplevel operand, find_reloads doesn't see
4228 this substitution. We have to emit a USE of the pseudo so
4229 that delete_output_reload can see it. */
4230 if (replace_reloads && recog_data.operand[opnum] != x)
4231 emit_insn_before (gen_rtx_USE (VOIDmode, x), insn);
4233 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4234 opnum, type, ind_levels, insn);
4235 if (address_reloaded)
4236 *address_reloaded = i;
4245 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4246 opnum, type, ind_levels, insn);
4247 if (address_reloaded)
4248 *address_reloaded = i;
4253 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4255 /* Check for SUBREG containing a REG that's equivalent to a constant.
4256 If the constant has a known value, truncate it right now.
4257 Similarly if we are extracting a single-word of a multi-word
4258 constant. If the constant is symbolic, allow it to be substituted
4259 normally. push_reload will strip the subreg later. If the
4260 constant is VOIDmode, abort because we will lose the mode of
4261 the register (this should never happen because one of the cases
4262 above should handle it). */
4264 register int regno = REGNO (SUBREG_REG (x));
4267 if (subreg_lowpart_p (x)
4268 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4269 && reg_equiv_constant[regno] != 0
4270 && (tem = gen_lowpart_common (GET_MODE (x),
4271 reg_equiv_constant[regno])) != 0)
4274 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
4275 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4276 && reg_equiv_constant[regno] != 0
4277 && (tem = operand_subword (reg_equiv_constant[regno],
4279 GET_MODE (SUBREG_REG (x)))) != 0)
4281 /* TEM is now a word sized constant for the bits from X that
4282 we wanted. However, TEM may be the wrong representation.
4284 Use gen_lowpart_common to convert a CONST_INT into a
4285 CONST_DOUBLE and vice versa as needed according to by the mode
4287 tem = gen_lowpart_common (GET_MODE (x), tem);
4293 /* If the SUBREG is wider than a word, the above test will fail.
4294 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4295 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4296 a 32 bit target. We still can - and have to - handle this
4297 for non-paradoxical subregs of CONST_INTs. */
4298 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4299 && reg_equiv_constant[regno] != 0
4300 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT
4301 && (GET_MODE_SIZE (GET_MODE (x))
4302 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
4304 int shift = SUBREG_WORD (x) * BITS_PER_WORD;
4305 if (WORDS_BIG_ENDIAN)
4306 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
4307 - GET_MODE_BITSIZE (GET_MODE (x))
4309 /* Here we use the knowledge that CONST_INTs have a
4310 HOST_WIDE_INT field. */
4311 if (shift >= HOST_BITS_PER_WIDE_INT)
4312 shift = HOST_BITS_PER_WIDE_INT - 1;
4313 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift);
4316 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4317 && reg_equiv_constant[regno] != 0
4318 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
4321 /* If the subreg contains a reg that will be converted to a mem,
4322 convert the subreg to a narrower memref now.
4323 Otherwise, we would get (subreg (mem ...) ...),
4324 which would force reload of the mem.
4326 We also need to do this if there is an equivalent MEM that is
4327 not offsettable. In that case, alter_subreg would produce an
4328 invalid address on big-endian machines.
4330 For machines that extend byte loads, we must not reload using
4331 a wider mode if we have a paradoxical SUBREG. find_reloads will
4332 force a reload in that case. So we should not do anything here. */
4334 else if (regno >= FIRST_PSEUDO_REGISTER
4335 #ifdef LOAD_EXTEND_OP
4336 && (GET_MODE_SIZE (GET_MODE (x))
4337 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4339 && (reg_equiv_address[regno] != 0
4340 || (reg_equiv_mem[regno] != 0
4341 && (! strict_memory_address_p (GET_MODE (x),
4342 XEXP (reg_equiv_mem[regno], 0))
4343 || ! offsettable_memref_p (reg_equiv_mem[regno])
4344 || num_not_at_initial_offset))))
4345 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4348 else if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == MEM
4349 && (GET_MODE_SIZE (GET_MODE (x))
4350 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4351 && mode_dependent_address_p (XEXP (SUBREG_REG (x), 0)))
4353 /* A paradoxical subreg will simply have the mode of the access
4354 changed, so we need to reload such a memory operand to stabilize
4355 the meaning of the memory access. */
4356 enum machine_mode subreg_mode = GET_MODE (SUBREG_REG (x));
4359 push_reload (NULL_RTX, SUBREG_REG (x), NULL_PTR, &SUBREG_REG (x),
4360 find_valid_class (subreg_mode, SUBREG_WORD (x)),
4361 VOIDmode, subreg_mode, 0, 0, opnum, type);
4363 push_reload (SUBREG_REG (x), NULL_RTX, &SUBREG_REG (x), NULL_PTR,
4364 find_valid_class (subreg_mode, SUBREG_WORD (x)),
4365 subreg_mode, VOIDmode, 0, 0, opnum, type);
4368 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4372 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4373 ind_levels, is_set_dest, insn,
4375 /* If we have replaced a reg with it's equivalent memory loc -
4376 that can still be handled here e.g. if it's in a paradoxical
4377 subreg - we must make the change in a copy, rather than using
4378 a destructive change. This way, find_reloads can still elect
4379 not to do the change. */
4380 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4382 x = shallow_copy_rtx (x);
4385 XEXP (x, i) = new_part;
4391 /* Return a mem ref for the memory equivalent of reg REGNO.
4392 This mem ref is not shared with anything. */
4395 make_memloc (ad, regno)
4399 /* We must rerun eliminate_regs, in case the elimination
4400 offsets have changed. */
4402 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4404 /* If TEM might contain a pseudo, we must copy it to avoid
4405 modifying it when we do the substitution for the reload. */
4406 if (rtx_varies_p (tem))
4407 tem = copy_rtx (tem);
4409 tem = gen_rtx_MEM (GET_MODE (ad), tem);
4410 MEM_COPY_ATTRIBUTES (tem, reg_equiv_memory_loc[regno]);
4414 /* Record all reloads needed for handling memory address AD
4415 which appears in *LOC in a memory reference to mode MODE
4416 which itself is found in location *MEMREFLOC.
4417 Note that we take shortcuts assuming that no multi-reg machine mode
4418 occurs as part of an address.
4420 OPNUM and TYPE specify the purpose of this reload.
4422 IND_LEVELS says how many levels of indirect addressing this machine
4425 INSN, if nonzero, is the insn in which we do the reload. It is used
4426 to determine if we may generate output reloads, and where to put USEs
4427 for pseudos that we have to replace with stack slots.
4429 Value is nonzero if this address is reloaded or replaced as a whole.
4430 This is interesting to the caller if the address is an autoincrement.
4432 Note that there is no verification that the address will be valid after
4433 this routine does its work. Instead, we rely on the fact that the address
4434 was valid when reload started. So we need only undo things that reload
4435 could have broken. These are wrong register types, pseudos not allocated
4436 to a hard register, and frame pointer elimination. */
4439 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn)
4440 enum machine_mode mode;
4445 enum reload_type type;
4450 int removed_and = 0;
4453 /* If the address is a register, see if it is a legitimate address and
4454 reload if not. We first handle the cases where we need not reload
4455 or where we must reload in a non-standard way. */
4457 if (GET_CODE (ad) == REG)
4461 if (reg_equiv_constant[regno] != 0
4462 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
4464 *loc = ad = reg_equiv_constant[regno];
4468 tem = reg_equiv_memory_loc[regno];
4471 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4473 tem = make_memloc (ad, regno);
4474 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4476 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
4477 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
4480 /* We can avoid a reload if the register's equivalent memory
4481 expression is valid as an indirect memory address.
4482 But not all addresses are valid in a mem used as an indirect
4483 address: only reg or reg+constant. */
4486 && strict_memory_address_p (mode, tem)
4487 && (GET_CODE (XEXP (tem, 0)) == REG
4488 || (GET_CODE (XEXP (tem, 0)) == PLUS
4489 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4490 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4492 /* TEM is not the same as what we'll be replacing the
4493 pseudo with after reload, put a USE in front of INSN
4494 in the final reload pass. */
4496 && num_not_at_initial_offset
4497 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4500 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
4501 /* This doesn't really count as replacing the address
4502 as a whole, since it is still a memory access. */
4510 /* The only remaining case where we can avoid a reload is if this is a
4511 hard register that is valid as a base register and which is not the
4512 subject of a CLOBBER in this insn. */
4514 else if (regno < FIRST_PSEUDO_REGISTER
4515 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4516 && ! regno_clobbered_p (regno, this_insn))
4519 /* If we do not have one of the cases above, we must do the reload. */
4520 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
4521 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4525 if (strict_memory_address_p (mode, ad))
4527 /* The address appears valid, so reloads are not needed.
4528 But the address may contain an eliminable register.
4529 This can happen because a machine with indirect addressing
4530 may consider a pseudo register by itself a valid address even when
4531 it has failed to get a hard reg.
4532 So do a tree-walk to find and eliminate all such regs. */
4534 /* But first quickly dispose of a common case. */
4535 if (GET_CODE (ad) == PLUS
4536 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4537 && GET_CODE (XEXP (ad, 0)) == REG
4538 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4541 subst_reg_equivs_changed = 0;
4542 *loc = subst_reg_equivs (ad, insn);
4544 if (! subst_reg_equivs_changed)
4547 /* Check result for validity after substitution. */
4548 if (strict_memory_address_p (mode, ad))
4552 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4557 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4562 *memrefloc = copy_rtx (*memrefloc);
4563 XEXP (*memrefloc, 0) = ad;
4564 move_replacements (&ad, &XEXP (*memrefloc, 0));
4570 /* The address is not valid. We have to figure out why. First see if
4571 we have an outer AND and remove it if so. Then analyze what's inside. */
4573 if (GET_CODE (ad) == AND)
4576 loc = &XEXP (ad, 0);
4580 /* One possibility for why the address is invalid is that it is itself
4581 a MEM. This can happen when the frame pointer is being eliminated, a
4582 pseudo is not allocated to a hard register, and the offset between the
4583 frame and stack pointers is not its initial value. In that case the
4584 pseudo will have been replaced by a MEM referring to the
4586 if (GET_CODE (ad) == MEM)
4588 /* First ensure that the address in this MEM is valid. Then, unless
4589 indirect addresses are valid, reload the MEM into a register. */
4591 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4592 opnum, ADDR_TYPE (type),
4593 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4595 /* If tem was changed, then we must create a new memory reference to
4596 hold it and store it back into memrefloc. */
4597 if (tem != ad && memrefloc)
4599 *memrefloc = copy_rtx (*memrefloc);
4600 copy_replacements (tem, XEXP (*memrefloc, 0));
4601 loc = &XEXP (*memrefloc, 0);
4603 loc = &XEXP (*loc, 0);
4606 /* Check similar cases as for indirect addresses as above except
4607 that we can allow pseudos and a MEM since they should have been
4608 taken care of above. */
4611 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4612 || GET_CODE (XEXP (tem, 0)) == MEM
4613 || ! (GET_CODE (XEXP (tem, 0)) == REG
4614 || (GET_CODE (XEXP (tem, 0)) == PLUS
4615 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4616 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4618 /* Must use TEM here, not AD, since it is the one that will
4619 have any subexpressions reloaded, if needed. */
4620 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4621 BASE_REG_CLASS, GET_MODE (tem),
4624 return ! removed_and;
4630 /* If we have address of a stack slot but it's not valid because the
4631 displacement is too large, compute the sum in a register.
4632 Handle all base registers here, not just fp/ap/sp, because on some
4633 targets (namely SH) we can also get too large displacements from
4634 big-endian corrections. */
4635 else if (GET_CODE (ad) == PLUS
4636 && GET_CODE (XEXP (ad, 0)) == REG
4637 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4638 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4639 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4641 /* Unshare the MEM rtx so we can safely alter it. */
4644 *memrefloc = copy_rtx (*memrefloc);
4645 loc = &XEXP (*memrefloc, 0);
4647 loc = &XEXP (*loc, 0);
4650 if (double_reg_address_ok)
4652 /* Unshare the sum as well. */
4653 *loc = ad = copy_rtx (ad);
4655 /* Reload the displacement into an index reg.
4656 We assume the frame pointer or arg pointer is a base reg. */
4657 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4658 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4664 /* If the sum of two regs is not necessarily valid,
4665 reload the sum into a base reg.
4666 That will at least work. */
4667 find_reloads_address_part (ad, loc, BASE_REG_CLASS,
4668 Pmode, opnum, type, ind_levels);
4670 return ! removed_and;
4673 /* If we have an indexed stack slot, there are three possible reasons why
4674 it might be invalid: The index might need to be reloaded, the address
4675 might have been made by frame pointer elimination and hence have a
4676 constant out of range, or both reasons might apply.
4678 We can easily check for an index needing reload, but even if that is the
4679 case, we might also have an invalid constant. To avoid making the
4680 conservative assumption and requiring two reloads, we see if this address
4681 is valid when not interpreted strictly. If it is, the only problem is
4682 that the index needs a reload and find_reloads_address_1 will take care
4685 If we decide to do something here, it must be that
4686 `double_reg_address_ok' is true and that this address rtl was made by
4687 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4688 rework the sum so that the reload register will be added to the index.
4689 This is safe because we know the address isn't shared.
4691 We check for fp/ap/sp as both the first and second operand of the
4694 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4695 && GET_CODE (XEXP (ad, 0)) == PLUS
4696 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4697 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4698 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4700 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4701 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4703 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4704 && ! memory_address_p (mode, ad))
4706 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4707 plus_constant (XEXP (XEXP (ad, 0), 0),
4708 INTVAL (XEXP (ad, 1))),
4709 XEXP (XEXP (ad, 0), 1));
4710 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4711 GET_MODE (ad), opnum, type, ind_levels);
4712 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4718 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4719 && GET_CODE (XEXP (ad, 0)) == PLUS
4720 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4721 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4722 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4724 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4725 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4727 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4728 && ! memory_address_p (mode, ad))
4730 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4731 XEXP (XEXP (ad, 0), 0),
4732 plus_constant (XEXP (XEXP (ad, 0), 1),
4733 INTVAL (XEXP (ad, 1))));
4734 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), BASE_REG_CLASS,
4735 GET_MODE (ad), opnum, type, ind_levels);
4736 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4742 /* See if address becomes valid when an eliminable register
4743 in a sum is replaced. */
4746 if (GET_CODE (ad) == PLUS)
4747 tem = subst_indexed_address (ad);
4748 if (tem != ad && strict_memory_address_p (mode, tem))
4750 /* Ok, we win that way. Replace any additional eliminable
4753 subst_reg_equivs_changed = 0;
4754 tem = subst_reg_equivs (tem, insn);
4756 /* Make sure that didn't make the address invalid again. */
4758 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4765 /* If constants aren't valid addresses, reload the constant address
4767 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4769 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4770 Unshare it so we can safely alter it. */
4771 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4772 && CONSTANT_POOL_ADDRESS_P (ad))
4774 *memrefloc = copy_rtx (*memrefloc);
4775 loc = &XEXP (*memrefloc, 0);
4777 loc = &XEXP (*loc, 0);
4780 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
4782 return ! removed_and;
4785 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
4789 /* Find all pseudo regs appearing in AD
4790 that are eliminable in favor of equivalent values
4791 and do not have hard regs; replace them by their equivalents.
4792 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4793 front of it for pseudos that we have to replace with stack slots. */
4796 subst_reg_equivs (ad, insn)
4800 register RTX_CODE code = GET_CODE (ad);
4802 register const char *fmt;
4818 register int regno = REGNO (ad);
4820 if (reg_equiv_constant[regno] != 0)
4822 subst_reg_equivs_changed = 1;
4823 return reg_equiv_constant[regno];
4825 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
4827 rtx mem = make_memloc (ad, regno);
4828 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
4830 subst_reg_equivs_changed = 1;
4831 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
4839 /* Quickly dispose of a common case. */
4840 if (XEXP (ad, 0) == frame_pointer_rtx
4841 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4849 fmt = GET_RTX_FORMAT (code);
4850 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4852 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
4856 /* Compute the sum of X and Y, making canonicalizations assumed in an
4857 address, namely: sum constant integers, surround the sum of two
4858 constants with a CONST, put the constant as the second operand, and
4859 group the constant on the outermost sum.
4861 This routine assumes both inputs are already in canonical form. */
4868 enum machine_mode mode = GET_MODE (x);
4870 if (mode == VOIDmode)
4871 mode = GET_MODE (y);
4873 if (mode == VOIDmode)
4876 if (GET_CODE (x) == CONST_INT)
4877 return plus_constant (y, INTVAL (x));
4878 else if (GET_CODE (y) == CONST_INT)
4879 return plus_constant (x, INTVAL (y));
4880 else if (CONSTANT_P (x))
4881 tem = x, x = y, y = tem;
4883 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
4884 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
4886 /* Note that if the operands of Y are specified in the opposite
4887 order in the recursive calls below, infinite recursion will occur. */
4888 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
4889 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
4891 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4892 constant will have been placed second. */
4893 if (CONSTANT_P (x) && CONSTANT_P (y))
4895 if (GET_CODE (x) == CONST)
4897 if (GET_CODE (y) == CONST)
4900 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
4903 return gen_rtx_PLUS (mode, x, y);
4906 /* If ADDR is a sum containing a pseudo register that should be
4907 replaced with a constant (from reg_equiv_constant),
4908 return the result of doing so, and also apply the associative
4909 law so that the result is more likely to be a valid address.
4910 (But it is not guaranteed to be one.)
4912 Note that at most one register is replaced, even if more are
4913 replaceable. Also, we try to put the result into a canonical form
4914 so it is more likely to be a valid address.
4916 In all other cases, return ADDR. */
4919 subst_indexed_address (addr)
4922 rtx op0 = 0, op1 = 0, op2 = 0;
4926 if (GET_CODE (addr) == PLUS)
4928 /* Try to find a register to replace. */
4929 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
4930 if (GET_CODE (op0) == REG
4931 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
4932 && reg_renumber[regno] < 0
4933 && reg_equiv_constant[regno] != 0)
4934 op0 = reg_equiv_constant[regno];
4935 else if (GET_CODE (op1) == REG
4936 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
4937 && reg_renumber[regno] < 0
4938 && reg_equiv_constant[regno] != 0)
4939 op1 = reg_equiv_constant[regno];
4940 else if (GET_CODE (op0) == PLUS
4941 && (tem = subst_indexed_address (op0)) != op0)
4943 else if (GET_CODE (op1) == PLUS
4944 && (tem = subst_indexed_address (op1)) != op1)
4949 /* Pick out up to three things to add. */
4950 if (GET_CODE (op1) == PLUS)
4951 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
4952 else if (GET_CODE (op0) == PLUS)
4953 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4955 /* Compute the sum. */
4957 op1 = form_sum (op1, op2);
4959 op0 = form_sum (op0, op1);
4966 /* Record the pseudo registers we must reload into hard registers in a
4967 subexpression of a would-be memory address, X referring to a value
4968 in mode MODE. (This function is not called if the address we find
4971 CONTEXT = 1 means we are considering regs as index regs,
4972 = 0 means we are considering them as base regs.
4974 OPNUM and TYPE specify the purpose of any reloads made.
4976 IND_LEVELS says how many levels of indirect addressing are
4977 supported at this point in the address.
4979 INSN, if nonzero, is the insn in which we do the reload. It is used
4980 to determine if we may generate output reloads.
4982 We return nonzero if X, as a whole, is reloaded or replaced. */
4984 /* Note that we take shortcuts assuming that no multi-reg machine mode
4985 occurs as part of an address.
4986 Also, this is not fully machine-customizable; it works for machines
4987 such as vaxes and 68000's and 32000's, but other possible machines
4988 could have addressing modes that this does not handle right. */
4991 find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
4992 enum machine_mode mode;
4997 enum reload_type type;
5001 register RTX_CODE code = GET_CODE (x);
5007 register rtx orig_op0 = XEXP (x, 0);
5008 register rtx orig_op1 = XEXP (x, 1);
5009 register RTX_CODE code0 = GET_CODE (orig_op0);
5010 register RTX_CODE code1 = GET_CODE (orig_op1);
5011 register rtx op0 = orig_op0;
5012 register rtx op1 = orig_op1;
5014 if (GET_CODE (op0) == SUBREG)
5016 op0 = SUBREG_REG (op0);
5017 code0 = GET_CODE (op0);
5018 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5019 op0 = gen_rtx_REG (word_mode,
5020 REGNO (op0) + SUBREG_WORD (orig_op0));
5023 if (GET_CODE (op1) == SUBREG)
5025 op1 = SUBREG_REG (op1);
5026 code1 = GET_CODE (op1);
5027 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5028 op1 = gen_rtx_REG (GET_MODE (op1),
5029 REGNO (op1) + SUBREG_WORD (orig_op1));
5032 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5033 || code0 == ZERO_EXTEND || code1 == MEM)
5035 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5036 type, ind_levels, insn);
5037 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5038 type, ind_levels, insn);
5041 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5042 || code1 == ZERO_EXTEND || code0 == MEM)
5044 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5045 type, ind_levels, insn);
5046 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5047 type, ind_levels, insn);
5050 else if (code0 == CONST_INT || code0 == CONST
5051 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5052 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5053 type, ind_levels, insn);
5055 else if (code1 == CONST_INT || code1 == CONST
5056 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5057 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5058 type, ind_levels, insn);
5060 else if (code0 == REG && code1 == REG)
5062 if (REG_OK_FOR_INDEX_P (op0)
5063 && REG_MODE_OK_FOR_BASE_P (op1, mode))
5065 else if (REG_OK_FOR_INDEX_P (op1)
5066 && REG_MODE_OK_FOR_BASE_P (op0, mode))
5068 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5069 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5070 type, ind_levels, insn);
5071 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5072 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5073 type, ind_levels, insn);
5074 else if (REG_OK_FOR_INDEX_P (op1))
5075 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5076 type, ind_levels, insn);
5077 else if (REG_OK_FOR_INDEX_P (op0))
5078 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5079 type, ind_levels, insn);
5082 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5083 type, ind_levels, insn);
5084 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5085 type, ind_levels, insn);
5089 else if (code0 == REG)
5091 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5092 type, ind_levels, insn);
5093 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5094 type, ind_levels, insn);
5097 else if (code1 == REG)
5099 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5100 type, ind_levels, insn);
5101 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5102 type, ind_levels, insn);
5111 rtx op0 = XEXP (x, 0);
5112 rtx op1 = XEXP (x, 1);
5114 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5117 /* Currently, we only support {PRE,POST}_MODIFY constructs
5118 where a base register is {inc,dec}remented by the contents
5119 of another register or by a constant value. Thus, these
5120 operands must match. */
5121 if (op0 != XEXP (op1, 0))
5124 /* Require index register (or constant). Let's just handle the
5125 register case in the meantime... If the target allows
5126 auto-modify by a constant then we could try replacing a pseudo
5127 register with its equivalent constant where applicable. */
5128 if (REG_P (XEXP (op1, 1)))
5129 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5130 find_reloads_address_1 (mode, XEXP (op1, 1), 1, &XEXP (op1, 1),
5131 opnum, type, ind_levels, insn);
5133 if (REG_P (XEXP (op1, 0)))
5135 register int regno = REGNO (XEXP (op1, 0));
5137 /* A register that is incremented cannot be constant! */
5138 if (regno >= FIRST_PSEUDO_REGISTER
5139 && reg_equiv_constant[regno] != 0)
5142 /* Handle a register that is equivalent to a memory location
5143 which cannot be addressed directly. */
5144 if (reg_equiv_memory_loc[regno] != 0
5145 && (reg_equiv_address[regno] != 0
5146 || num_not_at_initial_offset))
5148 rtx tem = make_memloc (XEXP (x, 0), regno);
5150 if (reg_equiv_address[regno]
5151 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5153 /* First reload the memory location's address.
5154 We can't use ADDR_TYPE (type) here, because we need to
5155 write back the value after reading it, hence we actually
5156 need two registers. */
5157 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
5158 &XEXP (tem, 0), opnum, type,
5161 /* Then reload the memory location into a base
5163 push_reload (tem, tem, &XEXP (x, 0), &XEXP (op1, 0),
5164 BASE_REG_CLASS, GET_MODE (x), GET_MODE (x),
5165 0, 0, opnum, RELOAD_OTHER);
5170 if (reg_renumber[regno] >= 0)
5171 regno = reg_renumber[regno];
5173 /* We require a base register here... */
5174 if (!REGNO_MODE_OK_FOR_BASE_P (regno, GET_MODE (x)))
5176 push_reload (XEXP (op1, 0), XEXP (x, 0),
5177 &XEXP (op1, 0), &XEXP (x, 0),
5179 GET_MODE (x), GET_MODE (x), 0, 0,
5180 opnum, RELOAD_OTHER);
5192 if (GET_CODE (XEXP (x, 0)) == REG)
5194 register int regno = REGNO (XEXP (x, 0));
5198 /* A register that is incremented cannot be constant! */
5199 if (regno >= FIRST_PSEUDO_REGISTER
5200 && reg_equiv_constant[regno] != 0)
5203 /* Handle a register that is equivalent to a memory location
5204 which cannot be addressed directly. */
5205 if (reg_equiv_memory_loc[regno] != 0
5206 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5208 rtx tem = make_memloc (XEXP (x, 0), regno);
5209 if (reg_equiv_address[regno]
5210 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5212 /* First reload the memory location's address.
5213 We can't use ADDR_TYPE (type) here, because we need to
5214 write back the value after reading it, hence we actually
5215 need two registers. */
5216 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5217 &XEXP (tem, 0), opnum, type,
5219 /* Put this inside a new increment-expression. */
5220 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5221 /* Proceed to reload that, as if it contained a register. */
5225 /* If we have a hard register that is ok as an index,
5226 don't make a reload. If an autoincrement of a nice register
5227 isn't "valid", it must be that no autoincrement is "valid".
5228 If that is true and something made an autoincrement anyway,
5229 this must be a special context where one is allowed.
5230 (For example, a "push" instruction.)
5231 We can't improve this address, so leave it alone. */
5233 /* Otherwise, reload the autoincrement into a suitable hard reg
5234 and record how much to increment by. */
5236 if (reg_renumber[regno] >= 0)
5237 regno = reg_renumber[regno];
5238 if ((regno >= FIRST_PSEUDO_REGISTER
5239 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5240 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5247 /* If we can output the register afterwards, do so, this
5248 saves the extra update.
5249 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5250 CALL_INSN - and it does not set CC0.
5251 But don't do this if we cannot directly address the
5252 memory location, since this will make it harder to
5253 reuse address reloads, and increases register pressure.
5254 Also don't do this if we can probably update x directly. */
5255 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM
5257 : reg_equiv_mem[regno]);
5258 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5259 if (insn && GET_CODE (insn) == INSN && equiv
5260 && memory_operand (equiv, GET_MODE (equiv))
5262 && ! sets_cc0_p (PATTERN (insn))
5264 && ! (icode != CODE_FOR_nothing
5265 && ((*insn_data[icode].operand[0].predicate)
5267 && ((*insn_data[icode].operand[1].predicate)
5273 = push_reload (x, x, loc, loc,
5274 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5275 GET_MODE (x), GET_MODE (x), 0, 0,
5276 opnum, RELOAD_OTHER);
5278 /* If we created a new MEM based on reg_equiv_mem[REGNO], then
5279 LOC above is part of the new MEM, not the MEM in INSN.
5281 We must also replace the address of the MEM in INSN. */
5282 if (&XEXP (x_orig, 0) != loc)
5283 push_replacement (&XEXP (x_orig, 0), reloadnum, VOIDmode);
5289 = push_reload (x, NULL_RTX, loc, NULL_PTR,
5290 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5291 GET_MODE (x), GET_MODE (x), 0, 0,
5294 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5300 /* Update the REG_INC notes. */
5302 for (link = REG_NOTES (this_insn);
5303 link; link = XEXP (link, 1))
5304 if (REG_NOTE_KIND (link) == REG_INC
5305 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
5306 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5312 else if (GET_CODE (XEXP (x, 0)) == MEM)
5314 /* This is probably the result of a substitution, by eliminate_regs,
5315 of an equivalent address for a pseudo that was not allocated to a
5316 hard register. Verify that the specified address is valid and
5317 reload it into a register. */
5318 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5319 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5323 /* Since we know we are going to reload this item, don't decrement
5324 for the indirection level.
5326 Note that this is actually conservative: it would be slightly
5327 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5329 /* We can't use ADDR_TYPE (type) here, because we need to
5330 write back the value after reading it, hence we actually
5331 need two registers. */
5332 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5333 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5334 opnum, type, ind_levels, insn);
5336 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
5337 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5338 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5340 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5342 link = FIND_REG_INC_NOTE (this_insn, tem);
5344 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5351 /* This is probably the result of a substitution, by eliminate_regs, of
5352 an equivalent address for a pseudo that was not allocated to a hard
5353 register. Verify that the specified address is valid and reload it
5356 Since we know we are going to reload this item, don't decrement for
5357 the indirection level.
5359 Note that this is actually conservative: it would be slightly more
5360 efficient to use the value of SPILL_INDIRECT_LEVELS from
5363 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5364 opnum, ADDR_TYPE (type), ind_levels, insn);
5365 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
5366 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5367 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5372 register int regno = REGNO (x);
5374 if (reg_equiv_constant[regno] != 0)
5376 find_reloads_address_part (reg_equiv_constant[regno], loc,
5377 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5378 GET_MODE (x), opnum, type, ind_levels);
5382 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5383 that feeds this insn. */
5384 if (reg_equiv_mem[regno] != 0)
5386 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
5387 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5388 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5393 if (reg_equiv_memory_loc[regno]
5394 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5396 rtx tem = make_memloc (x, regno);
5397 if (reg_equiv_address[regno] != 0
5398 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5401 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5402 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5407 if (reg_renumber[regno] >= 0)
5408 regno = reg_renumber[regno];
5410 if ((regno >= FIRST_PSEUDO_REGISTER
5411 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5412 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5414 push_reload (x, NULL_RTX, loc, NULL_PTR,
5415 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5416 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5420 /* If a register appearing in an address is the subject of a CLOBBER
5421 in this insn, reload it into some other register to be safe.
5422 The CLOBBER is supposed to make the register unavailable
5423 from before this insn to after it. */
5424 if (regno_clobbered_p (regno, this_insn))
5426 push_reload (x, NULL_RTX, loc, NULL_PTR,
5427 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5428 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5435 if (GET_CODE (SUBREG_REG (x)) == REG)
5437 /* If this is a SUBREG of a hard register and the resulting register
5438 is of the wrong class, reload the whole SUBREG. This avoids
5439 needless copies if SUBREG_REG is multi-word. */
5440 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5442 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5444 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5445 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5447 push_reload (x, NULL_RTX, loc, NULL_PTR,
5448 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5449 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5453 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5454 is larger than the class size, then reload the whole SUBREG. */
5457 enum reg_class class = (context ? INDEX_REG_CLASS
5459 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5460 > reg_class_size[class])
5462 x = find_reloads_subreg_address (x, 0, opnum, type,
5464 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5465 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5477 register const char *fmt = GET_RTX_FORMAT (code);
5480 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5483 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5484 opnum, type, ind_levels, insn);
5491 /* X, which is found at *LOC, is a part of an address that needs to be
5492 reloaded into a register of class CLASS. If X is a constant, or if
5493 X is a PLUS that contains a constant, check that the constant is a
5494 legitimate operand and that we are supposed to be able to load
5495 it into the register.
5497 If not, force the constant into memory and reload the MEM instead.
5499 MODE is the mode to use, in case X is an integer constant.
5501 OPNUM and TYPE describe the purpose of any reloads made.
5503 IND_LEVELS says how many levels of indirect addressing this machine
5507 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
5510 enum reg_class class;
5511 enum machine_mode mode;
5513 enum reload_type type;
5517 && (! LEGITIMATE_CONSTANT_P (x)
5518 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5522 /* If this is a CONST_INT, it could have been created by a
5523 plus_constant call in eliminate_regs, which means it may be
5524 on the reload_obstack. reload_obstack will be freed later, so
5525 we can't allow such RTL to be put in the constant pool. There
5526 is code in force_const_mem to check for this case, but it doesn't
5527 work because we have already popped off the reload_obstack, so
5528 rtl_obstack == saveable_obstack is true at this point. */
5529 if (GET_CODE (x) == CONST_INT)
5530 tem = x = force_const_mem (mode, GEN_INT (INTVAL (x)));
5532 tem = x = force_const_mem (mode, x);
5534 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5535 opnum, type, ind_levels, 0);
5538 else if (GET_CODE (x) == PLUS
5539 && CONSTANT_P (XEXP (x, 1))
5540 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5541 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5545 /* See comment above. */
5546 if (GET_CODE (XEXP (x, 1)) == CONST_INT)
5547 tem = force_const_mem (GET_MODE (x), GEN_INT (INTVAL (XEXP (x, 1))));
5549 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5551 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5552 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5553 opnum, type, ind_levels, 0);
5556 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5557 mode, VOIDmode, 0, 0, opnum, type);
5560 /* X, a subreg of a pseudo, is a part of an address that needs to be
5563 If the pseudo is equivalent to a memory location that cannot be directly
5564 addressed, make the necessary address reloads.
5566 If address reloads have been necessary, or if the address is changed
5567 by register elimination, return the rtx of the memory location;
5568 otherwise, return X.
5570 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5573 OPNUM and TYPE identify the purpose of the reload.
5575 IND_LEVELS says how many levels of indirect addressing are
5576 supported at this point in the address.
5578 INSN, if nonzero, is the insn in which we do the reload. It is used
5579 to determine where to put USEs for pseudos that we have to replace with
5583 find_reloads_subreg_address (x, force_replace, opnum, type,
5588 enum reload_type type;
5592 int regno = REGNO (SUBREG_REG (x));
5594 if (reg_equiv_memory_loc[regno])
5596 /* If the address is not directly addressable, or if the address is not
5597 offsettable, then it must be replaced. */
5599 && (reg_equiv_address[regno]
5600 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5603 if (force_replace || num_not_at_initial_offset)
5605 rtx tem = make_memloc (SUBREG_REG (x), regno);
5607 /* If the address changes because of register elimination, then
5608 it must be replaced. */
5610 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5612 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
5614 if (BYTES_BIG_ENDIAN)
5618 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5619 offset += MIN (size, UNITS_PER_WORD);
5620 size = GET_MODE_SIZE (GET_MODE (x));
5621 offset -= MIN (size, UNITS_PER_WORD);
5623 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5624 PUT_MODE (tem, GET_MODE (x));
5625 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5626 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
5628 /* If this is not a toplevel operand, find_reloads doesn't see
5629 this substitution. We have to emit a USE of the pseudo so
5630 that delete_output_reload can see it. */
5631 if (replace_reloads && recog_data.operand[opnum] != x)
5632 emit_insn_before (gen_rtx_USE (VOIDmode, SUBREG_REG (x)), insn);
5640 /* Substitute into the current INSN the registers into which we have reloaded
5641 the things that need reloading. The array `replacements'
5642 contains the locations of all pointers that must be changed
5643 and says what to replace them with.
5645 Return the rtx that X translates into; usually X, but modified. */
5652 for (i = 0; i < n_replacements; i++)
5654 register struct replacement *r = &replacements[i];
5655 register rtx reloadreg = rld[r->what].reg_rtx;
5658 /* Encapsulate RELOADREG so its machine mode matches what
5659 used to be there. Note that gen_lowpart_common will
5660 do the wrong thing if RELOADREG is multi-word. RELOADREG
5661 will always be a REG here. */
5662 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5663 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5665 /* If we are putting this into a SUBREG and RELOADREG is a
5666 SUBREG, we would be making nested SUBREGs, so we have to fix
5667 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5669 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5671 if (GET_MODE (*r->subreg_loc)
5672 == GET_MODE (SUBREG_REG (reloadreg)))
5673 *r->subreg_loc = SUBREG_REG (reloadreg);
5676 *r->where = SUBREG_REG (reloadreg);
5677 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
5681 *r->where = reloadreg;
5683 /* If reload got no reg and isn't optional, something's wrong. */
5684 else if (! rld[r->what].optional)
5689 /* Make a copy of any replacements being done into X and move those copies
5690 to locations in Y, a copy of X. We only look at the highest level of
5694 copy_replacements (x, y)
5699 enum rtx_code code = GET_CODE (x);
5700 const char *fmt = GET_RTX_FORMAT (code);
5701 struct replacement *r;
5703 /* We can't support X being a SUBREG because we might then need to know its
5704 location if something inside it was replaced. */
5708 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5710 for (j = 0; j < n_replacements; j++)
5712 if (replacements[j].subreg_loc == &XEXP (x, i))
5714 r = &replacements[n_replacements++];
5715 r->where = replacements[j].where;
5716 r->subreg_loc = &XEXP (y, i);
5717 r->what = replacements[j].what;
5718 r->mode = replacements[j].mode;
5720 else if (replacements[j].where == &XEXP (x, i))
5722 r = &replacements[n_replacements++];
5723 r->where = &XEXP (y, i);
5725 r->what = replacements[j].what;
5726 r->mode = replacements[j].mode;
5731 /* Change any replacements being done to *X to be done to *Y */
5734 move_replacements (x, y)
5740 for (i = 0; i < n_replacements; i++)
5741 if (replacements[i].subreg_loc == x)
5742 replacements[i].subreg_loc = y;
5743 else if (replacements[i].where == x)
5745 replacements[i].where = y;
5746 replacements[i].subreg_loc = 0;
5750 /* If LOC was scheduled to be replaced by something, return the replacement.
5751 Otherwise, return *LOC. */
5754 find_replacement (loc)
5757 struct replacement *r;
5759 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
5761 rtx reloadreg = rld[r->what].reg_rtx;
5763 if (reloadreg && r->where == loc)
5765 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
5766 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5770 else if (reloadreg && r->subreg_loc == loc)
5772 /* RELOADREG must be either a REG or a SUBREG.
5774 ??? Is it actually still ever a SUBREG? If so, why? */
5776 if (GET_CODE (reloadreg) == REG)
5777 return gen_rtx_REG (GET_MODE (*loc),
5778 REGNO (reloadreg) + SUBREG_WORD (*loc));
5779 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
5782 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
5783 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
5787 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5788 what's inside and make a new rtl if so. */
5789 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
5790 || GET_CODE (*loc) == MULT)
5792 rtx x = find_replacement (&XEXP (*loc, 0));
5793 rtx y = find_replacement (&XEXP (*loc, 1));
5795 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
5796 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
5802 /* Return nonzero if register in range [REGNO, ENDREGNO)
5803 appears either explicitly or implicitly in X
5804 other than being stored into (except for earlyclobber operands).
5806 References contained within the substructure at LOC do not count.
5807 LOC may be zero, meaning don't ignore anything.
5809 This is similar to refers_to_regno_p in rtlanal.c except that we
5810 look at equivalences for pseudos that didn't get hard registers. */
5813 refers_to_regno_for_reload_p (regno, endregno, x, loc)
5814 unsigned int regno, endregno;
5827 code = GET_CODE (x);
5834 /* If this is a pseudo, a hard register must not have been allocated.
5835 X must therefore either be a constant or be in memory. */
5836 if (r >= FIRST_PSEUDO_REGISTER)
5838 if (reg_equiv_memory_loc[r])
5839 return refers_to_regno_for_reload_p (regno, endregno,
5840 reg_equiv_memory_loc[r],
5843 if (reg_equiv_constant[r])
5849 return (endregno > r
5850 && regno < r + (r < FIRST_PSEUDO_REGISTER
5851 ? HARD_REGNO_NREGS (r, GET_MODE (x))
5855 /* If this is a SUBREG of a hard reg, we can see exactly which
5856 registers are being modified. Otherwise, handle normally. */
5857 if (GET_CODE (SUBREG_REG (x)) == REG
5858 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5860 unsigned int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5861 unsigned int inner_endregno
5862 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
5863 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5865 return endregno > inner_regno && regno < inner_endregno;
5871 if (&SET_DEST (x) != loc
5872 /* Note setting a SUBREG counts as referring to the REG it is in for
5873 a pseudo but not for hard registers since we can
5874 treat each word individually. */
5875 && ((GET_CODE (SET_DEST (x)) == SUBREG
5876 && loc != &SUBREG_REG (SET_DEST (x))
5877 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
5878 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
5879 && refers_to_regno_for_reload_p (regno, endregno,
5880 SUBREG_REG (SET_DEST (x)),
5882 /* If the output is an earlyclobber operand, this is
5884 || ((GET_CODE (SET_DEST (x)) != REG
5885 || earlyclobber_operand_p (SET_DEST (x)))
5886 && refers_to_regno_for_reload_p (regno, endregno,
5887 SET_DEST (x), loc))))
5890 if (code == CLOBBER || loc == &SET_SRC (x))
5899 /* X does not match, so try its subexpressions. */
5901 fmt = GET_RTX_FORMAT (code);
5902 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5904 if (fmt[i] == 'e' && loc != &XEXP (x, i))
5912 if (refers_to_regno_for_reload_p (regno, endregno,
5916 else if (fmt[i] == 'E')
5919 for (j = XVECLEN (x, i) - 1; j >=0; j--)
5920 if (loc != &XVECEXP (x, i, j)
5921 && refers_to_regno_for_reload_p (regno, endregno,
5922 XVECEXP (x, i, j), loc))
5929 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5930 we check if any register number in X conflicts with the relevant register
5931 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5932 contains a MEM (we don't bother checking for memory addresses that can't
5933 conflict because we expect this to be a rare case.
5935 This function is similar to reg_overlap_mention_p in rtlanal.c except
5936 that we look at equivalences for pseudos that didn't get hard registers. */
5939 reg_overlap_mentioned_for_reload_p (x, in)
5942 int regno, endregno;
5944 /* Overly conservative. */
5945 if (GET_CODE (x) == STRICT_LOW_PART)
5948 /* If either argument is a constant, then modifying X can not affect IN. */
5949 if (CONSTANT_P (x) || CONSTANT_P (in))
5951 else if (GET_CODE (x) == SUBREG)
5953 regno = REGNO (SUBREG_REG (x));
5954 if (regno < FIRST_PSEUDO_REGISTER)
5955 regno += SUBREG_WORD (x);
5957 else if (GET_CODE (x) == REG)
5961 /* If this is a pseudo, it must not have been assigned a hard register.
5962 Therefore, it must either be in memory or be a constant. */
5964 if (regno >= FIRST_PSEUDO_REGISTER)
5966 if (reg_equiv_memory_loc[regno])
5967 return refers_to_mem_for_reload_p (in);
5968 else if (reg_equiv_constant[regno])
5973 else if (GET_CODE (x) == MEM)
5974 return refers_to_mem_for_reload_p (in);
5975 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
5976 || GET_CODE (x) == CC0)
5977 return reg_mentioned_p (x, in);
5981 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
5982 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5984 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
5987 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5991 refers_to_mem_for_reload_p (x)
5997 if (GET_CODE (x) == MEM)
6000 if (GET_CODE (x) == REG)
6001 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6002 && reg_equiv_memory_loc[REGNO (x)]);
6004 fmt = GET_RTX_FORMAT (GET_CODE (x));
6005 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6007 && (GET_CODE (XEXP (x, i)) == MEM
6008 || refers_to_mem_for_reload_p (XEXP (x, i))))
6014 /* Check the insns before INSN to see if there is a suitable register
6015 containing the same value as GOAL.
6016 If OTHER is -1, look for a register in class CLASS.
6017 Otherwise, just see if register number OTHER shares GOAL's value.
6019 Return an rtx for the register found, or zero if none is found.
6021 If RELOAD_REG_P is (short *)1,
6022 we reject any hard reg that appears in reload_reg_rtx
6023 because such a hard reg is also needed coming into this insn.
6025 If RELOAD_REG_P is any other nonzero value,
6026 it is a vector indexed by hard reg number
6027 and we reject any hard reg whose element in the vector is nonnegative
6028 as well as any that appears in reload_reg_rtx.
6030 If GOAL is zero, then GOALREG is a register number; we look
6031 for an equivalent for that register.
6033 MODE is the machine mode of the value we want an equivalence for.
6034 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6036 This function is used by jump.c as well as in the reload pass.
6038 If GOAL is the sum of the stack pointer and a constant, we treat it
6039 as if it were a constant except that sp is required to be unchanging. */
6042 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
6045 enum reg_class class;
6047 short *reload_reg_p;
6049 enum machine_mode mode;
6051 register rtx p = insn;
6052 rtx goaltry, valtry, value, where;
6054 register int regno = -1;
6058 int goal_mem_addr_varies = 0;
6059 int need_stable_sp = 0;
6065 else if (GET_CODE (goal) == REG)
6066 regno = REGNO (goal);
6067 else if (GET_CODE (goal) == MEM)
6069 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6070 if (MEM_VOLATILE_P (goal))
6072 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
6074 /* An address with side effects must be reexecuted. */
6089 else if (CONSTANT_P (goal))
6091 else if (GET_CODE (goal) == PLUS
6092 && XEXP (goal, 0) == stack_pointer_rtx
6093 && CONSTANT_P (XEXP (goal, 1)))
6094 goal_const = need_stable_sp = 1;
6095 else if (GET_CODE (goal) == PLUS
6096 && XEXP (goal, 0) == frame_pointer_rtx
6097 && CONSTANT_P (XEXP (goal, 1)))
6102 /* Scan insns back from INSN, looking for one that copies
6103 a value into or out of GOAL.
6104 Stop and give up if we reach a label. */
6109 if (p == 0 || GET_CODE (p) == CODE_LABEL)
6112 if (GET_CODE (p) == INSN
6113 /* If we don't want spill regs ... */
6114 && (! (reload_reg_p != 0
6115 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6116 /* ... then ignore insns introduced by reload; they aren't
6117 useful and can cause results in reload_as_needed to be
6118 different from what they were when calculating the need for
6119 spills. If we notice an input-reload insn here, we will
6120 reject it below, but it might hide a usable equivalent.
6121 That makes bad code. It may even abort: perhaps no reg was
6122 spilled for this insn because it was assumed we would find
6124 || INSN_UID (p) < reload_first_uid))
6127 pat = single_set (p);
6129 /* First check for something that sets some reg equal to GOAL. */
6132 && true_regnum (SET_SRC (pat)) == regno
6133 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6136 && true_regnum (SET_DEST (pat)) == regno
6137 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6139 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6140 /* When looking for stack pointer + const,
6141 make sure we don't use a stack adjust. */
6142 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6143 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6145 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6146 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6148 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6149 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6150 /* If we are looking for a constant,
6151 and something equivalent to that constant was copied
6152 into a reg, we can use that reg. */
6153 || (goal_const && REG_NOTES (p) != 0
6154 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6155 && ((rtx_equal_p (XEXP (tem, 0), goal)
6157 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6158 || (GET_CODE (SET_DEST (pat)) == REG
6159 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6160 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6162 && GET_CODE (goal) == CONST_INT
6164 = operand_subword (XEXP (tem, 0), 0, 0,
6166 && rtx_equal_p (goal, goaltry)
6168 = operand_subword (SET_DEST (pat), 0, 0,
6170 && (valueno = true_regnum (valtry)) >= 0)))
6171 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6173 && GET_CODE (SET_DEST (pat)) == REG
6174 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6175 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6177 && GET_CODE (goal) == CONST_INT
6178 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6180 && rtx_equal_p (goal, goaltry)
6182 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6183 && (valueno = true_regnum (valtry)) >= 0)))
6186 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
6187 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6197 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6198 (or copying VALUE into GOAL, if GOAL is also a register).
6199 Now verify that VALUE is really valid. */
6201 /* VALUENO is the register number of VALUE; a hard register. */
6203 /* Don't try to re-use something that is killed in this insn. We want
6204 to be able to trust REG_UNUSED notes. */
6205 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6208 /* If we propose to get the value from the stack pointer or if GOAL is
6209 a MEM based on the stack pointer, we need a stable SP. */
6210 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6211 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6215 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6216 if (GET_MODE (value) != mode)
6219 /* Reject VALUE if it was loaded from GOAL
6220 and is also a register that appears in the address of GOAL. */
6222 if (goal_mem && value == SET_DEST (single_set (where))
6223 && refers_to_regno_for_reload_p (valueno,
6225 + HARD_REGNO_NREGS (valueno, mode)),
6229 /* Reject registers that overlap GOAL. */
6231 if (!goal_mem && !goal_const
6232 && regno + (int) HARD_REGNO_NREGS (regno, mode) > valueno
6233 && regno < valueno + (int) HARD_REGNO_NREGS (valueno, mode))
6236 nregs = HARD_REGNO_NREGS (regno, mode);
6237 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6239 /* Reject VALUE if it is one of the regs reserved for reloads.
6240 Reload1 knows how to reuse them anyway, and it would get
6241 confused if we allocated one without its knowledge.
6242 (Now that insns introduced by reload are ignored above,
6243 this case shouldn't happen, but I'm not positive.) */
6245 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6248 for (i = 0; i < valuenregs; ++i)
6249 if (reload_reg_p[valueno + i] >= 0)
6253 /* Reject VALUE if it is a register being used for an input reload
6254 even if it is not one of those reserved. */
6256 if (reload_reg_p != 0)
6259 for (i = 0; i < n_reloads; i++)
6260 if (rld[i].reg_rtx != 0 && rld[i].in)
6262 int regno1 = REGNO (rld[i].reg_rtx);
6263 int nregs1 = HARD_REGNO_NREGS (regno1,
6264 GET_MODE (rld[i].reg_rtx));
6265 if (regno1 < valueno + valuenregs
6266 && regno1 + nregs1 > valueno)
6272 /* We must treat frame pointer as varying here,
6273 since it can vary--in a nonlocal goto as generated by expand_goto. */
6274 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6276 /* Now verify that the values of GOAL and VALUE remain unaltered
6277 until INSN is reached. */
6286 /* Don't trust the conversion past a function call
6287 if either of the two is in a call-clobbered register, or memory. */
6288 if (GET_CODE (p) == CALL_INSN)
6292 if (goal_mem || need_stable_sp)
6295 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6296 for (i = 0; i < nregs; ++i)
6297 if (call_used_regs[regno + i])
6300 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6301 for (i = 0; i < valuenregs; ++i)
6302 if (call_used_regs[valueno + i])
6306 #ifdef NON_SAVING_SETJMP
6307 if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE
6308 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6316 /* Watch out for unspec_volatile, and volatile asms. */
6317 if (volatile_insn_p (pat))
6320 /* If this insn P stores in either GOAL or VALUE, return 0.
6321 If GOAL is a memory ref and this insn writes memory, return 0.
6322 If GOAL is a memory ref and its address is not constant,
6323 and this insn P changes a register used in GOAL, return 0. */
6325 if (GET_CODE (pat) == COND_EXEC)
6326 pat = COND_EXEC_CODE (pat);
6327 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6329 register rtx dest = SET_DEST (pat);
6330 while (GET_CODE (dest) == SUBREG
6331 || GET_CODE (dest) == ZERO_EXTRACT
6332 || GET_CODE (dest) == SIGN_EXTRACT
6333 || GET_CODE (dest) == STRICT_LOW_PART)
6334 dest = XEXP (dest, 0);
6335 if (GET_CODE (dest) == REG)
6337 register int xregno = REGNO (dest);
6339 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6340 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6343 if (xregno < regno + nregs && xregno + xnregs > regno)
6345 if (xregno < valueno + valuenregs
6346 && xregno + xnregs > valueno)
6348 if (goal_mem_addr_varies
6349 && reg_overlap_mentioned_for_reload_p (dest, goal))
6351 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6354 else if (goal_mem && GET_CODE (dest) == MEM
6355 && ! push_operand (dest, GET_MODE (dest)))
6357 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6358 && reg_equiv_memory_loc[regno] != 0)
6360 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6363 else if (GET_CODE (pat) == PARALLEL)
6366 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6368 register rtx v1 = XVECEXP (pat, 0, i);
6369 if (GET_CODE (v1) == COND_EXEC)
6370 v1 = COND_EXEC_CODE (v1);
6371 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6373 register rtx dest = SET_DEST (v1);
6374 while (GET_CODE (dest) == SUBREG
6375 || GET_CODE (dest) == ZERO_EXTRACT
6376 || GET_CODE (dest) == SIGN_EXTRACT
6377 || GET_CODE (dest) == STRICT_LOW_PART)
6378 dest = XEXP (dest, 0);
6379 if (GET_CODE (dest) == REG)
6381 register int xregno = REGNO (dest);
6383 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6384 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6387 if (xregno < regno + nregs
6388 && xregno + xnregs > regno)
6390 if (xregno < valueno + valuenregs
6391 && xregno + xnregs > valueno)
6393 if (goal_mem_addr_varies
6394 && reg_overlap_mentioned_for_reload_p (dest,
6397 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6400 else if (goal_mem && GET_CODE (dest) == MEM
6401 && ! push_operand (dest, GET_MODE (dest)))
6403 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6404 && reg_equiv_memory_loc[regno] != 0)
6406 else if (need_stable_sp
6407 && push_operand (dest, GET_MODE (dest)))
6413 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
6417 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6418 link = XEXP (link, 1))
6420 pat = XEXP (link, 0);
6421 if (GET_CODE (pat) == CLOBBER)
6423 register rtx dest = SET_DEST (pat);
6425 if (GET_CODE (dest) == REG)
6427 register int xregno = REGNO (dest);
6429 = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6431 if (xregno < regno + nregs
6432 && xregno + xnregs > regno)
6434 else if (xregno < valueno + valuenregs
6435 && xregno + xnregs > valueno)
6437 else if (goal_mem_addr_varies
6438 && reg_overlap_mentioned_for_reload_p (dest,
6443 else if (goal_mem && GET_CODE (dest) == MEM
6444 && ! push_operand (dest, GET_MODE (dest)))
6446 else if (need_stable_sp
6447 && push_operand (dest, GET_MODE (dest)))
6454 /* If this insn auto-increments or auto-decrements
6455 either regno or valueno, return 0 now.
6456 If GOAL is a memory ref and its address is not constant,
6457 and this insn P increments a register used in GOAL, return 0. */
6461 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6462 if (REG_NOTE_KIND (link) == REG_INC
6463 && GET_CODE (XEXP (link, 0)) == REG)
6465 register int incno = REGNO (XEXP (link, 0));
6466 if (incno < regno + nregs && incno >= regno)
6468 if (incno < valueno + valuenregs && incno >= valueno)
6470 if (goal_mem_addr_varies
6471 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6481 /* Find a place where INCED appears in an increment or decrement operator
6482 within X, and return the amount INCED is incremented or decremented by.
6483 The value is always positive. */
6486 find_inc_amount (x, inced)
6489 register enum rtx_code code = GET_CODE (x);
6490 register const char *fmt;
6495 register rtx addr = XEXP (x, 0);
6496 if ((GET_CODE (addr) == PRE_DEC
6497 || GET_CODE (addr) == POST_DEC
6498 || GET_CODE (addr) == PRE_INC
6499 || GET_CODE (addr) == POST_INC)
6500 && XEXP (addr, 0) == inced)
6501 return GET_MODE_SIZE (GET_MODE (x));
6502 else if ((GET_CODE (addr) == PRE_MODIFY
6503 || GET_CODE (addr) == POST_MODIFY)
6504 && GET_CODE (XEXP (addr, 1)) == PLUS
6505 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
6506 && XEXP (addr, 0) == inced
6507 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
6509 i = INTVAL (XEXP (XEXP (addr, 1), 1));
6510 return i < 0 ? -i : i;
6514 fmt = GET_RTX_FORMAT (code);
6515 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6519 register int tem = find_inc_amount (XEXP (x, i), inced);
6526 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6528 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6538 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6541 regno_clobbered_p (regno, insn)
6545 if (GET_CODE (PATTERN (insn)) == CLOBBER
6546 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6547 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
6549 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6551 int i = XVECLEN (PATTERN (insn), 0) - 1;
6555 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6556 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
6557 && REGNO (XEXP (elt, 0)) == regno)
6565 static const char *reload_when_needed_name[] =
6568 "RELOAD_FOR_OUTPUT",
6570 "RELOAD_FOR_INPUT_ADDRESS",
6571 "RELOAD_FOR_INPADDR_ADDRESS",
6572 "RELOAD_FOR_OUTPUT_ADDRESS",
6573 "RELOAD_FOR_OUTADDR_ADDRESS",
6574 "RELOAD_FOR_OPERAND_ADDRESS",
6575 "RELOAD_FOR_OPADDR_ADDR",
6577 "RELOAD_FOR_OTHER_ADDRESS"
6580 static const char * const reg_class_names[] = REG_CLASS_NAMES;
6582 /* These functions are used to print the variables set by 'find_reloads' */
6585 debug_reload_to_stream (f)
6593 for (r = 0; r < n_reloads; r++)
6595 fprintf (f, "Reload %d: ", r);
6599 fprintf (f, "reload_in (%s) = ",
6600 GET_MODE_NAME (rld[r].inmode));
6601 print_inline_rtx (f, rld[r].in, 24);
6602 fprintf (f, "\n\t");
6605 if (rld[r].out != 0)
6607 fprintf (f, "reload_out (%s) = ",
6608 GET_MODE_NAME (rld[r].outmode));
6609 print_inline_rtx (f, rld[r].out, 24);
6610 fprintf (f, "\n\t");
6613 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
6615 fprintf (f, "%s (opnum = %d)",
6616 reload_when_needed_name[(int) rld[r].when_needed],
6619 if (rld[r].optional)
6620 fprintf (f, ", optional");
6622 if (rld[r].nongroup)
6623 fprintf (stderr, ", nongroup");
6625 if (rld[r].inc != 0)
6626 fprintf (f, ", inc by %d", rld[r].inc);
6628 if (rld[r].nocombine)
6629 fprintf (f, ", can't combine");
6631 if (rld[r].secondary_p)
6632 fprintf (f, ", secondary_reload_p");
6634 if (rld[r].in_reg != 0)
6636 fprintf (f, "\n\treload_in_reg: ");
6637 print_inline_rtx (f, rld[r].in_reg, 24);
6640 if (rld[r].out_reg != 0)
6642 fprintf (f, "\n\treload_out_reg: ");
6643 print_inline_rtx (f, rld[r].out_reg, 24);
6646 if (rld[r].reg_rtx != 0)
6648 fprintf (f, "\n\treload_reg_rtx: ");
6649 print_inline_rtx (f, rld[r].reg_rtx, 24);
6653 if (rld[r].secondary_in_reload != -1)
6655 fprintf (f, "%ssecondary_in_reload = %d",
6656 prefix, rld[r].secondary_in_reload);
6660 if (rld[r].secondary_out_reload != -1)
6661 fprintf (f, "%ssecondary_out_reload = %d\n",
6662 prefix, rld[r].secondary_out_reload);
6665 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
6667 fprintf (stderr, "%ssecondary_in_icode = %s", prefix,
6668 insn_data[rld[r].secondary_in_icode].name);
6672 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
6673 fprintf (stderr, "%ssecondary_out_icode = %s", prefix,
6674 insn_data[rld[r].secondary_out_icode].name);
6683 debug_reload_to_stream (stderr);