1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* This file contains subroutines used only from the file reload1.c.
24 It knows how to scan one insn for operands and values
25 that need to be copied into registers to make valid code.
26 It also finds other operands and values which are valid
27 but for which equivalent values in registers exist and
28 ought to be used instead.
30 Before processing the first insn of the function, call `init_reload'.
32 To scan an insn, call `find_reloads'. This does two things:
33 1. sets up tables describing which values must be reloaded
34 for this insn, and what kind of hard regs they must be reloaded into;
35 2. optionally record the locations where those values appear in
36 the data, so they can be replaced properly later.
37 This is done only if the second arg to `find_reloads' is nonzero.
39 The third arg to `find_reloads' specifies the number of levels
40 of indirect addressing supported by the machine. If it is zero,
41 indirect addressing is not valid. If it is one, (MEM (REG n))
42 is valid even if (REG n) did not get a hard register; if it is two,
43 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
44 hard register, and similarly for higher values.
46 Then you must choose the hard regs to reload those pseudo regs into,
47 and generate appropriate load insns before this insn and perhaps
48 also store insns after this insn. Set up the array `reload_reg_rtx'
49 to contain the REG rtx's for the registers you used. In some
50 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
51 for certain reloads. Then that tells you which register to use,
52 so you do not need to allocate one. But you still do need to add extra
53 instructions to copy the value into and out of that register.
55 Finally you must call `subst_reloads' to substitute the reload reg rtx's
56 into the locations already recorded.
60 find_reloads can alter the operands of the instruction it is called on.
62 1. Two operands of any sort may be interchanged, if they are in a
63 commutative instruction.
64 This happens only if find_reloads thinks the instruction will compile
67 2. Pseudo-registers that are equivalent to constants are replaced
68 with those constants if they are not in hard registers.
70 1 happens every time find_reloads is called.
71 2 happens only when REPLACE is 1, which is only when
72 actually doing the reloads, not when just counting them.
75 Using a reload register for several reloads in one insn:
77 When an insn has reloads, it is considered as having three parts:
78 the input reloads, the insn itself after reloading, and the output reloads.
79 Reloads of values used in memory addresses are often needed for only one part.
81 When this is so, reload_when_needed records which part needs the reload.
82 Two reloads for different parts of the insn can share the same reload
85 When a reload is used for addresses in multiple parts, or when it is
86 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
87 a register with any other reload. */
95 #include "insn-config.h"
96 #include "insn-codes.h"
100 #include "hard-reg-set.h"
104 #include "function.h"
108 #ifndef REGISTER_MOVE_COST
109 #define REGISTER_MOVE_COST(x, y) 2
112 #ifndef REGNO_MODE_OK_FOR_BASE_P
113 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
116 #ifndef REG_MODE_OK_FOR_BASE_P
117 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
120 /* All reloads of the current insn are recorded here. See reload.h for
123 struct reload rld[MAX_RELOADS];
125 /* All the "earlyclobber" operands of the current insn
126 are recorded here. */
128 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
130 int reload_n_operands;
132 /* Replacing reloads.
134 If `replace_reloads' is nonzero, then as each reload is recorded
135 an entry is made for it in the table `replacements'.
136 Then later `subst_reloads' can look through that table and
137 perform all the replacements needed. */
139 /* Nonzero means record the places to replace. */
140 static int replace_reloads;
142 /* Each replacement is recorded with a structure like this. */
145 rtx *where; /* Location to store in */
146 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
147 a SUBREG; 0 otherwise. */
148 int what; /* which reload this is for */
149 enum machine_mode mode; /* mode it must have */
152 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
154 /* Number of replacements currently recorded. */
155 static int n_replacements;
157 /* Used to track what is modified by an operand. */
160 int reg_flag; /* Nonzero if referencing a register. */
161 int safe; /* Nonzero if this can't conflict with anything. */
162 rtx base; /* Base address for MEM. */
163 HOST_WIDE_INT start; /* Starting offset or register number. */
164 HOST_WIDE_INT end; /* Ending offset or register number. */
167 #ifdef SECONDARY_MEMORY_NEEDED
169 /* Save MEMs needed to copy from one class of registers to another. One MEM
170 is used per mode, but normally only one or two modes are ever used.
172 We keep two versions, before and after register elimination. The one
173 after register elimination is record separately for each operand. This
174 is done in case the address is not valid to be sure that we separately
177 static rtx secondary_memlocs[NUM_MACHINE_MODES];
178 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
181 /* The instruction we are doing reloads for;
182 so we can test whether a register dies in it. */
183 static rtx this_insn;
185 /* Nonzero if this instruction is a user-specified asm with operands. */
186 static int this_insn_is_asm;
188 /* If hard_regs_live_known is nonzero,
189 we can tell which hard regs are currently live,
190 at least enough to succeed in choosing dummy reloads. */
191 static int hard_regs_live_known;
193 /* Indexed by hard reg number,
194 element is nonnegative if hard reg has been spilled.
195 This vector is passed to `find_reloads' as an argument
196 and is not changed here. */
197 static short *static_reload_reg_p;
199 /* Set to 1 in subst_reg_equivs if it changes anything. */
200 static int subst_reg_equivs_changed;
202 /* On return from push_reload, holds the reload-number for the OUT
203 operand, which can be different for that from the input operand. */
204 static int output_reloadnum;
206 /* Compare two RTX's. */
207 #define MATCHES(x, y) \
208 (x == y || (x != 0 && (GET_CODE (x) == REG \
209 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
210 : rtx_equal_p (x, y) && ! side_effects_p (x))))
212 /* Indicates if two reloads purposes are for similar enough things that we
213 can merge their reloads. */
214 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
215 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
216 || ((when1) == (when2) && (op1) == (op2)) \
217 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
218 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
219 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
220 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
221 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
223 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
224 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
225 ((when1) != (when2) \
226 || ! ((op1) == (op2) \
227 || (when1) == RELOAD_FOR_INPUT \
228 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
229 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
231 /* If we are going to reload an address, compute the reload type to
233 #define ADDR_TYPE(type) \
234 ((type) == RELOAD_FOR_INPUT_ADDRESS \
235 ? RELOAD_FOR_INPADDR_ADDRESS \
236 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
237 ? RELOAD_FOR_OUTADDR_ADDRESS \
240 #ifdef HAVE_SECONDARY_RELOADS
241 static int push_secondary_reload PARAMS ((int, rtx, int, int, enum reg_class,
242 enum machine_mode, enum reload_type,
245 static enum reg_class find_valid_class PARAMS ((enum machine_mode, int));
246 static int reload_inner_reg_of_subreg PARAMS ((rtx, enum machine_mode));
247 static int push_reload PARAMS ((rtx, rtx, rtx *, rtx *, enum reg_class,
248 enum machine_mode, enum machine_mode,
249 int, int, int, enum reload_type));
250 static void push_replacement PARAMS ((rtx *, int, enum machine_mode));
251 static void combine_reloads PARAMS ((void));
252 static int find_reusable_reload PARAMS ((rtx *, rtx, enum reg_class,
253 enum reload_type, int, int));
254 static rtx find_dummy_reload PARAMS ((rtx, rtx, rtx *, rtx *,
255 enum machine_mode, enum machine_mode,
256 enum reg_class, int, int));
257 static int hard_reg_set_here_p PARAMS ((unsigned int, unsigned int, rtx));
258 static struct decomposition decompose PARAMS ((rtx));
259 static int immune_p PARAMS ((rtx, rtx, struct decomposition));
260 static int alternative_allows_memconst PARAMS ((const char *, int));
261 static rtx find_reloads_toplev PARAMS ((rtx, int, enum reload_type, int,
263 static rtx make_memloc PARAMS ((rtx, int));
264 static int find_reloads_address PARAMS ((enum machine_mode, rtx *, rtx, rtx *,
265 int, enum reload_type, int, rtx));
266 static rtx subst_reg_equivs PARAMS ((rtx, rtx));
267 static rtx subst_indexed_address PARAMS ((rtx));
268 static int find_reloads_address_1 PARAMS ((enum machine_mode, rtx, int, rtx *,
269 int, enum reload_type,int, rtx));
270 static void find_reloads_address_part PARAMS ((rtx, rtx *, enum reg_class,
271 enum machine_mode, int,
272 enum reload_type, int));
273 static rtx find_reloads_subreg_address PARAMS ((rtx, int, int, enum reload_type,
275 static int find_inc_amount PARAMS ((rtx, rtx));
277 #ifdef HAVE_SECONDARY_RELOADS
279 /* Determine if any secondary reloads are needed for loading (if IN_P is
280 non-zero) or storing (if IN_P is zero) X to or from a reload register of
281 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
282 are needed, push them.
284 Return the reload number of the secondary reload we made, or -1 if
285 we didn't need one. *PICODE is set to the insn_code to use if we do
286 need a secondary reload. */
289 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
295 enum reg_class reload_class;
296 enum machine_mode reload_mode;
297 enum reload_type type;
298 enum insn_code *picode;
300 enum reg_class class = NO_REGS;
301 enum machine_mode mode = reload_mode;
302 enum insn_code icode = CODE_FOR_nothing;
303 enum reg_class t_class = NO_REGS;
304 enum machine_mode t_mode = VOIDmode;
305 enum insn_code t_icode = CODE_FOR_nothing;
306 enum reload_type secondary_type;
307 int s_reload, t_reload = -1;
309 if (type == RELOAD_FOR_INPUT_ADDRESS
310 || type == RELOAD_FOR_OUTPUT_ADDRESS
311 || type == RELOAD_FOR_INPADDR_ADDRESS
312 || type == RELOAD_FOR_OUTADDR_ADDRESS)
313 secondary_type = type;
315 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
317 *picode = CODE_FOR_nothing;
319 /* If X is a paradoxical SUBREG, use the inner value to determine both the
320 mode and object being reloaded. */
321 if (GET_CODE (x) == SUBREG
322 && (GET_MODE_SIZE (GET_MODE (x))
323 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
326 reload_mode = GET_MODE (x);
329 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
330 is still a pseudo-register by now, it *must* have an equivalent MEM
331 but we don't want to assume that), use that equivalent when seeing if
332 a secondary reload is needed since whether or not a reload is needed
333 might be sensitive to the form of the MEM. */
335 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
336 && reg_equiv_mem[REGNO (x)] != 0)
337 x = reg_equiv_mem[REGNO (x)];
339 #ifdef SECONDARY_INPUT_RELOAD_CLASS
341 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
344 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
346 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
349 /* If we don't need any secondary registers, done. */
350 if (class == NO_REGS)
353 /* Get a possible insn to use. If the predicate doesn't accept X, don't
356 icode = (in_p ? reload_in_optab[(int) reload_mode]
357 : reload_out_optab[(int) reload_mode]);
359 if (icode != CODE_FOR_nothing
360 && insn_data[(int) icode].operand[in_p].predicate
361 && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode)))
362 icode = CODE_FOR_nothing;
364 /* If we will be using an insn, see if it can directly handle the reload
365 register we will be using. If it can, the secondary reload is for a
366 scratch register. If it can't, we will use the secondary reload for
367 an intermediate register and require a tertiary reload for the scratch
370 if (icode != CODE_FOR_nothing)
372 /* If IN_P is non-zero, the reload register will be the output in
373 operand 0. If IN_P is zero, the reload register will be the input
374 in operand 1. Outputs should have an initial "=", which we must
378 = insn_data[(int) icode].operand[!in_p].constraint[in_p];
379 enum reg_class insn_class
380 = (insn_letter == 'r' ? GENERAL_REGS
381 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter));
383 if (insn_class == NO_REGS
385 && insn_data[(int) icode].operand[!in_p].constraint[0] != '=')
386 /* The scratch register's constraint must start with "=&". */
387 || insn_data[(int) icode].operand[2].constraint[0] != '='
388 || insn_data[(int) icode].operand[2].constraint[1] != '&')
391 if (reg_class_subset_p (reload_class, insn_class))
392 mode = insn_data[(int) icode].operand[2].mode;
395 char t_letter = insn_data[(int) icode].operand[2].constraint[2];
397 t_mode = insn_data[(int) icode].operand[2].mode;
398 t_class = (t_letter == 'r' ? GENERAL_REGS
399 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter));
401 icode = CODE_FOR_nothing;
405 /* This case isn't valid, so fail. Reload is allowed to use the same
406 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
407 in the case of a secondary register, we actually need two different
408 registers for correct code. We fail here to prevent the possibility of
409 silently generating incorrect code later.
411 The convention is that secondary input reloads are valid only if the
412 secondary_class is different from class. If you have such a case, you
413 can not use secondary reloads, you must work around the problem some
416 Allow this when MODE is not reload_mode and assume that the generated
417 code handles this case (it does on the Alpha, which is the only place
418 this currently happens). */
420 if (in_p && class == reload_class && mode == reload_mode)
423 /* If we need a tertiary reload, see if we have one we can reuse or else
426 if (t_class != NO_REGS)
428 for (t_reload = 0; t_reload < n_reloads; t_reload++)
429 if (rld[t_reload].secondary_p
430 && (reg_class_subset_p (t_class, rld[t_reload].class)
431 || reg_class_subset_p (rld[t_reload].class, t_class))
432 && ((in_p && rld[t_reload].inmode == t_mode)
433 || (! in_p && rld[t_reload].outmode == t_mode))
434 && ((in_p && (rld[t_reload].secondary_in_icode
435 == CODE_FOR_nothing))
436 || (! in_p &&(rld[t_reload].secondary_out_icode
437 == CODE_FOR_nothing)))
438 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
439 && MERGABLE_RELOADS (secondary_type,
440 rld[t_reload].when_needed,
441 opnum, rld[t_reload].opnum))
444 rld[t_reload].inmode = t_mode;
446 rld[t_reload].outmode = t_mode;
448 if (reg_class_subset_p (t_class, rld[t_reload].class))
449 rld[t_reload].class = t_class;
451 rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum);
452 rld[t_reload].optional &= optional;
453 rld[t_reload].secondary_p = 1;
454 if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed,
455 opnum, rld[t_reload].opnum))
456 rld[t_reload].when_needed = RELOAD_OTHER;
459 if (t_reload == n_reloads)
461 /* We need to make a new tertiary reload for this register class. */
462 rld[t_reload].in = rld[t_reload].out = 0;
463 rld[t_reload].class = t_class;
464 rld[t_reload].inmode = in_p ? t_mode : VOIDmode;
465 rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode;
466 rld[t_reload].reg_rtx = 0;
467 rld[t_reload].optional = optional;
468 rld[t_reload].inc = 0;
469 /* Maybe we could combine these, but it seems too tricky. */
470 rld[t_reload].nocombine = 1;
471 rld[t_reload].in_reg = 0;
472 rld[t_reload].out_reg = 0;
473 rld[t_reload].opnum = opnum;
474 rld[t_reload].when_needed = secondary_type;
475 rld[t_reload].secondary_in_reload = -1;
476 rld[t_reload].secondary_out_reload = -1;
477 rld[t_reload].secondary_in_icode = CODE_FOR_nothing;
478 rld[t_reload].secondary_out_icode = CODE_FOR_nothing;
479 rld[t_reload].secondary_p = 1;
485 /* See if we can reuse an existing secondary reload. */
486 for (s_reload = 0; s_reload < n_reloads; s_reload++)
487 if (rld[s_reload].secondary_p
488 && (reg_class_subset_p (class, rld[s_reload].class)
489 || reg_class_subset_p (rld[s_reload].class, class))
490 && ((in_p && rld[s_reload].inmode == mode)
491 || (! in_p && rld[s_reload].outmode == mode))
492 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
493 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
494 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
495 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
496 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
497 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
498 opnum, rld[s_reload].opnum))
501 rld[s_reload].inmode = mode;
503 rld[s_reload].outmode = mode;
505 if (reg_class_subset_p (class, rld[s_reload].class))
506 rld[s_reload].class = class;
508 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
509 rld[s_reload].optional &= optional;
510 rld[s_reload].secondary_p = 1;
511 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
512 opnum, rld[s_reload].opnum))
513 rld[s_reload].when_needed = RELOAD_OTHER;
516 if (s_reload == n_reloads)
518 #ifdef SECONDARY_MEMORY_NEEDED
519 /* If we need a memory location to copy between the two reload regs,
520 set it up now. Note that we do the input case before making
521 the reload and the output case after. This is due to the
522 way reloads are output. */
524 if (in_p && icode == CODE_FOR_nothing
525 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
527 get_secondary_mem (x, reload_mode, opnum, type);
529 /* We may have just added new reloads. Make sure we add
530 the new reload at the end. */
531 s_reload = n_reloads;
535 /* We need to make a new secondary reload for this register class. */
536 rld[s_reload].in = rld[s_reload].out = 0;
537 rld[s_reload].class = class;
539 rld[s_reload].inmode = in_p ? mode : VOIDmode;
540 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
541 rld[s_reload].reg_rtx = 0;
542 rld[s_reload].optional = optional;
543 rld[s_reload].inc = 0;
544 /* Maybe we could combine these, but it seems too tricky. */
545 rld[s_reload].nocombine = 1;
546 rld[s_reload].in_reg = 0;
547 rld[s_reload].out_reg = 0;
548 rld[s_reload].opnum = opnum;
549 rld[s_reload].when_needed = secondary_type;
550 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
551 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
552 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
553 rld[s_reload].secondary_out_icode
554 = ! in_p ? t_icode : CODE_FOR_nothing;
555 rld[s_reload].secondary_p = 1;
559 #ifdef SECONDARY_MEMORY_NEEDED
560 if (! in_p && icode == CODE_FOR_nothing
561 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
562 get_secondary_mem (x, mode, opnum, type);
569 #endif /* HAVE_SECONDARY_RELOADS */
571 #ifdef SECONDARY_MEMORY_NEEDED
573 /* Return a memory location that will be used to copy X in mode MODE.
574 If we haven't already made a location for this mode in this insn,
575 call find_reloads_address on the location being returned. */
578 get_secondary_mem (x, mode, opnum, type)
579 rtx x ATTRIBUTE_UNUSED;
580 enum machine_mode mode;
582 enum reload_type type;
587 /* By default, if MODE is narrower than a word, widen it to a word.
588 This is required because most machines that require these memory
589 locations do not support short load and stores from all registers
590 (e.g., FP registers). */
592 #ifdef SECONDARY_MEMORY_NEEDED_MODE
593 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
595 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
596 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
599 /* If we already have made a MEM for this operand in MODE, return it. */
600 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
601 return secondary_memlocs_elim[(int) mode][opnum];
603 /* If this is the first time we've tried to get a MEM for this mode,
604 allocate a new one. `something_changed' in reload will get set
605 by noticing that the frame size has changed. */
607 if (secondary_memlocs[(int) mode] == 0)
609 #ifdef SECONDARY_MEMORY_NEEDED_RTX
610 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
612 secondary_memlocs[(int) mode]
613 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
617 /* Get a version of the address doing any eliminations needed. If that
618 didn't give us a new MEM, make a new one if it isn't valid. */
620 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
621 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
623 if (! mem_valid && loc == secondary_memlocs[(int) mode])
624 loc = copy_rtx (loc);
626 /* The only time the call below will do anything is if the stack
627 offset is too large. In that case IND_LEVELS doesn't matter, so we
628 can just pass a zero. Adjust the type to be the address of the
629 corresponding object. If the address was valid, save the eliminated
630 address. If it wasn't valid, we need to make a reload each time, so
635 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
636 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
639 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
643 secondary_memlocs_elim[(int) mode][opnum] = loc;
647 /* Clear any secondary memory locations we've made. */
650 clear_secondary_mem ()
652 bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);
654 #endif /* SECONDARY_MEMORY_NEEDED */
656 /* Find the largest class for which every register number plus N is valid in
657 M1 (if in range). Abort if no such class exists. */
659 static enum reg_class
660 find_valid_class (m1, n)
661 enum machine_mode m1 ATTRIBUTE_UNUSED;
666 enum reg_class best_class = NO_REGS;
667 unsigned int best_size = 0;
669 for (class = 1; class < N_REG_CLASSES; class++)
672 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
673 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
674 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
675 && ! HARD_REGNO_MODE_OK (regno + n, m1))
678 if (! bad && reg_class_size[class] > best_size)
679 best_class = class, best_size = reg_class_size[class];
688 /* Return the number of a previously made reload that can be combined with
689 a new one, or n_reloads if none of the existing reloads can be used.
690 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
691 push_reload, they determine the kind of the new reload that we try to
692 combine. P_IN points to the corresponding value of IN, which can be
693 modified by this function.
694 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
696 find_reusable_reload (p_in, out, class, type, opnum, dont_share)
698 enum reg_class class;
699 enum reload_type type;
700 int opnum, dont_share;
704 /* We can't merge two reloads if the output of either one is
707 if (earlyclobber_operand_p (out))
710 /* We can use an existing reload if the class is right
711 and at least one of IN and OUT is a match
712 and the other is at worst neutral.
713 (A zero compared against anything is neutral.)
715 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
716 for the same thing since that can cause us to need more reload registers
717 than we otherwise would. */
719 for (i = 0; i < n_reloads; i++)
720 if ((reg_class_subset_p (class, rld[i].class)
721 || reg_class_subset_p (rld[i].class, class))
722 /* If the existing reload has a register, it must fit our class. */
723 && (rld[i].reg_rtx == 0
724 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
725 true_regnum (rld[i].reg_rtx)))
726 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
727 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
728 || (out != 0 && MATCHES (rld[i].out, out)
729 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
730 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
731 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
732 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
735 /* Reloading a plain reg for input can match a reload to postincrement
736 that reg, since the postincrement's value is the right value.
737 Likewise, it can match a preincrement reload, since we regard
738 the preincrementation as happening before any ref in this insn
740 for (i = 0; i < n_reloads; i++)
741 if ((reg_class_subset_p (class, rld[i].class)
742 || reg_class_subset_p (rld[i].class, class))
743 /* If the existing reload has a register, it must fit our
745 && (rld[i].reg_rtx == 0
746 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
747 true_regnum (rld[i].reg_rtx)))
748 && out == 0 && rld[i].out == 0 && rld[i].in != 0
749 && ((GET_CODE (in) == REG
750 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == 'a'
751 && MATCHES (XEXP (rld[i].in, 0), in))
752 || (GET_CODE (rld[i].in) == REG
753 && GET_RTX_CLASS (GET_CODE (in)) == 'a'
754 && MATCHES (XEXP (in, 0), rld[i].in)))
755 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
756 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
757 && MERGABLE_RELOADS (type, rld[i].when_needed,
758 opnum, rld[i].opnum))
760 /* Make sure reload_in ultimately has the increment,
761 not the plain register. */
762 if (GET_CODE (in) == REG)
769 /* Return nonzero if X is a SUBREG which will require reloading of its
770 SUBREG_REG expression. */
773 reload_inner_reg_of_subreg (x, mode)
775 enum machine_mode mode;
779 /* Only SUBREGs are problematical. */
780 if (GET_CODE (x) != SUBREG)
783 inner = SUBREG_REG (x);
785 /* If INNER is a constant, then INNER must be reloaded. */
786 if (CONSTANT_P (inner))
789 /* If INNER is not a hard register, then INNER will not need to
791 if (GET_CODE (inner) != REG
792 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
795 /* If INNER is not ok for MODE, then INNER will need reloading. */
796 if (! HARD_REGNO_MODE_OK (REGNO (inner) + SUBREG_WORD (x), mode))
799 /* If the outer part is a word or smaller, INNER larger than a
800 word and the number of regs for INNER is not the same as the
801 number of words in INNER, then INNER will need reloading. */
802 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
803 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
804 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
805 != HARD_REGNO_NREGS (REGNO (inner), GET_MODE (inner))));
808 /* Record one reload that needs to be performed.
809 IN is an rtx saying where the data are to be found before this instruction.
810 OUT says where they must be stored after the instruction.
811 (IN is zero for data not read, and OUT is zero for data not written.)
812 INLOC and OUTLOC point to the places in the instructions where
813 IN and OUT were found.
814 If IN and OUT are both non-zero, it means the same register must be used
815 to reload both IN and OUT.
817 CLASS is a register class required for the reloaded data.
818 INMODE is the machine mode that the instruction requires
819 for the reg that replaces IN and OUTMODE is likewise for OUT.
821 If IN is zero, then OUT's location and mode should be passed as
824 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
826 OPTIONAL nonzero means this reload does not need to be performed:
827 it can be discarded if that is more convenient.
829 OPNUM and TYPE say what the purpose of this reload is.
831 The return value is the reload-number for this reload.
833 If both IN and OUT are nonzero, in some rare cases we might
834 want to make two separate reloads. (Actually we never do this now.)
835 Therefore, the reload-number for OUT is stored in
836 output_reloadnum when we return; the return value applies to IN.
837 Usually (presently always), when IN and OUT are nonzero,
838 the two reload-numbers are equal, but the caller should be careful to
842 push_reload (in, out, inloc, outloc, class,
843 inmode, outmode, strict_low, optional, opnum, type)
846 enum reg_class class;
847 enum machine_mode inmode, outmode;
851 enum reload_type type;
855 int dont_remove_subreg = 0;
856 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
857 int secondary_in_reload = -1, secondary_out_reload = -1;
858 enum insn_code secondary_in_icode = CODE_FOR_nothing;
859 enum insn_code secondary_out_icode = CODE_FOR_nothing;
861 /* INMODE and/or OUTMODE could be VOIDmode if no mode
862 has been specified for the operand. In that case,
863 use the operand's mode as the mode to reload. */
864 if (inmode == VOIDmode && in != 0)
865 inmode = GET_MODE (in);
866 if (outmode == VOIDmode && out != 0)
867 outmode = GET_MODE (out);
869 /* If IN is a pseudo register everywhere-equivalent to a constant, and
870 it is not in a hard register, reload straight from the constant,
871 since we want to get rid of such pseudo registers.
872 Often this is done earlier, but not always in find_reloads_address. */
873 if (in != 0 && GET_CODE (in) == REG)
875 register int regno = REGNO (in);
877 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
878 && reg_equiv_constant[regno] != 0)
879 in = reg_equiv_constant[regno];
882 /* Likewise for OUT. Of course, OUT will never be equivalent to
883 an actual constant, but it might be equivalent to a memory location
884 (in the case of a parameter). */
885 if (out != 0 && GET_CODE (out) == REG)
887 register int regno = REGNO (out);
889 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
890 && reg_equiv_constant[regno] != 0)
891 out = reg_equiv_constant[regno];
894 /* If we have a read-write operand with an address side-effect,
895 change either IN or OUT so the side-effect happens only once. */
896 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
898 if (GET_CODE (XEXP (in, 0)) == POST_INC
899 || GET_CODE (XEXP (in, 0)) == POST_DEC
900 || GET_CODE (XEXP (in, 0)) == POST_MODIFY)
902 rtx new = gen_rtx_MEM (GET_MODE (in), XEXP (XEXP (in, 0), 0));
904 MEM_COPY_ATTRIBUTES (new, in);
907 if (GET_CODE (XEXP (in, 0)) == PRE_INC
908 || GET_CODE (XEXP (in, 0)) == PRE_DEC
909 || GET_CODE (XEXP (in, 0)) == PRE_MODIFY)
911 rtx new = gen_rtx_MEM (GET_MODE (out), XEXP (XEXP (out, 0), 0));
913 MEM_COPY_ATTRIBUTES (new, out);
918 /* If we are reloading a (SUBREG constant ...), really reload just the
919 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
920 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
921 a pseudo and hence will become a MEM) with M1 wider than M2 and the
922 register is a pseudo, also reload the inside expression.
923 For machines that extend byte loads, do this for any SUBREG of a pseudo
924 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
925 M2 is an integral mode that gets extended when loaded.
926 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
927 either M1 is not valid for R or M2 is wider than a word but we only
928 need one word to store an M2-sized quantity in R.
929 (However, if OUT is nonzero, we need to reload the reg *and*
930 the subreg, so do nothing here, and let following statement handle it.)
932 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
933 we can't handle it here because CONST_INT does not indicate a mode.
935 Similarly, we must reload the inside expression if we have a
936 STRICT_LOW_PART (presumably, in == out in the cas).
938 Also reload the inner expression if it does not require a secondary
939 reload but the SUBREG does.
941 Finally, reload the inner expression if it is a register that is in
942 the class whose registers cannot be referenced in a different size
943 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
944 cannot reload just the inside since we might end up with the wrong
945 register class. But if it is inside a STRICT_LOW_PART, we have
946 no choice, so we hope we do get the right register class there. */
948 if (in != 0 && GET_CODE (in) == SUBREG
949 && (SUBREG_WORD (in) == 0 || strict_low)
950 #ifdef CLASS_CANNOT_CHANGE_MODE
951 && class != CLASS_CANNOT_CHANGE_MODE
953 && (CONSTANT_P (SUBREG_REG (in))
954 || GET_CODE (SUBREG_REG (in)) == PLUS
956 || (((GET_CODE (SUBREG_REG (in)) == REG
957 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
958 || GET_CODE (SUBREG_REG (in)) == MEM)
959 && ((GET_MODE_SIZE (inmode)
960 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
961 #ifdef LOAD_EXTEND_OP
962 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
963 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
965 && (GET_MODE_SIZE (inmode)
966 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
967 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
968 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
970 #ifdef WORD_REGISTER_OPERATIONS
971 || ((GET_MODE_SIZE (inmode)
972 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
973 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
974 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
978 || (GET_CODE (SUBREG_REG (in)) == REG
979 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
980 /* The case where out is nonzero
981 is handled differently in the following statement. */
982 && (out == 0 || SUBREG_WORD (in) == 0)
983 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
984 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
986 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
988 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
989 GET_MODE (SUBREG_REG (in)))))
990 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
993 #ifdef SECONDARY_INPUT_RELOAD_CLASS
994 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
995 && (SECONDARY_INPUT_RELOAD_CLASS (class,
996 GET_MODE (SUBREG_REG (in)),
1000 #ifdef CLASS_CANNOT_CHANGE_MODE
1001 || (GET_CODE (SUBREG_REG (in)) == REG
1002 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1003 && (TEST_HARD_REG_BIT
1004 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
1005 REGNO (SUBREG_REG (in))))
1006 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)),
1011 in_subreg_loc = inloc;
1012 inloc = &SUBREG_REG (in);
1014 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1015 if (GET_CODE (in) == MEM)
1016 /* This is supposed to happen only for paradoxical subregs made by
1017 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1018 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
1021 inmode = GET_MODE (in);
1024 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1025 either M1 is not valid for R or M2 is wider than a word but we only
1026 need one word to store an M2-sized quantity in R.
1028 However, we must reload the inner reg *as well as* the subreg in
1031 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1032 code above. This can happen if SUBREG_WORD != 0. */
1034 if (in != 0 && reload_inner_reg_of_subreg (in, inmode))
1036 /* This relies on the fact that emit_reload_insns outputs the
1037 instructions for input reloads of type RELOAD_OTHER in the same
1038 order as the reloads. Thus if the outer reload is also of type
1039 RELOAD_OTHER, we are guaranteed that this inner reload will be
1040 output before the outer reload. */
1041 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
1042 find_valid_class (inmode, SUBREG_WORD (in)),
1043 VOIDmode, VOIDmode, 0, 0, opnum, type);
1044 dont_remove_subreg = 1;
1047 /* Similarly for paradoxical and problematical SUBREGs on the output.
1048 Note that there is no reason we need worry about the previous value
1049 of SUBREG_REG (out); even if wider than out,
1050 storing in a subreg is entitled to clobber it all
1051 (except in the case of STRICT_LOW_PART,
1052 and in that case the constraint should label it input-output.) */
1053 if (out != 0 && GET_CODE (out) == SUBREG
1054 && (SUBREG_WORD (out) == 0 || strict_low)
1055 #ifdef CLASS_CANNOT_CHANGE_MODE
1056 && class != CLASS_CANNOT_CHANGE_MODE
1058 && (CONSTANT_P (SUBREG_REG (out))
1060 || (((GET_CODE (SUBREG_REG (out)) == REG
1061 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1062 || GET_CODE (SUBREG_REG (out)) == MEM)
1063 && ((GET_MODE_SIZE (outmode)
1064 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1065 #ifdef WORD_REGISTER_OPERATIONS
1066 || ((GET_MODE_SIZE (outmode)
1067 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1068 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1069 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1073 || (GET_CODE (SUBREG_REG (out)) == REG
1074 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1075 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1076 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1078 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1080 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1081 GET_MODE (SUBREG_REG (out)))))
1082 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
1083 + SUBREG_WORD (out)),
1085 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1086 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1087 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1088 GET_MODE (SUBREG_REG (out)),
1092 #ifdef CLASS_CANNOT_CHANGE_MODE
1093 || (GET_CODE (SUBREG_REG (out)) == REG
1094 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1095 && (TEST_HARD_REG_BIT
1096 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
1097 REGNO (SUBREG_REG (out))))
1098 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)),
1103 out_subreg_loc = outloc;
1104 outloc = &SUBREG_REG (out);
1106 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1107 if (GET_CODE (out) == MEM
1108 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1111 outmode = GET_MODE (out);
1114 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1115 either M1 is not valid for R or M2 is wider than a word but we only
1116 need one word to store an M2-sized quantity in R.
1118 However, we must reload the inner reg *as well as* the subreg in
1119 that case. In this case, the inner reg is an in-out reload. */
1121 if (out != 0 && reload_inner_reg_of_subreg (out, outmode))
1123 /* This relies on the fact that emit_reload_insns outputs the
1124 instructions for output reloads of type RELOAD_OTHER in reverse
1125 order of the reloads. Thus if the outer reload is also of type
1126 RELOAD_OTHER, we are guaranteed that this inner reload will be
1127 output after the outer reload. */
1128 dont_remove_subreg = 1;
1129 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1131 find_valid_class (outmode, SUBREG_WORD (out)),
1132 VOIDmode, VOIDmode, 0, 0,
1133 opnum, RELOAD_OTHER);
1136 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1137 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1138 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1139 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1142 /* If IN is a SUBREG of a hard register, make a new REG. This
1143 simplifies some of the cases below. */
1145 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1146 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1147 && ! dont_remove_subreg)
1148 in = gen_rtx_REG (GET_MODE (in),
1149 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
1151 /* Similarly for OUT. */
1152 if (out != 0 && GET_CODE (out) == SUBREG
1153 && GET_CODE (SUBREG_REG (out)) == REG
1154 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1155 && ! dont_remove_subreg)
1156 out = gen_rtx_REG (GET_MODE (out),
1157 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
1159 /* Narrow down the class of register wanted if that is
1160 desirable on this machine for efficiency. */
1162 class = PREFERRED_RELOAD_CLASS (in, class);
1164 /* Output reloads may need analogous treatment, different in detail. */
1165 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1167 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1170 /* Make sure we use a class that can handle the actual pseudo
1171 inside any subreg. For example, on the 386, QImode regs
1172 can appear within SImode subregs. Although GENERAL_REGS
1173 can handle SImode, QImode needs a smaller class. */
1174 #ifdef LIMIT_RELOAD_CLASS
1176 class = LIMIT_RELOAD_CLASS (inmode, class);
1177 else if (in != 0 && GET_CODE (in) == SUBREG)
1178 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1181 class = LIMIT_RELOAD_CLASS (outmode, class);
1182 if (out != 0 && GET_CODE (out) == SUBREG)
1183 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1186 /* Verify that this class is at least possible for the mode that
1188 if (this_insn_is_asm)
1190 enum machine_mode mode;
1191 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1195 if (mode == VOIDmode)
1197 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1202 outmode = word_mode;
1204 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1205 if (HARD_REGNO_MODE_OK (i, mode)
1206 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1208 int nregs = HARD_REGNO_NREGS (i, mode);
1211 for (j = 1; j < nregs; j++)
1212 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1217 if (i == FIRST_PSEUDO_REGISTER)
1219 error_for_asm (this_insn, "impossible register constraint in `asm'");
1224 /* Optional output reloads are always OK even if we have no register class,
1225 since the function of these reloads is only to have spill_reg_store etc.
1226 set, so that the storing insn can be deleted later. */
1227 if (class == NO_REGS
1228 && (optional == 0 || type != RELOAD_FOR_OUTPUT))
1231 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1235 /* See if we need a secondary reload register to move between CLASS
1236 and IN or CLASS and OUT. Get the icode and push any required reloads
1237 needed for each of them if so. */
1239 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1242 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1243 &secondary_in_icode);
1246 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1247 if (out != 0 && GET_CODE (out) != SCRATCH)
1248 secondary_out_reload
1249 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1250 type, &secondary_out_icode);
1253 /* We found no existing reload suitable for re-use.
1254 So add an additional reload. */
1256 #ifdef SECONDARY_MEMORY_NEEDED
1257 /* If a memory location is needed for the copy, make one. */
1258 if (in != 0 && GET_CODE (in) == REG
1259 && REGNO (in) < FIRST_PSEUDO_REGISTER
1260 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1262 get_secondary_mem (in, inmode, opnum, type);
1268 rld[i].class = class;
1269 rld[i].inmode = inmode;
1270 rld[i].outmode = outmode;
1272 rld[i].optional = optional;
1274 rld[i].nocombine = 0;
1275 rld[i].in_reg = inloc ? *inloc : 0;
1276 rld[i].out_reg = outloc ? *outloc : 0;
1277 rld[i].opnum = opnum;
1278 rld[i].when_needed = type;
1279 rld[i].secondary_in_reload = secondary_in_reload;
1280 rld[i].secondary_out_reload = secondary_out_reload;
1281 rld[i].secondary_in_icode = secondary_in_icode;
1282 rld[i].secondary_out_icode = secondary_out_icode;
1283 rld[i].secondary_p = 0;
1287 #ifdef SECONDARY_MEMORY_NEEDED
1288 if (out != 0 && GET_CODE (out) == REG
1289 && REGNO (out) < FIRST_PSEUDO_REGISTER
1290 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1292 get_secondary_mem (out, outmode, opnum, type);
1297 /* We are reusing an existing reload,
1298 but we may have additional information for it.
1299 For example, we may now have both IN and OUT
1300 while the old one may have just one of them. */
1302 /* The modes can be different. If they are, we want to reload in
1303 the larger mode, so that the value is valid for both modes. */
1304 if (inmode != VOIDmode
1305 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1306 rld[i].inmode = inmode;
1307 if (outmode != VOIDmode
1308 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1309 rld[i].outmode = outmode;
1312 rtx in_reg = inloc ? *inloc : 0;
1313 /* If we merge reloads for two distinct rtl expressions that
1314 are identical in content, there might be duplicate address
1315 reloads. Remove the extra set now, so that if we later find
1316 that we can inherit this reload, we can get rid of the
1317 address reloads altogether.
1319 Do not do this if both reloads are optional since the result
1320 would be an optional reload which could potentially leave
1321 unresolved address replacements.
1323 It is not sufficient to call transfer_replacements since
1324 choose_reload_regs will remove the replacements for address
1325 reloads of inherited reloads which results in the same
1327 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1328 && ! (rld[i].optional && optional))
1330 /* We must keep the address reload with the lower operand
1332 if (opnum > rld[i].opnum)
1334 remove_address_replacements (in);
1336 in_reg = rld[i].in_reg;
1339 remove_address_replacements (rld[i].in);
1342 rld[i].in_reg = in_reg;
1347 rld[i].out_reg = outloc ? *outloc : 0;
1349 if (reg_class_subset_p (class, rld[i].class))
1350 rld[i].class = class;
1351 rld[i].optional &= optional;
1352 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1353 opnum, rld[i].opnum))
1354 rld[i].when_needed = RELOAD_OTHER;
1355 rld[i].opnum = MIN (rld[i].opnum, opnum);
1358 /* If the ostensible rtx being reload differs from the rtx found
1359 in the location to substitute, this reload is not safe to combine
1360 because we cannot reliably tell whether it appears in the insn. */
1362 if (in != 0 && in != *inloc)
1363 rld[i].nocombine = 1;
1366 /* This was replaced by changes in find_reloads_address_1 and the new
1367 function inc_for_reload, which go with a new meaning of reload_inc. */
1369 /* If this is an IN/OUT reload in an insn that sets the CC,
1370 it must be for an autoincrement. It doesn't work to store
1371 the incremented value after the insn because that would clobber the CC.
1372 So we must do the increment of the value reloaded from,
1373 increment it, store it back, then decrement again. */
1374 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1378 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1379 /* If we did not find a nonzero amount-to-increment-by,
1380 that contradicts the belief that IN is being incremented
1381 in an address in this insn. */
1382 if (rld[i].inc == 0)
1387 /* If we will replace IN and OUT with the reload-reg,
1388 record where they are located so that substitution need
1389 not do a tree walk. */
1391 if (replace_reloads)
1395 register struct replacement *r = &replacements[n_replacements++];
1397 r->subreg_loc = in_subreg_loc;
1401 if (outloc != 0 && outloc != inloc)
1403 register struct replacement *r = &replacements[n_replacements++];
1406 r->subreg_loc = out_subreg_loc;
1411 /* If this reload is just being introduced and it has both
1412 an incoming quantity and an outgoing quantity that are
1413 supposed to be made to match, see if either one of the two
1414 can serve as the place to reload into.
1416 If one of them is acceptable, set rld[i].reg_rtx
1419 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1421 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1424 earlyclobber_operand_p (out));
1426 /* If the outgoing register already contains the same value
1427 as the incoming one, we can dispense with loading it.
1428 The easiest way to tell the caller that is to give a phony
1429 value for the incoming operand (same as outgoing one). */
1430 if (rld[i].reg_rtx == out
1431 && (GET_CODE (in) == REG || CONSTANT_P (in))
1432 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1433 static_reload_reg_p, i, inmode))
1437 /* If this is an input reload and the operand contains a register that
1438 dies in this insn and is used nowhere else, see if it is the right class
1439 to be used for this reload. Use it if so. (This occurs most commonly
1440 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1441 this if it is also an output reload that mentions the register unless
1442 the output is a SUBREG that clobbers an entire register.
1444 Note that the operand might be one of the spill regs, if it is a
1445 pseudo reg and we are in a block where spilling has not taken place.
1446 But if there is no spilling in this block, that is OK.
1447 An explicitly used hard reg cannot be a spill reg. */
1449 if (rld[i].reg_rtx == 0 && in != 0)
1454 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1455 if (REG_NOTE_KIND (note) == REG_DEAD
1456 && GET_CODE (XEXP (note, 0)) == REG
1457 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1458 && reg_mentioned_p (XEXP (note, 0), in)
1459 && ! refers_to_regno_for_reload_p (regno,
1461 + HARD_REGNO_NREGS (regno,
1463 PATTERN (this_insn), inloc)
1464 /* If this is also an output reload, IN cannot be used as
1465 the reload register if it is set in this insn unless IN
1467 && (out == 0 || in == out
1468 || ! hard_reg_set_here_p (regno,
1470 + HARD_REGNO_NREGS (regno,
1472 PATTERN (this_insn)))
1473 /* ??? Why is this code so different from the previous?
1474 Is there any simple coherent way to describe the two together?
1475 What's going on here. */
1477 || (GET_CODE (in) == SUBREG
1478 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1480 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1481 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1482 /* Make sure the operand fits in the reg that dies. */
1483 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1484 && HARD_REGNO_MODE_OK (regno, inmode)
1485 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1486 && HARD_REGNO_MODE_OK (regno, outmode))
1489 unsigned int nregs = MAX (HARD_REGNO_NREGS (regno, inmode),
1490 HARD_REGNO_NREGS (regno, outmode));
1492 for (offs = 0; offs < nregs; offs++)
1493 if (fixed_regs[regno + offs]
1494 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1500 rld[i].reg_rtx = gen_rtx_REG (inmode, regno);
1507 output_reloadnum = i;
1512 /* Record an additional place we must replace a value
1513 for which we have already recorded a reload.
1514 RELOADNUM is the value returned by push_reload
1515 when the reload was recorded.
1516 This is used in insn patterns that use match_dup. */
1519 push_replacement (loc, reloadnum, mode)
1522 enum machine_mode mode;
1524 if (replace_reloads)
1526 register struct replacement *r = &replacements[n_replacements++];
1527 r->what = reloadnum;
1534 /* Transfer all replacements that used to be in reload FROM to be in
1538 transfer_replacements (to, from)
1543 for (i = 0; i < n_replacements; i++)
1544 if (replacements[i].what == from)
1545 replacements[i].what = to;
1548 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1549 or a subpart of it. If we have any replacements registered for IN_RTX,
1550 cancel the reloads that were supposed to load them.
1551 Return non-zero if we canceled any reloads. */
1553 remove_address_replacements (in_rtx)
1557 char reload_flags[MAX_RELOADS];
1558 int something_changed = 0;
1560 bzero (reload_flags, sizeof reload_flags);
1561 for (i = 0, j = 0; i < n_replacements; i++)
1563 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1564 reload_flags[replacements[i].what] |= 1;
1567 replacements[j++] = replacements[i];
1568 reload_flags[replacements[i].what] |= 2;
1571 /* Note that the following store must be done before the recursive calls. */
1574 for (i = n_reloads - 1; i >= 0; i--)
1576 if (reload_flags[i] == 1)
1578 deallocate_reload_reg (i);
1579 remove_address_replacements (rld[i].in);
1581 something_changed = 1;
1584 return something_changed;
1587 /* If there is only one output reload, and it is not for an earlyclobber
1588 operand, try to combine it with a (logically unrelated) input reload
1589 to reduce the number of reload registers needed.
1591 This is safe if the input reload does not appear in
1592 the value being output-reloaded, because this implies
1593 it is not needed any more once the original insn completes.
1595 If that doesn't work, see we can use any of the registers that
1596 die in this insn as a reload register. We can if it is of the right
1597 class and does not appear in the value being output-reloaded. */
1603 int output_reload = -1;
1604 int secondary_out = -1;
1607 /* Find the output reload; return unless there is exactly one
1608 and that one is mandatory. */
1610 for (i = 0; i < n_reloads; i++)
1611 if (rld[i].out != 0)
1613 if (output_reload >= 0)
1618 if (output_reload < 0 || rld[output_reload].optional)
1621 /* An input-output reload isn't combinable. */
1623 if (rld[output_reload].in != 0)
1626 /* If this reload is for an earlyclobber operand, we can't do anything. */
1627 if (earlyclobber_operand_p (rld[output_reload].out))
1630 /* Check each input reload; can we combine it? */
1632 for (i = 0; i < n_reloads; i++)
1633 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1634 /* Life span of this reload must not extend past main insn. */
1635 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1636 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1637 && rld[i].when_needed != RELOAD_OTHER
1638 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1639 == CLASS_MAX_NREGS (rld[output_reload].class,
1640 rld[output_reload].outmode))
1642 && rld[i].reg_rtx == 0
1643 #ifdef SECONDARY_MEMORY_NEEDED
1644 /* Don't combine two reloads with different secondary
1645 memory locations. */
1646 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1647 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1648 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1649 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1651 && (SMALL_REGISTER_CLASSES
1652 ? (rld[i].class == rld[output_reload].class)
1653 : (reg_class_subset_p (rld[i].class,
1654 rld[output_reload].class)
1655 || reg_class_subset_p (rld[output_reload].class,
1657 && (MATCHES (rld[i].in, rld[output_reload].out)
1658 /* Args reversed because the first arg seems to be
1659 the one that we imagine being modified
1660 while the second is the one that might be affected. */
1661 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1663 /* However, if the input is a register that appears inside
1664 the output, then we also can't share.
1665 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1666 If the same reload reg is used for both reg 69 and the
1667 result to be stored in memory, then that result
1668 will clobber the address of the memory ref. */
1669 && ! (GET_CODE (rld[i].in) == REG
1670 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1671 rld[output_reload].out))))
1672 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode)
1673 && (reg_class_size[(int) rld[i].class]
1674 || SMALL_REGISTER_CLASSES)
1675 /* We will allow making things slightly worse by combining an
1676 input and an output, but no worse than that. */
1677 && (rld[i].when_needed == RELOAD_FOR_INPUT
1678 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1682 /* We have found a reload to combine with! */
1683 rld[i].out = rld[output_reload].out;
1684 rld[i].out_reg = rld[output_reload].out_reg;
1685 rld[i].outmode = rld[output_reload].outmode;
1686 /* Mark the old output reload as inoperative. */
1687 rld[output_reload].out = 0;
1688 /* The combined reload is needed for the entire insn. */
1689 rld[i].when_needed = RELOAD_OTHER;
1690 /* If the output reload had a secondary reload, copy it. */
1691 if (rld[output_reload].secondary_out_reload != -1)
1693 rld[i].secondary_out_reload
1694 = rld[output_reload].secondary_out_reload;
1695 rld[i].secondary_out_icode
1696 = rld[output_reload].secondary_out_icode;
1699 #ifdef SECONDARY_MEMORY_NEEDED
1700 /* Copy any secondary MEM. */
1701 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1702 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1703 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1705 /* If required, minimize the register class. */
1706 if (reg_class_subset_p (rld[output_reload].class,
1708 rld[i].class = rld[output_reload].class;
1710 /* Transfer all replacements from the old reload to the combined. */
1711 for (j = 0; j < n_replacements; j++)
1712 if (replacements[j].what == output_reload)
1713 replacements[j].what = i;
1718 /* If this insn has only one operand that is modified or written (assumed
1719 to be the first), it must be the one corresponding to this reload. It
1720 is safe to use anything that dies in this insn for that output provided
1721 that it does not occur in the output (we already know it isn't an
1722 earlyclobber. If this is an asm insn, give up. */
1724 if (INSN_CODE (this_insn) == -1)
1727 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1728 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1729 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1732 /* See if some hard register that dies in this insn and is not used in
1733 the output is the right class. Only works if the register we pick
1734 up can fully hold our output reload. */
1735 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1736 if (REG_NOTE_KIND (note) == REG_DEAD
1737 && GET_CODE (XEXP (note, 0)) == REG
1738 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1739 rld[output_reload].out)
1740 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1741 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1742 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1743 REGNO (XEXP (note, 0)))
1744 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1745 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1746 /* Ensure that a secondary or tertiary reload for this output
1747 won't want this register. */
1748 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1749 || (! (TEST_HARD_REG_BIT
1750 (reg_class_contents[(int) rld[secondary_out].class],
1751 REGNO (XEXP (note, 0))))
1752 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1753 || ! (TEST_HARD_REG_BIT
1754 (reg_class_contents[(int) rld[secondary_out].class],
1755 REGNO (XEXP (note, 0)))))))
1756 && ! fixed_regs[REGNO (XEXP (note, 0))])
1758 rld[output_reload].reg_rtx
1759 = gen_rtx_REG (rld[output_reload].outmode,
1760 REGNO (XEXP (note, 0)));
1765 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1766 See if one of IN and OUT is a register that may be used;
1767 this is desirable since a spill-register won't be needed.
1768 If so, return the register rtx that proves acceptable.
1770 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1771 CLASS is the register class required for the reload.
1773 If FOR_REAL is >= 0, it is the number of the reload,
1774 and in some cases when it can be discovered that OUT doesn't need
1775 to be computed, clear out rld[FOR_REAL].out.
1777 If FOR_REAL is -1, this should not be done, because this call
1778 is just to see if a register can be found, not to find and install it.
1780 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1781 puts an additional constraint on being able to use IN for OUT since
1782 IN must not appear elsewhere in the insn (it is assumed that IN itself
1783 is safe from the earlyclobber). */
1786 find_dummy_reload (real_in, real_out, inloc, outloc,
1787 inmode, outmode, class, for_real, earlyclobber)
1788 rtx real_in, real_out;
1789 rtx *inloc, *outloc;
1790 enum machine_mode inmode, outmode;
1791 enum reg_class class;
1801 /* If operands exceed a word, we can't use either of them
1802 unless they have the same size. */
1803 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1804 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1805 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1808 /* Find the inside of any subregs. */
1809 while (GET_CODE (out) == SUBREG)
1811 out_offset = SUBREG_WORD (out);
1812 out = SUBREG_REG (out);
1814 while (GET_CODE (in) == SUBREG)
1816 in_offset = SUBREG_WORD (in);
1817 in = SUBREG_REG (in);
1820 /* Narrow down the reg class, the same way push_reload will;
1821 otherwise we might find a dummy now, but push_reload won't. */
1822 class = PREFERRED_RELOAD_CLASS (in, class);
1824 /* See if OUT will do. */
1825 if (GET_CODE (out) == REG
1826 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1828 unsigned int regno = REGNO (out) + out_offset;
1829 unsigned int nwords = HARD_REGNO_NREGS (regno, outmode);
1832 /* When we consider whether the insn uses OUT,
1833 ignore references within IN. They don't prevent us
1834 from copying IN into OUT, because those refs would
1835 move into the insn that reloads IN.
1837 However, we only ignore IN in its role as this reload.
1838 If the insn uses IN elsewhere and it contains OUT,
1839 that counts. We can't be sure it's the "same" operand
1840 so it might not go through this reload. */
1842 *inloc = const0_rtx;
1844 if (regno < FIRST_PSEUDO_REGISTER
1845 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1846 PATTERN (this_insn), outloc))
1850 for (i = 0; i < nwords; i++)
1851 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1857 if (GET_CODE (real_out) == REG)
1860 value = gen_rtx_REG (outmode, regno);
1867 /* Consider using IN if OUT was not acceptable
1868 or if OUT dies in this insn (like the quotient in a divmod insn).
1869 We can't use IN unless it is dies in this insn,
1870 which means we must know accurately which hard regs are live.
1871 Also, the result can't go in IN if IN is used within OUT,
1872 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1873 if (hard_regs_live_known
1874 && GET_CODE (in) == REG
1875 && REGNO (in) < FIRST_PSEUDO_REGISTER
1877 || find_reg_note (this_insn, REG_UNUSED, real_out))
1878 && find_reg_note (this_insn, REG_DEAD, real_in)
1879 && !fixed_regs[REGNO (in)]
1880 && HARD_REGNO_MODE_OK (REGNO (in),
1881 /* The only case where out and real_out might
1882 have different modes is where real_out
1883 is a subreg, and in that case, out
1885 (GET_MODE (out) != VOIDmode
1886 ? GET_MODE (out) : outmode)))
1888 unsigned int regno = REGNO (in) + in_offset;
1889 unsigned int nwords = HARD_REGNO_NREGS (regno, inmode);
1891 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1892 && ! hard_reg_set_here_p (regno, regno + nwords,
1893 PATTERN (this_insn))
1895 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1896 PATTERN (this_insn), inloc)))
1900 for (i = 0; i < nwords; i++)
1901 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1907 /* If we were going to use OUT as the reload reg
1908 and changed our mind, it means OUT is a dummy that
1909 dies here. So don't bother copying value to it. */
1910 if (for_real >= 0 && value == real_out)
1911 rld[for_real].out = 0;
1912 if (GET_CODE (real_in) == REG)
1915 value = gen_rtx_REG (inmode, regno);
1923 /* This page contains subroutines used mainly for determining
1924 whether the IN or an OUT of a reload can serve as the
1927 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1930 earlyclobber_operand_p (x)
1935 for (i = 0; i < n_earlyclobbers; i++)
1936 if (reload_earlyclobbers[i] == x)
1942 /* Return 1 if expression X alters a hard reg in the range
1943 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1944 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1945 X should be the body of an instruction. */
1948 hard_reg_set_here_p (beg_regno, end_regno, x)
1949 unsigned int beg_regno, end_regno;
1952 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1954 register rtx op0 = SET_DEST (x);
1956 while (GET_CODE (op0) == SUBREG)
1957 op0 = SUBREG_REG (op0);
1958 if (GET_CODE (op0) == REG)
1960 unsigned int r = REGNO (op0);
1962 /* See if this reg overlaps range under consideration. */
1964 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1968 else if (GET_CODE (x) == PARALLEL)
1970 register int i = XVECLEN (x, 0) - 1;
1973 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1980 /* Return 1 if ADDR is a valid memory address for mode MODE,
1981 and check that each pseudo reg has the proper kind of
1985 strict_memory_address_p (mode, addr)
1986 enum machine_mode mode ATTRIBUTE_UNUSED;
1989 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
1996 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1997 if they are the same hard reg, and has special hacks for
1998 autoincrement and autodecrement.
1999 This is specifically intended for find_reloads to use
2000 in determining whether two operands match.
2001 X is the operand whose number is the lower of the two.
2003 The value is 2 if Y contains a pre-increment that matches
2004 a non-incrementing address in X. */
2006 /* ??? To be completely correct, we should arrange to pass
2007 for X the output operand and for Y the input operand.
2008 For now, we assume that the output operand has the lower number
2009 because that is natural in (SET output (... input ...)). */
2012 operands_match_p (x, y)
2016 register RTX_CODE code = GET_CODE (x);
2017 register const char *fmt;
2022 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2023 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2024 && GET_CODE (SUBREG_REG (y)) == REG)))
2030 i = REGNO (SUBREG_REG (x));
2031 if (i >= FIRST_PSEUDO_REGISTER)
2033 i += SUBREG_WORD (x);
2038 if (GET_CODE (y) == SUBREG)
2040 j = REGNO (SUBREG_REG (y));
2041 if (j >= FIRST_PSEUDO_REGISTER)
2043 j += SUBREG_WORD (y);
2048 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2049 multiple hard register group, so that for example (reg:DI 0) and
2050 (reg:SI 1) will be considered the same register. */
2051 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2052 && i < FIRST_PSEUDO_REGISTER)
2053 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
2054 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2055 && j < FIRST_PSEUDO_REGISTER)
2056 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
2060 /* If two operands must match, because they are really a single
2061 operand of an assembler insn, then two postincrements are invalid
2062 because the assembler insn would increment only once.
2063 On the other hand, an postincrement matches ordinary indexing
2064 if the postincrement is the output operand. */
2065 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2066 return operands_match_p (XEXP (x, 0), y);
2067 /* Two preincrements are invalid
2068 because the assembler insn would increment only once.
2069 On the other hand, an preincrement matches ordinary indexing
2070 if the preincrement is the input operand.
2071 In this case, return 2, since some callers need to do special
2072 things when this happens. */
2073 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2074 || GET_CODE (y) == PRE_MODIFY)
2075 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2079 /* Now we have disposed of all the cases
2080 in which different rtx codes can match. */
2081 if (code != GET_CODE (y))
2083 if (code == LABEL_REF)
2084 return XEXP (x, 0) == XEXP (y, 0);
2085 if (code == SYMBOL_REF)
2086 return XSTR (x, 0) == XSTR (y, 0);
2088 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2090 if (GET_MODE (x) != GET_MODE (y))
2093 /* Compare the elements. If any pair of corresponding elements
2094 fail to match, return 0 for the whole things. */
2097 fmt = GET_RTX_FORMAT (code);
2098 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2104 if (XWINT (x, i) != XWINT (y, i))
2109 if (XINT (x, i) != XINT (y, i))
2114 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2117 /* If any subexpression returns 2,
2118 we should return 2 if we are successful. */
2127 if (XVECLEN (x, i) != XVECLEN (y, i))
2129 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2131 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2139 /* It is believed that rtx's at this level will never
2140 contain anything but integers and other rtx's,
2141 except for within LABEL_REFs and SYMBOL_REFs. */
2146 return 1 + success_2;
2149 /* Describe the range of registers or memory referenced by X.
2150 If X is a register, set REG_FLAG and put the first register
2151 number into START and the last plus one into END.
2152 If X is a memory reference, put a base address into BASE
2153 and a range of integer offsets into START and END.
2154 If X is pushing on the stack, we can assume it causes no trouble,
2155 so we set the SAFE field. */
2157 static struct decomposition
2161 struct decomposition val;
2167 if (GET_CODE (x) == MEM)
2169 rtx base = NULL_RTX, offset = 0;
2170 rtx addr = XEXP (x, 0);
2172 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2173 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2175 val.base = XEXP (addr, 0);
2176 val.start = - GET_MODE_SIZE (GET_MODE (x));
2177 val.end = GET_MODE_SIZE (GET_MODE (x));
2178 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2182 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2184 if (GET_CODE (XEXP (addr, 1)) == PLUS
2185 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2186 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2188 val.base = XEXP (addr, 0);
2189 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2190 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2191 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2196 if (GET_CODE (addr) == CONST)
2198 addr = XEXP (addr, 0);
2201 if (GET_CODE (addr) == PLUS)
2203 if (CONSTANT_P (XEXP (addr, 0)))
2205 base = XEXP (addr, 1);
2206 offset = XEXP (addr, 0);
2208 else if (CONSTANT_P (XEXP (addr, 1)))
2210 base = XEXP (addr, 0);
2211 offset = XEXP (addr, 1);
2218 offset = const0_rtx;
2220 if (GET_CODE (offset) == CONST)
2221 offset = XEXP (offset, 0);
2222 if (GET_CODE (offset) == PLUS)
2224 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2226 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2227 offset = XEXP (offset, 0);
2229 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2231 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2232 offset = XEXP (offset, 1);
2236 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2237 offset = const0_rtx;
2240 else if (GET_CODE (offset) != CONST_INT)
2242 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2243 offset = const0_rtx;
2246 if (all_const && GET_CODE (base) == PLUS)
2247 base = gen_rtx_CONST (GET_MODE (base), base);
2249 if (GET_CODE (offset) != CONST_INT)
2252 val.start = INTVAL (offset);
2253 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2257 else if (GET_CODE (x) == REG)
2260 val.start = true_regnum (x);
2263 /* A pseudo with no hard reg. */
2264 val.start = REGNO (x);
2265 val.end = val.start + 1;
2269 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2271 else if (GET_CODE (x) == SUBREG)
2273 if (GET_CODE (SUBREG_REG (x)) != REG)
2274 /* This could be more precise, but it's good enough. */
2275 return decompose (SUBREG_REG (x));
2277 val.start = true_regnum (x);
2279 return decompose (SUBREG_REG (x));
2282 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2284 else if (CONSTANT_P (x)
2285 /* This hasn't been assigned yet, so it can't conflict yet. */
2286 || GET_CODE (x) == SCRATCH)
2293 /* Return 1 if altering Y will not modify the value of X.
2294 Y is also described by YDATA, which should be decompose (Y). */
2297 immune_p (x, y, ydata)
2299 struct decomposition ydata;
2301 struct decomposition xdata;
2304 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2308 if (GET_CODE (y) != MEM)
2310 /* If Y is memory and X is not, Y can't affect X. */
2311 if (GET_CODE (x) != MEM)
2314 xdata = decompose (x);
2316 if (! rtx_equal_p (xdata.base, ydata.base))
2318 /* If bases are distinct symbolic constants, there is no overlap. */
2319 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2321 /* Constants and stack slots never overlap. */
2322 if (CONSTANT_P (xdata.base)
2323 && (ydata.base == frame_pointer_rtx
2324 || ydata.base == hard_frame_pointer_rtx
2325 || ydata.base == stack_pointer_rtx))
2327 if (CONSTANT_P (ydata.base)
2328 && (xdata.base == frame_pointer_rtx
2329 || xdata.base == hard_frame_pointer_rtx
2330 || xdata.base == stack_pointer_rtx))
2332 /* If either base is variable, we don't know anything. */
2337 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2340 /* Similar, but calls decompose. */
2343 safe_from_earlyclobber (op, clobber)
2346 struct decomposition early_data;
2348 early_data = decompose (clobber);
2349 return immune_p (op, clobber, early_data);
2352 /* Main entry point of this file: search the body of INSN
2353 for values that need reloading and record them with push_reload.
2354 REPLACE nonzero means record also where the values occur
2355 so that subst_reloads can be used.
2357 IND_LEVELS says how many levels of indirection are supported by this
2358 machine; a value of zero means that a memory reference is not a valid
2361 LIVE_KNOWN says we have valid information about which hard
2362 regs are live at each point in the program; this is true when
2363 we are called from global_alloc but false when stupid register
2364 allocation has been done.
2366 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2367 which is nonnegative if the reg has been commandeered for reloading into.
2368 It is copied into STATIC_RELOAD_REG_P and referenced from there
2369 by various subroutines.
2371 Return TRUE if some operands need to be changed, because of swapping
2372 commutative operands, reg_equiv_address substitution, or whatever. */
2375 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2377 int replace, ind_levels;
2379 short *reload_reg_p;
2381 register int insn_code_number;
2384 /* These start out as the constraints for the insn
2385 and they are chewed up as we consider alternatives. */
2386 char *constraints[MAX_RECOG_OPERANDS];
2387 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2389 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2390 char pref_or_nothing[MAX_RECOG_OPERANDS];
2391 /* Nonzero for a MEM operand whose entire address needs a reload. */
2392 int address_reloaded[MAX_RECOG_OPERANDS];
2393 /* Value of enum reload_type to use for operand. */
2394 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2395 /* Value of enum reload_type to use within address of operand. */
2396 enum reload_type address_type[MAX_RECOG_OPERANDS];
2397 /* Save the usage of each operand. */
2398 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2399 int no_input_reloads = 0, no_output_reloads = 0;
2401 int this_alternative[MAX_RECOG_OPERANDS];
2402 char this_alternative_win[MAX_RECOG_OPERANDS];
2403 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2404 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2405 int this_alternative_matches[MAX_RECOG_OPERANDS];
2407 int goal_alternative[MAX_RECOG_OPERANDS];
2408 int this_alternative_number;
2409 int goal_alternative_number = 0;
2410 int operand_reloadnum[MAX_RECOG_OPERANDS];
2411 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2412 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2413 char goal_alternative_win[MAX_RECOG_OPERANDS];
2414 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2415 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2416 int goal_alternative_swapped;
2419 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2420 rtx substed_operand[MAX_RECOG_OPERANDS];
2421 rtx body = PATTERN (insn);
2422 rtx set = single_set (insn);
2423 int goal_earlyclobber = 0, this_earlyclobber;
2424 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2430 n_earlyclobbers = 0;
2431 replace_reloads = replace;
2432 hard_regs_live_known = live_known;
2433 static_reload_reg_p = reload_reg_p;
2435 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2436 neither are insns that SET cc0. Insns that use CC0 are not allowed
2437 to have any input reloads. */
2438 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2439 no_output_reloads = 1;
2442 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2443 no_input_reloads = 1;
2444 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2445 no_output_reloads = 1;
2448 #ifdef SECONDARY_MEMORY_NEEDED
2449 /* The eliminated forms of any secondary memory locations are per-insn, so
2450 clear them out here. */
2452 bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2455 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2456 is cheap to move between them. If it is not, there may not be an insn
2457 to do the copy, so we may need a reload. */
2458 if (GET_CODE (body) == SET
2459 && GET_CODE (SET_DEST (body)) == REG
2460 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2461 && GET_CODE (SET_SRC (body)) == REG
2462 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2463 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2464 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2467 extract_insn (insn);
2469 noperands = reload_n_operands = recog_data.n_operands;
2470 n_alternatives = recog_data.n_alternatives;
2472 /* Just return "no reloads" if insn has no operands with constraints. */
2473 if (noperands == 0 || n_alternatives == 0)
2476 insn_code_number = INSN_CODE (insn);
2477 this_insn_is_asm = insn_code_number < 0;
2479 memcpy (operand_mode, recog_data.operand_mode,
2480 noperands * sizeof (enum machine_mode));
2481 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2485 /* If we will need to know, later, whether some pair of operands
2486 are the same, we must compare them now and save the result.
2487 Reloading the base and index registers will clobber them
2488 and afterward they will fail to match. */
2490 for (i = 0; i < noperands; i++)
2495 substed_operand[i] = recog_data.operand[i];
2498 modified[i] = RELOAD_READ;
2500 /* Scan this operand's constraint to see if it is an output operand,
2501 an in-out operand, is commutative, or should match another. */
2506 modified[i] = RELOAD_WRITE;
2508 modified[i] = RELOAD_READ_WRITE;
2511 /* The last operand should not be marked commutative. */
2512 if (i == noperands - 1)
2517 else if (c >= '0' && c <= '9')
2520 operands_match[c][i]
2521 = operands_match_p (recog_data.operand[c],
2522 recog_data.operand[i]);
2524 /* An operand may not match itself. */
2528 /* If C can be commuted with C+1, and C might need to match I,
2529 then C+1 might also need to match I. */
2530 if (commutative >= 0)
2532 if (c == commutative || c == commutative + 1)
2534 int other = c + (c == commutative ? 1 : -1);
2535 operands_match[other][i]
2536 = operands_match_p (recog_data.operand[other],
2537 recog_data.operand[i]);
2539 if (i == commutative || i == commutative + 1)
2541 int other = i + (i == commutative ? 1 : -1);
2542 operands_match[c][other]
2543 = operands_match_p (recog_data.operand[c],
2544 recog_data.operand[other]);
2546 /* Note that C is supposed to be less than I.
2547 No need to consider altering both C and I because in
2548 that case we would alter one into the other. */
2554 /* Examine each operand that is a memory reference or memory address
2555 and reload parts of the addresses into index registers.
2556 Also here any references to pseudo regs that didn't get hard regs
2557 but are equivalent to constants get replaced in the insn itself
2558 with those constants. Nobody will ever see them again.
2560 Finally, set up the preferred classes of each operand. */
2562 for (i = 0; i < noperands; i++)
2564 register RTX_CODE code = GET_CODE (recog_data.operand[i]);
2566 address_reloaded[i] = 0;
2567 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2568 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2571 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2572 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2575 if (*constraints[i] == 0)
2576 /* Ignore things like match_operator operands. */
2578 else if (constraints[i][0] == 'p')
2580 find_reloads_address (VOIDmode, NULL_PTR,
2581 recog_data.operand[i],
2582 recog_data.operand_loc[i],
2583 i, operand_type[i], ind_levels, insn);
2585 /* If we now have a simple operand where we used to have a
2586 PLUS or MULT, re-recognize and try again. */
2587 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
2588 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2589 && (GET_CODE (recog_data.operand[i]) == MULT
2590 || GET_CODE (recog_data.operand[i]) == PLUS))
2592 INSN_CODE (insn) = -1;
2593 retval = find_reloads (insn, replace, ind_levels, live_known,
2598 recog_data.operand[i] = *recog_data.operand_loc[i];
2599 substed_operand[i] = recog_data.operand[i];
2601 else if (code == MEM)
2604 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2605 recog_data.operand_loc[i],
2606 XEXP (recog_data.operand[i], 0),
2607 &XEXP (recog_data.operand[i], 0),
2608 i, address_type[i], ind_levels, insn);
2609 recog_data.operand[i] = *recog_data.operand_loc[i];
2610 substed_operand[i] = recog_data.operand[i];
2612 else if (code == SUBREG)
2614 rtx reg = SUBREG_REG (recog_data.operand[i]);
2616 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2619 && &SET_DEST (set) == recog_data.operand_loc[i],
2621 &address_reloaded[i]);
2623 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2624 that didn't get a hard register, emit a USE with a REG_EQUAL
2625 note in front so that we might inherit a previous, possibly
2629 && GET_CODE (op) == MEM
2630 && GET_CODE (reg) == REG
2631 && (GET_MODE_SIZE (GET_MODE (reg))
2632 >= GET_MODE_SIZE (GET_MODE (op))))
2633 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode, reg), insn))
2634 = gen_rtx_EXPR_LIST (REG_EQUAL,
2635 reg_equiv_memory_loc[REGNO (reg)], NULL_RTX);
2637 substed_operand[i] = recog_data.operand[i] = op;
2639 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2640 /* We can get a PLUS as an "operand" as a result of register
2641 elimination. See eliminate_regs and gen_reload. We handle
2642 a unary operator by reloading the operand. */
2643 substed_operand[i] = recog_data.operand[i]
2644 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2645 ind_levels, 0, insn,
2646 &address_reloaded[i]);
2647 else if (code == REG)
2649 /* This is equivalent to calling find_reloads_toplev.
2650 The code is duplicated for speed.
2651 When we find a pseudo always equivalent to a constant,
2652 we replace it by the constant. We must be sure, however,
2653 that we don't try to replace it in the insn in which it
2655 register int regno = REGNO (recog_data.operand[i]);
2656 if (reg_equiv_constant[regno] != 0
2657 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2659 /* Record the existing mode so that the check if constants are
2660 allowed will work when operand_mode isn't specified. */
2662 if (operand_mode[i] == VOIDmode)
2663 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2665 substed_operand[i] = recog_data.operand[i]
2666 = reg_equiv_constant[regno];
2668 if (reg_equiv_memory_loc[regno] != 0
2669 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2670 /* We need not give a valid is_set_dest argument since the case
2671 of a constant equivalence was checked above. */
2672 substed_operand[i] = recog_data.operand[i]
2673 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2674 ind_levels, 0, insn,
2675 &address_reloaded[i]);
2677 /* If the operand is still a register (we didn't replace it with an
2678 equivalent), get the preferred class to reload it into. */
2679 code = GET_CODE (recog_data.operand[i]);
2681 = ((code == REG && REGNO (recog_data.operand[i])
2682 >= FIRST_PSEUDO_REGISTER)
2683 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2687 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2688 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2691 /* If this is simply a copy from operand 1 to operand 0, merge the
2692 preferred classes for the operands. */
2693 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2694 && recog_data.operand[1] == SET_SRC (set))
2696 preferred_class[0] = preferred_class[1]
2697 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2698 pref_or_nothing[0] |= pref_or_nothing[1];
2699 pref_or_nothing[1] |= pref_or_nothing[0];
2702 /* Now see what we need for pseudo-regs that didn't get hard regs
2703 or got the wrong kind of hard reg. For this, we must consider
2704 all the operands together against the register constraints. */
2706 best = MAX_RECOG_OPERANDS * 2 + 600;
2709 goal_alternative_swapped = 0;
2712 /* The constraints are made of several alternatives.
2713 Each operand's constraint looks like foo,bar,... with commas
2714 separating the alternatives. The first alternatives for all
2715 operands go together, the second alternatives go together, etc.
2717 First loop over alternatives. */
2719 for (this_alternative_number = 0;
2720 this_alternative_number < n_alternatives;
2721 this_alternative_number++)
2723 /* Loop over operands for one constraint alternative. */
2724 /* LOSERS counts those that don't fit this alternative
2725 and would require loading. */
2727 /* BAD is set to 1 if it some operand can't fit this alternative
2728 even after reloading. */
2730 /* REJECT is a count of how undesirable this alternative says it is
2731 if any reloading is required. If the alternative matches exactly
2732 then REJECT is ignored, but otherwise it gets this much
2733 counted against it in addition to the reloading needed. Each
2734 ? counts three times here since we want the disparaging caused by
2735 a bad register class to only count 1/3 as much. */
2738 this_earlyclobber = 0;
2740 for (i = 0; i < noperands; i++)
2742 register char *p = constraints[i];
2743 register int win = 0;
2744 /* 0 => this operand can be reloaded somehow for this alternative */
2746 /* 0 => this operand can be reloaded if the alternative allows regs. */
2749 register rtx operand = recog_data.operand[i];
2751 /* Nonzero means this is a MEM that must be reloaded into a reg
2752 regardless of what the constraint says. */
2753 int force_reload = 0;
2755 /* Nonzero if a constant forced into memory would be OK for this
2758 int earlyclobber = 0;
2760 /* If the predicate accepts a unary operator, it means that
2761 we need to reload the operand, but do not do this for
2762 match_operator and friends. */
2763 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2764 operand = XEXP (operand, 0);
2766 /* If the operand is a SUBREG, extract
2767 the REG or MEM (or maybe even a constant) within.
2768 (Constants can occur as a result of reg_equiv_constant.) */
2770 while (GET_CODE (operand) == SUBREG)
2772 offset += SUBREG_WORD (operand);
2773 operand = SUBREG_REG (operand);
2774 /* Force reload if this is a constant or PLUS or if there may
2775 be a problem accessing OPERAND in the outer mode. */
2776 if (CONSTANT_P (operand)
2777 || GET_CODE (operand) == PLUS
2778 /* We must force a reload of paradoxical SUBREGs
2779 of a MEM because the alignment of the inner value
2780 may not be enough to do the outer reference. On
2781 big-endian machines, it may also reference outside
2784 On machines that extend byte operations and we have a
2785 SUBREG where both the inner and outer modes are no wider
2786 than a word and the inner mode is narrower, is integral,
2787 and gets extended when loaded from memory, combine.c has
2788 made assumptions about the behavior of the machine in such
2789 register access. If the data is, in fact, in memory we
2790 must always load using the size assumed to be in the
2791 register and let the insn do the different-sized
2794 This is doubly true if WORD_REGISTER_OPERATIONS. In
2795 this case eliminate_regs has left non-paradoxical
2796 subregs for push_reloads to see. Make sure it does
2797 by forcing the reload.
2799 ??? When is it right at this stage to have a subreg
2800 of a mem that is _not_ to be handled specialy? IMO
2801 those should have been reduced to just a mem. */
2802 || ((GET_CODE (operand) == MEM
2803 || (GET_CODE (operand)== REG
2804 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2805 #ifndef WORD_REGISTER_OPERATIONS
2806 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2807 < BIGGEST_ALIGNMENT)
2808 && (GET_MODE_SIZE (operand_mode[i])
2809 > GET_MODE_SIZE (GET_MODE (operand))))
2810 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2811 #ifdef LOAD_EXTEND_OP
2812 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2813 && (GET_MODE_SIZE (GET_MODE (operand))
2815 && (GET_MODE_SIZE (operand_mode[i])
2816 > GET_MODE_SIZE (GET_MODE (operand)))
2817 && INTEGRAL_MODE_P (GET_MODE (operand))
2818 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2823 /* Subreg of a hard reg which can't handle the subreg's mode
2824 or which would handle that mode in the wrong number of
2825 registers for subregging to work. */
2826 || (GET_CODE (operand) == REG
2827 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2828 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2829 && (GET_MODE_SIZE (GET_MODE (operand))
2831 && ((GET_MODE_SIZE (GET_MODE (operand))
2833 != HARD_REGNO_NREGS (REGNO (operand),
2834 GET_MODE (operand))))
2835 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2840 this_alternative[i] = (int) NO_REGS;
2841 this_alternative_win[i] = 0;
2842 this_alternative_offmemok[i] = 0;
2843 this_alternative_earlyclobber[i] = 0;
2844 this_alternative_matches[i] = -1;
2846 /* An empty constraint or empty alternative
2847 allows anything which matched the pattern. */
2848 if (*p == 0 || *p == ',')
2851 /* Scan this alternative's specs for this operand;
2852 set WIN if the operand fits any letter in this alternative.
2853 Otherwise, clear BADOP if this operand could
2854 fit some letter after reloads,
2855 or set WINREG if this operand could fit after reloads
2856 provided the constraint allows some registers. */
2858 while (*p && (c = *p++) != ',')
2861 case '=': case '+': case '*':
2865 /* The last operand should not be marked commutative. */
2866 if (i != noperands - 1)
2879 /* Ignore rest of this alternative as far as
2880 reloading is concerned. */
2881 while (*p && *p != ',') p++;
2884 case '0': case '1': case '2': case '3': case '4':
2885 case '5': case '6': case '7': case '8': case '9':
2888 this_alternative_matches[i] = c;
2889 /* We are supposed to match a previous operand.
2890 If we do, we win if that one did.
2891 If we do not, count both of the operands as losers.
2892 (This is too conservative, since most of the time
2893 only a single reload insn will be needed to make
2894 the two operands win. As a result, this alternative
2895 may be rejected when it is actually desirable.) */
2896 if ((swapped && (c != commutative || i != commutative + 1))
2897 /* If we are matching as if two operands were swapped,
2898 also pretend that operands_match had been computed
2900 But if I is the second of those and C is the first,
2901 don't exchange them, because operands_match is valid
2902 only on one side of its diagonal. */
2904 [(c == commutative || c == commutative + 1)
2905 ? 2*commutative + 1 - c : c]
2906 [(i == commutative || i == commutative + 1)
2907 ? 2*commutative + 1 - i : i])
2908 : operands_match[c][i])
2910 /* If we are matching a non-offsettable address where an
2911 offsettable address was expected, then we must reject
2912 this combination, because we can't reload it. */
2913 if (this_alternative_offmemok[c]
2914 && GET_CODE (recog_data.operand[c]) == MEM
2915 && this_alternative[c] == (int) NO_REGS
2916 && ! this_alternative_win[c])
2919 win = this_alternative_win[c];
2923 /* Operands don't match. */
2925 /* Retroactively mark the operand we had to match
2926 as a loser, if it wasn't already. */
2927 if (this_alternative_win[c])
2929 this_alternative_win[c] = 0;
2930 if (this_alternative[c] == (int) NO_REGS)
2932 /* But count the pair only once in the total badness of
2933 this alternative, if the pair can be a dummy reload. */
2935 = find_dummy_reload (recog_data.operand[i],
2936 recog_data.operand[c],
2937 recog_data.operand_loc[i],
2938 recog_data.operand_loc[c],
2939 operand_mode[i], operand_mode[c],
2940 this_alternative[c], -1,
2941 this_alternative_earlyclobber[c]);
2946 /* This can be fixed with reloads if the operand
2947 we are supposed to match can be fixed with reloads. */
2949 this_alternative[i] = this_alternative[c];
2951 /* If we have to reload this operand and some previous
2952 operand also had to match the same thing as this
2953 operand, we don't know how to do that. So reject this
2955 if (! win || force_reload)
2956 for (j = 0; j < i; j++)
2957 if (this_alternative_matches[j]
2958 == this_alternative_matches[i])
2964 /* All necessary reloads for an address_operand
2965 were handled in find_reloads_address. */
2966 this_alternative[i] = (int) BASE_REG_CLASS;
2973 if (GET_CODE (operand) == MEM
2974 || (GET_CODE (operand) == REG
2975 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2976 && reg_renumber[REGNO (operand)] < 0))
2978 if (CONSTANT_P (operand)
2979 /* force_const_mem does not accept HIGH. */
2980 && GET_CODE (operand) != HIGH)
2986 if (GET_CODE (operand) == MEM
2987 && ! address_reloaded[i]
2988 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2989 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2994 if (GET_CODE (operand) == MEM
2995 && ! address_reloaded[i]
2996 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2997 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3001 /* Memory operand whose address is not offsettable. */
3005 if (GET_CODE (operand) == MEM
3006 && ! (ind_levels ? offsettable_memref_p (operand)
3007 : offsettable_nonstrict_memref_p (operand))
3008 /* Certain mem addresses will become offsettable
3009 after they themselves are reloaded. This is important;
3010 we don't want our own handling of unoffsettables
3011 to override the handling of reg_equiv_address. */
3012 && !(GET_CODE (XEXP (operand, 0)) == REG
3014 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3018 /* Memory operand whose address is offsettable. */
3022 if ((GET_CODE (operand) == MEM
3023 /* If IND_LEVELS, find_reloads_address won't reload a
3024 pseudo that didn't get a hard reg, so we have to
3025 reject that case. */
3026 && ((ind_levels ? offsettable_memref_p (operand)
3027 : offsettable_nonstrict_memref_p (operand))
3028 /* A reloaded address is offsettable because it is now
3029 just a simple register indirect. */
3030 || address_reloaded[i]))
3031 || (GET_CODE (operand) == REG
3032 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3033 && reg_renumber[REGNO (operand)] < 0
3034 /* If reg_equiv_address is nonzero, we will be
3035 loading it into a register; hence it will be
3036 offsettable, but we cannot say that reg_equiv_mem
3037 is offsettable without checking. */
3038 && ((reg_equiv_mem[REGNO (operand)] != 0
3039 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3040 || (reg_equiv_address[REGNO (operand)] != 0))))
3042 /* force_const_mem does not accept HIGH. */
3043 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3044 || GET_CODE (operand) == MEM)
3051 /* Output operand that is stored before the need for the
3052 input operands (and their index registers) is over. */
3053 earlyclobber = 1, this_earlyclobber = 1;
3057 #ifndef REAL_ARITHMETIC
3058 /* Match any floating double constant, but only if
3059 we can examine the bits of it reliably. */
3060 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
3061 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
3062 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
3065 if (GET_CODE (operand) == CONST_DOUBLE)
3070 if (GET_CODE (operand) == CONST_DOUBLE)
3076 if (GET_CODE (operand) == CONST_DOUBLE
3077 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
3082 if (GET_CODE (operand) == CONST_INT
3083 || (GET_CODE (operand) == CONST_DOUBLE
3084 && GET_MODE (operand) == VOIDmode))
3087 if (CONSTANT_P (operand)
3088 #ifdef LEGITIMATE_PIC_OPERAND_P
3089 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3096 if (GET_CODE (operand) == CONST_INT
3097 || (GET_CODE (operand) == CONST_DOUBLE
3098 && GET_MODE (operand) == VOIDmode))
3110 if (GET_CODE (operand) == CONST_INT
3111 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
3121 /* A PLUS is never a valid operand, but reload can make
3122 it from a register when eliminating registers. */
3123 && GET_CODE (operand) != PLUS
3124 /* A SCRATCH is not a valid operand. */
3125 && GET_CODE (operand) != SCRATCH
3126 #ifdef LEGITIMATE_PIC_OPERAND_P
3127 && (! CONSTANT_P (operand)
3129 || LEGITIMATE_PIC_OPERAND_P (operand))
3131 && (GENERAL_REGS == ALL_REGS
3132 || GET_CODE (operand) != REG
3133 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3134 && reg_renumber[REGNO (operand)] < 0)))
3136 /* Drop through into 'r' case */
3140 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3144 if (REG_CLASS_FROM_LETTER (c) == NO_REGS)
3146 #ifdef EXTRA_CONSTRAINT
3147 if (EXTRA_CONSTRAINT (operand, c))
3154 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3156 if (GET_MODE (operand) == BLKmode)
3159 if (GET_CODE (operand) == REG
3160 && reg_fits_class_p (operand, this_alternative[i],
3161 offset, GET_MODE (recog_data.operand[i])))
3168 /* If this operand could be handled with a reg,
3169 and some reg is allowed, then this operand can be handled. */
3170 if (winreg && this_alternative[i] != (int) NO_REGS)
3173 /* Record which operands fit this alternative. */
3174 this_alternative_earlyclobber[i] = earlyclobber;
3175 if (win && ! force_reload)
3176 this_alternative_win[i] = 1;
3179 int const_to_mem = 0;
3181 this_alternative_offmemok[i] = offmemok;
3185 /* Alternative loses if it has no regs for a reg operand. */
3186 if (GET_CODE (operand) == REG
3187 && this_alternative[i] == (int) NO_REGS
3188 && this_alternative_matches[i] < 0)
3191 /* If this is a constant that is reloaded into the desired
3192 class by copying it to memory first, count that as another
3193 reload. This is consistent with other code and is
3194 required to avoid choosing another alternative when
3195 the constant is moved into memory by this function on
3196 an early reload pass. Note that the test here is
3197 precisely the same as in the code below that calls
3199 if (CONSTANT_P (operand)
3200 /* force_const_mem does not accept HIGH. */
3201 && GET_CODE (operand) != HIGH
3202 && ((PREFERRED_RELOAD_CLASS (operand,
3203 (enum reg_class) this_alternative[i])
3205 || no_input_reloads)
3206 && operand_mode[i] != VOIDmode)
3209 if (this_alternative[i] != (int) NO_REGS)
3213 /* If we can't reload this value at all, reject this
3214 alternative. Note that we could also lose due to
3215 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3218 if (! CONSTANT_P (operand)
3219 && (enum reg_class) this_alternative[i] != NO_REGS
3220 && (PREFERRED_RELOAD_CLASS (operand,
3221 (enum reg_class) this_alternative[i])
3225 /* Alternative loses if it requires a type of reload not
3226 permitted for this insn. We can always reload SCRATCH
3227 and objects with a REG_UNUSED note. */
3228 else if (GET_CODE (operand) != SCRATCH
3229 && modified[i] != RELOAD_READ && no_output_reloads
3230 && ! find_reg_note (insn, REG_UNUSED, operand))
3232 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3237 /* We prefer to reload pseudos over reloading other things,
3238 since such reloads may be able to be eliminated later.
3239 If we are reloading a SCRATCH, we won't be generating any
3240 insns, just using a register, so it is also preferred.
3241 So bump REJECT in other cases. Don't do this in the
3242 case where we are forcing a constant into memory and
3243 it will then win since we don't want to have a different
3244 alternative match then. */
3245 if (! (GET_CODE (operand) == REG
3246 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3247 && GET_CODE (operand) != SCRATCH
3248 && ! (const_to_mem && constmemok))
3251 /* Input reloads can be inherited more often than output
3252 reloads can be removed, so penalize output reloads. */
3253 if (operand_type[i] != RELOAD_FOR_INPUT
3254 && GET_CODE (operand) != SCRATCH)
3258 /* If this operand is a pseudo register that didn't get a hard
3259 reg and this alternative accepts some register, see if the
3260 class that we want is a subset of the preferred class for this
3261 register. If not, but it intersects that class, use the
3262 preferred class instead. If it does not intersect the preferred
3263 class, show that usage of this alternative should be discouraged;
3264 it will be discouraged more still if the register is `preferred
3265 or nothing'. We do this because it increases the chance of
3266 reusing our spill register in a later insn and avoiding a pair
3267 of memory stores and loads.
3269 Don't bother with this if this alternative will accept this
3272 Don't do this for a multiword operand, since it is only a
3273 small win and has the risk of requiring more spill registers,
3274 which could cause a large loss.
3276 Don't do this if the preferred class has only one register
3277 because we might otherwise exhaust the class. */
3280 if (! win && this_alternative[i] != (int) NO_REGS
3281 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3282 && reg_class_size[(int) preferred_class[i]] > 1)
3284 if (! reg_class_subset_p (this_alternative[i],
3285 preferred_class[i]))
3287 /* Since we don't have a way of forming the intersection,
3288 we just do something special if the preferred class
3289 is a subset of the class we have; that's the most
3290 common case anyway. */
3291 if (reg_class_subset_p (preferred_class[i],
3292 this_alternative[i]))
3293 this_alternative[i] = (int) preferred_class[i];
3295 reject += (2 + 2 * pref_or_nothing[i]);
3300 /* Now see if any output operands that are marked "earlyclobber"
3301 in this alternative conflict with any input operands
3302 or any memory addresses. */
3304 for (i = 0; i < noperands; i++)
3305 if (this_alternative_earlyclobber[i]
3306 && this_alternative_win[i])
3308 struct decomposition early_data;
3310 early_data = decompose (recog_data.operand[i]);
3312 if (modified[i] == RELOAD_READ)
3315 if (this_alternative[i] == NO_REGS)
3317 this_alternative_earlyclobber[i] = 0;
3318 if (this_insn_is_asm)
3319 error_for_asm (this_insn,
3320 "`&' constraint used with no register class");
3325 for (j = 0; j < noperands; j++)
3326 /* Is this an input operand or a memory ref? */
3327 if ((GET_CODE (recog_data.operand[j]) == MEM
3328 || modified[j] != RELOAD_WRITE)
3330 /* Ignore things like match_operator operands. */
3331 && *recog_data.constraints[j] != 0
3332 /* Don't count an input operand that is constrained to match
3333 the early clobber operand. */
3334 && ! (this_alternative_matches[j] == i
3335 && rtx_equal_p (recog_data.operand[i],
3336 recog_data.operand[j]))
3337 /* Is it altered by storing the earlyclobber operand? */
3338 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3341 /* If the output is in a single-reg class,
3342 it's costly to reload it, so reload the input instead. */
3343 if (reg_class_size[this_alternative[i]] == 1
3344 && (GET_CODE (recog_data.operand[j]) == REG
3345 || GET_CODE (recog_data.operand[j]) == SUBREG))
3348 this_alternative_win[j] = 0;
3353 /* If an earlyclobber operand conflicts with something,
3354 it must be reloaded, so request this and count the cost. */
3358 this_alternative_win[i] = 0;
3359 for (j = 0; j < noperands; j++)
3360 if (this_alternative_matches[j] == i
3361 && this_alternative_win[j])
3363 this_alternative_win[j] = 0;
3369 /* If one alternative accepts all the operands, no reload required,
3370 choose that alternative; don't consider the remaining ones. */
3373 /* Unswap these so that they are never swapped at `finish'. */
3374 if (commutative >= 0)
3376 recog_data.operand[commutative] = substed_operand[commutative];
3377 recog_data.operand[commutative + 1]
3378 = substed_operand[commutative + 1];
3380 for (i = 0; i < noperands; i++)
3382 goal_alternative_win[i] = 1;
3383 goal_alternative[i] = this_alternative[i];
3384 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3385 goal_alternative_matches[i] = this_alternative_matches[i];
3386 goal_alternative_earlyclobber[i]
3387 = this_alternative_earlyclobber[i];
3389 goal_alternative_number = this_alternative_number;
3390 goal_alternative_swapped = swapped;
3391 goal_earlyclobber = this_earlyclobber;
3395 /* REJECT, set by the ! and ? constraint characters and when a register
3396 would be reloaded into a non-preferred class, discourages the use of
3397 this alternative for a reload goal. REJECT is incremented by six
3398 for each ? and two for each non-preferred class. */
3399 losers = losers * 6 + reject;
3401 /* If this alternative can be made to work by reloading,
3402 and it needs less reloading than the others checked so far,
3403 record it as the chosen goal for reloading. */
3404 if (! bad && best > losers)
3406 for (i = 0; i < noperands; i++)
3408 goal_alternative[i] = this_alternative[i];
3409 goal_alternative_win[i] = this_alternative_win[i];
3410 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3411 goal_alternative_matches[i] = this_alternative_matches[i];
3412 goal_alternative_earlyclobber[i]
3413 = this_alternative_earlyclobber[i];
3415 goal_alternative_swapped = swapped;
3417 goal_alternative_number = this_alternative_number;
3418 goal_earlyclobber = this_earlyclobber;
3422 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3423 then we need to try each alternative twice,
3424 the second time matching those two operands
3425 as if we had exchanged them.
3426 To do this, really exchange them in operands.
3428 If we have just tried the alternatives the second time,
3429 return operands to normal and drop through. */
3431 if (commutative >= 0)
3436 register enum reg_class tclass;
3439 recog_data.operand[commutative] = substed_operand[commutative + 1];
3440 recog_data.operand[commutative + 1] = substed_operand[commutative];
3442 tclass = preferred_class[commutative];
3443 preferred_class[commutative] = preferred_class[commutative + 1];
3444 preferred_class[commutative + 1] = tclass;
3446 t = pref_or_nothing[commutative];
3447 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3448 pref_or_nothing[commutative + 1] = t;
3450 memcpy (constraints, recog_data.constraints,
3451 noperands * sizeof (char *));
3456 recog_data.operand[commutative] = substed_operand[commutative];
3457 recog_data.operand[commutative + 1]
3458 = substed_operand[commutative + 1];
3462 /* The operands don't meet the constraints.
3463 goal_alternative describes the alternative
3464 that we could reach by reloading the fewest operands.
3465 Reload so as to fit it. */
3467 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3469 /* No alternative works with reloads?? */
3470 if (insn_code_number >= 0)
3471 fatal_insn ("Unable to generate reloads for:", insn);
3472 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3473 /* Avoid further trouble with this insn. */
3474 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3479 /* Jump to `finish' from above if all operands are valid already.
3480 In that case, goal_alternative_win is all 1. */
3483 /* Right now, for any pair of operands I and J that are required to match,
3485 goal_alternative_matches[J] is I.
3486 Set up goal_alternative_matched as the inverse function:
3487 goal_alternative_matched[I] = J. */
3489 for (i = 0; i < noperands; i++)
3490 goal_alternative_matched[i] = -1;
3492 for (i = 0; i < noperands; i++)
3493 if (! goal_alternative_win[i]
3494 && goal_alternative_matches[i] >= 0)
3495 goal_alternative_matched[goal_alternative_matches[i]] = i;
3497 /* If the best alternative is with operands 1 and 2 swapped,
3498 consider them swapped before reporting the reloads. Update the
3499 operand numbers of any reloads already pushed. */
3501 if (goal_alternative_swapped)
3505 tem = substed_operand[commutative];
3506 substed_operand[commutative] = substed_operand[commutative + 1];
3507 substed_operand[commutative + 1] = tem;
3508 tem = recog_data.operand[commutative];
3509 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3510 recog_data.operand[commutative + 1] = tem;
3511 tem = *recog_data.operand_loc[commutative];
3512 *recog_data.operand_loc[commutative]
3513 = *recog_data.operand_loc[commutative + 1];
3514 *recog_data.operand_loc[commutative+1] = tem;
3516 for (i = 0; i < n_reloads; i++)
3518 if (rld[i].opnum == commutative)
3519 rld[i].opnum = commutative + 1;
3520 else if (rld[i].opnum == commutative + 1)
3521 rld[i].opnum = commutative;
3525 for (i = 0; i < noperands; i++)
3527 operand_reloadnum[i] = -1;
3529 /* If this is an earlyclobber operand, we need to widen the scope.
3530 The reload must remain valid from the start of the insn being
3531 reloaded until after the operand is stored into its destination.
3532 We approximate this with RELOAD_OTHER even though we know that we
3533 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3535 One special case that is worth checking is when we have an
3536 output that is earlyclobber but isn't used past the insn (typically
3537 a SCRATCH). In this case, we only need have the reload live
3538 through the insn itself, but not for any of our input or output
3540 But we must not accidentally narrow the scope of an existing
3541 RELOAD_OTHER reload - leave these alone.
3543 In any case, anything needed to address this operand can remain
3544 however they were previously categorized. */
3546 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3548 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3549 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3552 /* Any constants that aren't allowed and can't be reloaded
3553 into registers are here changed into memory references. */
3554 for (i = 0; i < noperands; i++)
3555 if (! goal_alternative_win[i]
3556 && CONSTANT_P (recog_data.operand[i])
3557 /* force_const_mem does not accept HIGH. */
3558 && GET_CODE (recog_data.operand[i]) != HIGH
3559 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3560 (enum reg_class) goal_alternative[i])
3562 || no_input_reloads)
3563 && operand_mode[i] != VOIDmode)
3565 substed_operand[i] = recog_data.operand[i]
3566 = find_reloads_toplev (force_const_mem (operand_mode[i],
3567 recog_data.operand[i]),
3568 i, address_type[i], ind_levels, 0, insn,
3570 if (alternative_allows_memconst (recog_data.constraints[i],
3571 goal_alternative_number))
3572 goal_alternative_win[i] = 1;
3575 /* Record the values of the earlyclobber operands for the caller. */
3576 if (goal_earlyclobber)
3577 for (i = 0; i < noperands; i++)
3578 if (goal_alternative_earlyclobber[i])
3579 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3581 /* Now record reloads for all the operands that need them. */
3582 for (i = 0; i < noperands; i++)
3583 if (! goal_alternative_win[i])
3585 /* Operands that match previous ones have already been handled. */
3586 if (goal_alternative_matches[i] >= 0)
3588 /* Handle an operand with a nonoffsettable address
3589 appearing where an offsettable address will do
3590 by reloading the address into a base register.
3592 ??? We can also do this when the operand is a register and
3593 reg_equiv_mem is not offsettable, but this is a bit tricky,
3594 so we don't bother with it. It may not be worth doing. */
3595 else if (goal_alternative_matched[i] == -1
3596 && goal_alternative_offmemok[i]
3597 && GET_CODE (recog_data.operand[i]) == MEM)
3599 operand_reloadnum[i]
3600 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3601 &XEXP (recog_data.operand[i], 0), NULL_PTR,
3603 GET_MODE (XEXP (recog_data.operand[i], 0)),
3604 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3605 rld[operand_reloadnum[i]].inc
3606 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3608 /* If this operand is an output, we will have made any
3609 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3610 now we are treating part of the operand as an input, so
3611 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3613 if (modified[i] == RELOAD_WRITE)
3615 for (j = 0; j < n_reloads; j++)
3617 if (rld[j].opnum == i)
3619 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3620 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3621 else if (rld[j].when_needed
3622 == RELOAD_FOR_OUTADDR_ADDRESS)
3623 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3628 else if (goal_alternative_matched[i] == -1)
3630 operand_reloadnum[i]
3631 = push_reload ((modified[i] != RELOAD_WRITE
3632 ? recog_data.operand[i] : 0),
3633 (modified[i] != RELOAD_READ
3634 ? recog_data.operand[i] : 0),
3635 (modified[i] != RELOAD_WRITE
3636 ? recog_data.operand_loc[i] : 0),
3637 (modified[i] != RELOAD_READ
3638 ? recog_data.operand_loc[i] : 0),
3639 (enum reg_class) goal_alternative[i],
3640 (modified[i] == RELOAD_WRITE
3641 ? VOIDmode : operand_mode[i]),
3642 (modified[i] == RELOAD_READ
3643 ? VOIDmode : operand_mode[i]),
3644 (insn_code_number < 0 ? 0
3645 : insn_data[insn_code_number].operand[i].strict_low),
3646 0, i, operand_type[i]);
3648 /* In a matching pair of operands, one must be input only
3649 and the other must be output only.
3650 Pass the input operand as IN and the other as OUT. */
3651 else if (modified[i] == RELOAD_READ
3652 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3654 operand_reloadnum[i]
3655 = push_reload (recog_data.operand[i],
3656 recog_data.operand[goal_alternative_matched[i]],
3657 recog_data.operand_loc[i],
3658 recog_data.operand_loc[goal_alternative_matched[i]],
3659 (enum reg_class) goal_alternative[i],
3661 operand_mode[goal_alternative_matched[i]],
3662 0, 0, i, RELOAD_OTHER);
3663 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3665 else if (modified[i] == RELOAD_WRITE
3666 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3668 operand_reloadnum[goal_alternative_matched[i]]
3669 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3670 recog_data.operand[i],
3671 recog_data.operand_loc[goal_alternative_matched[i]],
3672 recog_data.operand_loc[i],
3673 (enum reg_class) goal_alternative[i],
3674 operand_mode[goal_alternative_matched[i]],
3676 0, 0, i, RELOAD_OTHER);
3677 operand_reloadnum[i] = output_reloadnum;
3679 else if (insn_code_number >= 0)
3683 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3684 /* Avoid further trouble with this insn. */
3685 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3690 else if (goal_alternative_matched[i] < 0
3691 && goal_alternative_matches[i] < 0
3694 /* For each non-matching operand that's a MEM or a pseudo-register
3695 that didn't get a hard register, make an optional reload.
3696 This may get done even if the insn needs no reloads otherwise. */
3698 rtx operand = recog_data.operand[i];
3700 while (GET_CODE (operand) == SUBREG)
3701 operand = XEXP (operand, 0);
3702 if ((GET_CODE (operand) == MEM
3703 || (GET_CODE (operand) == REG
3704 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3705 /* If this is only for an output, the optional reload would not
3706 actually cause us to use a register now, just note that
3707 something is stored here. */
3708 && ((enum reg_class) goal_alternative[i] != NO_REGS
3709 || modified[i] == RELOAD_WRITE)
3710 && ! no_input_reloads
3711 /* An optional output reload might allow to delete INSN later.
3712 We mustn't make in-out reloads on insns that are not permitted
3714 If this is an asm, we can't delete it; we must not even call
3715 push_reload for an optional output reload in this case,
3716 because we can't be sure that the constraint allows a register,
3717 and push_reload verifies the constraints for asms. */
3718 && (modified[i] == RELOAD_READ
3719 || (! no_output_reloads && ! this_insn_is_asm)))
3720 operand_reloadnum[i]
3721 = push_reload ((modified[i] != RELOAD_WRITE
3722 ? recog_data.operand[i] : 0),
3723 (modified[i] != RELOAD_READ
3724 ? recog_data.operand[i] : 0),
3725 (modified[i] != RELOAD_WRITE
3726 ? recog_data.operand_loc[i] : 0),
3727 (modified[i] != RELOAD_READ
3728 ? recog_data.operand_loc[i] : 0),
3729 (enum reg_class) goal_alternative[i],
3730 (modified[i] == RELOAD_WRITE
3731 ? VOIDmode : operand_mode[i]),
3732 (modified[i] == RELOAD_READ
3733 ? VOIDmode : operand_mode[i]),
3734 (insn_code_number < 0 ? 0
3735 : insn_data[insn_code_number].operand[i].strict_low),
3736 1, i, operand_type[i]);
3737 /* If a memory reference remains (either as a MEM or a pseudo that
3738 did not get a hard register), yet we can't make an optional
3739 reload, check if this is actually a pseudo register reference;
3740 we then need to emit a USE and/or a CLOBBER so that reload
3741 inheritance will do the right thing. */
3743 && (GET_CODE (operand) == MEM
3744 || (GET_CODE (operand) == REG
3745 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3746 && reg_renumber [REGNO (operand)] < 0)))
3748 operand = *recog_data.operand_loc[i];
3750 while (GET_CODE (operand) == SUBREG)
3751 operand = XEXP (operand, 0);
3752 if (GET_CODE (operand) == REG)
3754 if (modified[i] != RELOAD_WRITE)
3755 emit_insn_before (gen_rtx_USE (VOIDmode, operand), insn);
3756 if (modified[i] != RELOAD_READ)
3757 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3761 else if (goal_alternative_matches[i] >= 0
3762 && goal_alternative_win[goal_alternative_matches[i]]
3763 && modified[i] == RELOAD_READ
3764 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3765 && ! no_input_reloads && ! no_output_reloads
3768 /* Similarly, make an optional reload for a pair of matching
3769 objects that are in MEM or a pseudo that didn't get a hard reg. */
3771 rtx operand = recog_data.operand[i];
3773 while (GET_CODE (operand) == SUBREG)
3774 operand = XEXP (operand, 0);
3775 if ((GET_CODE (operand) == MEM
3776 || (GET_CODE (operand) == REG
3777 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3778 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3780 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3781 = push_reload (recog_data.operand[goal_alternative_matches[i]],
3782 recog_data.operand[i],
3783 recog_data.operand_loc[goal_alternative_matches[i]],
3784 recog_data.operand_loc[i],
3785 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3786 operand_mode[goal_alternative_matches[i]],
3788 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3791 /* Perform whatever substitutions on the operands we are supposed
3792 to make due to commutativity or replacement of registers
3793 with equivalent constants or memory slots. */
3795 for (i = 0; i < noperands; i++)
3797 /* We only do this on the last pass through reload, because it is
3798 possible for some data (like reg_equiv_address) to be changed during
3799 later passes. Moreover, we loose the opportunity to get a useful
3800 reload_{in,out}_reg when we do these replacements. */
3804 rtx substitution = substed_operand[i];
3806 *recog_data.operand_loc[i] = substitution;
3808 /* If we're replacing an operand with a LABEL_REF, we need
3809 to make sure that there's a REG_LABEL note attached to
3810 this instruction. */
3811 if (GET_CODE (insn) != JUMP_INSN
3812 && GET_CODE (substitution) == LABEL_REF
3813 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
3814 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL,
3815 XEXP (substitution, 0),
3819 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
3822 /* If this insn pattern contains any MATCH_DUP's, make sure that
3823 they will be substituted if the operands they match are substituted.
3824 Also do now any substitutions we already did on the operands.
3826 Don't do this if we aren't making replacements because we might be
3827 propagating things allocated by frame pointer elimination into places
3828 it doesn't expect. */
3830 if (insn_code_number >= 0 && replace)
3831 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
3833 int opno = recog_data.dup_num[i];
3834 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
3835 if (operand_reloadnum[opno] >= 0)
3836 push_replacement (recog_data.dup_loc[i], operand_reloadnum[opno],
3837 insn_data[insn_code_number].operand[opno].mode);
3841 /* This loses because reloading of prior insns can invalidate the equivalence
3842 (or at least find_equiv_reg isn't smart enough to find it any more),
3843 causing this insn to need more reload regs than it needed before.
3844 It may be too late to make the reload regs available.
3845 Now this optimization is done safely in choose_reload_regs. */
3847 /* For each reload of a reg into some other class of reg,
3848 search for an existing equivalent reg (same value now) in the right class.
3849 We can use it as long as we don't need to change its contents. */
3850 for (i = 0; i < n_reloads; i++)
3851 if (rld[i].reg_rtx == 0
3853 && GET_CODE (rld[i].in) == REG
3857 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
3858 static_reload_reg_p, 0, rld[i].inmode);
3859 /* Prevent generation of insn to load the value
3860 because the one we found already has the value. */
3862 rld[i].in = rld[i].reg_rtx;
3866 /* Perhaps an output reload can be combined with another
3867 to reduce needs by one. */
3868 if (!goal_earlyclobber)
3871 /* If we have a pair of reloads for parts of an address, they are reloading
3872 the same object, the operands themselves were not reloaded, and they
3873 are for two operands that are supposed to match, merge the reloads and
3874 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3876 for (i = 0; i < n_reloads; i++)
3880 for (j = i + 1; j < n_reloads; j++)
3881 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
3882 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
3883 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3884 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3885 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
3886 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
3887 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3888 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3889 && rtx_equal_p (rld[i].in, rld[j].in)
3890 && (operand_reloadnum[rld[i].opnum] < 0
3891 || rld[operand_reloadnum[rld[i].opnum]].optional)
3892 && (operand_reloadnum[rld[j].opnum] < 0
3893 || rld[operand_reloadnum[rld[j].opnum]].optional)
3894 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
3895 || (goal_alternative_matches[rld[j].opnum]
3898 for (k = 0; k < n_replacements; k++)
3899 if (replacements[k].what == j)
3900 replacements[k].what = i;
3902 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3903 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3904 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
3906 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
3911 /* Scan all the reloads and update their type.
3912 If a reload is for the address of an operand and we didn't reload
3913 that operand, change the type. Similarly, change the operand number
3914 of a reload when two operands match. If a reload is optional, treat it
3915 as though the operand isn't reloaded.
3917 ??? This latter case is somewhat odd because if we do the optional
3918 reload, it means the object is hanging around. Thus we need only
3919 do the address reload if the optional reload was NOT done.
3921 Change secondary reloads to be the address type of their operand, not
3924 If an operand's reload is now RELOAD_OTHER, change any
3925 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3926 RELOAD_FOR_OTHER_ADDRESS. */
3928 for (i = 0; i < n_reloads; i++)
3930 if (rld[i].secondary_p
3931 && rld[i].when_needed == operand_type[rld[i].opnum])
3932 rld[i].when_needed = address_type[rld[i].opnum];
3934 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
3935 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
3936 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3937 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3938 && (operand_reloadnum[rld[i].opnum] < 0
3939 || rld[operand_reloadnum[rld[i].opnum]].optional))
3941 /* If we have a secondary reload to go along with this reload,
3942 change its type to RELOAD_FOR_OPADDR_ADDR. */
3944 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
3945 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
3946 && rld[i].secondary_in_reload != -1)
3948 int secondary_in_reload = rld[i].secondary_in_reload;
3950 rld[secondary_in_reload].when_needed
3951 = RELOAD_FOR_OPADDR_ADDR;
3953 /* If there's a tertiary reload we have to change it also. */
3954 if (secondary_in_reload > 0
3955 && rld[secondary_in_reload].secondary_in_reload != -1)
3956 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
3957 = RELOAD_FOR_OPADDR_ADDR;
3960 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
3961 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3962 && rld[i].secondary_out_reload != -1)
3964 int secondary_out_reload = rld[i].secondary_out_reload;
3966 rld[secondary_out_reload].when_needed
3967 = RELOAD_FOR_OPADDR_ADDR;
3969 /* If there's a tertiary reload we have to change it also. */
3970 if (secondary_out_reload
3971 && rld[secondary_out_reload].secondary_out_reload != -1)
3972 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
3973 = RELOAD_FOR_OPADDR_ADDR;
3976 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3977 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3978 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
3980 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
3983 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
3984 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
3985 && operand_reloadnum[rld[i].opnum] >= 0
3986 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
3988 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
3990 if (goal_alternative_matches[rld[i].opnum] >= 0)
3991 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
3994 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
3995 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
3996 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
3998 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
3999 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4000 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4001 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4002 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4003 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4004 This is complicated by the fact that a single operand can have more
4005 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4006 choose_reload_regs without affecting code quality, and cases that
4007 actually fail are extremely rare, so it turns out to be better to fix
4008 the problem here by not generating cases that choose_reload_regs will
4010 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4011 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4013 We can reduce the register pressure by exploiting that a
4014 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4015 does not conflict with any of them, if it is only used for the first of
4016 the RELOAD_FOR_X_ADDRESS reloads. */
4018 int first_op_addr_num = -2;
4019 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4020 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4022 /* We use last_op_addr_reload and the contents of the above arrays
4023 first as flags - -2 means no instance encountered, -1 means exactly
4024 one instance encountered.
4025 If more than one instance has been encountered, we store the reload
4026 number of the first reload of the kind in question; reload numbers
4027 are known to be non-negative. */
4028 for (i = 0; i < noperands; i++)
4029 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4030 for (i = n_reloads - 1; i >= 0; i--)
4032 switch (rld[i].when_needed)
4034 case RELOAD_FOR_OPERAND_ADDRESS:
4035 if (++first_op_addr_num >= 0)
4037 first_op_addr_num = i;
4041 case RELOAD_FOR_INPUT_ADDRESS:
4042 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4044 first_inpaddr_num[rld[i].opnum] = i;
4048 case RELOAD_FOR_OUTPUT_ADDRESS:
4049 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4051 first_outpaddr_num[rld[i].opnum] = i;
4062 for (i = 0; i < n_reloads; i++)
4065 enum reload_type type;
4067 switch (rld[i].when_needed)
4069 case RELOAD_FOR_OPADDR_ADDR:
4070 first_num = first_op_addr_num;
4071 type = RELOAD_FOR_OPERAND_ADDRESS;
4073 case RELOAD_FOR_INPADDR_ADDRESS:
4074 first_num = first_inpaddr_num[rld[i].opnum];
4075 type = RELOAD_FOR_INPUT_ADDRESS;
4077 case RELOAD_FOR_OUTADDR_ADDRESS:
4078 first_num = first_outpaddr_num[rld[i].opnum];
4079 type = RELOAD_FOR_OUTPUT_ADDRESS;
4086 else if (i > first_num)
4087 rld[i].when_needed = type;
4090 /* Check if the only TYPE reload that uses reload I is
4091 reload FIRST_NUM. */
4092 for (j = n_reloads - 1; j > first_num; j--)
4094 if (rld[j].when_needed == type
4095 && (rld[i].secondary_p
4096 ? rld[j].secondary_in_reload == i
4097 : reg_mentioned_p (rld[i].in, rld[j].in)))
4099 rld[i].when_needed = type;
4108 /* See if we have any reloads that are now allowed to be merged
4109 because we've changed when the reload is needed to
4110 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4111 check for the most common cases. */
4113 for (i = 0; i < n_reloads; i++)
4114 if (rld[i].in != 0 && rld[i].out == 0
4115 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4116 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4117 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4118 for (j = 0; j < n_reloads; j++)
4119 if (i != j && rld[j].in != 0 && rld[j].out == 0
4120 && rld[j].when_needed == rld[i].when_needed
4121 && MATCHES (rld[i].in, rld[j].in)
4122 && rld[i].class == rld[j].class
4123 && !rld[i].nocombine && !rld[j].nocombine
4124 && rld[i].reg_rtx == rld[j].reg_rtx)
4126 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4127 transfer_replacements (i, j);
4132 /* If we made any reloads for addresses, see if they violate a
4133 "no input reloads" requirement for this insn. But loads that we
4134 do after the insn (such as for output addresses) are fine. */
4135 if (no_input_reloads)
4136 for (i = 0; i < n_reloads; i++)
4138 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
4139 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS)
4143 /* Compute reload_mode and reload_nregs. */
4144 for (i = 0; i < n_reloads; i++)
4147 = (rld[i].inmode == VOIDmode
4148 || (GET_MODE_SIZE (rld[i].outmode)
4149 > GET_MODE_SIZE (rld[i].inmode)))
4150 ? rld[i].outmode : rld[i].inmode;
4152 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4158 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4159 accepts a memory operand with constant address. */
4162 alternative_allows_memconst (constraint, altnum)
4163 const char *constraint;
4167 /* Skip alternatives before the one requested. */
4170 while (*constraint++ != ',');
4173 /* Scan the requested alternative for 'm' or 'o'.
4174 If one of them is present, this alternative accepts memory constants. */
4175 while ((c = *constraint++) && c != ',' && c != '#')
4176 if (c == 'm' || c == 'o')
4181 /* Scan X for memory references and scan the addresses for reloading.
4182 Also checks for references to "constant" regs that we want to eliminate
4183 and replaces them with the values they stand for.
4184 We may alter X destructively if it contains a reference to such.
4185 If X is just a constant reg, we return the equivalent value
4188 IND_LEVELS says how many levels of indirect addressing this machine
4191 OPNUM and TYPE identify the purpose of the reload.
4193 IS_SET_DEST is true if X is the destination of a SET, which is not
4194 appropriate to be replaced by a constant.
4196 INSN, if nonzero, is the insn in which we do the reload. It is used
4197 to determine if we may generate output reloads, and where to put USEs
4198 for pseudos that we have to replace with stack slots.
4200 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4201 result of find_reloads_address. */
4204 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn,
4208 enum reload_type type;
4212 int *address_reloaded;
4214 register RTX_CODE code = GET_CODE (x);
4216 register const char *fmt = GET_RTX_FORMAT (code);
4222 /* This code is duplicated for speed in find_reloads. */
4223 register int regno = REGNO (x);
4224 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4225 x = reg_equiv_constant[regno];
4227 /* This creates (subreg (mem...)) which would cause an unnecessary
4228 reload of the mem. */
4229 else if (reg_equiv_mem[regno] != 0)
4230 x = reg_equiv_mem[regno];
4232 else if (reg_equiv_memory_loc[regno]
4233 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4235 rtx mem = make_memloc (x, regno);
4236 if (reg_equiv_address[regno]
4237 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4239 /* If this is not a toplevel operand, find_reloads doesn't see
4240 this substitution. We have to emit a USE of the pseudo so
4241 that delete_output_reload can see it. */
4242 if (replace_reloads && recog_data.operand[opnum] != x)
4243 emit_insn_before (gen_rtx_USE (VOIDmode, x), insn);
4245 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4246 opnum, type, ind_levels, insn);
4247 if (address_reloaded)
4248 *address_reloaded = i;
4257 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4258 opnum, type, ind_levels, insn);
4259 if (address_reloaded)
4260 *address_reloaded = i;
4265 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4267 /* Check for SUBREG containing a REG that's equivalent to a constant.
4268 If the constant has a known value, truncate it right now.
4269 Similarly if we are extracting a single-word of a multi-word
4270 constant. If the constant is symbolic, allow it to be substituted
4271 normally. push_reload will strip the subreg later. If the
4272 constant is VOIDmode, abort because we will lose the mode of
4273 the register (this should never happen because one of the cases
4274 above should handle it). */
4276 register int regno = REGNO (SUBREG_REG (x));
4279 if (subreg_lowpart_p (x)
4280 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4281 && reg_equiv_constant[regno] != 0
4282 && (tem = gen_lowpart_common (GET_MODE (x),
4283 reg_equiv_constant[regno])) != 0)
4286 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
4287 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4288 && reg_equiv_constant[regno] != 0
4289 && (tem = operand_subword (reg_equiv_constant[regno],
4291 GET_MODE (SUBREG_REG (x)))) != 0)
4293 /* TEM is now a word sized constant for the bits from X that
4294 we wanted. However, TEM may be the wrong representation.
4296 Use gen_lowpart_common to convert a CONST_INT into a
4297 CONST_DOUBLE and vice versa as needed according to by the mode
4299 tem = gen_lowpart_common (GET_MODE (x), tem);
4305 /* If the SUBREG is wider than a word, the above test will fail.
4306 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4307 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4308 a 32 bit target. We still can - and have to - handle this
4309 for non-paradoxical subregs of CONST_INTs. */
4310 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4311 && reg_equiv_constant[regno] != 0
4312 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT
4313 && (GET_MODE_SIZE (GET_MODE (x))
4314 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
4316 int shift = SUBREG_WORD (x) * BITS_PER_WORD;
4317 if (WORDS_BIG_ENDIAN)
4318 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
4319 - GET_MODE_BITSIZE (GET_MODE (x))
4321 /* Here we use the knowledge that CONST_INTs have a
4322 HOST_WIDE_INT field. */
4323 if (shift >= HOST_BITS_PER_WIDE_INT)
4324 shift = HOST_BITS_PER_WIDE_INT - 1;
4325 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift);
4328 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4329 && reg_equiv_constant[regno] != 0
4330 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
4333 /* If the subreg contains a reg that will be converted to a mem,
4334 convert the subreg to a narrower memref now.
4335 Otherwise, we would get (subreg (mem ...) ...),
4336 which would force reload of the mem.
4338 We also need to do this if there is an equivalent MEM that is
4339 not offsettable. In that case, alter_subreg would produce an
4340 invalid address on big-endian machines.
4342 For machines that extend byte loads, we must not reload using
4343 a wider mode if we have a paradoxical SUBREG. find_reloads will
4344 force a reload in that case. So we should not do anything here. */
4346 else if (regno >= FIRST_PSEUDO_REGISTER
4347 #ifdef LOAD_EXTEND_OP
4348 && (GET_MODE_SIZE (GET_MODE (x))
4349 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4351 && (reg_equiv_address[regno] != 0
4352 || (reg_equiv_mem[regno] != 0
4353 && (! strict_memory_address_p (GET_MODE (x),
4354 XEXP (reg_equiv_mem[regno], 0))
4355 || ! offsettable_memref_p (reg_equiv_mem[regno])
4356 || num_not_at_initial_offset))))
4357 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4360 else if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == MEM
4361 && (GET_MODE_SIZE (GET_MODE (x))
4362 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4363 && mode_dependent_address_p (XEXP (SUBREG_REG (x), 0)))
4365 /* A paradoxical subreg will simply have the mode of the access
4366 changed, so we need to reload such a memory operand to stabilize
4367 the meaning of the memory access. */
4368 enum machine_mode subreg_mode = GET_MODE (SUBREG_REG (x));
4371 push_reload (NULL_RTX, SUBREG_REG (x), NULL_PTR, &SUBREG_REG (x),
4372 find_valid_class (subreg_mode, SUBREG_WORD (x)),
4373 VOIDmode, subreg_mode, 0, 0, opnum, type);
4375 push_reload (SUBREG_REG (x), NULL_RTX, &SUBREG_REG (x), NULL_PTR,
4376 find_valid_class (subreg_mode, SUBREG_WORD (x)),
4377 subreg_mode, VOIDmode, 0, 0, opnum, type);
4380 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4384 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4385 ind_levels, is_set_dest, insn,
4387 /* If we have replaced a reg with it's equivalent memory loc -
4388 that can still be handled here e.g. if it's in a paradoxical
4389 subreg - we must make the change in a copy, rather than using
4390 a destructive change. This way, find_reloads can still elect
4391 not to do the change. */
4392 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4394 x = shallow_copy_rtx (x);
4397 XEXP (x, i) = new_part;
4403 /* Return a mem ref for the memory equivalent of reg REGNO.
4404 This mem ref is not shared with anything. */
4407 make_memloc (ad, regno)
4411 /* We must rerun eliminate_regs, in case the elimination
4412 offsets have changed. */
4414 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4416 /* If TEM might contain a pseudo, we must copy it to avoid
4417 modifying it when we do the substitution for the reload. */
4418 if (rtx_varies_p (tem))
4419 tem = copy_rtx (tem);
4421 tem = gen_rtx_MEM (GET_MODE (ad), tem);
4422 MEM_COPY_ATTRIBUTES (tem, reg_equiv_memory_loc[regno]);
4426 /* Record all reloads needed for handling memory address AD
4427 which appears in *LOC in a memory reference to mode MODE
4428 which itself is found in location *MEMREFLOC.
4429 Note that we take shortcuts assuming that no multi-reg machine mode
4430 occurs as part of an address.
4432 OPNUM and TYPE specify the purpose of this reload.
4434 IND_LEVELS says how many levels of indirect addressing this machine
4437 INSN, if nonzero, is the insn in which we do the reload. It is used
4438 to determine if we may generate output reloads, and where to put USEs
4439 for pseudos that we have to replace with stack slots.
4441 Value is nonzero if this address is reloaded or replaced as a whole.
4442 This is interesting to the caller if the address is an autoincrement.
4444 Note that there is no verification that the address will be valid after
4445 this routine does its work. Instead, we rely on the fact that the address
4446 was valid when reload started. So we need only undo things that reload
4447 could have broken. These are wrong register types, pseudos not allocated
4448 to a hard register, and frame pointer elimination. */
4451 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn)
4452 enum machine_mode mode;
4457 enum reload_type type;
4462 int removed_and = 0;
4465 /* If the address is a register, see if it is a legitimate address and
4466 reload if not. We first handle the cases where we need not reload
4467 or where we must reload in a non-standard way. */
4469 if (GET_CODE (ad) == REG)
4473 if (reg_equiv_constant[regno] != 0
4474 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
4476 *loc = ad = reg_equiv_constant[regno];
4480 tem = reg_equiv_memory_loc[regno];
4483 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4485 tem = make_memloc (ad, regno);
4486 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4488 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
4489 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
4492 /* We can avoid a reload if the register's equivalent memory
4493 expression is valid as an indirect memory address.
4494 But not all addresses are valid in a mem used as an indirect
4495 address: only reg or reg+constant. */
4498 && strict_memory_address_p (mode, tem)
4499 && (GET_CODE (XEXP (tem, 0)) == REG
4500 || (GET_CODE (XEXP (tem, 0)) == PLUS
4501 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4502 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4504 /* TEM is not the same as what we'll be replacing the
4505 pseudo with after reload, put a USE in front of INSN
4506 in the final reload pass. */
4508 && num_not_at_initial_offset
4509 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4512 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
4513 /* This doesn't really count as replacing the address
4514 as a whole, since it is still a memory access. */
4522 /* The only remaining case where we can avoid a reload is if this is a
4523 hard register that is valid as a base register and which is not the
4524 subject of a CLOBBER in this insn. */
4526 else if (regno < FIRST_PSEUDO_REGISTER
4527 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4528 && ! regno_clobbered_p (regno, this_insn))
4531 /* If we do not have one of the cases above, we must do the reload. */
4532 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
4533 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4537 if (strict_memory_address_p (mode, ad))
4539 /* The address appears valid, so reloads are not needed.
4540 But the address may contain an eliminable register.
4541 This can happen because a machine with indirect addressing
4542 may consider a pseudo register by itself a valid address even when
4543 it has failed to get a hard reg.
4544 So do a tree-walk to find and eliminate all such regs. */
4546 /* But first quickly dispose of a common case. */
4547 if (GET_CODE (ad) == PLUS
4548 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4549 && GET_CODE (XEXP (ad, 0)) == REG
4550 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4553 subst_reg_equivs_changed = 0;
4554 *loc = subst_reg_equivs (ad, insn);
4556 if (! subst_reg_equivs_changed)
4559 /* Check result for validity after substitution. */
4560 if (strict_memory_address_p (mode, ad))
4564 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4569 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4574 *memrefloc = copy_rtx (*memrefloc);
4575 XEXP (*memrefloc, 0) = ad;
4576 move_replacements (&ad, &XEXP (*memrefloc, 0));
4582 /* The address is not valid. We have to figure out why. First see if
4583 we have an outer AND and remove it if so. Then analyze what's inside. */
4585 if (GET_CODE (ad) == AND)
4588 loc = &XEXP (ad, 0);
4592 /* One possibility for why the address is invalid is that it is itself
4593 a MEM. This can happen when the frame pointer is being eliminated, a
4594 pseudo is not allocated to a hard register, and the offset between the
4595 frame and stack pointers is not its initial value. In that case the
4596 pseudo will have been replaced by a MEM referring to the
4598 if (GET_CODE (ad) == MEM)
4600 /* First ensure that the address in this MEM is valid. Then, unless
4601 indirect addresses are valid, reload the MEM into a register. */
4603 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4604 opnum, ADDR_TYPE (type),
4605 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4607 /* If tem was changed, then we must create a new memory reference to
4608 hold it and store it back into memrefloc. */
4609 if (tem != ad && memrefloc)
4611 *memrefloc = copy_rtx (*memrefloc);
4612 copy_replacements (tem, XEXP (*memrefloc, 0));
4613 loc = &XEXP (*memrefloc, 0);
4615 loc = &XEXP (*loc, 0);
4618 /* Check similar cases as for indirect addresses as above except
4619 that we can allow pseudos and a MEM since they should have been
4620 taken care of above. */
4623 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4624 || GET_CODE (XEXP (tem, 0)) == MEM
4625 || ! (GET_CODE (XEXP (tem, 0)) == REG
4626 || (GET_CODE (XEXP (tem, 0)) == PLUS
4627 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4628 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4630 /* Must use TEM here, not AD, since it is the one that will
4631 have any subexpressions reloaded, if needed. */
4632 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4633 BASE_REG_CLASS, GET_MODE (tem),
4636 return ! removed_and;
4642 /* If we have address of a stack slot but it's not valid because the
4643 displacement is too large, compute the sum in a register.
4644 Handle all base registers here, not just fp/ap/sp, because on some
4645 targets (namely SH) we can also get too large displacements from
4646 big-endian corrections. */
4647 else if (GET_CODE (ad) == PLUS
4648 && GET_CODE (XEXP (ad, 0)) == REG
4649 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4650 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4651 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4653 /* Unshare the MEM rtx so we can safely alter it. */
4656 *memrefloc = copy_rtx (*memrefloc);
4657 loc = &XEXP (*memrefloc, 0);
4659 loc = &XEXP (*loc, 0);
4662 if (double_reg_address_ok)
4664 /* Unshare the sum as well. */
4665 *loc = ad = copy_rtx (ad);
4667 /* Reload the displacement into an index reg.
4668 We assume the frame pointer or arg pointer is a base reg. */
4669 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4670 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4676 /* If the sum of two regs is not necessarily valid,
4677 reload the sum into a base reg.
4678 That will at least work. */
4679 find_reloads_address_part (ad, loc, BASE_REG_CLASS,
4680 Pmode, opnum, type, ind_levels);
4682 return ! removed_and;
4685 /* If we have an indexed stack slot, there are three possible reasons why
4686 it might be invalid: The index might need to be reloaded, the address
4687 might have been made by frame pointer elimination and hence have a
4688 constant out of range, or both reasons might apply.
4690 We can easily check for an index needing reload, but even if that is the
4691 case, we might also have an invalid constant. To avoid making the
4692 conservative assumption and requiring two reloads, we see if this address
4693 is valid when not interpreted strictly. If it is, the only problem is
4694 that the index needs a reload and find_reloads_address_1 will take care
4697 If we decide to do something here, it must be that
4698 `double_reg_address_ok' is true and that this address rtl was made by
4699 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4700 rework the sum so that the reload register will be added to the index.
4701 This is safe because we know the address isn't shared.
4703 We check for fp/ap/sp as both the first and second operand of the
4706 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4707 && GET_CODE (XEXP (ad, 0)) == PLUS
4708 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4709 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4710 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4712 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4713 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4715 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4716 && ! memory_address_p (mode, ad))
4718 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4719 plus_constant (XEXP (XEXP (ad, 0), 0),
4720 INTVAL (XEXP (ad, 1))),
4721 XEXP (XEXP (ad, 0), 1));
4722 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4723 GET_MODE (ad), opnum, type, ind_levels);
4724 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4730 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4731 && GET_CODE (XEXP (ad, 0)) == PLUS
4732 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4733 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4734 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4736 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4737 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4739 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4740 && ! memory_address_p (mode, ad))
4742 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4743 XEXP (XEXP (ad, 0), 0),
4744 plus_constant (XEXP (XEXP (ad, 0), 1),
4745 INTVAL (XEXP (ad, 1))));
4746 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), BASE_REG_CLASS,
4747 GET_MODE (ad), opnum, type, ind_levels);
4748 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4754 /* See if address becomes valid when an eliminable register
4755 in a sum is replaced. */
4758 if (GET_CODE (ad) == PLUS)
4759 tem = subst_indexed_address (ad);
4760 if (tem != ad && strict_memory_address_p (mode, tem))
4762 /* Ok, we win that way. Replace any additional eliminable
4765 subst_reg_equivs_changed = 0;
4766 tem = subst_reg_equivs (tem, insn);
4768 /* Make sure that didn't make the address invalid again. */
4770 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4777 /* If constants aren't valid addresses, reload the constant address
4779 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4781 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4782 Unshare it so we can safely alter it. */
4783 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4784 && CONSTANT_POOL_ADDRESS_P (ad))
4786 *memrefloc = copy_rtx (*memrefloc);
4787 loc = &XEXP (*memrefloc, 0);
4789 loc = &XEXP (*loc, 0);
4792 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
4794 return ! removed_and;
4797 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
4801 /* Find all pseudo regs appearing in AD
4802 that are eliminable in favor of equivalent values
4803 and do not have hard regs; replace them by their equivalents.
4804 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4805 front of it for pseudos that we have to replace with stack slots. */
4808 subst_reg_equivs (ad, insn)
4812 register RTX_CODE code = GET_CODE (ad);
4814 register const char *fmt;
4830 register int regno = REGNO (ad);
4832 if (reg_equiv_constant[regno] != 0)
4834 subst_reg_equivs_changed = 1;
4835 return reg_equiv_constant[regno];
4837 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
4839 rtx mem = make_memloc (ad, regno);
4840 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
4842 subst_reg_equivs_changed = 1;
4843 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
4851 /* Quickly dispose of a common case. */
4852 if (XEXP (ad, 0) == frame_pointer_rtx
4853 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4861 fmt = GET_RTX_FORMAT (code);
4862 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4864 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
4868 /* Compute the sum of X and Y, making canonicalizations assumed in an
4869 address, namely: sum constant integers, surround the sum of two
4870 constants with a CONST, put the constant as the second operand, and
4871 group the constant on the outermost sum.
4873 This routine assumes both inputs are already in canonical form. */
4880 enum machine_mode mode = GET_MODE (x);
4882 if (mode == VOIDmode)
4883 mode = GET_MODE (y);
4885 if (mode == VOIDmode)
4888 if (GET_CODE (x) == CONST_INT)
4889 return plus_constant (y, INTVAL (x));
4890 else if (GET_CODE (y) == CONST_INT)
4891 return plus_constant (x, INTVAL (y));
4892 else if (CONSTANT_P (x))
4893 tem = x, x = y, y = tem;
4895 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
4896 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
4898 /* Note that if the operands of Y are specified in the opposite
4899 order in the recursive calls below, infinite recursion will occur. */
4900 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
4901 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
4903 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4904 constant will have been placed second. */
4905 if (CONSTANT_P (x) && CONSTANT_P (y))
4907 if (GET_CODE (x) == CONST)
4909 if (GET_CODE (y) == CONST)
4912 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
4915 return gen_rtx_PLUS (mode, x, y);
4918 /* If ADDR is a sum containing a pseudo register that should be
4919 replaced with a constant (from reg_equiv_constant),
4920 return the result of doing so, and also apply the associative
4921 law so that the result is more likely to be a valid address.
4922 (But it is not guaranteed to be one.)
4924 Note that at most one register is replaced, even if more are
4925 replaceable. Also, we try to put the result into a canonical form
4926 so it is more likely to be a valid address.
4928 In all other cases, return ADDR. */
4931 subst_indexed_address (addr)
4934 rtx op0 = 0, op1 = 0, op2 = 0;
4938 if (GET_CODE (addr) == PLUS)
4940 /* Try to find a register to replace. */
4941 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
4942 if (GET_CODE (op0) == REG
4943 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
4944 && reg_renumber[regno] < 0
4945 && reg_equiv_constant[regno] != 0)
4946 op0 = reg_equiv_constant[regno];
4947 else if (GET_CODE (op1) == REG
4948 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
4949 && reg_renumber[regno] < 0
4950 && reg_equiv_constant[regno] != 0)
4951 op1 = reg_equiv_constant[regno];
4952 else if (GET_CODE (op0) == PLUS
4953 && (tem = subst_indexed_address (op0)) != op0)
4955 else if (GET_CODE (op1) == PLUS
4956 && (tem = subst_indexed_address (op1)) != op1)
4961 /* Pick out up to three things to add. */
4962 if (GET_CODE (op1) == PLUS)
4963 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
4964 else if (GET_CODE (op0) == PLUS)
4965 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4967 /* Compute the sum. */
4969 op1 = form_sum (op1, op2);
4971 op0 = form_sum (op0, op1);
4978 /* Record the pseudo registers we must reload into hard registers in a
4979 subexpression of a would-be memory address, X referring to a value
4980 in mode MODE. (This function is not called if the address we find
4983 CONTEXT = 1 means we are considering regs as index regs,
4984 = 0 means we are considering them as base regs.
4986 OPNUM and TYPE specify the purpose of any reloads made.
4988 IND_LEVELS says how many levels of indirect addressing are
4989 supported at this point in the address.
4991 INSN, if nonzero, is the insn in which we do the reload. It is used
4992 to determine if we may generate output reloads.
4994 We return nonzero if X, as a whole, is reloaded or replaced. */
4996 /* Note that we take shortcuts assuming that no multi-reg machine mode
4997 occurs as part of an address.
4998 Also, this is not fully machine-customizable; it works for machines
4999 such as vaxes and 68000's and 32000's, but other possible machines
5000 could have addressing modes that this does not handle right. */
5003 find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
5004 enum machine_mode mode;
5009 enum reload_type type;
5013 register RTX_CODE code = GET_CODE (x);
5019 register rtx orig_op0 = XEXP (x, 0);
5020 register rtx orig_op1 = XEXP (x, 1);
5021 register RTX_CODE code0 = GET_CODE (orig_op0);
5022 register RTX_CODE code1 = GET_CODE (orig_op1);
5023 register rtx op0 = orig_op0;
5024 register rtx op1 = orig_op1;
5026 if (GET_CODE (op0) == SUBREG)
5028 op0 = SUBREG_REG (op0);
5029 code0 = GET_CODE (op0);
5030 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5031 op0 = gen_rtx_REG (word_mode,
5032 REGNO (op0) + SUBREG_WORD (orig_op0));
5035 if (GET_CODE (op1) == SUBREG)
5037 op1 = SUBREG_REG (op1);
5038 code1 = GET_CODE (op1);
5039 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5040 op1 = gen_rtx_REG (GET_MODE (op1),
5041 REGNO (op1) + SUBREG_WORD (orig_op1));
5044 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5045 || code0 == ZERO_EXTEND || code1 == MEM)
5047 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5048 type, ind_levels, insn);
5049 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5050 type, ind_levels, insn);
5053 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5054 || code1 == ZERO_EXTEND || code0 == MEM)
5056 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5057 type, ind_levels, insn);
5058 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5059 type, ind_levels, insn);
5062 else if (code0 == CONST_INT || code0 == CONST
5063 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5064 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5065 type, ind_levels, insn);
5067 else if (code1 == CONST_INT || code1 == CONST
5068 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5069 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5070 type, ind_levels, insn);
5072 else if (code0 == REG && code1 == REG)
5074 if (REG_OK_FOR_INDEX_P (op0)
5075 && REG_MODE_OK_FOR_BASE_P (op1, mode))
5077 else if (REG_OK_FOR_INDEX_P (op1)
5078 && REG_MODE_OK_FOR_BASE_P (op0, mode))
5080 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5081 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5082 type, ind_levels, insn);
5083 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5084 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5085 type, ind_levels, insn);
5086 else if (REG_OK_FOR_INDEX_P (op1))
5087 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5088 type, ind_levels, insn);
5089 else if (REG_OK_FOR_INDEX_P (op0))
5090 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5091 type, ind_levels, insn);
5094 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5095 type, ind_levels, insn);
5096 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5097 type, ind_levels, insn);
5101 else if (code0 == REG)
5103 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5104 type, ind_levels, insn);
5105 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5106 type, ind_levels, insn);
5109 else if (code1 == REG)
5111 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5112 type, ind_levels, insn);
5113 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5114 type, ind_levels, insn);
5123 rtx op0 = XEXP (x, 0);
5124 rtx op1 = XEXP (x, 1);
5126 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5129 /* Currently, we only support {PRE,POST}_MODIFY constructs
5130 where a base register is {inc,dec}remented by the contents
5131 of another register or by a constant value. Thus, these
5132 operands must match. */
5133 if (op0 != XEXP (op1, 0))
5136 /* Require index register (or constant). Let's just handle the
5137 register case in the meantime... If the target allows
5138 auto-modify by a constant then we could try replacing a pseudo
5139 register with its equivalent constant where applicable. */
5140 if (REG_P (XEXP (op1, 1)))
5141 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5142 find_reloads_address_1 (mode, XEXP (op1, 1), 1, &XEXP (op1, 1),
5143 opnum, type, ind_levels, insn);
5145 if (REG_P (XEXP (op1, 0)))
5147 register int regno = REGNO (XEXP (op1, 0));
5149 /* A register that is incremented cannot be constant! */
5150 if (regno >= FIRST_PSEUDO_REGISTER
5151 && reg_equiv_constant[regno] != 0)
5154 /* Handle a register that is equivalent to a memory location
5155 which cannot be addressed directly. */
5156 if (reg_equiv_memory_loc[regno] != 0
5157 && (reg_equiv_address[regno] != 0
5158 || num_not_at_initial_offset))
5160 rtx tem = make_memloc (XEXP (x, 0), regno);
5162 if (reg_equiv_address[regno]
5163 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5165 /* First reload the memory location's address.
5166 We can't use ADDR_TYPE (type) here, because we need to
5167 write back the value after reading it, hence we actually
5168 need two registers. */
5169 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
5170 &XEXP (tem, 0), opnum, type,
5173 /* Then reload the memory location into a base
5175 push_reload (tem, tem, &XEXP (x, 0), &XEXP (op1, 0),
5176 BASE_REG_CLASS, GET_MODE (x), GET_MODE (x),
5177 0, 0, opnum, RELOAD_OTHER);
5182 if (reg_renumber[regno] >= 0)
5183 regno = reg_renumber[regno];
5185 /* We require a base register here... */
5186 if (!REGNO_MODE_OK_FOR_BASE_P (regno, GET_MODE (x)))
5188 push_reload (XEXP (op1, 0), XEXP (x, 0),
5189 &XEXP (op1, 0), &XEXP (x, 0),
5191 GET_MODE (x), GET_MODE (x), 0, 0,
5192 opnum, RELOAD_OTHER);
5204 if (GET_CODE (XEXP (x, 0)) == REG)
5206 register int regno = REGNO (XEXP (x, 0));
5210 /* A register that is incremented cannot be constant! */
5211 if (regno >= FIRST_PSEUDO_REGISTER
5212 && reg_equiv_constant[regno] != 0)
5215 /* Handle a register that is equivalent to a memory location
5216 which cannot be addressed directly. */
5217 if (reg_equiv_memory_loc[regno] != 0
5218 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5220 rtx tem = make_memloc (XEXP (x, 0), regno);
5221 if (reg_equiv_address[regno]
5222 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5224 /* First reload the memory location's address.
5225 We can't use ADDR_TYPE (type) here, because we need to
5226 write back the value after reading it, hence we actually
5227 need two registers. */
5228 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5229 &XEXP (tem, 0), opnum, type,
5231 /* Put this inside a new increment-expression. */
5232 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5233 /* Proceed to reload that, as if it contained a register. */
5237 /* If we have a hard register that is ok as an index,
5238 don't make a reload. If an autoincrement of a nice register
5239 isn't "valid", it must be that no autoincrement is "valid".
5240 If that is true and something made an autoincrement anyway,
5241 this must be a special context where one is allowed.
5242 (For example, a "push" instruction.)
5243 We can't improve this address, so leave it alone. */
5245 /* Otherwise, reload the autoincrement into a suitable hard reg
5246 and record how much to increment by. */
5248 if (reg_renumber[regno] >= 0)
5249 regno = reg_renumber[regno];
5250 if ((regno >= FIRST_PSEUDO_REGISTER
5251 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5252 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5259 /* If we can output the register afterwards, do so, this
5260 saves the extra update.
5261 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5262 CALL_INSN - and it does not set CC0.
5263 But don't do this if we cannot directly address the
5264 memory location, since this will make it harder to
5265 reuse address reloads, and increases register pressure.
5266 Also don't do this if we can probably update x directly. */
5267 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM
5269 : reg_equiv_mem[regno]);
5270 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5271 if (insn && GET_CODE (insn) == INSN && equiv
5272 && memory_operand (equiv, GET_MODE (equiv))
5274 && ! sets_cc0_p (PATTERN (insn))
5276 && ! (icode != CODE_FOR_nothing
5277 && ((*insn_data[icode].operand[0].predicate)
5279 && ((*insn_data[icode].operand[1].predicate)
5285 = push_reload (x, x, loc, loc,
5286 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5287 GET_MODE (x), GET_MODE (x), 0, 0,
5288 opnum, RELOAD_OTHER);
5290 /* If we created a new MEM based on reg_equiv_mem[REGNO], then
5291 LOC above is part of the new MEM, not the MEM in INSN.
5293 We must also replace the address of the MEM in INSN. */
5294 if (&XEXP (x_orig, 0) != loc)
5295 push_replacement (&XEXP (x_orig, 0), reloadnum, VOIDmode);
5301 = push_reload (x, NULL_RTX, loc, NULL_PTR,
5302 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5303 GET_MODE (x), GET_MODE (x), 0, 0,
5306 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5312 /* Update the REG_INC notes. */
5314 for (link = REG_NOTES (this_insn);
5315 link; link = XEXP (link, 1))
5316 if (REG_NOTE_KIND (link) == REG_INC
5317 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
5318 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5324 else if (GET_CODE (XEXP (x, 0)) == MEM)
5326 /* This is probably the result of a substitution, by eliminate_regs,
5327 of an equivalent address for a pseudo that was not allocated to a
5328 hard register. Verify that the specified address is valid and
5329 reload it into a register. */
5330 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5331 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5335 /* Since we know we are going to reload this item, don't decrement
5336 for the indirection level.
5338 Note that this is actually conservative: it would be slightly
5339 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5341 /* We can't use ADDR_TYPE (type) here, because we need to
5342 write back the value after reading it, hence we actually
5343 need two registers. */
5344 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5345 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5346 opnum, type, ind_levels, insn);
5348 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
5349 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5350 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5352 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5354 link = FIND_REG_INC_NOTE (this_insn, tem);
5356 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5363 /* This is probably the result of a substitution, by eliminate_regs, of
5364 an equivalent address for a pseudo that was not allocated to a hard
5365 register. Verify that the specified address is valid and reload it
5368 Since we know we are going to reload this item, don't decrement for
5369 the indirection level.
5371 Note that this is actually conservative: it would be slightly more
5372 efficient to use the value of SPILL_INDIRECT_LEVELS from
5375 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5376 opnum, ADDR_TYPE (type), ind_levels, insn);
5377 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
5378 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5379 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5384 register int regno = REGNO (x);
5386 if (reg_equiv_constant[regno] != 0)
5388 find_reloads_address_part (reg_equiv_constant[regno], loc,
5389 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5390 GET_MODE (x), opnum, type, ind_levels);
5394 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5395 that feeds this insn. */
5396 if (reg_equiv_mem[regno] != 0)
5398 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
5399 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5400 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5405 if (reg_equiv_memory_loc[regno]
5406 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5408 rtx tem = make_memloc (x, regno);
5409 if (reg_equiv_address[regno] != 0
5410 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5413 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5414 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5419 if (reg_renumber[regno] >= 0)
5420 regno = reg_renumber[regno];
5422 if ((regno >= FIRST_PSEUDO_REGISTER
5423 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5424 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5426 push_reload (x, NULL_RTX, loc, NULL_PTR,
5427 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5428 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5432 /* If a register appearing in an address is the subject of a CLOBBER
5433 in this insn, reload it into some other register to be safe.
5434 The CLOBBER is supposed to make the register unavailable
5435 from before this insn to after it. */
5436 if (regno_clobbered_p (regno, this_insn))
5438 push_reload (x, NULL_RTX, loc, NULL_PTR,
5439 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5440 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5447 if (GET_CODE (SUBREG_REG (x)) == REG)
5449 /* If this is a SUBREG of a hard register and the resulting register
5450 is of the wrong class, reload the whole SUBREG. This avoids
5451 needless copies if SUBREG_REG is multi-word. */
5452 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5454 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5456 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5457 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5459 push_reload (x, NULL_RTX, loc, NULL_PTR,
5460 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5461 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5465 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5466 is larger than the class size, then reload the whole SUBREG. */
5469 enum reg_class class = (context ? INDEX_REG_CLASS
5471 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5472 > reg_class_size[class])
5474 x = find_reloads_subreg_address (x, 0, opnum, type,
5476 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5477 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5489 register const char *fmt = GET_RTX_FORMAT (code);
5492 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5495 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5496 opnum, type, ind_levels, insn);
5503 /* X, which is found at *LOC, is a part of an address that needs to be
5504 reloaded into a register of class CLASS. If X is a constant, or if
5505 X is a PLUS that contains a constant, check that the constant is a
5506 legitimate operand and that we are supposed to be able to load
5507 it into the register.
5509 If not, force the constant into memory and reload the MEM instead.
5511 MODE is the mode to use, in case X is an integer constant.
5513 OPNUM and TYPE describe the purpose of any reloads made.
5515 IND_LEVELS says how many levels of indirect addressing this machine
5519 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
5522 enum reg_class class;
5523 enum machine_mode mode;
5525 enum reload_type type;
5529 && (! LEGITIMATE_CONSTANT_P (x)
5530 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5534 /* If this is a CONST_INT, it could have been created by a
5535 plus_constant call in eliminate_regs, which means it may be
5536 on the reload_obstack. reload_obstack will be freed later, so
5537 we can't allow such RTL to be put in the constant pool. There
5538 is code in force_const_mem to check for this case, but it doesn't
5539 work because we have already popped off the reload_obstack, so
5540 rtl_obstack == saveable_obstack is true at this point. */
5541 if (GET_CODE (x) == CONST_INT)
5542 tem = x = force_const_mem (mode, GEN_INT (INTVAL (x)));
5544 tem = x = force_const_mem (mode, x);
5546 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5547 opnum, type, ind_levels, 0);
5550 else if (GET_CODE (x) == PLUS
5551 && CONSTANT_P (XEXP (x, 1))
5552 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5553 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5557 /* See comment above. */
5558 if (GET_CODE (XEXP (x, 1)) == CONST_INT)
5559 tem = force_const_mem (GET_MODE (x), GEN_INT (INTVAL (XEXP (x, 1))));
5561 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5563 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5564 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5565 opnum, type, ind_levels, 0);
5568 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5569 mode, VOIDmode, 0, 0, opnum, type);
5572 /* X, a subreg of a pseudo, is a part of an address that needs to be
5575 If the pseudo is equivalent to a memory location that cannot be directly
5576 addressed, make the necessary address reloads.
5578 If address reloads have been necessary, or if the address is changed
5579 by register elimination, return the rtx of the memory location;
5580 otherwise, return X.
5582 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5585 OPNUM and TYPE identify the purpose of the reload.
5587 IND_LEVELS says how many levels of indirect addressing are
5588 supported at this point in the address.
5590 INSN, if nonzero, is the insn in which we do the reload. It is used
5591 to determine where to put USEs for pseudos that we have to replace with
5595 find_reloads_subreg_address (x, force_replace, opnum, type,
5600 enum reload_type type;
5604 int regno = REGNO (SUBREG_REG (x));
5606 if (reg_equiv_memory_loc[regno])
5608 /* If the address is not directly addressable, or if the address is not
5609 offsettable, then it must be replaced. */
5611 && (reg_equiv_address[regno]
5612 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5615 if (force_replace || num_not_at_initial_offset)
5617 rtx tem = make_memloc (SUBREG_REG (x), regno);
5619 /* If the address changes because of register elimination, then
5620 it must be replaced. */
5622 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5624 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
5626 if (BYTES_BIG_ENDIAN)
5630 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5631 offset += MIN (size, UNITS_PER_WORD);
5632 size = GET_MODE_SIZE (GET_MODE (x));
5633 offset -= MIN (size, UNITS_PER_WORD);
5635 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5636 PUT_MODE (tem, GET_MODE (x));
5637 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5638 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
5640 /* If this is not a toplevel operand, find_reloads doesn't see
5641 this substitution. We have to emit a USE of the pseudo so
5642 that delete_output_reload can see it. */
5643 if (replace_reloads && recog_data.operand[opnum] != x)
5644 emit_insn_before (gen_rtx_USE (VOIDmode, SUBREG_REG (x)), insn);
5652 /* Substitute into the current INSN the registers into which we have reloaded
5653 the things that need reloading. The array `replacements'
5654 contains the locations of all pointers that must be changed
5655 and says what to replace them with.
5657 Return the rtx that X translates into; usually X, but modified. */
5664 for (i = 0; i < n_replacements; i++)
5666 register struct replacement *r = &replacements[i];
5667 register rtx reloadreg = rld[r->what].reg_rtx;
5670 /* Encapsulate RELOADREG so its machine mode matches what
5671 used to be there. Note that gen_lowpart_common will
5672 do the wrong thing if RELOADREG is multi-word. RELOADREG
5673 will always be a REG here. */
5674 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5675 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5677 /* If we are putting this into a SUBREG and RELOADREG is a
5678 SUBREG, we would be making nested SUBREGs, so we have to fix
5679 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5681 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5683 if (GET_MODE (*r->subreg_loc)
5684 == GET_MODE (SUBREG_REG (reloadreg)))
5685 *r->subreg_loc = SUBREG_REG (reloadreg);
5688 *r->where = SUBREG_REG (reloadreg);
5689 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
5693 *r->where = reloadreg;
5695 /* If reload got no reg and isn't optional, something's wrong. */
5696 else if (! rld[r->what].optional)
5701 /* Make a copy of any replacements being done into X and move those copies
5702 to locations in Y, a copy of X. We only look at the highest level of
5706 copy_replacements (x, y)
5711 enum rtx_code code = GET_CODE (x);
5712 const char *fmt = GET_RTX_FORMAT (code);
5713 struct replacement *r;
5715 /* We can't support X being a SUBREG because we might then need to know its
5716 location if something inside it was replaced. */
5720 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5722 for (j = 0; j < n_replacements; j++)
5724 if (replacements[j].subreg_loc == &XEXP (x, i))
5726 r = &replacements[n_replacements++];
5727 r->where = replacements[j].where;
5728 r->subreg_loc = &XEXP (y, i);
5729 r->what = replacements[j].what;
5730 r->mode = replacements[j].mode;
5732 else if (replacements[j].where == &XEXP (x, i))
5734 r = &replacements[n_replacements++];
5735 r->where = &XEXP (y, i);
5737 r->what = replacements[j].what;
5738 r->mode = replacements[j].mode;
5743 /* Change any replacements being done to *X to be done to *Y */
5746 move_replacements (x, y)
5752 for (i = 0; i < n_replacements; i++)
5753 if (replacements[i].subreg_loc == x)
5754 replacements[i].subreg_loc = y;
5755 else if (replacements[i].where == x)
5757 replacements[i].where = y;
5758 replacements[i].subreg_loc = 0;
5762 /* If LOC was scheduled to be replaced by something, return the replacement.
5763 Otherwise, return *LOC. */
5766 find_replacement (loc)
5769 struct replacement *r;
5771 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
5773 rtx reloadreg = rld[r->what].reg_rtx;
5775 if (reloadreg && r->where == loc)
5777 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
5778 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5782 else if (reloadreg && r->subreg_loc == loc)
5784 /* RELOADREG must be either a REG or a SUBREG.
5786 ??? Is it actually still ever a SUBREG? If so, why? */
5788 if (GET_CODE (reloadreg) == REG)
5789 return gen_rtx_REG (GET_MODE (*loc),
5790 REGNO (reloadreg) + SUBREG_WORD (*loc));
5791 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
5794 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
5795 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
5799 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5800 what's inside and make a new rtl if so. */
5801 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
5802 || GET_CODE (*loc) == MULT)
5804 rtx x = find_replacement (&XEXP (*loc, 0));
5805 rtx y = find_replacement (&XEXP (*loc, 1));
5807 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
5808 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
5814 /* Return nonzero if register in range [REGNO, ENDREGNO)
5815 appears either explicitly or implicitly in X
5816 other than being stored into (except for earlyclobber operands).
5818 References contained within the substructure at LOC do not count.
5819 LOC may be zero, meaning don't ignore anything.
5821 This is similar to refers_to_regno_p in rtlanal.c except that we
5822 look at equivalences for pseudos that didn't get hard registers. */
5825 refers_to_regno_for_reload_p (regno, endregno, x, loc)
5826 unsigned int regno, endregno;
5839 code = GET_CODE (x);
5846 /* If this is a pseudo, a hard register must not have been allocated.
5847 X must therefore either be a constant or be in memory. */
5848 if (r >= FIRST_PSEUDO_REGISTER)
5850 if (reg_equiv_memory_loc[r])
5851 return refers_to_regno_for_reload_p (regno, endregno,
5852 reg_equiv_memory_loc[r],
5855 if (reg_equiv_constant[r])
5861 return (endregno > r
5862 && regno < r + (r < FIRST_PSEUDO_REGISTER
5863 ? HARD_REGNO_NREGS (r, GET_MODE (x))
5867 /* If this is a SUBREG of a hard reg, we can see exactly which
5868 registers are being modified. Otherwise, handle normally. */
5869 if (GET_CODE (SUBREG_REG (x)) == REG
5870 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5872 unsigned int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5873 unsigned int inner_endregno
5874 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
5875 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5877 return endregno > inner_regno && regno < inner_endregno;
5883 if (&SET_DEST (x) != loc
5884 /* Note setting a SUBREG counts as referring to the REG it is in for
5885 a pseudo but not for hard registers since we can
5886 treat each word individually. */
5887 && ((GET_CODE (SET_DEST (x)) == SUBREG
5888 && loc != &SUBREG_REG (SET_DEST (x))
5889 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
5890 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
5891 && refers_to_regno_for_reload_p (regno, endregno,
5892 SUBREG_REG (SET_DEST (x)),
5894 /* If the output is an earlyclobber operand, this is
5896 || ((GET_CODE (SET_DEST (x)) != REG
5897 || earlyclobber_operand_p (SET_DEST (x)))
5898 && refers_to_regno_for_reload_p (regno, endregno,
5899 SET_DEST (x), loc))))
5902 if (code == CLOBBER || loc == &SET_SRC (x))
5911 /* X does not match, so try its subexpressions. */
5913 fmt = GET_RTX_FORMAT (code);
5914 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5916 if (fmt[i] == 'e' && loc != &XEXP (x, i))
5924 if (refers_to_regno_for_reload_p (regno, endregno,
5928 else if (fmt[i] == 'E')
5931 for (j = XVECLEN (x, i) - 1; j >=0; j--)
5932 if (loc != &XVECEXP (x, i, j)
5933 && refers_to_regno_for_reload_p (regno, endregno,
5934 XVECEXP (x, i, j), loc))
5941 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5942 we check if any register number in X conflicts with the relevant register
5943 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5944 contains a MEM (we don't bother checking for memory addresses that can't
5945 conflict because we expect this to be a rare case.
5947 This function is similar to reg_overlap_mention_p in rtlanal.c except
5948 that we look at equivalences for pseudos that didn't get hard registers. */
5951 reg_overlap_mentioned_for_reload_p (x, in)
5954 int regno, endregno;
5956 /* Overly conservative. */
5957 if (GET_CODE (x) == STRICT_LOW_PART)
5960 /* If either argument is a constant, then modifying X can not affect IN. */
5961 if (CONSTANT_P (x) || CONSTANT_P (in))
5963 else if (GET_CODE (x) == SUBREG)
5965 regno = REGNO (SUBREG_REG (x));
5966 if (regno < FIRST_PSEUDO_REGISTER)
5967 regno += SUBREG_WORD (x);
5969 else if (GET_CODE (x) == REG)
5973 /* If this is a pseudo, it must not have been assigned a hard register.
5974 Therefore, it must either be in memory or be a constant. */
5976 if (regno >= FIRST_PSEUDO_REGISTER)
5978 if (reg_equiv_memory_loc[regno])
5979 return refers_to_mem_for_reload_p (in);
5980 else if (reg_equiv_constant[regno])
5985 else if (GET_CODE (x) == MEM)
5986 return refers_to_mem_for_reload_p (in);
5987 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
5988 || GET_CODE (x) == CC0)
5989 return reg_mentioned_p (x, in);
5993 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
5994 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5996 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
5999 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6003 refers_to_mem_for_reload_p (x)
6009 if (GET_CODE (x) == MEM)
6012 if (GET_CODE (x) == REG)
6013 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6014 && reg_equiv_memory_loc[REGNO (x)]);
6016 fmt = GET_RTX_FORMAT (GET_CODE (x));
6017 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6019 && (GET_CODE (XEXP (x, i)) == MEM
6020 || refers_to_mem_for_reload_p (XEXP (x, i))))
6026 /* Check the insns before INSN to see if there is a suitable register
6027 containing the same value as GOAL.
6028 If OTHER is -1, look for a register in class CLASS.
6029 Otherwise, just see if register number OTHER shares GOAL's value.
6031 Return an rtx for the register found, or zero if none is found.
6033 If RELOAD_REG_P is (short *)1,
6034 we reject any hard reg that appears in reload_reg_rtx
6035 because such a hard reg is also needed coming into this insn.
6037 If RELOAD_REG_P is any other nonzero value,
6038 it is a vector indexed by hard reg number
6039 and we reject any hard reg whose element in the vector is nonnegative
6040 as well as any that appears in reload_reg_rtx.
6042 If GOAL is zero, then GOALREG is a register number; we look
6043 for an equivalent for that register.
6045 MODE is the machine mode of the value we want an equivalence for.
6046 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6048 This function is used by jump.c as well as in the reload pass.
6050 If GOAL is the sum of the stack pointer and a constant, we treat it
6051 as if it were a constant except that sp is required to be unchanging. */
6054 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
6057 enum reg_class class;
6059 short *reload_reg_p;
6061 enum machine_mode mode;
6063 register rtx p = insn;
6064 rtx goaltry, valtry, value, where;
6066 register int regno = -1;
6070 int goal_mem_addr_varies = 0;
6071 int need_stable_sp = 0;
6077 else if (GET_CODE (goal) == REG)
6078 regno = REGNO (goal);
6079 else if (GET_CODE (goal) == MEM)
6081 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6082 if (MEM_VOLATILE_P (goal))
6084 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
6086 /* An address with side effects must be reexecuted. */
6101 else if (CONSTANT_P (goal))
6103 else if (GET_CODE (goal) == PLUS
6104 && XEXP (goal, 0) == stack_pointer_rtx
6105 && CONSTANT_P (XEXP (goal, 1)))
6106 goal_const = need_stable_sp = 1;
6107 else if (GET_CODE (goal) == PLUS
6108 && XEXP (goal, 0) == frame_pointer_rtx
6109 && CONSTANT_P (XEXP (goal, 1)))
6114 /* Scan insns back from INSN, looking for one that copies
6115 a value into or out of GOAL.
6116 Stop and give up if we reach a label. */
6121 if (p == 0 || GET_CODE (p) == CODE_LABEL)
6124 if (GET_CODE (p) == INSN
6125 /* If we don't want spill regs ... */
6126 && (! (reload_reg_p != 0
6127 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6128 /* ... then ignore insns introduced by reload; they aren't
6129 useful and can cause results in reload_as_needed to be
6130 different from what they were when calculating the need for
6131 spills. If we notice an input-reload insn here, we will
6132 reject it below, but it might hide a usable equivalent.
6133 That makes bad code. It may even abort: perhaps no reg was
6134 spilled for this insn because it was assumed we would find
6136 || INSN_UID (p) < reload_first_uid))
6139 pat = single_set (p);
6141 /* First check for something that sets some reg equal to GOAL. */
6144 && true_regnum (SET_SRC (pat)) == regno
6145 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6148 && true_regnum (SET_DEST (pat)) == regno
6149 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6151 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6152 /* When looking for stack pointer + const,
6153 make sure we don't use a stack adjust. */
6154 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6155 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6157 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6158 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6160 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6161 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6162 /* If we are looking for a constant,
6163 and something equivalent to that constant was copied
6164 into a reg, we can use that reg. */
6165 || (goal_const && REG_NOTES (p) != 0
6166 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6167 && ((rtx_equal_p (XEXP (tem, 0), goal)
6169 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6170 || (GET_CODE (SET_DEST (pat)) == REG
6171 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6172 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6174 && GET_CODE (goal) == CONST_INT
6176 = operand_subword (XEXP (tem, 0), 0, 0,
6178 && rtx_equal_p (goal, goaltry)
6180 = operand_subword (SET_DEST (pat), 0, 0,
6182 && (valueno = true_regnum (valtry)) >= 0)))
6183 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6185 && GET_CODE (SET_DEST (pat)) == REG
6186 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6187 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6189 && GET_CODE (goal) == CONST_INT
6190 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6192 && rtx_equal_p (goal, goaltry)
6194 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6195 && (valueno = true_regnum (valtry)) >= 0)))
6198 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
6199 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6209 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6210 (or copying VALUE into GOAL, if GOAL is also a register).
6211 Now verify that VALUE is really valid. */
6213 /* VALUENO is the register number of VALUE; a hard register. */
6215 /* Don't try to re-use something that is killed in this insn. We want
6216 to be able to trust REG_UNUSED notes. */
6217 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6220 /* If we propose to get the value from the stack pointer or if GOAL is
6221 a MEM based on the stack pointer, we need a stable SP. */
6222 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6223 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6227 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6228 if (GET_MODE (value) != mode)
6231 /* Reject VALUE if it was loaded from GOAL
6232 and is also a register that appears in the address of GOAL. */
6234 if (goal_mem && value == SET_DEST (single_set (where))
6235 && refers_to_regno_for_reload_p (valueno,
6237 + HARD_REGNO_NREGS (valueno, mode)),
6241 /* Reject registers that overlap GOAL. */
6243 if (!goal_mem && !goal_const
6244 && regno + (int) HARD_REGNO_NREGS (regno, mode) > valueno
6245 && regno < valueno + (int) HARD_REGNO_NREGS (valueno, mode))
6248 nregs = HARD_REGNO_NREGS (regno, mode);
6249 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6251 /* Reject VALUE if it is one of the regs reserved for reloads.
6252 Reload1 knows how to reuse them anyway, and it would get
6253 confused if we allocated one without its knowledge.
6254 (Now that insns introduced by reload are ignored above,
6255 this case shouldn't happen, but I'm not positive.) */
6257 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6260 for (i = 0; i < valuenregs; ++i)
6261 if (reload_reg_p[valueno + i] >= 0)
6265 /* Reject VALUE if it is a register being used for an input reload
6266 even if it is not one of those reserved. */
6268 if (reload_reg_p != 0)
6271 for (i = 0; i < n_reloads; i++)
6272 if (rld[i].reg_rtx != 0 && rld[i].in)
6274 int regno1 = REGNO (rld[i].reg_rtx);
6275 int nregs1 = HARD_REGNO_NREGS (regno1,
6276 GET_MODE (rld[i].reg_rtx));
6277 if (regno1 < valueno + valuenregs
6278 && regno1 + nregs1 > valueno)
6284 /* We must treat frame pointer as varying here,
6285 since it can vary--in a nonlocal goto as generated by expand_goto. */
6286 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6288 /* Now verify that the values of GOAL and VALUE remain unaltered
6289 until INSN is reached. */
6298 /* Don't trust the conversion past a function call
6299 if either of the two is in a call-clobbered register, or memory. */
6300 if (GET_CODE (p) == CALL_INSN)
6304 if (goal_mem || need_stable_sp)
6307 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6308 for (i = 0; i < nregs; ++i)
6309 if (call_used_regs[regno + i])
6312 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6313 for (i = 0; i < valuenregs; ++i)
6314 if (call_used_regs[valueno + i])
6318 #ifdef NON_SAVING_SETJMP
6319 if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE
6320 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6328 /* Watch out for unspec_volatile, and volatile asms. */
6329 if (volatile_insn_p (pat))
6332 /* If this insn P stores in either GOAL or VALUE, return 0.
6333 If GOAL is a memory ref and this insn writes memory, return 0.
6334 If GOAL is a memory ref and its address is not constant,
6335 and this insn P changes a register used in GOAL, return 0. */
6337 if (GET_CODE (pat) == COND_EXEC)
6338 pat = COND_EXEC_CODE (pat);
6339 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6341 register rtx dest = SET_DEST (pat);
6342 while (GET_CODE (dest) == SUBREG
6343 || GET_CODE (dest) == ZERO_EXTRACT
6344 || GET_CODE (dest) == SIGN_EXTRACT
6345 || GET_CODE (dest) == STRICT_LOW_PART)
6346 dest = XEXP (dest, 0);
6347 if (GET_CODE (dest) == REG)
6349 register int xregno = REGNO (dest);
6351 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6352 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6355 if (xregno < regno + nregs && xregno + xnregs > regno)
6357 if (xregno < valueno + valuenregs
6358 && xregno + xnregs > valueno)
6360 if (goal_mem_addr_varies
6361 && reg_overlap_mentioned_for_reload_p (dest, goal))
6363 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6366 else if (goal_mem && GET_CODE (dest) == MEM
6367 && ! push_operand (dest, GET_MODE (dest)))
6369 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6370 && reg_equiv_memory_loc[regno] != 0)
6372 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6375 else if (GET_CODE (pat) == PARALLEL)
6378 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6380 register rtx v1 = XVECEXP (pat, 0, i);
6381 if (GET_CODE (v1) == COND_EXEC)
6382 v1 = COND_EXEC_CODE (v1);
6383 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6385 register rtx dest = SET_DEST (v1);
6386 while (GET_CODE (dest) == SUBREG
6387 || GET_CODE (dest) == ZERO_EXTRACT
6388 || GET_CODE (dest) == SIGN_EXTRACT
6389 || GET_CODE (dest) == STRICT_LOW_PART)
6390 dest = XEXP (dest, 0);
6391 if (GET_CODE (dest) == REG)
6393 register int xregno = REGNO (dest);
6395 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6396 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6399 if (xregno < regno + nregs
6400 && xregno + xnregs > regno)
6402 if (xregno < valueno + valuenregs
6403 && xregno + xnregs > valueno)
6405 if (goal_mem_addr_varies
6406 && reg_overlap_mentioned_for_reload_p (dest,
6409 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6412 else if (goal_mem && GET_CODE (dest) == MEM
6413 && ! push_operand (dest, GET_MODE (dest)))
6415 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6416 && reg_equiv_memory_loc[regno] != 0)
6418 else if (need_stable_sp
6419 && push_operand (dest, GET_MODE (dest)))
6425 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
6429 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6430 link = XEXP (link, 1))
6432 pat = XEXP (link, 0);
6433 if (GET_CODE (pat) == CLOBBER)
6435 register rtx dest = SET_DEST (pat);
6437 if (GET_CODE (dest) == REG)
6439 register int xregno = REGNO (dest);
6441 = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6443 if (xregno < regno + nregs
6444 && xregno + xnregs > regno)
6446 else if (xregno < valueno + valuenregs
6447 && xregno + xnregs > valueno)
6449 else if (goal_mem_addr_varies
6450 && reg_overlap_mentioned_for_reload_p (dest,
6455 else if (goal_mem && GET_CODE (dest) == MEM
6456 && ! push_operand (dest, GET_MODE (dest)))
6458 else if (need_stable_sp
6459 && push_operand (dest, GET_MODE (dest)))
6466 /* If this insn auto-increments or auto-decrements
6467 either regno or valueno, return 0 now.
6468 If GOAL is a memory ref and its address is not constant,
6469 and this insn P increments a register used in GOAL, return 0. */
6473 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6474 if (REG_NOTE_KIND (link) == REG_INC
6475 && GET_CODE (XEXP (link, 0)) == REG)
6477 register int incno = REGNO (XEXP (link, 0));
6478 if (incno < regno + nregs && incno >= regno)
6480 if (incno < valueno + valuenregs && incno >= valueno)
6482 if (goal_mem_addr_varies
6483 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6493 /* Find a place where INCED appears in an increment or decrement operator
6494 within X, and return the amount INCED is incremented or decremented by.
6495 The value is always positive. */
6498 find_inc_amount (x, inced)
6501 register enum rtx_code code = GET_CODE (x);
6502 register const char *fmt;
6507 register rtx addr = XEXP (x, 0);
6508 if ((GET_CODE (addr) == PRE_DEC
6509 || GET_CODE (addr) == POST_DEC
6510 || GET_CODE (addr) == PRE_INC
6511 || GET_CODE (addr) == POST_INC)
6512 && XEXP (addr, 0) == inced)
6513 return GET_MODE_SIZE (GET_MODE (x));
6514 else if ((GET_CODE (addr) == PRE_MODIFY
6515 || GET_CODE (addr) == POST_MODIFY)
6516 && GET_CODE (XEXP (addr, 1)) == PLUS
6517 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
6518 && XEXP (addr, 0) == inced
6519 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
6521 i = INTVAL (XEXP (XEXP (addr, 1), 1));
6522 return i < 0 ? -i : i;
6526 fmt = GET_RTX_FORMAT (code);
6527 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6531 register int tem = find_inc_amount (XEXP (x, i), inced);
6538 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6540 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6550 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6553 regno_clobbered_p (regno, insn)
6557 if (GET_CODE (PATTERN (insn)) == CLOBBER
6558 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6559 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
6561 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6563 int i = XVECLEN (PATTERN (insn), 0) - 1;
6567 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6568 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
6569 && REGNO (XEXP (elt, 0)) == regno)
6577 static const char *reload_when_needed_name[] =
6580 "RELOAD_FOR_OUTPUT",
6582 "RELOAD_FOR_INPUT_ADDRESS",
6583 "RELOAD_FOR_INPADDR_ADDRESS",
6584 "RELOAD_FOR_OUTPUT_ADDRESS",
6585 "RELOAD_FOR_OUTADDR_ADDRESS",
6586 "RELOAD_FOR_OPERAND_ADDRESS",
6587 "RELOAD_FOR_OPADDR_ADDR",
6589 "RELOAD_FOR_OTHER_ADDRESS"
6592 static const char * const reg_class_names[] = REG_CLASS_NAMES;
6594 /* These functions are used to print the variables set by 'find_reloads' */
6597 debug_reload_to_stream (f)
6605 for (r = 0; r < n_reloads; r++)
6607 fprintf (f, "Reload %d: ", r);
6611 fprintf (f, "reload_in (%s) = ",
6612 GET_MODE_NAME (rld[r].inmode));
6613 print_inline_rtx (f, rld[r].in, 24);
6614 fprintf (f, "\n\t");
6617 if (rld[r].out != 0)
6619 fprintf (f, "reload_out (%s) = ",
6620 GET_MODE_NAME (rld[r].outmode));
6621 print_inline_rtx (f, rld[r].out, 24);
6622 fprintf (f, "\n\t");
6625 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
6627 fprintf (f, "%s (opnum = %d)",
6628 reload_when_needed_name[(int) rld[r].when_needed],
6631 if (rld[r].optional)
6632 fprintf (f, ", optional");
6634 if (rld[r].nongroup)
6635 fprintf (stderr, ", nongroup");
6637 if (rld[r].inc != 0)
6638 fprintf (f, ", inc by %d", rld[r].inc);
6640 if (rld[r].nocombine)
6641 fprintf (f, ", can't combine");
6643 if (rld[r].secondary_p)
6644 fprintf (f, ", secondary_reload_p");
6646 if (rld[r].in_reg != 0)
6648 fprintf (f, "\n\treload_in_reg: ");
6649 print_inline_rtx (f, rld[r].in_reg, 24);
6652 if (rld[r].out_reg != 0)
6654 fprintf (f, "\n\treload_out_reg: ");
6655 print_inline_rtx (f, rld[r].out_reg, 24);
6658 if (rld[r].reg_rtx != 0)
6660 fprintf (f, "\n\treload_reg_rtx: ");
6661 print_inline_rtx (f, rld[r].reg_rtx, 24);
6665 if (rld[r].secondary_in_reload != -1)
6667 fprintf (f, "%ssecondary_in_reload = %d",
6668 prefix, rld[r].secondary_in_reload);
6672 if (rld[r].secondary_out_reload != -1)
6673 fprintf (f, "%ssecondary_out_reload = %d\n",
6674 prefix, rld[r].secondary_out_reload);
6677 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
6679 fprintf (stderr, "%ssecondary_in_icode = %s", prefix,
6680 insn_data[rld[r].secondary_in_icode].name);
6684 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
6685 fprintf (stderr, "%ssecondary_out_icode = %s", prefix,
6686 insn_data[rld[r].secondary_out_icode].name);
6695 debug_reload_to_stream (stderr);