1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This file contains subroutines used only from the file reload1.c.
22 It knows how to scan one insn for operands and values
23 that need to be copied into registers to make valid code.
24 It also finds other operands and values which are valid
25 but for which equivalent values in registers exist and
26 ought to be used instead.
28 Before processing the first insn of the function, call `init_reload'.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
91 #include "insn-config.h"
92 #include "insn-codes.h"
96 #include "hard-reg-set.h"
100 #ifndef REGISTER_MOVE_COST
101 #define REGISTER_MOVE_COST(x, y) 2
104 /* The variables set up by `find_reloads' are:
106 n_reloads number of distinct reloads needed; max reload # + 1
107 tables indexed by reload number
108 reload_in rtx for value to reload from
109 reload_out rtx for where to store reload-reg afterward if nec
110 (often the same as reload_in)
111 reload_reg_class enum reg_class, saying what regs to reload into
112 reload_inmode enum machine_mode; mode this operand should have
113 when reloaded, on input.
114 reload_outmode enum machine_mode; mode this operand should have
115 when reloaded, on output.
116 reload_strict_low char; currently always zero; used to mean that this
117 reload is inside a STRICT_LOW_PART, but we don't
118 need to know this anymore.
119 reload_optional char, nonzero for an optional reload.
120 Optional reloads are ignored unless the
121 value is already sitting in a register.
122 reload_inc int, positive amount to increment or decrement by if
123 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
124 Ignored otherwise (don't assume it is zero).
125 reload_in_reg rtx. A reg for which reload_in is the equivalent.
126 If reload_in is a symbol_ref which came from
127 reg_equiv_constant, then this is the pseudo
128 which has that symbol_ref as equivalent.
129 reload_reg_rtx rtx. This is the register to reload into.
130 If it is zero when `find_reloads' returns,
131 you must find a suitable register in the class
132 specified by reload_reg_class, and store here
133 an rtx for that register with mode from
134 reload_inmode or reload_outmode.
135 reload_nocombine char, nonzero if this reload shouldn't be
136 combined with another reload.
137 reload_needed_for rtx, operand this reload is needed for address of.
138 0 means it isn't needed for addressing.
139 reload_needed_for_multiple
140 int, 1 if this reload needed for more than one thing.
141 reload_when_needed enum, classifies reload as needed either for
142 addressing an input reload, addressing an output,
143 for addressing a non-reloaded mem ref,
144 or for unspecified purposes (i.e., more than one
146 reload_secondary_reload int, gives the reload number of a secondary
147 reload, when needed; otherwise -1
148 reload_secondary_p int, 1 if this is a secondary register for one
150 reload_secondary_icode enum insn_code, if a secondary reload is required,
151 gives the INSN_CODE that uses the secondary
152 reload as a scratch register, or CODE_FOR_nothing
153 if the secondary reload register is to be an
154 intermediate register. */
157 rtx reload_in[MAX_RELOADS];
158 rtx reload_out[MAX_RELOADS];
159 enum reg_class reload_reg_class[MAX_RELOADS];
160 enum machine_mode reload_inmode[MAX_RELOADS];
161 enum machine_mode reload_outmode[MAX_RELOADS];
162 char reload_strict_low[MAX_RELOADS];
163 rtx reload_reg_rtx[MAX_RELOADS];
164 char reload_optional[MAX_RELOADS];
165 int reload_inc[MAX_RELOADS];
166 rtx reload_in_reg[MAX_RELOADS];
167 char reload_nocombine[MAX_RELOADS];
168 int reload_needed_for_multiple[MAX_RELOADS];
169 rtx reload_needed_for[MAX_RELOADS];
170 enum reload_when_needed reload_when_needed[MAX_RELOADS];
171 int reload_secondary_reload[MAX_RELOADS];
172 int reload_secondary_p[MAX_RELOADS];
173 enum insn_code reload_secondary_icode[MAX_RELOADS];
175 /* All the "earlyclobber" operands of the current insn
176 are recorded here. */
178 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
180 /* Replacing reloads.
182 If `replace_reloads' is nonzero, then as each reload is recorded
183 an entry is made for it in the table `replacements'.
184 Then later `subst_reloads' can look through that table and
185 perform all the replacements needed. */
187 /* Nonzero means record the places to replace. */
188 static int replace_reloads;
190 /* Each replacement is recorded with a structure like this. */
193 rtx *where; /* Location to store in */
194 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
195 a SUBREG; 0 otherwise. */
196 int what; /* which reload this is for */
197 enum machine_mode mode; /* mode it must have */
200 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
202 /* Number of replacements currently recorded. */
203 static int n_replacements;
205 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
206 (see reg_equiv_address). */
207 static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
208 static int n_memlocs;
210 #ifdef SECONDARY_MEMORY_NEEDED
212 /* Save MEMs needed to copy from one class of registers to another. One MEM
213 is used per mode, but normally only one or two modes are ever used.
215 We keep two versions, before and after register elimination. */
217 static rtx secondary_memlocs[NUM_MACHINE_MODES];
218 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES];
221 /* The instruction we are doing reloads for;
222 so we can test whether a register dies in it. */
223 static rtx this_insn;
225 /* Nonzero if this instruction is a user-specified asm with operands. */
226 static int this_insn_is_asm;
228 /* If hard_regs_live_known is nonzero,
229 we can tell which hard regs are currently live,
230 at least enough to succeed in choosing dummy reloads. */
231 static int hard_regs_live_known;
233 /* Indexed by hard reg number,
234 element is nonegative if hard reg has been spilled.
235 This vector is passed to `find_reloads' as an argument
236 and is not changed here. */
237 static short *static_reload_reg_p;
239 /* Set to 1 in subst_reg_equivs if it changes anything. */
240 static int subst_reg_equivs_changed;
242 /* On return from push_reload, holds the reload-number for the OUT
243 operand, which can be different for that from the input operand. */
244 static int output_reloadnum;
246 static int alternative_allows_memconst ();
247 static rtx find_dummy_reload ();
248 static rtx find_reloads_toplev ();
249 static int find_reloads_address ();
250 static int find_reloads_address_1 ();
251 static void find_reloads_address_part ();
252 static int hard_reg_set_here_p ();
253 /* static rtx forget_volatility (); */
254 static rtx subst_reg_equivs ();
255 static rtx subst_indexed_address ();
256 void copy_replacements ();
257 rtx find_equiv_reg ();
258 static int find_inc_amount ();
260 #ifdef HAVE_SECONDARY_RELOADS
262 /* Determine if any secondary reloads are needed for loading (if IN_P is
263 non-zero) or storing (if IN_P is zero) X to or from a reload register of
264 register class RELOAD_CLASS in mode RELOAD_MODE.
266 Return the register class of a secondary reload register, or NO_REGS if
267 none. *PMODE is set to the mode that the register is required in.
268 If the reload register is needed as a scratch register instead of an
269 intermediate register, *PICODE is set to the insn_code of the insn to be
270 used to load or store the primary reload register; otherwise *PICODE
271 is set to CODE_FOR_nothing.
273 In some cases (such as storing MQ into an external memory location on
274 the RT), both an intermediate register and a scratch register. In that
275 case, *PICODE is set to CODE_FOR_nothing, the class for the intermediate
276 register is returned, and the *PTERTIARY_... variables are set to describe
277 the scratch register. */
279 static enum reg_class
280 find_secondary_reload (x, reload_class, reload_mode, in_p, picode, pmode,
281 ptertiary_class, ptertiary_icode, ptertiary_mode)
283 enum reg_class reload_class;
284 enum machine_mode reload_mode;
286 enum insn_code *picode;
287 enum machine_mode *pmode;
288 enum reg_class *ptertiary_class;
289 enum insn_code *ptertiary_icode;
290 enum machine_mode *ptertiary_mode;
292 enum reg_class class = NO_REGS;
293 enum machine_mode mode = reload_mode;
294 enum insn_code icode = CODE_FOR_nothing;
295 enum reg_class t_class = NO_REGS;
296 enum machine_mode t_mode = VOIDmode;
297 enum insn_code t_icode = CODE_FOR_nothing;
299 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
300 is still a pseudo-register by now, it *must* have an equivalent MEM
301 but we don't want to assume that), use that equivalent when seeing if
302 a secondary reload is needed since whether or not a reload is needed
303 might be sensitive to the form of the MEM. */
305 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
306 && reg_equiv_mem[REGNO (x)] != 0)
307 x = reg_equiv_mem[REGNO (x)];
309 #ifdef SECONDARY_INPUT_RELOAD_CLASS
311 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
314 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
316 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
319 /* If we don't need any secondary registers, go away; the rest of the
320 values won't be used. */
321 if (class == NO_REGS)
324 /* Get a possible insn to use. If the predicate doesn't accept X, don't
327 icode = (in_p ? reload_in_optab[(int) reload_mode]
328 : reload_out_optab[(int) reload_mode]);
330 if (icode != CODE_FOR_nothing
331 && insn_operand_predicate[(int) icode][in_p]
332 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
333 icode = CODE_FOR_nothing;
335 /* If we will be using an insn, see if it can directly handle the reload
336 register we will be using. If it can, the secondary reload is for a
337 scratch register. If it can't, we will use the secondary reload for
338 an intermediate register and require a tertiary reload for the scratch
341 if (icode != CODE_FOR_nothing)
343 /* If IN_P is non-zero, the reload register will be the output in
344 operand 0. If IN_P is zero, the reload register will be the input
345 in operand 1. Outputs should have an initial "=", which we must
348 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
349 enum reg_class insn_class
350 = (insn_letter == 'r' ? GENERAL_REGS
351 : REG_CLASS_FROM_LETTER (insn_letter));
353 if (insn_class == NO_REGS
354 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
355 /* The scratch register's constraint must start with "=&". */
356 || insn_operand_constraint[(int) icode][2][0] != '='
357 || insn_operand_constraint[(int) icode][2][1] != '&')
360 if (reg_class_subset_p (reload_class, insn_class))
361 mode = insn_operand_mode[(int) icode][2];
364 char t_letter = insn_operand_constraint[(int) icode][2][2];
366 t_mode = insn_operand_mode[(int) icode][2];
367 t_class = (t_letter == 'r' ? GENERAL_REGS
368 : REG_CLASS_FROM_LETTER (t_letter));
370 icode = CODE_FOR_nothing;
376 *ptertiary_class = t_class;
377 *ptertiary_mode = t_mode;
378 *ptertiary_icode = t_icode;
382 #endif /* HAVE_SECONDARY_RELOADS */
384 #ifdef SECONDARY_MEMORY_NEEDED
386 /* Return a memory location that will be used to copy X in mode MODE.
387 If we haven't already made a location for this mode in this insn,
388 call find_reloads_address on the location being returned. */
391 get_secondary_mem (x, mode)
393 enum machine_mode mode;
398 /* If MODE is narrower than a word, widen it. This is required because
399 most machines that require these memory locations do not support
400 short load and stores from all registers (e.g., FP registers). We could
401 possibly conditionalize this, but we lose nothing by doing the wider
404 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
405 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
407 /* If we already have made a MEM for this insn, return it. */
408 if (secondary_memlocs_elim[(int) mode] != 0)
409 return secondary_memlocs_elim[(int) mode];
411 /* If this is the first time we've tried to get a MEM for this mode,
412 allocate a new one. `something_changed' in reload will get set
413 by noticing that the frame size has changed. */
415 if (secondary_memlocs[(int) mode] == 0)
416 secondary_memlocs[(int) mode]
417 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
419 /* Get a version of the address doing any eliminations needed. If that
420 didn't give us a new MEM, make a new one if it isn't valid. */
422 loc = eliminate_regs (secondary_memlocs[(int) mode], 0, NULL_RTX);
423 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
425 if (! mem_valid && loc == secondary_memlocs[(int) mode])
426 loc = copy_rtx (loc);
428 /* The only time the call below will do anything is if the stack
429 offset is too large. In that case IND_LEVELS doesn't matter, so we
430 can just pass a zero. */
432 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0), x, 0);
434 /* If the address was not valid to begin with, we can not save it, because
435 there is no guarantee that the reloads needed to make it valid will
436 occur before every use of this address. */
439 secondary_memlocs_elim[(int) mode] = loc;
444 /* Clear any secondary memory locations we've made. */
447 clear_secondary_mem ()
451 for (i = 0; i < NUM_MACHINE_MODES; i++)
452 secondary_memlocs[i] = 0;
454 #endif /* SECONDARY_MEMORY_NEEDED */
456 /* Record one (sometimes two) reload that needs to be performed.
457 IN is an rtx saying where the data are to be found before this instruction.
458 OUT says where they must be stored after the instruction.
459 (IN is zero for data not read, and OUT is zero for data not written.)
460 INLOC and OUTLOC point to the places in the instructions where
461 IN and OUT were found.
462 CLASS is a register class required for the reloaded data.
463 INMODE is the machine mode that the instruction requires
464 for the reg that replaces IN and OUTMODE is likewise for OUT.
466 If IN is zero, then OUT's location and mode should be passed as
469 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
471 OPTIONAL nonzero means this reload does not need to be performed:
472 it can be discarded if that is more convenient.
474 The return value is the reload-number for this reload.
476 If both IN and OUT are nonzero, in some rare cases we might
477 want to make two separate reloads. (Actually we never do this now.)
478 Therefore, the reload-number for OUT is stored in
479 output_reloadnum when we return; the return value applies to IN.
480 Usually (presently always), when IN and OUT are nonzero,
481 the two reload-numbers are equal, but the caller should be careful to
485 push_reload (in, out, inloc, outloc, class,
486 inmode, outmode, strict_low, optional, needed_for)
487 register rtx in, out;
489 enum reg_class class;
490 enum machine_mode inmode, outmode;
497 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
498 int secondary_reload = -1;
499 enum insn_code secondary_icode = CODE_FOR_nothing;
501 /* Compare two RTX's. */
502 #define MATCHES(x, y) \
503 (x == y || (x != 0 && (GET_CODE (x) == REG \
504 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
505 : rtx_equal_p (x, y) && ! side_effects_p (x))))
507 /* INMODE and/or OUTMODE could be VOIDmode if no mode
508 has been specified for the operand. In that case,
509 use the operand's mode as the mode to reload. */
510 if (inmode == VOIDmode && in != 0)
511 inmode = GET_MODE (in);
512 if (outmode == VOIDmode && out != 0)
513 outmode = GET_MODE (out);
515 /* If IN is a pseudo register everywhere-equivalent to a constant, and
516 it is not in a hard register, reload straight from the constant,
517 since we want to get rid of such pseudo registers.
518 Often this is done earlier, but not always in find_reloads_address. */
519 if (in != 0 && GET_CODE (in) == REG)
521 register int regno = REGNO (in);
523 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
524 && reg_equiv_constant[regno] != 0)
525 in = reg_equiv_constant[regno];
528 /* Likewise for OUT. Of course, OUT will never be equivalent to
529 an actual constant, but it might be equivalent to a memory location
530 (in the case of a parameter). */
531 if (out != 0 && GET_CODE (out) == REG)
533 register int regno = REGNO (out);
535 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
536 && reg_equiv_constant[regno] != 0)
537 out = reg_equiv_constant[regno];
540 /* If we have a read-write operand with an address side-effect,
541 change either IN or OUT so the side-effect happens only once. */
542 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
544 if (GET_CODE (XEXP (in, 0)) == POST_INC
545 || GET_CODE (XEXP (in, 0)) == POST_DEC)
546 in = gen_rtx (MEM, GET_MODE (in), XEXP (XEXP (in, 0), 0));
547 if (GET_CODE (XEXP (in, 0)) == PRE_INC
548 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
549 out = gen_rtx (MEM, GET_MODE (out), XEXP (XEXP (out, 0), 0));
552 /* If we are reloading a (SUBREG (MEM ...) ...) or (SUBREG constant ...),
553 really reload just the inside expression in its own mode.
554 If we have (SUBREG:M1 (REG:M2 ...) ...) with M1 wider than M2 and the
555 register is a pseudo, this will become the same as the above case.
556 Do the same for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
557 either M1 is not valid for R or M2 is wider than a word but we only
558 need one word to store an M2-sized quantity in R.
559 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
560 we can't handle it here because CONST_INT does not indicate a mode.
562 Similarly, we must reload the inside expression if we have a
563 STRICT_LOW_PART (presumably, in == out in the cas).
565 Also reload the inner expression if it does not require a secondary
566 reload but the SUBREG does. */
568 if (in != 0 && GET_CODE (in) == SUBREG
569 && (GET_CODE (SUBREG_REG (in)) != REG
571 || (GET_CODE (SUBREG_REG (in)) == REG
572 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER
573 && (GET_MODE_SIZE (inmode)
574 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))))
575 || (GET_CODE (SUBREG_REG (in)) == REG
576 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
577 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in)), inmode)
578 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
579 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
581 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
583 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
584 GET_MODE (SUBREG_REG (in)))))))
585 #ifdef SECONDARY_INPUT_RELOAD_CLASS
586 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
587 && (SECONDARY_INPUT_RELOAD_CLASS (class,
588 GET_MODE (SUBREG_REG (in)),
594 in_subreg_loc = inloc;
595 inloc = &SUBREG_REG (in);
597 if (GET_CODE (in) == MEM)
598 /* This is supposed to happen only for paradoxical subregs made by
599 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
600 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
602 inmode = GET_MODE (in);
605 /* Similarly for paradoxical and problematical SUBREGs on the output.
606 Note that there is no reason we need worry about the previous value
607 of SUBREG_REG (out); even if wider than out,
608 storing in a subreg is entitled to clobber it all
609 (except in the case of STRICT_LOW_PART,
610 and in that case the constraint should label it input-output.) */
611 if (out != 0 && GET_CODE (out) == SUBREG
612 && (GET_CODE (SUBREG_REG (out)) != REG
614 || (GET_CODE (SUBREG_REG (out)) == REG
615 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER
616 && (GET_MODE_SIZE (outmode)
617 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))))
618 || (GET_CODE (SUBREG_REG (out)) == REG
619 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
620 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)), outmode)
621 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
622 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
624 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
626 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
627 GET_MODE (SUBREG_REG (out)))))))
628 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
629 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
630 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
631 GET_MODE (SUBREG_REG (out)),
637 out_subreg_loc = outloc;
638 outloc = &SUBREG_REG (out);
640 if (GET_CODE (out) == MEM
641 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
643 outmode = GET_MODE (out);
646 /* That's all we use STRICT_LOW for, so clear it. At some point,
647 we may want to get rid of reload_strict_low. */
650 /* If IN appears in OUT, we can't share any input-only reload for IN. */
651 if (in != 0 && out != 0 && GET_CODE (out) == MEM
652 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
653 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
656 /* If IN is a SUBREG of a hard register, make a new REG. This
657 simplifies some of the cases below. */
659 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
660 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
661 in = gen_rtx (REG, GET_MODE (in),
662 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
664 /* Similarly for OUT. */
665 if (out != 0 && GET_CODE (out) == SUBREG
666 && GET_CODE (SUBREG_REG (out)) == REG
667 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
668 out = gen_rtx (REG, GET_MODE (out),
669 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
671 /* Narrow down the class of register wanted if that is
672 desirable on this machine for efficiency. */
674 class = PREFERRED_RELOAD_CLASS (in, class);
676 /* Output reloads may need analagous treatment, different in detail. */
677 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
679 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
682 /* Make sure we use a class that can handle the actual pseudo
683 inside any subreg. For example, on the 386, QImode regs
684 can appear within SImode subregs. Although GENERAL_REGS
685 can handle SImode, QImode needs a smaller class. */
686 #ifdef LIMIT_RELOAD_CLASS
688 class = LIMIT_RELOAD_CLASS (inmode, class);
689 else if (in != 0 && GET_CODE (in) == SUBREG)
690 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
693 class = LIMIT_RELOAD_CLASS (outmode, class);
694 if (out != 0 && GET_CODE (out) == SUBREG)
695 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
698 /* Verify that this class is at least possible for the mode that
700 if (this_insn_is_asm)
702 enum machine_mode mode;
703 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
707 if (mode == VOIDmode)
709 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
716 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
717 if (HARD_REGNO_MODE_OK (i, mode)
718 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
720 int nregs = HARD_REGNO_NREGS (i, mode);
723 for (j = 1; j < nregs; j++)
724 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
729 if (i == FIRST_PSEUDO_REGISTER)
731 error_for_asm (this_insn, "impossible register constraint in `asm'");
736 if (class == NO_REGS)
739 /* We can use an existing reload if the class is right
740 and at least one of IN and OUT is a match
741 and the other is at worst neutral.
742 (A zero compared against anything is neutral.) */
743 for (i = 0; i < n_reloads; i++)
744 if ((reg_class_subset_p (class, reload_reg_class[i])
745 || reg_class_subset_p (reload_reg_class[i], class))
746 && reload_strict_low[i] == strict_low
747 /* If the existing reload has a register, it must fit our class. */
748 && (reload_reg_rtx[i] == 0
749 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
750 true_regnum (reload_reg_rtx[i])))
751 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
752 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
754 (out != 0 && MATCHES (reload_out[i], out)
755 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in)))))
758 /* Reloading a plain reg for input can match a reload to postincrement
759 that reg, since the postincrement's value is the right value.
760 Likewise, it can match a preincrement reload, since we regard
761 the preincrementation as happening before any ref in this insn
764 for (i = 0; i < n_reloads; i++)
765 if ((reg_class_subset_p (class, reload_reg_class[i])
766 || reg_class_subset_p (reload_reg_class[i], class))
767 /* If the existing reload has a register, it must fit our class. */
768 && (reload_reg_rtx[i] == 0
769 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
770 true_regnum (reload_reg_rtx[i])))
771 && reload_strict_low[i] == strict_low
772 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
773 && ((GET_CODE (in) == REG
774 && (GET_CODE (reload_in[i]) == POST_INC
775 || GET_CODE (reload_in[i]) == POST_DEC
776 || GET_CODE (reload_in[i]) == PRE_INC
777 || GET_CODE (reload_in[i]) == PRE_DEC)
778 && MATCHES (XEXP (reload_in[i], 0), in))
780 (GET_CODE (reload_in[i]) == REG
781 && (GET_CODE (in) == POST_INC
782 || GET_CODE (in) == POST_DEC
783 || GET_CODE (in) == PRE_INC
784 || GET_CODE (in) == PRE_DEC)
785 && MATCHES (XEXP (in, 0), reload_in[i]))))
787 /* Make sure reload_in ultimately has the increment,
788 not the plain register. */
789 if (GET_CODE (in) == REG)
796 #ifdef HAVE_SECONDARY_RELOADS
797 enum reg_class secondary_class = NO_REGS;
798 enum reg_class secondary_out_class = NO_REGS;
799 enum machine_mode secondary_mode = inmode;
800 enum machine_mode secondary_out_mode = outmode;
801 enum insn_code secondary_icode;
802 enum insn_code secondary_out_icode = CODE_FOR_nothing;
803 enum reg_class tertiary_class = NO_REGS;
804 enum reg_class tertiary_out_class = NO_REGS;
805 enum machine_mode tertiary_mode;
806 enum machine_mode tertiary_out_mode;
807 enum insn_code tertiary_icode;
808 enum insn_code tertiary_out_icode = CODE_FOR_nothing;
809 int tertiary_reload = -1;
811 /* See if we need a secondary reload register to move between
812 CLASS and IN or CLASS and OUT. Get the modes and icodes to
813 use for each of them if so. */
815 #ifdef SECONDARY_INPUT_RELOAD_CLASS
818 = find_secondary_reload (in, class, inmode, 1, &secondary_icode,
819 &secondary_mode, &tertiary_class,
820 &tertiary_icode, &tertiary_mode);
823 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
824 if (out != 0 && GET_CODE (out) != SCRATCH)
826 = find_secondary_reload (out, class, outmode, 0,
827 &secondary_out_icode, &secondary_out_mode,
828 &tertiary_out_class, &tertiary_out_icode,
832 /* We can only record one secondary and one tertiary reload. If both
833 IN and OUT need secondary reloads, we can only make an in-out
834 reload if neither need an insn and if the classes are compatible. */
836 if (secondary_class != NO_REGS && secondary_out_class != NO_REGS
837 && reg_class_subset_p (secondary_out_class, secondary_class))
838 secondary_class = secondary_out_class;
840 if (secondary_class != NO_REGS && secondary_out_class != NO_REGS
841 && (! reg_class_subset_p (secondary_class, secondary_out_class)
842 || secondary_icode != CODE_FOR_nothing
843 || secondary_out_icode != CODE_FOR_nothing))
845 push_reload (NULL_RTX, out, NULL_PTR, outloc, class,
846 VOIDmode, outmode, strict_low, optional, needed_for);
852 /* If we need a secondary reload for OUT but not IN, copy the
854 if (secondary_class == NO_REGS && secondary_out_class != NO_REGS)
856 secondary_class = secondary_out_class;
857 secondary_icode = secondary_out_icode;
858 tertiary_class = tertiary_out_class;
859 tertiary_icode = tertiary_out_icode;
860 tertiary_mode = tertiary_out_mode;
863 if (secondary_class != NO_REGS)
865 /* If we need a tertiary reload, see if we have one we can reuse
868 if (tertiary_class != NO_REGS)
870 for (tertiary_reload = 0; tertiary_reload < n_reloads;
872 if (reload_secondary_p[tertiary_reload]
873 && (reg_class_subset_p (tertiary_class,
874 reload_reg_class[tertiary_reload])
875 || reg_class_subset_p (reload_reg_class[tertiary_reload],
877 && ((reload_inmode[tertiary_reload] == tertiary_mode)
878 || reload_inmode[tertiary_reload] == VOIDmode)
879 && ((reload_outmode[tertiary_reload] == tertiary_mode)
880 || reload_outmode[tertiary_reload] == VOIDmode)
881 && (reload_secondary_icode[tertiary_reload]
882 == CODE_FOR_nothing))
885 if (tertiary_mode != VOIDmode)
886 reload_inmode[tertiary_reload] = tertiary_mode;
887 if (tertiary_out_mode != VOIDmode)
888 reload_outmode[tertiary_reload] = tertiary_mode;
889 if (reg_class_subset_p (tertiary_class,
890 reload_reg_class[tertiary_reload]))
891 reload_reg_class[tertiary_reload] = tertiary_class;
892 if (reload_needed_for[tertiary_reload] != needed_for)
893 reload_needed_for_multiple[tertiary_reload] = 1;
894 reload_optional[tertiary_reload] &= optional;
895 reload_secondary_p[tertiary_reload] = 1;
898 if (tertiary_reload == n_reloads)
900 /* We need to make a new tertiary reload for this register
902 reload_in[tertiary_reload] = reload_out[tertiary_reload] = 0;
903 reload_reg_class[tertiary_reload] = tertiary_class;
904 reload_inmode[tertiary_reload] = tertiary_mode;
905 reload_outmode[tertiary_reload] = tertiary_mode;
906 reload_reg_rtx[tertiary_reload] = 0;
907 reload_optional[tertiary_reload] = optional;
908 reload_inc[tertiary_reload] = 0;
909 reload_strict_low[tertiary_reload] = 0;
910 /* Maybe we could combine these, but it seems too tricky. */
911 reload_nocombine[tertiary_reload] = 1;
912 reload_in_reg[tertiary_reload] = 0;
913 reload_needed_for[tertiary_reload] = needed_for;
914 reload_needed_for_multiple[tertiary_reload] = 0;
915 reload_secondary_reload[tertiary_reload] = -1;
916 reload_secondary_icode[tertiary_reload] = CODE_FOR_nothing;
917 reload_secondary_p[tertiary_reload] = 1;
924 /* See if we can reuse an existing secondary reload. */
925 for (secondary_reload = 0; secondary_reload < n_reloads;
927 if (reload_secondary_p[secondary_reload]
928 && (reg_class_subset_p (secondary_class,
929 reload_reg_class[secondary_reload])
930 || reg_class_subset_p (reload_reg_class[secondary_reload],
932 && ((reload_inmode[secondary_reload] == secondary_mode)
933 || reload_inmode[secondary_reload] == VOIDmode)
934 && ((reload_outmode[secondary_reload] == secondary_out_mode)
935 || reload_outmode[secondary_reload] == VOIDmode)
936 && reload_secondary_reload[secondary_reload] == tertiary_reload
937 && reload_secondary_icode[secondary_reload] == tertiary_icode)
939 if (secondary_mode != VOIDmode)
940 reload_inmode[secondary_reload] = secondary_mode;
941 if (secondary_out_mode != VOIDmode)
942 reload_outmode[secondary_reload] = secondary_out_mode;
943 if (reg_class_subset_p (secondary_class,
944 reload_reg_class[secondary_reload]))
945 reload_reg_class[secondary_reload] = secondary_class;
946 if (reload_needed_for[secondary_reload] != needed_for)
947 reload_needed_for_multiple[secondary_reload] = 1;
948 reload_optional[secondary_reload] &= optional;
949 reload_secondary_p[secondary_reload] = 1;
952 if (secondary_reload == n_reloads)
954 /* We need to make a new secondary reload for this register
956 reload_in[secondary_reload] = reload_out[secondary_reload] = 0;
957 reload_reg_class[secondary_reload] = secondary_class;
958 reload_inmode[secondary_reload] = secondary_mode;
959 reload_outmode[secondary_reload] = secondary_out_mode;
960 reload_reg_rtx[secondary_reload] = 0;
961 reload_optional[secondary_reload] = optional;
962 reload_inc[secondary_reload] = 0;
963 reload_strict_low[secondary_reload] = 0;
964 /* Maybe we could combine these, but it seems too tricky. */
965 reload_nocombine[secondary_reload] = 1;
966 reload_in_reg[secondary_reload] = 0;
967 reload_needed_for[secondary_reload] = needed_for;
968 reload_needed_for_multiple[secondary_reload] = 0;
969 reload_secondary_reload[secondary_reload] = tertiary_reload;
970 reload_secondary_icode[secondary_reload] = tertiary_icode;
971 reload_secondary_p[secondary_reload] = 1;
976 #ifdef SECONDARY_MEMORY_NEEDED
977 /* If we need a memory location to copy between the two
978 reload regs, set it up now. */
980 if (in != 0 && secondary_icode == CODE_FOR_nothing
981 && SECONDARY_MEMORY_NEEDED (secondary_class, class, inmode))
982 get_secondary_mem (in, inmode);
984 if (out != 0 && secondary_icode == CODE_FOR_nothing
985 && SECONDARY_MEMORY_NEEDED (class, secondary_class, outmode))
986 get_secondary_mem (out, outmode);
992 /* We found no existing reload suitable for re-use.
993 So add an additional reload. */
997 reload_reg_class[i] = class;
998 reload_inmode[i] = inmode;
999 reload_outmode[i] = outmode;
1000 reload_reg_rtx[i] = 0;
1001 reload_optional[i] = optional;
1003 reload_strict_low[i] = strict_low;
1004 reload_nocombine[i] = 0;
1005 reload_in_reg[i] = inloc ? *inloc : 0;
1006 reload_needed_for[i] = needed_for;
1007 reload_needed_for_multiple[i] = 0;
1008 reload_secondary_reload[i] = secondary_reload;
1009 reload_secondary_icode[i] = secondary_icode;
1010 reload_secondary_p[i] = 0;
1014 #ifdef SECONDARY_MEMORY_NEEDED
1015 /* If a memory location is needed for the copy, make one. */
1016 if (in != 0 && GET_CODE (in) == REG
1017 && REGNO (in) < FIRST_PSEUDO_REGISTER
1018 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1020 get_secondary_mem (in, inmode);
1022 if (out != 0 && GET_CODE (out) == REG
1023 && REGNO (out) < FIRST_PSEUDO_REGISTER
1024 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1026 get_secondary_mem (out, outmode);
1031 /* We are reusing an existing reload,
1032 but we may have additional information for it.
1033 For example, we may now have both IN and OUT
1034 while the old one may have just one of them. */
1036 if (inmode != VOIDmode)
1037 reload_inmode[i] = inmode;
1038 if (outmode != VOIDmode)
1039 reload_outmode[i] = outmode;
1043 reload_out[i] = out;
1044 if (reg_class_subset_p (class, reload_reg_class[i]))
1045 reload_reg_class[i] = class;
1046 reload_optional[i] &= optional;
1047 if (reload_needed_for[i] != needed_for)
1048 reload_needed_for_multiple[i] = 1;
1051 /* If the ostensible rtx being reload differs from the rtx found
1052 in the location to substitute, this reload is not safe to combine
1053 because we cannot reliably tell whether it appears in the insn. */
1055 if (in != 0 && in != *inloc)
1056 reload_nocombine[i] = 1;
1059 /* This was replaced by changes in find_reloads_address_1 and the new
1060 function inc_for_reload, which go with a new meaning of reload_inc. */
1062 /* If this is an IN/OUT reload in an insn that sets the CC,
1063 it must be for an autoincrement. It doesn't work to store
1064 the incremented value after the insn because that would clobber the CC.
1065 So we must do the increment of the value reloaded from,
1066 increment it, store it back, then decrement again. */
1067 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1071 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1072 /* If we did not find a nonzero amount-to-increment-by,
1073 that contradicts the belief that IN is being incremented
1074 in an address in this insn. */
1075 if (reload_inc[i] == 0)
1080 /* If we will replace IN and OUT with the reload-reg,
1081 record where they are located so that substitution need
1082 not do a tree walk. */
1084 if (replace_reloads)
1088 register struct replacement *r = &replacements[n_replacements++];
1090 r->subreg_loc = in_subreg_loc;
1094 if (outloc != 0 && outloc != inloc)
1096 register struct replacement *r = &replacements[n_replacements++];
1099 r->subreg_loc = out_subreg_loc;
1104 /* If this reload is just being introduced and it has both
1105 an incoming quantity and an outgoing quantity that are
1106 supposed to be made to match, see if either one of the two
1107 can serve as the place to reload into.
1109 If one of them is acceptable, set reload_reg_rtx[i]
1112 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1114 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1115 reload_reg_class[i], i);
1117 /* If the outgoing register already contains the same value
1118 as the incoming one, we can dispense with loading it.
1119 The easiest way to tell the caller that is to give a phony
1120 value for the incoming operand (same as outgoing one). */
1121 if (reload_reg_rtx[i] == out
1122 && (GET_CODE (in) == REG || CONSTANT_P (in))
1123 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1124 static_reload_reg_p, i, inmode))
1128 /* If this is an input reload and the operand contains a register that
1129 dies in this insn and is used nowhere else, see if it is the right class
1130 to be used for this reload. Use it if so. (This occurs most commonly
1131 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1132 this if it is also an output reload that mentions the register unless
1133 the output is a SUBREG that clobbers an entire register.
1135 Note that the operand might be one of the spill regs, if it is a
1136 pseudo reg and we are in a block where spilling has not taken place.
1137 But if there is no spilling in this block, that is OK.
1138 An explicitly used hard reg cannot be a spill reg. */
1140 if (reload_reg_rtx[i] == 0 && in != 0)
1145 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1146 if (REG_NOTE_KIND (note) == REG_DEAD
1147 && GET_CODE (XEXP (note, 0)) == REG
1148 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1149 && reg_mentioned_p (XEXP (note, 0), in)
1150 && ! refers_to_regno_for_reload_p (regno,
1152 + HARD_REGNO_NREGS (regno,
1154 PATTERN (this_insn), inloc)
1156 || (GET_CODE (in) == SUBREG
1157 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1159 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1160 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1161 /* Make sure the operand fits in the reg that dies. */
1162 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1163 && HARD_REGNO_MODE_OK (regno, inmode)
1164 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1165 && HARD_REGNO_MODE_OK (regno, outmode)
1166 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1167 && !fixed_regs[regno])
1169 reload_reg_rtx[i] = gen_rtx (REG, inmode, regno);
1175 output_reloadnum = i;
1180 /* Record an additional place we must replace a value
1181 for which we have already recorded a reload.
1182 RELOADNUM is the value returned by push_reload
1183 when the reload was recorded.
1184 This is used in insn patterns that use match_dup. */
1187 push_replacement (loc, reloadnum, mode)
1190 enum machine_mode mode;
1192 if (replace_reloads)
1194 register struct replacement *r = &replacements[n_replacements++];
1195 r->what = reloadnum;
1202 /* If there is only one output reload, and it is not for an earlyclobber
1203 operand, try to combine it with a (logically unrelated) input reload
1204 to reduce the number of reload registers needed.
1206 This is safe if the input reload does not appear in
1207 the value being output-reloaded, because this implies
1208 it is not needed any more once the original insn completes.
1210 If that doesn't work, see we can use any of the registers that
1211 die in this insn as a reload register. We can if it is of the right
1212 class and does not appear in the value being output-reloaded. */
1218 int output_reload = -1;
1221 /* Find the output reload; return unless there is exactly one
1222 and that one is mandatory. */
1224 for (i = 0; i < n_reloads; i++)
1225 if (reload_out[i] != 0)
1227 if (output_reload >= 0)
1232 if (output_reload < 0 || reload_optional[output_reload])
1235 /* An input-output reload isn't combinable. */
1237 if (reload_in[output_reload] != 0)
1240 /* If this reload is for an earlyclobber operand, we can't do anything. */
1242 for (i = 0; i < n_earlyclobbers; i++)
1243 if (reload_out[output_reload] == reload_earlyclobbers[i])
1246 /* Check each input reload; can we combine it? */
1248 for (i = 0; i < n_reloads; i++)
1249 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1250 /* Life span of this reload must not extend past main insn. */
1251 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_RELOAD_ADDRESS
1252 && ! reload_needed_for_multiple[i]
1253 && reload_inmode[i] == reload_outmode[output_reload]
1254 && reload_inc[i] == 0
1255 && reload_reg_rtx[i] == 0
1256 && reload_strict_low[i] == 0
1257 /* Don't combine two reloads with different secondary reloads. */
1258 && (reload_secondary_reload[i] == reload_secondary_reload[output_reload]
1259 || reload_secondary_reload[i] == -1
1260 || reload_secondary_reload[output_reload] == -1)
1261 && (reg_class_subset_p (reload_reg_class[i],
1262 reload_reg_class[output_reload])
1263 || reg_class_subset_p (reload_reg_class[output_reload],
1264 reload_reg_class[i]))
1265 && (MATCHES (reload_in[i], reload_out[output_reload])
1266 /* Args reversed because the first arg seems to be
1267 the one that we imagine being modified
1268 while the second is the one that might be affected. */
1269 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1271 /* However, if the input is a register that appears inside
1272 the output, then we also can't share.
1273 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1274 If the same reload reg is used for both reg 69 and the
1275 result to be stored in memory, then that result
1276 will clobber the address of the memory ref. */
1277 && ! (GET_CODE (reload_in[i]) == REG
1278 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1279 reload_out[output_reload])))))
1283 /* We have found a reload to combine with! */
1284 reload_out[i] = reload_out[output_reload];
1285 reload_outmode[i] = reload_outmode[output_reload];
1286 /* Mark the old output reload as inoperative. */
1287 reload_out[output_reload] = 0;
1288 /* The combined reload is needed for the entire insn. */
1289 reload_needed_for_multiple[i] = 1;
1290 reload_when_needed[i] = RELOAD_OTHER;
1291 /* If the output reload had a secondary reload, copy it. */
1292 if (reload_secondary_reload[output_reload] != -1)
1293 reload_secondary_reload[i] = reload_secondary_reload[output_reload];
1294 /* If required, minimize the register class. */
1295 if (reg_class_subset_p (reload_reg_class[output_reload],
1296 reload_reg_class[i]))
1297 reload_reg_class[i] = reload_reg_class[output_reload];
1299 /* Transfer all replacements from the old reload to the combined. */
1300 for (j = 0; j < n_replacements; j++)
1301 if (replacements[j].what == output_reload)
1302 replacements[j].what = i;
1307 /* If this insn has only one operand that is modified or written (assumed
1308 to be the first), it must be the one corresponding to this reload. It
1309 is safe to use anything that dies in this insn for that output provided
1310 that it does not occur in the output (we already know it isn't an
1311 earlyclobber. If this is an asm insn, give up. */
1313 if (INSN_CODE (this_insn) == -1)
1316 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1317 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1318 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1321 /* See if some hard register that dies in this insn and is not used in
1322 the output is the right class. Only works if the register we pick
1323 up can fully hold our output reload. */
1324 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1325 if (REG_NOTE_KIND (note) == REG_DEAD
1326 && GET_CODE (XEXP (note, 0)) == REG
1327 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1328 reload_out[output_reload])
1329 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1330 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1331 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1332 REGNO (XEXP (note, 0)))
1333 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1334 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1335 && ! fixed_regs[REGNO (XEXP (note, 0))])
1337 reload_reg_rtx[output_reload] = gen_rtx (REG,
1338 reload_outmode[output_reload],
1339 REGNO (XEXP (note, 0)));
1344 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1345 See if one of IN and OUT is a register that may be used;
1346 this is desirable since a spill-register won't be needed.
1347 If so, return the register rtx that proves acceptable.
1349 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1350 CLASS is the register class required for the reload.
1352 If FOR_REAL is >= 0, it is the number of the reload,
1353 and in some cases when it can be discovered that OUT doesn't need
1354 to be computed, clear out reload_out[FOR_REAL].
1356 If FOR_REAL is -1, this should not be done, because this call
1357 is just to see if a register can be found, not to find and install it. */
1360 find_dummy_reload (real_in, real_out, inloc, outloc, class, for_real)
1361 rtx real_in, real_out;
1362 rtx *inloc, *outloc;
1363 enum reg_class class;
1372 /* If operands exceed a word, we can't use either of them
1373 unless they have the same size. */
1374 if (GET_MODE_SIZE (GET_MODE (real_out)) != GET_MODE_SIZE (GET_MODE (real_in))
1375 && (GET_MODE_SIZE (GET_MODE (real_out)) > UNITS_PER_WORD
1376 || GET_MODE_SIZE (GET_MODE (real_in)) > UNITS_PER_WORD))
1379 /* Find the inside of any subregs. */
1380 while (GET_CODE (out) == SUBREG)
1382 out_offset = SUBREG_WORD (out);
1383 out = SUBREG_REG (out);
1385 while (GET_CODE (in) == SUBREG)
1387 in_offset = SUBREG_WORD (in);
1388 in = SUBREG_REG (in);
1391 /* Narrow down the reg class, the same way push_reload will;
1392 otherwise we might find a dummy now, but push_reload won't. */
1393 class = PREFERRED_RELOAD_CLASS (in, class);
1395 /* See if OUT will do. */
1396 if (GET_CODE (out) == REG
1397 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1399 register int regno = REGNO (out) + out_offset;
1400 int nwords = HARD_REGNO_NREGS (regno, GET_MODE (real_out));
1403 /* When we consider whether the insn uses OUT,
1404 ignore references within IN. They don't prevent us
1405 from copying IN into OUT, because those refs would
1406 move into the insn that reloads IN.
1408 However, we only ignore IN in its role as this reload.
1409 If the insn uses IN elsewhere and it contains OUT,
1410 that counts. We can't be sure it's the "same" operand
1411 so it might not go through this reload. */
1413 *inloc = const0_rtx;
1415 if (regno < FIRST_PSEUDO_REGISTER
1416 /* A fixed reg that can overlap other regs better not be used
1417 for reloading in any way. */
1418 #ifdef OVERLAPPING_REGNO_P
1419 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1421 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1422 PATTERN (this_insn), outloc))
1425 for (i = 0; i < nwords; i++)
1426 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1432 if (GET_CODE (real_out) == REG)
1435 value = gen_rtx (REG, GET_MODE (real_out), regno);
1442 /* Consider using IN if OUT was not acceptable
1443 or if OUT dies in this insn (like the quotient in a divmod insn).
1444 We can't use IN unless it is dies in this insn,
1445 which means we must know accurately which hard regs are live.
1446 Also, the result can't go in IN if IN is used within OUT. */
1447 if (hard_regs_live_known
1448 && GET_CODE (in) == REG
1449 && REGNO (in) < FIRST_PSEUDO_REGISTER
1451 || find_reg_note (this_insn, REG_UNUSED, real_out))
1452 && find_reg_note (this_insn, REG_DEAD, real_in)
1453 && !fixed_regs[REGNO (in)]
1454 && HARD_REGNO_MODE_OK (REGNO (in), GET_MODE (out)))
1456 register int regno = REGNO (in) + in_offset;
1457 int nwords = HARD_REGNO_NREGS (regno, GET_MODE (real_in));
1459 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1460 && ! hard_reg_set_here_p (regno, regno + nwords,
1461 PATTERN (this_insn)))
1464 for (i = 0; i < nwords; i++)
1465 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1471 /* If we were going to use OUT as the reload reg
1472 and changed our mind, it means OUT is a dummy that
1473 dies here. So don't bother copying value to it. */
1474 if (for_real >= 0 && value == real_out)
1475 reload_out[for_real] = 0;
1476 if (GET_CODE (real_in) == REG)
1479 value = gen_rtx (REG, GET_MODE (real_in), regno);
1487 /* This page contains subroutines used mainly for determining
1488 whether the IN or an OUT of a reload can serve as the
1491 /* Return 1 if expression X alters a hard reg in the range
1492 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1493 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1494 X should be the body of an instruction. */
1497 hard_reg_set_here_p (beg_regno, end_regno, x)
1498 register int beg_regno, end_regno;
1501 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1503 register rtx op0 = SET_DEST (x);
1504 while (GET_CODE (op0) == SUBREG)
1505 op0 = SUBREG_REG (op0);
1506 if (GET_CODE (op0) == REG)
1508 register int r = REGNO (op0);
1509 /* See if this reg overlaps range under consideration. */
1511 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1515 else if (GET_CODE (x) == PARALLEL)
1517 register int i = XVECLEN (x, 0) - 1;
1519 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1526 /* Return 1 if ADDR is a valid memory address for mode MODE,
1527 and check that each pseudo reg has the proper kind of
1531 strict_memory_address_p (mode, addr)
1532 enum machine_mode mode;
1535 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
1543 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1544 if they are the same hard reg, and has special hacks for
1545 autoincrement and autodecrement.
1546 This is specifically intended for find_reloads to use
1547 in determining whether two operands match.
1548 X is the operand whose number is the lower of the two.
1550 The value is 2 if Y contains a pre-increment that matches
1551 a non-incrementing address in X. */
1553 /* ??? To be completely correct, we should arrange to pass
1554 for X the output operand and for Y the input operand.
1555 For now, we assume that the output operand has the lower number
1556 because that is natural in (SET output (... input ...)). */
1559 operands_match_p (x, y)
1563 register RTX_CODE code = GET_CODE (x);
1569 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
1570 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
1571 && GET_CODE (SUBREG_REG (y)) == REG)))
1577 i = REGNO (SUBREG_REG (x));
1578 if (i >= FIRST_PSEUDO_REGISTER)
1580 i += SUBREG_WORD (x);
1585 if (GET_CODE (y) == SUBREG)
1587 j = REGNO (SUBREG_REG (y));
1588 if (j >= FIRST_PSEUDO_REGISTER)
1590 j += SUBREG_WORD (y);
1597 /* If two operands must match, because they are really a single
1598 operand of an assembler insn, then two postincrements are invalid
1599 because the assembler insn would increment only once.
1600 On the other hand, an postincrement matches ordinary indexing
1601 if the postincrement is the output operand. */
1602 if (code == POST_DEC || code == POST_INC)
1603 return operands_match_p (XEXP (x, 0), y);
1604 /* Two preincrements are invalid
1605 because the assembler insn would increment only once.
1606 On the other hand, an preincrement matches ordinary indexing
1607 if the preincrement is the input operand.
1608 In this case, return 2, since some callers need to do special
1609 things when this happens. */
1610 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
1611 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
1615 /* Now we have disposed of all the cases
1616 in which different rtx codes can match. */
1617 if (code != GET_CODE (y))
1619 if (code == LABEL_REF)
1620 return XEXP (x, 0) == XEXP (y, 0);
1621 if (code == SYMBOL_REF)
1622 return XSTR (x, 0) == XSTR (y, 0);
1624 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1626 if (GET_MODE (x) != GET_MODE (y))
1629 /* Compare the elements. If any pair of corresponding elements
1630 fail to match, return 0 for the whole things. */
1633 fmt = GET_RTX_FORMAT (code);
1634 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1640 if (XWINT (x, i) != XWINT (y, i))
1645 if (XINT (x, i) != XINT (y, i))
1650 val = operands_match_p (XEXP (x, i), XEXP (y, i));
1653 /* If any subexpression returns 2,
1654 we should return 2 if we are successful. */
1662 /* It is believed that rtx's at this level will never
1663 contain anything but integers and other rtx's,
1664 except for within LABEL_REFs and SYMBOL_REFs. */
1669 return 1 + success_2;
1672 /* Return the number of times character C occurs in string S. */
1675 n_occurrences (c, s)
1685 struct decomposition
1690 HOST_WIDE_INT start;
1694 /* Describe the range of registers or memory referenced by X.
1695 If X is a register, set REG_FLAG and put the first register
1696 number into START and the last plus one into END.
1697 If X is a memory reference, put a base address into BASE
1698 and a range of integer offsets into START and END.
1699 If X is pushing on the stack, we can assume it causes no trouble,
1700 so we set the SAFE field. */
1702 static struct decomposition
1706 struct decomposition val;
1711 if (GET_CODE (x) == MEM)
1713 rtx base, offset = 0;
1714 rtx addr = XEXP (x, 0);
1716 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
1717 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
1719 val.base = XEXP (addr, 0);
1720 val.start = - GET_MODE_SIZE (GET_MODE (x));
1721 val.end = GET_MODE_SIZE (GET_MODE (x));
1722 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
1726 if (GET_CODE (addr) == CONST)
1728 addr = XEXP (addr, 0);
1731 if (GET_CODE (addr) == PLUS)
1733 if (CONSTANT_P (XEXP (addr, 0)))
1735 base = XEXP (addr, 1);
1736 offset = XEXP (addr, 0);
1738 else if (CONSTANT_P (XEXP (addr, 1)))
1740 base = XEXP (addr, 0);
1741 offset = XEXP (addr, 1);
1748 offset = const0_rtx;
1750 if (GET_CODE (offset) == CONST)
1751 offset = XEXP (offset, 0);
1752 if (GET_CODE (offset) == PLUS)
1754 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
1756 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 1));
1757 offset = XEXP (offset, 0);
1759 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
1761 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 0));
1762 offset = XEXP (offset, 1);
1766 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
1767 offset = const0_rtx;
1770 else if (GET_CODE (offset) != CONST_INT)
1772 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
1773 offset = const0_rtx;
1776 if (all_const && GET_CODE (base) == PLUS)
1777 base = gen_rtx (CONST, GET_MODE (base), base);
1779 if (GET_CODE (offset) != CONST_INT)
1782 val.start = INTVAL (offset);
1783 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
1787 else if (GET_CODE (x) == REG)
1790 val.start = true_regnum (x);
1793 /* A pseudo with no hard reg. */
1794 val.start = REGNO (x);
1795 val.end = val.start + 1;
1799 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
1801 else if (GET_CODE (x) == SUBREG)
1803 if (GET_CODE (SUBREG_REG (x)) != REG)
1804 /* This could be more precise, but it's good enough. */
1805 return decompose (SUBREG_REG (x));
1807 val.start = true_regnum (x);
1809 return decompose (SUBREG_REG (x));
1812 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
1814 else if (CONSTANT_P (x)
1815 /* This hasn't been assigned yet, so it can't conflict yet. */
1816 || GET_CODE (x) == SCRATCH)
1823 /* Return 1 if altering Y will not modify the value of X.
1824 Y is also described by YDATA, which should be decompose (Y). */
1827 immune_p (x, y, ydata)
1829 struct decomposition ydata;
1831 struct decomposition xdata;
1834 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
1838 if (GET_CODE (y) != MEM)
1840 /* If Y is memory and X is not, Y can't affect X. */
1841 if (GET_CODE (x) != MEM)
1844 xdata = decompose (x);
1846 if (! rtx_equal_p (xdata.base, ydata.base))
1848 /* If bases are distinct symbolic constants, there is no overlap. */
1849 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
1851 /* Constants and stack slots never overlap. */
1852 if (CONSTANT_P (xdata.base)
1853 && (ydata.base == frame_pointer_rtx
1854 || ydata.base == stack_pointer_rtx))
1856 if (CONSTANT_P (ydata.base)
1857 && (xdata.base == frame_pointer_rtx
1858 || xdata.base == stack_pointer_rtx))
1860 /* If either base is variable, we don't know anything. */
1865 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
1868 /* Similar, but calls decompose. */
1871 safe_from_earlyclobber (op, clobber)
1874 struct decomposition early_data;
1876 early_data = decompose (clobber);
1877 return immune_p (op, clobber, early_data);
1880 /* Main entry point of this file: search the body of INSN
1881 for values that need reloading and record them with push_reload.
1882 REPLACE nonzero means record also where the values occur
1883 so that subst_reloads can be used.
1885 IND_LEVELS says how many levels of indirection are supported by this
1886 machine; a value of zero means that a memory reference is not a valid
1889 LIVE_KNOWN says we have valid information about which hard
1890 regs are live at each point in the program; this is true when
1891 we are called from global_alloc but false when stupid register
1892 allocation has been done.
1894 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
1895 which is nonnegative if the reg has been commandeered for reloading into.
1896 It is copied into STATIC_RELOAD_REG_P and referenced from there
1897 by various subroutines. */
1900 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
1902 int replace, ind_levels;
1904 short *reload_reg_p;
1906 rtx non_reloaded_operands[MAX_RECOG_OPERANDS];
1907 int n_non_reloaded_operands = 0;
1908 #ifdef REGISTER_CONSTRAINTS
1910 enum reload_modified { RELOAD_NOTHING, RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE };
1912 register int insn_code_number;
1915 /* These are the constraints for the insn. We don't change them. */
1916 char *constraints1[MAX_RECOG_OPERANDS];
1917 /* These start out as the constraints for the insn
1918 and they are chewed up as we consider alternatives. */
1919 char *constraints[MAX_RECOG_OPERANDS];
1920 /* These are the preferred classes for an operand, or NO_REGS if it isn't
1922 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
1923 char pref_or_nothing[MAX_RECOG_OPERANDS];
1924 /* Nonzero for a MEM operand whose entire address needs a reload. */
1925 int address_reloaded[MAX_RECOG_OPERANDS];
1926 int no_input_reloads = 0, no_output_reloads = 0;
1928 int this_alternative[MAX_RECOG_OPERANDS];
1929 char this_alternative_win[MAX_RECOG_OPERANDS];
1930 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
1931 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
1932 int this_alternative_matches[MAX_RECOG_OPERANDS];
1934 int goal_alternative[MAX_RECOG_OPERANDS];
1935 int this_alternative_number;
1936 int goal_alternative_number;
1937 int operand_reloadnum[MAX_RECOG_OPERANDS];
1938 int goal_alternative_matches[MAX_RECOG_OPERANDS];
1939 int goal_alternative_matched[MAX_RECOG_OPERANDS];
1940 char goal_alternative_win[MAX_RECOG_OPERANDS];
1941 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
1942 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
1943 int goal_alternative_swapped;
1944 enum reload_modified modified[MAX_RECOG_OPERANDS];
1947 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
1948 rtx substed_operand[MAX_RECOG_OPERANDS];
1949 rtx body = PATTERN (insn);
1950 rtx set = single_set (insn);
1951 int goal_earlyclobber, this_earlyclobber;
1952 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
1955 this_insn_is_asm = 0; /* Tentative. */
1959 n_earlyclobbers = 0;
1960 replace_reloads = replace;
1961 hard_regs_live_known = live_known;
1962 static_reload_reg_p = reload_reg_p;
1964 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
1965 neither are insns that SET cc0. Insns that use CC0 are not allowed
1966 to have any input reloads. */
1967 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
1968 no_output_reloads = 1;
1971 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
1972 no_input_reloads = 1;
1973 if (reg_set_p (cc0_rtx, PATTERN (insn)))
1974 no_output_reloads = 1;
1977 #ifdef SECONDARY_MEMORY_NEEDED
1978 /* The eliminated forms of any secondary memory locations are per-insn, so
1979 clear them out here. */
1981 bzero (secondary_memlocs_elim, sizeof secondary_memlocs_elim);
1984 /* Find what kind of insn this is. NOPERANDS gets number of operands.
1985 Make OPERANDS point to a vector of operand values.
1986 Make OPERAND_LOCS point to a vector of pointers to
1987 where the operands were found.
1988 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
1989 constraint-strings for this insn.
1990 Return if the insn needs no reload processing. */
1992 switch (GET_CODE (body))
2002 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2003 is cheap to move between them. If it is not, there may not be an insn
2004 to do the copy, so we may need a reload. */
2005 if (GET_CODE (SET_DEST (body)) == REG
2006 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2007 && GET_CODE (SET_SRC (body)) == REG
2008 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2009 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2010 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2014 noperands = asm_noperands (body);
2017 /* This insn is an `asm' with operands. */
2019 insn_code_number = -1;
2020 this_insn_is_asm = 1;
2022 /* expand_asm_operands makes sure there aren't too many operands. */
2023 if (noperands > MAX_RECOG_OPERANDS)
2026 /* Now get the operand values and constraints out of the insn. */
2028 decode_asm_operands (body, recog_operand, recog_operand_loc,
2029 constraints, operand_mode);
2032 bcopy (constraints, constraints1, noperands * sizeof (char *));
2033 n_alternatives = n_occurrences (',', constraints[0]) + 1;
2034 for (i = 1; i < noperands; i++)
2035 if (n_alternatives != n_occurrences (',', constraints[i]) + 1)
2037 error_for_asm (insn, "operand constraints differ in number of alternatives");
2038 /* Avoid further trouble with this insn. */
2039 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
2048 /* Ordinary insn: recognize it, get the operands via insn_extract
2049 and get the constraints. */
2051 insn_code_number = recog_memoized (insn);
2052 if (insn_code_number < 0)
2053 fatal_insn_not_found (insn);
2055 noperands = insn_n_operands[insn_code_number];
2056 n_alternatives = insn_n_alternatives[insn_code_number];
2057 /* Just return "no reloads" if insn has no operands with constraints. */
2058 if (n_alternatives == 0)
2060 insn_extract (insn);
2061 for (i = 0; i < noperands; i++)
2063 constraints[i] = constraints1[i]
2064 = insn_operand_constraint[insn_code_number][i];
2065 operand_mode[i] = insn_operand_mode[insn_code_number][i];
2074 /* If we will need to know, later, whether some pair of operands
2075 are the same, we must compare them now and save the result.
2076 Reloading the base and index registers will clobber them
2077 and afterward they will fail to match. */
2079 for (i = 0; i < noperands; i++)
2084 substed_operand[i] = recog_operand[i];
2087 /* Scan this operand's constraint to see if it should match another. */
2092 /* The last operand should not be marked commutative. */
2093 if (i == noperands - 1)
2095 if (this_insn_is_asm)
2096 warning_for_asm (this_insn,
2097 "`%%' constraint used with last operand");
2104 else if (c >= '0' && c <= '9')
2107 operands_match[c][i]
2108 = operands_match_p (recog_operand[c], recog_operand[i]);
2110 /* An operand may not match itself. */
2113 if (this_insn_is_asm)
2114 warning_for_asm (this_insn,
2115 "operand %d has constraint %d", i, c);
2120 /* If C can be commuted with C+1, and C might need to match I,
2121 then C+1 might also need to match I. */
2122 if (commutative >= 0)
2124 if (c == commutative || c == commutative + 1)
2126 int other = c + (c == commutative ? 1 : -1);
2127 operands_match[other][i]
2128 = operands_match_p (recog_operand[other], recog_operand[i]);
2130 if (i == commutative || i == commutative + 1)
2132 int other = i + (i == commutative ? 1 : -1);
2133 operands_match[c][other]
2134 = operands_match_p (recog_operand[c], recog_operand[other]);
2136 /* Note that C is supposed to be less than I.
2137 No need to consider altering both C and I
2138 because in that case we would alter one into the other. */
2143 /* Examine each operand that is a memory reference or memory address
2144 and reload parts of the addresses into index registers.
2145 While we are at it, initialize the array `modified'.
2146 Also here any references to pseudo regs that didn't get hard regs
2147 but are equivalent to constants get replaced in the insn itself
2148 with those constants. Nobody will ever see them again.
2150 Finally, set up the preferred classes of each operand. */
2152 for (i = 0; i < noperands; i++)
2154 register RTX_CODE code = GET_CODE (recog_operand[i]);
2155 modified[i] = RELOAD_READ;
2156 address_reloaded[i] = 0;
2158 if (constraints[i][0] == 'p')
2160 find_reloads_address (VOIDmode, NULL_PTR,
2161 recog_operand[i], recog_operand_loc[i],
2162 recog_operand[i], ind_levels);
2163 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2165 else if (code == MEM)
2167 if (find_reloads_address (GET_MODE (recog_operand[i]),
2168 recog_operand_loc[i],
2169 XEXP (recog_operand[i], 0),
2170 &XEXP (recog_operand[i], 0),
2171 recog_operand[i], ind_levels))
2172 address_reloaded[i] = 1;
2173 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2175 else if (code == SUBREG)
2176 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2177 = find_reloads_toplev (recog_operand[i], ind_levels,
2179 && &SET_DEST (set) == recog_operand_loc[i]);
2180 else if (code == REG)
2182 /* This is equivalent to calling find_reloads_toplev.
2183 The code is duplicated for speed.
2184 When we find a pseudo always equivalent to a constant,
2185 we replace it by the constant. We must be sure, however,
2186 that we don't try to replace it in the insn in which it
2188 register int regno = REGNO (recog_operand[i]);
2189 if (reg_equiv_constant[regno] != 0
2190 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2191 substed_operand[i] = recog_operand[i]
2192 = reg_equiv_constant[regno];
2193 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2194 that feeds this insn. */
2195 if (reg_equiv_mem[regno] != 0)
2196 substed_operand[i] = recog_operand[i]
2197 = reg_equiv_mem[regno];
2199 if (reg_equiv_address[regno] != 0)
2201 /* If reg_equiv_address is not a constant address, copy it,
2202 since it may be shared. */
2203 rtx address = reg_equiv_address[regno];
2205 if (rtx_varies_p (address))
2206 address = copy_rtx (address);
2208 /* If this is an output operand, we must output a CLOBBER
2209 after INSN so find_equiv_reg knows REGNO is being written. */
2210 if (constraints[i][0] == '='
2211 || constraints[i][0] == '+')
2212 emit_insn_after (gen_rtx (CLOBBER, VOIDmode, recog_operand[i]),
2215 *recog_operand_loc[i] = recog_operand[i]
2216 = gen_rtx (MEM, GET_MODE (recog_operand[i]), address);
2217 RTX_UNCHANGING_P (recog_operand[i])
2218 = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
2219 find_reloads_address (GET_MODE (recog_operand[i]),
2220 recog_operand_loc[i],
2221 XEXP (recog_operand[i], 0),
2222 &XEXP (recog_operand[i], 0),
2223 recog_operand[i], ind_levels);
2224 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2227 /* If the operand is still a register (we didn't replace it with an
2228 equivalent), get the preferred class to reload it into. */
2229 code = GET_CODE (recog_operand[i]);
2231 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
2232 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2234 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
2235 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2238 /* If this is simply a copy from operand 1 to operand 0, merge the
2239 preferred classes for the operands. */
2240 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2241 && recog_operand[1] == SET_SRC (set))
2243 preferred_class[0] = preferred_class[1]
2244 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2245 pref_or_nothing[0] |= pref_or_nothing[1];
2246 pref_or_nothing[1] |= pref_or_nothing[0];
2249 /* Now see what we need for pseudo-regs that didn't get hard regs
2250 or got the wrong kind of hard reg. For this, we must consider
2251 all the operands together against the register constraints. */
2253 best = MAX_RECOG_OPERANDS + 300;
2256 goal_alternative_swapped = 0;
2259 /* The constraints are made of several alternatives.
2260 Each operand's constraint looks like foo,bar,... with commas
2261 separating the alternatives. The first alternatives for all
2262 operands go together, the second alternatives go together, etc.
2264 First loop over alternatives. */
2266 for (this_alternative_number = 0;
2267 this_alternative_number < n_alternatives;
2268 this_alternative_number++)
2270 /* Loop over operands for one constraint alternative. */
2271 /* LOSERS counts those that don't fit this alternative
2272 and would require loading. */
2274 /* BAD is set to 1 if it some operand can't fit this alternative
2275 even after reloading. */
2277 /* REJECT is a count of how undesirable this alternative says it is
2278 if any reloading is required. If the alternative matches exactly
2279 then REJECT is ignored, but otherwise it gets this much
2280 counted against it in addition to the reloading needed. Each
2281 ? counts three times here since we want the disparaging caused by
2282 a bad register class to only count 1/3 as much. */
2285 this_earlyclobber = 0;
2287 for (i = 0; i < noperands; i++)
2289 register char *p = constraints[i];
2290 register int win = 0;
2291 /* 0 => this operand can be reloaded somehow for this alternative */
2293 /* 0 => this operand can be reloaded if the alternative allows regs. */
2296 register rtx operand = recog_operand[i];
2298 /* Nonzero means this is a MEM that must be reloaded into a reg
2299 regardless of what the constraint says. */
2300 int force_reload = 0;
2302 int earlyclobber = 0;
2304 /* If the operand is a SUBREG, extract
2305 the REG or MEM (or maybe even a constant) within.
2306 (Constants can occur as a result of reg_equiv_constant.) */
2308 while (GET_CODE (operand) == SUBREG)
2310 offset += SUBREG_WORD (operand);
2311 operand = SUBREG_REG (operand);
2312 /* Force reload if this is not a register or if there may may
2313 be a problem accessing the register in the outer mode. */
2314 if (GET_CODE (operand) != REG
2315 #if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
2316 /* ??? The comment below clearly does not match the code.
2317 What the code below actually does is set force_reload
2318 for a paradoxical subreg of a pseudo. rms and kenner
2319 can't see the point of doing this. */
2320 /* Nonparadoxical subreg of a pseudoreg.
2321 Don't to load the full width if on this machine
2322 we expected the fetch to extend. */
2323 || ((GET_MODE_SIZE (operand_mode[i])
2324 > GET_MODE_SIZE (GET_MODE (operand)))
2325 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
2327 /* Subreg of a hard reg which can't handle the subreg's mode
2328 or which would handle that mode in the wrong number of
2329 registers for subregging to work. */
2330 || (REGNO (operand) < FIRST_PSEUDO_REGISTER
2331 && (! HARD_REGNO_MODE_OK (REGNO (operand),
2333 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2334 && (GET_MODE_SIZE (GET_MODE (operand))
2336 && ((GET_MODE_SIZE (GET_MODE (operand))
2338 != HARD_REGNO_NREGS (REGNO (operand),
2339 GET_MODE (operand)))))))
2343 this_alternative[i] = (int) NO_REGS;
2344 this_alternative_win[i] = 0;
2345 this_alternative_offmemok[i] = 0;
2346 this_alternative_earlyclobber[i] = 0;
2347 this_alternative_matches[i] = -1;
2349 /* An empty constraint or empty alternative
2350 allows anything which matched the pattern. */
2351 if (*p == 0 || *p == ',')
2354 /* Scan this alternative's specs for this operand;
2355 set WIN if the operand fits any letter in this alternative.
2356 Otherwise, clear BADOP if this operand could
2357 fit some letter after reloads,
2358 or set WINREG if this operand could fit after reloads
2359 provided the constraint allows some registers. */
2361 while (*p && (c = *p++) != ',')
2365 modified[i] = RELOAD_WRITE;
2369 modified[i] = RELOAD_READ_WRITE;
2376 /* The last operand should not be marked commutative. */
2377 if (i != noperands - 1)
2390 /* Ignore rest of this alternative as far as
2391 reloading is concerned. */
2392 while (*p && *p != ',') p++;
2401 this_alternative_matches[i] = c;
2402 /* We are supposed to match a previous operand.
2403 If we do, we win if that one did.
2404 If we do not, count both of the operands as losers.
2405 (This is too conservative, since most of the time
2406 only a single reload insn will be needed to make
2407 the two operands win. As a result, this alternative
2408 may be rejected when it is actually desirable.) */
2409 if ((swapped && (c != commutative || i != commutative + 1))
2410 /* If we are matching as if two operands were swapped,
2411 also pretend that operands_match had been computed
2413 But if I is the second of those and C is the first,
2414 don't exchange them, because operands_match is valid
2415 only on one side of its diagonal. */
2417 [(c == commutative || c == commutative + 1)
2418 ? 2*commutative + 1 - c : c]
2419 [(i == commutative || i == commutative + 1)
2420 ? 2*commutative + 1 - i : i])
2421 : operands_match[c][i])
2422 win = this_alternative_win[c];
2425 /* Operands don't match. */
2427 /* Retroactively mark the operand we had to match
2428 as a loser, if it wasn't already. */
2429 if (this_alternative_win[c])
2431 this_alternative_win[c] = 0;
2432 if (this_alternative[c] == (int) NO_REGS)
2434 /* But count the pair only once in the total badness of
2435 this alternative, if the pair can be a dummy reload. */
2437 = find_dummy_reload (recog_operand[i], recog_operand[c],
2438 recog_operand_loc[i], recog_operand_loc[c],
2439 this_alternative[c], -1);
2444 /* This can be fixed with reloads if the operand
2445 we are supposed to match can be fixed with reloads. */
2447 this_alternative[i] = this_alternative[c];
2451 /* All necessary reloads for an address_operand
2452 were handled in find_reloads_address. */
2453 this_alternative[i] = (int) ALL_REGS;
2460 if (GET_CODE (operand) == MEM
2461 || (GET_CODE (operand) == REG
2462 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2463 && reg_renumber[REGNO (operand)] < 0))
2465 if (CONSTANT_P (operand))
2470 if (GET_CODE (operand) == MEM
2471 && ! address_reloaded[i]
2472 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2473 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2478 if (GET_CODE (operand) == MEM
2479 && ! address_reloaded[i]
2480 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2481 || GET_CODE (XEXP (operand, 0)) == POST_INC))
2485 /* Memory operand whose address is not offsettable. */
2489 if (GET_CODE (operand) == MEM
2490 && ! (ind_levels ? offsettable_memref_p (operand)
2491 : offsettable_nonstrict_memref_p (operand))
2492 /* Certain mem addresses will become offsettable
2493 after they themselves are reloaded. This is important;
2494 we don't want our own handling of unoffsettables
2495 to override the handling of reg_equiv_address. */
2496 && !(GET_CODE (XEXP (operand, 0)) == REG
2498 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
2502 /* Memory operand whose address is offsettable. */
2506 if ((GET_CODE (operand) == MEM
2507 /* If IND_LEVELS, find_reloads_address won't reload a
2508 pseudo that didn't get a hard reg, so we have to
2509 reject that case. */
2510 && (ind_levels ? offsettable_memref_p (operand)
2511 : offsettable_nonstrict_memref_p (operand)))
2512 /* Certain mem addresses will become offsettable
2513 after they themselves are reloaded. This is important;
2514 we don't want our own handling of unoffsettables
2515 to override the handling of reg_equiv_address. */
2516 || (GET_CODE (operand) == MEM
2517 && GET_CODE (XEXP (operand, 0)) == REG
2519 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))
2520 || (GET_CODE (operand) == REG
2521 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2522 && reg_renumber[REGNO (operand)] < 0))
2524 if (CONSTANT_P (operand) || GET_CODE (operand) == MEM)
2530 /* Output operand that is stored before the need for the
2531 input operands (and their index registers) is over. */
2532 earlyclobber = 1, this_earlyclobber = 1;
2536 /* Match any floating double constant, but only if
2537 we can examine the bits of it reliably. */
2538 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
2539 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
2540 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
2542 if (GET_CODE (operand) == CONST_DOUBLE)
2547 if (GET_CODE (operand) == CONST_DOUBLE)
2553 if (GET_CODE (operand) == CONST_DOUBLE
2554 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
2559 if (GET_CODE (operand) == CONST_INT
2560 || (GET_CODE (operand) == CONST_DOUBLE
2561 && GET_MODE (operand) == VOIDmode))
2564 if (CONSTANT_P (operand)
2565 #ifdef LEGITIMATE_PIC_OPERAND_P
2566 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
2573 if (GET_CODE (operand) == CONST_INT
2574 || (GET_CODE (operand) == CONST_DOUBLE
2575 && GET_MODE (operand) == VOIDmode))
2587 if (GET_CODE (operand) == CONST_INT
2588 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
2598 /* A PLUS is never a valid operand, but reload can make
2599 it from a register when eliminating registers. */
2600 && GET_CODE (operand) != PLUS
2601 /* A SCRATCH is not a valid operand. */
2602 && GET_CODE (operand) != SCRATCH
2603 #ifdef LEGITIMATE_PIC_OPERAND_P
2604 && (! CONSTANT_P (operand)
2606 || LEGITIMATE_PIC_OPERAND_P (operand))
2608 && (GENERAL_REGS == ALL_REGS
2609 || GET_CODE (operand) != REG
2610 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
2611 && reg_renumber[REGNO (operand)] < 0)))
2613 /* Drop through into 'r' case */
2617 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
2620 #ifdef EXTRA_CONSTRAINT
2626 if (EXTRA_CONSTRAINT (operand, c))
2633 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
2636 if (GET_MODE (operand) == BLKmode)
2639 if (GET_CODE (operand) == REG
2640 && reg_fits_class_p (operand, this_alternative[i],
2641 offset, GET_MODE (recog_operand[i])))
2648 /* If this operand could be handled with a reg,
2649 and some reg is allowed, then this operand can be handled. */
2650 if (winreg && this_alternative[i] != (int) NO_REGS)
2653 /* Record which operands fit this alternative. */
2654 this_alternative_earlyclobber[i] = earlyclobber;
2655 if (win && ! force_reload)
2656 this_alternative_win[i] = 1;
2659 this_alternative_offmemok[i] = offmemok;
2663 /* Alternative loses if it has no regs for a reg operand. */
2664 if (GET_CODE (operand) == REG
2665 && this_alternative[i] == (int) NO_REGS
2666 && this_alternative_matches[i] < 0)
2669 /* Alternative loses if it requires a type of reload not
2670 permitted for this insn. We can always reload SCRATCH
2671 and objects with a REG_UNUSED note. */
2672 if (GET_CODE (operand) != SCRATCH && modified[i] != RELOAD_READ
2673 && no_output_reloads
2674 && ! find_reg_note (insn, REG_UNUSED, operand))
2676 else if (modified[i] != RELOAD_WRITE && no_input_reloads)
2679 /* We prefer to reload pseudos over reloading other things,
2680 since such reloads may be able to be eliminated later.
2681 If we are reloading a SCRATCH, we won't be generating any
2682 insns, just using a register, so it is also preferred.
2683 So bump REJECT in other cases. */
2684 if (GET_CODE (operand) != REG && GET_CODE (operand) != SCRATCH)
2688 /* If this operand is a pseudo register that didn't get a hard
2689 reg and this alternative accepts some register, see if the
2690 class that we want is a subset of the preferred class for this
2691 register. If not, but it intersects that class, use the
2692 preferred class instead. If it does not intersect the preferred
2693 class, show that usage of this alternative should be discouraged;
2694 it will be discouraged more still if the register is `preferred
2695 or nothing'. We do this because it increases the chance of
2696 reusing our spill register in a later insn and avoiding a pair
2697 of memory stores and loads.
2699 Don't bother with this if this alternative will accept this
2702 Don't do this for a multiword operand, if
2703 we have to worry about small classes, because making reg groups
2704 harder to allocate is asking for trouble.
2706 Don't do this if the preferred class has only one register
2707 because we might otherwise exhaust the class. */
2710 if (! win && this_alternative[i] != (int) NO_REGS
2711 #ifdef SMALL_REGISTER_CLASSES
2712 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2714 && reg_class_size[(int) preferred_class[i]] > 1)
2716 if (! reg_class_subset_p (this_alternative[i],
2717 preferred_class[i]))
2719 /* Since we don't have a way of forming the intersection,
2720 we just do something special if the preferred class
2721 is a subset of the class we have; that's the most
2722 common case anyway. */
2723 if (reg_class_subset_p (preferred_class[i],
2724 this_alternative[i]))
2725 this_alternative[i] = (int) preferred_class[i];
2727 reject += (1 + pref_or_nothing[i]);
2732 /* Now see if any output operands that are marked "earlyclobber"
2733 in this alternative conflict with any input operands
2734 or any memory addresses. */
2736 for (i = 0; i < noperands; i++)
2737 if (this_alternative_earlyclobber[i]
2738 && this_alternative_win[i])
2740 struct decomposition early_data;
2743 early_data = decompose (recog_operand[i]);
2745 if (modified[i] == RELOAD_READ)
2747 if (this_insn_is_asm)
2748 warning_for_asm (this_insn,
2749 "`&' constraint used with input operand");
2755 if (this_alternative[i] == NO_REGS)
2757 this_alternative_earlyclobber[i] = 0;
2758 if (this_insn_is_asm)
2759 error_for_asm (this_insn,
2760 "`&' constraint used with no register class");
2765 for (j = 0; j < noperands; j++)
2766 /* Is this an input operand or a memory ref? */
2767 if ((GET_CODE (recog_operand[j]) == MEM
2768 || modified[j] != RELOAD_WRITE)
2770 /* Ignore things like match_operator operands. */
2771 && *constraints1[j] != 0
2772 /* Don't count an input operand that is constrained to match
2773 the early clobber operand. */
2774 && ! (this_alternative_matches[j] == i
2775 && rtx_equal_p (recog_operand[i], recog_operand[j]))
2776 /* Is it altered by storing the earlyclobber operand? */
2777 && !immune_p (recog_operand[j], recog_operand[i], early_data))
2779 /* If the output is in a single-reg class,
2780 it's costly to reload it, so reload the input instead. */
2781 if (reg_class_size[this_alternative[i]] == 1
2782 && (GET_CODE (recog_operand[j]) == REG
2783 || GET_CODE (recog_operand[j]) == SUBREG))
2786 this_alternative_win[j] = 0;
2791 /* If an earlyclobber operand conflicts with something,
2792 it must be reloaded, so request this and count the cost. */
2796 this_alternative_win[i] = 0;
2797 for (j = 0; j < noperands; j++)
2798 if (this_alternative_matches[j] == i
2799 && this_alternative_win[j])
2801 this_alternative_win[j] = 0;
2807 /* If one alternative accepts all the operands, no reload required,
2808 choose that alternative; don't consider the remaining ones. */
2811 /* Unswap these so that they are never swapped at `finish'. */
2812 if (commutative >= 0)
2814 recog_operand[commutative] = substed_operand[commutative];
2815 recog_operand[commutative + 1]
2816 = substed_operand[commutative + 1];
2818 for (i = 0; i < noperands; i++)
2820 goal_alternative_win[i] = 1;
2821 goal_alternative[i] = this_alternative[i];
2822 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
2823 goal_alternative_matches[i] = this_alternative_matches[i];
2824 goal_alternative_earlyclobber[i]
2825 = this_alternative_earlyclobber[i];
2827 goal_alternative_number = this_alternative_number;
2828 goal_alternative_swapped = swapped;
2829 goal_earlyclobber = this_earlyclobber;
2833 /* REJECT, set by the ! and ? constraint characters and when a register
2834 would be reloaded into a non-preferred class, discourages the use of
2835 this alternative for a reload goal. REJECT is incremented by three
2836 for each ? and one for each non-preferred class. */
2837 losers = losers * 3 + reject;
2839 /* If this alternative can be made to work by reloading,
2840 and it needs less reloading than the others checked so far,
2841 record it as the chosen goal for reloading. */
2842 if (! bad && best > losers)
2844 for (i = 0; i < noperands; i++)
2846 goal_alternative[i] = this_alternative[i];
2847 goal_alternative_win[i] = this_alternative_win[i];
2848 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
2849 goal_alternative_matches[i] = this_alternative_matches[i];
2850 goal_alternative_earlyclobber[i]
2851 = this_alternative_earlyclobber[i];
2853 goal_alternative_swapped = swapped;
2855 goal_alternative_number = this_alternative_number;
2856 goal_earlyclobber = this_earlyclobber;
2860 /* If insn is commutative (it's safe to exchange a certain pair of operands)
2861 then we need to try each alternative twice,
2862 the second time matching those two operands
2863 as if we had exchanged them.
2864 To do this, really exchange them in operands.
2866 If we have just tried the alternatives the second time,
2867 return operands to normal and drop through. */
2869 if (commutative >= 0)
2874 register enum reg_class tclass;
2877 recog_operand[commutative] = substed_operand[commutative + 1];
2878 recog_operand[commutative + 1] = substed_operand[commutative];
2880 tclass = preferred_class[commutative];
2881 preferred_class[commutative] = preferred_class[commutative + 1];
2882 preferred_class[commutative + 1] = tclass;
2884 t = pref_or_nothing[commutative];
2885 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
2886 pref_or_nothing[commutative + 1] = t;
2888 bcopy (constraints1, constraints, noperands * sizeof (char *));
2893 recog_operand[commutative] = substed_operand[commutative];
2894 recog_operand[commutative + 1] = substed_operand[commutative + 1];
2898 /* The operands don't meet the constraints.
2899 goal_alternative describes the alternative
2900 that we could reach by reloading the fewest operands.
2901 Reload so as to fit it. */
2903 if (best == MAX_RECOG_OPERANDS + 300)
2905 /* No alternative works with reloads?? */
2906 if (insn_code_number >= 0)
2908 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
2909 /* Avoid further trouble with this insn. */
2910 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
2915 /* Jump to `finish' from above if all operands are valid already.
2916 In that case, goal_alternative_win is all 1. */
2919 /* Right now, for any pair of operands I and J that are required to match,
2921 goal_alternative_matches[J] is I.
2922 Set up goal_alternative_matched as the inverse function:
2923 goal_alternative_matched[I] = J. */
2925 for (i = 0; i < noperands; i++)
2926 goal_alternative_matched[i] = -1;
2928 for (i = 0; i < noperands; i++)
2929 if (! goal_alternative_win[i]
2930 && goal_alternative_matches[i] >= 0)
2931 goal_alternative_matched[goal_alternative_matches[i]] = i;
2933 /* If the best alternative is with operands 1 and 2 swapped,
2934 consider them swapped before reporting the reloads. */
2936 if (goal_alternative_swapped)
2940 tem = substed_operand[commutative];
2941 substed_operand[commutative] = substed_operand[commutative + 1];
2942 substed_operand[commutative + 1] = tem;
2943 tem = recog_operand[commutative];
2944 recog_operand[commutative] = recog_operand[commutative + 1];
2945 recog_operand[commutative + 1] = tem;
2948 /* Perform whatever substitutions on the operands we are supposed
2949 to make due to commutativity or replacement of registers
2950 with equivalent constants or memory slots. */
2952 for (i = 0; i < noperands; i++)
2954 *recog_operand_loc[i] = substed_operand[i];
2955 /* While we are looping on operands, initialize this. */
2956 operand_reloadnum[i] = -1;
2959 /* Any constants that aren't allowed and can't be reloaded
2960 into registers are here changed into memory references. */
2961 for (i = 0; i < noperands; i++)
2962 if (! goal_alternative_win[i]
2963 && CONSTANT_P (recog_operand[i])
2964 && (PREFERRED_RELOAD_CLASS (recog_operand[i],
2965 (enum reg_class) goal_alternative[i])
2967 && operand_mode[i] != VOIDmode)
2969 *recog_operand_loc[i] = recog_operand[i]
2970 = find_reloads_toplev (force_const_mem (operand_mode[i],
2973 if (alternative_allows_memconst (constraints1[i],
2974 goal_alternative_number))
2975 goal_alternative_win[i] = 1;
2978 /* Now record reloads for all the operands that need them. */
2979 for (i = 0; i < noperands; i++)
2980 if (! goal_alternative_win[i])
2982 /* Operands that match previous ones have already been handled. */
2983 if (goal_alternative_matches[i] >= 0)
2985 /* Handle an operand with a nonoffsettable address
2986 appearing where an offsettable address will do
2987 by reloading the address into a base register. */
2988 else if (goal_alternative_matched[i] == -1
2989 && goal_alternative_offmemok[i]
2990 && GET_CODE (recog_operand[i]) == MEM)
2992 operand_reloadnum[i]
2993 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
2994 &XEXP (recog_operand[i], 0), NULL_PTR,
2995 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
2996 VOIDmode, 0, 0, NULL_RTX);
2997 reload_inc[operand_reloadnum[i]]
2998 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
3000 else if (goal_alternative_matched[i] == -1)
3001 operand_reloadnum[i] =
3002 push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3003 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3004 modified[i] != RELOAD_WRITE ? recog_operand_loc[i] : 0,
3005 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
3006 (enum reg_class) goal_alternative[i],
3007 (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]),
3008 (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]),
3009 (insn_code_number < 0 ? 0
3010 : insn_operand_strict_low[insn_code_number][i]),
3012 /* In a matching pair of operands, one must be input only
3013 and the other must be output only.
3014 Pass the input operand as IN and the other as OUT. */
3015 else if (modified[i] == RELOAD_READ
3016 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3018 operand_reloadnum[i]
3019 = push_reload (recog_operand[i],
3020 recog_operand[goal_alternative_matched[i]],
3021 recog_operand_loc[i],
3022 recog_operand_loc[goal_alternative_matched[i]],
3023 (enum reg_class) goal_alternative[i],
3025 operand_mode[goal_alternative_matched[i]],
3027 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3029 else if (modified[i] == RELOAD_WRITE
3030 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3032 operand_reloadnum[goal_alternative_matched[i]]
3033 = push_reload (recog_operand[goal_alternative_matched[i]],
3035 recog_operand_loc[goal_alternative_matched[i]],
3036 recog_operand_loc[i],
3037 (enum reg_class) goal_alternative[i],
3038 operand_mode[goal_alternative_matched[i]],
3041 operand_reloadnum[i] = output_reloadnum;
3043 else if (insn_code_number >= 0)
3047 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3048 /* Avoid further trouble with this insn. */
3049 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3054 else if (goal_alternative_matched[i] < 0
3055 && goal_alternative_matches[i] < 0
3058 rtx operand = recog_operand[i];
3059 /* For each non-matching operand that's a pseudo-register
3060 that didn't get a hard register, make an optional reload.
3061 This may get done even if the insn needs no reloads otherwise. */
3062 /* (It would be safe to make an optional reload for a matching pair
3063 of operands, but we don't bother yet.) */
3064 while (GET_CODE (operand) == SUBREG)
3065 operand = XEXP (operand, 0);
3066 if (GET_CODE (operand) == REG
3067 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3068 && reg_renumber[REGNO (operand)] < 0
3069 && (enum reg_class) goal_alternative[i] != NO_REGS
3070 /* Don't make optional output reloads for jump insns
3071 (such as aobjeq on the vax). */
3072 && (modified[i] == RELOAD_READ
3073 || GET_CODE (insn) != JUMP_INSN))
3074 operand_reloadnum[i]
3075 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3076 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3077 modified[i] != RELOAD_WRITE ? recog_operand_loc[i] : 0,
3078 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
3079 (enum reg_class) goal_alternative[i],
3080 (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]),
3081 (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]),
3082 (insn_code_number < 0 ? 0
3083 : insn_operand_strict_low[insn_code_number][i]),
3085 /* Make an optional reload for an explicit mem ref. */
3086 else if (GET_CODE (operand) == MEM
3087 && (enum reg_class) goal_alternative[i] != NO_REGS
3088 /* Don't make optional output reloads for jump insns
3089 (such as aobjeq on the vax). */
3090 && (modified[i] == RELOAD_READ
3091 || GET_CODE (insn) != JUMP_INSN))
3092 operand_reloadnum[i]
3093 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3094 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3095 modified[i] != RELOAD_WRITE ? recog_operand_loc[i] : 0,
3096 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
3097 (enum reg_class) goal_alternative[i],
3098 (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]),
3099 (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]),
3100 (insn_code_number < 0 ? 0
3101 : insn_operand_strict_low[insn_code_number][i]),
3104 non_reloaded_operands[n_non_reloaded_operands++] = recog_operand[i];
3106 else if (goal_alternative_matched[i] < 0
3107 && goal_alternative_matches[i] < 0)
3108 non_reloaded_operands[n_non_reloaded_operands++] = recog_operand[i];
3110 /* Record the values of the earlyclobber operands for the caller. */
3111 if (goal_earlyclobber)
3112 for (i = 0; i < noperands; i++)
3113 if (goal_alternative_earlyclobber[i])
3114 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3116 /* If this insn pattern contains any MATCH_DUP's, make sure that
3117 they will be substituted if the operands they match are substituted.
3118 Also do now any substitutions we already did on the operands.
3120 Don't do this if we aren't making replacements because we might be
3121 propagating things allocated by frame pointer elimination into places
3122 it doesn't expect. */
3124 if (insn_code_number >= 0 && replace)
3125 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3127 int opno = recog_dup_num[i];
3128 *recog_dup_loc[i] = *recog_operand_loc[opno];
3129 if (operand_reloadnum[opno] >= 0)
3130 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3131 insn_operand_mode[insn_code_number][opno]);
3135 /* This loses because reloading of prior insns can invalidate the equivalence
3136 (or at least find_equiv_reg isn't smart enough to find it any more),
3137 causing this insn to need more reload regs than it needed before.
3138 It may be too late to make the reload regs available.
3139 Now this optimization is done safely in choose_reload_regs. */
3141 /* For each reload of a reg into some other class of reg,
3142 search for an existing equivalent reg (same value now) in the right class.
3143 We can use it as long as we don't need to change its contents. */
3144 for (i = 0; i < n_reloads; i++)
3145 if (reload_reg_rtx[i] == 0
3146 && reload_in[i] != 0
3147 && GET_CODE (reload_in[i]) == REG
3148 && reload_out[i] == 0)
3151 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3152 static_reload_reg_p, 0, reload_inmode[i]);
3153 /* Prevent generation of insn to load the value
3154 because the one we found already has the value. */
3155 if (reload_reg_rtx[i])
3156 reload_in[i] = reload_reg_rtx[i];
3160 #else /* no REGISTER_CONSTRAINTS */
3162 int insn_code_number;
3163 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
3165 rtx body = PATTERN (insn);
3169 n_earlyclobbers = 0;
3170 replace_reloads = replace;
3173 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3174 Store the operand values in RECOG_OPERAND and the locations
3175 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3176 Return if the insn needs no reload processing. */
3178 switch (GET_CODE (body))
3189 noperands = asm_noperands (body);
3192 /* This insn is an `asm' with operands.
3193 First, find out how many operands, and allocate space. */
3195 insn_code_number = -1;
3196 /* ??? This is a bug! ???
3197 Give up and delete this insn if it has too many operands. */
3198 if (noperands > MAX_RECOG_OPERANDS)
3201 /* Now get the operand values out of the insn. */
3203 decode_asm_operands (body, recog_operand, recog_operand_loc,
3204 NULL_PTR, NULL_PTR);
3209 /* Ordinary insn: recognize it, allocate space for operands and
3210 constraints, and get them out via insn_extract. */
3212 insn_code_number = recog_memoized (insn);
3213 noperands = insn_n_operands[insn_code_number];
3214 insn_extract (insn);
3220 for (i = 0; i < noperands; i++)
3222 register RTX_CODE code = GET_CODE (recog_operand[i]);
3223 int is_set_dest = GET_CODE (body) == SET && (i == 0);
3225 if (insn_code_number >= 0)
3226 if (insn_operand_address_p[insn_code_number][i])
3227 find_reloads_address (VOIDmode, NULL_PTR,
3228 recog_operand[i], recog_operand_loc[i],
3229 recog_operand[i], ind_levels);
3231 find_reloads_address (GET_MODE (recog_operand[i]),
3232 recog_operand_loc[i],
3233 XEXP (recog_operand[i], 0),
3234 &XEXP (recog_operand[i], 0),
3235 recog_operand[i], ind_levels);
3237 recog_operand[i] = *recog_operand_loc[i]
3238 = find_reloads_toplev (recog_operand[i], ind_levels, is_set_dest);
3241 register int regno = REGNO (recog_operand[i]);
3242 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3243 recog_operand[i] = *recog_operand_loc[i]
3244 = reg_equiv_constant[regno];
3245 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3246 that feeds this insn. */
3247 if (reg_equiv_mem[regno] != 0)
3248 recog_operand[i] = *recog_operand_loc[i]
3249 = reg_equiv_mem[regno];
3252 /* All operands are non-reloaded. */
3253 non_reloaded_operands[n_non_reloaded_operands++] = recog_operand[i];
3255 #endif /* no REGISTER_CONSTRAINTS */
3257 /* Determine which part of the insn each reload is needed for,
3258 based on which operand the reload is needed for.
3259 Reloads of entire operands are classified as RELOAD_OTHER.
3260 So are reloads for which a unique purpose is not known. */
3262 for (i = 0; i < n_reloads; i++)
3264 reload_when_needed[i] = RELOAD_OTHER;
3266 if (reload_needed_for[i] != 0 && ! reload_needed_for_multiple[i])
3269 int output_address = 0;
3270 int input_address = 0;
3271 int operand_address = 0;
3273 /* This reload is needed only for the address of something.
3274 Determine whether it is needed for addressing an operand
3275 being reloaded for input, whether it is needed for an
3276 operand being reloaded for output, and whether it is needed
3277 for addressing an operand that won't really be reloaded.
3279 Note that we know that this reload is needed in only one address,
3280 but we have not yet checked for the case where that same address
3281 is used in both input and output reloads.
3282 The following code detects this case. */
3284 for (j = 0; j < n_reloads; j++)
3285 if (reload_needed_for[i] == reload_in[j]
3286 || reload_needed_for[i] == reload_out[j])
3288 if (reload_optional[j])
3289 operand_address = 1;
3292 if (reload_needed_for[i] == reload_in[j])
3294 if (reload_needed_for[i] == reload_out[j])
3298 /* Don't ignore memrefs without optional reloads. */
3299 for (j = 0; j < n_non_reloaded_operands; j++)
3300 if (reload_needed_for[i] == non_reloaded_operands[j])
3301 operand_address = 1;
3303 /* If it is needed for only one of those, record which one. */
3305 if (input_address && ! output_address && ! operand_address)
3306 reload_when_needed[i] = RELOAD_FOR_INPUT_RELOAD_ADDRESS;
3307 if (output_address && ! input_address && ! operand_address)
3308 reload_when_needed[i] = RELOAD_FOR_OUTPUT_RELOAD_ADDRESS;
3309 if (operand_address && ! input_address && ! output_address)
3310 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3312 /* Indicate those RELOAD_OTHER reloads which, though they have
3313 0 for reload_output, still cannot overlap an output reload. */
3315 if (output_address && reload_when_needed[i] == RELOAD_OTHER)
3316 reload_needed_for_multiple[i] = 1;
3318 /* If we have earlyclobbers, make sure nothing overlaps them. */
3319 if (n_earlyclobbers > 0)
3321 reload_when_needed[i] = RELOAD_OTHER;
3322 reload_needed_for_multiple[i] = 1;
3327 /* Perhaps an output reload can be combined with another
3328 to reduce needs by one. */
3329 if (!goal_earlyclobber)
3333 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3334 accepts a memory operand with constant address. */
3337 alternative_allows_memconst (constraint, altnum)
3342 /* Skip alternatives before the one requested. */
3345 while (*constraint++ != ',');
3348 /* Scan the requested alternative for 'm' or 'o'.
3349 If one of them is present, this alternative accepts memory constants. */
3350 while ((c = *constraint++) && c != ',' && c != '#')
3351 if (c == 'm' || c == 'o')
3356 /* Scan X for memory references and scan the addresses for reloading.
3357 Also checks for references to "constant" regs that we want to eliminate
3358 and replaces them with the values they stand for.
3359 We may alter X destructively if it contains a reference to such.
3360 If X is just a constant reg, we return the equivalent value
3363 IND_LEVELS says how many levels of indirect addressing this machine
3366 IS_SET_DEST is true if X is the destination of a SET, which is not
3367 appropriate to be replaced by a constant. */
3370 find_reloads_toplev (x, ind_levels, is_set_dest)
3375 register RTX_CODE code = GET_CODE (x);
3377 register char *fmt = GET_RTX_FORMAT (code);
3382 /* This code is duplicated for speed in find_reloads. */
3383 register int regno = REGNO (x);
3384 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3385 x = reg_equiv_constant[regno];
3387 /* This creates (subreg (mem...)) which would cause an unnecessary
3388 reload of the mem. */
3389 else if (reg_equiv_mem[regno] != 0)
3390 x = reg_equiv_mem[regno];
3392 else if (reg_equiv_address[regno] != 0)
3394 /* If reg_equiv_address varies, it may be shared, so copy it. */
3395 rtx addr = reg_equiv_address[regno];
3397 if (rtx_varies_p (addr))
3398 addr = copy_rtx (addr);
3400 x = gen_rtx (MEM, GET_MODE (x), addr);
3401 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3402 find_reloads_address (GET_MODE (x), NULL_PTR,
3404 &XEXP (x, 0), x, ind_levels);
3411 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
3416 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
3418 /* Check for SUBREG containing a REG that's equivalent to a constant.
3419 If the constant has a known value, truncate it right now.
3420 Similarly if we are extracting a single-word of a multi-word
3421 constant. If the constant is symbolic, allow it to be substituted
3422 normally. push_reload will strip the subreg later. If the
3423 constant is VOIDmode, abort because we will lose the mode of
3424 the register (this should never happen because one of the cases
3425 above should handle it). */
3427 register int regno = REGNO (SUBREG_REG (x));
3430 if (subreg_lowpart_p (x)
3431 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3432 && reg_equiv_constant[regno] != 0
3433 && (tem = gen_lowpart_common (GET_MODE (x),
3434 reg_equiv_constant[regno])) != 0)
3437 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
3438 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3439 && reg_equiv_constant[regno] != 0
3440 && (tem = operand_subword (reg_equiv_constant[regno],
3442 GET_MODE (SUBREG_REG (x)))) != 0)
3445 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3446 && reg_equiv_constant[regno] != 0
3447 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
3450 /* If the subreg contains a reg that will be converted to a mem,
3451 convert the subreg to a narrower memref now.
3452 Otherwise, we would get (subreg (mem ...) ...),
3453 which would force reload of the mem.
3455 We also need to do this if there is an equivalent MEM that is
3456 not offsettable. In that case, alter_subreg would produce an
3457 invalid address on big-endian machines.
3459 For machines that extend byte loads, we must not reload using
3460 a wider mode if we have a paradoxical SUBREG. find_reloads will
3461 force a reload in that case. So we should not do anything here. */
3463 else if (regno >= FIRST_PSEUDO_REGISTER
3464 #if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
3465 && (GET_MODE_SIZE (GET_MODE (x))
3466 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3468 && (reg_equiv_address[regno] != 0
3469 || (reg_equiv_mem[regno] != 0
3470 && ! offsettable_memref_p (reg_equiv_mem[regno]))))
3472 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
3473 rtx addr = (reg_equiv_address[regno] ? reg_equiv_address[regno]
3474 : XEXP (reg_equiv_mem[regno], 0));
3475 #if BYTES_BIG_ENDIAN
3477 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
3478 offset += MIN (size, UNITS_PER_WORD);
3479 size = GET_MODE_SIZE (GET_MODE (x));
3480 offset -= MIN (size, UNITS_PER_WORD);
3482 addr = plus_constant (addr, offset);
3483 x = gen_rtx (MEM, GET_MODE (x), addr);
3484 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3485 find_reloads_address (GET_MODE (x), NULL_PTR,
3487 &XEXP (x, 0), x, ind_levels);
3492 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3495 XEXP (x, i) = find_reloads_toplev (XEXP (x, i),
3496 ind_levels, is_set_dest);
3502 make_memloc (ad, regno)
3507 rtx tem = reg_equiv_address[regno];
3508 for (i = 0; i < n_memlocs; i++)
3509 if (rtx_equal_p (tem, XEXP (memlocs[i], 0)))
3512 /* If TEM might contain a pseudo, we must copy it to avoid
3513 modifying it when we do the substitution for the reload. */
3514 if (rtx_varies_p (tem))
3515 tem = copy_rtx (tem);
3517 tem = gen_rtx (MEM, GET_MODE (ad), tem);
3518 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3519 memlocs[n_memlocs++] = tem;
3523 /* Record all reloads needed for handling memory address AD
3524 which appears in *LOC in a memory reference to mode MODE
3525 which itself is found in location *MEMREFLOC.
3526 Note that we take shortcuts assuming that no multi-reg machine mode
3527 occurs as part of an address.
3529 OPERAND is the operand of the insn within which this address appears.
3531 IND_LEVELS says how many levels of indirect addressing this machine
3534 Value is nonzero if this address is reloaded or replaced as a whole.
3535 This is interesting to the caller if the address is an autoincrement.
3537 Note that there is no verification that the address will be valid after
3538 this routine does its work. Instead, we rely on the fact that the address
3539 was valid when reload started. So we need only undo things that reload
3540 could have broken. These are wrong register types, pseudos not allocated
3541 to a hard register, and frame pointer elimination. */
3544 find_reloads_address (mode, memrefloc, ad, loc, operand, ind_levels)
3545 enum machine_mode mode;
3555 /* If the address is a register, see if it is a legitimate address and
3556 reload if not. We first handle the cases where we need not reload
3557 or where we must reload in a non-standard way. */
3559 if (GET_CODE (ad) == REG)
3563 if (reg_equiv_constant[regno] != 0
3564 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
3566 *loc = ad = reg_equiv_constant[regno];
3570 else if (reg_equiv_address[regno] != 0)
3572 tem = make_memloc (ad, regno);
3573 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
3574 &XEXP (tem, 0), operand, ind_levels);
3575 push_reload (tem, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
3576 GET_MODE (ad), VOIDmode, 0, 0,
3581 else if (reg_equiv_mem[regno] != 0)
3583 tem = XEXP (reg_equiv_mem[regno], 0);
3585 /* If we can't indirect any more, a pseudo must be reloaded.
3586 If the pseudo's address in its MEM is a SYMBOL_REF, it
3587 must be reloaded unless indirect_symref_ok. Otherwise, it
3588 can be reloaded if the address is REG or REG + CONST_INT. */
3591 && ! (GET_CODE (tem) == SYMBOL_REF && ! indirect_symref_ok)
3592 && ((GET_CODE (tem) == REG
3593 && REGNO (tem) < FIRST_PSEUDO_REGISTER)
3594 || (GET_CODE (tem) == PLUS
3595 && GET_CODE (XEXP (tem, 0)) == REG
3596 && REGNO (XEXP (tem, 0)) < FIRST_PSEUDO_REGISTER
3597 && GET_CODE (XEXP (tem, 1)) == CONST_INT)))
3601 /* The only remaining case where we can avoid a reload is if this is a
3602 hard register that is valid as a base register and which is not the
3603 subject of a CLOBBER in this insn. */
3605 else if (regno < FIRST_PSEUDO_REGISTER && REGNO_OK_FOR_BASE_P (regno)
3606 && ! regno_clobbered_p (regno, this_insn))
3609 /* If we do not have one of the cases above, we must do the reload. */
3610 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
3611 GET_MODE (ad), VOIDmode, 0, 0, operand);
3615 if (strict_memory_address_p (mode, ad))
3617 /* The address appears valid, so reloads are not needed.
3618 But the address may contain an eliminable register.
3619 This can happen because a machine with indirect addressing
3620 may consider a pseudo register by itself a valid address even when
3621 it has failed to get a hard reg.
3622 So do a tree-walk to find and eliminate all such regs. */
3624 /* But first quickly dispose of a common case. */
3625 if (GET_CODE (ad) == PLUS
3626 && GET_CODE (XEXP (ad, 1)) == CONST_INT
3627 && GET_CODE (XEXP (ad, 0)) == REG
3628 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
3631 subst_reg_equivs_changed = 0;
3632 *loc = subst_reg_equivs (ad);
3634 if (! subst_reg_equivs_changed)
3637 /* Check result for validity after substitution. */
3638 if (strict_memory_address_p (mode, ad))
3642 /* The address is not valid. We have to figure out why. One possibility
3643 is that it is itself a MEM. This can happen when the frame pointer is
3644 being eliminated, a pseudo is not allocated to a hard register, and the
3645 offset between the frame and stack pointers is not its initial value.
3646 In that case the pseudo will have been replaced by a MEM referring to
3647 the stack pointer. */
3648 if (GET_CODE (ad) == MEM)
3650 /* First ensure that the address in this MEM is valid. Then, unless
3651 indirect addresses are valid, reload the MEM into a register. */
3653 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
3654 operand, ind_levels == 0 ? 0 : ind_levels - 1);
3656 /* If tem was changed, then we must create a new memory reference to
3657 hold it and store it back into memrefloc. */
3658 if (tem != ad && memrefloc)
3660 rtx oldref = *memrefloc;
3661 *memrefloc = copy_rtx (*memrefloc);
3662 copy_replacements (tem, XEXP (*memrefloc, 0));
3663 loc = &XEXP (*memrefloc, 0);
3664 if (operand == oldref)
3665 operand = *memrefloc;
3668 /* Check similar cases as for indirect addresses as above except
3669 that we can allow pseudos and a MEM since they should have been
3670 taken care of above. */
3673 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
3674 || GET_CODE (XEXP (tem, 0)) == MEM
3675 || ! (GET_CODE (XEXP (tem, 0)) == REG
3676 || (GET_CODE (XEXP (tem, 0)) == PLUS
3677 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
3678 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
3680 /* Must use TEM here, not AD, since it is the one that will
3681 have any subexpressions reloaded, if needed. */
3682 push_reload (tem, NULL_RTX, loc, NULL_PTR,
3683 BASE_REG_CLASS, GET_MODE (tem), VOIDmode, 0,
3691 /* If we have address of a stack slot but it's not valid
3692 (displacement is too large), compute the sum in a register. */
3693 else if (GET_CODE (ad) == PLUS
3694 && (XEXP (ad, 0) == frame_pointer_rtx
3695 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3696 || XEXP (ad, 0) == arg_pointer_rtx
3698 || XEXP (ad, 0) == stack_pointer_rtx)
3699 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
3701 /* Unshare the MEM rtx so we can safely alter it. */
3704 rtx oldref = *memrefloc;
3705 *memrefloc = copy_rtx (*memrefloc);
3706 loc = &XEXP (*memrefloc, 0);
3707 if (operand == oldref)
3708 operand = *memrefloc;
3710 if (double_reg_address_ok)
3712 /* Unshare the sum as well. */
3713 *loc = ad = copy_rtx (ad);
3714 /* Reload the displacement into an index reg.
3715 We assume the frame pointer or arg pointer is a base reg. */
3716 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
3717 INDEX_REG_CLASS, GET_MODE (ad), operand,
3722 /* If the sum of two regs is not necessarily valid,
3723 reload the sum into a base reg.
3724 That will at least work. */
3725 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode,
3726 operand, ind_levels);
3731 /* If we have an indexed stack slot, there are three possible reasons why
3732 it might be invalid: The index might need to be reloaded, the address
3733 might have been made by frame pointer elimination and hence have a
3734 constant out of range, or both reasons might apply.
3736 We can easily check for an index needing reload, but even if that is the
3737 case, we might also have an invalid constant. To avoid making the
3738 conservative assumption and requiring two reloads, we see if this address
3739 is valid when not interpreted strictly. If it is, the only problem is
3740 that the index needs a reload and find_reloads_address_1 will take care
3743 There is still a case when we might generate an extra reload,
3744 however. In certain cases eliminate_regs will return a MEM for a REG
3745 (see the code there for details). In those cases, memory_address_p
3746 applied to our address will return 0 so we will think that our offset
3747 must be too large. But it might indeed be valid and the only problem
3748 is that a MEM is present where a REG should be. This case should be
3749 very rare and there doesn't seem to be any way to avoid it.
3751 If we decide to do something here, it must be that
3752 `double_reg_address_ok' is true and that this address rtl was made by
3753 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
3754 rework the sum so that the reload register will be added to the index.
3755 This is safe because we know the address isn't shared.
3757 We check for fp/ap/sp as both the first and second operand of the
3760 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
3761 && GET_CODE (XEXP (ad, 0)) == PLUS
3762 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
3763 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3764 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
3766 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
3767 && ! memory_address_p (mode, ad))
3769 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
3770 plus_constant (XEXP (XEXP (ad, 0), 0),
3771 INTVAL (XEXP (ad, 1))),
3772 XEXP (XEXP (ad, 0), 1));
3773 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
3774 GET_MODE (ad), operand, ind_levels);
3775 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), operand, 0);
3780 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
3781 && GET_CODE (XEXP (ad, 0)) == PLUS
3782 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
3783 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3784 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
3786 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
3787 && ! memory_address_p (mode, ad))
3789 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
3790 plus_constant (XEXP (XEXP (ad, 0), 1),
3791 INTVAL (XEXP (ad, 1))),
3792 XEXP (XEXP (ad, 0), 0));
3793 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
3794 GET_MODE (ad), operand, ind_levels);
3795 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), operand, 0);
3800 /* See if address becomes valid when an eliminable register
3801 in a sum is replaced. */
3804 if (GET_CODE (ad) == PLUS)
3805 tem = subst_indexed_address (ad);
3806 if (tem != ad && strict_memory_address_p (mode, tem))
3808 /* Ok, we win that way. Replace any additional eliminable
3811 subst_reg_equivs_changed = 0;
3812 tem = subst_reg_equivs (tem);
3814 /* Make sure that didn't make the address invalid again. */
3816 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
3823 /* If constants aren't valid addresses, reload the constant address
3825 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
3827 /* If AD is in address in the constant pool, the MEM rtx may be shared.
3828 Unshare it so we can safely alter it. */
3829 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
3830 && CONSTANT_POOL_ADDRESS_P (ad))
3832 rtx oldref = *memrefloc;
3833 *memrefloc = copy_rtx (*memrefloc);
3834 loc = &XEXP (*memrefloc, 0);
3835 if (operand == oldref)
3836 operand = *memrefloc;
3839 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, operand,
3844 return find_reloads_address_1 (ad, 0, loc, operand, ind_levels);
3847 /* Find all pseudo regs appearing in AD
3848 that are eliminable in favor of equivalent values
3849 and do not have hard regs; replace them by their equivalents. */
3852 subst_reg_equivs (ad)
3855 register RTX_CODE code = GET_CODE (ad);
3873 register int regno = REGNO (ad);
3875 if (reg_equiv_constant[regno] != 0)
3877 subst_reg_equivs_changed = 1;
3878 return reg_equiv_constant[regno];
3884 /* Quickly dispose of a common case. */
3885 if (XEXP (ad, 0) == frame_pointer_rtx
3886 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
3890 fmt = GET_RTX_FORMAT (code);
3891 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3893 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i));
3897 /* Compute the sum of X and Y, making canonicalizations assumed in an
3898 address, namely: sum constant integers, surround the sum of two
3899 constants with a CONST, put the constant as the second operand, and
3900 group the constant on the outermost sum.
3902 This routine assumes both inputs are already in canonical form. */
3910 if (GET_CODE (x) == CONST_INT)
3911 return plus_constant (y, INTVAL (x));
3912 else if (GET_CODE (y) == CONST_INT)
3913 return plus_constant (x, INTVAL (y));
3914 else if (CONSTANT_P (x))
3915 tem = x, x = y, y = tem;
3917 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
3918 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
3920 /* Note that if the operands of Y are specified in the opposite
3921 order in the recursive calls below, infinite recursion will occur. */
3922 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
3923 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
3925 /* If both constant, encapsulate sum. Otherwise, just form sum. A
3926 constant will have been placed second. */
3927 if (CONSTANT_P (x) && CONSTANT_P (y))
3929 if (GET_CODE (x) == CONST)
3931 if (GET_CODE (y) == CONST)
3934 return gen_rtx (CONST, VOIDmode, gen_rtx (PLUS, Pmode, x, y));
3937 return gen_rtx (PLUS, Pmode, x, y);
3940 /* If ADDR is a sum containing a pseudo register that should be
3941 replaced with a constant (from reg_equiv_constant),
3942 return the result of doing so, and also apply the associative
3943 law so that the result is more likely to be a valid address.
3944 (But it is not guaranteed to be one.)
3946 Note that at most one register is replaced, even if more are
3947 replaceable. Also, we try to put the result into a canonical form
3948 so it is more likely to be a valid address.
3950 In all other cases, return ADDR. */
3953 subst_indexed_address (addr)
3956 rtx op0 = 0, op1 = 0, op2 = 0;
3960 if (GET_CODE (addr) == PLUS)
3962 /* Try to find a register to replace. */
3963 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
3964 if (GET_CODE (op0) == REG
3965 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
3966 && reg_renumber[regno] < 0
3967 && reg_equiv_constant[regno] != 0)
3968 op0 = reg_equiv_constant[regno];
3969 else if (GET_CODE (op1) == REG
3970 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
3971 && reg_renumber[regno] < 0
3972 && reg_equiv_constant[regno] != 0)
3973 op1 = reg_equiv_constant[regno];
3974 else if (GET_CODE (op0) == PLUS
3975 && (tem = subst_indexed_address (op0)) != op0)
3977 else if (GET_CODE (op1) == PLUS
3978 && (tem = subst_indexed_address (op1)) != op1)
3983 /* Pick out up to three things to add. */
3984 if (GET_CODE (op1) == PLUS)
3985 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
3986 else if (GET_CODE (op0) == PLUS)
3987 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
3989 /* Compute the sum. */
3991 op1 = form_sum (op1, op2);
3993 op0 = form_sum (op0, op1);
4000 /* Record the pseudo registers we must reload into hard registers
4001 in a subexpression of a would-be memory address, X.
4002 (This function is not called if the address we find is strictly valid.)
4003 CONTEXT = 1 means we are considering regs as index regs,
4004 = 0 means we are considering them as base regs.
4006 OPERAND is the operand of the insn within which this address appears.
4008 IND_LEVELS says how many levels of indirect addressing are
4009 supported at this point in the address.
4011 We return nonzero if X, as a whole, is reloaded or replaced. */
4013 /* Note that we take shortcuts assuming that no multi-reg machine mode
4014 occurs as part of an address.
4015 Also, this is not fully machine-customizable; it works for machines
4016 such as vaxes and 68000's and 32000's, but other possible machines
4017 could have addressing modes that this does not handle right. */
4020 find_reloads_address_1 (x, context, loc, operand, ind_levels)
4027 register RTX_CODE code = GET_CODE (x);
4031 register rtx op0 = XEXP (x, 0);
4032 register rtx op1 = XEXP (x, 1);
4033 register RTX_CODE code0 = GET_CODE (op0);
4034 register RTX_CODE code1 = GET_CODE (op1);
4035 if (code0 == MULT || code0 == SIGN_EXTEND || code1 == MEM)
4037 find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand, ind_levels);
4038 find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
4040 else if (code1 == MULT || code1 == SIGN_EXTEND || code0 == MEM)
4042 find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
4043 find_reloads_address_1 (op1, 1, &XEXP (x, 1), operand, ind_levels);
4045 else if (code0 == CONST_INT || code0 == CONST
4046 || code0 == SYMBOL_REF || code0 == LABEL_REF)
4048 find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
4050 else if (code1 == CONST_INT || code1 == CONST
4051 || code1 == SYMBOL_REF || code1 == LABEL_REF)
4053 find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
4055 else if (code0 == REG && code1 == REG)
4057 if (REG_OK_FOR_INDEX_P (op0)
4058 && REG_OK_FOR_BASE_P (op1))
4060 else if (REG_OK_FOR_INDEX_P (op1)
4061 && REG_OK_FOR_BASE_P (op0))
4063 else if (REG_OK_FOR_BASE_P (op1))
4064 find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand, ind_levels);
4065 else if (REG_OK_FOR_BASE_P (op0))
4066 find_reloads_address_1 (op1, 1, &XEXP (x, 1), operand, ind_levels);
4067 else if (REG_OK_FOR_INDEX_P (op1))
4068 find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
4069 else if (REG_OK_FOR_INDEX_P (op0))
4070 find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
4073 find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand,
4075 find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand,
4079 else if (code0 == REG)
4081 find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand, ind_levels);
4082 find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
4084 else if (code1 == REG)
4086 find_reloads_address_1 (op1, 1, &XEXP (x, 1), operand, ind_levels);
4087 find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
4090 else if (code == POST_INC || code == POST_DEC
4091 || code == PRE_INC || code == PRE_DEC)
4093 if (GET_CODE (XEXP (x, 0)) == REG)
4095 register int regno = REGNO (XEXP (x, 0));
4099 /* A register that is incremented cannot be constant! */
4100 if (regno >= FIRST_PSEUDO_REGISTER
4101 && reg_equiv_constant[regno] != 0)
4104 /* Handle a register that is equivalent to a memory location
4105 which cannot be addressed directly. */
4106 if (reg_equiv_address[regno] != 0)
4108 rtx tem = make_memloc (XEXP (x, 0), regno);
4109 /* First reload the memory location's address. */
4110 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
4111 &XEXP (tem, 0), operand, ind_levels);
4112 /* Put this inside a new increment-expression. */
4113 x = gen_rtx (GET_CODE (x), GET_MODE (x), tem);
4114 /* Proceed to reload that, as if it contained a register. */
4117 /* If we have a hard register that is ok as an index,
4118 don't make a reload. If an autoincrement of a nice register
4119 isn't "valid", it must be that no autoincrement is "valid".
4120 If that is true and something made an autoincrement anyway,
4121 this must be a special context where one is allowed.
4122 (For example, a "push" instruction.)
4123 We can't improve this address, so leave it alone. */
4125 /* Otherwise, reload the autoincrement into a suitable hard reg
4126 and record how much to increment by. */
4128 if (reg_renumber[regno] >= 0)
4129 regno = reg_renumber[regno];
4130 if ((regno >= FIRST_PSEUDO_REGISTER
4131 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4132 : REGNO_OK_FOR_BASE_P (regno))))
4137 = push_reload (x, NULL_RTX, loc, NULL_PTR,
4138 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4139 GET_MODE (x), GET_MODE (x), VOIDmode, 0, operand);
4140 reload_inc[reloadnum]
4141 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
4146 /* Update the REG_INC notes. */
4148 for (link = REG_NOTES (this_insn);
4149 link; link = XEXP (link, 1))
4150 if (REG_NOTE_KIND (link) == REG_INC
4151 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
4152 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4157 else if (GET_CODE (XEXP (x, 0)) == MEM)
4159 /* This is probably the result of a substitution, by eliminate_regs,
4160 of an equivalent address for a pseudo that was not allocated to a
4161 hard register. Verify that the specified address is valid and
4162 reload it into a register. */
4163 rtx tem = XEXP (x, 0);
4167 /* Since we know we are going to reload this item, don't decrement
4168 for the indirection level.
4170 Note that this is actually conservative: it would be slightly
4171 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4173 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
4174 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
4175 operand, ind_levels);
4177 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
4178 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4179 GET_MODE (x), VOIDmode, 0, 0, operand);
4180 reload_inc[reloadnum]
4181 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
4183 link = FIND_REG_INC_NOTE (this_insn, tem);
4185 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4190 else if (code == MEM)
4192 /* This is probably the result of a substitution, by eliminate_regs,
4193 of an equivalent address for a pseudo that was not allocated to a
4194 hard register. Verify that the specified address is valid and reload
4197 Since we know we are going to reload this item, don't decrement
4198 for the indirection level.
4200 Note that this is actually conservative: it would be slightly more
4201 efficient to use the value of SPILL_INDIRECT_LEVELS from
4204 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
4205 operand, ind_levels);
4207 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
4208 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4209 GET_MODE (x), VOIDmode, 0, 0, operand);
4212 else if (code == REG)
4214 register int regno = REGNO (x);
4216 if (reg_equiv_constant[regno] != 0)
4218 find_reloads_address_part (reg_equiv_constant[regno], loc,
4219 (context ? INDEX_REG_CLASS
4221 GET_MODE (x), operand, ind_levels);
4225 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4226 that feeds this insn. */
4227 if (reg_equiv_mem[regno] != 0)
4229 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
4230 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4231 GET_MODE (x), VOIDmode, 0, 0, operand);
4235 if (reg_equiv_address[regno] != 0)
4237 x = make_memloc (x, regno);
4238 find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0),
4239 operand, ind_levels);
4242 if (reg_renumber[regno] >= 0)
4243 regno = reg_renumber[regno];
4244 if ((regno >= FIRST_PSEUDO_REGISTER
4245 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4246 : REGNO_OK_FOR_BASE_P (regno))))
4248 push_reload (x, NULL_RTX, loc, NULL_PTR,
4249 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4250 GET_MODE (x), VOIDmode, 0, 0, operand);
4254 /* If a register appearing in an address is the subject of a CLOBBER
4255 in this insn, reload it into some other register to be safe.
4256 The CLOBBER is supposed to make the register unavailable
4257 from before this insn to after it. */
4258 if (regno_clobbered_p (regno, this_insn))
4260 push_reload (x, NULL_RTX, loc, NULL_PTR,
4261 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4262 GET_MODE (x), VOIDmode, 0, 0, operand);
4268 register char *fmt = GET_RTX_FORMAT (code);
4270 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4273 find_reloads_address_1 (XEXP (x, i), context, &XEXP (x, i),
4274 operand, ind_levels);
4281 /* X, which is found at *LOC, is a part of an address that needs to be
4282 reloaded into a register of class CLASS. If X is a constant, or if
4283 X is a PLUS that contains a constant, check that the constant is a
4284 legitimate operand and that we are supposed to be able to load
4285 it into the register.
4287 If not, force the constant into memory and reload the MEM instead.
4289 MODE is the mode to use, in case X is an integer constant.
4291 NEEDED_FOR says which operand this reload is needed for.
4293 IND_LEVELS says how many levels of indirect addressing this machine
4297 find_reloads_address_part (x, loc, class, mode, needed_for, ind_levels)
4300 enum reg_class class;
4301 enum machine_mode mode;
4306 && (! LEGITIMATE_CONSTANT_P (x)
4307 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
4309 rtx tem = x = force_const_mem (mode, x);
4310 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4311 needed_for, ind_levels);
4314 else if (GET_CODE (x) == PLUS
4315 && CONSTANT_P (XEXP (x, 1))
4316 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
4317 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
4319 rtx tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
4321 x = gen_rtx (PLUS, GET_MODE (x), XEXP (x, 0), tem);
4322 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4323 needed_for, ind_levels);
4326 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
4327 mode, VOIDmode, 0, 0, needed_for);
4330 /* Substitute into X the registers into which we have reloaded
4331 the things that need reloading. The array `replacements'
4332 says contains the locations of all pointers that must be changed
4333 and says what to replace them with.
4335 Return the rtx that X translates into; usually X, but modified. */
4342 for (i = 0; i < n_replacements; i++)
4344 register struct replacement *r = &replacements[i];
4345 register rtx reloadreg = reload_reg_rtx[r->what];
4348 /* Encapsulate RELOADREG so its machine mode matches what
4349 used to be there. */
4350 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
4351 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
4353 /* If we are putting this into a SUBREG and RELOADREG is a
4354 SUBREG, we would be making nested SUBREGs, so we have to fix
4355 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
4357 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
4359 if (GET_MODE (*r->subreg_loc)
4360 == GET_MODE (SUBREG_REG (reloadreg)))
4361 *r->subreg_loc = SUBREG_REG (reloadreg);
4364 *r->where = SUBREG_REG (reloadreg);
4365 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
4369 *r->where = reloadreg;
4371 /* If reload got no reg and isn't optional, something's wrong. */
4372 else if (! reload_optional[r->what])
4377 /* Make a copy of any replacements being done into X and move those copies
4378 to locations in Y, a copy of X. We only look at the highest level of
4382 copy_replacements (x, y)
4387 enum rtx_code code = GET_CODE (x);
4388 char *fmt = GET_RTX_FORMAT (code);
4389 struct replacement *r;
4391 /* We can't support X being a SUBREG because we might then need to know its
4392 location if something inside it was replaced. */
4396 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4398 for (j = 0; j < n_replacements; j++)
4400 if (replacements[j].subreg_loc == &XEXP (x, i))
4402 r = &replacements[n_replacements++];
4403 r->where = replacements[j].where;
4404 r->subreg_loc = &XEXP (y, i);
4405 r->what = replacements[j].what;
4406 r->mode = replacements[j].mode;
4408 else if (replacements[j].where == &XEXP (x, i))
4410 r = &replacements[n_replacements++];
4411 r->where = &XEXP (y, i);
4413 r->what = replacements[j].what;
4414 r->mode = replacements[j].mode;
4419 /* If LOC was scheduled to be replaced by something, return the replacement.
4420 Otherwise, return *LOC. */
4423 find_replacement (loc)
4426 struct replacement *r;
4428 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
4430 rtx reloadreg = reload_reg_rtx[r->what];
4432 if (reloadreg && r->where == loc)
4434 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
4435 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
4439 else if (reloadreg && r->subreg_loc == loc)
4441 /* RELOADREG must be either a REG or a SUBREG.
4443 ??? Is it actually still ever a SUBREG? If so, why? */
4445 if (GET_CODE (reloadreg) == REG)
4446 return gen_rtx (REG, GET_MODE (*loc),
4447 REGNO (reloadreg) + SUBREG_WORD (*loc));
4448 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
4451 return gen_rtx (SUBREG, GET_MODE (*loc), SUBREG_REG (reloadreg),
4452 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
4459 /* Return nonzero if register in range [REGNO, ENDREGNO)
4460 appears either explicitly or implicitly in X
4461 other than being stored into.
4463 References contained within the substructure at LOC do not count.
4464 LOC may be zero, meaning don't ignore anything.
4466 This is similar to refers_to_regno_p in rtlanal.c except that we
4467 look at equivalences for pseudos that didn't get hard registers. */
4470 refers_to_regno_for_reload_p (regno, endregno, x, loc)
4471 int regno, endregno;
4476 register RTX_CODE code;
4483 code = GET_CODE (x);
4490 /* If this is a pseudo, a hard register must not have been allocated.
4491 X must therefore either be a constant or be in memory. */
4492 if (i >= FIRST_PSEUDO_REGISTER)
4494 if (reg_equiv_memory_loc[i])
4495 return refers_to_regno_for_reload_p (regno, endregno,
4496 reg_equiv_memory_loc[i],
4499 if (reg_equiv_constant[i])
4505 return (endregno > i
4506 && regno < i + (i < FIRST_PSEUDO_REGISTER
4507 ? HARD_REGNO_NREGS (i, GET_MODE (x))
4511 /* If this is a SUBREG of a hard reg, we can see exactly which
4512 registers are being modified. Otherwise, handle normally. */
4513 if (GET_CODE (SUBREG_REG (x)) == REG
4514 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
4516 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
4518 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
4519 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
4521 return endregno > inner_regno && regno < inner_endregno;
4527 if (&SET_DEST (x) != loc
4528 /* Note setting a SUBREG counts as referring to the REG it is in for
4529 a pseudo but not for hard registers since we can
4530 treat each word individually. */
4531 && ((GET_CODE (SET_DEST (x)) == SUBREG
4532 && loc != &SUBREG_REG (SET_DEST (x))
4533 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
4534 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
4535 && refers_to_regno_for_reload_p (regno, endregno,
4536 SUBREG_REG (SET_DEST (x)),
4538 || (GET_CODE (SET_DEST (x)) != REG
4539 && refers_to_regno_for_reload_p (regno, endregno,
4540 SET_DEST (x), loc))))
4543 if (code == CLOBBER || loc == &SET_SRC (x))
4549 /* X does not match, so try its subexpressions. */
4551 fmt = GET_RTX_FORMAT (code);
4552 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4554 if (fmt[i] == 'e' && loc != &XEXP (x, i))
4562 if (refers_to_regno_for_reload_p (regno, endregno,
4566 else if (fmt[i] == 'E')
4569 for (j = XVECLEN (x, i) - 1; j >=0; j--)
4570 if (loc != &XVECEXP (x, i, j)
4571 && refers_to_regno_for_reload_p (regno, endregno,
4572 XVECEXP (x, i, j), loc))
4579 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
4580 we check if any register number in X conflicts with the relevant register
4581 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
4582 contains a MEM (we don't bother checking for memory addresses that can't
4583 conflict because we expect this to be a rare case.
4585 This function is similar to reg_overlap_mention_p in rtlanal.c except
4586 that we look at equivalences for pseudos that didn't get hard registers. */
4589 reg_overlap_mentioned_for_reload_p (x, in)
4592 int regno, endregno;
4594 if (GET_CODE (x) == SUBREG)
4596 regno = REGNO (SUBREG_REG (x));
4597 if (regno < FIRST_PSEUDO_REGISTER)
4598 regno += SUBREG_WORD (x);
4600 else if (GET_CODE (x) == REG)
4604 /* If this is a pseudo, it must not have been assigned a hard register.
4605 Therefore, it must either be in memory or be a constant. */
4607 if (regno >= FIRST_PSEUDO_REGISTER)
4609 if (reg_equiv_memory_loc[regno])
4610 return refers_to_mem_for_reload_p (in);
4611 else if (reg_equiv_constant[regno])
4616 else if (CONSTANT_P (x))
4618 else if (GET_CODE (x) == MEM)
4619 return refers_to_mem_for_reload_p (in);
4620 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
4621 || GET_CODE (x) == CC0)
4622 return reg_mentioned_p (x, in);
4626 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
4627 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
4629 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
4632 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
4636 refers_to_mem_for_reload_p (x)
4642 if (GET_CODE (x) == MEM)
4645 if (GET_CODE (x) == REG)
4646 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
4647 && reg_equiv_memory_loc[REGNO (x)]);
4649 fmt = GET_RTX_FORMAT (GET_CODE (x));
4650 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4652 && (GET_CODE (XEXP (x, i)) == MEM
4653 || refers_to_mem_for_reload_p (XEXP (x, i))))
4661 /* [[This function is currently obsolete, now that volatility
4662 is represented by a special bit `volatil' so VOLATILE is never used;
4663 and UNCHANGING has never been brought into use.]]
4665 Alter X by eliminating all VOLATILE and UNCHANGING expressions.
4666 Each of them is replaced by its operand.
4667 Thus, (PLUS (VOLATILE (MEM (REG 5))) (CONST_INT 4))
4668 becomes (PLUS (MEM (REG 5)) (CONST_INT 4)).
4670 If X is itself a VOLATILE expression,
4671 we return the expression that should replace it
4672 but we do not modify X. */
4675 forget_volatility (x)
4678 enum rtx_code code = GET_CODE (x);
4681 register rtx value = 0;
4700 fmt = GET_RTX_FORMAT (code);
4701 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4704 XEXP (x, i) = forget_volatility (XEXP (x, i));
4708 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
4709 XVECEXP (x, i, j) = forget_volatility (XVECEXP (x, i, j));
4718 /* Check the insns before INSN to see if there is a suitable register
4719 containing the same value as GOAL.
4720 If OTHER is -1, look for a register in class CLASS.
4721 Otherwise, just see if register number OTHER shares GOAL's value.
4723 Return an rtx for the register found, or zero if none is found.
4725 If RELOAD_REG_P is (short *)1,
4726 we reject any hard reg that appears in reload_reg_rtx
4727 because such a hard reg is also needed coming into this insn.
4729 If RELOAD_REG_P is any other nonzero value,
4730 it is a vector indexed by hard reg number
4731 and we reject any hard reg whose element in the vector is nonnegative
4732 as well as any that appears in reload_reg_rtx.
4734 If GOAL is zero, then GOALREG is a register number; we look
4735 for an equivalent for that register.
4737 MODE is the machine mode of the value we want an equivalence for.
4738 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
4740 This function is used by jump.c as well as in the reload pass.
4742 If GOAL is the sum of the stack pointer and a constant, we treat it
4743 as if it were a constant except that sp is required to be unchanging. */
4746 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
4749 enum reg_class class;
4751 short *reload_reg_p;
4753 enum machine_mode mode;
4755 register rtx p = insn;
4756 rtx valtry, value, where;
4758 register int regno = -1;
4762 int goal_mem_addr_varies = 0;
4763 int need_stable_sp = 0;
4769 else if (GET_CODE (goal) == REG)
4770 regno = REGNO (goal);
4771 else if (GET_CODE (goal) == MEM)
4773 enum rtx_code code = GET_CODE (XEXP (goal, 0));
4774 if (MEM_VOLATILE_P (goal))
4776 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
4778 /* An address with side effects must be reexecuted. */
4789 else if (CONSTANT_P (goal))
4791 else if (GET_CODE (goal) == PLUS
4792 && XEXP (goal, 0) == stack_pointer_rtx
4793 && CONSTANT_P (XEXP (goal, 1)))
4794 goal_const = need_stable_sp = 1;
4798 /* On some machines, certain regs must always be rejected
4799 because they don't behave the way ordinary registers do. */
4801 #ifdef OVERLAPPING_REGNO_P
4802 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
4803 && OVERLAPPING_REGNO_P (regno))
4807 /* Scan insns back from INSN, looking for one that copies
4808 a value into or out of GOAL.
4809 Stop and give up if we reach a label. */
4814 if (p == 0 || GET_CODE (p) == CODE_LABEL)
4816 if (GET_CODE (p) == INSN
4817 /* If we don't want spill regs ... */
4818 && (! (reload_reg_p != 0 && reload_reg_p != (short *)1)
4819 /* ... then ignore insns introduced by reload; they aren't useful
4820 and can cause results in reload_as_needed to be different
4821 from what they were when calculating the need for spills.
4822 If we notice an input-reload insn here, we will reject it below,
4823 but it might hide a usable equivalent. That makes bad code.
4824 It may even abort: perhaps no reg was spilled for this insn
4825 because it was assumed we would find that equivalent. */
4826 || INSN_UID (p) < reload_first_uid))
4829 pat = single_set (p);
4830 /* First check for something that sets some reg equal to GOAL. */
4833 && true_regnum (SET_SRC (pat)) == regno
4834 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
4837 && true_regnum (SET_DEST (pat)) == regno
4838 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
4840 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
4841 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
4843 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
4844 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
4846 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
4847 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
4848 /* If we are looking for a constant,
4849 and something equivalent to that constant was copied
4850 into a reg, we can use that reg. */
4851 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
4853 && rtx_equal_p (XEXP (tem, 0), goal)
4854 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
4855 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
4857 && GET_CODE (SET_DEST (pat)) == REG
4858 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
4859 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
4860 && GET_CODE (goal) == CONST_INT
4861 && INTVAL (goal) == CONST_DOUBLE_LOW (XEXP (tem, 0))
4862 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
4864 && (valueno = true_regnum (valtry)) >= 0)
4865 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
4867 && GET_CODE (SET_DEST (pat)) == REG
4868 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
4869 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
4870 && GET_CODE (goal) == CONST_INT
4871 && INTVAL (goal) == CONST_DOUBLE_HIGH (XEXP (tem, 0))
4873 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
4874 && (valueno = true_regnum (valtry)) >= 0)))
4877 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
4878 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
4888 /* We found a previous insn copying GOAL into a suitable other reg VALUE
4889 (or copying VALUE into GOAL, if GOAL is also a register).
4890 Now verify that VALUE is really valid. */
4892 /* VALUENO is the register number of VALUE; a hard register. */
4894 /* Don't try to re-use something that is killed in this insn. We want
4895 to be able to trust REG_UNUSED notes. */
4896 if (find_reg_note (where, REG_UNUSED, value))
4899 /* If we propose to get the value from the stack pointer or if GOAL is
4900 a MEM based on the stack pointer, we need a stable SP. */
4901 if (valueno == STACK_POINTER_REGNUM
4902 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
4906 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
4907 if (GET_MODE (value) != mode)
4910 /* Reject VALUE if it was loaded from GOAL
4911 and is also a register that appears in the address of GOAL. */
4913 if (goal_mem && value == SET_DEST (PATTERN (where))
4914 && refers_to_regno_for_reload_p (valueno,
4916 + HARD_REGNO_NREGS (valueno, mode)),
4920 /* Reject registers that overlap GOAL. */
4922 if (!goal_mem && !goal_const
4923 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
4924 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
4927 /* Reject VALUE if it is one of the regs reserved for reloads.
4928 Reload1 knows how to reuse them anyway, and it would get
4929 confused if we allocated one without its knowledge.
4930 (Now that insns introduced by reload are ignored above,
4931 this case shouldn't happen, but I'm not positive.) */
4933 if (reload_reg_p != 0 && reload_reg_p != (short *)1
4934 && reload_reg_p[valueno] >= 0)
4937 /* On some machines, certain regs must always be rejected
4938 because they don't behave the way ordinary registers do. */
4940 #ifdef OVERLAPPING_REGNO_P
4941 if (OVERLAPPING_REGNO_P (valueno))
4945 nregs = HARD_REGNO_NREGS (regno, mode);
4946 valuenregs = HARD_REGNO_NREGS (valueno, mode);
4948 /* Reject VALUE if it is a register being used for an input reload
4949 even if it is not one of those reserved. */
4951 if (reload_reg_p != 0)
4954 for (i = 0; i < n_reloads; i++)
4955 if (reload_reg_rtx[i] != 0 && reload_in[i])
4957 int regno1 = REGNO (reload_reg_rtx[i]);
4958 int nregs1 = HARD_REGNO_NREGS (regno1,
4959 GET_MODE (reload_reg_rtx[i]));
4960 if (regno1 < valueno + valuenregs
4961 && regno1 + nregs1 > valueno)
4967 goal_mem_addr_varies = rtx_addr_varies_p (goal);
4969 /* Now verify that the values of GOAL and VALUE remain unaltered
4970 until INSN is reached. */
4979 /* Don't trust the conversion past a function call
4980 if either of the two is in a call-clobbered register, or memory. */
4981 if (GET_CODE (p) == CALL_INSN
4982 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
4983 && call_used_regs[regno])
4985 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
4986 && call_used_regs[valueno])
4992 #ifdef INSN_CLOBBERS_REGNO_P
4993 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
4994 && INSN_CLOBBERS_REGNO_P (p, valueno))
4995 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
4996 && INSN_CLOBBERS_REGNO_P (p, regno)))
5000 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
5002 /* If this insn P stores in either GOAL or VALUE, return 0.
5003 If GOAL is a memory ref and this insn writes memory, return 0.
5004 If GOAL is a memory ref and its address is not constant,
5005 and this insn P changes a register used in GOAL, return 0. */
5008 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
5010 register rtx dest = SET_DEST (pat);
5011 while (GET_CODE (dest) == SUBREG
5012 || GET_CODE (dest) == ZERO_EXTRACT
5013 || GET_CODE (dest) == SIGN_EXTRACT
5014 || GET_CODE (dest) == STRICT_LOW_PART)
5015 dest = XEXP (dest, 0);
5016 if (GET_CODE (dest) == REG)
5018 register int xregno = REGNO (dest);
5020 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5021 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5024 if (xregno < regno + nregs && xregno + xnregs > regno)
5026 if (xregno < valueno + valuenregs
5027 && xregno + xnregs > valueno)
5029 if (goal_mem_addr_varies
5030 && reg_overlap_mentioned_for_reload_p (dest, goal))
5033 else if (goal_mem && GET_CODE (dest) == MEM
5034 && ! push_operand (dest, GET_MODE (dest)))
5036 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
5039 else if (GET_CODE (pat) == PARALLEL)
5042 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
5044 register rtx v1 = XVECEXP (pat, 0, i);
5045 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
5047 register rtx dest = SET_DEST (v1);
5048 while (GET_CODE (dest) == SUBREG
5049 || GET_CODE (dest) == ZERO_EXTRACT
5050 || GET_CODE (dest) == SIGN_EXTRACT
5051 || GET_CODE (dest) == STRICT_LOW_PART)
5052 dest = XEXP (dest, 0);
5053 if (GET_CODE (dest) == REG)
5055 register int xregno = REGNO (dest);
5057 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5058 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5061 if (xregno < regno + nregs
5062 && xregno + xnregs > regno)
5064 if (xregno < valueno + valuenregs
5065 && xregno + xnregs > valueno)
5067 if (goal_mem_addr_varies
5068 && reg_overlap_mentioned_for_reload_p (dest,
5072 else if (goal_mem && GET_CODE (dest) == MEM
5073 && ! push_operand (dest, GET_MODE (dest)))
5075 else if (need_stable_sp
5076 && push_operand (dest, GET_MODE (dest)))
5083 /* If this insn auto-increments or auto-decrements
5084 either regno or valueno, return 0 now.
5085 If GOAL is a memory ref and its address is not constant,
5086 and this insn P increments a register used in GOAL, return 0. */
5090 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
5091 if (REG_NOTE_KIND (link) == REG_INC
5092 && GET_CODE (XEXP (link, 0)) == REG)
5094 register int incno = REGNO (XEXP (link, 0));
5095 if (incno < regno + nregs && incno >= regno)
5097 if (incno < valueno + valuenregs && incno >= valueno)
5099 if (goal_mem_addr_varies
5100 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
5110 /* Find a place where INCED appears in an increment or decrement operator
5111 within X, and return the amount INCED is incremented or decremented by.
5112 The value is always positive. */
5115 find_inc_amount (x, inced)
5118 register enum rtx_code code = GET_CODE (x);
5124 register rtx addr = XEXP (x, 0);
5125 if ((GET_CODE (addr) == PRE_DEC
5126 || GET_CODE (addr) == POST_DEC
5127 || GET_CODE (addr) == PRE_INC
5128 || GET_CODE (addr) == POST_INC)
5129 && XEXP (addr, 0) == inced)
5130 return GET_MODE_SIZE (GET_MODE (x));
5133 fmt = GET_RTX_FORMAT (code);
5134 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5138 register int tem = find_inc_amount (XEXP (x, i), inced);
5145 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5147 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
5157 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5160 regno_clobbered_p (regno, insn)
5164 if (GET_CODE (PATTERN (insn)) == CLOBBER
5165 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
5166 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
5168 if (GET_CODE (PATTERN (insn)) == PARALLEL)
5170 int i = XVECLEN (PATTERN (insn), 0) - 1;
5174 rtx elt = XVECEXP (PATTERN (insn), 0, i);
5175 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
5176 && REGNO (XEXP (elt, 0)) == regno)
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