1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
30 init_reload actually has to be called earlier anyway.
32 To scan an insn, call `find_reloads'. This does two things:
33 1. sets up tables describing which values must be reloaded
34 for this insn, and what kind of hard regs they must be reloaded into;
35 2. optionally record the locations where those values appear in
36 the data, so they can be replaced properly later.
37 This is done only if the second arg to `find_reloads' is nonzero.
39 The third arg to `find_reloads' specifies the number of levels
40 of indirect addressing supported by the machine. If it is zero,
41 indirect addressing is not valid. If it is one, (MEM (REG n))
42 is valid even if (REG n) did not get a hard register; if it is two,
43 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
44 hard register, and similarly for higher values.
46 Then you must choose the hard regs to reload those pseudo regs into,
47 and generate appropriate load insns before this insn and perhaps
48 also store insns after this insn. Set up the array `reload_reg_rtx'
49 to contain the REG rtx's for the registers you used. In some
50 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
51 for certain reloads. Then that tells you which register to use,
52 so you do not need to allocate one. But you still do need to add extra
53 instructions to copy the value into and out of that register.
55 Finally you must call `subst_reloads' to substitute the reload reg rtx's
56 into the locations already recorded.
60 find_reloads can alter the operands of the instruction it is called on.
62 1. Two operands of any sort may be interchanged, if they are in a
63 commutative instruction.
64 This happens only if find_reloads thinks the instruction will compile
67 2. Pseudo-registers that are equivalent to constants are replaced
68 with those constants if they are not in hard registers.
70 1 happens every time find_reloads is called.
71 2 happens only when REPLACE is 1, which is only when
72 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
90 /* We do not enable this with ENABLE_CHECKING, since it is awfully slow. */
95 #include "coretypes.h"
97 #include "rtl-error.h"
99 #include "insn-config.h"
106 #include "addresses.h"
107 #include "hard-reg-set.h"
110 #include "function.h"
115 /* True if X is a constant that can be forced into the constant pool.
116 MODE is the mode of the operand, or VOIDmode if not known. */
117 #define CONST_POOL_OK_P(MODE, X) \
118 ((MODE) != VOIDmode \
120 && GET_CODE (X) != HIGH \
121 && !targetm.cannot_force_const_mem (MODE, X))
123 /* True if C is a non-empty register class that has too few registers
124 to be safely used as a reload target class. */
127 small_register_class_p (reg_class_t rclass)
129 return (reg_class_size [(int) rclass] == 1
130 || (reg_class_size [(int) rclass] >= 1
131 && targetm.class_likely_spilled_p (rclass)));
135 /* All reloads of the current insn are recorded here. See reload.h for
138 struct reload rld[MAX_RELOADS];
140 /* All the "earlyclobber" operands of the current insn
141 are recorded here. */
143 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
145 int reload_n_operands;
147 /* Replacing reloads.
149 If `replace_reloads' is nonzero, then as each reload is recorded
150 an entry is made for it in the table `replacements'.
151 Then later `subst_reloads' can look through that table and
152 perform all the replacements needed. */
154 /* Nonzero means record the places to replace. */
155 static int replace_reloads;
157 /* Each replacement is recorded with a structure like this. */
160 rtx *where; /* Location to store in */
161 int what; /* which reload this is for */
162 enum machine_mode mode; /* mode it must have */
165 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
167 /* Number of replacements currently recorded. */
168 static int n_replacements;
170 /* Used to track what is modified by an operand. */
173 int reg_flag; /* Nonzero if referencing a register. */
174 int safe; /* Nonzero if this can't conflict with anything. */
175 rtx base; /* Base address for MEM. */
176 HOST_WIDE_INT start; /* Starting offset or register number. */
177 HOST_WIDE_INT end; /* Ending offset or register number. */
180 #ifdef SECONDARY_MEMORY_NEEDED
182 /* Save MEMs needed to copy from one class of registers to another. One MEM
183 is used per mode, but normally only one or two modes are ever used.
185 We keep two versions, before and after register elimination. The one
186 after register elimination is record separately for each operand. This
187 is done in case the address is not valid to be sure that we separately
190 static rtx secondary_memlocs[NUM_MACHINE_MODES];
191 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
192 static int secondary_memlocs_elim_used = 0;
195 /* The instruction we are doing reloads for;
196 so we can test whether a register dies in it. */
197 static rtx this_insn;
199 /* Nonzero if this instruction is a user-specified asm with operands. */
200 static int this_insn_is_asm;
202 /* If hard_regs_live_known is nonzero,
203 we can tell which hard regs are currently live,
204 at least enough to succeed in choosing dummy reloads. */
205 static int hard_regs_live_known;
207 /* Indexed by hard reg number,
208 element is nonnegative if hard reg has been spilled.
209 This vector is passed to `find_reloads' as an argument
210 and is not changed here. */
211 static short *static_reload_reg_p;
213 /* Set to 1 in subst_reg_equivs if it changes anything. */
214 static int subst_reg_equivs_changed;
216 /* On return from push_reload, holds the reload-number for the OUT
217 operand, which can be different for that from the input operand. */
218 static int output_reloadnum;
220 /* Compare two RTX's. */
221 #define MATCHES(x, y) \
222 (x == y || (x != 0 && (REG_P (x) \
223 ? REG_P (y) && REGNO (x) == REGNO (y) \
224 : rtx_equal_p (x, y) && ! side_effects_p (x))))
226 /* Indicates if two reloads purposes are for similar enough things that we
227 can merge their reloads. */
228 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
229 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
230 || ((when1) == (when2) && (op1) == (op2)) \
231 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
232 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
233 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
234 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
235 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
237 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
238 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
239 ((when1) != (when2) \
240 || ! ((op1) == (op2) \
241 || (when1) == RELOAD_FOR_INPUT \
242 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
243 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
245 /* If we are going to reload an address, compute the reload type to
247 #define ADDR_TYPE(type) \
248 ((type) == RELOAD_FOR_INPUT_ADDRESS \
249 ? RELOAD_FOR_INPADDR_ADDRESS \
250 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
251 ? RELOAD_FOR_OUTADDR_ADDRESS \
254 static int push_secondary_reload (int, rtx, int, int, enum reg_class,
255 enum machine_mode, enum reload_type,
256 enum insn_code *, secondary_reload_info *);
257 static enum reg_class find_valid_class (enum machine_mode, enum machine_mode,
259 static int reload_inner_reg_of_subreg (rtx, enum machine_mode, int);
260 static void push_replacement (rtx *, int, enum machine_mode);
261 static void dup_replacements (rtx *, rtx *);
262 static void combine_reloads (void);
263 static int find_reusable_reload (rtx *, rtx, enum reg_class,
264 enum reload_type, int, int);
265 static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, enum machine_mode,
266 enum machine_mode, reg_class_t, int, int);
267 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
268 static struct decomposition decompose (rtx);
269 static int immune_p (rtx, rtx, struct decomposition);
270 static bool alternative_allows_const_pool_ref (rtx, const char *, int);
271 static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx,
273 static rtx make_memloc (rtx, int);
274 static int maybe_memory_address_addr_space_p (enum machine_mode, rtx,
275 addr_space_t, rtx *);
276 static int find_reloads_address (enum machine_mode, rtx *, rtx, rtx *,
277 int, enum reload_type, int, rtx);
278 static rtx subst_reg_equivs (rtx, rtx);
279 static rtx subst_indexed_address (rtx);
280 static void update_auto_inc_notes (rtx, int, int);
281 static int find_reloads_address_1 (enum machine_mode, rtx, int,
282 enum rtx_code, enum rtx_code, rtx *,
283 int, enum reload_type,int, rtx);
284 static void find_reloads_address_part (rtx, rtx *, enum reg_class,
285 enum machine_mode, int,
286 enum reload_type, int);
287 static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type,
289 static void copy_replacements_1 (rtx *, rtx *, int);
290 static int find_inc_amount (rtx, rtx);
291 static int refers_to_mem_for_reload_p (rtx);
292 static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
295 /* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
299 push_reg_equiv_alt_mem (int regno, rtx mem)
303 for (it = reg_equiv_alt_mem_list (regno); it; it = XEXP (it, 1))
304 if (rtx_equal_p (XEXP (it, 0), mem))
307 reg_equiv_alt_mem_list (regno)
308 = alloc_EXPR_LIST (REG_EQUIV, mem,
309 reg_equiv_alt_mem_list (regno));
312 /* Determine if any secondary reloads are needed for loading (if IN_P is
313 nonzero) or storing (if IN_P is zero) X to or from a reload register of
314 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
315 are needed, push them.
317 Return the reload number of the secondary reload we made, or -1 if
318 we didn't need one. *PICODE is set to the insn_code to use if we do
319 need a secondary reload. */
322 push_secondary_reload (int in_p, rtx x, int opnum, int optional,
323 enum reg_class reload_class,
324 enum machine_mode reload_mode, enum reload_type type,
325 enum insn_code *picode, secondary_reload_info *prev_sri)
327 enum reg_class rclass = NO_REGS;
328 enum reg_class scratch_class;
329 enum machine_mode mode = reload_mode;
330 enum insn_code icode = CODE_FOR_nothing;
331 enum insn_code t_icode = CODE_FOR_nothing;
332 enum reload_type secondary_type;
333 int s_reload, t_reload = -1;
334 const char *scratch_constraint;
336 secondary_reload_info sri;
338 if (type == RELOAD_FOR_INPUT_ADDRESS
339 || type == RELOAD_FOR_OUTPUT_ADDRESS
340 || type == RELOAD_FOR_INPADDR_ADDRESS
341 || type == RELOAD_FOR_OUTADDR_ADDRESS)
342 secondary_type = type;
344 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
346 *picode = CODE_FOR_nothing;
348 /* If X is a paradoxical SUBREG, use the inner value to determine both the
349 mode and object being reloaded. */
350 if (paradoxical_subreg_p (x))
353 reload_mode = GET_MODE (x);
356 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
357 is still a pseudo-register by now, it *must* have an equivalent MEM
358 but we don't want to assume that), use that equivalent when seeing if
359 a secondary reload is needed since whether or not a reload is needed
360 might be sensitive to the form of the MEM. */
362 if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
363 && reg_equiv_mem (REGNO (x)))
364 x = reg_equiv_mem (REGNO (x));
366 sri.icode = CODE_FOR_nothing;
367 sri.prev_sri = prev_sri;
368 rclass = (enum reg_class) targetm.secondary_reload (in_p, x, reload_class,
370 icode = (enum insn_code) sri.icode;
372 /* If we don't need any secondary registers, done. */
373 if (rclass == NO_REGS && icode == CODE_FOR_nothing)
376 if (rclass != NO_REGS)
377 t_reload = push_secondary_reload (in_p, x, opnum, optional, rclass,
378 reload_mode, type, &t_icode, &sri);
380 /* If we will be using an insn, the secondary reload is for a
383 if (icode != CODE_FOR_nothing)
385 /* If IN_P is nonzero, the reload register will be the output in
386 operand 0. If IN_P is zero, the reload register will be the input
387 in operand 1. Outputs should have an initial "=", which we must
390 /* ??? It would be useful to be able to handle only two, or more than
391 three, operands, but for now we can only handle the case of having
392 exactly three: output, input and one temp/scratch. */
393 gcc_assert (insn_data[(int) icode].n_operands == 3);
395 /* ??? We currently have no way to represent a reload that needs
396 an icode to reload from an intermediate tertiary reload register.
397 We should probably have a new field in struct reload to tag a
398 chain of scratch operand reloads onto. */
399 gcc_assert (rclass == NO_REGS);
401 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
402 gcc_assert (*scratch_constraint == '=');
403 scratch_constraint++;
404 if (*scratch_constraint == '&')
405 scratch_constraint++;
406 letter = *scratch_constraint;
407 scratch_class = (letter == 'r' ? GENERAL_REGS
408 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) letter,
409 scratch_constraint));
411 rclass = scratch_class;
412 mode = insn_data[(int) icode].operand[2].mode;
415 /* This case isn't valid, so fail. Reload is allowed to use the same
416 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
417 in the case of a secondary register, we actually need two different
418 registers for correct code. We fail here to prevent the possibility of
419 silently generating incorrect code later.
421 The convention is that secondary input reloads are valid only if the
422 secondary_class is different from class. If you have such a case, you
423 can not use secondary reloads, you must work around the problem some
426 Allow this when a reload_in/out pattern is being used. I.e. assume
427 that the generated code handles this case. */
429 gcc_assert (!in_p || rclass != reload_class || icode != CODE_FOR_nothing
430 || t_icode != CODE_FOR_nothing);
432 /* See if we can reuse an existing secondary reload. */
433 for (s_reload = 0; s_reload < n_reloads; s_reload++)
434 if (rld[s_reload].secondary_p
435 && (reg_class_subset_p (rclass, rld[s_reload].rclass)
436 || reg_class_subset_p (rld[s_reload].rclass, rclass))
437 && ((in_p && rld[s_reload].inmode == mode)
438 || (! in_p && rld[s_reload].outmode == mode))
439 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
440 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
441 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
442 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
443 && (small_register_class_p (rclass)
444 || targetm.small_register_classes_for_mode_p (VOIDmode))
445 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
446 opnum, rld[s_reload].opnum))
449 rld[s_reload].inmode = mode;
451 rld[s_reload].outmode = mode;
453 if (reg_class_subset_p (rclass, rld[s_reload].rclass))
454 rld[s_reload].rclass = rclass;
456 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
457 rld[s_reload].optional &= optional;
458 rld[s_reload].secondary_p = 1;
459 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
460 opnum, rld[s_reload].opnum))
461 rld[s_reload].when_needed = RELOAD_OTHER;
466 if (s_reload == n_reloads)
468 #ifdef SECONDARY_MEMORY_NEEDED
469 /* If we need a memory location to copy between the two reload regs,
470 set it up now. Note that we do the input case before making
471 the reload and the output case after. This is due to the
472 way reloads are output. */
474 if (in_p && icode == CODE_FOR_nothing
475 && SECONDARY_MEMORY_NEEDED (rclass, reload_class, mode))
477 get_secondary_mem (x, reload_mode, opnum, type);
479 /* We may have just added new reloads. Make sure we add
480 the new reload at the end. */
481 s_reload = n_reloads;
485 /* We need to make a new secondary reload for this register class. */
486 rld[s_reload].in = rld[s_reload].out = 0;
487 rld[s_reload].rclass = rclass;
489 rld[s_reload].inmode = in_p ? mode : VOIDmode;
490 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
491 rld[s_reload].reg_rtx = 0;
492 rld[s_reload].optional = optional;
493 rld[s_reload].inc = 0;
494 /* Maybe we could combine these, but it seems too tricky. */
495 rld[s_reload].nocombine = 1;
496 rld[s_reload].in_reg = 0;
497 rld[s_reload].out_reg = 0;
498 rld[s_reload].opnum = opnum;
499 rld[s_reload].when_needed = secondary_type;
500 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
501 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
502 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
503 rld[s_reload].secondary_out_icode
504 = ! in_p ? t_icode : CODE_FOR_nothing;
505 rld[s_reload].secondary_p = 1;
509 #ifdef SECONDARY_MEMORY_NEEDED
510 if (! in_p && icode == CODE_FOR_nothing
511 && SECONDARY_MEMORY_NEEDED (reload_class, rclass, mode))
512 get_secondary_mem (x, mode, opnum, type);
520 /* If a secondary reload is needed, return its class. If both an intermediate
521 register and a scratch register is needed, we return the class of the
522 intermediate register. */
524 secondary_reload_class (bool in_p, reg_class_t rclass, enum machine_mode mode,
527 enum insn_code icode;
528 secondary_reload_info sri;
530 sri.icode = CODE_FOR_nothing;
533 = (enum reg_class) targetm.secondary_reload (in_p, x, rclass, mode, &sri);
534 icode = (enum insn_code) sri.icode;
536 /* If there are no secondary reloads at all, we return NO_REGS.
537 If an intermediate register is needed, we return its class. */
538 if (icode == CODE_FOR_nothing || rclass != NO_REGS)
541 /* No intermediate register is needed, but we have a special reload
542 pattern, which we assume for now needs a scratch register. */
543 return scratch_reload_class (icode);
546 /* ICODE is the insn_code of a reload pattern. Check that it has exactly
547 three operands, verify that operand 2 is an output operand, and return
549 ??? We'd like to be able to handle any pattern with at least 2 operands,
550 for zero or more scratch registers, but that needs more infrastructure. */
552 scratch_reload_class (enum insn_code icode)
554 const char *scratch_constraint;
556 enum reg_class rclass;
558 gcc_assert (insn_data[(int) icode].n_operands == 3);
559 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
560 gcc_assert (*scratch_constraint == '=');
561 scratch_constraint++;
562 if (*scratch_constraint == '&')
563 scratch_constraint++;
564 scratch_letter = *scratch_constraint;
565 if (scratch_letter == 'r')
567 rclass = REG_CLASS_FROM_CONSTRAINT ((unsigned char) scratch_letter,
569 gcc_assert (rclass != NO_REGS);
573 #ifdef SECONDARY_MEMORY_NEEDED
575 /* Return a memory location that will be used to copy X in mode MODE.
576 If we haven't already made a location for this mode in this insn,
577 call find_reloads_address on the location being returned. */
580 get_secondary_mem (rtx x ATTRIBUTE_UNUSED, enum machine_mode mode,
581 int opnum, enum reload_type type)
586 /* By default, if MODE is narrower than a word, widen it to a word.
587 This is required because most machines that require these memory
588 locations do not support short load and stores from all registers
589 (e.g., FP registers). */
591 #ifdef SECONDARY_MEMORY_NEEDED_MODE
592 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
594 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
595 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
598 /* If we already have made a MEM for this operand in MODE, return it. */
599 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
600 return secondary_memlocs_elim[(int) mode][opnum];
602 /* If this is the first time we've tried to get a MEM for this mode,
603 allocate a new one. `something_changed' in reload will get set
604 by noticing that the frame size has changed. */
606 if (secondary_memlocs[(int) mode] == 0)
608 #ifdef SECONDARY_MEMORY_NEEDED_RTX
609 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
611 secondary_memlocs[(int) mode]
612 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
616 /* Get a version of the address doing any eliminations needed. If that
617 didn't give us a new MEM, make a new one if it isn't valid. */
619 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
620 mem_valid = strict_memory_address_addr_space_p (mode, XEXP (loc, 0),
621 MEM_ADDR_SPACE (loc));
623 if (! mem_valid && loc == secondary_memlocs[(int) mode])
624 loc = copy_rtx (loc);
626 /* The only time the call below will do anything is if the stack
627 offset is too large. In that case IND_LEVELS doesn't matter, so we
628 can just pass a zero. Adjust the type to be the address of the
629 corresponding object. If the address was valid, save the eliminated
630 address. If it wasn't valid, we need to make a reload each time, so
635 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
636 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
639 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
643 secondary_memlocs_elim[(int) mode][opnum] = loc;
644 if (secondary_memlocs_elim_used <= (int)mode)
645 secondary_memlocs_elim_used = (int)mode + 1;
649 /* Clear any secondary memory locations we've made. */
652 clear_secondary_mem (void)
654 memset (secondary_memlocs, 0, sizeof secondary_memlocs);
656 #endif /* SECONDARY_MEMORY_NEEDED */
659 /* Find the largest class which has at least one register valid in
660 mode INNER, and which for every such register, that register number
661 plus N is also valid in OUTER (if in range) and is cheap to move
662 into REGNO. Such a class must exist. */
664 static enum reg_class
665 find_valid_class (enum machine_mode outer ATTRIBUTE_UNUSED,
666 enum machine_mode inner ATTRIBUTE_UNUSED, int n,
667 unsigned int dest_regno ATTRIBUTE_UNUSED)
672 enum reg_class best_class = NO_REGS;
673 enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
674 unsigned int best_size = 0;
677 for (rclass = 1; rclass < N_REG_CLASSES; rclass++)
681 for (regno = 0; regno < FIRST_PSEUDO_REGISTER - n && ! bad; regno++)
682 if (TEST_HARD_REG_BIT (reg_class_contents[rclass], regno))
684 if (HARD_REGNO_MODE_OK (regno, inner))
687 if (! TEST_HARD_REG_BIT (reg_class_contents[rclass], regno + n)
688 || ! HARD_REGNO_MODE_OK (regno + n, outer))
695 cost = register_move_cost (outer, (enum reg_class) rclass, dest_class);
697 if ((reg_class_size[rclass] > best_size
698 && (best_cost < 0 || best_cost >= cost))
701 best_class = (enum reg_class) rclass;
702 best_size = reg_class_size[rclass];
703 best_cost = register_move_cost (outer, (enum reg_class) rclass,
708 gcc_assert (best_size != 0);
713 /* Return the number of a previously made reload that can be combined with
714 a new one, or n_reloads if none of the existing reloads can be used.
715 OUT, RCLASS, TYPE and OPNUM are the same arguments as passed to
716 push_reload, they determine the kind of the new reload that we try to
717 combine. P_IN points to the corresponding value of IN, which can be
718 modified by this function.
719 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
722 find_reusable_reload (rtx *p_in, rtx out, enum reg_class rclass,
723 enum reload_type type, int opnum, int dont_share)
727 /* We can't merge two reloads if the output of either one is
730 if (earlyclobber_operand_p (out))
733 /* We can use an existing reload if the class is right
734 and at least one of IN and OUT is a match
735 and the other is at worst neutral.
736 (A zero compared against anything is neutral.)
738 For targets with small register classes, don't use existing reloads
739 unless they are for the same thing since that can cause us to need
740 more reload registers than we otherwise would. */
742 for (i = 0; i < n_reloads; i++)
743 if ((reg_class_subset_p (rclass, rld[i].rclass)
744 || reg_class_subset_p (rld[i].rclass, rclass))
745 /* If the existing reload has a register, it must fit our class. */
746 && (rld[i].reg_rtx == 0
747 || TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
748 true_regnum (rld[i].reg_rtx)))
749 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
750 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
751 || (out != 0 && MATCHES (rld[i].out, out)
752 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
753 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
754 && (small_register_class_p (rclass)
755 || targetm.small_register_classes_for_mode_p (VOIDmode))
756 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
759 /* Reloading a plain reg for input can match a reload to postincrement
760 that reg, since the postincrement's value is the right value.
761 Likewise, it can match a preincrement reload, since we regard
762 the preincrementation as happening before any ref in this insn
764 for (i = 0; i < n_reloads; i++)
765 if ((reg_class_subset_p (rclass, rld[i].rclass)
766 || reg_class_subset_p (rld[i].rclass, rclass))
767 /* If the existing reload has a register, it must fit our
769 && (rld[i].reg_rtx == 0
770 || TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
771 true_regnum (rld[i].reg_rtx)))
772 && out == 0 && rld[i].out == 0 && rld[i].in != 0
774 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == RTX_AUTOINC
775 && MATCHES (XEXP (rld[i].in, 0), in))
776 || (REG_P (rld[i].in)
777 && GET_RTX_CLASS (GET_CODE (in)) == RTX_AUTOINC
778 && MATCHES (XEXP (in, 0), rld[i].in)))
779 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
780 && (small_register_class_p (rclass)
781 || targetm.small_register_classes_for_mode_p (VOIDmode))
782 && MERGABLE_RELOADS (type, rld[i].when_needed,
783 opnum, rld[i].opnum))
785 /* Make sure reload_in ultimately has the increment,
786 not the plain register. */
794 /* Return nonzero if X is a SUBREG which will require reloading of its
795 SUBREG_REG expression. */
798 reload_inner_reg_of_subreg (rtx x, enum machine_mode mode, int output)
802 /* Only SUBREGs are problematical. */
803 if (GET_CODE (x) != SUBREG)
806 inner = SUBREG_REG (x);
808 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
809 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
812 /* If INNER is not a hard register, then INNER will not need to
815 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
818 /* If INNER is not ok for MODE, then INNER will need reloading. */
819 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
822 /* If the outer part is a word or smaller, INNER larger than a
823 word and the number of regs for INNER is not the same as the
824 number of words in INNER, then INNER will need reloading. */
825 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
827 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
828 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
829 != (int) hard_regno_nregs[REGNO (inner)][GET_MODE (inner)]));
832 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
833 requiring an extra reload register. The caller has already found that
834 IN contains some reference to REGNO, so check that we can produce the
835 new value in a single step. E.g. if we have
836 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
837 instruction that adds one to a register, this should succeed.
838 However, if we have something like
839 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
840 needs to be loaded into a register first, we need a separate reload
842 Such PLUS reloads are generated by find_reload_address_part.
843 The out-of-range PLUS expressions are usually introduced in the instruction
844 patterns by register elimination and substituting pseudos without a home
845 by their function-invariant equivalences. */
847 can_reload_into (rtx in, int regno, enum machine_mode mode)
851 struct recog_data save_recog_data;
853 /* For matching constraints, we often get notional input reloads where
854 we want to use the original register as the reload register. I.e.
855 technically this is a non-optional input-output reload, but IN is
856 already a valid register, and has been chosen as the reload register.
857 Speed this up, since it trivially works. */
861 /* To test MEMs properly, we'd have to take into account all the reloads
862 that are already scheduled, which can become quite complicated.
863 And since we've already handled address reloads for this MEM, it
864 should always succeed anyway. */
868 /* If we can make a simple SET insn that does the job, everything should
870 dst = gen_rtx_REG (mode, regno);
871 test_insn = make_insn_raw (gen_rtx_SET (VOIDmode, dst, in));
872 save_recog_data = recog_data;
873 if (recog_memoized (test_insn) >= 0)
875 extract_insn (test_insn);
876 r = constrain_operands (1);
878 recog_data = save_recog_data;
882 /* Record one reload that needs to be performed.
883 IN is an rtx saying where the data are to be found before this instruction.
884 OUT says where they must be stored after the instruction.
885 (IN is zero for data not read, and OUT is zero for data not written.)
886 INLOC and OUTLOC point to the places in the instructions where
887 IN and OUT were found.
888 If IN and OUT are both nonzero, it means the same register must be used
889 to reload both IN and OUT.
891 RCLASS is a register class required for the reloaded data.
892 INMODE is the machine mode that the instruction requires
893 for the reg that replaces IN and OUTMODE is likewise for OUT.
895 If IN is zero, then OUT's location and mode should be passed as
898 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
900 OPTIONAL nonzero means this reload does not need to be performed:
901 it can be discarded if that is more convenient.
903 OPNUM and TYPE say what the purpose of this reload is.
905 The return value is the reload-number for this reload.
907 If both IN and OUT are nonzero, in some rare cases we might
908 want to make two separate reloads. (Actually we never do this now.)
909 Therefore, the reload-number for OUT is stored in
910 output_reloadnum when we return; the return value applies to IN.
911 Usually (presently always), when IN and OUT are nonzero,
912 the two reload-numbers are equal, but the caller should be careful to
916 push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
917 enum reg_class rclass, enum machine_mode inmode,
918 enum machine_mode outmode, int strict_low, int optional,
919 int opnum, enum reload_type type)
923 int dont_remove_subreg = 0;
924 #ifdef LIMIT_RELOAD_CLASS
925 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
927 int secondary_in_reload = -1, secondary_out_reload = -1;
928 enum insn_code secondary_in_icode = CODE_FOR_nothing;
929 enum insn_code secondary_out_icode = CODE_FOR_nothing;
931 /* INMODE and/or OUTMODE could be VOIDmode if no mode
932 has been specified for the operand. In that case,
933 use the operand's mode as the mode to reload. */
934 if (inmode == VOIDmode && in != 0)
935 inmode = GET_MODE (in);
936 if (outmode == VOIDmode && out != 0)
937 outmode = GET_MODE (out);
939 /* If find_reloads and friends until now missed to replace a pseudo
940 with a constant of reg_equiv_constant something went wrong
942 Note that it can't simply be done here if we missed it earlier
943 since the constant might need to be pushed into the literal pool
944 and the resulting memref would probably need further
946 if (in != 0 && REG_P (in))
948 int regno = REGNO (in);
950 gcc_assert (regno < FIRST_PSEUDO_REGISTER
951 || reg_renumber[regno] >= 0
952 || reg_equiv_constant (regno) == NULL_RTX);
955 /* reg_equiv_constant only contains constants which are obviously
956 not appropriate as destination. So if we would need to replace
957 the destination pseudo with a constant we are in real
959 if (out != 0 && REG_P (out))
961 int regno = REGNO (out);
963 gcc_assert (regno < FIRST_PSEUDO_REGISTER
964 || reg_renumber[regno] >= 0
965 || reg_equiv_constant (regno) == NULL_RTX);
968 /* If we have a read-write operand with an address side-effect,
969 change either IN or OUT so the side-effect happens only once. */
970 if (in != 0 && out != 0 && MEM_P (in) && rtx_equal_p (in, out))
971 switch (GET_CODE (XEXP (in, 0)))
973 case POST_INC: case POST_DEC: case POST_MODIFY:
974 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
977 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
978 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
985 /* If we are reloading a (SUBREG constant ...), really reload just the
986 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
987 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
988 a pseudo and hence will become a MEM) with M1 wider than M2 and the
989 register is a pseudo, also reload the inside expression.
990 For machines that extend byte loads, do this for any SUBREG of a pseudo
991 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
992 M2 is an integral mode that gets extended when loaded.
993 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
994 either M1 is not valid for R or M2 is wider than a word but we only
995 need one word to store an M2-sized quantity in R.
996 (However, if OUT is nonzero, we need to reload the reg *and*
997 the subreg, so do nothing here, and let following statement handle it.)
999 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
1000 we can't handle it here because CONST_INT does not indicate a mode.
1002 Similarly, we must reload the inside expression if we have a
1003 STRICT_LOW_PART (presumably, in == out in this case).
1005 Also reload the inner expression if it does not require a secondary
1006 reload but the SUBREG does.
1008 Finally, reload the inner expression if it is a register that is in
1009 the class whose registers cannot be referenced in a different size
1010 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
1011 cannot reload just the inside since we might end up with the wrong
1012 register class. But if it is inside a STRICT_LOW_PART, we have
1013 no choice, so we hope we do get the right register class there. */
1015 if (in != 0 && GET_CODE (in) == SUBREG
1016 && (subreg_lowpart_p (in) || strict_low)
1017 #ifdef CANNOT_CHANGE_MODE_CLASS
1018 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, rclass)
1020 && contains_reg_of_mode[(int) rclass][(int) GET_MODE (SUBREG_REG (in))]
1021 && (CONSTANT_P (SUBREG_REG (in))
1022 || GET_CODE (SUBREG_REG (in)) == PLUS
1024 || (((REG_P (SUBREG_REG (in))
1025 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
1026 || MEM_P (SUBREG_REG (in)))
1027 && ((GET_MODE_PRECISION (inmode)
1028 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (in))))
1029 #ifdef LOAD_EXTEND_OP
1030 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1031 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1033 && (GET_MODE_PRECISION (inmode)
1034 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (in))))
1035 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
1036 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != UNKNOWN)
1038 #ifdef WORD_REGISTER_OPERATIONS
1039 || ((GET_MODE_PRECISION (inmode)
1040 < GET_MODE_PRECISION (GET_MODE (SUBREG_REG (in))))
1041 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1042 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1046 || (REG_P (SUBREG_REG (in))
1047 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1048 /* The case where out is nonzero
1049 is handled differently in the following statement. */
1050 && (out == 0 || subreg_lowpart_p (in))
1051 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1052 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1054 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1056 != (int) hard_regno_nregs[REGNO (SUBREG_REG (in))]
1057 [GET_MODE (SUBREG_REG (in))]))
1058 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1059 || (secondary_reload_class (1, rclass, inmode, in) != NO_REGS
1060 && (secondary_reload_class (1, rclass, GET_MODE (SUBREG_REG (in)),
1063 #ifdef CANNOT_CHANGE_MODE_CLASS
1064 || (REG_P (SUBREG_REG (in))
1065 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1066 && REG_CANNOT_CHANGE_MODE_P
1067 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1071 #ifdef LIMIT_RELOAD_CLASS
1072 in_subreg_loc = inloc;
1074 inloc = &SUBREG_REG (in);
1076 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1078 /* This is supposed to happen only for paradoxical subregs made by
1079 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1080 gcc_assert (GET_MODE_SIZE (GET_MODE (in)) <= GET_MODE_SIZE (inmode));
1082 inmode = GET_MODE (in);
1085 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1086 either M1 is not valid for R or M2 is wider than a word but we only
1087 need one word to store an M2-sized quantity in R.
1089 However, we must reload the inner reg *as well as* the subreg in
1092 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1093 code above. This can happen if SUBREG_BYTE != 0. */
1095 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1097 enum reg_class in_class = rclass;
1099 if (REG_P (SUBREG_REG (in)))
1101 = find_valid_class (inmode, GET_MODE (SUBREG_REG (in)),
1102 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1103 GET_MODE (SUBREG_REG (in)),
1106 REGNO (SUBREG_REG (in)));
1108 /* This relies on the fact that emit_reload_insns outputs the
1109 instructions for input reloads of type RELOAD_OTHER in the same
1110 order as the reloads. Thus if the outer reload is also of type
1111 RELOAD_OTHER, we are guaranteed that this inner reload will be
1112 output before the outer reload. */
1113 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1114 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1115 dont_remove_subreg = 1;
1118 /* Similarly for paradoxical and problematical SUBREGs on the output.
1119 Note that there is no reason we need worry about the previous value
1120 of SUBREG_REG (out); even if wider than out, storing in a subreg is
1121 entitled to clobber it all (except in the case of a word mode subreg
1122 or of a STRICT_LOW_PART, in that latter case the constraint should
1123 label it input-output.) */
1124 if (out != 0 && GET_CODE (out) == SUBREG
1125 && (subreg_lowpart_p (out) || strict_low)
1126 #ifdef CANNOT_CHANGE_MODE_CLASS
1127 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, rclass)
1129 && contains_reg_of_mode[(int) rclass][(int) GET_MODE (SUBREG_REG (out))]
1130 && (CONSTANT_P (SUBREG_REG (out))
1132 || (((REG_P (SUBREG_REG (out))
1133 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1134 || MEM_P (SUBREG_REG (out)))
1135 && ((GET_MODE_PRECISION (outmode)
1136 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (out))))
1137 #ifdef WORD_REGISTER_OPERATIONS
1138 || ((GET_MODE_PRECISION (outmode)
1139 < GET_MODE_PRECISION (GET_MODE (SUBREG_REG (out))))
1140 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1141 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1145 || (secondary_reload_class (0, rclass, outmode, out) != NO_REGS
1146 && (secondary_reload_class (0, rclass, GET_MODE (SUBREG_REG (out)),
1149 #ifdef CANNOT_CHANGE_MODE_CLASS
1150 || (REG_P (SUBREG_REG (out))
1151 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1152 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1153 GET_MODE (SUBREG_REG (out)),
1158 #ifdef LIMIT_RELOAD_CLASS
1159 out_subreg_loc = outloc;
1161 outloc = &SUBREG_REG (out);
1163 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1164 gcc_assert (!MEM_P (out)
1165 || GET_MODE_SIZE (GET_MODE (out))
1166 <= GET_MODE_SIZE (outmode));
1168 outmode = GET_MODE (out);
1171 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1172 either M1 is not valid for R or M2 is wider than a word but we only
1173 need one word to store an M2-sized quantity in R.
1175 However, we must reload the inner reg *as well as* the subreg in
1176 that case. In this case, the inner reg is an in-out reload. */
1178 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1180 /* This relies on the fact that emit_reload_insns outputs the
1181 instructions for output reloads of type RELOAD_OTHER in reverse
1182 order of the reloads. Thus if the outer reload is also of type
1183 RELOAD_OTHER, we are guaranteed that this inner reload will be
1184 output after the outer reload. */
1185 dont_remove_subreg = 1;
1186 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1188 find_valid_class (outmode, GET_MODE (SUBREG_REG (out)),
1189 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1190 GET_MODE (SUBREG_REG (out)),
1193 REGNO (SUBREG_REG (out))),
1194 VOIDmode, VOIDmode, 0, 0,
1195 opnum, RELOAD_OTHER);
1198 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1199 if (in != 0 && out != 0 && MEM_P (out)
1200 && (REG_P (in) || MEM_P (in) || GET_CODE (in) == PLUS)
1201 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1204 /* If IN is a SUBREG of a hard register, make a new REG. This
1205 simplifies some of the cases below. */
1207 if (in != 0 && GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))
1208 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1209 && ! dont_remove_subreg)
1210 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1212 /* Similarly for OUT. */
1213 if (out != 0 && GET_CODE (out) == SUBREG
1214 && REG_P (SUBREG_REG (out))
1215 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1216 && ! dont_remove_subreg)
1217 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1219 /* Narrow down the class of register wanted if that is
1220 desirable on this machine for efficiency. */
1222 reg_class_t preferred_class = rclass;
1225 preferred_class = targetm.preferred_reload_class (in, rclass);
1227 /* Output reloads may need analogous treatment, different in detail. */
1230 = targetm.preferred_output_reload_class (out, preferred_class);
1232 /* Discard what the target said if we cannot do it. */
1233 if (preferred_class != NO_REGS
1234 || (optional && type == RELOAD_FOR_OUTPUT))
1235 rclass = (enum reg_class) preferred_class;
1238 /* Make sure we use a class that can handle the actual pseudo
1239 inside any subreg. For example, on the 386, QImode regs
1240 can appear within SImode subregs. Although GENERAL_REGS
1241 can handle SImode, QImode needs a smaller class. */
1242 #ifdef LIMIT_RELOAD_CLASS
1244 rclass = LIMIT_RELOAD_CLASS (inmode, rclass);
1245 else if (in != 0 && GET_CODE (in) == SUBREG)
1246 rclass = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), rclass);
1249 rclass = LIMIT_RELOAD_CLASS (outmode, rclass);
1250 if (out != 0 && GET_CODE (out) == SUBREG)
1251 rclass = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), rclass);
1254 /* Verify that this class is at least possible for the mode that
1256 if (this_insn_is_asm)
1258 enum machine_mode mode;
1259 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1263 if (mode == VOIDmode)
1265 error_for_asm (this_insn, "cannot reload integer constant "
1266 "operand in %<asm%>");
1271 outmode = word_mode;
1273 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1274 if (HARD_REGNO_MODE_OK (i, mode)
1275 && in_hard_reg_set_p (reg_class_contents[(int) rclass], mode, i))
1277 if (i == FIRST_PSEUDO_REGISTER)
1279 error_for_asm (this_insn, "impossible register constraint "
1281 /* Avoid further trouble with this insn. */
1282 PATTERN (this_insn) = gen_rtx_USE (VOIDmode, const0_rtx);
1283 /* We used to continue here setting class to ALL_REGS, but it triggers
1284 sanity check on i386 for:
1285 void foo(long double d)
1289 Returning zero here ought to be safe as we take care in
1290 find_reloads to not process the reloads when instruction was
1297 /* Optional output reloads are always OK even if we have no register class,
1298 since the function of these reloads is only to have spill_reg_store etc.
1299 set, so that the storing insn can be deleted later. */
1300 gcc_assert (rclass != NO_REGS
1301 || (optional != 0 && type == RELOAD_FOR_OUTPUT));
1303 i = find_reusable_reload (&in, out, rclass, type, opnum, dont_share);
1307 /* See if we need a secondary reload register to move between CLASS
1308 and IN or CLASS and OUT. Get the icode and push any required reloads
1309 needed for each of them if so. */
1313 = push_secondary_reload (1, in, opnum, optional, rclass, inmode, type,
1314 &secondary_in_icode, NULL);
1315 if (out != 0 && GET_CODE (out) != SCRATCH)
1316 secondary_out_reload
1317 = push_secondary_reload (0, out, opnum, optional, rclass, outmode,
1318 type, &secondary_out_icode, NULL);
1320 /* We found no existing reload suitable for re-use.
1321 So add an additional reload. */
1323 #ifdef SECONDARY_MEMORY_NEEDED
1324 /* If a memory location is needed for the copy, make one. */
1327 || (GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))))
1328 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1329 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1331 get_secondary_mem (in, inmode, opnum, type);
1337 rld[i].rclass = rclass;
1338 rld[i].inmode = inmode;
1339 rld[i].outmode = outmode;
1341 rld[i].optional = optional;
1343 rld[i].nocombine = 0;
1344 rld[i].in_reg = inloc ? *inloc : 0;
1345 rld[i].out_reg = outloc ? *outloc : 0;
1346 rld[i].opnum = opnum;
1347 rld[i].when_needed = type;
1348 rld[i].secondary_in_reload = secondary_in_reload;
1349 rld[i].secondary_out_reload = secondary_out_reload;
1350 rld[i].secondary_in_icode = secondary_in_icode;
1351 rld[i].secondary_out_icode = secondary_out_icode;
1352 rld[i].secondary_p = 0;
1356 #ifdef SECONDARY_MEMORY_NEEDED
1359 || (GET_CODE (out) == SUBREG && REG_P (SUBREG_REG (out))))
1360 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1361 && SECONDARY_MEMORY_NEEDED (rclass,
1362 REGNO_REG_CLASS (reg_or_subregno (out)),
1364 get_secondary_mem (out, outmode, opnum, type);
1369 /* We are reusing an existing reload,
1370 but we may have additional information for it.
1371 For example, we may now have both IN and OUT
1372 while the old one may have just one of them. */
1374 /* The modes can be different. If they are, we want to reload in
1375 the larger mode, so that the value is valid for both modes. */
1376 if (inmode != VOIDmode
1377 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1378 rld[i].inmode = inmode;
1379 if (outmode != VOIDmode
1380 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1381 rld[i].outmode = outmode;
1384 rtx in_reg = inloc ? *inloc : 0;
1385 /* If we merge reloads for two distinct rtl expressions that
1386 are identical in content, there might be duplicate address
1387 reloads. Remove the extra set now, so that if we later find
1388 that we can inherit this reload, we can get rid of the
1389 address reloads altogether.
1391 Do not do this if both reloads are optional since the result
1392 would be an optional reload which could potentially leave
1393 unresolved address replacements.
1395 It is not sufficient to call transfer_replacements since
1396 choose_reload_regs will remove the replacements for address
1397 reloads of inherited reloads which results in the same
1399 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1400 && ! (rld[i].optional && optional))
1402 /* We must keep the address reload with the lower operand
1404 if (opnum > rld[i].opnum)
1406 remove_address_replacements (in);
1408 in_reg = rld[i].in_reg;
1411 remove_address_replacements (rld[i].in);
1413 /* When emitting reloads we don't necessarily look at the in-
1414 and outmode, but also directly at the operands (in and out).
1415 So we can't simply overwrite them with whatever we have found
1416 for this (to-be-merged) reload, we have to "merge" that too.
1417 Reusing another reload already verified that we deal with the
1418 same operands, just possibly in different modes. So we
1419 overwrite the operands only when the new mode is larger.
1420 See also PR33613. */
1422 || GET_MODE_SIZE (GET_MODE (in))
1423 > GET_MODE_SIZE (GET_MODE (rld[i].in)))
1427 && GET_MODE_SIZE (GET_MODE (in_reg))
1428 > GET_MODE_SIZE (GET_MODE (rld[i].in_reg))))
1429 rld[i].in_reg = in_reg;
1435 && GET_MODE_SIZE (GET_MODE (out))
1436 > GET_MODE_SIZE (GET_MODE (rld[i].out))))
1440 || GET_MODE_SIZE (GET_MODE (*outloc))
1441 > GET_MODE_SIZE (GET_MODE (rld[i].out_reg))))
1442 rld[i].out_reg = *outloc;
1444 if (reg_class_subset_p (rclass, rld[i].rclass))
1445 rld[i].rclass = rclass;
1446 rld[i].optional &= optional;
1447 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1448 opnum, rld[i].opnum))
1449 rld[i].when_needed = RELOAD_OTHER;
1450 rld[i].opnum = MIN (rld[i].opnum, opnum);
1453 /* If the ostensible rtx being reloaded differs from the rtx found
1454 in the location to substitute, this reload is not safe to combine
1455 because we cannot reliably tell whether it appears in the insn. */
1457 if (in != 0 && in != *inloc)
1458 rld[i].nocombine = 1;
1461 /* This was replaced by changes in find_reloads_address_1 and the new
1462 function inc_for_reload, which go with a new meaning of reload_inc. */
1464 /* If this is an IN/OUT reload in an insn that sets the CC,
1465 it must be for an autoincrement. It doesn't work to store
1466 the incremented value after the insn because that would clobber the CC.
1467 So we must do the increment of the value reloaded from,
1468 increment it, store it back, then decrement again. */
1469 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1473 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1474 /* If we did not find a nonzero amount-to-increment-by,
1475 that contradicts the belief that IN is being incremented
1476 in an address in this insn. */
1477 gcc_assert (rld[i].inc != 0);
1481 /* If we will replace IN and OUT with the reload-reg,
1482 record where they are located so that substitution need
1483 not do a tree walk. */
1485 if (replace_reloads)
1489 struct replacement *r = &replacements[n_replacements++];
1494 if (outloc != 0 && outloc != inloc)
1496 struct replacement *r = &replacements[n_replacements++];
1503 /* If this reload is just being introduced and it has both
1504 an incoming quantity and an outgoing quantity that are
1505 supposed to be made to match, see if either one of the two
1506 can serve as the place to reload into.
1508 If one of them is acceptable, set rld[i].reg_rtx
1511 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1513 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1516 earlyclobber_operand_p (out));
1518 /* If the outgoing register already contains the same value
1519 as the incoming one, we can dispense with loading it.
1520 The easiest way to tell the caller that is to give a phony
1521 value for the incoming operand (same as outgoing one). */
1522 if (rld[i].reg_rtx == out
1523 && (REG_P (in) || CONSTANT_P (in))
1524 && 0 != find_equiv_reg (in, this_insn, NO_REGS, REGNO (out),
1525 static_reload_reg_p, i, inmode))
1529 /* If this is an input reload and the operand contains a register that
1530 dies in this insn and is used nowhere else, see if it is the right class
1531 to be used for this reload. Use it if so. (This occurs most commonly
1532 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1533 this if it is also an output reload that mentions the register unless
1534 the output is a SUBREG that clobbers an entire register.
1536 Note that the operand might be one of the spill regs, if it is a
1537 pseudo reg and we are in a block where spilling has not taken place.
1538 But if there is no spilling in this block, that is OK.
1539 An explicitly used hard reg cannot be a spill reg. */
1541 if (rld[i].reg_rtx == 0 && in != 0 && hard_regs_live_known)
1545 enum machine_mode rel_mode = inmode;
1547 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1550 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1551 if (REG_NOTE_KIND (note) == REG_DEAD
1552 && REG_P (XEXP (note, 0))
1553 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1554 && reg_mentioned_p (XEXP (note, 0), in)
1555 /* Check that a former pseudo is valid; see find_dummy_reload. */
1556 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1557 || (! bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR),
1558 ORIGINAL_REGNO (XEXP (note, 0)))
1559 && hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))] == 1))
1560 && ! refers_to_regno_for_reload_p (regno,
1561 end_hard_regno (rel_mode,
1563 PATTERN (this_insn), inloc)
1564 /* If this is also an output reload, IN cannot be used as
1565 the reload register if it is set in this insn unless IN
1567 && (out == 0 || in == out
1568 || ! hard_reg_set_here_p (regno,
1569 end_hard_regno (rel_mode, regno),
1570 PATTERN (this_insn)))
1571 /* ??? Why is this code so different from the previous?
1572 Is there any simple coherent way to describe the two together?
1573 What's going on here. */
1575 || (GET_CODE (in) == SUBREG
1576 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1578 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1579 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1580 /* Make sure the operand fits in the reg that dies. */
1581 && (GET_MODE_SIZE (rel_mode)
1582 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1583 && HARD_REGNO_MODE_OK (regno, inmode)
1584 && HARD_REGNO_MODE_OK (regno, outmode))
1587 unsigned int nregs = MAX (hard_regno_nregs[regno][inmode],
1588 hard_regno_nregs[regno][outmode]);
1590 for (offs = 0; offs < nregs; offs++)
1591 if (fixed_regs[regno + offs]
1592 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
1597 && (! (refers_to_regno_for_reload_p
1598 (regno, end_hard_regno (inmode, regno), in, (rtx *) 0))
1599 || can_reload_into (in, regno, inmode)))
1601 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1608 output_reloadnum = i;
1613 /* Record an additional place we must replace a value
1614 for which we have already recorded a reload.
1615 RELOADNUM is the value returned by push_reload
1616 when the reload was recorded.
1617 This is used in insn patterns that use match_dup. */
1620 push_replacement (rtx *loc, int reloadnum, enum machine_mode mode)
1622 if (replace_reloads)
1624 struct replacement *r = &replacements[n_replacements++];
1625 r->what = reloadnum;
1631 /* Duplicate any replacement we have recorded to apply at
1632 location ORIG_LOC to also be performed at DUP_LOC.
1633 This is used in insn patterns that use match_dup. */
1636 dup_replacements (rtx *dup_loc, rtx *orig_loc)
1638 int i, n = n_replacements;
1640 for (i = 0; i < n; i++)
1642 struct replacement *r = &replacements[i];
1643 if (r->where == orig_loc)
1644 push_replacement (dup_loc, r->what, r->mode);
1648 /* Transfer all replacements that used to be in reload FROM to be in
1652 transfer_replacements (int to, int from)
1656 for (i = 0; i < n_replacements; i++)
1657 if (replacements[i].what == from)
1658 replacements[i].what = to;
1661 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1662 or a subpart of it. If we have any replacements registered for IN_RTX,
1663 cancel the reloads that were supposed to load them.
1664 Return nonzero if we canceled any reloads. */
1666 remove_address_replacements (rtx in_rtx)
1669 char reload_flags[MAX_RELOADS];
1670 int something_changed = 0;
1672 memset (reload_flags, 0, sizeof reload_flags);
1673 for (i = 0, j = 0; i < n_replacements; i++)
1675 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1676 reload_flags[replacements[i].what] |= 1;
1679 replacements[j++] = replacements[i];
1680 reload_flags[replacements[i].what] |= 2;
1683 /* Note that the following store must be done before the recursive calls. */
1686 for (i = n_reloads - 1; i >= 0; i--)
1688 if (reload_flags[i] == 1)
1690 deallocate_reload_reg (i);
1691 remove_address_replacements (rld[i].in);
1693 something_changed = 1;
1696 return something_changed;
1699 /* If there is only one output reload, and it is not for an earlyclobber
1700 operand, try to combine it with a (logically unrelated) input reload
1701 to reduce the number of reload registers needed.
1703 This is safe if the input reload does not appear in
1704 the value being output-reloaded, because this implies
1705 it is not needed any more once the original insn completes.
1707 If that doesn't work, see we can use any of the registers that
1708 die in this insn as a reload register. We can if it is of the right
1709 class and does not appear in the value being output-reloaded. */
1712 combine_reloads (void)
1715 int output_reload = -1;
1716 int secondary_out = -1;
1719 /* Find the output reload; return unless there is exactly one
1720 and that one is mandatory. */
1722 for (i = 0; i < n_reloads; i++)
1723 if (rld[i].out != 0)
1725 if (output_reload >= 0)
1730 if (output_reload < 0 || rld[output_reload].optional)
1733 /* An input-output reload isn't combinable. */
1735 if (rld[output_reload].in != 0)
1738 /* If this reload is for an earlyclobber operand, we can't do anything. */
1739 if (earlyclobber_operand_p (rld[output_reload].out))
1742 /* If there is a reload for part of the address of this operand, we would
1743 need to change it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1744 its life to the point where doing this combine would not lower the
1745 number of spill registers needed. */
1746 for (i = 0; i < n_reloads; i++)
1747 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1748 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1749 && rld[i].opnum == rld[output_reload].opnum)
1752 /* Check each input reload; can we combine it? */
1754 for (i = 0; i < n_reloads; i++)
1755 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1756 /* Life span of this reload must not extend past main insn. */
1757 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1758 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1759 && rld[i].when_needed != RELOAD_OTHER
1760 && (ira_reg_class_max_nregs [(int)rld[i].rclass][(int) rld[i].inmode]
1761 == ira_reg_class_max_nregs [(int) rld[output_reload].rclass]
1762 [(int) rld[output_reload].outmode])
1764 && rld[i].reg_rtx == 0
1765 #ifdef SECONDARY_MEMORY_NEEDED
1766 /* Don't combine two reloads with different secondary
1767 memory locations. */
1768 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1769 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1770 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1771 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1773 && (targetm.small_register_classes_for_mode_p (VOIDmode)
1774 ? (rld[i].rclass == rld[output_reload].rclass)
1775 : (reg_class_subset_p (rld[i].rclass,
1776 rld[output_reload].rclass)
1777 || reg_class_subset_p (rld[output_reload].rclass,
1779 && (MATCHES (rld[i].in, rld[output_reload].out)
1780 /* Args reversed because the first arg seems to be
1781 the one that we imagine being modified
1782 while the second is the one that might be affected. */
1783 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1785 /* However, if the input is a register that appears inside
1786 the output, then we also can't share.
1787 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1788 If the same reload reg is used for both reg 69 and the
1789 result to be stored in memory, then that result
1790 will clobber the address of the memory ref. */
1791 && ! (REG_P (rld[i].in)
1792 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1793 rld[output_reload].out))))
1794 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1795 rld[i].when_needed != RELOAD_FOR_INPUT)
1796 && (reg_class_size[(int) rld[i].rclass]
1797 || targetm.small_register_classes_for_mode_p (VOIDmode))
1798 /* We will allow making things slightly worse by combining an
1799 input and an output, but no worse than that. */
1800 && (rld[i].when_needed == RELOAD_FOR_INPUT
1801 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1805 /* We have found a reload to combine with! */
1806 rld[i].out = rld[output_reload].out;
1807 rld[i].out_reg = rld[output_reload].out_reg;
1808 rld[i].outmode = rld[output_reload].outmode;
1809 /* Mark the old output reload as inoperative. */
1810 rld[output_reload].out = 0;
1811 /* The combined reload is needed for the entire insn. */
1812 rld[i].when_needed = RELOAD_OTHER;
1813 /* If the output reload had a secondary reload, copy it. */
1814 if (rld[output_reload].secondary_out_reload != -1)
1816 rld[i].secondary_out_reload
1817 = rld[output_reload].secondary_out_reload;
1818 rld[i].secondary_out_icode
1819 = rld[output_reload].secondary_out_icode;
1822 #ifdef SECONDARY_MEMORY_NEEDED
1823 /* Copy any secondary MEM. */
1824 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1825 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1826 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1828 /* If required, minimize the register class. */
1829 if (reg_class_subset_p (rld[output_reload].rclass,
1831 rld[i].rclass = rld[output_reload].rclass;
1833 /* Transfer all replacements from the old reload to the combined. */
1834 for (j = 0; j < n_replacements; j++)
1835 if (replacements[j].what == output_reload)
1836 replacements[j].what = i;
1841 /* If this insn has only one operand that is modified or written (assumed
1842 to be the first), it must be the one corresponding to this reload. It
1843 is safe to use anything that dies in this insn for that output provided
1844 that it does not occur in the output (we already know it isn't an
1845 earlyclobber. If this is an asm insn, give up. */
1847 if (INSN_CODE (this_insn) == -1)
1850 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1851 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1852 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1855 /* See if some hard register that dies in this insn and is not used in
1856 the output is the right class. Only works if the register we pick
1857 up can fully hold our output reload. */
1858 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1859 if (REG_NOTE_KIND (note) == REG_DEAD
1860 && REG_P (XEXP (note, 0))
1861 && !reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1862 rld[output_reload].out)
1863 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1864 && HARD_REGNO_MODE_OK (regno, rld[output_reload].outmode)
1865 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].rclass],
1867 && (hard_regno_nregs[regno][rld[output_reload].outmode]
1868 <= hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))])
1869 /* Ensure that a secondary or tertiary reload for this output
1870 won't want this register. */
1871 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1872 || (!(TEST_HARD_REG_BIT
1873 (reg_class_contents[(int) rld[secondary_out].rclass], regno))
1874 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1875 || !(TEST_HARD_REG_BIT
1876 (reg_class_contents[(int) rld[secondary_out].rclass],
1878 && !fixed_regs[regno]
1879 /* Check that a former pseudo is valid; see find_dummy_reload. */
1880 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1881 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR),
1882 ORIGINAL_REGNO (XEXP (note, 0)))
1883 && hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))] == 1)))
1885 rld[output_reload].reg_rtx
1886 = gen_rtx_REG (rld[output_reload].outmode, regno);
1891 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1892 See if one of IN and OUT is a register that may be used;
1893 this is desirable since a spill-register won't be needed.
1894 If so, return the register rtx that proves acceptable.
1896 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1897 RCLASS is the register class required for the reload.
1899 If FOR_REAL is >= 0, it is the number of the reload,
1900 and in some cases when it can be discovered that OUT doesn't need
1901 to be computed, clear out rld[FOR_REAL].out.
1903 If FOR_REAL is -1, this should not be done, because this call
1904 is just to see if a register can be found, not to find and install it.
1906 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1907 puts an additional constraint on being able to use IN for OUT since
1908 IN must not appear elsewhere in the insn (it is assumed that IN itself
1909 is safe from the earlyclobber). */
1912 find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
1913 enum machine_mode inmode, enum machine_mode outmode,
1914 reg_class_t rclass, int for_real, int earlyclobber)
1922 /* If operands exceed a word, we can't use either of them
1923 unless they have the same size. */
1924 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1925 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1926 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1929 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1930 respectively refers to a hard register. */
1932 /* Find the inside of any subregs. */
1933 while (GET_CODE (out) == SUBREG)
1935 if (REG_P (SUBREG_REG (out))
1936 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1937 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1938 GET_MODE (SUBREG_REG (out)),
1941 out = SUBREG_REG (out);
1943 while (GET_CODE (in) == SUBREG)
1945 if (REG_P (SUBREG_REG (in))
1946 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1947 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1948 GET_MODE (SUBREG_REG (in)),
1951 in = SUBREG_REG (in);
1954 /* Narrow down the reg class, the same way push_reload will;
1955 otherwise we might find a dummy now, but push_reload won't. */
1957 reg_class_t preferred_class = targetm.preferred_reload_class (in, rclass);
1958 if (preferred_class != NO_REGS)
1959 rclass = (enum reg_class) preferred_class;
1962 /* See if OUT will do. */
1964 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1966 unsigned int regno = REGNO (out) + out_offset;
1967 unsigned int nwords = hard_regno_nregs[regno][outmode];
1970 /* When we consider whether the insn uses OUT,
1971 ignore references within IN. They don't prevent us
1972 from copying IN into OUT, because those refs would
1973 move into the insn that reloads IN.
1975 However, we only ignore IN in its role as this reload.
1976 If the insn uses IN elsewhere and it contains OUT,
1977 that counts. We can't be sure it's the "same" operand
1978 so it might not go through this reload. */
1980 *inloc = const0_rtx;
1982 if (regno < FIRST_PSEUDO_REGISTER
1983 && HARD_REGNO_MODE_OK (regno, outmode)
1984 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1985 PATTERN (this_insn), outloc))
1989 for (i = 0; i < nwords; i++)
1990 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
1996 if (REG_P (real_out))
1999 value = gen_rtx_REG (outmode, regno);
2006 /* Consider using IN if OUT was not acceptable
2007 or if OUT dies in this insn (like the quotient in a divmod insn).
2008 We can't use IN unless it is dies in this insn,
2009 which means we must know accurately which hard regs are live.
2010 Also, the result can't go in IN if IN is used within OUT,
2011 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
2012 if (hard_regs_live_known
2014 && REGNO (in) < FIRST_PSEUDO_REGISTER
2016 || find_reg_note (this_insn, REG_UNUSED, real_out))
2017 && find_reg_note (this_insn, REG_DEAD, real_in)
2018 && !fixed_regs[REGNO (in)]
2019 && HARD_REGNO_MODE_OK (REGNO (in),
2020 /* The only case where out and real_out might
2021 have different modes is where real_out
2022 is a subreg, and in that case, out
2024 (GET_MODE (out) != VOIDmode
2025 ? GET_MODE (out) : outmode))
2026 && (ORIGINAL_REGNO (in) < FIRST_PSEUDO_REGISTER
2027 /* However only do this if we can be sure that this input
2028 operand doesn't correspond with an uninitialized pseudo.
2029 global can assign some hardreg to it that is the same as
2030 the one assigned to a different, also live pseudo (as it
2031 can ignore the conflict). We must never introduce writes
2032 to such hardregs, as they would clobber the other live
2033 pseudo. See PR 20973. */
2034 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR),
2035 ORIGINAL_REGNO (in))
2036 /* Similarly, only do this if we can be sure that the death
2037 note is still valid. global can assign some hardreg to
2038 the pseudo referenced in the note and simultaneously a
2039 subword of this hardreg to a different, also live pseudo,
2040 because only another subword of the hardreg is actually
2041 used in the insn. This cannot happen if the pseudo has
2042 been assigned exactly one hardreg. See PR 33732. */
2043 && hard_regno_nregs[REGNO (in)][GET_MODE (in)] == 1)))
2045 unsigned int regno = REGNO (in) + in_offset;
2046 unsigned int nwords = hard_regno_nregs[regno][inmode];
2048 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
2049 && ! hard_reg_set_here_p (regno, regno + nwords,
2050 PATTERN (this_insn))
2052 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
2053 PATTERN (this_insn), inloc)))
2057 for (i = 0; i < nwords; i++)
2058 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
2064 /* If we were going to use OUT as the reload reg
2065 and changed our mind, it means OUT is a dummy that
2066 dies here. So don't bother copying value to it. */
2067 if (for_real >= 0 && value == real_out)
2068 rld[for_real].out = 0;
2069 if (REG_P (real_in))
2072 value = gen_rtx_REG (inmode, regno);
2080 /* This page contains subroutines used mainly for determining
2081 whether the IN or an OUT of a reload can serve as the
2084 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2087 earlyclobber_operand_p (rtx x)
2091 for (i = 0; i < n_earlyclobbers; i++)
2092 if (reload_earlyclobbers[i] == x)
2098 /* Return 1 if expression X alters a hard reg in the range
2099 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2100 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2101 X should be the body of an instruction. */
2104 hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x)
2106 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2108 rtx op0 = SET_DEST (x);
2110 while (GET_CODE (op0) == SUBREG)
2111 op0 = SUBREG_REG (op0);
2114 unsigned int r = REGNO (op0);
2116 /* See if this reg overlaps range under consideration. */
2118 && end_hard_regno (GET_MODE (op0), r) > beg_regno)
2122 else if (GET_CODE (x) == PARALLEL)
2124 int i = XVECLEN (x, 0) - 1;
2127 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2134 /* Return 1 if ADDR is a valid memory address for mode MODE
2135 in address space AS, and check that each pseudo reg has the
2136 proper kind of hard reg. */
2139 strict_memory_address_addr_space_p (enum machine_mode mode ATTRIBUTE_UNUSED,
2140 rtx addr, addr_space_t as)
2142 #ifdef GO_IF_LEGITIMATE_ADDRESS
2143 gcc_assert (ADDR_SPACE_GENERIC_P (as));
2144 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2150 return targetm.addr_space.legitimate_address_p (mode, addr, 1, as);
2154 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2155 if they are the same hard reg, and has special hacks for
2156 autoincrement and autodecrement.
2157 This is specifically intended for find_reloads to use
2158 in determining whether two operands match.
2159 X is the operand whose number is the lower of the two.
2161 The value is 2 if Y contains a pre-increment that matches
2162 a non-incrementing address in X. */
2164 /* ??? To be completely correct, we should arrange to pass
2165 for X the output operand and for Y the input operand.
2166 For now, we assume that the output operand has the lower number
2167 because that is natural in (SET output (... input ...)). */
2170 operands_match_p (rtx x, rtx y)
2173 RTX_CODE code = GET_CODE (x);
2179 if ((code == REG || (code == SUBREG && REG_P (SUBREG_REG (x))))
2180 && (REG_P (y) || (GET_CODE (y) == SUBREG
2181 && REG_P (SUBREG_REG (y)))))
2187 i = REGNO (SUBREG_REG (x));
2188 if (i >= FIRST_PSEUDO_REGISTER)
2190 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2191 GET_MODE (SUBREG_REG (x)),
2198 if (GET_CODE (y) == SUBREG)
2200 j = REGNO (SUBREG_REG (y));
2201 if (j >= FIRST_PSEUDO_REGISTER)
2203 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2204 GET_MODE (SUBREG_REG (y)),
2211 /* On a REG_WORDS_BIG_ENDIAN machine, point to the last register of a
2212 multiple hard register group of scalar integer registers, so that
2213 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2215 if (REG_WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2216 && SCALAR_INT_MODE_P (GET_MODE (x))
2217 && i < FIRST_PSEUDO_REGISTER)
2218 i += hard_regno_nregs[i][GET_MODE (x)] - 1;
2219 if (REG_WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2220 && SCALAR_INT_MODE_P (GET_MODE (y))
2221 && j < FIRST_PSEUDO_REGISTER)
2222 j += hard_regno_nregs[j][GET_MODE (y)] - 1;
2226 /* If two operands must match, because they are really a single
2227 operand of an assembler insn, then two postincrements are invalid
2228 because the assembler insn would increment only once.
2229 On the other hand, a postincrement matches ordinary indexing
2230 if the postincrement is the output operand. */
2231 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2232 return operands_match_p (XEXP (x, 0), y);
2233 /* Two preincrements are invalid
2234 because the assembler insn would increment only once.
2235 On the other hand, a preincrement matches ordinary indexing
2236 if the preincrement is the input operand.
2237 In this case, return 2, since some callers need to do special
2238 things when this happens. */
2239 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2240 || GET_CODE (y) == PRE_MODIFY)
2241 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2245 /* Now we have disposed of all the cases in which different rtx codes
2247 if (code != GET_CODE (y))
2250 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2251 if (GET_MODE (x) != GET_MODE (y))
2254 /* MEMs refering to different address space are not equivalent. */
2255 if (code == MEM && MEM_ADDR_SPACE (x) != MEM_ADDR_SPACE (y))
2266 return XEXP (x, 0) == XEXP (y, 0);
2268 return XSTR (x, 0) == XSTR (y, 0);
2274 /* Compare the elements. If any pair of corresponding elements
2275 fail to match, return 0 for the whole things. */
2278 fmt = GET_RTX_FORMAT (code);
2279 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2285 if (XWINT (x, i) != XWINT (y, i))
2290 if (XINT (x, i) != XINT (y, i))
2295 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2298 /* If any subexpression returns 2,
2299 we should return 2 if we are successful. */
2308 if (XVECLEN (x, i) != XVECLEN (y, i))
2310 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2312 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2320 /* It is believed that rtx's at this level will never
2321 contain anything but integers and other rtx's,
2322 except for within LABEL_REFs and SYMBOL_REFs. */
2327 return 1 + success_2;
2330 /* Describe the range of registers or memory referenced by X.
2331 If X is a register, set REG_FLAG and put the first register
2332 number into START and the last plus one into END.
2333 If X is a memory reference, put a base address into BASE
2334 and a range of integer offsets into START and END.
2335 If X is pushing on the stack, we can assume it causes no trouble,
2336 so we set the SAFE field. */
2338 static struct decomposition
2341 struct decomposition val;
2344 memset (&val, 0, sizeof (val));
2346 switch (GET_CODE (x))
2350 rtx base = NULL_RTX, offset = 0;
2351 rtx addr = XEXP (x, 0);
2353 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2354 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2356 val.base = XEXP (addr, 0);
2357 val.start = -GET_MODE_SIZE (GET_MODE (x));
2358 val.end = GET_MODE_SIZE (GET_MODE (x));
2359 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2363 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2365 if (GET_CODE (XEXP (addr, 1)) == PLUS
2366 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2367 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2369 val.base = XEXP (addr, 0);
2370 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2371 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2372 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2377 if (GET_CODE (addr) == CONST)
2379 addr = XEXP (addr, 0);
2382 if (GET_CODE (addr) == PLUS)
2384 if (CONSTANT_P (XEXP (addr, 0)))
2386 base = XEXP (addr, 1);
2387 offset = XEXP (addr, 0);
2389 else if (CONSTANT_P (XEXP (addr, 1)))
2391 base = XEXP (addr, 0);
2392 offset = XEXP (addr, 1);
2399 offset = const0_rtx;
2401 if (GET_CODE (offset) == CONST)
2402 offset = XEXP (offset, 0);
2403 if (GET_CODE (offset) == PLUS)
2405 if (CONST_INT_P (XEXP (offset, 0)))
2407 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2408 offset = XEXP (offset, 0);
2410 else if (CONST_INT_P (XEXP (offset, 1)))
2412 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2413 offset = XEXP (offset, 1);
2417 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2418 offset = const0_rtx;
2421 else if (!CONST_INT_P (offset))
2423 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2424 offset = const0_rtx;
2427 if (all_const && GET_CODE (base) == PLUS)
2428 base = gen_rtx_CONST (GET_MODE (base), base);
2430 gcc_assert (CONST_INT_P (offset));
2432 val.start = INTVAL (offset);
2433 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2440 val.start = true_regnum (x);
2441 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2443 /* A pseudo with no hard reg. */
2444 val.start = REGNO (x);
2445 val.end = val.start + 1;
2449 val.end = end_hard_regno (GET_MODE (x), val.start);
2453 if (!REG_P (SUBREG_REG (x)))
2454 /* This could be more precise, but it's good enough. */
2455 return decompose (SUBREG_REG (x));
2457 val.start = true_regnum (x);
2458 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2459 return decompose (SUBREG_REG (x));
2462 val.end = val.start + subreg_nregs (x);
2466 /* This hasn't been assigned yet, so it can't conflict yet. */
2471 gcc_assert (CONSTANT_P (x));
2478 /* Return 1 if altering Y will not modify the value of X.
2479 Y is also described by YDATA, which should be decompose (Y). */
2482 immune_p (rtx x, rtx y, struct decomposition ydata)
2484 struct decomposition xdata;
2487 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2491 gcc_assert (MEM_P (y));
2492 /* If Y is memory and X is not, Y can't affect X. */
2496 xdata = decompose (x);
2498 if (! rtx_equal_p (xdata.base, ydata.base))
2500 /* If bases are distinct symbolic constants, there is no overlap. */
2501 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2503 /* Constants and stack slots never overlap. */
2504 if (CONSTANT_P (xdata.base)
2505 && (ydata.base == frame_pointer_rtx
2506 || ydata.base == hard_frame_pointer_rtx
2507 || ydata.base == stack_pointer_rtx))
2509 if (CONSTANT_P (ydata.base)
2510 && (xdata.base == frame_pointer_rtx
2511 || xdata.base == hard_frame_pointer_rtx
2512 || xdata.base == stack_pointer_rtx))
2514 /* If either base is variable, we don't know anything. */
2518 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2521 /* Similar, but calls decompose. */
2524 safe_from_earlyclobber (rtx op, rtx clobber)
2526 struct decomposition early_data;
2528 early_data = decompose (clobber);
2529 return immune_p (op, clobber, early_data);
2532 /* Main entry point of this file: search the body of INSN
2533 for values that need reloading and record them with push_reload.
2534 REPLACE nonzero means record also where the values occur
2535 so that subst_reloads can be used.
2537 IND_LEVELS says how many levels of indirection are supported by this
2538 machine; a value of zero means that a memory reference is not a valid
2541 LIVE_KNOWN says we have valid information about which hard
2542 regs are live at each point in the program; this is true when
2543 we are called from global_alloc but false when stupid register
2544 allocation has been done.
2546 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2547 which is nonnegative if the reg has been commandeered for reloading into.
2548 It is copied into STATIC_RELOAD_REG_P and referenced from there
2549 by various subroutines.
2551 Return TRUE if some operands need to be changed, because of swapping
2552 commutative operands, reg_equiv_address substitution, or whatever. */
2555 find_reloads (rtx insn, int replace, int ind_levels, int live_known,
2556 short *reload_reg_p)
2558 int insn_code_number;
2561 /* These start out as the constraints for the insn
2562 and they are chewed up as we consider alternatives. */
2563 const char *constraints[MAX_RECOG_OPERANDS];
2564 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2566 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2567 char pref_or_nothing[MAX_RECOG_OPERANDS];
2568 /* Nonzero for a MEM operand whose entire address needs a reload.
2569 May be -1 to indicate the entire address may or may not need a reload. */
2570 int address_reloaded[MAX_RECOG_OPERANDS];
2571 /* Nonzero for an address operand that needs to be completely reloaded.
2572 May be -1 to indicate the entire operand may or may not need a reload. */
2573 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2574 /* Value of enum reload_type to use for operand. */
2575 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2576 /* Value of enum reload_type to use within address of operand. */
2577 enum reload_type address_type[MAX_RECOG_OPERANDS];
2578 /* Save the usage of each operand. */
2579 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2580 int no_input_reloads = 0, no_output_reloads = 0;
2582 reg_class_t this_alternative[MAX_RECOG_OPERANDS];
2583 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2584 char this_alternative_win[MAX_RECOG_OPERANDS];
2585 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2586 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2587 int this_alternative_matches[MAX_RECOG_OPERANDS];
2589 reg_class_t goal_alternative[MAX_RECOG_OPERANDS];
2590 int this_alternative_number;
2591 int goal_alternative_number = 0;
2592 int operand_reloadnum[MAX_RECOG_OPERANDS];
2593 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2594 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2595 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2596 char goal_alternative_win[MAX_RECOG_OPERANDS];
2597 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2598 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2599 int goal_alternative_swapped;
2602 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2603 rtx substed_operand[MAX_RECOG_OPERANDS];
2604 rtx body = PATTERN (insn);
2605 rtx set = single_set (insn);
2606 int goal_earlyclobber = 0, this_earlyclobber;
2607 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2613 n_earlyclobbers = 0;
2614 replace_reloads = replace;
2615 hard_regs_live_known = live_known;
2616 static_reload_reg_p = reload_reg_p;
2618 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2619 neither are insns that SET cc0. Insns that use CC0 are not allowed
2620 to have any input reloads. */
2621 if (JUMP_P (insn) || CALL_P (insn))
2622 no_output_reloads = 1;
2625 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2626 no_input_reloads = 1;
2627 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2628 no_output_reloads = 1;
2631 #ifdef SECONDARY_MEMORY_NEEDED
2632 /* The eliminated forms of any secondary memory locations are per-insn, so
2633 clear them out here. */
2635 if (secondary_memlocs_elim_used)
2637 memset (secondary_memlocs_elim, 0,
2638 sizeof (secondary_memlocs_elim[0]) * secondary_memlocs_elim_used);
2639 secondary_memlocs_elim_used = 0;
2643 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2644 is cheap to move between them. If it is not, there may not be an insn
2645 to do the copy, so we may need a reload. */
2646 if (GET_CODE (body) == SET
2647 && REG_P (SET_DEST (body))
2648 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2649 && REG_P (SET_SRC (body))
2650 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2651 && register_move_cost (GET_MODE (SET_SRC (body)),
2652 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2653 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2656 extract_insn (insn);
2658 noperands = reload_n_operands = recog_data.n_operands;
2659 n_alternatives = recog_data.n_alternatives;
2661 /* Just return "no reloads" if insn has no operands with constraints. */
2662 if (noperands == 0 || n_alternatives == 0)
2665 insn_code_number = INSN_CODE (insn);
2666 this_insn_is_asm = insn_code_number < 0;
2668 memcpy (operand_mode, recog_data.operand_mode,
2669 noperands * sizeof (enum machine_mode));
2670 memcpy (constraints, recog_data.constraints,
2671 noperands * sizeof (const char *));
2675 /* If we will need to know, later, whether some pair of operands
2676 are the same, we must compare them now and save the result.
2677 Reloading the base and index registers will clobber them
2678 and afterward they will fail to match. */
2680 for (i = 0; i < noperands; i++)
2686 substed_operand[i] = recog_data.operand[i];
2689 modified[i] = RELOAD_READ;
2691 /* Scan this operand's constraint to see if it is an output operand,
2692 an in-out operand, is commutative, or should match another. */
2696 p += CONSTRAINT_LEN (c, p);
2700 modified[i] = RELOAD_WRITE;
2703 modified[i] = RELOAD_READ_WRITE;
2707 /* The last operand should not be marked commutative. */
2708 gcc_assert (i != noperands - 1);
2710 /* We currently only support one commutative pair of
2711 operands. Some existing asm code currently uses more
2712 than one pair. Previously, that would usually work,
2713 but sometimes it would crash the compiler. We
2714 continue supporting that case as well as we can by
2715 silently ignoring all but the first pair. In the
2716 future we may handle it correctly. */
2717 if (commutative < 0)
2720 gcc_assert (this_insn_is_asm);
2723 /* Use of ISDIGIT is tempting here, but it may get expensive because
2724 of locale support we don't want. */
2725 case '0': case '1': case '2': case '3': case '4':
2726 case '5': case '6': case '7': case '8': case '9':
2728 c = strtoul (p - 1, &end, 10);
2731 operands_match[c][i]
2732 = operands_match_p (recog_data.operand[c],
2733 recog_data.operand[i]);
2735 /* An operand may not match itself. */
2736 gcc_assert (c != i);
2738 /* If C can be commuted with C+1, and C might need to match I,
2739 then C+1 might also need to match I. */
2740 if (commutative >= 0)
2742 if (c == commutative || c == commutative + 1)
2744 int other = c + (c == commutative ? 1 : -1);
2745 operands_match[other][i]
2746 = operands_match_p (recog_data.operand[other],
2747 recog_data.operand[i]);
2749 if (i == commutative || i == commutative + 1)
2751 int other = i + (i == commutative ? 1 : -1);
2752 operands_match[c][other]
2753 = operands_match_p (recog_data.operand[c],
2754 recog_data.operand[other]);
2756 /* Note that C is supposed to be less than I.
2757 No need to consider altering both C and I because in
2758 that case we would alter one into the other. */
2765 /* Examine each operand that is a memory reference or memory address
2766 and reload parts of the addresses into index registers.
2767 Also here any references to pseudo regs that didn't get hard regs
2768 but are equivalent to constants get replaced in the insn itself
2769 with those constants. Nobody will ever see them again.
2771 Finally, set up the preferred classes of each operand. */
2773 for (i = 0; i < noperands; i++)
2775 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2777 address_reloaded[i] = 0;
2778 address_operand_reloaded[i] = 0;
2779 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2780 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2783 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2784 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2787 if (*constraints[i] == 0)
2788 /* Ignore things like match_operator operands. */
2790 else if (constraints[i][0] == 'p'
2791 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
2793 address_operand_reloaded[i]
2794 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2795 recog_data.operand[i],
2796 recog_data.operand_loc[i],
2797 i, operand_type[i], ind_levels, insn);
2799 /* If we now have a simple operand where we used to have a
2800 PLUS or MULT, re-recognize and try again. */
2801 if ((OBJECT_P (*recog_data.operand_loc[i])
2802 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2803 && (GET_CODE (recog_data.operand[i]) == MULT
2804 || GET_CODE (recog_data.operand[i]) == PLUS))
2806 INSN_CODE (insn) = -1;
2807 retval = find_reloads (insn, replace, ind_levels, live_known,
2812 recog_data.operand[i] = *recog_data.operand_loc[i];
2813 substed_operand[i] = recog_data.operand[i];
2815 /* Address operands are reloaded in their existing mode,
2816 no matter what is specified in the machine description. */
2817 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2819 /* If the address is a single CONST_INT pick address mode
2820 instead otherwise we will later not know in which mode
2821 the reload should be performed. */
2822 if (operand_mode[i] == VOIDmode)
2823 operand_mode[i] = Pmode;
2826 else if (code == MEM)
2829 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2830 recog_data.operand_loc[i],
2831 XEXP (recog_data.operand[i], 0),
2832 &XEXP (recog_data.operand[i], 0),
2833 i, address_type[i], ind_levels, insn);
2834 recog_data.operand[i] = *recog_data.operand_loc[i];
2835 substed_operand[i] = recog_data.operand[i];
2837 else if (code == SUBREG)
2839 rtx reg = SUBREG_REG (recog_data.operand[i]);
2841 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2844 && &SET_DEST (set) == recog_data.operand_loc[i],
2846 &address_reloaded[i]);
2848 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2849 that didn't get a hard register, emit a USE with a REG_EQUAL
2850 note in front so that we might inherit a previous, possibly
2856 && (GET_MODE_SIZE (GET_MODE (reg))
2857 >= GET_MODE_SIZE (GET_MODE (op)))
2858 && reg_equiv_constant (REGNO (reg)) == 0)
2859 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2861 REG_EQUAL, reg_equiv_memory_loc (REGNO (reg)));
2863 substed_operand[i] = recog_data.operand[i] = op;
2865 else if (code == PLUS || GET_RTX_CLASS (code) == RTX_UNARY)
2866 /* We can get a PLUS as an "operand" as a result of register
2867 elimination. See eliminate_regs and gen_reload. We handle
2868 a unary operator by reloading the operand. */
2869 substed_operand[i] = recog_data.operand[i]
2870 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2871 ind_levels, 0, insn,
2872 &address_reloaded[i]);
2873 else if (code == REG)
2875 /* This is equivalent to calling find_reloads_toplev.
2876 The code is duplicated for speed.
2877 When we find a pseudo always equivalent to a constant,
2878 we replace it by the constant. We must be sure, however,
2879 that we don't try to replace it in the insn in which it
2881 int regno = REGNO (recog_data.operand[i]);
2882 if (reg_equiv_constant (regno) != 0
2883 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2885 /* Record the existing mode so that the check if constants are
2886 allowed will work when operand_mode isn't specified. */
2888 if (operand_mode[i] == VOIDmode)
2889 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2891 substed_operand[i] = recog_data.operand[i]
2892 = reg_equiv_constant (regno);
2894 if (reg_equiv_memory_loc (regno) != 0
2895 && (reg_equiv_address (regno) != 0 || num_not_at_initial_offset))
2896 /* We need not give a valid is_set_dest argument since the case
2897 of a constant equivalence was checked above. */
2898 substed_operand[i] = recog_data.operand[i]
2899 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2900 ind_levels, 0, insn,
2901 &address_reloaded[i]);
2903 /* If the operand is still a register (we didn't replace it with an
2904 equivalent), get the preferred class to reload it into. */
2905 code = GET_CODE (recog_data.operand[i]);
2907 = ((code == REG && REGNO (recog_data.operand[i])
2908 >= FIRST_PSEUDO_REGISTER)
2909 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2913 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2914 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2917 /* If this is simply a copy from operand 1 to operand 0, merge the
2918 preferred classes for the operands. */
2919 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2920 && recog_data.operand[1] == SET_SRC (set))
2922 preferred_class[0] = preferred_class[1]
2923 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2924 pref_or_nothing[0] |= pref_or_nothing[1];
2925 pref_or_nothing[1] |= pref_or_nothing[0];
2928 /* Now see what we need for pseudo-regs that didn't get hard regs
2929 or got the wrong kind of hard reg. For this, we must consider
2930 all the operands together against the register constraints. */
2932 best = MAX_RECOG_OPERANDS * 2 + 600;
2935 goal_alternative_swapped = 0;
2938 /* The constraints are made of several alternatives.
2939 Each operand's constraint looks like foo,bar,... with commas
2940 separating the alternatives. The first alternatives for all
2941 operands go together, the second alternatives go together, etc.
2943 First loop over alternatives. */
2945 for (this_alternative_number = 0;
2946 this_alternative_number < n_alternatives;
2947 this_alternative_number++)
2949 /* Loop over operands for one constraint alternative. */
2950 /* LOSERS counts those that don't fit this alternative
2951 and would require loading. */
2953 /* BAD is set to 1 if it some operand can't fit this alternative
2954 even after reloading. */
2956 /* REJECT is a count of how undesirable this alternative says it is
2957 if any reloading is required. If the alternative matches exactly
2958 then REJECT is ignored, but otherwise it gets this much
2959 counted against it in addition to the reloading needed. Each
2960 ? counts three times here since we want the disparaging caused by
2961 a bad register class to only count 1/3 as much. */
2964 if (!recog_data.alternative_enabled_p[this_alternative_number])
2968 for (i = 0; i < recog_data.n_operands; i++)
2969 constraints[i] = skip_alternative (constraints[i]);
2974 this_earlyclobber = 0;
2976 for (i = 0; i < noperands; i++)
2978 const char *p = constraints[i];
2983 /* 0 => this operand can be reloaded somehow for this alternative. */
2985 /* 0 => this operand can be reloaded if the alternative allows regs. */
2989 rtx operand = recog_data.operand[i];
2991 /* Nonzero means this is a MEM that must be reloaded into a reg
2992 regardless of what the constraint says. */
2993 int force_reload = 0;
2995 /* Nonzero if a constant forced into memory would be OK for this
2998 int earlyclobber = 0;
3000 /* If the predicate accepts a unary operator, it means that
3001 we need to reload the operand, but do not do this for
3002 match_operator and friends. */
3003 if (UNARY_P (operand) && *p != 0)
3004 operand = XEXP (operand, 0);
3006 /* If the operand is a SUBREG, extract
3007 the REG or MEM (or maybe even a constant) within.
3008 (Constants can occur as a result of reg_equiv_constant.) */
3010 while (GET_CODE (operand) == SUBREG)
3012 /* Offset only matters when operand is a REG and
3013 it is a hard reg. This is because it is passed
3014 to reg_fits_class_p if it is a REG and all pseudos
3015 return 0 from that function. */
3016 if (REG_P (SUBREG_REG (operand))
3017 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
3019 if (simplify_subreg_regno (REGNO (SUBREG_REG (operand)),
3020 GET_MODE (SUBREG_REG (operand)),
3021 SUBREG_BYTE (operand),
3022 GET_MODE (operand)) < 0)
3024 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
3025 GET_MODE (SUBREG_REG (operand)),
3026 SUBREG_BYTE (operand),
3027 GET_MODE (operand));
3029 operand = SUBREG_REG (operand);
3030 /* Force reload if this is a constant or PLUS or if there may
3031 be a problem accessing OPERAND in the outer mode. */
3032 if (CONSTANT_P (operand)
3033 || GET_CODE (operand) == PLUS
3034 /* We must force a reload of paradoxical SUBREGs
3035 of a MEM because the alignment of the inner value
3036 may not be enough to do the outer reference. On
3037 big-endian machines, it may also reference outside
3040 On machines that extend byte operations and we have a
3041 SUBREG where both the inner and outer modes are no wider
3042 than a word and the inner mode is narrower, is integral,
3043 and gets extended when loaded from memory, combine.c has
3044 made assumptions about the behavior of the machine in such
3045 register access. If the data is, in fact, in memory we
3046 must always load using the size assumed to be in the
3047 register and let the insn do the different-sized
3050 This is doubly true if WORD_REGISTER_OPERATIONS. In
3051 this case eliminate_regs has left non-paradoxical
3052 subregs for push_reload to see. Make sure it does
3053 by forcing the reload.
3055 ??? When is it right at this stage to have a subreg
3056 of a mem that is _not_ to be handled specially? IMO
3057 those should have been reduced to just a mem. */
3058 || ((MEM_P (operand)
3060 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3061 #ifndef WORD_REGISTER_OPERATIONS
3062 && (((GET_MODE_BITSIZE (GET_MODE (operand))
3063 < BIGGEST_ALIGNMENT)
3064 && (GET_MODE_SIZE (operand_mode[i])
3065 > GET_MODE_SIZE (GET_MODE (operand))))
3067 #ifdef LOAD_EXTEND_OP
3068 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3069 && (GET_MODE_SIZE (GET_MODE (operand))
3071 && (GET_MODE_SIZE (operand_mode[i])
3072 > GET_MODE_SIZE (GET_MODE (operand)))
3073 && INTEGRAL_MODE_P (GET_MODE (operand))
3074 && LOAD_EXTEND_OP (GET_MODE (operand)) != UNKNOWN)
3083 this_alternative[i] = NO_REGS;
3084 this_alternative_win[i] = 0;
3085 this_alternative_match_win[i] = 0;
3086 this_alternative_offmemok[i] = 0;
3087 this_alternative_earlyclobber[i] = 0;
3088 this_alternative_matches[i] = -1;
3090 /* An empty constraint or empty alternative
3091 allows anything which matched the pattern. */
3092 if (*p == 0 || *p == ',')
3095 /* Scan this alternative's specs for this operand;
3096 set WIN if the operand fits any letter in this alternative.
3097 Otherwise, clear BADOP if this operand could
3098 fit some letter after reloads,
3099 or set WINREG if this operand could fit after reloads
3100 provided the constraint allows some registers. */
3103 switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
3112 case '=': case '+': case '*':
3116 /* We only support one commutative marker, the first
3117 one. We already set commutative above. */
3129 /* Ignore rest of this alternative as far as
3130 reloading is concerned. */
3133 while (*p && *p != ',');
3137 case '0': case '1': case '2': case '3': case '4':
3138 case '5': case '6': case '7': case '8': case '9':
3139 m = strtoul (p, &end, 10);
3143 this_alternative_matches[i] = m;
3144 /* We are supposed to match a previous operand.
3145 If we do, we win if that one did.
3146 If we do not, count both of the operands as losers.
3147 (This is too conservative, since most of the time
3148 only a single reload insn will be needed to make
3149 the two operands win. As a result, this alternative
3150 may be rejected when it is actually desirable.) */
3151 if ((swapped && (m != commutative || i != commutative + 1))
3152 /* If we are matching as if two operands were swapped,
3153 also pretend that operands_match had been computed
3155 But if I is the second of those and C is the first,
3156 don't exchange them, because operands_match is valid
3157 only on one side of its diagonal. */
3159 [(m == commutative || m == commutative + 1)
3160 ? 2 * commutative + 1 - m : m]
3161 [(i == commutative || i == commutative + 1)
3162 ? 2 * commutative + 1 - i : i])
3163 : operands_match[m][i])
3165 /* If we are matching a non-offsettable address where an
3166 offsettable address was expected, then we must reject
3167 this combination, because we can't reload it. */
3168 if (this_alternative_offmemok[m]
3169 && MEM_P (recog_data.operand[m])
3170 && this_alternative[m] == NO_REGS
3171 && ! this_alternative_win[m])
3174 did_match = this_alternative_win[m];
3178 /* Operands don't match. */
3181 /* Retroactively mark the operand we had to match
3182 as a loser, if it wasn't already. */
3183 if (this_alternative_win[m])
3185 this_alternative_win[m] = 0;
3186 if (this_alternative[m] == NO_REGS)
3188 /* But count the pair only once in the total badness of
3189 this alternative, if the pair can be a dummy reload.
3190 The pointers in operand_loc are not swapped; swap
3191 them by hand if necessary. */
3192 if (swapped && i == commutative)
3193 loc1 = commutative + 1;
3194 else if (swapped && i == commutative + 1)
3198 if (swapped && m == commutative)
3199 loc2 = commutative + 1;
3200 else if (swapped && m == commutative + 1)
3205 = find_dummy_reload (recog_data.operand[i],
3206 recog_data.operand[m],
3207 recog_data.operand_loc[loc1],
3208 recog_data.operand_loc[loc2],
3209 operand_mode[i], operand_mode[m],
3210 this_alternative[m], -1,
3211 this_alternative_earlyclobber[m]);
3216 /* This can be fixed with reloads if the operand
3217 we are supposed to match can be fixed with reloads. */
3219 this_alternative[i] = this_alternative[m];
3221 /* If we have to reload this operand and some previous
3222 operand also had to match the same thing as this
3223 operand, we don't know how to do that. So reject this
3225 if (! did_match || force_reload)
3226 for (j = 0; j < i; j++)
3227 if (this_alternative_matches[j]
3228 == this_alternative_matches[i])
3233 /* All necessary reloads for an address_operand
3234 were handled in find_reloads_address. */
3235 this_alternative[i] = base_reg_class (VOIDmode, ADDRESS,
3241 case TARGET_MEM_CONSTRAINT:
3246 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3247 && reg_renumber[REGNO (operand)] < 0))
3249 if (CONST_POOL_OK_P (operand_mode[i], operand))
3256 && ! address_reloaded[i]
3257 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3258 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3264 && ! address_reloaded[i]
3265 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3266 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3270 /* Memory operand whose address is not offsettable. */
3275 && ! (ind_levels ? offsettable_memref_p (operand)
3276 : offsettable_nonstrict_memref_p (operand))
3277 /* Certain mem addresses will become offsettable
3278 after they themselves are reloaded. This is important;
3279 we don't want our own handling of unoffsettables
3280 to override the handling of reg_equiv_address. */
3281 && !(REG_P (XEXP (operand, 0))
3283 || reg_equiv_address (REGNO (XEXP (operand, 0))) != 0)))
3287 /* Memory operand whose address is offsettable. */
3291 if ((MEM_P (operand)
3292 /* If IND_LEVELS, find_reloads_address won't reload a
3293 pseudo that didn't get a hard reg, so we have to
3294 reject that case. */
3295 && ((ind_levels ? offsettable_memref_p (operand)
3296 : offsettable_nonstrict_memref_p (operand))
3297 /* A reloaded address is offsettable because it is now
3298 just a simple register indirect. */
3299 || address_reloaded[i] == 1))
3301 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3302 && reg_renumber[REGNO (operand)] < 0
3303 /* If reg_equiv_address is nonzero, we will be
3304 loading it into a register; hence it will be
3305 offsettable, but we cannot say that reg_equiv_mem
3306 is offsettable without checking. */
3307 && ((reg_equiv_mem (REGNO (operand)) != 0
3308 && offsettable_memref_p (reg_equiv_mem (REGNO (operand))))
3309 || (reg_equiv_address (REGNO (operand)) != 0))))
3311 if (CONST_POOL_OK_P (operand_mode[i], operand)
3319 /* Output operand that is stored before the need for the
3320 input operands (and their index registers) is over. */
3321 earlyclobber = 1, this_earlyclobber = 1;
3326 if (GET_CODE (operand) == CONST_DOUBLE
3327 || (GET_CODE (operand) == CONST_VECTOR
3328 && (GET_MODE_CLASS (GET_MODE (operand))
3329 == MODE_VECTOR_FLOAT)))
3335 if (GET_CODE (operand) == CONST_DOUBLE
3336 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand, c, p))
3341 if (CONST_INT_P (operand)
3342 || (GET_CODE (operand) == CONST_DOUBLE
3343 && GET_MODE (operand) == VOIDmode))
3346 if (CONSTANT_P (operand)
3347 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)))
3352 if (CONST_INT_P (operand)
3353 || (GET_CODE (operand) == CONST_DOUBLE
3354 && GET_MODE (operand) == VOIDmode))
3366 if (CONST_INT_P (operand)
3367 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand), c, p))
3378 /* A PLUS is never a valid operand, but reload can make
3379 it from a register when eliminating registers. */
3380 && GET_CODE (operand) != PLUS
3381 /* A SCRATCH is not a valid operand. */
3382 && GET_CODE (operand) != SCRATCH
3383 && (! CONSTANT_P (operand)
3385 || LEGITIMATE_PIC_OPERAND_P (operand))
3386 && (GENERAL_REGS == ALL_REGS
3388 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3389 && reg_renumber[REGNO (operand)] < 0)))
3391 /* Drop through into 'r' case. */
3395 = reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3399 if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
3401 #ifdef EXTRA_CONSTRAINT_STR
3402 if (EXTRA_MEMORY_CONSTRAINT (c, p))
3406 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3408 /* If the address was already reloaded,
3410 else if (MEM_P (operand)
3411 && address_reloaded[i] == 1)
3413 /* Likewise if the address will be reloaded because
3414 reg_equiv_address is nonzero. For reg_equiv_mem
3415 we have to check. */
3416 else if (REG_P (operand)
3417 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3418 && reg_renumber[REGNO (operand)] < 0
3419 && ((reg_equiv_mem (REGNO (operand)) != 0
3420 && EXTRA_CONSTRAINT_STR (reg_equiv_mem (REGNO (operand)), c, p))
3421 || (reg_equiv_address (REGNO (operand)) != 0)))
3424 /* If we didn't already win, we can reload
3425 constants via force_const_mem, and other
3426 MEMs by reloading the address like for 'o'. */
3427 if (CONST_POOL_OK_P (operand_mode[i], operand)
3434 if (EXTRA_ADDRESS_CONSTRAINT (c, p))
3436 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3439 /* If we didn't already win, we can reload
3440 the address into a base register. */
3441 this_alternative[i] = base_reg_class (VOIDmode,
3448 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3455 = (reg_class_subunion
3456 [this_alternative[i]]
3457 [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]);
3459 if (GET_MODE (operand) == BLKmode)
3463 && reg_fits_class_p (operand, this_alternative[i],
3464 offset, GET_MODE (recog_data.operand[i])))
3468 while ((p += len), c);
3472 /* If this operand could be handled with a reg,
3473 and some reg is allowed, then this operand can be handled. */
3474 if (winreg && this_alternative[i] != NO_REGS
3475 && (win || !class_only_fixed_regs[this_alternative[i]]))
3478 /* Record which operands fit this alternative. */
3479 this_alternative_earlyclobber[i] = earlyclobber;
3480 if (win && ! force_reload)
3481 this_alternative_win[i] = 1;
3482 else if (did_match && ! force_reload)
3483 this_alternative_match_win[i] = 1;
3486 int const_to_mem = 0;
3488 this_alternative_offmemok[i] = offmemok;
3492 /* Alternative loses if it has no regs for a reg operand. */
3494 && this_alternative[i] == NO_REGS
3495 && this_alternative_matches[i] < 0)
3498 /* If this is a constant that is reloaded into the desired
3499 class by copying it to memory first, count that as another
3500 reload. This is consistent with other code and is
3501 required to avoid choosing another alternative when
3502 the constant is moved into memory by this function on
3503 an early reload pass. Note that the test here is
3504 precisely the same as in the code below that calls
3506 if (CONST_POOL_OK_P (operand_mode[i], operand)
3507 && ((targetm.preferred_reload_class (operand,
3508 this_alternative[i])
3510 || no_input_reloads))
3513 if (this_alternative[i] != NO_REGS)
3517 /* Alternative loses if it requires a type of reload not
3518 permitted for this insn. We can always reload SCRATCH
3519 and objects with a REG_UNUSED note. */
3520 if (GET_CODE (operand) != SCRATCH
3521 && modified[i] != RELOAD_READ && no_output_reloads
3522 && ! find_reg_note (insn, REG_UNUSED, operand))
3524 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3528 /* If we can't reload this value at all, reject this
3529 alternative. Note that we could also lose due to
3530 LIMIT_RELOAD_CLASS, but we don't check that
3533 if (! CONSTANT_P (operand) && this_alternative[i] != NO_REGS)
3535 if (targetm.preferred_reload_class (operand, this_alternative[i])
3539 if (operand_type[i] == RELOAD_FOR_OUTPUT
3540 && (targetm.preferred_output_reload_class (operand,
3541 this_alternative[i])
3546 /* We prefer to reload pseudos over reloading other things,
3547 since such reloads may be able to be eliminated later.
3548 If we are reloading a SCRATCH, we won't be generating any
3549 insns, just using a register, so it is also preferred.
3550 So bump REJECT in other cases. Don't do this in the
3551 case where we are forcing a constant into memory and
3552 it will then win since we don't want to have a different
3553 alternative match then. */
3554 if (! (REG_P (operand)
3555 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3556 && GET_CODE (operand) != SCRATCH
3557 && ! (const_to_mem && constmemok))
3560 /* Input reloads can be inherited more often than output
3561 reloads can be removed, so penalize output reloads. */
3562 if (operand_type[i] != RELOAD_FOR_INPUT
3563 && GET_CODE (operand) != SCRATCH)
3567 /* If this operand is a pseudo register that didn't get a hard
3568 reg and this alternative accepts some register, see if the
3569 class that we want is a subset of the preferred class for this
3570 register. If not, but it intersects that class, use the
3571 preferred class instead. If it does not intersect the preferred
3572 class, show that usage of this alternative should be discouraged;
3573 it will be discouraged more still if the register is `preferred
3574 or nothing'. We do this because it increases the chance of
3575 reusing our spill register in a later insn and avoiding a pair
3576 of memory stores and loads.
3578 Don't bother with this if this alternative will accept this
3581 Don't do this for a multiword operand, since it is only a
3582 small win and has the risk of requiring more spill registers,
3583 which could cause a large loss.
3585 Don't do this if the preferred class has only one register
3586 because we might otherwise exhaust the class. */
3588 if (! win && ! did_match
3589 && this_alternative[i] != NO_REGS
3590 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3591 && reg_class_size [(int) preferred_class[i]] > 0
3592 && ! small_register_class_p (preferred_class[i]))
3594 if (! reg_class_subset_p (this_alternative[i],
3595 preferred_class[i]))
3597 /* Since we don't have a way of forming the intersection,
3598 we just do something special if the preferred class
3599 is a subset of the class we have; that's the most
3600 common case anyway. */
3601 if (reg_class_subset_p (preferred_class[i],
3602 this_alternative[i]))
3603 this_alternative[i] = preferred_class[i];
3605 reject += (2 + 2 * pref_or_nothing[i]);
3610 /* Now see if any output operands that are marked "earlyclobber"
3611 in this alternative conflict with any input operands
3612 or any memory addresses. */
3614 for (i = 0; i < noperands; i++)
3615 if (this_alternative_earlyclobber[i]
3616 && (this_alternative_win[i] || this_alternative_match_win[i]))
3618 struct decomposition early_data;
3620 early_data = decompose (recog_data.operand[i]);
3622 gcc_assert (modified[i] != RELOAD_READ);
3624 if (this_alternative[i] == NO_REGS)
3626 this_alternative_earlyclobber[i] = 0;
3627 gcc_assert (this_insn_is_asm);
3628 error_for_asm (this_insn,
3629 "%<&%> constraint used with no register class");
3632 for (j = 0; j < noperands; j++)
3633 /* Is this an input operand or a memory ref? */
3634 if ((MEM_P (recog_data.operand[j])
3635 || modified[j] != RELOAD_WRITE)
3637 /* Ignore things like match_operator operands. */
3638 && !recog_data.is_operator[j]
3639 /* Don't count an input operand that is constrained to match
3640 the early clobber operand. */
3641 && ! (this_alternative_matches[j] == i
3642 && rtx_equal_p (recog_data.operand[i],
3643 recog_data.operand[j]))
3644 /* Is it altered by storing the earlyclobber operand? */
3645 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3648 /* If the output is in a non-empty few-regs class,
3649 it's costly to reload it, so reload the input instead. */
3650 if (small_register_class_p (this_alternative[i])
3651 && (REG_P (recog_data.operand[j])
3652 || GET_CODE (recog_data.operand[j]) == SUBREG))
3655 this_alternative_win[j] = 0;
3656 this_alternative_match_win[j] = 0;
3661 /* If an earlyclobber operand conflicts with something,
3662 it must be reloaded, so request this and count the cost. */
3666 this_alternative_win[i] = 0;
3667 this_alternative_match_win[j] = 0;
3668 for (j = 0; j < noperands; j++)
3669 if (this_alternative_matches[j] == i
3670 && this_alternative_match_win[j])
3672 this_alternative_win[j] = 0;
3673 this_alternative_match_win[j] = 0;
3679 /* If one alternative accepts all the operands, no reload required,
3680 choose that alternative; don't consider the remaining ones. */
3683 /* Unswap these so that they are never swapped at `finish'. */
3684 if (commutative >= 0)
3686 recog_data.operand[commutative] = substed_operand[commutative];
3687 recog_data.operand[commutative + 1]
3688 = substed_operand[commutative + 1];
3690 for (i = 0; i < noperands; i++)
3692 goal_alternative_win[i] = this_alternative_win[i];
3693 goal_alternative_match_win[i] = this_alternative_match_win[i];
3694 goal_alternative[i] = this_alternative[i];
3695 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3696 goal_alternative_matches[i] = this_alternative_matches[i];
3697 goal_alternative_earlyclobber[i]
3698 = this_alternative_earlyclobber[i];
3700 goal_alternative_number = this_alternative_number;
3701 goal_alternative_swapped = swapped;
3702 goal_earlyclobber = this_earlyclobber;
3706 /* REJECT, set by the ! and ? constraint characters and when a register
3707 would be reloaded into a non-preferred class, discourages the use of
3708 this alternative for a reload goal. REJECT is incremented by six
3709 for each ? and two for each non-preferred class. */
3710 losers = losers * 6 + reject;
3712 /* If this alternative can be made to work by reloading,
3713 and it needs less reloading than the others checked so far,
3714 record it as the chosen goal for reloading. */
3719 for (i = 0; i < noperands; i++)
3721 goal_alternative[i] = this_alternative[i];
3722 goal_alternative_win[i] = this_alternative_win[i];
3723 goal_alternative_match_win[i]
3724 = this_alternative_match_win[i];
3725 goal_alternative_offmemok[i]
3726 = this_alternative_offmemok[i];
3727 goal_alternative_matches[i] = this_alternative_matches[i];
3728 goal_alternative_earlyclobber[i]
3729 = this_alternative_earlyclobber[i];
3731 goal_alternative_swapped = swapped;
3733 goal_alternative_number = this_alternative_number;
3734 goal_earlyclobber = this_earlyclobber;
3739 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3740 then we need to try each alternative twice,
3741 the second time matching those two operands
3742 as if we had exchanged them.
3743 To do this, really exchange them in operands.
3745 If we have just tried the alternatives the second time,
3746 return operands to normal and drop through. */
3748 if (commutative >= 0)
3753 enum reg_class tclass;
3756 recog_data.operand[commutative] = substed_operand[commutative + 1];
3757 recog_data.operand[commutative + 1] = substed_operand[commutative];
3758 /* Swap the duplicates too. */
3759 for (i = 0; i < recog_data.n_dups; i++)
3760 if (recog_data.dup_num[i] == commutative
3761 || recog_data.dup_num[i] == commutative + 1)
3762 *recog_data.dup_loc[i]
3763 = recog_data.operand[(int) recog_data.dup_num[i]];
3765 tclass = preferred_class[commutative];
3766 preferred_class[commutative] = preferred_class[commutative + 1];
3767 preferred_class[commutative + 1] = tclass;
3769 t = pref_or_nothing[commutative];
3770 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3771 pref_or_nothing[commutative + 1] = t;
3773 t = address_reloaded[commutative];
3774 address_reloaded[commutative] = address_reloaded[commutative + 1];
3775 address_reloaded[commutative + 1] = t;
3777 memcpy (constraints, recog_data.constraints,
3778 noperands * sizeof (const char *));
3783 recog_data.operand[commutative] = substed_operand[commutative];
3784 recog_data.operand[commutative + 1]
3785 = substed_operand[commutative + 1];
3786 /* Unswap the duplicates too. */
3787 for (i = 0; i < recog_data.n_dups; i++)
3788 if (recog_data.dup_num[i] == commutative
3789 || recog_data.dup_num[i] == commutative + 1)
3790 *recog_data.dup_loc[i]
3791 = recog_data.operand[(int) recog_data.dup_num[i]];
3795 /* The operands don't meet the constraints.
3796 goal_alternative describes the alternative
3797 that we could reach by reloading the fewest operands.
3798 Reload so as to fit it. */
3800 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3802 /* No alternative works with reloads?? */
3803 if (insn_code_number >= 0)
3804 fatal_insn ("unable to generate reloads for:", insn);
3805 error_for_asm (insn, "inconsistent operand constraints in an %<asm%>");
3806 /* Avoid further trouble with this insn. */
3807 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3812 /* Jump to `finish' from above if all operands are valid already.
3813 In that case, goal_alternative_win is all 1. */
3816 /* Right now, for any pair of operands I and J that are required to match,
3818 goal_alternative_matches[J] is I.
3819 Set up goal_alternative_matched as the inverse function:
3820 goal_alternative_matched[I] = J. */
3822 for (i = 0; i < noperands; i++)
3823 goal_alternative_matched[i] = -1;
3825 for (i = 0; i < noperands; i++)
3826 if (! goal_alternative_win[i]
3827 && goal_alternative_matches[i] >= 0)
3828 goal_alternative_matched[goal_alternative_matches[i]] = i;
3830 for (i = 0; i < noperands; i++)
3831 goal_alternative_win[i] |= goal_alternative_match_win[i];
3833 /* If the best alternative is with operands 1 and 2 swapped,
3834 consider them swapped before reporting the reloads. Update the
3835 operand numbers of any reloads already pushed. */
3837 if (goal_alternative_swapped)
3841 tem = substed_operand[commutative];
3842 substed_operand[commutative] = substed_operand[commutative + 1];
3843 substed_operand[commutative + 1] = tem;
3844 tem = recog_data.operand[commutative];
3845 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3846 recog_data.operand[commutative + 1] = tem;
3847 tem = *recog_data.operand_loc[commutative];
3848 *recog_data.operand_loc[commutative]
3849 = *recog_data.operand_loc[commutative + 1];
3850 *recog_data.operand_loc[commutative + 1] = tem;
3852 for (i = 0; i < n_reloads; i++)
3854 if (rld[i].opnum == commutative)
3855 rld[i].opnum = commutative + 1;
3856 else if (rld[i].opnum == commutative + 1)
3857 rld[i].opnum = commutative;
3861 for (i = 0; i < noperands; i++)
3863 operand_reloadnum[i] = -1;
3865 /* If this is an earlyclobber operand, we need to widen the scope.
3866 The reload must remain valid from the start of the insn being
3867 reloaded until after the operand is stored into its destination.
3868 We approximate this with RELOAD_OTHER even though we know that we
3869 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3871 One special case that is worth checking is when we have an
3872 output that is earlyclobber but isn't used past the insn (typically
3873 a SCRATCH). In this case, we only need have the reload live
3874 through the insn itself, but not for any of our input or output
3876 But we must not accidentally narrow the scope of an existing
3877 RELOAD_OTHER reload - leave these alone.
3879 In any case, anything needed to address this operand can remain
3880 however they were previously categorized. */
3882 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3884 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3885 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3888 /* Any constants that aren't allowed and can't be reloaded
3889 into registers are here changed into memory references. */
3890 for (i = 0; i < noperands; i++)
3891 if (! goal_alternative_win[i])
3893 rtx op = recog_data.operand[i];
3894 rtx subreg = NULL_RTX;
3895 rtx plus = NULL_RTX;
3896 enum machine_mode mode = operand_mode[i];
3898 /* Reloads of SUBREGs of CONSTANT RTXs are handled later in
3899 push_reload so we have to let them pass here. */
3900 if (GET_CODE (op) == SUBREG)
3903 op = SUBREG_REG (op);
3904 mode = GET_MODE (op);
3907 if (GET_CODE (op) == PLUS)
3913 if (CONST_POOL_OK_P (mode, op)
3914 && ((targetm.preferred_reload_class (op, goal_alternative[i])
3916 || no_input_reloads))
3918 int this_address_reloaded;
3919 rtx tem = force_const_mem (mode, op);
3921 /* If we stripped a SUBREG or a PLUS above add it back. */
3922 if (plus != NULL_RTX)
3923 tem = gen_rtx_PLUS (mode, XEXP (plus, 0), tem);
3925 if (subreg != NULL_RTX)
3926 tem = gen_rtx_SUBREG (operand_mode[i], tem, SUBREG_BYTE (subreg));
3928 this_address_reloaded = 0;
3929 substed_operand[i] = recog_data.operand[i]
3930 = find_reloads_toplev (tem, i, address_type[i], ind_levels,
3931 0, insn, &this_address_reloaded);
3933 /* If the alternative accepts constant pool refs directly
3934 there will be no reload needed at all. */
3935 if (plus == NULL_RTX
3936 && subreg == NULL_RTX
3937 && alternative_allows_const_pool_ref (this_address_reloaded == 0
3938 ? substed_operand[i]
3940 recog_data.constraints[i],
3941 goal_alternative_number))
3942 goal_alternative_win[i] = 1;
3946 /* Record the values of the earlyclobber operands for the caller. */
3947 if (goal_earlyclobber)
3948 for (i = 0; i < noperands; i++)
3949 if (goal_alternative_earlyclobber[i])
3950 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3952 /* Now record reloads for all the operands that need them. */
3953 for (i = 0; i < noperands; i++)
3954 if (! goal_alternative_win[i])
3956 /* Operands that match previous ones have already been handled. */
3957 if (goal_alternative_matches[i] >= 0)
3959 /* Handle an operand with a nonoffsettable address
3960 appearing where an offsettable address will do
3961 by reloading the address into a base register.
3963 ??? We can also do this when the operand is a register and
3964 reg_equiv_mem is not offsettable, but this is a bit tricky,
3965 so we don't bother with it. It may not be worth doing. */
3966 else if (goal_alternative_matched[i] == -1
3967 && goal_alternative_offmemok[i]
3968 && MEM_P (recog_data.operand[i]))
3970 /* If the address to be reloaded is a VOIDmode constant,
3971 use the default address mode as mode of the reload register,
3972 as would have been done by find_reloads_address. */
3973 enum machine_mode address_mode;
3974 address_mode = GET_MODE (XEXP (recog_data.operand[i], 0));
3975 if (address_mode == VOIDmode)
3977 addr_space_t as = MEM_ADDR_SPACE (recog_data.operand[i]);
3978 address_mode = targetm.addr_space.address_mode (as);
3981 operand_reloadnum[i]
3982 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3983 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3984 base_reg_class (VOIDmode, MEM, SCRATCH),
3986 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3987 rld[operand_reloadnum[i]].inc
3988 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3990 /* If this operand is an output, we will have made any
3991 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3992 now we are treating part of the operand as an input, so
3993 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3995 if (modified[i] == RELOAD_WRITE)
3997 for (j = 0; j < n_reloads; j++)
3999 if (rld[j].opnum == i)
4001 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
4002 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
4003 else if (rld[j].when_needed
4004 == RELOAD_FOR_OUTADDR_ADDRESS)
4005 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
4010 else if (goal_alternative_matched[i] == -1)
4012 operand_reloadnum[i]
4013 = push_reload ((modified[i] != RELOAD_WRITE
4014 ? recog_data.operand[i] : 0),
4015 (modified[i] != RELOAD_READ
4016 ? recog_data.operand[i] : 0),
4017 (modified[i] != RELOAD_WRITE
4018 ? recog_data.operand_loc[i] : 0),
4019 (modified[i] != RELOAD_READ
4020 ? recog_data.operand_loc[i] : 0),
4021 (enum reg_class) goal_alternative[i],
4022 (modified[i] == RELOAD_WRITE
4023 ? VOIDmode : operand_mode[i]),
4024 (modified[i] == RELOAD_READ
4025 ? VOIDmode : operand_mode[i]),
4026 (insn_code_number < 0 ? 0
4027 : insn_data[insn_code_number].operand[i].strict_low),
4028 0, i, operand_type[i]);
4030 /* In a matching pair of operands, one must be input only
4031 and the other must be output only.
4032 Pass the input operand as IN and the other as OUT. */
4033 else if (modified[i] == RELOAD_READ
4034 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
4036 operand_reloadnum[i]
4037 = push_reload (recog_data.operand[i],
4038 recog_data.operand[goal_alternative_matched[i]],
4039 recog_data.operand_loc[i],
4040 recog_data.operand_loc[goal_alternative_matched[i]],
4041 (enum reg_class) goal_alternative[i],
4043 operand_mode[goal_alternative_matched[i]],
4044 0, 0, i, RELOAD_OTHER);
4045 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
4047 else if (modified[i] == RELOAD_WRITE
4048 && modified[goal_alternative_matched[i]] == RELOAD_READ)
4050 operand_reloadnum[goal_alternative_matched[i]]
4051 = push_reload (recog_data.operand[goal_alternative_matched[i]],
4052 recog_data.operand[i],
4053 recog_data.operand_loc[goal_alternative_matched[i]],
4054 recog_data.operand_loc[i],
4055 (enum reg_class) goal_alternative[i],
4056 operand_mode[goal_alternative_matched[i]],
4058 0, 0, i, RELOAD_OTHER);
4059 operand_reloadnum[i] = output_reloadnum;
4063 gcc_assert (insn_code_number < 0);
4064 error_for_asm (insn, "inconsistent operand constraints "
4066 /* Avoid further trouble with this insn. */
4067 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
4072 else if (goal_alternative_matched[i] < 0
4073 && goal_alternative_matches[i] < 0
4074 && address_operand_reloaded[i] != 1
4077 /* For each non-matching operand that's a MEM or a pseudo-register
4078 that didn't get a hard register, make an optional reload.
4079 This may get done even if the insn needs no reloads otherwise. */
4081 rtx operand = recog_data.operand[i];
4083 while (GET_CODE (operand) == SUBREG)
4084 operand = SUBREG_REG (operand);
4085 if ((MEM_P (operand)
4087 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4088 /* If this is only for an output, the optional reload would not
4089 actually cause us to use a register now, just note that
4090 something is stored here. */
4091 && (goal_alternative[i] != NO_REGS
4092 || modified[i] == RELOAD_WRITE)
4093 && ! no_input_reloads
4094 /* An optional output reload might allow to delete INSN later.
4095 We mustn't make in-out reloads on insns that are not permitted
4097 If this is an asm, we can't delete it; we must not even call
4098 push_reload for an optional output reload in this case,
4099 because we can't be sure that the constraint allows a register,
4100 and push_reload verifies the constraints for asms. */
4101 && (modified[i] == RELOAD_READ
4102 || (! no_output_reloads && ! this_insn_is_asm)))
4103 operand_reloadnum[i]
4104 = push_reload ((modified[i] != RELOAD_WRITE
4105 ? recog_data.operand[i] : 0),
4106 (modified[i] != RELOAD_READ
4107 ? recog_data.operand[i] : 0),
4108 (modified[i] != RELOAD_WRITE
4109 ? recog_data.operand_loc[i] : 0),
4110 (modified[i] != RELOAD_READ
4111 ? recog_data.operand_loc[i] : 0),
4112 (enum reg_class) goal_alternative[i],
4113 (modified[i] == RELOAD_WRITE
4114 ? VOIDmode : operand_mode[i]),
4115 (modified[i] == RELOAD_READ
4116 ? VOIDmode : operand_mode[i]),
4117 (insn_code_number < 0 ? 0
4118 : insn_data[insn_code_number].operand[i].strict_low),
4119 1, i, operand_type[i]);
4120 /* If a memory reference remains (either as a MEM or a pseudo that
4121 did not get a hard register), yet we can't make an optional
4122 reload, check if this is actually a pseudo register reference;
4123 we then need to emit a USE and/or a CLOBBER so that reload
4124 inheritance will do the right thing. */
4128 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
4129 && reg_renumber [REGNO (operand)] < 0)))
4131 operand = *recog_data.operand_loc[i];
4133 while (GET_CODE (operand) == SUBREG)
4134 operand = SUBREG_REG (operand);
4135 if (REG_P (operand))
4137 if (modified[i] != RELOAD_WRITE)
4138 /* We mark the USE with QImode so that we recognize
4139 it as one that can be safely deleted at the end
4141 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
4143 if (modified[i] != RELOAD_READ)
4144 emit_insn_after (gen_clobber (operand), insn);
4148 else if (goal_alternative_matches[i] >= 0
4149 && goal_alternative_win[goal_alternative_matches[i]]
4150 && modified[i] == RELOAD_READ
4151 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
4152 && ! no_input_reloads && ! no_output_reloads
4155 /* Similarly, make an optional reload for a pair of matching
4156 objects that are in MEM or a pseudo that didn't get a hard reg. */
4158 rtx operand = recog_data.operand[i];
4160 while (GET_CODE (operand) == SUBREG)
4161 operand = SUBREG_REG (operand);
4162 if ((MEM_P (operand)
4164 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4165 && (goal_alternative[goal_alternative_matches[i]] != NO_REGS))
4166 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
4167 = push_reload (recog_data.operand[goal_alternative_matches[i]],
4168 recog_data.operand[i],
4169 recog_data.operand_loc[goal_alternative_matches[i]],
4170 recog_data.operand_loc[i],
4171 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
4172 operand_mode[goal_alternative_matches[i]],
4174 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
4177 /* Perform whatever substitutions on the operands we are supposed
4178 to make due to commutativity or replacement of registers
4179 with equivalent constants or memory slots. */
4181 for (i = 0; i < noperands; i++)
4183 /* We only do this on the last pass through reload, because it is
4184 possible for some data (like reg_equiv_address) to be changed during
4185 later passes. Moreover, we lose the opportunity to get a useful
4186 reload_{in,out}_reg when we do these replacements. */
4190 rtx substitution = substed_operand[i];
4192 *recog_data.operand_loc[i] = substitution;
4194 /* If we're replacing an operand with a LABEL_REF, we need to
4195 make sure that there's a REG_LABEL_OPERAND note attached to
4196 this instruction. */
4197 if (GET_CODE (substitution) == LABEL_REF
4198 && !find_reg_note (insn, REG_LABEL_OPERAND,
4199 XEXP (substitution, 0))
4200 /* For a JUMP_P, if it was a branch target it must have
4201 already been recorded as such. */
4203 || !label_is_jump_target_p (XEXP (substitution, 0),
4205 add_reg_note (insn, REG_LABEL_OPERAND, XEXP (substitution, 0));
4208 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
4211 /* If this insn pattern contains any MATCH_DUP's, make sure that
4212 they will be substituted if the operands they match are substituted.
4213 Also do now any substitutions we already did on the operands.
4215 Don't do this if we aren't making replacements because we might be
4216 propagating things allocated by frame pointer elimination into places
4217 it doesn't expect. */
4219 if (insn_code_number >= 0 && replace)
4220 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4222 int opno = recog_data.dup_num[i];
4223 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4224 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4228 /* This loses because reloading of prior insns can invalidate the equivalence
4229 (or at least find_equiv_reg isn't smart enough to find it any more),
4230 causing this insn to need more reload regs than it needed before.
4231 It may be too late to make the reload regs available.
4232 Now this optimization is done safely in choose_reload_regs. */
4234 /* For each reload of a reg into some other class of reg,
4235 search for an existing equivalent reg (same value now) in the right class.
4236 We can use it as long as we don't need to change its contents. */
4237 for (i = 0; i < n_reloads; i++)
4238 if (rld[i].reg_rtx == 0
4240 && REG_P (rld[i].in)
4244 = find_equiv_reg (rld[i].in, insn, rld[i].rclass, -1,
4245 static_reload_reg_p, 0, rld[i].inmode);
4246 /* Prevent generation of insn to load the value
4247 because the one we found already has the value. */
4249 rld[i].in = rld[i].reg_rtx;
4253 /* If we detected error and replaced asm instruction by USE, forget about the
4255 if (GET_CODE (PATTERN (insn)) == USE
4256 && CONST_INT_P (XEXP (PATTERN (insn), 0)))
4259 /* Perhaps an output reload can be combined with another
4260 to reduce needs by one. */
4261 if (!goal_earlyclobber)
4264 /* If we have a pair of reloads for parts of an address, they are reloading
4265 the same object, the operands themselves were not reloaded, and they
4266 are for two operands that are supposed to match, merge the reloads and
4267 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4269 for (i = 0; i < n_reloads; i++)
4273 for (j = i + 1; j < n_reloads; j++)
4274 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4275 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4276 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4277 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4278 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4279 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4280 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4281 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4282 && rtx_equal_p (rld[i].in, rld[j].in)
4283 && (operand_reloadnum[rld[i].opnum] < 0
4284 || rld[operand_reloadnum[rld[i].opnum]].optional)
4285 && (operand_reloadnum[rld[j].opnum] < 0
4286 || rld[operand_reloadnum[rld[j].opnum]].optional)
4287 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4288 || (goal_alternative_matches[rld[j].opnum]
4291 for (k = 0; k < n_replacements; k++)
4292 if (replacements[k].what == j)
4293 replacements[k].what = i;
4295 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4296 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4297 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4299 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4304 /* Scan all the reloads and update their type.
4305 If a reload is for the address of an operand and we didn't reload
4306 that operand, change the type. Similarly, change the operand number
4307 of a reload when two operands match. If a reload is optional, treat it
4308 as though the operand isn't reloaded.
4310 ??? This latter case is somewhat odd because if we do the optional
4311 reload, it means the object is hanging around. Thus we need only
4312 do the address reload if the optional reload was NOT done.
4314 Change secondary reloads to be the address type of their operand, not
4317 If an operand's reload is now RELOAD_OTHER, change any
4318 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4319 RELOAD_FOR_OTHER_ADDRESS. */
4321 for (i = 0; i < n_reloads; i++)
4323 if (rld[i].secondary_p
4324 && rld[i].when_needed == operand_type[rld[i].opnum])
4325 rld[i].when_needed = address_type[rld[i].opnum];
4327 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4328 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4329 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4330 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4331 && (operand_reloadnum[rld[i].opnum] < 0
4332 || rld[operand_reloadnum[rld[i].opnum]].optional))
4334 /* If we have a secondary reload to go along with this reload,
4335 change its type to RELOAD_FOR_OPADDR_ADDR. */
4337 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4338 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4339 && rld[i].secondary_in_reload != -1)
4341 int secondary_in_reload = rld[i].secondary_in_reload;
4343 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4345 /* If there's a tertiary reload we have to change it also. */
4346 if (secondary_in_reload > 0
4347 && rld[secondary_in_reload].secondary_in_reload != -1)
4348 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4349 = RELOAD_FOR_OPADDR_ADDR;
4352 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4353 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4354 && rld[i].secondary_out_reload != -1)
4356 int secondary_out_reload = rld[i].secondary_out_reload;
4358 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4360 /* If there's a tertiary reload we have to change it also. */
4361 if (secondary_out_reload
4362 && rld[secondary_out_reload].secondary_out_reload != -1)
4363 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4364 = RELOAD_FOR_OPADDR_ADDR;
4367 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4368 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4369 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4371 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4374 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4375 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4376 && operand_reloadnum[rld[i].opnum] >= 0
4377 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4379 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4381 if (goal_alternative_matches[rld[i].opnum] >= 0)
4382 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4385 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4386 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4387 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4389 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4390 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4391 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4392 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4393 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4394 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4395 This is complicated by the fact that a single operand can have more
4396 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4397 choose_reload_regs without affecting code quality, and cases that
4398 actually fail are extremely rare, so it turns out to be better to fix
4399 the problem here by not generating cases that choose_reload_regs will
4401 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4402 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4404 We can reduce the register pressure by exploiting that a
4405 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4406 does not conflict with any of them, if it is only used for the first of
4407 the RELOAD_FOR_X_ADDRESS reloads. */
4409 int first_op_addr_num = -2;
4410 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4411 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4412 int need_change = 0;
4413 /* We use last_op_addr_reload and the contents of the above arrays
4414 first as flags - -2 means no instance encountered, -1 means exactly
4415 one instance encountered.
4416 If more than one instance has been encountered, we store the reload
4417 number of the first reload of the kind in question; reload numbers
4418 are known to be non-negative. */
4419 for (i = 0; i < noperands; i++)
4420 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4421 for (i = n_reloads - 1; i >= 0; i--)
4423 switch (rld[i].when_needed)
4425 case RELOAD_FOR_OPERAND_ADDRESS:
4426 if (++first_op_addr_num >= 0)
4428 first_op_addr_num = i;
4432 case RELOAD_FOR_INPUT_ADDRESS:
4433 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4435 first_inpaddr_num[rld[i].opnum] = i;
4439 case RELOAD_FOR_OUTPUT_ADDRESS:
4440 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4442 first_outpaddr_num[rld[i].opnum] = i;
4453 for (i = 0; i < n_reloads; i++)
4456 enum reload_type type;
4458 switch (rld[i].when_needed)
4460 case RELOAD_FOR_OPADDR_ADDR:
4461 first_num = first_op_addr_num;
4462 type = RELOAD_FOR_OPERAND_ADDRESS;
4464 case RELOAD_FOR_INPADDR_ADDRESS:
4465 first_num = first_inpaddr_num[rld[i].opnum];
4466 type = RELOAD_FOR_INPUT_ADDRESS;
4468 case RELOAD_FOR_OUTADDR_ADDRESS:
4469 first_num = first_outpaddr_num[rld[i].opnum];
4470 type = RELOAD_FOR_OUTPUT_ADDRESS;
4477 else if (i > first_num)
4478 rld[i].when_needed = type;
4481 /* Check if the only TYPE reload that uses reload I is
4482 reload FIRST_NUM. */
4483 for (j = n_reloads - 1; j > first_num; j--)
4485 if (rld[j].when_needed == type
4486 && (rld[i].secondary_p
4487 ? rld[j].secondary_in_reload == i
4488 : reg_mentioned_p (rld[i].in, rld[j].in)))
4490 rld[i].when_needed = type;
4499 /* See if we have any reloads that are now allowed to be merged
4500 because we've changed when the reload is needed to
4501 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4502 check for the most common cases. */
4504 for (i = 0; i < n_reloads; i++)
4505 if (rld[i].in != 0 && rld[i].out == 0
4506 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4507 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4508 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4509 for (j = 0; j < n_reloads; j++)
4510 if (i != j && rld[j].in != 0 && rld[j].out == 0
4511 && rld[j].when_needed == rld[i].when_needed
4512 && MATCHES (rld[i].in, rld[j].in)
4513 && rld[i].rclass == rld[j].rclass
4514 && !rld[i].nocombine && !rld[j].nocombine
4515 && rld[i].reg_rtx == rld[j].reg_rtx)
4517 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4518 transfer_replacements (i, j);
4523 /* If we made any reloads for addresses, see if they violate a
4524 "no input reloads" requirement for this insn. But loads that we
4525 do after the insn (such as for output addresses) are fine. */
4526 if (no_input_reloads)
4527 for (i = 0; i < n_reloads; i++)
4528 gcc_assert (rld[i].in == 0
4529 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS
4530 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS);
4533 /* Compute reload_mode and reload_nregs. */
4534 for (i = 0; i < n_reloads; i++)
4537 = (rld[i].inmode == VOIDmode
4538 || (GET_MODE_SIZE (rld[i].outmode)
4539 > GET_MODE_SIZE (rld[i].inmode)))
4540 ? rld[i].outmode : rld[i].inmode;
4542 rld[i].nregs = ira_reg_class_max_nregs [rld[i].rclass][rld[i].mode];
4545 /* Special case a simple move with an input reload and a
4546 destination of a hard reg, if the hard reg is ok, use it. */
4547 for (i = 0; i < n_reloads; i++)
4548 if (rld[i].when_needed == RELOAD_FOR_INPUT
4549 && GET_CODE (PATTERN (insn)) == SET
4550 && REG_P (SET_DEST (PATTERN (insn)))
4551 && (SET_SRC (PATTERN (insn)) == rld[i].in
4552 || SET_SRC (PATTERN (insn)) == rld[i].in_reg)
4553 && !elimination_target_reg_p (SET_DEST (PATTERN (insn))))
4555 rtx dest = SET_DEST (PATTERN (insn));
4556 unsigned int regno = REGNO (dest);
4558 if (regno < FIRST_PSEUDO_REGISTER
4559 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].rclass], regno)
4560 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4562 int nr = hard_regno_nregs[regno][rld[i].mode];
4565 for (nri = 1; nri < nr; nri ++)
4566 if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].rclass], regno + nri))
4570 rld[i].reg_rtx = dest;
4577 /* Return true if alternative number ALTNUM in constraint-string
4578 CONSTRAINT is guaranteed to accept a reloaded constant-pool reference.
4579 MEM gives the reference if it didn't need any reloads, otherwise it
4583 alternative_allows_const_pool_ref (rtx mem ATTRIBUTE_UNUSED,
4584 const char *constraint, int altnum)
4588 /* Skip alternatives before the one requested. */
4591 while (*constraint++ != ',')
4595 /* Scan the requested alternative for TARGET_MEM_CONSTRAINT or 'o'.
4596 If one of them is present, this alternative accepts the result of
4597 passing a constant-pool reference through find_reloads_toplev.
4599 The same is true of extra memory constraints if the address
4600 was reloaded into a register. However, the target may elect
4601 to disallow the original constant address, forcing it to be
4602 reloaded into a register instead. */
4603 for (; (c = *constraint) && c != ',' && c != '#';
4604 constraint += CONSTRAINT_LEN (c, constraint))
4606 if (c == TARGET_MEM_CONSTRAINT || c == 'o')
4608 #ifdef EXTRA_CONSTRAINT_STR
4609 if (EXTRA_MEMORY_CONSTRAINT (c, constraint)
4610 && (mem == NULL || EXTRA_CONSTRAINT_STR (mem, c, constraint)))
4617 /* Scan X for memory references and scan the addresses for reloading.
4618 Also checks for references to "constant" regs that we want to eliminate
4619 and replaces them with the values they stand for.
4620 We may alter X destructively if it contains a reference to such.
4621 If X is just a constant reg, we return the equivalent value
4624 IND_LEVELS says how many levels of indirect addressing this machine
4627 OPNUM and TYPE identify the purpose of the reload.
4629 IS_SET_DEST is true if X is the destination of a SET, which is not
4630 appropriate to be replaced by a constant.
4632 INSN, if nonzero, is the insn in which we do the reload. It is used
4633 to determine if we may generate output reloads, and where to put USEs
4634 for pseudos that we have to replace with stack slots.
4636 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4637 result of find_reloads_address. */
4640 find_reloads_toplev (rtx x, int opnum, enum reload_type type,
4641 int ind_levels, int is_set_dest, rtx insn,
4642 int *address_reloaded)
4644 RTX_CODE code = GET_CODE (x);
4646 const char *fmt = GET_RTX_FORMAT (code);
4652 /* This code is duplicated for speed in find_reloads. */
4653 int regno = REGNO (x);
4654 if (reg_equiv_constant (regno) != 0 && !is_set_dest)
4655 x = reg_equiv_constant (regno);
4657 /* This creates (subreg (mem...)) which would cause an unnecessary
4658 reload of the mem. */
4659 else if (reg_equiv_mem (regno) != 0)
4660 x = reg_equiv_mem (regno);
4662 else if (reg_equiv_memory_loc (regno)
4663 && (reg_equiv_address (regno) != 0 || num_not_at_initial_offset))
4665 rtx mem = make_memloc (x, regno);
4666 if (reg_equiv_address (regno)
4667 || ! rtx_equal_p (mem, reg_equiv_mem (regno)))
4669 /* If this is not a toplevel operand, find_reloads doesn't see
4670 this substitution. We have to emit a USE of the pseudo so
4671 that delete_output_reload can see it. */
4672 if (replace_reloads && recog_data.operand[opnum] != x)
4673 /* We mark the USE with QImode so that we recognize it
4674 as one that can be safely deleted at the end of
4676 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4679 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4680 opnum, type, ind_levels, insn);
4681 if (!rtx_equal_p (x, mem))
4682 push_reg_equiv_alt_mem (regno, x);
4683 if (address_reloaded)
4684 *address_reloaded = i;
4693 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4694 opnum, type, ind_levels, insn);
4695 if (address_reloaded)
4696 *address_reloaded = i;
4701 if (code == SUBREG && REG_P (SUBREG_REG (x)))
4703 /* Check for SUBREG containing a REG that's equivalent to a
4704 constant. If the constant has a known value, truncate it
4705 right now. Similarly if we are extracting a single-word of a
4706 multi-word constant. If the constant is symbolic, allow it
4707 to be substituted normally. push_reload will strip the
4708 subreg later. The constant must not be VOIDmode, because we
4709 will lose the mode of the register (this should never happen
4710 because one of the cases above should handle it). */
4712 int regno = REGNO (SUBREG_REG (x));
4715 if (regno >= FIRST_PSEUDO_REGISTER
4716 && reg_renumber[regno] < 0
4717 && reg_equiv_constant (regno) != 0)
4720 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant (regno),
4721 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4723 if (CONSTANT_P (tem)
4724 && !targetm.legitimate_constant_p (GET_MODE (x), tem))
4726 tem = force_const_mem (GET_MODE (x), tem);
4727 i = find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4728 &XEXP (tem, 0), opnum, type,
4730 if (address_reloaded)
4731 *address_reloaded = i;
4736 /* If the subreg contains a reg that will be converted to a mem,
4737 convert the subreg to a narrower memref now.
4738 Otherwise, we would get (subreg (mem ...) ...),
4739 which would force reload of the mem.
4741 We also need to do this if there is an equivalent MEM that is
4742 not offsettable. In that case, alter_subreg would produce an
4743 invalid address on big-endian machines.
4745 For machines that extend byte loads, we must not reload using
4746 a wider mode if we have a paradoxical SUBREG. find_reloads will
4747 force a reload in that case. So we should not do anything here. */
4749 if (regno >= FIRST_PSEUDO_REGISTER
4750 #ifdef LOAD_EXTEND_OP
4751 && !paradoxical_subreg_p (x)
4753 && (reg_equiv_address (regno) != 0
4754 || (reg_equiv_mem (regno) != 0
4755 && (! strict_memory_address_addr_space_p
4756 (GET_MODE (x), XEXP (reg_equiv_mem (regno), 0),
4757 MEM_ADDR_SPACE (reg_equiv_mem (regno)))
4758 || ! offsettable_memref_p (reg_equiv_mem (regno))
4759 || num_not_at_initial_offset))))
4760 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4761 insn, address_reloaded);
4764 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4768 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4769 ind_levels, is_set_dest, insn,
4771 /* If we have replaced a reg with it's equivalent memory loc -
4772 that can still be handled here e.g. if it's in a paradoxical
4773 subreg - we must make the change in a copy, rather than using
4774 a destructive change. This way, find_reloads can still elect
4775 not to do the change. */
4776 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4778 x = shallow_copy_rtx (x);
4781 XEXP (x, i) = new_part;
4787 /* Return a mem ref for the memory equivalent of reg REGNO.
4788 This mem ref is not shared with anything. */
4791 make_memloc (rtx ad, int regno)
4793 /* We must rerun eliminate_regs, in case the elimination
4794 offsets have changed. */
4796 = XEXP (eliminate_regs (reg_equiv_memory_loc (regno), VOIDmode, NULL_RTX),
4799 /* If TEM might contain a pseudo, we must copy it to avoid
4800 modifying it when we do the substitution for the reload. */
4801 if (rtx_varies_p (tem, 0))
4802 tem = copy_rtx (tem);
4804 tem = replace_equiv_address_nv (reg_equiv_memory_loc (regno), tem);
4805 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4807 /* Copy the result if it's still the same as the equivalence, to avoid
4808 modifying it when we do the substitution for the reload. */
4809 if (tem == reg_equiv_memory_loc (regno))
4810 tem = copy_rtx (tem);
4814 /* Returns true if AD could be turned into a valid memory reference
4815 to mode MODE in address space AS by reloading the part pointed to
4816 by PART into a register. */
4819 maybe_memory_address_addr_space_p (enum machine_mode mode, rtx ad,
4820 addr_space_t as, rtx *part)
4824 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4827 retv = memory_address_addr_space_p (mode, ad, as);
4833 /* Record all reloads needed for handling memory address AD
4834 which appears in *LOC in a memory reference to mode MODE
4835 which itself is found in location *MEMREFLOC.
4836 Note that we take shortcuts assuming that no multi-reg machine mode
4837 occurs as part of an address.
4839 OPNUM and TYPE specify the purpose of this reload.
4841 IND_LEVELS says how many levels of indirect addressing this machine
4844 INSN, if nonzero, is the insn in which we do the reload. It is used
4845 to determine if we may generate output reloads, and where to put USEs
4846 for pseudos that we have to replace with stack slots.
4848 Value is one if this address is reloaded or replaced as a whole; it is
4849 zero if the top level of this address was not reloaded or replaced, and
4850 it is -1 if it may or may not have been reloaded or replaced.
4852 Note that there is no verification that the address will be valid after
4853 this routine does its work. Instead, we rely on the fact that the address
4854 was valid when reload started. So we need only undo things that reload
4855 could have broken. These are wrong register types, pseudos not allocated
4856 to a hard register, and frame pointer elimination. */
4859 find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad,
4860 rtx *loc, int opnum, enum reload_type type,
4861 int ind_levels, rtx insn)
4863 addr_space_t as = memrefloc? MEM_ADDR_SPACE (*memrefloc)
4864 : ADDR_SPACE_GENERIC;
4866 int removed_and = 0;
4870 /* If the address is a register, see if it is a legitimate address and
4871 reload if not. We first handle the cases where we need not reload
4872 or where we must reload in a non-standard way. */
4878 if (reg_equiv_constant (regno) != 0)
4880 find_reloads_address_part (reg_equiv_constant (regno), loc,
4881 base_reg_class (mode, MEM, SCRATCH),
4882 GET_MODE (ad), opnum, type, ind_levels);
4886 tem = reg_equiv_memory_loc (regno);
4889 if (reg_equiv_address (regno) != 0 || num_not_at_initial_offset)
4891 tem = make_memloc (ad, regno);
4892 if (! strict_memory_address_addr_space_p (GET_MODE (tem),
4894 MEM_ADDR_SPACE (tem)))
4898 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4899 &XEXP (tem, 0), opnum,
4900 ADDR_TYPE (type), ind_levels, insn);
4901 if (!rtx_equal_p (tem, orig))
4902 push_reg_equiv_alt_mem (regno, tem);
4904 /* We can avoid a reload if the register's equivalent memory
4905 expression is valid as an indirect memory address.
4906 But not all addresses are valid in a mem used as an indirect
4907 address: only reg or reg+constant. */
4910 && strict_memory_address_addr_space_p (mode, tem, as)
4911 && (REG_P (XEXP (tem, 0))
4912 || (GET_CODE (XEXP (tem, 0)) == PLUS
4913 && REG_P (XEXP (XEXP (tem, 0), 0))
4914 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4916 /* TEM is not the same as what we'll be replacing the
4917 pseudo with after reload, put a USE in front of INSN
4918 in the final reload pass. */
4920 && num_not_at_initial_offset
4921 && ! rtx_equal_p (tem, reg_equiv_mem (regno)))
4924 /* We mark the USE with QImode so that we
4925 recognize it as one that can be safely
4926 deleted at the end of reload. */
4927 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4930 /* This doesn't really count as replacing the address
4931 as a whole, since it is still a memory access. */
4939 /* The only remaining case where we can avoid a reload is if this is a
4940 hard register that is valid as a base register and which is not the
4941 subject of a CLOBBER in this insn. */
4943 else if (regno < FIRST_PSEUDO_REGISTER
4944 && regno_ok_for_base_p (regno, mode, MEM, SCRATCH)
4945 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4948 /* If we do not have one of the cases above, we must do the reload. */
4949 push_reload (ad, NULL_RTX, loc, (rtx*) 0, base_reg_class (mode, MEM, SCRATCH),
4950 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4954 if (strict_memory_address_addr_space_p (mode, ad, as))
4956 /* The address appears valid, so reloads are not needed.
4957 But the address may contain an eliminable register.
4958 This can happen because a machine with indirect addressing
4959 may consider a pseudo register by itself a valid address even when
4960 it has failed to get a hard reg.
4961 So do a tree-walk to find and eliminate all such regs. */
4963 /* But first quickly dispose of a common case. */
4964 if (GET_CODE (ad) == PLUS
4965 && CONST_INT_P (XEXP (ad, 1))
4966 && REG_P (XEXP (ad, 0))
4967 && reg_equiv_constant (REGNO (XEXP (ad, 0))) == 0)
4970 subst_reg_equivs_changed = 0;
4971 *loc = subst_reg_equivs (ad, insn);
4973 if (! subst_reg_equivs_changed)
4976 /* Check result for validity after substitution. */
4977 if (strict_memory_address_addr_space_p (mode, ad, as))
4981 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4984 if (memrefloc && ADDR_SPACE_GENERIC_P (as))
4986 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4991 *memrefloc = copy_rtx (*memrefloc);
4992 XEXP (*memrefloc, 0) = ad;
4993 move_replacements (&ad, &XEXP (*memrefloc, 0));
4999 /* The address is not valid. We have to figure out why. First see if
5000 we have an outer AND and remove it if so. Then analyze what's inside. */
5002 if (GET_CODE (ad) == AND)
5005 loc = &XEXP (ad, 0);
5009 /* One possibility for why the address is invalid is that it is itself
5010 a MEM. This can happen when the frame pointer is being eliminated, a
5011 pseudo is not allocated to a hard register, and the offset between the
5012 frame and stack pointers is not its initial value. In that case the
5013 pseudo will have been replaced by a MEM referring to the
5017 /* First ensure that the address in this MEM is valid. Then, unless
5018 indirect addresses are valid, reload the MEM into a register. */
5020 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
5021 opnum, ADDR_TYPE (type),
5022 ind_levels == 0 ? 0 : ind_levels - 1, insn);
5024 /* If tem was changed, then we must create a new memory reference to
5025 hold it and store it back into memrefloc. */
5026 if (tem != ad && memrefloc)
5028 *memrefloc = copy_rtx (*memrefloc);
5029 copy_replacements (tem, XEXP (*memrefloc, 0));
5030 loc = &XEXP (*memrefloc, 0);
5032 loc = &XEXP (*loc, 0);
5035 /* Check similar cases as for indirect addresses as above except
5036 that we can allow pseudos and a MEM since they should have been
5037 taken care of above. */
5040 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
5041 || MEM_P (XEXP (tem, 0))
5042 || ! (REG_P (XEXP (tem, 0))
5043 || (GET_CODE (XEXP (tem, 0)) == PLUS
5044 && REG_P (XEXP (XEXP (tem, 0), 0))
5045 && CONST_INT_P (XEXP (XEXP (tem, 0), 1)))))
5047 /* Must use TEM here, not AD, since it is the one that will
5048 have any subexpressions reloaded, if needed. */
5049 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
5050 base_reg_class (mode, MEM, SCRATCH), GET_MODE (tem),
5053 return ! removed_and;
5059 /* If we have address of a stack slot but it's not valid because the
5060 displacement is too large, compute the sum in a register.
5061 Handle all base registers here, not just fp/ap/sp, because on some
5062 targets (namely SH) we can also get too large displacements from
5063 big-endian corrections. */
5064 else if (GET_CODE (ad) == PLUS
5065 && REG_P (XEXP (ad, 0))
5066 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
5067 && CONST_INT_P (XEXP (ad, 1))
5068 && (regno_ok_for_base_p (REGNO (XEXP (ad, 0)), mode, PLUS,
5070 /* Similarly, if we were to reload the base register and the
5071 mem+offset address is still invalid, then we want to reload
5072 the whole address, not just the base register. */
5073 || ! maybe_memory_address_addr_space_p
5074 (mode, ad, as, &(XEXP (ad, 0)))))
5077 /* Unshare the MEM rtx so we can safely alter it. */
5080 *memrefloc = copy_rtx (*memrefloc);
5081 loc = &XEXP (*memrefloc, 0);
5083 loc = &XEXP (*loc, 0);
5086 if (double_reg_address_ok
5087 && regno_ok_for_base_p (REGNO (XEXP (ad, 0)), mode,
5090 /* Unshare the sum as well. */
5091 *loc = ad = copy_rtx (ad);
5093 /* Reload the displacement into an index reg.
5094 We assume the frame pointer or arg pointer is a base reg. */
5095 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
5096 INDEX_REG_CLASS, GET_MODE (ad), opnum,
5102 /* If the sum of two regs is not necessarily valid,
5103 reload the sum into a base reg.
5104 That will at least work. */
5105 find_reloads_address_part (ad, loc,
5106 base_reg_class (mode, MEM, SCRATCH),
5107 GET_MODE (ad), opnum, type, ind_levels);
5109 return ! removed_and;
5112 /* If we have an indexed stack slot, there are three possible reasons why
5113 it might be invalid: The index might need to be reloaded, the address
5114 might have been made by frame pointer elimination and hence have a
5115 constant out of range, or both reasons might apply.
5117 We can easily check for an index needing reload, but even if that is the
5118 case, we might also have an invalid constant. To avoid making the
5119 conservative assumption and requiring two reloads, we see if this address
5120 is valid when not interpreted strictly. If it is, the only problem is
5121 that the index needs a reload and find_reloads_address_1 will take care
5124 Handle all base registers here, not just fp/ap/sp, because on some
5125 targets (namely SPARC) we can also get invalid addresses from preventive
5126 subreg big-endian corrections made by find_reloads_toplev. We
5127 can also get expressions involving LO_SUM (rather than PLUS) from
5128 find_reloads_subreg_address.
5130 If we decide to do something, it must be that `double_reg_address_ok'
5131 is true. We generate a reload of the base register + constant and
5132 rework the sum so that the reload register will be added to the index.
5133 This is safe because we know the address isn't shared.
5135 We check for the base register as both the first and second operand of
5136 the innermost PLUS and/or LO_SUM. */
5138 for (op_index = 0; op_index < 2; ++op_index)
5140 rtx operand, addend;
5141 enum rtx_code inner_code;
5143 if (GET_CODE (ad) != PLUS)
5146 inner_code = GET_CODE (XEXP (ad, 0));
5147 if (!(GET_CODE (ad) == PLUS
5148 && CONST_INT_P (XEXP (ad, 1))
5149 && (inner_code == PLUS || inner_code == LO_SUM)))
5152 operand = XEXP (XEXP (ad, 0), op_index);
5153 if (!REG_P (operand) || REGNO (operand) >= FIRST_PSEUDO_REGISTER)
5156 addend = XEXP (XEXP (ad, 0), 1 - op_index);
5158 if ((regno_ok_for_base_p (REGNO (operand), mode, inner_code,
5160 || operand == frame_pointer_rtx
5161 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
5162 || operand == hard_frame_pointer_rtx
5164 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
5165 || operand == arg_pointer_rtx
5167 || operand == stack_pointer_rtx)
5168 && ! maybe_memory_address_addr_space_p
5169 (mode, ad, as, &XEXP (XEXP (ad, 0), 1 - op_index)))
5174 offset_reg = plus_constant (operand, INTVAL (XEXP (ad, 1)));
5176 /* Form the adjusted address. */
5177 if (GET_CODE (XEXP (ad, 0)) == PLUS)
5178 ad = gen_rtx_PLUS (GET_MODE (ad),
5179 op_index == 0 ? offset_reg : addend,
5180 op_index == 0 ? addend : offset_reg);
5182 ad = gen_rtx_LO_SUM (GET_MODE (ad),
5183 op_index == 0 ? offset_reg : addend,
5184 op_index == 0 ? addend : offset_reg);
5187 cls = base_reg_class (mode, MEM, GET_CODE (addend));
5188 find_reloads_address_part (XEXP (ad, op_index),
5189 &XEXP (ad, op_index), cls,
5190 GET_MODE (ad), opnum, type, ind_levels);
5191 find_reloads_address_1 (mode,
5192 XEXP (ad, 1 - op_index), 1, GET_CODE (ad),
5193 GET_CODE (XEXP (ad, op_index)),
5194 &XEXP (ad, 1 - op_index), opnum,
5201 /* See if address becomes valid when an eliminable register
5202 in a sum is replaced. */
5205 if (GET_CODE (ad) == PLUS)
5206 tem = subst_indexed_address (ad);
5207 if (tem != ad && strict_memory_address_addr_space_p (mode, tem, as))
5209 /* Ok, we win that way. Replace any additional eliminable
5212 subst_reg_equivs_changed = 0;
5213 tem = subst_reg_equivs (tem, insn);
5215 /* Make sure that didn't make the address invalid again. */
5217 if (! subst_reg_equivs_changed
5218 || strict_memory_address_addr_space_p (mode, tem, as))
5225 /* If constants aren't valid addresses, reload the constant address
5227 if (CONSTANT_P (ad) && ! strict_memory_address_addr_space_p (mode, ad, as))
5229 enum machine_mode address_mode = GET_MODE (ad);
5230 if (address_mode == VOIDmode)
5231 address_mode = targetm.addr_space.address_mode (as);
5233 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5234 Unshare it so we can safely alter it. */
5235 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
5236 && CONSTANT_POOL_ADDRESS_P (ad))
5238 *memrefloc = copy_rtx (*memrefloc);
5239 loc = &XEXP (*memrefloc, 0);
5241 loc = &XEXP (*loc, 0);
5244 find_reloads_address_part (ad, loc, base_reg_class (mode, MEM, SCRATCH),
5245 address_mode, opnum, type, ind_levels);
5246 return ! removed_and;
5249 return find_reloads_address_1 (mode, ad, 0, MEM, SCRATCH, loc, opnum, type,
5253 /* Find all pseudo regs appearing in AD
5254 that are eliminable in favor of equivalent values
5255 and do not have hard regs; replace them by their equivalents.
5256 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5257 front of it for pseudos that we have to replace with stack slots. */
5260 subst_reg_equivs (rtx ad, rtx insn)
5262 RTX_CODE code = GET_CODE (ad);
5282 int regno = REGNO (ad);
5284 if (reg_equiv_constant (regno) != 0)
5286 subst_reg_equivs_changed = 1;
5287 return reg_equiv_constant (regno);
5289 if (reg_equiv_memory_loc (regno) && num_not_at_initial_offset)
5291 rtx mem = make_memloc (ad, regno);
5292 if (! rtx_equal_p (mem, reg_equiv_mem (regno)))
5294 subst_reg_equivs_changed = 1;
5295 /* We mark the USE with QImode so that we recognize it
5296 as one that can be safely deleted at the end of
5298 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5307 /* Quickly dispose of a common case. */
5308 if (XEXP (ad, 0) == frame_pointer_rtx
5309 && CONST_INT_P (XEXP (ad, 1)))
5317 fmt = GET_RTX_FORMAT (code);
5318 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5320 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5324 /* Compute the sum of X and Y, making canonicalizations assumed in an
5325 address, namely: sum constant integers, surround the sum of two
5326 constants with a CONST, put the constant as the second operand, and
5327 group the constant on the outermost sum.
5329 This routine assumes both inputs are already in canonical form. */
5332 form_sum (enum machine_mode mode, rtx x, rtx y)
5336 gcc_assert (GET_MODE (x) == mode || GET_MODE (x) == VOIDmode);
5337 gcc_assert (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode);
5339 if (CONST_INT_P (x))
5340 return plus_constant (y, INTVAL (x));
5341 else if (CONST_INT_P (y))
5342 return plus_constant (x, INTVAL (y));
5343 else if (CONSTANT_P (x))
5344 tem = x, x = y, y = tem;
5346 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5347 return form_sum (mode, XEXP (x, 0), form_sum (mode, XEXP (x, 1), y));
5349 /* Note that if the operands of Y are specified in the opposite
5350 order in the recursive calls below, infinite recursion will occur. */
5351 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5352 return form_sum (mode, form_sum (mode, x, XEXP (y, 0)), XEXP (y, 1));
5354 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5355 constant will have been placed second. */
5356 if (CONSTANT_P (x) && CONSTANT_P (y))
5358 if (GET_CODE (x) == CONST)
5360 if (GET_CODE (y) == CONST)
5363 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5366 return gen_rtx_PLUS (mode, x, y);
5369 /* If ADDR is a sum containing a pseudo register that should be
5370 replaced with a constant (from reg_equiv_constant),
5371 return the result of doing so, and also apply the associative
5372 law so that the result is more likely to be a valid address.
5373 (But it is not guaranteed to be one.)
5375 Note that at most one register is replaced, even if more are
5376 replaceable. Also, we try to put the result into a canonical form
5377 so it is more likely to be a valid address.
5379 In all other cases, return ADDR. */
5382 subst_indexed_address (rtx addr)
5384 rtx op0 = 0, op1 = 0, op2 = 0;
5388 if (GET_CODE (addr) == PLUS)
5390 /* Try to find a register to replace. */
5391 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5393 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5394 && reg_renumber[regno] < 0
5395 && reg_equiv_constant (regno) != 0)
5396 op0 = reg_equiv_constant (regno);
5397 else if (REG_P (op1)
5398 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5399 && reg_renumber[regno] < 0
5400 && reg_equiv_constant (regno) != 0)
5401 op1 = reg_equiv_constant (regno);
5402 else if (GET_CODE (op0) == PLUS
5403 && (tem = subst_indexed_address (op0)) != op0)
5405 else if (GET_CODE (op1) == PLUS
5406 && (tem = subst_indexed_address (op1)) != op1)
5411 /* Pick out up to three things to add. */
5412 if (GET_CODE (op1) == PLUS)
5413 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5414 else if (GET_CODE (op0) == PLUS)
5415 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5417 /* Compute the sum. */
5419 op1 = form_sum (GET_MODE (addr), op1, op2);
5421 op0 = form_sum (GET_MODE (addr), op0, op1);
5428 /* Update the REG_INC notes for an insn. It updates all REG_INC
5429 notes for the instruction which refer to REGNO the to refer
5430 to the reload number.
5432 INSN is the insn for which any REG_INC notes need updating.
5434 REGNO is the register number which has been reloaded.
5436 RELOADNUM is the reload number. */
5439 update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
5440 int reloadnum ATTRIBUTE_UNUSED)
5445 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5446 if (REG_NOTE_KIND (link) == REG_INC
5447 && (int) REGNO (XEXP (link, 0)) == regno)
5448 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5452 /* Record the pseudo registers we must reload into hard registers in a
5453 subexpression of a would-be memory address, X referring to a value
5454 in mode MODE. (This function is not called if the address we find
5457 CONTEXT = 1 means we are considering regs as index regs,
5458 = 0 means we are considering them as base regs.
5459 OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5461 If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5462 is the code of the index part of the address. Otherwise, pass SCRATCH
5464 OPNUM and TYPE specify the purpose of any reloads made.
5466 IND_LEVELS says how many levels of indirect addressing are
5467 supported at this point in the address.
5469 INSN, if nonzero, is the insn in which we do the reload. It is used
5470 to determine if we may generate output reloads.
5472 We return nonzero if X, as a whole, is reloaded or replaced. */
5474 /* Note that we take shortcuts assuming that no multi-reg machine mode
5475 occurs as part of an address.
5476 Also, this is not fully machine-customizable; it works for machines
5477 such as VAXen and 68000's and 32000's, but other possible machines
5478 could have addressing modes that this does not handle right.
5479 If you add push_reload calls here, you need to make sure gen_reload
5480 handles those cases gracefully. */
5483 find_reloads_address_1 (enum machine_mode mode, rtx x, int context,
5484 enum rtx_code outer_code, enum rtx_code index_code,
5485 rtx *loc, int opnum, enum reload_type type,
5486 int ind_levels, rtx insn)
5488 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, OUTER, INDEX) \
5490 ? regno_ok_for_base_p (REGNO, MODE, OUTER, INDEX) \
5491 : REGNO_OK_FOR_INDEX_P (REGNO))
5493 enum reg_class context_reg_class;
5494 RTX_CODE code = GET_CODE (x);
5497 context_reg_class = INDEX_REG_CLASS;
5499 context_reg_class = base_reg_class (mode, outer_code, index_code);
5505 rtx orig_op0 = XEXP (x, 0);
5506 rtx orig_op1 = XEXP (x, 1);
5507 RTX_CODE code0 = GET_CODE (orig_op0);
5508 RTX_CODE code1 = GET_CODE (orig_op1);
5512 if (GET_CODE (op0) == SUBREG)
5514 op0 = SUBREG_REG (op0);
5515 code0 = GET_CODE (op0);
5516 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5517 op0 = gen_rtx_REG (word_mode,
5519 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5520 GET_MODE (SUBREG_REG (orig_op0)),
5521 SUBREG_BYTE (orig_op0),
5522 GET_MODE (orig_op0))));
5525 if (GET_CODE (op1) == SUBREG)
5527 op1 = SUBREG_REG (op1);
5528 code1 = GET_CODE (op1);
5529 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5530 /* ??? Why is this given op1's mode and above for
5531 ??? op0 SUBREGs we use word_mode? */
5532 op1 = gen_rtx_REG (GET_MODE (op1),
5534 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5535 GET_MODE (SUBREG_REG (orig_op1)),
5536 SUBREG_BYTE (orig_op1),
5537 GET_MODE (orig_op1))));
5539 /* Plus in the index register may be created only as a result of
5540 register rematerialization for expression like &localvar*4. Reload it.
5541 It may be possible to combine the displacement on the outer level,
5542 but it is probably not worthwhile to do so. */
5545 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5546 opnum, ADDR_TYPE (type), ind_levels, insn);
5547 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5549 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5553 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5554 || code0 == ZERO_EXTEND || code1 == MEM)
5556 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5557 &XEXP (x, 0), opnum, type, ind_levels,
5559 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5560 &XEXP (x, 1), opnum, type, ind_levels,
5564 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5565 || code1 == ZERO_EXTEND || code0 == MEM)
5567 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5568 &XEXP (x, 0), opnum, type, ind_levels,
5570 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5571 &XEXP (x, 1), opnum, type, ind_levels,
5575 else if (code0 == CONST_INT || code0 == CONST
5576 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5577 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5578 &XEXP (x, 1), opnum, type, ind_levels,
5581 else if (code1 == CONST_INT || code1 == CONST
5582 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5583 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5584 &XEXP (x, 0), opnum, type, ind_levels,
5587 else if (code0 == REG && code1 == REG)
5589 if (REGNO_OK_FOR_INDEX_P (REGNO (op1))
5590 && regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5592 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0))
5593 && regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5595 else if (regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5596 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5597 &XEXP (x, 1), opnum, type, ind_levels,
5599 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1)))
5600 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5601 &XEXP (x, 0), opnum, type, ind_levels,
5603 else if (regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5604 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5605 &XEXP (x, 0), opnum, type, ind_levels,
5607 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0)))
5608 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5609 &XEXP (x, 1), opnum, type, ind_levels,
5613 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5614 &XEXP (x, 0), opnum, type, ind_levels,
5616 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5617 &XEXP (x, 1), opnum, type, ind_levels,
5622 else if (code0 == REG)
5624 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5625 &XEXP (x, 0), opnum, type, ind_levels,
5627 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5628 &XEXP (x, 1), opnum, type, ind_levels,
5632 else if (code1 == REG)
5634 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5635 &XEXP (x, 1), opnum, type, ind_levels,
5637 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5638 &XEXP (x, 0), opnum, type, ind_levels,
5648 rtx op0 = XEXP (x, 0);
5649 rtx op1 = XEXP (x, 1);
5650 enum rtx_code index_code;
5654 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5657 /* Currently, we only support {PRE,POST}_MODIFY constructs
5658 where a base register is {inc,dec}remented by the contents
5659 of another register or by a constant value. Thus, these
5660 operands must match. */
5661 gcc_assert (op0 == XEXP (op1, 0));
5663 /* Require index register (or constant). Let's just handle the
5664 register case in the meantime... If the target allows
5665 auto-modify by a constant then we could try replacing a pseudo
5666 register with its equivalent constant where applicable.
5668 We also handle the case where the register was eliminated
5669 resulting in a PLUS subexpression.
5671 If we later decide to reload the whole PRE_MODIFY or
5672 POST_MODIFY, inc_for_reload might clobber the reload register
5673 before reading the index. The index register might therefore
5674 need to live longer than a TYPE reload normally would, so be
5675 conservative and class it as RELOAD_OTHER. */
5676 if ((REG_P (XEXP (op1, 1))
5677 && !REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5678 || GET_CODE (XEXP (op1, 1)) == PLUS)
5679 find_reloads_address_1 (mode, XEXP (op1, 1), 1, code, SCRATCH,
5680 &XEXP (op1, 1), opnum, RELOAD_OTHER,
5683 gcc_assert (REG_P (XEXP (op1, 0)));
5685 regno = REGNO (XEXP (op1, 0));
5686 index_code = GET_CODE (XEXP (op1, 1));
5688 /* A register that is incremented cannot be constant! */
5689 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5690 || reg_equiv_constant (regno) == 0);
5692 /* Handle a register that is equivalent to a memory location
5693 which cannot be addressed directly. */
5694 if (reg_equiv_memory_loc (regno) != 0
5695 && (reg_equiv_address (regno) != 0
5696 || num_not_at_initial_offset))
5698 rtx tem = make_memloc (XEXP (x, 0), regno);
5700 if (reg_equiv_address (regno)
5701 || ! rtx_equal_p (tem, reg_equiv_mem (regno)))
5705 /* First reload the memory location's address.
5706 We can't use ADDR_TYPE (type) here, because we need to
5707 write back the value after reading it, hence we actually
5708 need two registers. */
5709 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5710 &XEXP (tem, 0), opnum,
5714 if (!rtx_equal_p (tem, orig))
5715 push_reg_equiv_alt_mem (regno, tem);
5717 /* Then reload the memory location into a base
5719 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5721 base_reg_class (mode, code,
5723 GET_MODE (x), GET_MODE (x), 0,
5724 0, opnum, RELOAD_OTHER);
5726 update_auto_inc_notes (this_insn, regno, reloadnum);
5731 if (reg_renumber[regno] >= 0)
5732 regno = reg_renumber[regno];
5734 /* We require a base register here... */
5735 if (!regno_ok_for_base_p (regno, GET_MODE (x), code, index_code))
5737 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5738 &XEXP (op1, 0), &XEXP (x, 0),
5739 base_reg_class (mode, code, index_code),
5740 GET_MODE (x), GET_MODE (x), 0, 0,
5741 opnum, RELOAD_OTHER);
5743 update_auto_inc_notes (this_insn, regno, reloadnum);
5753 if (REG_P (XEXP (x, 0)))
5755 int regno = REGNO (XEXP (x, 0));
5759 /* A register that is incremented cannot be constant! */
5760 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5761 || reg_equiv_constant (regno) == 0);
5763 /* Handle a register that is equivalent to a memory location
5764 which cannot be addressed directly. */
5765 if (reg_equiv_memory_loc (regno) != 0
5766 && (reg_equiv_address (regno) != 0 || num_not_at_initial_offset))
5768 rtx tem = make_memloc (XEXP (x, 0), regno);
5769 if (reg_equiv_address (regno)
5770 || ! rtx_equal_p (tem, reg_equiv_mem (regno)))
5774 /* First reload the memory location's address.
5775 We can't use ADDR_TYPE (type) here, because we need to
5776 write back the value after reading it, hence we actually
5777 need two registers. */
5778 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5779 &XEXP (tem, 0), opnum, type,
5781 if (!rtx_equal_p (tem, orig))
5782 push_reg_equiv_alt_mem (regno, tem);
5783 /* Put this inside a new increment-expression. */
5784 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5785 /* Proceed to reload that, as if it contained a register. */
5789 /* If we have a hard register that is ok in this incdec context,
5790 don't make a reload. If the register isn't nice enough for
5791 autoincdec, we can reload it. But, if an autoincrement of a
5792 register that we here verified as playing nice, still outside
5793 isn't "valid", it must be that no autoincrement is "valid".
5794 If that is true and something made an autoincrement anyway,
5795 this must be a special context where one is allowed.
5796 (For example, a "push" instruction.)
5797 We can't improve this address, so leave it alone. */
5799 /* Otherwise, reload the autoincrement into a suitable hard reg
5800 and record how much to increment by. */
5802 if (reg_renumber[regno] >= 0)
5803 regno = reg_renumber[regno];
5804 if (regno >= FIRST_PSEUDO_REGISTER
5805 || !REG_OK_FOR_CONTEXT (context, regno, mode, code,
5810 /* If we can output the register afterwards, do so, this
5811 saves the extra update.
5812 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5813 CALL_INSN - and it does not set CC0.
5814 But don't do this if we cannot directly address the
5815 memory location, since this will make it harder to
5816 reuse address reloads, and increases register pressure.
5817 Also don't do this if we can probably update x directly. */
5818 rtx equiv = (MEM_P (XEXP (x, 0))
5820 : reg_equiv_mem (regno));
5821 enum insn_code icode = optab_handler (add_optab, GET_MODE (x));
5822 if (insn && NONJUMP_INSN_P (insn) && equiv
5823 && memory_operand (equiv, GET_MODE (equiv))
5825 && ! sets_cc0_p (PATTERN (insn))
5827 && ! (icode != CODE_FOR_nothing
5828 && insn_operand_matches (icode, 0, equiv)
5829 && insn_operand_matches (icode, 1, equiv)))
5831 /* We use the original pseudo for loc, so that
5832 emit_reload_insns() knows which pseudo this
5833 reload refers to and updates the pseudo rtx, not
5834 its equivalent memory location, as well as the
5835 corresponding entry in reg_last_reload_reg. */
5836 loc = &XEXP (x_orig, 0);
5839 = push_reload (x, x, loc, loc,
5841 GET_MODE (x), GET_MODE (x), 0, 0,
5842 opnum, RELOAD_OTHER);
5847 = push_reload (x, x, loc, (rtx*) 0,
5849 GET_MODE (x), GET_MODE (x), 0, 0,
5852 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5857 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5867 /* Look for parts to reload in the inner expression and reload them
5868 too, in addition to this operation. Reloading all inner parts in
5869 addition to this one shouldn't be necessary, but at this point,
5870 we don't know if we can possibly omit any part that *can* be
5871 reloaded. Targets that are better off reloading just either part
5872 (or perhaps even a different part of an outer expression), should
5873 define LEGITIMIZE_RELOAD_ADDRESS. */
5874 find_reloads_address_1 (GET_MODE (XEXP (x, 0)), XEXP (x, 0),
5875 context, code, SCRATCH, &XEXP (x, 0), opnum,
5876 type, ind_levels, insn);
5877 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5879 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5883 /* This is probably the result of a substitution, by eliminate_regs, of
5884 an equivalent address for a pseudo that was not allocated to a hard
5885 register. Verify that the specified address is valid and reload it
5888 Since we know we are going to reload this item, don't decrement for
5889 the indirection level.
5891 Note that this is actually conservative: it would be slightly more
5892 efficient to use the value of SPILL_INDIRECT_LEVELS from
5895 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5896 opnum, ADDR_TYPE (type), ind_levels, insn);
5897 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5899 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5904 int regno = REGNO (x);
5906 if (reg_equiv_constant (regno) != 0)
5908 find_reloads_address_part (reg_equiv_constant (regno), loc,
5910 GET_MODE (x), opnum, type, ind_levels);
5914 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5915 that feeds this insn. */
5916 if (reg_equiv_mem (regno) != 0)
5918 push_reload (reg_equiv_mem (regno), NULL_RTX, loc, (rtx*) 0,
5920 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5925 if (reg_equiv_memory_loc (regno)
5926 && (reg_equiv_address (regno) != 0 || num_not_at_initial_offset))
5928 rtx tem = make_memloc (x, regno);
5929 if (reg_equiv_address (regno) != 0
5930 || ! rtx_equal_p (tem, reg_equiv_mem (regno)))
5933 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5934 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5936 if (!rtx_equal_p (x, tem))
5937 push_reg_equiv_alt_mem (regno, x);
5941 if (reg_renumber[regno] >= 0)
5942 regno = reg_renumber[regno];
5944 if (regno >= FIRST_PSEUDO_REGISTER
5945 || !REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5948 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5950 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5954 /* If a register appearing in an address is the subject of a CLOBBER
5955 in this insn, reload it into some other register to be safe.
5956 The CLOBBER is supposed to make the register unavailable
5957 from before this insn to after it. */
5958 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5960 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5962 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5969 if (REG_P (SUBREG_REG (x)))
5971 /* If this is a SUBREG of a hard register and the resulting register
5972 is of the wrong class, reload the whole SUBREG. This avoids
5973 needless copies if SUBREG_REG is multi-word. */
5974 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5976 int regno ATTRIBUTE_UNUSED = subreg_regno (x);
5978 if (!REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5981 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5983 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5987 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5988 is larger than the class size, then reload the whole SUBREG. */
5991 enum reg_class rclass = context_reg_class;
5992 if (ira_reg_class_max_nregs [rclass][GET_MODE (SUBREG_REG (x))]
5993 > reg_class_size[(int) rclass])
5995 x = find_reloads_subreg_address (x, 0, opnum,
5997 ind_levels, insn, NULL);
5998 push_reload (x, NULL_RTX, loc, (rtx*) 0, rclass,
5999 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
6011 const char *fmt = GET_RTX_FORMAT (code);
6014 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6017 /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
6019 find_reloads_address_1 (mode, XEXP (x, i), context, code, SCRATCH,
6020 &XEXP (x, i), opnum, type, ind_levels, insn);
6024 #undef REG_OK_FOR_CONTEXT
6028 /* X, which is found at *LOC, is a part of an address that needs to be
6029 reloaded into a register of class RCLASS. If X is a constant, or if
6030 X is a PLUS that contains a constant, check that the constant is a
6031 legitimate operand and that we are supposed to be able to load
6032 it into the register.
6034 If not, force the constant into memory and reload the MEM instead.
6036 MODE is the mode to use, in case X is an integer constant.
6038 OPNUM and TYPE describe the purpose of any reloads made.
6040 IND_LEVELS says how many levels of indirect addressing this machine
6044 find_reloads_address_part (rtx x, rtx *loc, enum reg_class rclass,
6045 enum machine_mode mode, int opnum,
6046 enum reload_type type, int ind_levels)
6049 && (!targetm.legitimate_constant_p (mode, x)
6050 || targetm.preferred_reload_class (x, rclass) == NO_REGS))
6052 x = force_const_mem (mode, x);
6053 find_reloads_address (mode, &x, XEXP (x, 0), &XEXP (x, 0),
6054 opnum, type, ind_levels, 0);
6057 else if (GET_CODE (x) == PLUS
6058 && CONSTANT_P (XEXP (x, 1))
6059 && (!targetm.legitimate_constant_p (GET_MODE (x), XEXP (x, 1))
6060 || targetm.preferred_reload_class (XEXP (x, 1), rclass)
6065 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
6066 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
6067 find_reloads_address (mode, &XEXP (x, 1), XEXP (tem, 0), &XEXP (tem, 0),
6068 opnum, type, ind_levels, 0);
6071 push_reload (x, NULL_RTX, loc, (rtx*) 0, rclass,
6072 mode, VOIDmode, 0, 0, opnum, type);
6075 /* X, a subreg of a pseudo, is a part of an address that needs to be
6078 If the pseudo is equivalent to a memory location that cannot be directly
6079 addressed, make the necessary address reloads.
6081 If address reloads have been necessary, or if the address is changed
6082 by register elimination, return the rtx of the memory location;
6083 otherwise, return X.
6085 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
6088 OPNUM and TYPE identify the purpose of the reload.
6090 IND_LEVELS says how many levels of indirect addressing are
6091 supported at this point in the address.
6093 INSN, if nonzero, is the insn in which we do the reload. It is used
6094 to determine where to put USEs for pseudos that we have to replace with
6098 find_reloads_subreg_address (rtx x, int force_replace, int opnum,
6099 enum reload_type type, int ind_levels, rtx insn,
6100 int *address_reloaded)
6102 int regno = REGNO (SUBREG_REG (x));
6105 if (reg_equiv_memory_loc (regno))
6107 /* If the address is not directly addressable, or if the address is not
6108 offsettable, then it must be replaced. */
6110 && (reg_equiv_address (regno)
6111 || ! offsettable_memref_p (reg_equiv_mem (regno))))
6114 if (force_replace || num_not_at_initial_offset)
6116 rtx tem = make_memloc (SUBREG_REG (x), regno);
6118 /* If the address changes because of register elimination, then
6119 it must be replaced. */
6121 || ! rtx_equal_p (tem, reg_equiv_mem (regno)))
6123 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
6124 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
6128 /* For big-endian paradoxical subregs, SUBREG_BYTE does not
6129 hold the correct (negative) byte offset. */
6130 if (BYTES_BIG_ENDIAN && outer_size > inner_size)
6131 offset = inner_size - outer_size;
6133 offset = SUBREG_BYTE (x);
6135 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
6136 PUT_MODE (tem, GET_MODE (x));
6137 if (MEM_OFFSET_KNOWN_P (tem))
6138 set_mem_offset (tem, MEM_OFFSET (tem) + offset);
6139 if (MEM_SIZE_KNOWN_P (tem)
6140 && MEM_SIZE (tem) != (HOST_WIDE_INT) outer_size)
6141 set_mem_size (tem, outer_size);
6143 /* If this was a paradoxical subreg that we replaced, the
6144 resulting memory must be sufficiently aligned to allow
6145 us to widen the mode of the memory. */
6146 if (outer_size > inner_size)
6150 base = XEXP (tem, 0);
6151 if (GET_CODE (base) == PLUS)
6153 if (CONST_INT_P (XEXP (base, 1))
6154 && INTVAL (XEXP (base, 1)) % outer_size != 0)
6156 base = XEXP (base, 0);
6159 || (REGNO_POINTER_ALIGN (REGNO (base))
6160 < outer_size * BITS_PER_UNIT))
6164 reloaded = find_reloads_address (GET_MODE (tem), &tem,
6165 XEXP (tem, 0), &XEXP (tem, 0),
6166 opnum, type, ind_levels, insn);
6167 /* ??? Do we need to handle nonzero offsets somehow? */
6168 if (!offset && !rtx_equal_p (tem, orig))
6169 push_reg_equiv_alt_mem (regno, tem);
6171 /* For some processors an address may be valid in the
6172 original mode but not in a smaller mode. For
6173 example, ARM accepts a scaled index register in
6174 SImode but not in HImode. Note that this is only
6175 a problem if the address in reg_equiv_mem is already
6176 invalid in the new mode; other cases would be fixed
6177 by find_reloads_address as usual.
6179 ??? We attempt to handle such cases here by doing an
6180 additional reload of the full address after the
6181 usual processing by find_reloads_address. Note that
6182 this may not work in the general case, but it seems
6183 to cover the cases where this situation currently
6184 occurs. A more general fix might be to reload the
6185 *value* instead of the address, but this would not
6186 be expected by the callers of this routine as-is.
6188 If find_reloads_address already completed replaced
6189 the address, there is nothing further to do. */
6191 && reg_equiv_mem (regno) != 0
6192 && !strict_memory_address_addr_space_p
6193 (GET_MODE (x), XEXP (reg_equiv_mem (regno), 0),
6194 MEM_ADDR_SPACE (reg_equiv_mem (regno))))
6196 push_reload (XEXP (tem, 0), NULL_RTX, &XEXP (tem, 0), (rtx*) 0,
6197 base_reg_class (GET_MODE (tem), MEM, SCRATCH),
6198 GET_MODE (XEXP (tem, 0)), VOIDmode, 0, 0,
6202 /* If this is not a toplevel operand, find_reloads doesn't see
6203 this substitution. We have to emit a USE of the pseudo so
6204 that delete_output_reload can see it. */
6205 if (replace_reloads && recog_data.operand[opnum] != x)
6206 /* We mark the USE with QImode so that we recognize it
6207 as one that can be safely deleted at the end of
6209 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
6216 if (reloaded && address_reloaded)
6217 *address_reloaded = 1;
6222 /* Substitute into the current INSN the registers into which we have reloaded
6223 the things that need reloading. The array `replacements'
6224 contains the locations of all pointers that must be changed
6225 and says what to replace them with.
6227 Return the rtx that X translates into; usually X, but modified. */
6230 subst_reloads (rtx insn)
6234 for (i = 0; i < n_replacements; i++)
6236 struct replacement *r = &replacements[i];
6237 rtx reloadreg = rld[r->what].reg_rtx;
6241 /* This checking takes a very long time on some platforms
6242 causing the gcc.c-torture/compile/limits-fnargs.c test
6243 to time out during testing. See PR 31850.
6245 Internal consistency test. Check that we don't modify
6246 anything in the equivalence arrays. Whenever something from
6247 those arrays needs to be reloaded, it must be unshared before
6248 being substituted into; the equivalence must not be modified.
6249 Otherwise, if the equivalence is used after that, it will
6250 have been modified, and the thing substituted (probably a
6251 register) is likely overwritten and not a usable equivalence. */
6254 for (check_regno = 0; check_regno < max_regno; check_regno++)
6256 #define CHECK_MODF(ARRAY) \
6257 gcc_assert (!VEC_index (reg_equivs_t, reg_equivs, check_regno).ARRAY \
6258 || !loc_mentioned_in_p (r->where, \
6259 VEC_index (reg_equivs_t, reg_equivs, check_regno).ARRAY))
6261 CHECK_MODF (equiv_constant);
6262 CHECK_MODF (equiv_memory_loc);
6263 CHECK_MODF (equiv_address);
6264 CHECK_MODF (equiv_mem);
6267 #endif /* DEBUG_RELOAD */
6269 /* If we're replacing a LABEL_REF with a register, there must
6270 already be an indication (to e.g. flow) which label this
6271 register refers to. */
6272 gcc_assert (GET_CODE (*r->where) != LABEL_REF
6274 || find_reg_note (insn,
6276 XEXP (*r->where, 0))
6277 || label_is_jump_target_p (XEXP (*r->where, 0), insn));
6279 /* Encapsulate RELOADREG so its machine mode matches what
6280 used to be there. Note that gen_lowpart_common will
6281 do the wrong thing if RELOADREG is multi-word. RELOADREG
6282 will always be a REG here. */
6283 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
6284 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6286 *r->where = reloadreg;
6288 /* If reload got no reg and isn't optional, something's wrong. */
6290 gcc_assert (rld[r->what].optional);
6294 /* Make a copy of any replacements being done into X and move those
6295 copies to locations in Y, a copy of X. */
6298 copy_replacements (rtx x, rtx y)
6300 copy_replacements_1 (&x, &y, n_replacements);
6304 copy_replacements_1 (rtx *px, rtx *py, int orig_replacements)
6308 struct replacement *r;
6312 for (j = 0; j < orig_replacements; j++)
6313 if (replacements[j].where == px)
6315 r = &replacements[n_replacements++];
6317 r->what = replacements[j].what;
6318 r->mode = replacements[j].mode;
6323 code = GET_CODE (x);
6324 fmt = GET_RTX_FORMAT (code);
6326 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6329 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6330 else if (fmt[i] == 'E')
6331 for (j = XVECLEN (x, i); --j >= 0; )
6332 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6337 /* Change any replacements being done to *X to be done to *Y. */
6340 move_replacements (rtx *x, rtx *y)
6344 for (i = 0; i < n_replacements; i++)
6345 if (replacements[i].where == x)
6346 replacements[i].where = y;
6349 /* If LOC was scheduled to be replaced by something, return the replacement.
6350 Otherwise, return *LOC. */
6353 find_replacement (rtx *loc)
6355 struct replacement *r;
6357 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6359 rtx reloadreg = rld[r->what].reg_rtx;
6361 if (reloadreg && r->where == loc)
6363 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6364 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6368 else if (reloadreg && GET_CODE (*loc) == SUBREG
6369 && r->where == &SUBREG_REG (*loc))
6371 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6372 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6374 return simplify_gen_subreg (GET_MODE (*loc), reloadreg,
6375 GET_MODE (SUBREG_REG (*loc)),
6376 SUBREG_BYTE (*loc));
6380 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6381 what's inside and make a new rtl if so. */
6382 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6383 || GET_CODE (*loc) == MULT)
6385 rtx x = find_replacement (&XEXP (*loc, 0));
6386 rtx y = find_replacement (&XEXP (*loc, 1));
6388 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6389 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6395 /* Return nonzero if register in range [REGNO, ENDREGNO)
6396 appears either explicitly or implicitly in X
6397 other than being stored into (except for earlyclobber operands).
6399 References contained within the substructure at LOC do not count.
6400 LOC may be zero, meaning don't ignore anything.
6402 This is similar to refers_to_regno_p in rtlanal.c except that we
6403 look at equivalences for pseudos that didn't get hard registers. */
6406 refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno,
6418 code = GET_CODE (x);
6425 /* If this is a pseudo, a hard register must not have been allocated.
6426 X must therefore either be a constant or be in memory. */
6427 if (r >= FIRST_PSEUDO_REGISTER)
6429 if (reg_equiv_memory_loc (r))
6430 return refers_to_regno_for_reload_p (regno, endregno,
6431 reg_equiv_memory_loc (r),
6434 gcc_assert (reg_equiv_constant (r) || reg_equiv_invariant (r));
6438 return (endregno > r
6439 && regno < r + (r < FIRST_PSEUDO_REGISTER
6440 ? hard_regno_nregs[r][GET_MODE (x)]
6444 /* If this is a SUBREG of a hard reg, we can see exactly which
6445 registers are being modified. Otherwise, handle normally. */
6446 if (REG_P (SUBREG_REG (x))
6447 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6449 unsigned int inner_regno = subreg_regno (x);
6450 unsigned int inner_endregno
6451 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6452 ? subreg_nregs (x) : 1);
6454 return endregno > inner_regno && regno < inner_endregno;
6460 if (&SET_DEST (x) != loc
6461 /* Note setting a SUBREG counts as referring to the REG it is in for
6462 a pseudo but not for hard registers since we can
6463 treat each word individually. */
6464 && ((GET_CODE (SET_DEST (x)) == SUBREG
6465 && loc != &SUBREG_REG (SET_DEST (x))
6466 && REG_P (SUBREG_REG (SET_DEST (x)))
6467 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6468 && refers_to_regno_for_reload_p (regno, endregno,
6469 SUBREG_REG (SET_DEST (x)),
6471 /* If the output is an earlyclobber operand, this is
6473 || ((!REG_P (SET_DEST (x))
6474 || earlyclobber_operand_p (SET_DEST (x)))
6475 && refers_to_regno_for_reload_p (regno, endregno,
6476 SET_DEST (x), loc))))
6479 if (code == CLOBBER || loc == &SET_SRC (x))
6488 /* X does not match, so try its subexpressions. */
6490 fmt = GET_RTX_FORMAT (code);
6491 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6493 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6501 if (refers_to_regno_for_reload_p (regno, endregno,
6505 else if (fmt[i] == 'E')
6508 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6509 if (loc != &XVECEXP (x, i, j)
6510 && refers_to_regno_for_reload_p (regno, endregno,
6511 XVECEXP (x, i, j), loc))
6518 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6519 we check if any register number in X conflicts with the relevant register
6520 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6521 contains a MEM (we don't bother checking for memory addresses that can't
6522 conflict because we expect this to be a rare case.
6524 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6525 that we look at equivalences for pseudos that didn't get hard registers. */
6528 reg_overlap_mentioned_for_reload_p (rtx x, rtx in)
6530 int regno, endregno;
6532 /* Overly conservative. */
6533 if (GET_CODE (x) == STRICT_LOW_PART
6534 || GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
6537 /* If either argument is a constant, then modifying X can not affect IN. */
6538 if (CONSTANT_P (x) || CONSTANT_P (in))
6540 else if (GET_CODE (x) == SUBREG && MEM_P (SUBREG_REG (x)))
6541 return refers_to_mem_for_reload_p (in);
6542 else if (GET_CODE (x) == SUBREG)
6544 regno = REGNO (SUBREG_REG (x));
6545 if (regno < FIRST_PSEUDO_REGISTER)
6546 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6547 GET_MODE (SUBREG_REG (x)),
6550 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6551 ? subreg_nregs (x) : 1);
6553 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6559 /* If this is a pseudo, it must not have been assigned a hard register.
6560 Therefore, it must either be in memory or be a constant. */
6562 if (regno >= FIRST_PSEUDO_REGISTER)
6564 if (reg_equiv_memory_loc (regno))
6565 return refers_to_mem_for_reload_p (in);
6566 gcc_assert (reg_equiv_constant (regno));
6570 endregno = END_HARD_REGNO (x);
6572 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6575 return refers_to_mem_for_reload_p (in);
6576 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6577 || GET_CODE (x) == CC0)
6578 return reg_mentioned_p (x, in);
6581 gcc_assert (GET_CODE (x) == PLUS);
6583 /* We actually want to know if X is mentioned somewhere inside IN.
6584 We must not say that (plus (sp) (const_int 124)) is in
6585 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6586 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6587 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6592 else if (GET_CODE (in) == PLUS)
6593 return (rtx_equal_p (x, in)
6594 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 0))
6595 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 1)));
6596 else return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6597 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6603 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6607 refers_to_mem_for_reload_p (rtx x)
6616 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6617 && reg_equiv_memory_loc (REGNO (x)));
6619 fmt = GET_RTX_FORMAT (GET_CODE (x));
6620 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6622 && (MEM_P (XEXP (x, i))
6623 || refers_to_mem_for_reload_p (XEXP (x, i))))
6629 /* Check the insns before INSN to see if there is a suitable register
6630 containing the same value as GOAL.
6631 If OTHER is -1, look for a register in class RCLASS.
6632 Otherwise, just see if register number OTHER shares GOAL's value.
6634 Return an rtx for the register found, or zero if none is found.
6636 If RELOAD_REG_P is (short *)1,
6637 we reject any hard reg that appears in reload_reg_rtx
6638 because such a hard reg is also needed coming into this insn.
6640 If RELOAD_REG_P is any other nonzero value,
6641 it is a vector indexed by hard reg number
6642 and we reject any hard reg whose element in the vector is nonnegative
6643 as well as any that appears in reload_reg_rtx.
6645 If GOAL is zero, then GOALREG is a register number; we look
6646 for an equivalent for that register.
6648 MODE is the machine mode of the value we want an equivalence for.
6649 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6651 This function is used by jump.c as well as in the reload pass.
6653 If GOAL is the sum of the stack pointer and a constant, we treat it
6654 as if it were a constant except that sp is required to be unchanging. */
6657 find_equiv_reg (rtx goal, rtx insn, enum reg_class rclass, int other,
6658 short *reload_reg_p, int goalreg, enum machine_mode mode)
6661 rtx goaltry, valtry, value, where;
6667 int goal_mem_addr_varies = 0;
6668 int need_stable_sp = 0;
6675 else if (REG_P (goal))
6676 regno = REGNO (goal);
6677 else if (MEM_P (goal))
6679 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6680 if (MEM_VOLATILE_P (goal))
6682 if (flag_float_store && SCALAR_FLOAT_MODE_P (GET_MODE (goal)))
6684 /* An address with side effects must be reexecuted. */
6699 else if (CONSTANT_P (goal))
6701 else if (GET_CODE (goal) == PLUS
6702 && XEXP (goal, 0) == stack_pointer_rtx
6703 && CONSTANT_P (XEXP (goal, 1)))
6704 goal_const = need_stable_sp = 1;
6705 else if (GET_CODE (goal) == PLUS
6706 && XEXP (goal, 0) == frame_pointer_rtx
6707 && CONSTANT_P (XEXP (goal, 1)))
6713 /* Scan insns back from INSN, looking for one that copies
6714 a value into or out of GOAL.
6715 Stop and give up if we reach a label. */
6720 if (p && DEBUG_INSN_P (p))
6723 if (p == 0 || LABEL_P (p)
6724 || num > PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS))
6727 /* Don't reuse register contents from before a setjmp-type
6728 function call; on the second return (from the longjmp) it
6729 might have been clobbered by a later reuse. It doesn't
6730 seem worthwhile to actually go and see if it is actually
6731 reused even if that information would be readily available;
6732 just don't reuse it across the setjmp call. */
6733 if (CALL_P (p) && find_reg_note (p, REG_SETJMP, NULL_RTX))
6736 if (NONJUMP_INSN_P (p)
6737 /* If we don't want spill regs ... */
6738 && (! (reload_reg_p != 0
6739 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6740 /* ... then ignore insns introduced by reload; they aren't
6741 useful and can cause results in reload_as_needed to be
6742 different from what they were when calculating the need for
6743 spills. If we notice an input-reload insn here, we will
6744 reject it below, but it might hide a usable equivalent.
6745 That makes bad code. It may even fail: perhaps no reg was
6746 spilled for this insn because it was assumed we would find
6748 || INSN_UID (p) < reload_first_uid))
6751 pat = single_set (p);
6753 /* First check for something that sets some reg equal to GOAL. */
6756 && true_regnum (SET_SRC (pat)) == regno
6757 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6760 && true_regnum (SET_DEST (pat)) == regno
6761 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6763 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6764 /* When looking for stack pointer + const,
6765 make sure we don't use a stack adjust. */
6766 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6767 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6769 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6770 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6772 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6773 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6774 /* If we are looking for a constant,
6775 and something equivalent to that constant was copied
6776 into a reg, we can use that reg. */
6777 || (goal_const && REG_NOTES (p) != 0
6778 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6779 && ((rtx_equal_p (XEXP (tem, 0), goal)
6781 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6782 || (REG_P (SET_DEST (pat))
6783 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6784 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6785 && CONST_INT_P (goal)
6787 = operand_subword (XEXP (tem, 0), 0, 0,
6789 && rtx_equal_p (goal, goaltry)
6791 = operand_subword (SET_DEST (pat), 0, 0,
6793 && (valueno = true_regnum (valtry)) >= 0)))
6794 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6796 && REG_P (SET_DEST (pat))
6797 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6798 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6799 && CONST_INT_P (goal)
6800 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6802 && rtx_equal_p (goal, goaltry)
6804 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6805 && (valueno = true_regnum (valtry)) >= 0)))
6809 if (valueno != other)
6812 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6814 else if (!in_hard_reg_set_p (reg_class_contents[(int) rclass],
6824 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6825 (or copying VALUE into GOAL, if GOAL is also a register).
6826 Now verify that VALUE is really valid. */
6828 /* VALUENO is the register number of VALUE; a hard register. */
6830 /* Don't try to re-use something that is killed in this insn. We want
6831 to be able to trust REG_UNUSED notes. */
6832 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6835 /* If we propose to get the value from the stack pointer or if GOAL is
6836 a MEM based on the stack pointer, we need a stable SP. */
6837 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6838 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6842 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6843 if (GET_MODE (value) != mode)
6846 /* Reject VALUE if it was loaded from GOAL
6847 and is also a register that appears in the address of GOAL. */
6849 if (goal_mem && value == SET_DEST (single_set (where))
6850 && refers_to_regno_for_reload_p (valueno, end_hard_regno (mode, valueno),
6854 /* Reject registers that overlap GOAL. */
6856 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6857 nregs = hard_regno_nregs[regno][mode];
6860 valuenregs = hard_regno_nregs[valueno][mode];
6862 if (!goal_mem && !goal_const
6863 && regno + nregs > valueno && regno < valueno + valuenregs)
6866 /* Reject VALUE if it is one of the regs reserved for reloads.
6867 Reload1 knows how to reuse them anyway, and it would get
6868 confused if we allocated one without its knowledge.
6869 (Now that insns introduced by reload are ignored above,
6870 this case shouldn't happen, but I'm not positive.) */
6872 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6875 for (i = 0; i < valuenregs; ++i)
6876 if (reload_reg_p[valueno + i] >= 0)
6880 /* Reject VALUE if it is a register being used for an input reload
6881 even if it is not one of those reserved. */
6883 if (reload_reg_p != 0)
6886 for (i = 0; i < n_reloads; i++)
6887 if (rld[i].reg_rtx != 0 && rld[i].in)
6889 int regno1 = REGNO (rld[i].reg_rtx);
6890 int nregs1 = hard_regno_nregs[regno1]
6891 [GET_MODE (rld[i].reg_rtx)];
6892 if (regno1 < valueno + valuenregs
6893 && regno1 + nregs1 > valueno)
6899 /* We must treat frame pointer as varying here,
6900 since it can vary--in a nonlocal goto as generated by expand_goto. */
6901 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6903 /* Now verify that the values of GOAL and VALUE remain unaltered
6904 until INSN is reached. */
6913 /* Don't trust the conversion past a function call
6914 if either of the two is in a call-clobbered register, or memory. */
6919 if (goal_mem || need_stable_sp)
6922 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6923 for (i = 0; i < nregs; ++i)
6924 if (call_used_regs[regno + i]
6925 || HARD_REGNO_CALL_PART_CLOBBERED (regno + i, mode))
6928 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6929 for (i = 0; i < valuenregs; ++i)
6930 if (call_used_regs[valueno + i]
6931 || HARD_REGNO_CALL_PART_CLOBBERED (valueno + i, mode))
6939 /* Watch out for unspec_volatile, and volatile asms. */
6940 if (volatile_insn_p (pat))
6943 /* If this insn P stores in either GOAL or VALUE, return 0.
6944 If GOAL is a memory ref and this insn writes memory, return 0.
6945 If GOAL is a memory ref and its address is not constant,
6946 and this insn P changes a register used in GOAL, return 0. */
6948 if (GET_CODE (pat) == COND_EXEC)
6949 pat = COND_EXEC_CODE (pat);
6950 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6952 rtx dest = SET_DEST (pat);
6953 while (GET_CODE (dest) == SUBREG
6954 || GET_CODE (dest) == ZERO_EXTRACT
6955 || GET_CODE (dest) == STRICT_LOW_PART)
6956 dest = XEXP (dest, 0);
6959 int xregno = REGNO (dest);
6961 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6962 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
6965 if (xregno < regno + nregs && xregno + xnregs > regno)
6967 if (xregno < valueno + valuenregs
6968 && xregno + xnregs > valueno)
6970 if (goal_mem_addr_varies
6971 && reg_overlap_mentioned_for_reload_p (dest, goal))
6973 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6976 else if (goal_mem && MEM_P (dest)
6977 && ! push_operand (dest, GET_MODE (dest)))
6979 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
6980 && reg_equiv_memory_loc (regno) != 0)
6982 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6985 else if (GET_CODE (pat) == PARALLEL)
6988 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6990 rtx v1 = XVECEXP (pat, 0, i);
6991 if (GET_CODE (v1) == COND_EXEC)
6992 v1 = COND_EXEC_CODE (v1);
6993 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6995 rtx dest = SET_DEST (v1);
6996 while (GET_CODE (dest) == SUBREG
6997 || GET_CODE (dest) == ZERO_EXTRACT
6998 || GET_CODE (dest) == STRICT_LOW_PART)
6999 dest = XEXP (dest, 0);
7002 int xregno = REGNO (dest);
7004 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
7005 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
7008 if (xregno < regno + nregs
7009 && xregno + xnregs > regno)
7011 if (xregno < valueno + valuenregs
7012 && xregno + xnregs > valueno)
7014 if (goal_mem_addr_varies
7015 && reg_overlap_mentioned_for_reload_p (dest,
7018 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
7021 else if (goal_mem && MEM_P (dest)
7022 && ! push_operand (dest, GET_MODE (dest)))
7024 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
7025 && reg_equiv_memory_loc (regno) != 0)
7027 else if (need_stable_sp
7028 && push_operand (dest, GET_MODE (dest)))
7034 if (CALL_P (p) && CALL_INSN_FUNCTION_USAGE (p))
7038 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
7039 link = XEXP (link, 1))
7041 pat = XEXP (link, 0);
7042 if (GET_CODE (pat) == CLOBBER)
7044 rtx dest = SET_DEST (pat);
7048 int xregno = REGNO (dest);
7050 = hard_regno_nregs[xregno][GET_MODE (dest)];
7052 if (xregno < regno + nregs
7053 && xregno + xnregs > regno)
7055 else if (xregno < valueno + valuenregs
7056 && xregno + xnregs > valueno)
7058 else if (goal_mem_addr_varies
7059 && reg_overlap_mentioned_for_reload_p (dest,
7064 else if (goal_mem && MEM_P (dest)
7065 && ! push_operand (dest, GET_MODE (dest)))
7067 else if (need_stable_sp
7068 && push_operand (dest, GET_MODE (dest)))
7075 /* If this insn auto-increments or auto-decrements
7076 either regno or valueno, return 0 now.
7077 If GOAL is a memory ref and its address is not constant,
7078 and this insn P increments a register used in GOAL, return 0. */
7082 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
7083 if (REG_NOTE_KIND (link) == REG_INC
7084 && REG_P (XEXP (link, 0)))
7086 int incno = REGNO (XEXP (link, 0));
7087 if (incno < regno + nregs && incno >= regno)
7089 if (incno < valueno + valuenregs && incno >= valueno)
7091 if (goal_mem_addr_varies
7092 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
7102 /* Find a place where INCED appears in an increment or decrement operator
7103 within X, and return the amount INCED is incremented or decremented by.
7104 The value is always positive. */
7107 find_inc_amount (rtx x, rtx inced)
7109 enum rtx_code code = GET_CODE (x);
7115 rtx addr = XEXP (x, 0);
7116 if ((GET_CODE (addr) == PRE_DEC
7117 || GET_CODE (addr) == POST_DEC
7118 || GET_CODE (addr) == PRE_INC
7119 || GET_CODE (addr) == POST_INC)
7120 && XEXP (addr, 0) == inced)
7121 return GET_MODE_SIZE (GET_MODE (x));
7122 else if ((GET_CODE (addr) == PRE_MODIFY
7123 || GET_CODE (addr) == POST_MODIFY)
7124 && GET_CODE (XEXP (addr, 1)) == PLUS
7125 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
7126 && XEXP (addr, 0) == inced
7127 && CONST_INT_P (XEXP (XEXP (addr, 1), 1)))
7129 i = INTVAL (XEXP (XEXP (addr, 1), 1));
7130 return i < 0 ? -i : i;
7134 fmt = GET_RTX_FORMAT (code);
7135 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7139 int tem = find_inc_amount (XEXP (x, i), inced);
7146 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7148 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
7158 /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7159 REG_INC note in insn INSN. REGNO must refer to a hard register. */
7163 reg_inc_found_and_valid_p (unsigned int regno, unsigned int endregno,
7170 if (! INSN_P (insn))
7173 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
7174 if (REG_NOTE_KIND (link) == REG_INC)
7176 unsigned int test = (int) REGNO (XEXP (link, 0));
7177 if (test >= regno && test < endregno)
7184 #define reg_inc_found_and_valid_p(regno,endregno,insn) 0
7188 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7189 If SETS is 1, also consider SETs. If SETS is 2, enable checking
7190 REG_INC. REGNO must refer to a hard register. */
7193 regno_clobbered_p (unsigned int regno, rtx insn, enum machine_mode mode,
7196 unsigned int nregs, endregno;
7198 /* regno must be a hard register. */
7199 gcc_assert (regno < FIRST_PSEUDO_REGISTER);
7201 nregs = hard_regno_nregs[regno][mode];
7202 endregno = regno + nregs;
7204 if ((GET_CODE (PATTERN (insn)) == CLOBBER
7205 || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7206 && REG_P (XEXP (PATTERN (insn), 0)))
7208 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
7210 return test >= regno && test < endregno;
7213 if (sets == 2 && reg_inc_found_and_valid_p (regno, endregno, insn))
7216 if (GET_CODE (PATTERN (insn)) == PARALLEL)
7218 int i = XVECLEN (PATTERN (insn), 0) - 1;
7222 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7223 if ((GET_CODE (elt) == CLOBBER
7224 || (sets == 1 && GET_CODE (elt) == SET))
7225 && REG_P (XEXP (elt, 0)))
7227 unsigned int test = REGNO (XEXP (elt, 0));
7229 if (test >= regno && test < endregno)
7233 && reg_inc_found_and_valid_p (regno, endregno, elt))
7241 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7243 reload_adjust_reg_for_mode (rtx reloadreg, enum machine_mode mode)
7247 if (GET_MODE (reloadreg) == mode)
7250 regno = REGNO (reloadreg);
7252 if (REG_WORDS_BIG_ENDIAN)
7253 regno += (int) hard_regno_nregs[regno][GET_MODE (reloadreg)]
7254 - (int) hard_regno_nregs[regno][mode];
7256 return gen_rtx_REG (mode, regno);
7259 static const char *const reload_when_needed_name[] =
7262 "RELOAD_FOR_OUTPUT",
7264 "RELOAD_FOR_INPUT_ADDRESS",
7265 "RELOAD_FOR_INPADDR_ADDRESS",
7266 "RELOAD_FOR_OUTPUT_ADDRESS",
7267 "RELOAD_FOR_OUTADDR_ADDRESS",
7268 "RELOAD_FOR_OPERAND_ADDRESS",
7269 "RELOAD_FOR_OPADDR_ADDR",
7271 "RELOAD_FOR_OTHER_ADDRESS"
7274 /* These functions are used to print the variables set by 'find_reloads' */
7277 debug_reload_to_stream (FILE *f)
7284 for (r = 0; r < n_reloads; r++)
7286 fprintf (f, "Reload %d: ", r);
7290 fprintf (f, "reload_in (%s) = ",
7291 GET_MODE_NAME (rld[r].inmode));
7292 print_inline_rtx (f, rld[r].in, 24);
7293 fprintf (f, "\n\t");
7296 if (rld[r].out != 0)
7298 fprintf (f, "reload_out (%s) = ",
7299 GET_MODE_NAME (rld[r].outmode));
7300 print_inline_rtx (f, rld[r].out, 24);
7301 fprintf (f, "\n\t");
7304 fprintf (f, "%s, ", reg_class_names[(int) rld[r].rclass]);
7306 fprintf (f, "%s (opnum = %d)",
7307 reload_when_needed_name[(int) rld[r].when_needed],
7310 if (rld[r].optional)
7311 fprintf (f, ", optional");
7313 if (rld[r].nongroup)
7314 fprintf (f, ", nongroup");
7316 if (rld[r].inc != 0)
7317 fprintf (f, ", inc by %d", rld[r].inc);
7319 if (rld[r].nocombine)
7320 fprintf (f, ", can't combine");
7322 if (rld[r].secondary_p)
7323 fprintf (f, ", secondary_reload_p");
7325 if (rld[r].in_reg != 0)
7327 fprintf (f, "\n\treload_in_reg: ");
7328 print_inline_rtx (f, rld[r].in_reg, 24);
7331 if (rld[r].out_reg != 0)
7333 fprintf (f, "\n\treload_out_reg: ");
7334 print_inline_rtx (f, rld[r].out_reg, 24);
7337 if (rld[r].reg_rtx != 0)
7339 fprintf (f, "\n\treload_reg_rtx: ");
7340 print_inline_rtx (f, rld[r].reg_rtx, 24);
7344 if (rld[r].secondary_in_reload != -1)
7346 fprintf (f, "%ssecondary_in_reload = %d",
7347 prefix, rld[r].secondary_in_reload);
7351 if (rld[r].secondary_out_reload != -1)
7352 fprintf (f, "%ssecondary_out_reload = %d\n",
7353 prefix, rld[r].secondary_out_reload);
7356 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7358 fprintf (f, "%ssecondary_in_icode = %s", prefix,
7359 insn_data[rld[r].secondary_in_icode].name);
7363 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7364 fprintf (f, "%ssecondary_out_icode = %s", prefix,
7365 insn_data[rld[r].secondary_out_icode].name);
7374 debug_reload_to_stream (stderr);