1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
30 init_reload actually has to be called earlier anyway.
32 To scan an insn, call `find_reloads'. This does two things:
33 1. sets up tables describing which values must be reloaded
34 for this insn, and what kind of hard regs they must be reloaded into;
35 2. optionally record the locations where those values appear in
36 the data, so they can be replaced properly later.
37 This is done only if the second arg to `find_reloads' is nonzero.
39 The third arg to `find_reloads' specifies the number of levels
40 of indirect addressing supported by the machine. If it is zero,
41 indirect addressing is not valid. If it is one, (MEM (REG n))
42 is valid even if (REG n) did not get a hard register; if it is two,
43 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
44 hard register, and similarly for higher values.
46 Then you must choose the hard regs to reload those pseudo regs into,
47 and generate appropriate load insns before this insn and perhaps
48 also store insns after this insn. Set up the array `reload_reg_rtx'
49 to contain the REG rtx's for the registers you used. In some
50 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
51 for certain reloads. Then that tells you which register to use,
52 so you do not need to allocate one. But you still do need to add extra
53 instructions to copy the value into and out of that register.
55 Finally you must call `subst_reloads' to substitute the reload reg rtx's
56 into the locations already recorded.
60 find_reloads can alter the operands of the instruction it is called on.
62 1. Two operands of any sort may be interchanged, if they are in a
63 commutative instruction.
64 This happens only if find_reloads thinks the instruction will compile
67 2. Pseudo-registers that are equivalent to constants are replaced
68 with those constants if they are not in hard registers.
70 1 happens every time find_reloads is called.
71 2 happens only when REPLACE is 1, which is only when
72 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
92 #include "coretypes.h"
96 #include "insn-config.h"
102 #include "hard-reg-set.h"
106 #include "function.h"
111 /* True if X is a constant that can be forced into the constant pool. */
112 #define CONST_POOL_OK_P(X) \
114 && GET_CODE (X) != HIGH \
115 && !targetm.cannot_force_const_mem (X))
117 /* All reloads of the current insn are recorded here. See reload.h for
120 struct reload rld[MAX_RELOADS];
122 /* All the "earlyclobber" operands of the current insn
123 are recorded here. */
125 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
127 int reload_n_operands;
129 /* Replacing reloads.
131 If `replace_reloads' is nonzero, then as each reload is recorded
132 an entry is made for it in the table `replacements'.
133 Then later `subst_reloads' can look through that table and
134 perform all the replacements needed. */
136 /* Nonzero means record the places to replace. */
137 static int replace_reloads;
139 /* Each replacement is recorded with a structure like this. */
142 rtx *where; /* Location to store in */
143 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
144 a SUBREG; 0 otherwise. */
145 int what; /* which reload this is for */
146 enum machine_mode mode; /* mode it must have */
149 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
151 /* Number of replacements currently recorded. */
152 static int n_replacements;
154 /* Used to track what is modified by an operand. */
157 int reg_flag; /* Nonzero if referencing a register. */
158 int safe; /* Nonzero if this can't conflict with anything. */
159 rtx base; /* Base address for MEM. */
160 HOST_WIDE_INT start; /* Starting offset or register number. */
161 HOST_WIDE_INT end; /* Ending offset or register number. */
164 #ifdef SECONDARY_MEMORY_NEEDED
166 /* Save MEMs needed to copy from one class of registers to another. One MEM
167 is used per mode, but normally only one or two modes are ever used.
169 We keep two versions, before and after register elimination. The one
170 after register elimination is record separately for each operand. This
171 is done in case the address is not valid to be sure that we separately
174 static rtx secondary_memlocs[NUM_MACHINE_MODES];
175 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
176 static int secondary_memlocs_elim_used = 0;
179 /* The instruction we are doing reloads for;
180 so we can test whether a register dies in it. */
181 static rtx this_insn;
183 /* Nonzero if this instruction is a user-specified asm with operands. */
184 static int this_insn_is_asm;
186 /* If hard_regs_live_known is nonzero,
187 we can tell which hard regs are currently live,
188 at least enough to succeed in choosing dummy reloads. */
189 static int hard_regs_live_known;
191 /* Indexed by hard reg number,
192 element is nonnegative if hard reg has been spilled.
193 This vector is passed to `find_reloads' as an argument
194 and is not changed here. */
195 static short *static_reload_reg_p;
197 /* Set to 1 in subst_reg_equivs if it changes anything. */
198 static int subst_reg_equivs_changed;
200 /* On return from push_reload, holds the reload-number for the OUT
201 operand, which can be different for that from the input operand. */
202 static int output_reloadnum;
204 /* Compare two RTX's. */
205 #define MATCHES(x, y) \
206 (x == y || (x != 0 && (REG_P (x) \
207 ? REG_P (y) && REGNO (x) == REGNO (y) \
208 : rtx_equal_p (x, y) && ! side_effects_p (x))))
210 /* Indicates if two reloads purposes are for similar enough things that we
211 can merge their reloads. */
212 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
213 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
214 || ((when1) == (when2) && (op1) == (op2)) \
215 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
216 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
217 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
218 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
219 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
221 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
222 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
223 ((when1) != (when2) \
224 || ! ((op1) == (op2) \
225 || (when1) == RELOAD_FOR_INPUT \
226 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
227 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
229 /* If we are going to reload an address, compute the reload type to
231 #define ADDR_TYPE(type) \
232 ((type) == RELOAD_FOR_INPUT_ADDRESS \
233 ? RELOAD_FOR_INPADDR_ADDRESS \
234 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
235 ? RELOAD_FOR_OUTADDR_ADDRESS \
238 #ifdef HAVE_SECONDARY_RELOADS
239 static int push_secondary_reload (int, rtx, int, int, enum reg_class,
240 enum machine_mode, enum reload_type,
243 static enum reg_class find_valid_class (enum machine_mode, int, unsigned int);
244 static int reload_inner_reg_of_subreg (rtx, enum machine_mode, int);
245 static void push_replacement (rtx *, int, enum machine_mode);
246 static void dup_replacements (rtx *, rtx *);
247 static void combine_reloads (void);
248 static int find_reusable_reload (rtx *, rtx, enum reg_class,
249 enum reload_type, int, int);
250 static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, enum machine_mode,
251 enum machine_mode, enum reg_class, int, int);
252 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
253 static struct decomposition decompose (rtx);
254 static int immune_p (rtx, rtx, struct decomposition);
255 static int alternative_allows_memconst (const char *, int);
256 static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx,
258 static rtx make_memloc (rtx, int);
259 static int maybe_memory_address_p (enum machine_mode, rtx, rtx *);
260 static int find_reloads_address (enum machine_mode, rtx *, rtx, rtx *,
261 int, enum reload_type, int, rtx);
262 static rtx subst_reg_equivs (rtx, rtx);
263 static rtx subst_indexed_address (rtx);
264 static void update_auto_inc_notes (rtx, int, int);
265 static int find_reloads_address_1 (enum machine_mode, rtx, int, rtx *,
266 int, enum reload_type,int, rtx);
267 static void find_reloads_address_part (rtx, rtx *, enum reg_class,
268 enum machine_mode, int,
269 enum reload_type, int);
270 static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type,
272 static void copy_replacements_1 (rtx *, rtx *, int);
273 static int find_inc_amount (rtx, rtx);
275 #ifdef HAVE_SECONDARY_RELOADS
277 /* Determine if any secondary reloads are needed for loading (if IN_P is
278 nonzero) or storing (if IN_P is zero) X to or from a reload register of
279 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
280 are needed, push them.
282 Return the reload number of the secondary reload we made, or -1 if
283 we didn't need one. *PICODE is set to the insn_code to use if we do
284 need a secondary reload. */
287 push_secondary_reload (int in_p, rtx x, int opnum, int optional,
288 enum reg_class reload_class,
289 enum machine_mode reload_mode, enum reload_type type,
290 enum insn_code *picode)
292 enum reg_class class = NO_REGS;
293 enum machine_mode mode = reload_mode;
294 enum insn_code icode = CODE_FOR_nothing;
295 enum reg_class t_class = NO_REGS;
296 enum machine_mode t_mode = VOIDmode;
297 enum insn_code t_icode = CODE_FOR_nothing;
298 enum reload_type secondary_type;
299 int s_reload, t_reload = -1;
301 if (type == RELOAD_FOR_INPUT_ADDRESS
302 || type == RELOAD_FOR_OUTPUT_ADDRESS
303 || type == RELOAD_FOR_INPADDR_ADDRESS
304 || type == RELOAD_FOR_OUTADDR_ADDRESS)
305 secondary_type = type;
307 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
309 *picode = CODE_FOR_nothing;
311 /* If X is a paradoxical SUBREG, use the inner value to determine both the
312 mode and object being reloaded. */
313 if (GET_CODE (x) == SUBREG
314 && (GET_MODE_SIZE (GET_MODE (x))
315 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
318 reload_mode = GET_MODE (x);
321 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
322 is still a pseudo-register by now, it *must* have an equivalent MEM
323 but we don't want to assume that), use that equivalent when seeing if
324 a secondary reload is needed since whether or not a reload is needed
325 might be sensitive to the form of the MEM. */
327 if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
328 && reg_equiv_mem[REGNO (x)] != 0)
329 x = reg_equiv_mem[REGNO (x)];
331 #ifdef SECONDARY_INPUT_RELOAD_CLASS
333 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
336 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
338 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
341 /* If we don't need any secondary registers, done. */
342 if (class == NO_REGS)
345 /* Get a possible insn to use. If the predicate doesn't accept X, don't
348 icode = (in_p ? reload_in_optab[(int) reload_mode]
349 : reload_out_optab[(int) reload_mode]);
351 if (icode != CODE_FOR_nothing
352 && insn_data[(int) icode].operand[in_p].predicate
353 && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode)))
354 icode = CODE_FOR_nothing;
356 /* If we will be using an insn, see if it can directly handle the reload
357 register we will be using. If it can, the secondary reload is for a
358 scratch register. If it can't, we will use the secondary reload for
359 an intermediate register and require a tertiary reload for the scratch
362 if (icode != CODE_FOR_nothing)
364 /* If IN_P is nonzero, the reload register will be the output in
365 operand 0. If IN_P is zero, the reload register will be the input
366 in operand 1. Outputs should have an initial "=", which we must
369 enum reg_class insn_class;
371 if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0)
372 insn_class = ALL_REGS;
375 const char *insn_constraint
376 = &insn_data[(int) icode].operand[!in_p].constraint[in_p];
377 char insn_letter = *insn_constraint;
379 = (insn_letter == 'r' ? GENERAL_REGS
380 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) insn_letter,
383 gcc_assert (insn_class != NO_REGS);
385 || insn_data[(int) icode].operand[!in_p].constraint[0]
389 /* The scratch register's constraint must start with "=&". */
390 gcc_assert (insn_data[(int) icode].operand[2].constraint[0] == '='
391 && insn_data[(int) icode].operand[2].constraint[1] == '&');
393 if (reg_class_subset_p (reload_class, insn_class))
394 mode = insn_data[(int) icode].operand[2].mode;
397 const char *t_constraint
398 = &insn_data[(int) icode].operand[2].constraint[2];
399 char t_letter = *t_constraint;
401 t_mode = insn_data[(int) icode].operand[2].mode;
402 t_class = (t_letter == 'r' ? GENERAL_REGS
403 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) t_letter,
406 icode = CODE_FOR_nothing;
410 /* This case isn't valid, so fail. Reload is allowed to use the same
411 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
412 in the case of a secondary register, we actually need two different
413 registers for correct code. We fail here to prevent the possibility of
414 silently generating incorrect code later.
416 The convention is that secondary input reloads are valid only if the
417 secondary_class is different from class. If you have such a case, you
418 can not use secondary reloads, you must work around the problem some
421 Allow this when a reload_in/out pattern is being used. I.e. assume
422 that the generated code handles this case. */
424 gcc_assert (!in_p || class != reload_class || icode != CODE_FOR_nothing
425 || t_icode != CODE_FOR_nothing);
427 /* If we need a tertiary reload, see if we have one we can reuse or else
430 if (t_class != NO_REGS)
432 for (t_reload = 0; t_reload < n_reloads; t_reload++)
433 if (rld[t_reload].secondary_p
434 && (reg_class_subset_p (t_class, rld[t_reload].class)
435 || reg_class_subset_p (rld[t_reload].class, t_class))
436 && ((in_p && rld[t_reload].inmode == t_mode)
437 || (! in_p && rld[t_reload].outmode == t_mode))
438 && ((in_p && (rld[t_reload].secondary_in_icode
439 == CODE_FOR_nothing))
440 || (! in_p &&(rld[t_reload].secondary_out_icode
441 == CODE_FOR_nothing)))
442 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
443 && MERGABLE_RELOADS (secondary_type,
444 rld[t_reload].when_needed,
445 opnum, rld[t_reload].opnum))
448 rld[t_reload].inmode = t_mode;
450 rld[t_reload].outmode = t_mode;
452 if (reg_class_subset_p (t_class, rld[t_reload].class))
453 rld[t_reload].class = t_class;
455 rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum);
456 rld[t_reload].optional &= optional;
457 rld[t_reload].secondary_p = 1;
458 if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed,
459 opnum, rld[t_reload].opnum))
460 rld[t_reload].when_needed = RELOAD_OTHER;
463 if (t_reload == n_reloads)
465 /* We need to make a new tertiary reload for this register class. */
466 rld[t_reload].in = rld[t_reload].out = 0;
467 rld[t_reload].class = t_class;
468 rld[t_reload].inmode = in_p ? t_mode : VOIDmode;
469 rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode;
470 rld[t_reload].reg_rtx = 0;
471 rld[t_reload].optional = optional;
472 rld[t_reload].inc = 0;
473 /* Maybe we could combine these, but it seems too tricky. */
474 rld[t_reload].nocombine = 1;
475 rld[t_reload].in_reg = 0;
476 rld[t_reload].out_reg = 0;
477 rld[t_reload].opnum = opnum;
478 rld[t_reload].when_needed = secondary_type;
479 rld[t_reload].secondary_in_reload = -1;
480 rld[t_reload].secondary_out_reload = -1;
481 rld[t_reload].secondary_in_icode = CODE_FOR_nothing;
482 rld[t_reload].secondary_out_icode = CODE_FOR_nothing;
483 rld[t_reload].secondary_p = 1;
489 /* See if we can reuse an existing secondary reload. */
490 for (s_reload = 0; s_reload < n_reloads; s_reload++)
491 if (rld[s_reload].secondary_p
492 && (reg_class_subset_p (class, rld[s_reload].class)
493 || reg_class_subset_p (rld[s_reload].class, class))
494 && ((in_p && rld[s_reload].inmode == mode)
495 || (! in_p && rld[s_reload].outmode == mode))
496 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
497 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
498 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
499 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
500 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
501 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
502 opnum, rld[s_reload].opnum))
505 rld[s_reload].inmode = mode;
507 rld[s_reload].outmode = mode;
509 if (reg_class_subset_p (class, rld[s_reload].class))
510 rld[s_reload].class = class;
512 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
513 rld[s_reload].optional &= optional;
514 rld[s_reload].secondary_p = 1;
515 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
516 opnum, rld[s_reload].opnum))
517 rld[s_reload].when_needed = RELOAD_OTHER;
520 if (s_reload == n_reloads)
522 #ifdef SECONDARY_MEMORY_NEEDED
523 /* If we need a memory location to copy between the two reload regs,
524 set it up now. Note that we do the input case before making
525 the reload and the output case after. This is due to the
526 way reloads are output. */
528 if (in_p && icode == CODE_FOR_nothing
529 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
531 get_secondary_mem (x, reload_mode, opnum, type);
533 /* We may have just added new reloads. Make sure we add
534 the new reload at the end. */
535 s_reload = n_reloads;
539 /* We need to make a new secondary reload for this register class. */
540 rld[s_reload].in = rld[s_reload].out = 0;
541 rld[s_reload].class = class;
543 rld[s_reload].inmode = in_p ? mode : VOIDmode;
544 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
545 rld[s_reload].reg_rtx = 0;
546 rld[s_reload].optional = optional;
547 rld[s_reload].inc = 0;
548 /* Maybe we could combine these, but it seems too tricky. */
549 rld[s_reload].nocombine = 1;
550 rld[s_reload].in_reg = 0;
551 rld[s_reload].out_reg = 0;
552 rld[s_reload].opnum = opnum;
553 rld[s_reload].when_needed = secondary_type;
554 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
555 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
556 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
557 rld[s_reload].secondary_out_icode
558 = ! in_p ? t_icode : CODE_FOR_nothing;
559 rld[s_reload].secondary_p = 1;
563 #ifdef SECONDARY_MEMORY_NEEDED
564 if (! in_p && icode == CODE_FOR_nothing
565 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
566 get_secondary_mem (x, mode, opnum, type);
573 #endif /* HAVE_SECONDARY_RELOADS */
575 #ifdef SECONDARY_MEMORY_NEEDED
577 /* Return a memory location that will be used to copy X in mode MODE.
578 If we haven't already made a location for this mode in this insn,
579 call find_reloads_address on the location being returned. */
582 get_secondary_mem (rtx x ATTRIBUTE_UNUSED, enum machine_mode mode,
583 int opnum, enum reload_type type)
588 /* By default, if MODE is narrower than a word, widen it to a word.
589 This is required because most machines that require these memory
590 locations do not support short load and stores from all registers
591 (e.g., FP registers). */
593 #ifdef SECONDARY_MEMORY_NEEDED_MODE
594 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
596 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
597 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
600 /* If we already have made a MEM for this operand in MODE, return it. */
601 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
602 return secondary_memlocs_elim[(int) mode][opnum];
604 /* If this is the first time we've tried to get a MEM for this mode,
605 allocate a new one. `something_changed' in reload will get set
606 by noticing that the frame size has changed. */
608 if (secondary_memlocs[(int) mode] == 0)
610 #ifdef SECONDARY_MEMORY_NEEDED_RTX
611 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
613 secondary_memlocs[(int) mode]
614 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
618 /* Get a version of the address doing any eliminations needed. If that
619 didn't give us a new MEM, make a new one if it isn't valid. */
621 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
622 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
624 if (! mem_valid && loc == secondary_memlocs[(int) mode])
625 loc = copy_rtx (loc);
627 /* The only time the call below will do anything is if the stack
628 offset is too large. In that case IND_LEVELS doesn't matter, so we
629 can just pass a zero. Adjust the type to be the address of the
630 corresponding object. If the address was valid, save the eliminated
631 address. If it wasn't valid, we need to make a reload each time, so
636 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
637 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
640 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
644 secondary_memlocs_elim[(int) mode][opnum] = loc;
645 if (secondary_memlocs_elim_used <= (int)mode)
646 secondary_memlocs_elim_used = (int)mode + 1;
650 /* Clear any secondary memory locations we've made. */
653 clear_secondary_mem (void)
655 memset (secondary_memlocs, 0, sizeof secondary_memlocs);
657 #endif /* SECONDARY_MEMORY_NEEDED */
659 /* Find the largest class for which every register number plus N is valid in
660 M1 (if in range) and is cheap to move into REGNO.
661 Abort if no such class exists. */
663 static enum reg_class
664 find_valid_class (enum machine_mode m1 ATTRIBUTE_UNUSED, int n,
665 unsigned int dest_regno ATTRIBUTE_UNUSED)
670 enum reg_class best_class = NO_REGS;
671 enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
672 unsigned int best_size = 0;
675 for (class = 1; class < N_REG_CLASSES; class++)
678 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
679 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
680 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
681 && ! HARD_REGNO_MODE_OK (regno + n, m1))
686 cost = REGISTER_MOVE_COST (m1, class, dest_class);
688 if ((reg_class_size[class] > best_size
689 && (best_cost < 0 || best_cost >= cost))
693 best_size = reg_class_size[class];
694 best_cost = REGISTER_MOVE_COST (m1, class, dest_class);
698 gcc_assert (best_size != 0);
703 /* Return the number of a previously made reload that can be combined with
704 a new one, or n_reloads if none of the existing reloads can be used.
705 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
706 push_reload, they determine the kind of the new reload that we try to
707 combine. P_IN points to the corresponding value of IN, which can be
708 modified by this function.
709 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
712 find_reusable_reload (rtx *p_in, rtx out, enum reg_class class,
713 enum reload_type type, int opnum, int dont_share)
717 /* We can't merge two reloads if the output of either one is
720 if (earlyclobber_operand_p (out))
723 /* We can use an existing reload if the class is right
724 and at least one of IN and OUT is a match
725 and the other is at worst neutral.
726 (A zero compared against anything is neutral.)
728 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
729 for the same thing since that can cause us to need more reload registers
730 than we otherwise would. */
732 for (i = 0; i < n_reloads; i++)
733 if ((reg_class_subset_p (class, rld[i].class)
734 || reg_class_subset_p (rld[i].class, class))
735 /* If the existing reload has a register, it must fit our class. */
736 && (rld[i].reg_rtx == 0
737 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
738 true_regnum (rld[i].reg_rtx)))
739 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
740 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
741 || (out != 0 && MATCHES (rld[i].out, out)
742 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
743 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
744 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
745 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
748 /* Reloading a plain reg for input can match a reload to postincrement
749 that reg, since the postincrement's value is the right value.
750 Likewise, it can match a preincrement reload, since we regard
751 the preincrementation as happening before any ref in this insn
753 for (i = 0; i < n_reloads; i++)
754 if ((reg_class_subset_p (class, rld[i].class)
755 || reg_class_subset_p (rld[i].class, class))
756 /* If the existing reload has a register, it must fit our
758 && (rld[i].reg_rtx == 0
759 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
760 true_regnum (rld[i].reg_rtx)))
761 && out == 0 && rld[i].out == 0 && rld[i].in != 0
763 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == RTX_AUTOINC
764 && MATCHES (XEXP (rld[i].in, 0), in))
765 || (REG_P (rld[i].in)
766 && GET_RTX_CLASS (GET_CODE (in)) == RTX_AUTOINC
767 && MATCHES (XEXP (in, 0), rld[i].in)))
768 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
769 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
770 && MERGABLE_RELOADS (type, rld[i].when_needed,
771 opnum, rld[i].opnum))
773 /* Make sure reload_in ultimately has the increment,
774 not the plain register. */
782 /* Return nonzero if X is a SUBREG which will require reloading of its
783 SUBREG_REG expression. */
786 reload_inner_reg_of_subreg (rtx x, enum machine_mode mode, int output)
790 /* Only SUBREGs are problematical. */
791 if (GET_CODE (x) != SUBREG)
794 inner = SUBREG_REG (x);
796 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
797 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
800 /* If INNER is not a hard register, then INNER will not need to
803 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
806 /* If INNER is not ok for MODE, then INNER will need reloading. */
807 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
810 /* If the outer part is a word or smaller, INNER larger than a
811 word and the number of regs for INNER is not the same as the
812 number of words in INNER, then INNER will need reloading. */
813 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
815 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
816 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
817 != (int) hard_regno_nregs[REGNO (inner)][GET_MODE (inner)]));
820 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
821 requiring an extra reload register. The caller has already found that
822 IN contains some reference to REGNO, so check that we can produce the
823 new value in a single step. E.g. if we have
824 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
825 instruction that adds one to a register, this should succeed.
826 However, if we have something like
827 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
828 needs to be loaded into a register first, we need a separate reload
830 Such PLUS reloads are generated by find_reload_address_part.
831 The out-of-range PLUS expressions are usually introduced in the instruction
832 patterns by register elimination and substituting pseudos without a home
833 by their function-invariant equivalences. */
835 can_reload_into (rtx in, int regno, enum machine_mode mode)
839 struct recog_data save_recog_data;
841 /* For matching constraints, we often get notional input reloads where
842 we want to use the original register as the reload register. I.e.
843 technically this is a non-optional input-output reload, but IN is
844 already a valid register, and has been chosen as the reload register.
845 Speed this up, since it trivially works. */
849 /* To test MEMs properly, we'd have to take into account all the reloads
850 that are already scheduled, which can become quite complicated.
851 And since we've already handled address reloads for this MEM, it
852 should always succeed anyway. */
856 /* If we can make a simple SET insn that does the job, everything should
858 dst = gen_rtx_REG (mode, regno);
859 test_insn = make_insn_raw (gen_rtx_SET (VOIDmode, dst, in));
860 save_recog_data = recog_data;
861 if (recog_memoized (test_insn) >= 0)
863 extract_insn (test_insn);
864 r = constrain_operands (1);
866 recog_data = save_recog_data;
870 /* Record one reload that needs to be performed.
871 IN is an rtx saying where the data are to be found before this instruction.
872 OUT says where they must be stored after the instruction.
873 (IN is zero for data not read, and OUT is zero for data not written.)
874 INLOC and OUTLOC point to the places in the instructions where
875 IN and OUT were found.
876 If IN and OUT are both nonzero, it means the same register must be used
877 to reload both IN and OUT.
879 CLASS is a register class required for the reloaded data.
880 INMODE is the machine mode that the instruction requires
881 for the reg that replaces IN and OUTMODE is likewise for OUT.
883 If IN is zero, then OUT's location and mode should be passed as
886 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
888 OPTIONAL nonzero means this reload does not need to be performed:
889 it can be discarded if that is more convenient.
891 OPNUM and TYPE say what the purpose of this reload is.
893 The return value is the reload-number for this reload.
895 If both IN and OUT are nonzero, in some rare cases we might
896 want to make two separate reloads. (Actually we never do this now.)
897 Therefore, the reload-number for OUT is stored in
898 output_reloadnum when we return; the return value applies to IN.
899 Usually (presently always), when IN and OUT are nonzero,
900 the two reload-numbers are equal, but the caller should be careful to
904 push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
905 enum reg_class class, enum machine_mode inmode,
906 enum machine_mode outmode, int strict_low, int optional,
907 int opnum, enum reload_type type)
911 int dont_remove_subreg = 0;
912 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
913 int secondary_in_reload = -1, secondary_out_reload = -1;
914 enum insn_code secondary_in_icode = CODE_FOR_nothing;
915 enum insn_code secondary_out_icode = CODE_FOR_nothing;
917 /* INMODE and/or OUTMODE could be VOIDmode if no mode
918 has been specified for the operand. In that case,
919 use the operand's mode as the mode to reload. */
920 if (inmode == VOIDmode && in != 0)
921 inmode = GET_MODE (in);
922 if (outmode == VOIDmode && out != 0)
923 outmode = GET_MODE (out);
925 /* If IN is a pseudo register everywhere-equivalent to a constant, and
926 it is not in a hard register, reload straight from the constant,
927 since we want to get rid of such pseudo registers.
928 Often this is done earlier, but not always in find_reloads_address. */
929 if (in != 0 && REG_P (in))
931 int regno = REGNO (in);
933 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
934 && reg_equiv_constant[regno] != 0)
935 in = reg_equiv_constant[regno];
938 /* Likewise for OUT. Of course, OUT will never be equivalent to
939 an actual constant, but it might be equivalent to a memory location
940 (in the case of a parameter). */
941 if (out != 0 && REG_P (out))
943 int regno = REGNO (out);
945 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
946 && reg_equiv_constant[regno] != 0)
947 out = reg_equiv_constant[regno];
950 /* If we have a read-write operand with an address side-effect,
951 change either IN or OUT so the side-effect happens only once. */
952 if (in != 0 && out != 0 && MEM_P (in) && rtx_equal_p (in, out))
953 switch (GET_CODE (XEXP (in, 0)))
955 case POST_INC: case POST_DEC: case POST_MODIFY:
956 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
959 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
960 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
967 /* If we are reloading a (SUBREG constant ...), really reload just the
968 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
969 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
970 a pseudo and hence will become a MEM) with M1 wider than M2 and the
971 register is a pseudo, also reload the inside expression.
972 For machines that extend byte loads, do this for any SUBREG of a pseudo
973 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
974 M2 is an integral mode that gets extended when loaded.
975 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
976 either M1 is not valid for R or M2 is wider than a word but we only
977 need one word to store an M2-sized quantity in R.
978 (However, if OUT is nonzero, we need to reload the reg *and*
979 the subreg, so do nothing here, and let following statement handle it.)
981 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
982 we can't handle it here because CONST_INT does not indicate a mode.
984 Similarly, we must reload the inside expression if we have a
985 STRICT_LOW_PART (presumably, in == out in the cas).
987 Also reload the inner expression if it does not require a secondary
988 reload but the SUBREG does.
990 Finally, reload the inner expression if it is a register that is in
991 the class whose registers cannot be referenced in a different size
992 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
993 cannot reload just the inside since we might end up with the wrong
994 register class. But if it is inside a STRICT_LOW_PART, we have
995 no choice, so we hope we do get the right register class there. */
997 if (in != 0 && GET_CODE (in) == SUBREG
998 && (subreg_lowpart_p (in) || strict_low)
999 #ifdef CANNOT_CHANGE_MODE_CLASS
1000 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, class)
1002 && (CONSTANT_P (SUBREG_REG (in))
1003 || GET_CODE (SUBREG_REG (in)) == PLUS
1005 || (((REG_P (SUBREG_REG (in))
1006 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
1007 || MEM_P (SUBREG_REG (in)))
1008 && ((GET_MODE_SIZE (inmode)
1009 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1010 #ifdef LOAD_EXTEND_OP
1011 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1012 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1014 && (GET_MODE_SIZE (inmode)
1015 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1016 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
1017 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != UNKNOWN)
1019 #ifdef WORD_REGISTER_OPERATIONS
1020 || ((GET_MODE_SIZE (inmode)
1021 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1022 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1023 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1027 || (REG_P (SUBREG_REG (in))
1028 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1029 /* The case where out is nonzero
1030 is handled differently in the following statement. */
1031 && (out == 0 || subreg_lowpart_p (in))
1032 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1033 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1035 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1037 != (int) hard_regno_nregs[REGNO (SUBREG_REG (in))]
1038 [GET_MODE (SUBREG_REG (in))]))
1039 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1040 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1041 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
1042 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1043 GET_MODE (SUBREG_REG (in)),
1047 #ifdef CANNOT_CHANGE_MODE_CLASS
1048 || (REG_P (SUBREG_REG (in))
1049 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1050 && REG_CANNOT_CHANGE_MODE_P
1051 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1055 in_subreg_loc = inloc;
1056 inloc = &SUBREG_REG (in);
1058 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1060 /* This is supposed to happen only for paradoxical subregs made by
1061 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1062 gcc_assert (GET_MODE_SIZE (GET_MODE (in)) <= GET_MODE_SIZE (inmode));
1064 inmode = GET_MODE (in);
1067 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1068 either M1 is not valid for R or M2 is wider than a word but we only
1069 need one word to store an M2-sized quantity in R.
1071 However, we must reload the inner reg *as well as* the subreg in
1074 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1075 code above. This can happen if SUBREG_BYTE != 0. */
1077 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1079 enum reg_class in_class = class;
1081 if (REG_P (SUBREG_REG (in)))
1083 = find_valid_class (inmode,
1084 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1085 GET_MODE (SUBREG_REG (in)),
1088 REGNO (SUBREG_REG (in)));
1090 /* This relies on the fact that emit_reload_insns outputs the
1091 instructions for input reloads of type RELOAD_OTHER in the same
1092 order as the reloads. Thus if the outer reload is also of type
1093 RELOAD_OTHER, we are guaranteed that this inner reload will be
1094 output before the outer reload. */
1095 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1096 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1097 dont_remove_subreg = 1;
1100 /* Similarly for paradoxical and problematical SUBREGs on the output.
1101 Note that there is no reason we need worry about the previous value
1102 of SUBREG_REG (out); even if wider than out,
1103 storing in a subreg is entitled to clobber it all
1104 (except in the case of STRICT_LOW_PART,
1105 and in that case the constraint should label it input-output.) */
1106 if (out != 0 && GET_CODE (out) == SUBREG
1107 && (subreg_lowpart_p (out) || strict_low)
1108 #ifdef CANNOT_CHANGE_MODE_CLASS
1109 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, class)
1111 && (CONSTANT_P (SUBREG_REG (out))
1113 || (((REG_P (SUBREG_REG (out))
1114 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1115 || MEM_P (SUBREG_REG (out)))
1116 && ((GET_MODE_SIZE (outmode)
1117 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1118 #ifdef WORD_REGISTER_OPERATIONS
1119 || ((GET_MODE_SIZE (outmode)
1120 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1121 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1122 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1126 || (REG_P (SUBREG_REG (out))
1127 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1128 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1129 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1131 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1133 != (int) hard_regno_nregs[REGNO (SUBREG_REG (out))]
1134 [GET_MODE (SUBREG_REG (out))]))
1135 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1136 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1137 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1138 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1139 GET_MODE (SUBREG_REG (out)),
1143 #ifdef CANNOT_CHANGE_MODE_CLASS
1144 || (REG_P (SUBREG_REG (out))
1145 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1146 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1147 GET_MODE (SUBREG_REG (out)),
1152 out_subreg_loc = outloc;
1153 outloc = &SUBREG_REG (out);
1155 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1156 gcc_assert (!MEM_P (out)
1157 || GET_MODE_SIZE (GET_MODE (out))
1158 <= GET_MODE_SIZE (outmode));
1160 outmode = GET_MODE (out);
1163 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1164 either M1 is not valid for R or M2 is wider than a word but we only
1165 need one word to store an M2-sized quantity in R.
1167 However, we must reload the inner reg *as well as* the subreg in
1168 that case. In this case, the inner reg is an in-out reload. */
1170 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1172 /* This relies on the fact that emit_reload_insns outputs the
1173 instructions for output reloads of type RELOAD_OTHER in reverse
1174 order of the reloads. Thus if the outer reload is also of type
1175 RELOAD_OTHER, we are guaranteed that this inner reload will be
1176 output after the outer reload. */
1177 dont_remove_subreg = 1;
1178 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1180 find_valid_class (outmode,
1181 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1182 GET_MODE (SUBREG_REG (out)),
1185 REGNO (SUBREG_REG (out))),
1186 VOIDmode, VOIDmode, 0, 0,
1187 opnum, RELOAD_OTHER);
1190 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1191 if (in != 0 && out != 0 && MEM_P (out)
1192 && (REG_P (in) || MEM_P (in))
1193 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1196 /* If IN is a SUBREG of a hard register, make a new REG. This
1197 simplifies some of the cases below. */
1199 if (in != 0 && GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))
1200 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1201 && ! dont_remove_subreg)
1202 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1204 /* Similarly for OUT. */
1205 if (out != 0 && GET_CODE (out) == SUBREG
1206 && REG_P (SUBREG_REG (out))
1207 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1208 && ! dont_remove_subreg)
1209 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1211 /* Narrow down the class of register wanted if that is
1212 desirable on this machine for efficiency. */
1214 class = PREFERRED_RELOAD_CLASS (in, class);
1216 /* Output reloads may need analogous treatment, different in detail. */
1217 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1219 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1222 /* Make sure we use a class that can handle the actual pseudo
1223 inside any subreg. For example, on the 386, QImode regs
1224 can appear within SImode subregs. Although GENERAL_REGS
1225 can handle SImode, QImode needs a smaller class. */
1226 #ifdef LIMIT_RELOAD_CLASS
1228 class = LIMIT_RELOAD_CLASS (inmode, class);
1229 else if (in != 0 && GET_CODE (in) == SUBREG)
1230 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1233 class = LIMIT_RELOAD_CLASS (outmode, class);
1234 if (out != 0 && GET_CODE (out) == SUBREG)
1235 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1238 /* Verify that this class is at least possible for the mode that
1240 if (this_insn_is_asm)
1242 enum machine_mode mode;
1243 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1247 if (mode == VOIDmode)
1249 error_for_asm (this_insn, "cannot reload integer constant "
1250 "operand in %<asm%>");
1255 outmode = word_mode;
1257 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1258 if (HARD_REGNO_MODE_OK (i, mode)
1259 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1261 int nregs = hard_regno_nregs[i][mode];
1264 for (j = 1; j < nregs; j++)
1265 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1270 if (i == FIRST_PSEUDO_REGISTER)
1272 error_for_asm (this_insn, "impossible register constraint "
1278 /* Optional output reloads are always OK even if we have no register class,
1279 since the function of these reloads is only to have spill_reg_store etc.
1280 set, so that the storing insn can be deleted later. */
1281 gcc_assert (class != NO_REGS
1282 || (optional != 0 && type == RELOAD_FOR_OUTPUT));
1284 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1288 /* See if we need a secondary reload register to move between CLASS
1289 and IN or CLASS and OUT. Get the icode and push any required reloads
1290 needed for each of them if so. */
1292 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1295 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1296 &secondary_in_icode);
1299 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1300 if (out != 0 && GET_CODE (out) != SCRATCH)
1301 secondary_out_reload
1302 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1303 type, &secondary_out_icode);
1306 /* We found no existing reload suitable for re-use.
1307 So add an additional reload. */
1309 #ifdef SECONDARY_MEMORY_NEEDED
1310 /* If a memory location is needed for the copy, make one. */
1311 if (in != 0 && (REG_P (in) || GET_CODE (in) == SUBREG)
1312 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1313 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1315 get_secondary_mem (in, inmode, opnum, type);
1321 rld[i].class = class;
1322 rld[i].inmode = inmode;
1323 rld[i].outmode = outmode;
1325 rld[i].optional = optional;
1327 rld[i].nocombine = 0;
1328 rld[i].in_reg = inloc ? *inloc : 0;
1329 rld[i].out_reg = outloc ? *outloc : 0;
1330 rld[i].opnum = opnum;
1331 rld[i].when_needed = type;
1332 rld[i].secondary_in_reload = secondary_in_reload;
1333 rld[i].secondary_out_reload = secondary_out_reload;
1334 rld[i].secondary_in_icode = secondary_in_icode;
1335 rld[i].secondary_out_icode = secondary_out_icode;
1336 rld[i].secondary_p = 0;
1340 #ifdef SECONDARY_MEMORY_NEEDED
1341 if (out != 0 && (REG_P (out) || GET_CODE (out) == SUBREG)
1342 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1343 && SECONDARY_MEMORY_NEEDED (class,
1344 REGNO_REG_CLASS (reg_or_subregno (out)),
1346 get_secondary_mem (out, outmode, opnum, type);
1351 /* We are reusing an existing reload,
1352 but we may have additional information for it.
1353 For example, we may now have both IN and OUT
1354 while the old one may have just one of them. */
1356 /* The modes can be different. If they are, we want to reload in
1357 the larger mode, so that the value is valid for both modes. */
1358 if (inmode != VOIDmode
1359 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1360 rld[i].inmode = inmode;
1361 if (outmode != VOIDmode
1362 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1363 rld[i].outmode = outmode;
1366 rtx in_reg = inloc ? *inloc : 0;
1367 /* If we merge reloads for two distinct rtl expressions that
1368 are identical in content, there might be duplicate address
1369 reloads. Remove the extra set now, so that if we later find
1370 that we can inherit this reload, we can get rid of the
1371 address reloads altogether.
1373 Do not do this if both reloads are optional since the result
1374 would be an optional reload which could potentially leave
1375 unresolved address replacements.
1377 It is not sufficient to call transfer_replacements since
1378 choose_reload_regs will remove the replacements for address
1379 reloads of inherited reloads which results in the same
1381 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1382 && ! (rld[i].optional && optional))
1384 /* We must keep the address reload with the lower operand
1386 if (opnum > rld[i].opnum)
1388 remove_address_replacements (in);
1390 in_reg = rld[i].in_reg;
1393 remove_address_replacements (rld[i].in);
1396 rld[i].in_reg = in_reg;
1401 rld[i].out_reg = outloc ? *outloc : 0;
1403 if (reg_class_subset_p (class, rld[i].class))
1404 rld[i].class = class;
1405 rld[i].optional &= optional;
1406 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1407 opnum, rld[i].opnum))
1408 rld[i].when_needed = RELOAD_OTHER;
1409 rld[i].opnum = MIN (rld[i].opnum, opnum);
1412 /* If the ostensible rtx being reloaded differs from the rtx found
1413 in the location to substitute, this reload is not safe to combine
1414 because we cannot reliably tell whether it appears in the insn. */
1416 if (in != 0 && in != *inloc)
1417 rld[i].nocombine = 1;
1420 /* This was replaced by changes in find_reloads_address_1 and the new
1421 function inc_for_reload, which go with a new meaning of reload_inc. */
1423 /* If this is an IN/OUT reload in an insn that sets the CC,
1424 it must be for an autoincrement. It doesn't work to store
1425 the incremented value after the insn because that would clobber the CC.
1426 So we must do the increment of the value reloaded from,
1427 increment it, store it back, then decrement again. */
1428 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1432 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1433 /* If we did not find a nonzero amount-to-increment-by,
1434 that contradicts the belief that IN is being incremented
1435 in an address in this insn. */
1436 gcc_assert (rld[i].inc != 0);
1440 /* If we will replace IN and OUT with the reload-reg,
1441 record where they are located so that substitution need
1442 not do a tree walk. */
1444 if (replace_reloads)
1448 struct replacement *r = &replacements[n_replacements++];
1450 r->subreg_loc = in_subreg_loc;
1454 if (outloc != 0 && outloc != inloc)
1456 struct replacement *r = &replacements[n_replacements++];
1459 r->subreg_loc = out_subreg_loc;
1464 /* If this reload is just being introduced and it has both
1465 an incoming quantity and an outgoing quantity that are
1466 supposed to be made to match, see if either one of the two
1467 can serve as the place to reload into.
1469 If one of them is acceptable, set rld[i].reg_rtx
1472 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1474 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1477 earlyclobber_operand_p (out));
1479 /* If the outgoing register already contains the same value
1480 as the incoming one, we can dispense with loading it.
1481 The easiest way to tell the caller that is to give a phony
1482 value for the incoming operand (same as outgoing one). */
1483 if (rld[i].reg_rtx == out
1484 && (REG_P (in) || CONSTANT_P (in))
1485 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1486 static_reload_reg_p, i, inmode))
1490 /* If this is an input reload and the operand contains a register that
1491 dies in this insn and is used nowhere else, see if it is the right class
1492 to be used for this reload. Use it if so. (This occurs most commonly
1493 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1494 this if it is also an output reload that mentions the register unless
1495 the output is a SUBREG that clobbers an entire register.
1497 Note that the operand might be one of the spill regs, if it is a
1498 pseudo reg and we are in a block where spilling has not taken place.
1499 But if there is no spilling in this block, that is OK.
1500 An explicitly used hard reg cannot be a spill reg. */
1502 if (rld[i].reg_rtx == 0 && in != 0)
1506 enum machine_mode rel_mode = inmode;
1508 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1511 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1512 if (REG_NOTE_KIND (note) == REG_DEAD
1513 && REG_P (XEXP (note, 0))
1514 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1515 && reg_mentioned_p (XEXP (note, 0), in)
1516 && ! refers_to_regno_for_reload_p (regno,
1518 + hard_regno_nregs[regno]
1520 PATTERN (this_insn), inloc)
1521 /* If this is also an output reload, IN cannot be used as
1522 the reload register if it is set in this insn unless IN
1524 && (out == 0 || in == out
1525 || ! hard_reg_set_here_p (regno,
1527 + hard_regno_nregs[regno]
1529 PATTERN (this_insn)))
1530 /* ??? Why is this code so different from the previous?
1531 Is there any simple coherent way to describe the two together?
1532 What's going on here. */
1534 || (GET_CODE (in) == SUBREG
1535 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1537 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1538 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1539 /* Make sure the operand fits in the reg that dies. */
1540 && (GET_MODE_SIZE (rel_mode)
1541 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1542 && HARD_REGNO_MODE_OK (regno, inmode)
1543 && HARD_REGNO_MODE_OK (regno, outmode))
1546 unsigned int nregs = MAX (hard_regno_nregs[regno][inmode],
1547 hard_regno_nregs[regno][outmode]);
1549 for (offs = 0; offs < nregs; offs++)
1550 if (fixed_regs[regno + offs]
1551 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1556 && (! (refers_to_regno_for_reload_p
1557 (regno, (regno + hard_regno_nregs[regno][inmode]),
1559 || can_reload_into (in, regno, inmode)))
1561 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1568 output_reloadnum = i;
1573 /* Record an additional place we must replace a value
1574 for which we have already recorded a reload.
1575 RELOADNUM is the value returned by push_reload
1576 when the reload was recorded.
1577 This is used in insn patterns that use match_dup. */
1580 push_replacement (rtx *loc, int reloadnum, enum machine_mode mode)
1582 if (replace_reloads)
1584 struct replacement *r = &replacements[n_replacements++];
1585 r->what = reloadnum;
1592 /* Duplicate any replacement we have recorded to apply at
1593 location ORIG_LOC to also be performed at DUP_LOC.
1594 This is used in insn patterns that use match_dup. */
1597 dup_replacements (rtx *dup_loc, rtx *orig_loc)
1599 int i, n = n_replacements;
1601 for (i = 0; i < n; i++)
1603 struct replacement *r = &replacements[i];
1604 if (r->where == orig_loc)
1605 push_replacement (dup_loc, r->what, r->mode);
1609 /* Transfer all replacements that used to be in reload FROM to be in
1613 transfer_replacements (int to, int from)
1617 for (i = 0; i < n_replacements; i++)
1618 if (replacements[i].what == from)
1619 replacements[i].what = to;
1622 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1623 or a subpart of it. If we have any replacements registered for IN_RTX,
1624 cancel the reloads that were supposed to load them.
1625 Return nonzero if we canceled any reloads. */
1627 remove_address_replacements (rtx in_rtx)
1630 char reload_flags[MAX_RELOADS];
1631 int something_changed = 0;
1633 memset (reload_flags, 0, sizeof reload_flags);
1634 for (i = 0, j = 0; i < n_replacements; i++)
1636 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1637 reload_flags[replacements[i].what] |= 1;
1640 replacements[j++] = replacements[i];
1641 reload_flags[replacements[i].what] |= 2;
1644 /* Note that the following store must be done before the recursive calls. */
1647 for (i = n_reloads - 1; i >= 0; i--)
1649 if (reload_flags[i] == 1)
1651 deallocate_reload_reg (i);
1652 remove_address_replacements (rld[i].in);
1654 something_changed = 1;
1657 return something_changed;
1660 /* If there is only one output reload, and it is not for an earlyclobber
1661 operand, try to combine it with a (logically unrelated) input reload
1662 to reduce the number of reload registers needed.
1664 This is safe if the input reload does not appear in
1665 the value being output-reloaded, because this implies
1666 it is not needed any more once the original insn completes.
1668 If that doesn't work, see we can use any of the registers that
1669 die in this insn as a reload register. We can if it is of the right
1670 class and does not appear in the value being output-reloaded. */
1673 combine_reloads (void)
1676 int output_reload = -1;
1677 int secondary_out = -1;
1680 /* Find the output reload; return unless there is exactly one
1681 and that one is mandatory. */
1683 for (i = 0; i < n_reloads; i++)
1684 if (rld[i].out != 0)
1686 if (output_reload >= 0)
1691 if (output_reload < 0 || rld[output_reload].optional)
1694 /* An input-output reload isn't combinable. */
1696 if (rld[output_reload].in != 0)
1699 /* If this reload is for an earlyclobber operand, we can't do anything. */
1700 if (earlyclobber_operand_p (rld[output_reload].out))
1703 /* If there is a reload for part of the address of this operand, we would
1704 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1705 its life to the point where doing this combine would not lower the
1706 number of spill registers needed. */
1707 for (i = 0; i < n_reloads; i++)
1708 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1709 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1710 && rld[i].opnum == rld[output_reload].opnum)
1713 /* Check each input reload; can we combine it? */
1715 for (i = 0; i < n_reloads; i++)
1716 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1717 /* Life span of this reload must not extend past main insn. */
1718 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1719 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1720 && rld[i].when_needed != RELOAD_OTHER
1721 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1722 == CLASS_MAX_NREGS (rld[output_reload].class,
1723 rld[output_reload].outmode))
1725 && rld[i].reg_rtx == 0
1726 #ifdef SECONDARY_MEMORY_NEEDED
1727 /* Don't combine two reloads with different secondary
1728 memory locations. */
1729 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1730 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1731 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1732 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1734 && (SMALL_REGISTER_CLASSES
1735 ? (rld[i].class == rld[output_reload].class)
1736 : (reg_class_subset_p (rld[i].class,
1737 rld[output_reload].class)
1738 || reg_class_subset_p (rld[output_reload].class,
1740 && (MATCHES (rld[i].in, rld[output_reload].out)
1741 /* Args reversed because the first arg seems to be
1742 the one that we imagine being modified
1743 while the second is the one that might be affected. */
1744 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1746 /* However, if the input is a register that appears inside
1747 the output, then we also can't share.
1748 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1749 If the same reload reg is used for both reg 69 and the
1750 result to be stored in memory, then that result
1751 will clobber the address of the memory ref. */
1752 && ! (REG_P (rld[i].in)
1753 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1754 rld[output_reload].out))))
1755 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1756 rld[i].when_needed != RELOAD_FOR_INPUT)
1757 && (reg_class_size[(int) rld[i].class]
1758 || SMALL_REGISTER_CLASSES)
1759 /* We will allow making things slightly worse by combining an
1760 input and an output, but no worse than that. */
1761 && (rld[i].when_needed == RELOAD_FOR_INPUT
1762 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1766 /* We have found a reload to combine with! */
1767 rld[i].out = rld[output_reload].out;
1768 rld[i].out_reg = rld[output_reload].out_reg;
1769 rld[i].outmode = rld[output_reload].outmode;
1770 /* Mark the old output reload as inoperative. */
1771 rld[output_reload].out = 0;
1772 /* The combined reload is needed for the entire insn. */
1773 rld[i].when_needed = RELOAD_OTHER;
1774 /* If the output reload had a secondary reload, copy it. */
1775 if (rld[output_reload].secondary_out_reload != -1)
1777 rld[i].secondary_out_reload
1778 = rld[output_reload].secondary_out_reload;
1779 rld[i].secondary_out_icode
1780 = rld[output_reload].secondary_out_icode;
1783 #ifdef SECONDARY_MEMORY_NEEDED
1784 /* Copy any secondary MEM. */
1785 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1786 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1787 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1789 /* If required, minimize the register class. */
1790 if (reg_class_subset_p (rld[output_reload].class,
1792 rld[i].class = rld[output_reload].class;
1794 /* Transfer all replacements from the old reload to the combined. */
1795 for (j = 0; j < n_replacements; j++)
1796 if (replacements[j].what == output_reload)
1797 replacements[j].what = i;
1802 /* If this insn has only one operand that is modified or written (assumed
1803 to be the first), it must be the one corresponding to this reload. It
1804 is safe to use anything that dies in this insn for that output provided
1805 that it does not occur in the output (we already know it isn't an
1806 earlyclobber. If this is an asm insn, give up. */
1808 if (INSN_CODE (this_insn) == -1)
1811 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1812 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1813 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1816 /* See if some hard register that dies in this insn and is not used in
1817 the output is the right class. Only works if the register we pick
1818 up can fully hold our output reload. */
1819 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1820 if (REG_NOTE_KIND (note) == REG_DEAD
1821 && REG_P (XEXP (note, 0))
1822 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1823 rld[output_reload].out)
1824 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1825 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1826 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1827 REGNO (XEXP (note, 0)))
1828 && (hard_regno_nregs[REGNO (XEXP (note, 0))][rld[output_reload].outmode]
1829 <= hard_regno_nregs[REGNO (XEXP (note, 0))][GET_MODE (XEXP (note, 0))])
1830 /* Ensure that a secondary or tertiary reload for this output
1831 won't want this register. */
1832 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1833 || (! (TEST_HARD_REG_BIT
1834 (reg_class_contents[(int) rld[secondary_out].class],
1835 REGNO (XEXP (note, 0))))
1836 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1837 || ! (TEST_HARD_REG_BIT
1838 (reg_class_contents[(int) rld[secondary_out].class],
1839 REGNO (XEXP (note, 0)))))))
1840 && ! fixed_regs[REGNO (XEXP (note, 0))])
1842 rld[output_reload].reg_rtx
1843 = gen_rtx_REG (rld[output_reload].outmode,
1844 REGNO (XEXP (note, 0)));
1849 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1850 See if one of IN and OUT is a register that may be used;
1851 this is desirable since a spill-register won't be needed.
1852 If so, return the register rtx that proves acceptable.
1854 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1855 CLASS is the register class required for the reload.
1857 If FOR_REAL is >= 0, it is the number of the reload,
1858 and in some cases when it can be discovered that OUT doesn't need
1859 to be computed, clear out rld[FOR_REAL].out.
1861 If FOR_REAL is -1, this should not be done, because this call
1862 is just to see if a register can be found, not to find and install it.
1864 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1865 puts an additional constraint on being able to use IN for OUT since
1866 IN must not appear elsewhere in the insn (it is assumed that IN itself
1867 is safe from the earlyclobber). */
1870 find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
1871 enum machine_mode inmode, enum machine_mode outmode,
1872 enum reg_class class, int for_real, int earlyclobber)
1880 /* If operands exceed a word, we can't use either of them
1881 unless they have the same size. */
1882 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1883 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1884 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1887 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1888 respectively refers to a hard register. */
1890 /* Find the inside of any subregs. */
1891 while (GET_CODE (out) == SUBREG)
1893 if (REG_P (SUBREG_REG (out))
1894 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1895 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1896 GET_MODE (SUBREG_REG (out)),
1899 out = SUBREG_REG (out);
1901 while (GET_CODE (in) == SUBREG)
1903 if (REG_P (SUBREG_REG (in))
1904 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1905 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1906 GET_MODE (SUBREG_REG (in)),
1909 in = SUBREG_REG (in);
1912 /* Narrow down the reg class, the same way push_reload will;
1913 otherwise we might find a dummy now, but push_reload won't. */
1914 class = PREFERRED_RELOAD_CLASS (in, class);
1916 /* See if OUT will do. */
1918 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1920 unsigned int regno = REGNO (out) + out_offset;
1921 unsigned int nwords = hard_regno_nregs[regno][outmode];
1924 /* When we consider whether the insn uses OUT,
1925 ignore references within IN. They don't prevent us
1926 from copying IN into OUT, because those refs would
1927 move into the insn that reloads IN.
1929 However, we only ignore IN in its role as this reload.
1930 If the insn uses IN elsewhere and it contains OUT,
1931 that counts. We can't be sure it's the "same" operand
1932 so it might not go through this reload. */
1934 *inloc = const0_rtx;
1936 if (regno < FIRST_PSEUDO_REGISTER
1937 && HARD_REGNO_MODE_OK (regno, outmode)
1938 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1939 PATTERN (this_insn), outloc))
1943 for (i = 0; i < nwords; i++)
1944 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1950 if (REG_P (real_out))
1953 value = gen_rtx_REG (outmode, regno);
1960 /* Consider using IN if OUT was not acceptable
1961 or if OUT dies in this insn (like the quotient in a divmod insn).
1962 We can't use IN unless it is dies in this insn,
1963 which means we must know accurately which hard regs are live.
1964 Also, the result can't go in IN if IN is used within OUT,
1965 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1966 if (hard_regs_live_known
1968 && REGNO (in) < FIRST_PSEUDO_REGISTER
1970 || find_reg_note (this_insn, REG_UNUSED, real_out))
1971 && find_reg_note (this_insn, REG_DEAD, real_in)
1972 && !fixed_regs[REGNO (in)]
1973 && HARD_REGNO_MODE_OK (REGNO (in),
1974 /* The only case where out and real_out might
1975 have different modes is where real_out
1976 is a subreg, and in that case, out
1978 (GET_MODE (out) != VOIDmode
1979 ? GET_MODE (out) : outmode)))
1981 unsigned int regno = REGNO (in) + in_offset;
1982 unsigned int nwords = hard_regno_nregs[regno][inmode];
1984 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
1985 && ! hard_reg_set_here_p (regno, regno + nwords,
1986 PATTERN (this_insn))
1988 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1989 PATTERN (this_insn), inloc)))
1993 for (i = 0; i < nwords; i++)
1994 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
2000 /* If we were going to use OUT as the reload reg
2001 and changed our mind, it means OUT is a dummy that
2002 dies here. So don't bother copying value to it. */
2003 if (for_real >= 0 && value == real_out)
2004 rld[for_real].out = 0;
2005 if (REG_P (real_in))
2008 value = gen_rtx_REG (inmode, regno);
2016 /* This page contains subroutines used mainly for determining
2017 whether the IN or an OUT of a reload can serve as the
2020 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2023 earlyclobber_operand_p (rtx x)
2027 for (i = 0; i < n_earlyclobbers; i++)
2028 if (reload_earlyclobbers[i] == x)
2034 /* Return 1 if expression X alters a hard reg in the range
2035 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2036 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2037 X should be the body of an instruction. */
2040 hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x)
2042 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2044 rtx op0 = SET_DEST (x);
2046 while (GET_CODE (op0) == SUBREG)
2047 op0 = SUBREG_REG (op0);
2050 unsigned int r = REGNO (op0);
2052 /* See if this reg overlaps range under consideration. */
2054 && r + hard_regno_nregs[r][GET_MODE (op0)] > beg_regno)
2058 else if (GET_CODE (x) == PARALLEL)
2060 int i = XVECLEN (x, 0) - 1;
2063 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2070 /* Return 1 if ADDR is a valid memory address for mode MODE,
2071 and check that each pseudo reg has the proper kind of
2075 strict_memory_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx addr)
2077 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2084 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2085 if they are the same hard reg, and has special hacks for
2086 autoincrement and autodecrement.
2087 This is specifically intended for find_reloads to use
2088 in determining whether two operands match.
2089 X is the operand whose number is the lower of the two.
2091 The value is 2 if Y contains a pre-increment that matches
2092 a non-incrementing address in X. */
2094 /* ??? To be completely correct, we should arrange to pass
2095 for X the output operand and for Y the input operand.
2096 For now, we assume that the output operand has the lower number
2097 because that is natural in (SET output (... input ...)). */
2100 operands_match_p (rtx x, rtx y)
2103 RTX_CODE code = GET_CODE (x);
2109 if ((code == REG || (code == SUBREG && REG_P (SUBREG_REG (x))))
2110 && (REG_P (y) || (GET_CODE (y) == SUBREG
2111 && REG_P (SUBREG_REG (y)))))
2117 i = REGNO (SUBREG_REG (x));
2118 if (i >= FIRST_PSEUDO_REGISTER)
2120 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2121 GET_MODE (SUBREG_REG (x)),
2128 if (GET_CODE (y) == SUBREG)
2130 j = REGNO (SUBREG_REG (y));
2131 if (j >= FIRST_PSEUDO_REGISTER)
2133 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2134 GET_MODE (SUBREG_REG (y)),
2141 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2142 multiple hard register group, so that for example (reg:DI 0) and
2143 (reg:SI 1) will be considered the same register. */
2144 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2145 && i < FIRST_PSEUDO_REGISTER)
2146 i += hard_regno_nregs[i][GET_MODE (x)] - 1;
2147 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2148 && j < FIRST_PSEUDO_REGISTER)
2149 j += hard_regno_nregs[j][GET_MODE (y)] - 1;
2153 /* If two operands must match, because they are really a single
2154 operand of an assembler insn, then two postincrements are invalid
2155 because the assembler insn would increment only once.
2156 On the other hand, a postincrement matches ordinary indexing
2157 if the postincrement is the output operand. */
2158 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2159 return operands_match_p (XEXP (x, 0), y);
2160 /* Two preincrements are invalid
2161 because the assembler insn would increment only once.
2162 On the other hand, a preincrement matches ordinary indexing
2163 if the preincrement is the input operand.
2164 In this case, return 2, since some callers need to do special
2165 things when this happens. */
2166 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2167 || GET_CODE (y) == PRE_MODIFY)
2168 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2172 /* Now we have disposed of all the cases
2173 in which different rtx codes can match. */
2174 if (code != GET_CODE (y))
2176 if (code == LABEL_REF)
2177 return XEXP (x, 0) == XEXP (y, 0);
2178 if (code == SYMBOL_REF)
2179 return XSTR (x, 0) == XSTR (y, 0);
2181 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2183 if (GET_MODE (x) != GET_MODE (y))
2186 /* Compare the elements. If any pair of corresponding elements
2187 fail to match, return 0 for the whole things. */
2190 fmt = GET_RTX_FORMAT (code);
2191 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2197 if (XWINT (x, i) != XWINT (y, i))
2202 if (XINT (x, i) != XINT (y, i))
2207 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2210 /* If any subexpression returns 2,
2211 we should return 2 if we are successful. */
2220 if (XVECLEN (x, i) != XVECLEN (y, i))
2222 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2224 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2232 /* It is believed that rtx's at this level will never
2233 contain anything but integers and other rtx's,
2234 except for within LABEL_REFs and SYMBOL_REFs. */
2239 return 1 + success_2;
2242 /* Describe the range of registers or memory referenced by X.
2243 If X is a register, set REG_FLAG and put the first register
2244 number into START and the last plus one into END.
2245 If X is a memory reference, put a base address into BASE
2246 and a range of integer offsets into START and END.
2247 If X is pushing on the stack, we can assume it causes no trouble,
2248 so we set the SAFE field. */
2250 static struct decomposition
2253 struct decomposition val;
2256 memset (&val, 0, sizeof (val));
2258 switch (GET_CODE (x))
2262 rtx base = NULL_RTX, offset = 0;
2263 rtx addr = XEXP (x, 0);
2265 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2266 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2268 val.base = XEXP (addr, 0);
2269 val.start = -GET_MODE_SIZE (GET_MODE (x));
2270 val.end = GET_MODE_SIZE (GET_MODE (x));
2271 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2275 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2277 if (GET_CODE (XEXP (addr, 1)) == PLUS
2278 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2279 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2281 val.base = XEXP (addr, 0);
2282 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2283 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2284 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2289 if (GET_CODE (addr) == CONST)
2291 addr = XEXP (addr, 0);
2294 if (GET_CODE (addr) == PLUS)
2296 if (CONSTANT_P (XEXP (addr, 0)))
2298 base = XEXP (addr, 1);
2299 offset = XEXP (addr, 0);
2301 else if (CONSTANT_P (XEXP (addr, 1)))
2303 base = XEXP (addr, 0);
2304 offset = XEXP (addr, 1);
2311 offset = const0_rtx;
2313 if (GET_CODE (offset) == CONST)
2314 offset = XEXP (offset, 0);
2315 if (GET_CODE (offset) == PLUS)
2317 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2319 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2320 offset = XEXP (offset, 0);
2322 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2324 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2325 offset = XEXP (offset, 1);
2329 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2330 offset = const0_rtx;
2333 else if (GET_CODE (offset) != CONST_INT)
2335 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2336 offset = const0_rtx;
2339 if (all_const && GET_CODE (base) == PLUS)
2340 base = gen_rtx_CONST (GET_MODE (base), base);
2342 gcc_assert (GET_CODE (offset) == CONST_INT);
2344 val.start = INTVAL (offset);
2345 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2352 val.start = true_regnum (x);
2355 /* A pseudo with no hard reg. */
2356 val.start = REGNO (x);
2357 val.end = val.start + 1;
2361 val.end = val.start + hard_regno_nregs[val.start][GET_MODE (x)];
2365 if (!REG_P (SUBREG_REG (x)))
2366 /* This could be more precise, but it's good enough. */
2367 return decompose (SUBREG_REG (x));
2369 val.start = true_regnum (x);
2371 return decompose (SUBREG_REG (x));
2374 val.end = val.start + hard_regno_nregs[val.start][GET_MODE (x)];
2378 /* This hasn't been assigned yet, so it can't conflict yet. */
2383 gcc_assert (CONSTANT_P (x));
2390 /* Return 1 if altering Y will not modify the value of X.
2391 Y is also described by YDATA, which should be decompose (Y). */
2394 immune_p (rtx x, rtx y, struct decomposition ydata)
2396 struct decomposition xdata;
2399 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2403 gcc_assert (MEM_P (y));
2404 /* If Y is memory and X is not, Y can't affect X. */
2408 xdata = decompose (x);
2410 if (! rtx_equal_p (xdata.base, ydata.base))
2412 /* If bases are distinct symbolic constants, there is no overlap. */
2413 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2415 /* Constants and stack slots never overlap. */
2416 if (CONSTANT_P (xdata.base)
2417 && (ydata.base == frame_pointer_rtx
2418 || ydata.base == hard_frame_pointer_rtx
2419 || ydata.base == stack_pointer_rtx))
2421 if (CONSTANT_P (ydata.base)
2422 && (xdata.base == frame_pointer_rtx
2423 || xdata.base == hard_frame_pointer_rtx
2424 || xdata.base == stack_pointer_rtx))
2426 /* If either base is variable, we don't know anything. */
2430 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2433 /* Similar, but calls decompose. */
2436 safe_from_earlyclobber (rtx op, rtx clobber)
2438 struct decomposition early_data;
2440 early_data = decompose (clobber);
2441 return immune_p (op, clobber, early_data);
2444 /* Main entry point of this file: search the body of INSN
2445 for values that need reloading and record them with push_reload.
2446 REPLACE nonzero means record also where the values occur
2447 so that subst_reloads can be used.
2449 IND_LEVELS says how many levels of indirection are supported by this
2450 machine; a value of zero means that a memory reference is not a valid
2453 LIVE_KNOWN says we have valid information about which hard
2454 regs are live at each point in the program; this is true when
2455 we are called from global_alloc but false when stupid register
2456 allocation has been done.
2458 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2459 which is nonnegative if the reg has been commandeered for reloading into.
2460 It is copied into STATIC_RELOAD_REG_P and referenced from there
2461 by various subroutines.
2463 Return TRUE if some operands need to be changed, because of swapping
2464 commutative operands, reg_equiv_address substitution, or whatever. */
2467 find_reloads (rtx insn, int replace, int ind_levels, int live_known,
2468 short *reload_reg_p)
2470 int insn_code_number;
2473 /* These start out as the constraints for the insn
2474 and they are chewed up as we consider alternatives. */
2475 char *constraints[MAX_RECOG_OPERANDS];
2476 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2478 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2479 char pref_or_nothing[MAX_RECOG_OPERANDS];
2480 /* Nonzero for a MEM operand whose entire address needs a reload.
2481 May be -1 to indicate the entire address may or may not need a reload. */
2482 int address_reloaded[MAX_RECOG_OPERANDS];
2483 /* Nonzero for an address operand that needs to be completely reloaded.
2484 May be -1 to indicate the entire operand may or may not need a reload. */
2485 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2486 /* Value of enum reload_type to use for operand. */
2487 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2488 /* Value of enum reload_type to use within address of operand. */
2489 enum reload_type address_type[MAX_RECOG_OPERANDS];
2490 /* Save the usage of each operand. */
2491 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2492 int no_input_reloads = 0, no_output_reloads = 0;
2494 int this_alternative[MAX_RECOG_OPERANDS];
2495 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2496 char this_alternative_win[MAX_RECOG_OPERANDS];
2497 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2498 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2499 int this_alternative_matches[MAX_RECOG_OPERANDS];
2501 int goal_alternative[MAX_RECOG_OPERANDS];
2502 int this_alternative_number;
2503 int goal_alternative_number = 0;
2504 int operand_reloadnum[MAX_RECOG_OPERANDS];
2505 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2506 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2507 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2508 char goal_alternative_win[MAX_RECOG_OPERANDS];
2509 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2510 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2511 int goal_alternative_swapped;
2514 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2515 rtx substed_operand[MAX_RECOG_OPERANDS];
2516 rtx body = PATTERN (insn);
2517 rtx set = single_set (insn);
2518 int goal_earlyclobber = 0, this_earlyclobber;
2519 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2525 n_earlyclobbers = 0;
2526 replace_reloads = replace;
2527 hard_regs_live_known = live_known;
2528 static_reload_reg_p = reload_reg_p;
2530 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2531 neither are insns that SET cc0. Insns that use CC0 are not allowed
2532 to have any input reloads. */
2533 if (JUMP_P (insn) || CALL_P (insn))
2534 no_output_reloads = 1;
2537 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2538 no_input_reloads = 1;
2539 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2540 no_output_reloads = 1;
2543 #ifdef SECONDARY_MEMORY_NEEDED
2544 /* The eliminated forms of any secondary memory locations are per-insn, so
2545 clear them out here. */
2547 if (secondary_memlocs_elim_used)
2549 memset (secondary_memlocs_elim, 0,
2550 sizeof (secondary_memlocs_elim[0]) * secondary_memlocs_elim_used);
2551 secondary_memlocs_elim_used = 0;
2555 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2556 is cheap to move between them. If it is not, there may not be an insn
2557 to do the copy, so we may need a reload. */
2558 if (GET_CODE (body) == SET
2559 && REG_P (SET_DEST (body))
2560 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2561 && REG_P (SET_SRC (body))
2562 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2563 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2564 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2565 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2568 extract_insn (insn);
2570 noperands = reload_n_operands = recog_data.n_operands;
2571 n_alternatives = recog_data.n_alternatives;
2573 /* Just return "no reloads" if insn has no operands with constraints. */
2574 if (noperands == 0 || n_alternatives == 0)
2577 insn_code_number = INSN_CODE (insn);
2578 this_insn_is_asm = insn_code_number < 0;
2580 memcpy (operand_mode, recog_data.operand_mode,
2581 noperands * sizeof (enum machine_mode));
2582 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2586 /* If we will need to know, later, whether some pair of operands
2587 are the same, we must compare them now and save the result.
2588 Reloading the base and index registers will clobber them
2589 and afterward they will fail to match. */
2591 for (i = 0; i < noperands; i++)
2596 substed_operand[i] = recog_data.operand[i];
2599 modified[i] = RELOAD_READ;
2601 /* Scan this operand's constraint to see if it is an output operand,
2602 an in-out operand, is commutative, or should match another. */
2606 p += CONSTRAINT_LEN (c, p);
2610 modified[i] = RELOAD_WRITE;
2613 modified[i] = RELOAD_READ_WRITE;
2617 /* The last operand should not be marked commutative. */
2618 gcc_assert (i != noperands - 1);
2620 /* We currently only support one commutative pair of
2621 operands. Some existing asm code currently uses more
2622 than one pair. Previously, that would usually work,
2623 but sometimes it would crash the compiler. We
2624 continue supporting that case as well as we can by
2625 silently ignoring all but the first pair. In the
2626 future we may handle it correctly. */
2627 if (commutative < 0)
2630 gcc_assert (this_insn_is_asm);
2633 /* Use of ISDIGIT is tempting here, but it may get expensive because
2634 of locale support we don't want. */
2635 case '0': case '1': case '2': case '3': case '4':
2636 case '5': case '6': case '7': case '8': case '9':
2638 c = strtoul (p - 1, &p, 10);
2640 operands_match[c][i]
2641 = operands_match_p (recog_data.operand[c],
2642 recog_data.operand[i]);
2644 /* An operand may not match itself. */
2645 gcc_assert (c != i);
2647 /* If C can be commuted with C+1, and C might need to match I,
2648 then C+1 might also need to match I. */
2649 if (commutative >= 0)
2651 if (c == commutative || c == commutative + 1)
2653 int other = c + (c == commutative ? 1 : -1);
2654 operands_match[other][i]
2655 = operands_match_p (recog_data.operand[other],
2656 recog_data.operand[i]);
2658 if (i == commutative || i == commutative + 1)
2660 int other = i + (i == commutative ? 1 : -1);
2661 operands_match[c][other]
2662 = operands_match_p (recog_data.operand[c],
2663 recog_data.operand[other]);
2665 /* Note that C is supposed to be less than I.
2666 No need to consider altering both C and I because in
2667 that case we would alter one into the other. */
2674 /* Examine each operand that is a memory reference or memory address
2675 and reload parts of the addresses into index registers.
2676 Also here any references to pseudo regs that didn't get hard regs
2677 but are equivalent to constants get replaced in the insn itself
2678 with those constants. Nobody will ever see them again.
2680 Finally, set up the preferred classes of each operand. */
2682 for (i = 0; i < noperands; i++)
2684 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2686 address_reloaded[i] = 0;
2687 address_operand_reloaded[i] = 0;
2688 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2689 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2692 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2693 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2696 if (*constraints[i] == 0)
2697 /* Ignore things like match_operator operands. */
2699 else if (constraints[i][0] == 'p'
2700 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
2702 address_operand_reloaded[i]
2703 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2704 recog_data.operand[i],
2705 recog_data.operand_loc[i],
2706 i, operand_type[i], ind_levels, insn);
2708 /* If we now have a simple operand where we used to have a
2709 PLUS or MULT, re-recognize and try again. */
2710 if ((OBJECT_P (*recog_data.operand_loc[i])
2711 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2712 && (GET_CODE (recog_data.operand[i]) == MULT
2713 || GET_CODE (recog_data.operand[i]) == PLUS))
2715 INSN_CODE (insn) = -1;
2716 retval = find_reloads (insn, replace, ind_levels, live_known,
2721 recog_data.operand[i] = *recog_data.operand_loc[i];
2722 substed_operand[i] = recog_data.operand[i];
2724 /* Address operands are reloaded in their existing mode,
2725 no matter what is specified in the machine description. */
2726 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2728 else if (code == MEM)
2731 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2732 recog_data.operand_loc[i],
2733 XEXP (recog_data.operand[i], 0),
2734 &XEXP (recog_data.operand[i], 0),
2735 i, address_type[i], ind_levels, insn);
2736 recog_data.operand[i] = *recog_data.operand_loc[i];
2737 substed_operand[i] = recog_data.operand[i];
2739 else if (code == SUBREG)
2741 rtx reg = SUBREG_REG (recog_data.operand[i]);
2743 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2746 && &SET_DEST (set) == recog_data.operand_loc[i],
2748 &address_reloaded[i]);
2750 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2751 that didn't get a hard register, emit a USE with a REG_EQUAL
2752 note in front so that we might inherit a previous, possibly
2758 && (GET_MODE_SIZE (GET_MODE (reg))
2759 >= GET_MODE_SIZE (GET_MODE (op))))
2760 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2762 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2764 substed_operand[i] = recog_data.operand[i] = op;
2766 else if (code == PLUS || GET_RTX_CLASS (code) == RTX_UNARY)
2767 /* We can get a PLUS as an "operand" as a result of register
2768 elimination. See eliminate_regs and gen_reload. We handle
2769 a unary operator by reloading the operand. */
2770 substed_operand[i] = recog_data.operand[i]
2771 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2772 ind_levels, 0, insn,
2773 &address_reloaded[i]);
2774 else if (code == REG)
2776 /* This is equivalent to calling find_reloads_toplev.
2777 The code is duplicated for speed.
2778 When we find a pseudo always equivalent to a constant,
2779 we replace it by the constant. We must be sure, however,
2780 that we don't try to replace it in the insn in which it
2782 int regno = REGNO (recog_data.operand[i]);
2783 if (reg_equiv_constant[regno] != 0
2784 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2786 /* Record the existing mode so that the check if constants are
2787 allowed will work when operand_mode isn't specified. */
2789 if (operand_mode[i] == VOIDmode)
2790 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2792 substed_operand[i] = recog_data.operand[i]
2793 = reg_equiv_constant[regno];
2795 if (reg_equiv_memory_loc[regno] != 0
2796 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2797 /* We need not give a valid is_set_dest argument since the case
2798 of a constant equivalence was checked above. */
2799 substed_operand[i] = recog_data.operand[i]
2800 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2801 ind_levels, 0, insn,
2802 &address_reloaded[i]);
2804 /* If the operand is still a register (we didn't replace it with an
2805 equivalent), get the preferred class to reload it into. */
2806 code = GET_CODE (recog_data.operand[i]);
2808 = ((code == REG && REGNO (recog_data.operand[i])
2809 >= FIRST_PSEUDO_REGISTER)
2810 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2814 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2815 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2818 /* If this is simply a copy from operand 1 to operand 0, merge the
2819 preferred classes for the operands. */
2820 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2821 && recog_data.operand[1] == SET_SRC (set))
2823 preferred_class[0] = preferred_class[1]
2824 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2825 pref_or_nothing[0] |= pref_or_nothing[1];
2826 pref_or_nothing[1] |= pref_or_nothing[0];
2829 /* Now see what we need for pseudo-regs that didn't get hard regs
2830 or got the wrong kind of hard reg. For this, we must consider
2831 all the operands together against the register constraints. */
2833 best = MAX_RECOG_OPERANDS * 2 + 600;
2836 goal_alternative_swapped = 0;
2839 /* The constraints are made of several alternatives.
2840 Each operand's constraint looks like foo,bar,... with commas
2841 separating the alternatives. The first alternatives for all
2842 operands go together, the second alternatives go together, etc.
2844 First loop over alternatives. */
2846 for (this_alternative_number = 0;
2847 this_alternative_number < n_alternatives;
2848 this_alternative_number++)
2850 /* Loop over operands for one constraint alternative. */
2851 /* LOSERS counts those that don't fit this alternative
2852 and would require loading. */
2854 /* BAD is set to 1 if it some operand can't fit this alternative
2855 even after reloading. */
2857 /* REJECT is a count of how undesirable this alternative says it is
2858 if any reloading is required. If the alternative matches exactly
2859 then REJECT is ignored, but otherwise it gets this much
2860 counted against it in addition to the reloading needed. Each
2861 ? counts three times here since we want the disparaging caused by
2862 a bad register class to only count 1/3 as much. */
2865 this_earlyclobber = 0;
2867 for (i = 0; i < noperands; i++)
2869 char *p = constraints[i];
2874 /* 0 => this operand can be reloaded somehow for this alternative. */
2876 /* 0 => this operand can be reloaded if the alternative allows regs. */
2880 rtx operand = recog_data.operand[i];
2882 /* Nonzero means this is a MEM that must be reloaded into a reg
2883 regardless of what the constraint says. */
2884 int force_reload = 0;
2886 /* Nonzero if a constant forced into memory would be OK for this
2889 int earlyclobber = 0;
2891 /* If the predicate accepts a unary operator, it means that
2892 we need to reload the operand, but do not do this for
2893 match_operator and friends. */
2894 if (UNARY_P (operand) && *p != 0)
2895 operand = XEXP (operand, 0);
2897 /* If the operand is a SUBREG, extract
2898 the REG or MEM (or maybe even a constant) within.
2899 (Constants can occur as a result of reg_equiv_constant.) */
2901 while (GET_CODE (operand) == SUBREG)
2903 /* Offset only matters when operand is a REG and
2904 it is a hard reg. This is because it is passed
2905 to reg_fits_class_p if it is a REG and all pseudos
2906 return 0 from that function. */
2907 if (REG_P (SUBREG_REG (operand))
2908 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2910 if (!subreg_offset_representable_p
2911 (REGNO (SUBREG_REG (operand)),
2912 GET_MODE (SUBREG_REG (operand)),
2913 SUBREG_BYTE (operand),
2914 GET_MODE (operand)))
2916 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2917 GET_MODE (SUBREG_REG (operand)),
2918 SUBREG_BYTE (operand),
2919 GET_MODE (operand));
2921 operand = SUBREG_REG (operand);
2922 /* Force reload if this is a constant or PLUS or if there may
2923 be a problem accessing OPERAND in the outer mode. */
2924 if (CONSTANT_P (operand)
2925 || GET_CODE (operand) == PLUS
2926 /* We must force a reload of paradoxical SUBREGs
2927 of a MEM because the alignment of the inner value
2928 may not be enough to do the outer reference. On
2929 big-endian machines, it may also reference outside
2932 On machines that extend byte operations and we have a
2933 SUBREG where both the inner and outer modes are no wider
2934 than a word and the inner mode is narrower, is integral,
2935 and gets extended when loaded from memory, combine.c has
2936 made assumptions about the behavior of the machine in such
2937 register access. If the data is, in fact, in memory we
2938 must always load using the size assumed to be in the
2939 register and let the insn do the different-sized
2942 This is doubly true if WORD_REGISTER_OPERATIONS. In
2943 this case eliminate_regs has left non-paradoxical
2944 subregs for push_reload to see. Make sure it does
2945 by forcing the reload.
2947 ??? When is it right at this stage to have a subreg
2948 of a mem that is _not_ to be handled specially? IMO
2949 those should have been reduced to just a mem. */
2950 || ((MEM_P (operand)
2952 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2953 #ifndef WORD_REGISTER_OPERATIONS
2954 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2955 < BIGGEST_ALIGNMENT)
2956 && (GET_MODE_SIZE (operand_mode[i])
2957 > GET_MODE_SIZE (GET_MODE (operand))))
2959 #ifdef LOAD_EXTEND_OP
2960 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2961 && (GET_MODE_SIZE (GET_MODE (operand))
2963 && (GET_MODE_SIZE (operand_mode[i])
2964 > GET_MODE_SIZE (GET_MODE (operand)))
2965 && INTEGRAL_MODE_P (GET_MODE (operand))
2966 && LOAD_EXTEND_OP (GET_MODE (operand)) != UNKNOWN)
2975 this_alternative[i] = (int) NO_REGS;
2976 this_alternative_win[i] = 0;
2977 this_alternative_match_win[i] = 0;
2978 this_alternative_offmemok[i] = 0;
2979 this_alternative_earlyclobber[i] = 0;
2980 this_alternative_matches[i] = -1;
2982 /* An empty constraint or empty alternative
2983 allows anything which matched the pattern. */
2984 if (*p == 0 || *p == ',')
2987 /* Scan this alternative's specs for this operand;
2988 set WIN if the operand fits any letter in this alternative.
2989 Otherwise, clear BADOP if this operand could
2990 fit some letter after reloads,
2991 or set WINREG if this operand could fit after reloads
2992 provided the constraint allows some registers. */
2995 switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
3004 case '=': case '+': case '*':
3008 /* We only support one commutative marker, the first
3009 one. We already set commutative above. */
3021 /* Ignore rest of this alternative as far as
3022 reloading is concerned. */
3025 while (*p && *p != ',');
3029 case '0': case '1': case '2': case '3': case '4':
3030 case '5': case '6': case '7': case '8': case '9':
3031 m = strtoul (p, &end, 10);
3035 this_alternative_matches[i] = m;
3036 /* We are supposed to match a previous operand.
3037 If we do, we win if that one did.
3038 If we do not, count both of the operands as losers.
3039 (This is too conservative, since most of the time
3040 only a single reload insn will be needed to make
3041 the two operands win. As a result, this alternative
3042 may be rejected when it is actually desirable.) */
3043 if ((swapped && (m != commutative || i != commutative + 1))
3044 /* If we are matching as if two operands were swapped,
3045 also pretend that operands_match had been computed
3047 But if I is the second of those and C is the first,
3048 don't exchange them, because operands_match is valid
3049 only on one side of its diagonal. */
3051 [(m == commutative || m == commutative + 1)
3052 ? 2 * commutative + 1 - m : m]
3053 [(i == commutative || i == commutative + 1)
3054 ? 2 * commutative + 1 - i : i])
3055 : operands_match[m][i])
3057 /* If we are matching a non-offsettable address where an
3058 offsettable address was expected, then we must reject
3059 this combination, because we can't reload it. */
3060 if (this_alternative_offmemok[m]
3061 && MEM_P (recog_data.operand[m])
3062 && this_alternative[m] == (int) NO_REGS
3063 && ! this_alternative_win[m])
3066 did_match = this_alternative_win[m];
3070 /* Operands don't match. */
3073 /* Retroactively mark the operand we had to match
3074 as a loser, if it wasn't already. */
3075 if (this_alternative_win[m])
3077 this_alternative_win[m] = 0;
3078 if (this_alternative[m] == (int) NO_REGS)
3080 /* But count the pair only once in the total badness of
3081 this alternative, if the pair can be a dummy reload.
3082 The pointers in operand_loc are not swapped; swap
3083 them by hand if necessary. */
3084 if (swapped && i == commutative)
3085 loc1 = commutative + 1;
3086 else if (swapped && i == commutative + 1)
3090 if (swapped && m == commutative)
3091 loc2 = commutative + 1;
3092 else if (swapped && m == commutative + 1)
3097 = find_dummy_reload (recog_data.operand[i],
3098 recog_data.operand[m],
3099 recog_data.operand_loc[loc1],
3100 recog_data.operand_loc[loc2],
3101 operand_mode[i], operand_mode[m],
3102 this_alternative[m], -1,
3103 this_alternative_earlyclobber[m]);
3108 /* This can be fixed with reloads if the operand
3109 we are supposed to match can be fixed with reloads. */
3111 this_alternative[i] = this_alternative[m];
3113 /* If we have to reload this operand and some previous
3114 operand also had to match the same thing as this
3115 operand, we don't know how to do that. So reject this
3117 if (! did_match || force_reload)
3118 for (j = 0; j < i; j++)
3119 if (this_alternative_matches[j]
3120 == this_alternative_matches[i])
3125 /* All necessary reloads for an address_operand
3126 were handled in find_reloads_address. */
3127 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3137 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3138 && reg_renumber[REGNO (operand)] < 0))
3140 if (CONST_POOL_OK_P (operand))
3147 && ! address_reloaded[i]
3148 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3149 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3155 && ! address_reloaded[i]
3156 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3157 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3161 /* Memory operand whose address is not offsettable. */
3166 && ! (ind_levels ? offsettable_memref_p (operand)
3167 : offsettable_nonstrict_memref_p (operand))
3168 /* Certain mem addresses will become offsettable
3169 after they themselves are reloaded. This is important;
3170 we don't want our own handling of unoffsettables
3171 to override the handling of reg_equiv_address. */
3172 && !(REG_P (XEXP (operand, 0))
3174 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3178 /* Memory operand whose address is offsettable. */
3182 if ((MEM_P (operand)
3183 /* If IND_LEVELS, find_reloads_address won't reload a
3184 pseudo that didn't get a hard reg, so we have to
3185 reject that case. */
3186 && ((ind_levels ? offsettable_memref_p (operand)
3187 : offsettable_nonstrict_memref_p (operand))
3188 /* A reloaded address is offsettable because it is now
3189 just a simple register indirect. */
3190 || address_reloaded[i] == 1))
3192 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3193 && reg_renumber[REGNO (operand)] < 0
3194 /* If reg_equiv_address is nonzero, we will be
3195 loading it into a register; hence it will be
3196 offsettable, but we cannot say that reg_equiv_mem
3197 is offsettable without checking. */
3198 && ((reg_equiv_mem[REGNO (operand)] != 0
3199 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3200 || (reg_equiv_address[REGNO (operand)] != 0))))
3202 if (CONST_POOL_OK_P (operand)
3210 /* Output operand that is stored before the need for the
3211 input operands (and their index registers) is over. */
3212 earlyclobber = 1, this_earlyclobber = 1;
3217 if (GET_CODE (operand) == CONST_DOUBLE
3218 || (GET_CODE (operand) == CONST_VECTOR
3219 && (GET_MODE_CLASS (GET_MODE (operand))
3220 == MODE_VECTOR_FLOAT)))
3226 if (GET_CODE (operand) == CONST_DOUBLE
3227 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand, c, p))
3232 if (GET_CODE (operand) == CONST_INT
3233 || (GET_CODE (operand) == CONST_DOUBLE
3234 && GET_MODE (operand) == VOIDmode))
3237 if (CONSTANT_P (operand)
3238 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)))
3243 if (GET_CODE (operand) == CONST_INT
3244 || (GET_CODE (operand) == CONST_DOUBLE
3245 && GET_MODE (operand) == VOIDmode))
3257 if (GET_CODE (operand) == CONST_INT
3258 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand), c, p))
3268 /* A PLUS is never a valid operand, but reload can make
3269 it from a register when eliminating registers. */
3270 && GET_CODE (operand) != PLUS
3271 /* A SCRATCH is not a valid operand. */
3272 && GET_CODE (operand) != SCRATCH
3273 && (! CONSTANT_P (operand)
3275 || LEGITIMATE_PIC_OPERAND_P (operand))
3276 && (GENERAL_REGS == ALL_REGS
3278 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3279 && reg_renumber[REGNO (operand)] < 0)))
3281 /* Drop through into 'r' case. */
3285 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3289 if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
3291 #ifdef EXTRA_CONSTRAINT_STR
3292 if (EXTRA_MEMORY_CONSTRAINT (c, p))
3296 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3298 /* If the address was already reloaded,
3300 else if (MEM_P (operand)
3301 && address_reloaded[i] == 1)
3303 /* Likewise if the address will be reloaded because
3304 reg_equiv_address is nonzero. For reg_equiv_mem
3305 we have to check. */
3306 else if (REG_P (operand)
3307 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3308 && reg_renumber[REGNO (operand)] < 0
3309 && ((reg_equiv_mem[REGNO (operand)] != 0
3310 && EXTRA_CONSTRAINT_STR (reg_equiv_mem[REGNO (operand)], c, p))
3311 || (reg_equiv_address[REGNO (operand)] != 0)))
3314 /* If we didn't already win, we can reload
3315 constants via force_const_mem, and other
3316 MEMs by reloading the address like for 'o'. */
3317 if (CONST_POOL_OK_P (operand)
3324 if (EXTRA_ADDRESS_CONSTRAINT (c, p))
3326 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3329 /* If we didn't already win, we can reload
3330 the address into a base register. */
3331 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3336 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3343 = (int) (reg_class_subunion
3344 [this_alternative[i]]
3345 [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]);
3347 if (GET_MODE (operand) == BLKmode)
3351 && reg_fits_class_p (operand, this_alternative[i],
3352 offset, GET_MODE (recog_data.operand[i])))
3356 while ((p += len), c);
3360 /* If this operand could be handled with a reg,
3361 and some reg is allowed, then this operand can be handled. */
3362 if (winreg && this_alternative[i] != (int) NO_REGS)
3365 /* Record which operands fit this alternative. */
3366 this_alternative_earlyclobber[i] = earlyclobber;
3367 if (win && ! force_reload)
3368 this_alternative_win[i] = 1;
3369 else if (did_match && ! force_reload)
3370 this_alternative_match_win[i] = 1;
3373 int const_to_mem = 0;
3375 this_alternative_offmemok[i] = offmemok;
3379 /* Alternative loses if it has no regs for a reg operand. */
3381 && this_alternative[i] == (int) NO_REGS
3382 && this_alternative_matches[i] < 0)
3385 /* If this is a constant that is reloaded into the desired
3386 class by copying it to memory first, count that as another
3387 reload. This is consistent with other code and is
3388 required to avoid choosing another alternative when
3389 the constant is moved into memory by this function on
3390 an early reload pass. Note that the test here is
3391 precisely the same as in the code below that calls
3393 if (CONST_POOL_OK_P (operand)
3394 && ((PREFERRED_RELOAD_CLASS (operand,
3395 (enum reg_class) this_alternative[i])
3397 || no_input_reloads)
3398 && operand_mode[i] != VOIDmode)
3401 if (this_alternative[i] != (int) NO_REGS)
3405 /* If we can't reload this value at all, reject this
3406 alternative. Note that we could also lose due to
3407 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3410 if (! CONSTANT_P (operand)
3411 && (enum reg_class) this_alternative[i] != NO_REGS
3412 && (PREFERRED_RELOAD_CLASS (operand,
3413 (enum reg_class) this_alternative[i])
3417 /* Alternative loses if it requires a type of reload not
3418 permitted for this insn. We can always reload SCRATCH
3419 and objects with a REG_UNUSED note. */
3420 else if (GET_CODE (operand) != SCRATCH
3421 && modified[i] != RELOAD_READ && no_output_reloads
3422 && ! find_reg_note (insn, REG_UNUSED, operand))
3424 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3428 /* We prefer to reload pseudos over reloading other things,
3429 since such reloads may be able to be eliminated later.
3430 If we are reloading a SCRATCH, we won't be generating any
3431 insns, just using a register, so it is also preferred.
3432 So bump REJECT in other cases. Don't do this in the
3433 case where we are forcing a constant into memory and
3434 it will then win since we don't want to have a different
3435 alternative match then. */
3436 if (! (REG_P (operand)
3437 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3438 && GET_CODE (operand) != SCRATCH
3439 && ! (const_to_mem && constmemok))
3442 /* Input reloads can be inherited more often than output
3443 reloads can be removed, so penalize output reloads. */
3444 if (operand_type[i] != RELOAD_FOR_INPUT
3445 && GET_CODE (operand) != SCRATCH)
3449 /* If this operand is a pseudo register that didn't get a hard
3450 reg and this alternative accepts some register, see if the
3451 class that we want is a subset of the preferred class for this
3452 register. If not, but it intersects that class, use the
3453 preferred class instead. If it does not intersect the preferred
3454 class, show that usage of this alternative should be discouraged;
3455 it will be discouraged more still if the register is `preferred
3456 or nothing'. We do this because it increases the chance of
3457 reusing our spill register in a later insn and avoiding a pair
3458 of memory stores and loads.
3460 Don't bother with this if this alternative will accept this
3463 Don't do this for a multiword operand, since it is only a
3464 small win and has the risk of requiring more spill registers,
3465 which could cause a large loss.
3467 Don't do this if the preferred class has only one register
3468 because we might otherwise exhaust the class. */
3470 if (! win && ! did_match
3471 && this_alternative[i] != (int) NO_REGS
3472 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3473 && reg_class_size[(int) preferred_class[i]] > 1)
3475 if (! reg_class_subset_p (this_alternative[i],
3476 preferred_class[i]))
3478 /* Since we don't have a way of forming the intersection,
3479 we just do something special if the preferred class
3480 is a subset of the class we have; that's the most
3481 common case anyway. */
3482 if (reg_class_subset_p (preferred_class[i],
3483 this_alternative[i]))
3484 this_alternative[i] = (int) preferred_class[i];
3486 reject += (2 + 2 * pref_or_nothing[i]);
3491 /* Now see if any output operands that are marked "earlyclobber"
3492 in this alternative conflict with any input operands
3493 or any memory addresses. */
3495 for (i = 0; i < noperands; i++)
3496 if (this_alternative_earlyclobber[i]
3497 && (this_alternative_win[i] || this_alternative_match_win[i]))
3499 struct decomposition early_data;
3501 early_data = decompose (recog_data.operand[i]);
3503 gcc_assert (modified[i] != RELOAD_READ);
3505 if (this_alternative[i] == NO_REGS)
3507 this_alternative_earlyclobber[i] = 0;
3508 gcc_assert (this_insn_is_asm);
3509 error_for_asm (this_insn,
3510 "%<&%> constraint used with no register class");
3513 for (j = 0; j < noperands; j++)
3514 /* Is this an input operand or a memory ref? */
3515 if ((MEM_P (recog_data.operand[j])
3516 || modified[j] != RELOAD_WRITE)
3518 /* Ignore things like match_operator operands. */
3519 && *recog_data.constraints[j] != 0
3520 /* Don't count an input operand that is constrained to match
3521 the early clobber operand. */
3522 && ! (this_alternative_matches[j] == i
3523 && rtx_equal_p (recog_data.operand[i],
3524 recog_data.operand[j]))
3525 /* Is it altered by storing the earlyclobber operand? */
3526 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3529 /* If the output is in a single-reg class,
3530 it's costly to reload it, so reload the input instead. */
3531 if (reg_class_size[this_alternative[i]] == 1
3532 && (REG_P (recog_data.operand[j])
3533 || GET_CODE (recog_data.operand[j]) == SUBREG))
3536 this_alternative_win[j] = 0;
3537 this_alternative_match_win[j] = 0;
3542 /* If an earlyclobber operand conflicts with something,
3543 it must be reloaded, so request this and count the cost. */
3547 this_alternative_win[i] = 0;
3548 this_alternative_match_win[j] = 0;
3549 for (j = 0; j < noperands; j++)
3550 if (this_alternative_matches[j] == i
3551 && this_alternative_match_win[j])
3553 this_alternative_win[j] = 0;
3554 this_alternative_match_win[j] = 0;
3560 /* If one alternative accepts all the operands, no reload required,
3561 choose that alternative; don't consider the remaining ones. */
3564 /* Unswap these so that they are never swapped at `finish'. */
3565 if (commutative >= 0)
3567 recog_data.operand[commutative] = substed_operand[commutative];
3568 recog_data.operand[commutative + 1]
3569 = substed_operand[commutative + 1];
3571 for (i = 0; i < noperands; i++)
3573 goal_alternative_win[i] = this_alternative_win[i];
3574 goal_alternative_match_win[i] = this_alternative_match_win[i];
3575 goal_alternative[i] = this_alternative[i];
3576 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3577 goal_alternative_matches[i] = this_alternative_matches[i];
3578 goal_alternative_earlyclobber[i]
3579 = this_alternative_earlyclobber[i];
3581 goal_alternative_number = this_alternative_number;
3582 goal_alternative_swapped = swapped;
3583 goal_earlyclobber = this_earlyclobber;
3587 /* REJECT, set by the ! and ? constraint characters and when a register
3588 would be reloaded into a non-preferred class, discourages the use of
3589 this alternative for a reload goal. REJECT is incremented by six
3590 for each ? and two for each non-preferred class. */
3591 losers = losers * 6 + reject;
3593 /* If this alternative can be made to work by reloading,
3594 and it needs less reloading than the others checked so far,
3595 record it as the chosen goal for reloading. */
3596 if (! bad && best > losers)
3598 for (i = 0; i < noperands; i++)
3600 goal_alternative[i] = this_alternative[i];
3601 goal_alternative_win[i] = this_alternative_win[i];
3602 goal_alternative_match_win[i] = this_alternative_match_win[i];
3603 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3604 goal_alternative_matches[i] = this_alternative_matches[i];
3605 goal_alternative_earlyclobber[i]
3606 = this_alternative_earlyclobber[i];
3608 goal_alternative_swapped = swapped;
3610 goal_alternative_number = this_alternative_number;
3611 goal_earlyclobber = this_earlyclobber;
3615 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3616 then we need to try each alternative twice,
3617 the second time matching those two operands
3618 as if we had exchanged them.
3619 To do this, really exchange them in operands.
3621 If we have just tried the alternatives the second time,
3622 return operands to normal and drop through. */
3624 if (commutative >= 0)
3629 enum reg_class tclass;
3632 recog_data.operand[commutative] = substed_operand[commutative + 1];
3633 recog_data.operand[commutative + 1] = substed_operand[commutative];
3634 /* Swap the duplicates too. */
3635 for (i = 0; i < recog_data.n_dups; i++)
3636 if (recog_data.dup_num[i] == commutative
3637 || recog_data.dup_num[i] == commutative + 1)
3638 *recog_data.dup_loc[i]
3639 = recog_data.operand[(int) recog_data.dup_num[i]];
3641 tclass = preferred_class[commutative];
3642 preferred_class[commutative] = preferred_class[commutative + 1];
3643 preferred_class[commutative + 1] = tclass;
3645 t = pref_or_nothing[commutative];
3646 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3647 pref_or_nothing[commutative + 1] = t;
3649 memcpy (constraints, recog_data.constraints,
3650 noperands * sizeof (char *));
3655 recog_data.operand[commutative] = substed_operand[commutative];
3656 recog_data.operand[commutative + 1]
3657 = substed_operand[commutative + 1];
3658 /* Unswap the duplicates too. */
3659 for (i = 0; i < recog_data.n_dups; i++)
3660 if (recog_data.dup_num[i] == commutative
3661 || recog_data.dup_num[i] == commutative + 1)
3662 *recog_data.dup_loc[i]
3663 = recog_data.operand[(int) recog_data.dup_num[i]];
3667 /* The operands don't meet the constraints.
3668 goal_alternative describes the alternative
3669 that we could reach by reloading the fewest operands.
3670 Reload so as to fit it. */
3672 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3674 /* No alternative works with reloads?? */
3675 if (insn_code_number >= 0)
3676 fatal_insn ("unable to generate reloads for:", insn);
3677 error_for_asm (insn, "inconsistent operand constraints in an %<asm%>");
3678 /* Avoid further trouble with this insn. */
3679 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3684 /* Jump to `finish' from above if all operands are valid already.
3685 In that case, goal_alternative_win is all 1. */
3688 /* Right now, for any pair of operands I and J that are required to match,
3690 goal_alternative_matches[J] is I.
3691 Set up goal_alternative_matched as the inverse function:
3692 goal_alternative_matched[I] = J. */
3694 for (i = 0; i < noperands; i++)
3695 goal_alternative_matched[i] = -1;
3697 for (i = 0; i < noperands; i++)
3698 if (! goal_alternative_win[i]
3699 && goal_alternative_matches[i] >= 0)
3700 goal_alternative_matched[goal_alternative_matches[i]] = i;
3702 for (i = 0; i < noperands; i++)
3703 goal_alternative_win[i] |= goal_alternative_match_win[i];
3705 /* If the best alternative is with operands 1 and 2 swapped,
3706 consider them swapped before reporting the reloads. Update the
3707 operand numbers of any reloads already pushed. */
3709 if (goal_alternative_swapped)
3713 tem = substed_operand[commutative];
3714 substed_operand[commutative] = substed_operand[commutative + 1];
3715 substed_operand[commutative + 1] = tem;
3716 tem = recog_data.operand[commutative];
3717 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3718 recog_data.operand[commutative + 1] = tem;
3719 tem = *recog_data.operand_loc[commutative];
3720 *recog_data.operand_loc[commutative]
3721 = *recog_data.operand_loc[commutative + 1];
3722 *recog_data.operand_loc[commutative + 1] = tem;
3724 for (i = 0; i < n_reloads; i++)
3726 if (rld[i].opnum == commutative)
3727 rld[i].opnum = commutative + 1;
3728 else if (rld[i].opnum == commutative + 1)
3729 rld[i].opnum = commutative;
3733 for (i = 0; i < noperands; i++)
3735 operand_reloadnum[i] = -1;
3737 /* If this is an earlyclobber operand, we need to widen the scope.
3738 The reload must remain valid from the start of the insn being
3739 reloaded until after the operand is stored into its destination.
3740 We approximate this with RELOAD_OTHER even though we know that we
3741 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3743 One special case that is worth checking is when we have an
3744 output that is earlyclobber but isn't used past the insn (typically
3745 a SCRATCH). In this case, we only need have the reload live
3746 through the insn itself, but not for any of our input or output
3748 But we must not accidentally narrow the scope of an existing
3749 RELOAD_OTHER reload - leave these alone.
3751 In any case, anything needed to address this operand can remain
3752 however they were previously categorized. */
3754 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3756 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3757 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3760 /* Any constants that aren't allowed and can't be reloaded
3761 into registers are here changed into memory references. */
3762 for (i = 0; i < noperands; i++)
3763 if (! goal_alternative_win[i]
3764 && CONST_POOL_OK_P (recog_data.operand[i])
3765 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3766 (enum reg_class) goal_alternative[i])
3768 || no_input_reloads)
3769 && operand_mode[i] != VOIDmode)
3771 substed_operand[i] = recog_data.operand[i]
3772 = find_reloads_toplev (force_const_mem (operand_mode[i],
3773 recog_data.operand[i]),
3774 i, address_type[i], ind_levels, 0, insn,
3776 if (alternative_allows_memconst (recog_data.constraints[i],
3777 goal_alternative_number))
3778 goal_alternative_win[i] = 1;
3781 /* Record the values of the earlyclobber operands for the caller. */
3782 if (goal_earlyclobber)
3783 for (i = 0; i < noperands; i++)
3784 if (goal_alternative_earlyclobber[i])
3785 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3787 /* Now record reloads for all the operands that need them. */
3788 for (i = 0; i < noperands; i++)
3789 if (! goal_alternative_win[i])
3791 /* Operands that match previous ones have already been handled. */
3792 if (goal_alternative_matches[i] >= 0)
3794 /* Handle an operand with a nonoffsettable address
3795 appearing where an offsettable address will do
3796 by reloading the address into a base register.
3798 ??? We can also do this when the operand is a register and
3799 reg_equiv_mem is not offsettable, but this is a bit tricky,
3800 so we don't bother with it. It may not be worth doing. */
3801 else if (goal_alternative_matched[i] == -1
3802 && goal_alternative_offmemok[i]
3803 && MEM_P (recog_data.operand[i]))
3805 operand_reloadnum[i]
3806 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3807 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3808 MODE_BASE_REG_CLASS (VOIDmode),
3809 GET_MODE (XEXP (recog_data.operand[i], 0)),
3810 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3811 rld[operand_reloadnum[i]].inc
3812 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3814 /* If this operand is an output, we will have made any
3815 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3816 now we are treating part of the operand as an input, so
3817 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3819 if (modified[i] == RELOAD_WRITE)
3821 for (j = 0; j < n_reloads; j++)
3823 if (rld[j].opnum == i)
3825 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3826 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3827 else if (rld[j].when_needed
3828 == RELOAD_FOR_OUTADDR_ADDRESS)
3829 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3834 else if (goal_alternative_matched[i] == -1)
3836 operand_reloadnum[i]
3837 = push_reload ((modified[i] != RELOAD_WRITE
3838 ? recog_data.operand[i] : 0),
3839 (modified[i] != RELOAD_READ
3840 ? recog_data.operand[i] : 0),
3841 (modified[i] != RELOAD_WRITE
3842 ? recog_data.operand_loc[i] : 0),
3843 (modified[i] != RELOAD_READ
3844 ? recog_data.operand_loc[i] : 0),
3845 (enum reg_class) goal_alternative[i],
3846 (modified[i] == RELOAD_WRITE
3847 ? VOIDmode : operand_mode[i]),
3848 (modified[i] == RELOAD_READ
3849 ? VOIDmode : operand_mode[i]),
3850 (insn_code_number < 0 ? 0
3851 : insn_data[insn_code_number].operand[i].strict_low),
3852 0, i, operand_type[i]);
3854 /* In a matching pair of operands, one must be input only
3855 and the other must be output only.
3856 Pass the input operand as IN and the other as OUT. */
3857 else if (modified[i] == RELOAD_READ
3858 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3860 operand_reloadnum[i]
3861 = push_reload (recog_data.operand[i],
3862 recog_data.operand[goal_alternative_matched[i]],
3863 recog_data.operand_loc[i],
3864 recog_data.operand_loc[goal_alternative_matched[i]],
3865 (enum reg_class) goal_alternative[i],
3867 operand_mode[goal_alternative_matched[i]],
3868 0, 0, i, RELOAD_OTHER);
3869 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3871 else if (modified[i] == RELOAD_WRITE
3872 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3874 operand_reloadnum[goal_alternative_matched[i]]
3875 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3876 recog_data.operand[i],
3877 recog_data.operand_loc[goal_alternative_matched[i]],
3878 recog_data.operand_loc[i],
3879 (enum reg_class) goal_alternative[i],
3880 operand_mode[goal_alternative_matched[i]],
3882 0, 0, i, RELOAD_OTHER);
3883 operand_reloadnum[i] = output_reloadnum;
3887 gcc_assert (insn_code_number < 0);
3888 error_for_asm (insn, "inconsistent operand constraints "
3890 /* Avoid further trouble with this insn. */
3891 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3896 else if (goal_alternative_matched[i] < 0
3897 && goal_alternative_matches[i] < 0
3898 && address_operand_reloaded[i] != 1
3901 /* For each non-matching operand that's a MEM or a pseudo-register
3902 that didn't get a hard register, make an optional reload.
3903 This may get done even if the insn needs no reloads otherwise. */
3905 rtx operand = recog_data.operand[i];
3907 while (GET_CODE (operand) == SUBREG)
3908 operand = SUBREG_REG (operand);
3909 if ((MEM_P (operand)
3911 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3912 /* If this is only for an output, the optional reload would not
3913 actually cause us to use a register now, just note that
3914 something is stored here. */
3915 && ((enum reg_class) goal_alternative[i] != NO_REGS
3916 || modified[i] == RELOAD_WRITE)
3917 && ! no_input_reloads
3918 /* An optional output reload might allow to delete INSN later.
3919 We mustn't make in-out reloads on insns that are not permitted
3921 If this is an asm, we can't delete it; we must not even call
3922 push_reload for an optional output reload in this case,
3923 because we can't be sure that the constraint allows a register,
3924 and push_reload verifies the constraints for asms. */
3925 && (modified[i] == RELOAD_READ
3926 || (! no_output_reloads && ! this_insn_is_asm)))
3927 operand_reloadnum[i]
3928 = push_reload ((modified[i] != RELOAD_WRITE
3929 ? recog_data.operand[i] : 0),
3930 (modified[i] != RELOAD_READ
3931 ? recog_data.operand[i] : 0),
3932 (modified[i] != RELOAD_WRITE
3933 ? recog_data.operand_loc[i] : 0),
3934 (modified[i] != RELOAD_READ
3935 ? recog_data.operand_loc[i] : 0),
3936 (enum reg_class) goal_alternative[i],
3937 (modified[i] == RELOAD_WRITE
3938 ? VOIDmode : operand_mode[i]),
3939 (modified[i] == RELOAD_READ
3940 ? VOIDmode : operand_mode[i]),
3941 (insn_code_number < 0 ? 0
3942 : insn_data[insn_code_number].operand[i].strict_low),
3943 1, i, operand_type[i]);
3944 /* If a memory reference remains (either as a MEM or a pseudo that
3945 did not get a hard register), yet we can't make an optional
3946 reload, check if this is actually a pseudo register reference;
3947 we then need to emit a USE and/or a CLOBBER so that reload
3948 inheritance will do the right thing. */
3952 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3953 && reg_renumber [REGNO (operand)] < 0)))
3955 operand = *recog_data.operand_loc[i];
3957 while (GET_CODE (operand) == SUBREG)
3958 operand = SUBREG_REG (operand);
3959 if (REG_P (operand))
3961 if (modified[i] != RELOAD_WRITE)
3962 /* We mark the USE with QImode so that we recognize
3963 it as one that can be safely deleted at the end
3965 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
3967 if (modified[i] != RELOAD_READ)
3968 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3972 else if (goal_alternative_matches[i] >= 0
3973 && goal_alternative_win[goal_alternative_matches[i]]
3974 && modified[i] == RELOAD_READ
3975 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3976 && ! no_input_reloads && ! no_output_reloads
3979 /* Similarly, make an optional reload for a pair of matching
3980 objects that are in MEM or a pseudo that didn't get a hard reg. */
3982 rtx operand = recog_data.operand[i];
3984 while (GET_CODE (operand) == SUBREG)
3985 operand = SUBREG_REG (operand);
3986 if ((MEM_P (operand)
3988 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3989 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3991 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3992 = push_reload (recog_data.operand[goal_alternative_matches[i]],
3993 recog_data.operand[i],
3994 recog_data.operand_loc[goal_alternative_matches[i]],
3995 recog_data.operand_loc[i],
3996 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3997 operand_mode[goal_alternative_matches[i]],
3999 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
4002 /* Perform whatever substitutions on the operands we are supposed
4003 to make due to commutativity or replacement of registers
4004 with equivalent constants or memory slots. */
4006 for (i = 0; i < noperands; i++)
4008 /* We only do this on the last pass through reload, because it is
4009 possible for some data (like reg_equiv_address) to be changed during
4010 later passes. Moreover, we loose the opportunity to get a useful
4011 reload_{in,out}_reg when we do these replacements. */
4015 rtx substitution = substed_operand[i];
4017 *recog_data.operand_loc[i] = substitution;
4019 /* If we're replacing an operand with a LABEL_REF, we need
4020 to make sure that there's a REG_LABEL note attached to
4021 this instruction. */
4023 && GET_CODE (substitution) == LABEL_REF
4024 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
4025 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
4026 XEXP (substitution, 0),
4030 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
4033 /* If this insn pattern contains any MATCH_DUP's, make sure that
4034 they will be substituted if the operands they match are substituted.
4035 Also do now any substitutions we already did on the operands.
4037 Don't do this if we aren't making replacements because we might be
4038 propagating things allocated by frame pointer elimination into places
4039 it doesn't expect. */
4041 if (insn_code_number >= 0 && replace)
4042 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4044 int opno = recog_data.dup_num[i];
4045 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4046 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4050 /* This loses because reloading of prior insns can invalidate the equivalence
4051 (or at least find_equiv_reg isn't smart enough to find it any more),
4052 causing this insn to need more reload regs than it needed before.
4053 It may be too late to make the reload regs available.
4054 Now this optimization is done safely in choose_reload_regs. */
4056 /* For each reload of a reg into some other class of reg,
4057 search for an existing equivalent reg (same value now) in the right class.
4058 We can use it as long as we don't need to change its contents. */
4059 for (i = 0; i < n_reloads; i++)
4060 if (rld[i].reg_rtx == 0
4062 && REG_P (rld[i].in)
4066 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
4067 static_reload_reg_p, 0, rld[i].inmode);
4068 /* Prevent generation of insn to load the value
4069 because the one we found already has the value. */
4071 rld[i].in = rld[i].reg_rtx;
4075 /* Perhaps an output reload can be combined with another
4076 to reduce needs by one. */
4077 if (!goal_earlyclobber)
4080 /* If we have a pair of reloads for parts of an address, they are reloading
4081 the same object, the operands themselves were not reloaded, and they
4082 are for two operands that are supposed to match, merge the reloads and
4083 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4085 for (i = 0; i < n_reloads; i++)
4089 for (j = i + 1; j < n_reloads; j++)
4090 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4091 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4092 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4093 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4094 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4095 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4096 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4097 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4098 && rtx_equal_p (rld[i].in, rld[j].in)
4099 && (operand_reloadnum[rld[i].opnum] < 0
4100 || rld[operand_reloadnum[rld[i].opnum]].optional)
4101 && (operand_reloadnum[rld[j].opnum] < 0
4102 || rld[operand_reloadnum[rld[j].opnum]].optional)
4103 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4104 || (goal_alternative_matches[rld[j].opnum]
4107 for (k = 0; k < n_replacements; k++)
4108 if (replacements[k].what == j)
4109 replacements[k].what = i;
4111 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4112 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4113 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4115 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4120 /* Scan all the reloads and update their type.
4121 If a reload is for the address of an operand and we didn't reload
4122 that operand, change the type. Similarly, change the operand number
4123 of a reload when two operands match. If a reload is optional, treat it
4124 as though the operand isn't reloaded.
4126 ??? This latter case is somewhat odd because if we do the optional
4127 reload, it means the object is hanging around. Thus we need only
4128 do the address reload if the optional reload was NOT done.
4130 Change secondary reloads to be the address type of their operand, not
4133 If an operand's reload is now RELOAD_OTHER, change any
4134 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4135 RELOAD_FOR_OTHER_ADDRESS. */
4137 for (i = 0; i < n_reloads; i++)
4139 if (rld[i].secondary_p
4140 && rld[i].when_needed == operand_type[rld[i].opnum])
4141 rld[i].when_needed = address_type[rld[i].opnum];
4143 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4144 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4145 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4146 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4147 && (operand_reloadnum[rld[i].opnum] < 0
4148 || rld[operand_reloadnum[rld[i].opnum]].optional))
4150 /* If we have a secondary reload to go along with this reload,
4151 change its type to RELOAD_FOR_OPADDR_ADDR. */
4153 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4154 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4155 && rld[i].secondary_in_reload != -1)
4157 int secondary_in_reload = rld[i].secondary_in_reload;
4159 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4161 /* If there's a tertiary reload we have to change it also. */
4162 if (secondary_in_reload > 0
4163 && rld[secondary_in_reload].secondary_in_reload != -1)
4164 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4165 = RELOAD_FOR_OPADDR_ADDR;
4168 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4169 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4170 && rld[i].secondary_out_reload != -1)
4172 int secondary_out_reload = rld[i].secondary_out_reload;
4174 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4176 /* If there's a tertiary reload we have to change it also. */
4177 if (secondary_out_reload
4178 && rld[secondary_out_reload].secondary_out_reload != -1)
4179 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4180 = RELOAD_FOR_OPADDR_ADDR;
4183 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4184 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4185 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4187 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4190 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4191 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4192 && operand_reloadnum[rld[i].opnum] >= 0
4193 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4195 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4197 if (goal_alternative_matches[rld[i].opnum] >= 0)
4198 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4201 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4202 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4203 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4205 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4206 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4207 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4208 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4209 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4210 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4211 This is complicated by the fact that a single operand can have more
4212 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4213 choose_reload_regs without affecting code quality, and cases that
4214 actually fail are extremely rare, so it turns out to be better to fix
4215 the problem here by not generating cases that choose_reload_regs will
4217 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4218 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4220 We can reduce the register pressure by exploiting that a
4221 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4222 does not conflict with any of them, if it is only used for the first of
4223 the RELOAD_FOR_X_ADDRESS reloads. */
4225 int first_op_addr_num = -2;
4226 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4227 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4228 int need_change = 0;
4229 /* We use last_op_addr_reload and the contents of the above arrays
4230 first as flags - -2 means no instance encountered, -1 means exactly
4231 one instance encountered.
4232 If more than one instance has been encountered, we store the reload
4233 number of the first reload of the kind in question; reload numbers
4234 are known to be non-negative. */
4235 for (i = 0; i < noperands; i++)
4236 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4237 for (i = n_reloads - 1; i >= 0; i--)
4239 switch (rld[i].when_needed)
4241 case RELOAD_FOR_OPERAND_ADDRESS:
4242 if (++first_op_addr_num >= 0)
4244 first_op_addr_num = i;
4248 case RELOAD_FOR_INPUT_ADDRESS:
4249 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4251 first_inpaddr_num[rld[i].opnum] = i;
4255 case RELOAD_FOR_OUTPUT_ADDRESS:
4256 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4258 first_outpaddr_num[rld[i].opnum] = i;
4269 for (i = 0; i < n_reloads; i++)
4272 enum reload_type type;
4274 switch (rld[i].when_needed)
4276 case RELOAD_FOR_OPADDR_ADDR:
4277 first_num = first_op_addr_num;
4278 type = RELOAD_FOR_OPERAND_ADDRESS;
4280 case RELOAD_FOR_INPADDR_ADDRESS:
4281 first_num = first_inpaddr_num[rld[i].opnum];
4282 type = RELOAD_FOR_INPUT_ADDRESS;
4284 case RELOAD_FOR_OUTADDR_ADDRESS:
4285 first_num = first_outpaddr_num[rld[i].opnum];
4286 type = RELOAD_FOR_OUTPUT_ADDRESS;
4293 else if (i > first_num)
4294 rld[i].when_needed = type;
4297 /* Check if the only TYPE reload that uses reload I is
4298 reload FIRST_NUM. */
4299 for (j = n_reloads - 1; j > first_num; j--)
4301 if (rld[j].when_needed == type
4302 && (rld[i].secondary_p
4303 ? rld[j].secondary_in_reload == i
4304 : reg_mentioned_p (rld[i].in, rld[j].in)))
4306 rld[i].when_needed = type;
4315 /* See if we have any reloads that are now allowed to be merged
4316 because we've changed when the reload is needed to
4317 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4318 check for the most common cases. */
4320 for (i = 0; i < n_reloads; i++)
4321 if (rld[i].in != 0 && rld[i].out == 0
4322 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4323 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4324 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4325 for (j = 0; j < n_reloads; j++)
4326 if (i != j && rld[j].in != 0 && rld[j].out == 0
4327 && rld[j].when_needed == rld[i].when_needed
4328 && MATCHES (rld[i].in, rld[j].in)
4329 && rld[i].class == rld[j].class
4330 && !rld[i].nocombine && !rld[j].nocombine
4331 && rld[i].reg_rtx == rld[j].reg_rtx)
4333 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4334 transfer_replacements (i, j);
4339 /* If we made any reloads for addresses, see if they violate a
4340 "no input reloads" requirement for this insn. But loads that we
4341 do after the insn (such as for output addresses) are fine. */
4342 if (no_input_reloads)
4343 for (i = 0; i < n_reloads; i++)
4344 gcc_assert (rld[i].in == 0
4345 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS
4346 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS);
4349 /* Compute reload_mode and reload_nregs. */
4350 for (i = 0; i < n_reloads; i++)
4353 = (rld[i].inmode == VOIDmode
4354 || (GET_MODE_SIZE (rld[i].outmode)
4355 > GET_MODE_SIZE (rld[i].inmode)))
4356 ? rld[i].outmode : rld[i].inmode;
4358 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4361 /* Special case a simple move with an input reload and a
4362 destination of a hard reg, if the hard reg is ok, use it. */
4363 for (i = 0; i < n_reloads; i++)
4364 if (rld[i].when_needed == RELOAD_FOR_INPUT
4365 && GET_CODE (PATTERN (insn)) == SET
4366 && REG_P (SET_DEST (PATTERN (insn)))
4367 && SET_SRC (PATTERN (insn)) == rld[i].in)
4369 rtx dest = SET_DEST (PATTERN (insn));
4370 unsigned int regno = REGNO (dest);
4372 if (regno < FIRST_PSEUDO_REGISTER
4373 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
4374 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4376 int nr = hard_regno_nregs[regno][rld[i].mode];
4379 for (nri = 1; nri < nr; nri ++)
4380 if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno + nri))
4384 rld[i].reg_rtx = dest;
4391 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4392 accepts a memory operand with constant address. */
4395 alternative_allows_memconst (const char *constraint, int altnum)
4398 /* Skip alternatives before the one requested. */
4401 while (*constraint++ != ',');
4404 /* Scan the requested alternative for 'm' or 'o'.
4405 If one of them is present, this alternative accepts memory constants. */
4406 for (; (c = *constraint) && c != ',' && c != '#';
4407 constraint += CONSTRAINT_LEN (c, constraint))
4408 if (c == 'm' || c == 'o' || EXTRA_MEMORY_CONSTRAINT (c, constraint))
4413 /* Scan X for memory references and scan the addresses for reloading.
4414 Also checks for references to "constant" regs that we want to eliminate
4415 and replaces them with the values they stand for.
4416 We may alter X destructively if it contains a reference to such.
4417 If X is just a constant reg, we return the equivalent value
4420 IND_LEVELS says how many levels of indirect addressing this machine
4423 OPNUM and TYPE identify the purpose of the reload.
4425 IS_SET_DEST is true if X is the destination of a SET, which is not
4426 appropriate to be replaced by a constant.
4428 INSN, if nonzero, is the insn in which we do the reload. It is used
4429 to determine if we may generate output reloads, and where to put USEs
4430 for pseudos that we have to replace with stack slots.
4432 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4433 result of find_reloads_address. */
4436 find_reloads_toplev (rtx x, int opnum, enum reload_type type,
4437 int ind_levels, int is_set_dest, rtx insn,
4438 int *address_reloaded)
4440 RTX_CODE code = GET_CODE (x);
4442 const char *fmt = GET_RTX_FORMAT (code);
4448 /* This code is duplicated for speed in find_reloads. */
4449 int regno = REGNO (x);
4450 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4451 x = reg_equiv_constant[regno];
4453 /* This creates (subreg (mem...)) which would cause an unnecessary
4454 reload of the mem. */
4455 else if (reg_equiv_mem[regno] != 0)
4456 x = reg_equiv_mem[regno];
4458 else if (reg_equiv_memory_loc[regno]
4459 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4461 rtx mem = make_memloc (x, regno);
4462 if (reg_equiv_address[regno]
4463 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4465 /* If this is not a toplevel operand, find_reloads doesn't see
4466 this substitution. We have to emit a USE of the pseudo so
4467 that delete_output_reload can see it. */
4468 if (replace_reloads && recog_data.operand[opnum] != x)
4469 /* We mark the USE with QImode so that we recognize it
4470 as one that can be safely deleted at the end of
4472 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4475 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4476 opnum, type, ind_levels, insn);
4477 if (address_reloaded)
4478 *address_reloaded = i;
4487 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4488 opnum, type, ind_levels, insn);
4489 if (address_reloaded)
4490 *address_reloaded = i;
4495 if (code == SUBREG && REG_P (SUBREG_REG (x)))
4497 /* Check for SUBREG containing a REG that's equivalent to a constant.
4498 If the constant has a known value, truncate it right now.
4499 Similarly if we are extracting a single-word of a multi-word
4500 constant. If the constant is symbolic, allow it to be substituted
4501 normally. push_reload will strip the subreg later. If the
4502 constant is VOIDmode, abort because we will lose the mode of
4503 the register (this should never happen because one of the cases
4504 above should handle it). */
4506 int regno = REGNO (SUBREG_REG (x));
4509 if (subreg_lowpart_p (x)
4510 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4511 && reg_equiv_constant[regno] != 0
4512 && (tem = gen_lowpart_common (GET_MODE (x),
4513 reg_equiv_constant[regno])) != 0)
4516 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4517 && reg_equiv_constant[regno] != 0)
4520 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4521 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4526 /* If the subreg contains a reg that will be converted to a mem,
4527 convert the subreg to a narrower memref now.
4528 Otherwise, we would get (subreg (mem ...) ...),
4529 which would force reload of the mem.
4531 We also need to do this if there is an equivalent MEM that is
4532 not offsettable. In that case, alter_subreg would produce an
4533 invalid address on big-endian machines.
4535 For machines that extend byte loads, we must not reload using
4536 a wider mode if we have a paradoxical SUBREG. find_reloads will
4537 force a reload in that case. So we should not do anything here. */
4539 else if (regno >= FIRST_PSEUDO_REGISTER
4540 #ifdef LOAD_EXTEND_OP
4541 && (GET_MODE_SIZE (GET_MODE (x))
4542 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4544 && (reg_equiv_address[regno] != 0
4545 || (reg_equiv_mem[regno] != 0
4546 && (! strict_memory_address_p (GET_MODE (x),
4547 XEXP (reg_equiv_mem[regno], 0))
4548 || ! offsettable_memref_p (reg_equiv_mem[regno])
4549 || num_not_at_initial_offset))))
4550 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4554 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4558 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4559 ind_levels, is_set_dest, insn,
4561 /* If we have replaced a reg with it's equivalent memory loc -
4562 that can still be handled here e.g. if it's in a paradoxical
4563 subreg - we must make the change in a copy, rather than using
4564 a destructive change. This way, find_reloads can still elect
4565 not to do the change. */
4566 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4568 x = shallow_copy_rtx (x);
4571 XEXP (x, i) = new_part;
4577 /* Return a mem ref for the memory equivalent of reg REGNO.
4578 This mem ref is not shared with anything. */
4581 make_memloc (rtx ad, int regno)
4583 /* We must rerun eliminate_regs, in case the elimination
4584 offsets have changed. */
4586 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4588 /* If TEM might contain a pseudo, we must copy it to avoid
4589 modifying it when we do the substitution for the reload. */
4590 if (rtx_varies_p (tem, 0))
4591 tem = copy_rtx (tem);
4593 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4594 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4596 /* Copy the result if it's still the same as the equivalence, to avoid
4597 modifying it when we do the substitution for the reload. */
4598 if (tem == reg_equiv_memory_loc[regno])
4599 tem = copy_rtx (tem);
4603 /* Returns true if AD could be turned into a valid memory reference
4604 to mode MODE by reloading the part pointed to by PART into a
4608 maybe_memory_address_p (enum machine_mode mode, rtx ad, rtx *part)
4612 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4615 retv = memory_address_p (mode, ad);
4621 /* Record all reloads needed for handling memory address AD
4622 which appears in *LOC in a memory reference to mode MODE
4623 which itself is found in location *MEMREFLOC.
4624 Note that we take shortcuts assuming that no multi-reg machine mode
4625 occurs as part of an address.
4627 OPNUM and TYPE specify the purpose of this reload.
4629 IND_LEVELS says how many levels of indirect addressing this machine
4632 INSN, if nonzero, is the insn in which we do the reload. It is used
4633 to determine if we may generate output reloads, and where to put USEs
4634 for pseudos that we have to replace with stack slots.
4636 Value is one if this address is reloaded or replaced as a whole; it is
4637 zero if the top level of this address was not reloaded or replaced, and
4638 it is -1 if it may or may not have been reloaded or replaced.
4640 Note that there is no verification that the address will be valid after
4641 this routine does its work. Instead, we rely on the fact that the address
4642 was valid when reload started. So we need only undo things that reload
4643 could have broken. These are wrong register types, pseudos not allocated
4644 to a hard register, and frame pointer elimination. */
4647 find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad,
4648 rtx *loc, int opnum, enum reload_type type,
4649 int ind_levels, rtx insn)
4652 int removed_and = 0;
4656 /* If the address is a register, see if it is a legitimate address and
4657 reload if not. We first handle the cases where we need not reload
4658 or where we must reload in a non-standard way. */
4664 /* If the register is equivalent to an invariant expression, substitute
4665 the invariant, and eliminate any eliminable register references. */
4666 tem = reg_equiv_constant[regno];
4668 && (tem = eliminate_regs (tem, mode, insn))
4669 && strict_memory_address_p (mode, tem))
4675 tem = reg_equiv_memory_loc[regno];
4678 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4680 tem = make_memloc (ad, regno);
4681 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4683 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4684 &XEXP (tem, 0), opnum,
4685 ADDR_TYPE (type), ind_levels, insn);
4687 /* We can avoid a reload if the register's equivalent memory
4688 expression is valid as an indirect memory address.
4689 But not all addresses are valid in a mem used as an indirect
4690 address: only reg or reg+constant. */
4693 && strict_memory_address_p (mode, tem)
4694 && (REG_P (XEXP (tem, 0))
4695 || (GET_CODE (XEXP (tem, 0)) == PLUS
4696 && REG_P (XEXP (XEXP (tem, 0), 0))
4697 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4699 /* TEM is not the same as what we'll be replacing the
4700 pseudo with after reload, put a USE in front of INSN
4701 in the final reload pass. */
4703 && num_not_at_initial_offset
4704 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4707 /* We mark the USE with QImode so that we
4708 recognize it as one that can be safely
4709 deleted at the end of reload. */
4710 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4713 /* This doesn't really count as replacing the address
4714 as a whole, since it is still a memory access. */
4722 /* The only remaining case where we can avoid a reload is if this is a
4723 hard register that is valid as a base register and which is not the
4724 subject of a CLOBBER in this insn. */
4726 else if (regno < FIRST_PSEUDO_REGISTER
4727 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4728 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4731 /* If we do not have one of the cases above, we must do the reload. */
4732 push_reload (ad, NULL_RTX, loc, (rtx*) 0, MODE_BASE_REG_CLASS (mode),
4733 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4737 if (strict_memory_address_p (mode, ad))
4739 /* The address appears valid, so reloads are not needed.
4740 But the address may contain an eliminable register.
4741 This can happen because a machine with indirect addressing
4742 may consider a pseudo register by itself a valid address even when
4743 it has failed to get a hard reg.
4744 So do a tree-walk to find and eliminate all such regs. */
4746 /* But first quickly dispose of a common case. */
4747 if (GET_CODE (ad) == PLUS
4748 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4749 && REG_P (XEXP (ad, 0))
4750 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4753 subst_reg_equivs_changed = 0;
4754 *loc = subst_reg_equivs (ad, insn);
4756 if (! subst_reg_equivs_changed)
4759 /* Check result for validity after substitution. */
4760 if (strict_memory_address_p (mode, ad))
4764 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4769 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4774 *memrefloc = copy_rtx (*memrefloc);
4775 XEXP (*memrefloc, 0) = ad;
4776 move_replacements (&ad, &XEXP (*memrefloc, 0));
4782 /* The address is not valid. We have to figure out why. First see if
4783 we have an outer AND and remove it if so. Then analyze what's inside. */
4785 if (GET_CODE (ad) == AND)
4788 loc = &XEXP (ad, 0);
4792 /* One possibility for why the address is invalid is that it is itself
4793 a MEM. This can happen when the frame pointer is being eliminated, a
4794 pseudo is not allocated to a hard register, and the offset between the
4795 frame and stack pointers is not its initial value. In that case the
4796 pseudo will have been replaced by a MEM referring to the
4800 /* First ensure that the address in this MEM is valid. Then, unless
4801 indirect addresses are valid, reload the MEM into a register. */
4803 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4804 opnum, ADDR_TYPE (type),
4805 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4807 /* If tem was changed, then we must create a new memory reference to
4808 hold it and store it back into memrefloc. */
4809 if (tem != ad && memrefloc)
4811 *memrefloc = copy_rtx (*memrefloc);
4812 copy_replacements (tem, XEXP (*memrefloc, 0));
4813 loc = &XEXP (*memrefloc, 0);
4815 loc = &XEXP (*loc, 0);
4818 /* Check similar cases as for indirect addresses as above except
4819 that we can allow pseudos and a MEM since they should have been
4820 taken care of above. */
4823 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4824 || MEM_P (XEXP (tem, 0))
4825 || ! (REG_P (XEXP (tem, 0))
4826 || (GET_CODE (XEXP (tem, 0)) == PLUS
4827 && REG_P (XEXP (XEXP (tem, 0), 0))
4828 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4830 /* Must use TEM here, not AD, since it is the one that will
4831 have any subexpressions reloaded, if needed. */
4832 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
4833 MODE_BASE_REG_CLASS (mode), GET_MODE (tem),
4836 return ! removed_and;
4842 /* If we have address of a stack slot but it's not valid because the
4843 displacement is too large, compute the sum in a register.
4844 Handle all base registers here, not just fp/ap/sp, because on some
4845 targets (namely SH) we can also get too large displacements from
4846 big-endian corrections. */
4847 else if (GET_CODE (ad) == PLUS
4848 && REG_P (XEXP (ad, 0))
4849 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4850 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4851 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4853 /* Unshare the MEM rtx so we can safely alter it. */
4856 *memrefloc = copy_rtx (*memrefloc);
4857 loc = &XEXP (*memrefloc, 0);
4859 loc = &XEXP (*loc, 0);
4862 if (double_reg_address_ok)
4864 /* Unshare the sum as well. */
4865 *loc = ad = copy_rtx (ad);
4867 /* Reload the displacement into an index reg.
4868 We assume the frame pointer or arg pointer is a base reg. */
4869 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4870 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4876 /* If the sum of two regs is not necessarily valid,
4877 reload the sum into a base reg.
4878 That will at least work. */
4879 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4880 Pmode, opnum, type, ind_levels);
4882 return ! removed_and;
4885 /* If we have an indexed stack slot, there are three possible reasons why
4886 it might be invalid: The index might need to be reloaded, the address
4887 might have been made by frame pointer elimination and hence have a
4888 constant out of range, or both reasons might apply.
4890 We can easily check for an index needing reload, but even if that is the
4891 case, we might also have an invalid constant. To avoid making the
4892 conservative assumption and requiring two reloads, we see if this address
4893 is valid when not interpreted strictly. If it is, the only problem is
4894 that the index needs a reload and find_reloads_address_1 will take care
4897 Handle all base registers here, not just fp/ap/sp, because on some
4898 targets (namely SPARC) we can also get invalid addresses from preventive
4899 subreg big-endian corrections made by find_reloads_toplev. We
4900 can also get expressions involving LO_SUM (rather than PLUS) from
4901 find_reloads_subreg_address.
4903 If we decide to do something, it must be that `double_reg_address_ok'
4904 is true. We generate a reload of the base register + constant and
4905 rework the sum so that the reload register will be added to the index.
4906 This is safe because we know the address isn't shared.
4908 We check for the base register as both the first and second operand of
4909 the innermost PLUS and/or LO_SUM. */
4911 for (op_index = 0; op_index < 2; ++op_index)
4915 if (!(GET_CODE (ad) == PLUS
4916 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4917 && (GET_CODE (XEXP (ad, 0)) == PLUS
4918 || GET_CODE (XEXP (ad, 0)) == LO_SUM)))
4921 operand = XEXP (XEXP (ad, 0), op_index);
4922 if (!REG_P (operand) || REGNO (operand) >= FIRST_PSEUDO_REGISTER)
4925 if ((REG_MODE_OK_FOR_BASE_P (operand, mode)
4926 || operand == frame_pointer_rtx
4927 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4928 || operand == hard_frame_pointer_rtx
4930 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4931 || operand == arg_pointer_rtx
4933 || operand == stack_pointer_rtx)
4934 && ! maybe_memory_address_p (mode, ad,
4935 &XEXP (XEXP (ad, 0), 1 - op_index)))
4940 offset_reg = plus_constant (operand, INTVAL (XEXP (ad, 1)));
4941 addend = XEXP (XEXP (ad, 0), 1 - op_index);
4943 /* Form the adjusted address. */
4944 if (GET_CODE (XEXP (ad, 0)) == PLUS)
4945 ad = gen_rtx_PLUS (GET_MODE (ad),
4946 op_index == 0 ? offset_reg : addend,
4947 op_index == 0 ? addend : offset_reg);
4949 ad = gen_rtx_LO_SUM (GET_MODE (ad),
4950 op_index == 0 ? offset_reg : addend,
4951 op_index == 0 ? addend : offset_reg);
4954 find_reloads_address_part (XEXP (ad, op_index),
4955 &XEXP (ad, op_index),
4956 MODE_BASE_REG_CLASS (mode),
4957 GET_MODE (ad), opnum, type, ind_levels);
4958 find_reloads_address_1 (mode,
4959 XEXP (ad, 1 - op_index), 1,
4960 &XEXP (ad, 1 - op_index), opnum,
4967 /* See if address becomes valid when an eliminable register
4968 in a sum is replaced. */
4971 if (GET_CODE (ad) == PLUS)
4972 tem = subst_indexed_address (ad);
4973 if (tem != ad && strict_memory_address_p (mode, tem))
4975 /* Ok, we win that way. Replace any additional eliminable
4978 subst_reg_equivs_changed = 0;
4979 tem = subst_reg_equivs (tem, insn);
4981 /* Make sure that didn't make the address invalid again. */
4983 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4990 /* If constants aren't valid addresses, reload the constant address
4992 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4994 /* If AD is an address in the constant pool, the MEM rtx may be shared.
4995 Unshare it so we can safely alter it. */
4996 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4997 && CONSTANT_POOL_ADDRESS_P (ad))
4999 *memrefloc = copy_rtx (*memrefloc);
5000 loc = &XEXP (*memrefloc, 0);
5002 loc = &XEXP (*loc, 0);
5005 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
5006 Pmode, opnum, type, ind_levels);
5007 return ! removed_and;
5010 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
5014 /* Find all pseudo regs appearing in AD
5015 that are eliminable in favor of equivalent values
5016 and do not have hard regs; replace them by their equivalents.
5017 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5018 front of it for pseudos that we have to replace with stack slots. */
5021 subst_reg_equivs (rtx ad, rtx insn)
5023 RTX_CODE code = GET_CODE (ad);
5042 int regno = REGNO (ad);
5044 if (reg_equiv_constant[regno] != 0)
5046 subst_reg_equivs_changed = 1;
5047 return reg_equiv_constant[regno];
5049 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
5051 rtx mem = make_memloc (ad, regno);
5052 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
5054 subst_reg_equivs_changed = 1;
5055 /* We mark the USE with QImode so that we recognize it
5056 as one that can be safely deleted at the end of
5058 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5067 /* Quickly dispose of a common case. */
5068 if (XEXP (ad, 0) == frame_pointer_rtx
5069 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
5077 fmt = GET_RTX_FORMAT (code);
5078 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5080 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5084 /* Compute the sum of X and Y, making canonicalizations assumed in an
5085 address, namely: sum constant integers, surround the sum of two
5086 constants with a CONST, put the constant as the second operand, and
5087 group the constant on the outermost sum.
5089 This routine assumes both inputs are already in canonical form. */
5092 form_sum (rtx x, rtx y)
5095 enum machine_mode mode = GET_MODE (x);
5097 if (mode == VOIDmode)
5098 mode = GET_MODE (y);
5100 if (mode == VOIDmode)
5103 if (GET_CODE (x) == CONST_INT)
5104 return plus_constant (y, INTVAL (x));
5105 else if (GET_CODE (y) == CONST_INT)
5106 return plus_constant (x, INTVAL (y));
5107 else if (CONSTANT_P (x))
5108 tem = x, x = y, y = tem;
5110 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5111 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5113 /* Note that if the operands of Y are specified in the opposite
5114 order in the recursive calls below, infinite recursion will occur. */
5115 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5116 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5118 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5119 constant will have been placed second. */
5120 if (CONSTANT_P (x) && CONSTANT_P (y))
5122 if (GET_CODE (x) == CONST)
5124 if (GET_CODE (y) == CONST)
5127 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5130 return gen_rtx_PLUS (mode, x, y);
5133 /* If ADDR is a sum containing a pseudo register that should be
5134 replaced with a constant (from reg_equiv_constant),
5135 return the result of doing so, and also apply the associative
5136 law so that the result is more likely to be a valid address.
5137 (But it is not guaranteed to be one.)
5139 Note that at most one register is replaced, even if more are
5140 replaceable. Also, we try to put the result into a canonical form
5141 so it is more likely to be a valid address.
5143 In all other cases, return ADDR. */
5146 subst_indexed_address (rtx addr)
5148 rtx op0 = 0, op1 = 0, op2 = 0;
5152 if (GET_CODE (addr) == PLUS)
5154 /* Try to find a register to replace. */
5155 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5157 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5158 && reg_renumber[regno] < 0
5159 && reg_equiv_constant[regno] != 0)
5160 op0 = reg_equiv_constant[regno];
5161 else if (REG_P (op1)
5162 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5163 && reg_renumber[regno] < 0
5164 && reg_equiv_constant[regno] != 0)
5165 op1 = reg_equiv_constant[regno];
5166 else if (GET_CODE (op0) == PLUS
5167 && (tem = subst_indexed_address (op0)) != op0)
5169 else if (GET_CODE (op1) == PLUS
5170 && (tem = subst_indexed_address (op1)) != op1)
5175 /* Pick out up to three things to add. */
5176 if (GET_CODE (op1) == PLUS)
5177 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5178 else if (GET_CODE (op0) == PLUS)
5179 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5181 /* Compute the sum. */
5183 op1 = form_sum (op1, op2);
5185 op0 = form_sum (op0, op1);
5192 /* Update the REG_INC notes for an insn. It updates all REG_INC
5193 notes for the instruction which refer to REGNO the to refer
5194 to the reload number.
5196 INSN is the insn for which any REG_INC notes need updating.
5198 REGNO is the register number which has been reloaded.
5200 RELOADNUM is the reload number. */
5203 update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
5204 int reloadnum ATTRIBUTE_UNUSED)
5209 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5210 if (REG_NOTE_KIND (link) == REG_INC
5211 && (int) REGNO (XEXP (link, 0)) == regno)
5212 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5216 /* Record the pseudo registers we must reload into hard registers in a
5217 subexpression of a would-be memory address, X referring to a value
5218 in mode MODE. (This function is not called if the address we find
5221 CONTEXT = 1 means we are considering regs as index regs,
5222 = 0 means we are considering them as base regs, = 2 means we
5223 are considering them as base regs for REG + REG.
5225 OPNUM and TYPE specify the purpose of any reloads made.
5227 IND_LEVELS says how many levels of indirect addressing are
5228 supported at this point in the address.
5230 INSN, if nonzero, is the insn in which we do the reload. It is used
5231 to determine if we may generate output reloads.
5233 We return nonzero if X, as a whole, is reloaded or replaced. */
5235 /* Note that we take shortcuts assuming that no multi-reg machine mode
5236 occurs as part of an address.
5237 Also, this is not fully machine-customizable; it works for machines
5238 such as VAXen and 68000's and 32000's, but other possible machines
5239 could have addressing modes that this does not handle right. */
5242 find_reloads_address_1 (enum machine_mode mode, rtx x, int context,
5243 rtx *loc, int opnum, enum reload_type type,
5244 int ind_levels, rtx insn)
5246 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE) \
5248 ? REGNO_MODE_OK_FOR_REG_BASE_P (REGNO, MODE) \
5250 ? REGNO_OK_FOR_INDEX_P (REGNO) \
5251 : REGNO_MODE_OK_FOR_BASE_P (REGNO, MODE))
5253 enum reg_class context_reg_class;
5254 RTX_CODE code = GET_CODE (x);
5257 context_reg_class = MODE_BASE_REG_REG_CLASS (mode);
5258 else if (context == 1)
5259 context_reg_class = INDEX_REG_CLASS;
5261 context_reg_class = MODE_BASE_REG_CLASS (mode);
5267 rtx orig_op0 = XEXP (x, 0);
5268 rtx orig_op1 = XEXP (x, 1);
5269 RTX_CODE code0 = GET_CODE (orig_op0);
5270 RTX_CODE code1 = GET_CODE (orig_op1);
5274 if (GET_CODE (op0) == SUBREG)
5276 op0 = SUBREG_REG (op0);
5277 code0 = GET_CODE (op0);
5278 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5279 op0 = gen_rtx_REG (word_mode,
5281 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5282 GET_MODE (SUBREG_REG (orig_op0)),
5283 SUBREG_BYTE (orig_op0),
5284 GET_MODE (orig_op0))));
5287 if (GET_CODE (op1) == SUBREG)
5289 op1 = SUBREG_REG (op1);
5290 code1 = GET_CODE (op1);
5291 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5292 /* ??? Why is this given op1's mode and above for
5293 ??? op0 SUBREGs we use word_mode? */
5294 op1 = gen_rtx_REG (GET_MODE (op1),
5296 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5297 GET_MODE (SUBREG_REG (orig_op1)),
5298 SUBREG_BYTE (orig_op1),
5299 GET_MODE (orig_op1))));
5301 /* Plus in the index register may be created only as a result of
5302 register remateralization for expression like &localvar*4. Reload it.
5303 It may be possible to combine the displacement on the outer level,
5304 but it is probably not worthwhile to do so. */
5307 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5308 opnum, ADDR_TYPE (type), ind_levels, insn);
5309 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5311 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5315 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5316 || code0 == ZERO_EXTEND || code1 == MEM)
5318 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5319 type, ind_levels, insn);
5320 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5321 type, ind_levels, insn);
5324 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5325 || code1 == ZERO_EXTEND || code0 == MEM)
5327 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5328 type, ind_levels, insn);
5329 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5330 type, ind_levels, insn);
5333 else if (code0 == CONST_INT || code0 == CONST
5334 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5335 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5336 type, ind_levels, insn);
5338 else if (code1 == CONST_INT || code1 == CONST
5339 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5340 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5341 type, ind_levels, insn);
5343 else if (code0 == REG && code1 == REG)
5345 if (REG_OK_FOR_INDEX_P (op0)
5346 && REG_MODE_OK_FOR_REG_BASE_P (op1, mode))
5348 else if (REG_OK_FOR_INDEX_P (op1)
5349 && REG_MODE_OK_FOR_REG_BASE_P (op0, mode))
5351 else if (REG_MODE_OK_FOR_REG_BASE_P (op1, mode))
5352 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5353 type, ind_levels, insn);
5354 else if (REG_MODE_OK_FOR_REG_BASE_P (op0, mode))
5355 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5356 type, ind_levels, insn);
5357 else if (REG_OK_FOR_INDEX_P (op1))
5358 find_reloads_address_1 (mode, orig_op0, 2, &XEXP (x, 0), opnum,
5359 type, ind_levels, insn);
5360 else if (REG_OK_FOR_INDEX_P (op0))
5361 find_reloads_address_1 (mode, orig_op1, 2, &XEXP (x, 1), opnum,
5362 type, ind_levels, insn);
5365 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5366 type, ind_levels, insn);
5367 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5368 type, ind_levels, insn);
5372 else if (code0 == REG)
5374 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5375 type, ind_levels, insn);
5376 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5377 type, ind_levels, insn);
5380 else if (code1 == REG)
5382 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5383 type, ind_levels, insn);
5384 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5385 type, ind_levels, insn);
5394 rtx op0 = XEXP (x, 0);
5395 rtx op1 = XEXP (x, 1);
5399 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5402 /* Currently, we only support {PRE,POST}_MODIFY constructs
5403 where a base register is {inc,dec}remented by the contents
5404 of another register or by a constant value. Thus, these
5405 operands must match. */
5406 gcc_assert (op0 == XEXP (op1, 0));
5408 /* Require index register (or constant). Let's just handle the
5409 register case in the meantime... If the target allows
5410 auto-modify by a constant then we could try replacing a pseudo
5411 register with its equivalent constant where applicable. */
5412 if (REG_P (XEXP (op1, 1)))
5413 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5414 find_reloads_address_1 (mode, XEXP (op1, 1), 1, &XEXP (op1, 1),
5415 opnum, type, ind_levels, insn);
5417 gcc_assert (REG_P (XEXP (op1, 0)));
5419 regno = REGNO (XEXP (op1, 0));
5421 /* A register that is incremented cannot be constant! */
5422 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5423 || reg_equiv_constant[regno] == 0);
5425 /* Handle a register that is equivalent to a memory location
5426 which cannot be addressed directly. */
5427 if (reg_equiv_memory_loc[regno] != 0
5428 && (reg_equiv_address[regno] != 0
5429 || num_not_at_initial_offset))
5431 rtx tem = make_memloc (XEXP (x, 0), regno);
5433 if (reg_equiv_address[regno]
5434 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5436 /* First reload the memory location's address.
5437 We can't use ADDR_TYPE (type) here, because we need to
5438 write back the value after reading it, hence we actually
5439 need two registers. */
5440 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5441 &XEXP (tem, 0), opnum,
5445 /* Then reload the memory location into a base
5447 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5449 MODE_BASE_REG_CLASS (mode),
5450 GET_MODE (x), GET_MODE (x), 0,
5451 0, opnum, RELOAD_OTHER);
5453 update_auto_inc_notes (this_insn, regno, reloadnum);
5458 if (reg_renumber[regno] >= 0)
5459 regno = reg_renumber[regno];
5461 /* We require a base register here... */
5462 if (!REGNO_MODE_OK_FOR_BASE_P (regno, GET_MODE (x)))
5464 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5465 &XEXP (op1, 0), &XEXP (x, 0),
5466 MODE_BASE_REG_CLASS (mode),
5467 GET_MODE (x), GET_MODE (x), 0, 0,
5468 opnum, RELOAD_OTHER);
5470 update_auto_inc_notes (this_insn, regno, reloadnum);
5480 if (REG_P (XEXP (x, 0)))
5482 int regno = REGNO (XEXP (x, 0));
5486 /* A register that is incremented cannot be constant! */
5487 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5488 || reg_equiv_constant[regno] == 0);
5490 /* Handle a register that is equivalent to a memory location
5491 which cannot be addressed directly. */
5492 if (reg_equiv_memory_loc[regno] != 0
5493 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5495 rtx tem = make_memloc (XEXP (x, 0), regno);
5496 if (reg_equiv_address[regno]
5497 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5499 /* First reload the memory location's address.
5500 We can't use ADDR_TYPE (type) here, because we need to
5501 write back the value after reading it, hence we actually
5502 need two registers. */
5503 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5504 &XEXP (tem, 0), opnum, type,
5506 /* Put this inside a new increment-expression. */
5507 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5508 /* Proceed to reload that, as if it contained a register. */
5512 /* If we have a hard register that is ok as an index,
5513 don't make a reload. If an autoincrement of a nice register
5514 isn't "valid", it must be that no autoincrement is "valid".
5515 If that is true and something made an autoincrement anyway,
5516 this must be a special context where one is allowed.
5517 (For example, a "push" instruction.)
5518 We can't improve this address, so leave it alone. */
5520 /* Otherwise, reload the autoincrement into a suitable hard reg
5521 and record how much to increment by. */
5523 if (reg_renumber[regno] >= 0)
5524 regno = reg_renumber[regno];
5525 if (regno >= FIRST_PSEUDO_REGISTER
5526 || !REG_OK_FOR_CONTEXT (context, regno, mode))
5530 /* If we can output the register afterwards, do so, this
5531 saves the extra update.
5532 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5533 CALL_INSN - and it does not set CC0.
5534 But don't do this if we cannot directly address the
5535 memory location, since this will make it harder to
5536 reuse address reloads, and increases register pressure.
5537 Also don't do this if we can probably update x directly. */
5538 rtx equiv = (MEM_P (XEXP (x, 0))
5540 : reg_equiv_mem[regno]);
5541 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5542 if (insn && NONJUMP_INSN_P (insn) && equiv
5543 && memory_operand (equiv, GET_MODE (equiv))
5545 && ! sets_cc0_p (PATTERN (insn))
5547 && ! (icode != CODE_FOR_nothing
5548 && ((*insn_data[icode].operand[0].predicate)
5550 && ((*insn_data[icode].operand[1].predicate)
5553 /* We use the original pseudo for loc, so that
5554 emit_reload_insns() knows which pseudo this
5555 reload refers to and updates the pseudo rtx, not
5556 its equivalent memory location, as well as the
5557 corresponding entry in reg_last_reload_reg. */
5558 loc = &XEXP (x_orig, 0);
5561 = push_reload (x, x, loc, loc,
5563 GET_MODE (x), GET_MODE (x), 0, 0,
5564 opnum, RELOAD_OTHER);
5569 = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5571 GET_MODE (x), GET_MODE (x), 0, 0,
5574 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5579 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5585 else if (MEM_P (XEXP (x, 0)))
5587 /* This is probably the result of a substitution, by eliminate_regs,
5588 of an equivalent address for a pseudo that was not allocated to a
5589 hard register. Verify that the specified address is valid and
5590 reload it into a register. */
5591 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5592 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5596 /* Since we know we are going to reload this item, don't decrement
5597 for the indirection level.
5599 Note that this is actually conservative: it would be slightly
5600 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5602 /* We can't use ADDR_TYPE (type) here, because we need to
5603 write back the value after reading it, hence we actually
5604 need two registers. */
5605 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5606 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5607 opnum, type, ind_levels, insn);
5609 reloadnum = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5611 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5613 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5615 link = FIND_REG_INC_NOTE (this_insn, tem);
5617 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5624 /* This is probably the result of a substitution, by eliminate_regs, of
5625 an equivalent address for a pseudo that was not allocated to a hard
5626 register. Verify that the specified address is valid and reload it
5629 Since we know we are going to reload this item, don't decrement for
5630 the indirection level.
5632 Note that this is actually conservative: it would be slightly more
5633 efficient to use the value of SPILL_INDIRECT_LEVELS from
5636 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5637 opnum, ADDR_TYPE (type), ind_levels, insn);
5638 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5640 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5645 int regno = REGNO (x);
5647 if (reg_equiv_constant[regno] != 0)
5649 find_reloads_address_part (reg_equiv_constant[regno], loc,
5651 GET_MODE (x), opnum, type, ind_levels);
5655 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5656 that feeds this insn. */
5657 if (reg_equiv_mem[regno] != 0)
5659 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
5661 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5666 if (reg_equiv_memory_loc[regno]
5667 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5669 rtx tem = make_memloc (x, regno);
5670 if (reg_equiv_address[regno] != 0
5671 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5674 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5675 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5680 if (reg_renumber[regno] >= 0)
5681 regno = reg_renumber[regno];
5683 if (regno >= FIRST_PSEUDO_REGISTER
5684 || !REG_OK_FOR_CONTEXT (context, regno, mode))
5686 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5688 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5692 /* If a register appearing in an address is the subject of a CLOBBER
5693 in this insn, reload it into some other register to be safe.
5694 The CLOBBER is supposed to make the register unavailable
5695 from before this insn to after it. */
5696 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5698 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5700 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5707 if (REG_P (SUBREG_REG (x)))
5709 /* If this is a SUBREG of a hard register and the resulting register
5710 is of the wrong class, reload the whole SUBREG. This avoids
5711 needless copies if SUBREG_REG is multi-word. */
5712 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5714 int regno ATTRIBUTE_UNUSED = subreg_regno (x);
5716 if (! REG_OK_FOR_CONTEXT (context, regno, mode))
5718 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5720 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5724 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5725 is larger than the class size, then reload the whole SUBREG. */
5728 enum reg_class class = context_reg_class;
5729 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5730 > reg_class_size[class])
5732 x = find_reloads_subreg_address (x, 0, opnum, type,
5734 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5735 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5747 const char *fmt = GET_RTX_FORMAT (code);
5750 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5753 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5754 opnum, type, ind_levels, insn);
5758 #undef REG_OK_FOR_CONTEXT
5762 /* X, which is found at *LOC, is a part of an address that needs to be
5763 reloaded into a register of class CLASS. If X is a constant, or if
5764 X is a PLUS that contains a constant, check that the constant is a
5765 legitimate operand and that we are supposed to be able to load
5766 it into the register.
5768 If not, force the constant into memory and reload the MEM instead.
5770 MODE is the mode to use, in case X is an integer constant.
5772 OPNUM and TYPE describe the purpose of any reloads made.
5774 IND_LEVELS says how many levels of indirect addressing this machine
5778 find_reloads_address_part (rtx x, rtx *loc, enum reg_class class,
5779 enum machine_mode mode, int opnum,
5780 enum reload_type type, int ind_levels)
5783 && (! LEGITIMATE_CONSTANT_P (x)
5784 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5788 tem = x = force_const_mem (mode, x);
5789 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5790 opnum, type, ind_levels, 0);
5793 else if (GET_CODE (x) == PLUS
5794 && CONSTANT_P (XEXP (x, 1))
5795 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5796 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5800 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5801 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5802 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5803 opnum, type, ind_levels, 0);
5806 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5807 mode, VOIDmode, 0, 0, opnum, type);
5810 /* X, a subreg of a pseudo, is a part of an address that needs to be
5813 If the pseudo is equivalent to a memory location that cannot be directly
5814 addressed, make the necessary address reloads.
5816 If address reloads have been necessary, or if the address is changed
5817 by register elimination, return the rtx of the memory location;
5818 otherwise, return X.
5820 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5823 OPNUM and TYPE identify the purpose of the reload.
5825 IND_LEVELS says how many levels of indirect addressing are
5826 supported at this point in the address.
5828 INSN, if nonzero, is the insn in which we do the reload. It is used
5829 to determine where to put USEs for pseudos that we have to replace with
5833 find_reloads_subreg_address (rtx x, int force_replace, int opnum,
5834 enum reload_type type, int ind_levels, rtx insn)
5836 int regno = REGNO (SUBREG_REG (x));
5838 if (reg_equiv_memory_loc[regno])
5840 /* If the address is not directly addressable, or if the address is not
5841 offsettable, then it must be replaced. */
5843 && (reg_equiv_address[regno]
5844 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5847 if (force_replace || num_not_at_initial_offset)
5849 rtx tem = make_memloc (SUBREG_REG (x), regno);
5851 /* If the address changes because of register elimination, then
5852 it must be replaced. */
5854 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5856 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
5857 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5860 /* For big-endian paradoxical subregs, SUBREG_BYTE does not
5861 hold the correct (negative) byte offset. */
5862 if (BYTES_BIG_ENDIAN && outer_size > inner_size)
5863 offset = inner_size - outer_size;
5865 offset = SUBREG_BYTE (x);
5867 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5868 PUT_MODE (tem, GET_MODE (x));
5870 /* If this was a paradoxical subreg that we replaced, the
5871 resulting memory must be sufficiently aligned to allow
5872 us to widen the mode of the memory. */
5873 if (outer_size > inner_size && STRICT_ALIGNMENT)
5877 base = XEXP (tem, 0);
5878 if (GET_CODE (base) == PLUS)
5880 if (GET_CODE (XEXP (base, 1)) == CONST_INT
5881 && INTVAL (XEXP (base, 1)) % outer_size != 0)
5883 base = XEXP (base, 0);
5886 || (REGNO_POINTER_ALIGN (REGNO (base))
5887 < outer_size * BITS_PER_UNIT))
5891 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5892 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
5895 /* If this is not a toplevel operand, find_reloads doesn't see
5896 this substitution. We have to emit a USE of the pseudo so
5897 that delete_output_reload can see it. */
5898 if (replace_reloads && recog_data.operand[opnum] != x)
5899 /* We mark the USE with QImode so that we recognize it
5900 as one that can be safely deleted at the end of
5902 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
5912 /* Substitute into the current INSN the registers into which we have reloaded
5913 the things that need reloading. The array `replacements'
5914 contains the locations of all pointers that must be changed
5915 and says what to replace them with.
5917 Return the rtx that X translates into; usually X, but modified. */
5920 subst_reloads (rtx insn)
5924 for (i = 0; i < n_replacements; i++)
5926 struct replacement *r = &replacements[i];
5927 rtx reloadreg = rld[r->what].reg_rtx;
5930 #ifdef ENABLE_CHECKING
5931 /* Internal consistency test. Check that we don't modify
5932 anything in the equivalence arrays. Whenever something from
5933 those arrays needs to be reloaded, it must be unshared before
5934 being substituted into; the equivalence must not be modified.
5935 Otherwise, if the equivalence is used after that, it will
5936 have been modified, and the thing substituted (probably a
5937 register) is likely overwritten and not a usable equivalence. */
5940 for (check_regno = 0; check_regno < max_regno; check_regno++)
5942 #define CHECK_MODF(ARRAY) \
5943 gcc_assert (!ARRAY[check_regno] \
5944 || !loc_mentioned_in_p (r->where, \
5945 ARRAY[check_regno]))
5947 CHECK_MODF (reg_equiv_constant);
5948 CHECK_MODF (reg_equiv_memory_loc);
5949 CHECK_MODF (reg_equiv_address);
5950 CHECK_MODF (reg_equiv_mem);
5953 #endif /* ENABLE_CHECKING */
5955 /* If we're replacing a LABEL_REF with a register, add a
5956 REG_LABEL note to indicate to flow which label this
5957 register refers to. */
5958 if (GET_CODE (*r->where) == LABEL_REF
5960 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
5961 XEXP (*r->where, 0),
5964 /* Encapsulate RELOADREG so its machine mode matches what
5965 used to be there. Note that gen_lowpart_common will
5966 do the wrong thing if RELOADREG is multi-word. RELOADREG
5967 will always be a REG here. */
5968 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5969 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
5971 /* If we are putting this into a SUBREG and RELOADREG is a
5972 SUBREG, we would be making nested SUBREGs, so we have to fix
5973 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5975 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5977 if (GET_MODE (*r->subreg_loc)
5978 == GET_MODE (SUBREG_REG (reloadreg)))
5979 *r->subreg_loc = SUBREG_REG (reloadreg);
5983 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
5985 /* When working with SUBREGs the rule is that the byte
5986 offset must be a multiple of the SUBREG's mode. */
5987 final_offset = (final_offset /
5988 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5989 final_offset = (final_offset *
5990 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5992 *r->where = SUBREG_REG (reloadreg);
5993 SUBREG_BYTE (*r->subreg_loc) = final_offset;
5997 *r->where = reloadreg;
5999 /* If reload got no reg and isn't optional, something's wrong. */
6001 gcc_assert (rld[r->what].optional);
6005 /* Make a copy of any replacements being done into X and move those
6006 copies to locations in Y, a copy of X. */
6009 copy_replacements (rtx x, rtx y)
6011 /* We can't support X being a SUBREG because we might then need to know its
6012 location if something inside it was replaced. */
6013 gcc_assert (GET_CODE (x) != SUBREG);
6015 copy_replacements_1 (&x, &y, n_replacements);
6019 copy_replacements_1 (rtx *px, rtx *py, int orig_replacements)
6023 struct replacement *r;
6027 for (j = 0; j < orig_replacements; j++)
6029 if (replacements[j].subreg_loc == px)
6031 r = &replacements[n_replacements++];
6032 r->where = replacements[j].where;
6034 r->what = replacements[j].what;
6035 r->mode = replacements[j].mode;
6037 else if (replacements[j].where == px)
6039 r = &replacements[n_replacements++];
6042 r->what = replacements[j].what;
6043 r->mode = replacements[j].mode;
6049 code = GET_CODE (x);
6050 fmt = GET_RTX_FORMAT (code);
6052 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6055 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6056 else if (fmt[i] == 'E')
6057 for (j = XVECLEN (x, i); --j >= 0; )
6058 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6063 /* Change any replacements being done to *X to be done to *Y. */
6066 move_replacements (rtx *x, rtx *y)
6070 for (i = 0; i < n_replacements; i++)
6071 if (replacements[i].subreg_loc == x)
6072 replacements[i].subreg_loc = y;
6073 else if (replacements[i].where == x)
6075 replacements[i].where = y;
6076 replacements[i].subreg_loc = 0;
6080 /* If LOC was scheduled to be replaced by something, return the replacement.
6081 Otherwise, return *LOC. */
6084 find_replacement (rtx *loc)
6086 struct replacement *r;
6088 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6090 rtx reloadreg = rld[r->what].reg_rtx;
6092 if (reloadreg && r->where == loc)
6094 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6095 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
6099 else if (reloadreg && r->subreg_loc == loc)
6101 /* RELOADREG must be either a REG or a SUBREG.
6103 ??? Is it actually still ever a SUBREG? If so, why? */
6105 if (REG_P (reloadreg))
6106 return gen_rtx_REG (GET_MODE (*loc),
6107 (REGNO (reloadreg) +
6108 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
6109 GET_MODE (SUBREG_REG (*loc)),
6112 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6116 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6118 /* When working with SUBREGs the rule is that the byte
6119 offset must be a multiple of the SUBREG's mode. */
6120 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6121 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6122 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6128 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6129 what's inside and make a new rtl if so. */
6130 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6131 || GET_CODE (*loc) == MULT)
6133 rtx x = find_replacement (&XEXP (*loc, 0));
6134 rtx y = find_replacement (&XEXP (*loc, 1));
6136 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6137 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6143 /* Return nonzero if register in range [REGNO, ENDREGNO)
6144 appears either explicitly or implicitly in X
6145 other than being stored into (except for earlyclobber operands).
6147 References contained within the substructure at LOC do not count.
6148 LOC may be zero, meaning don't ignore anything.
6150 This is similar to refers_to_regno_p in rtlanal.c except that we
6151 look at equivalences for pseudos that didn't get hard registers. */
6154 refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno,
6166 code = GET_CODE (x);
6173 /* If this is a pseudo, a hard register must not have been allocated.
6174 X must therefore either be a constant or be in memory. */
6175 if (r >= FIRST_PSEUDO_REGISTER)
6177 if (reg_equiv_memory_loc[r])
6178 return refers_to_regno_for_reload_p (regno, endregno,
6179 reg_equiv_memory_loc[r],
6182 gcc_assert (reg_equiv_constant[r]);
6186 return (endregno > r
6187 && regno < r + (r < FIRST_PSEUDO_REGISTER
6188 ? hard_regno_nregs[r][GET_MODE (x)]
6192 /* If this is a SUBREG of a hard reg, we can see exactly which
6193 registers are being modified. Otherwise, handle normally. */
6194 if (REG_P (SUBREG_REG (x))
6195 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6197 unsigned int inner_regno = subreg_regno (x);
6198 unsigned int inner_endregno
6199 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6200 ? hard_regno_nregs[inner_regno][GET_MODE (x)] : 1);
6202 return endregno > inner_regno && regno < inner_endregno;
6208 if (&SET_DEST (x) != loc
6209 /* Note setting a SUBREG counts as referring to the REG it is in for
6210 a pseudo but not for hard registers since we can
6211 treat each word individually. */
6212 && ((GET_CODE (SET_DEST (x)) == SUBREG
6213 && loc != &SUBREG_REG (SET_DEST (x))
6214 && REG_P (SUBREG_REG (SET_DEST (x)))
6215 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6216 && refers_to_regno_for_reload_p (regno, endregno,
6217 SUBREG_REG (SET_DEST (x)),
6219 /* If the output is an earlyclobber operand, this is
6221 || ((!REG_P (SET_DEST (x))
6222 || earlyclobber_operand_p (SET_DEST (x)))
6223 && refers_to_regno_for_reload_p (regno, endregno,
6224 SET_DEST (x), loc))))
6227 if (code == CLOBBER || loc == &SET_SRC (x))
6236 /* X does not match, so try its subexpressions. */
6238 fmt = GET_RTX_FORMAT (code);
6239 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6241 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6249 if (refers_to_regno_for_reload_p (regno, endregno,
6253 else if (fmt[i] == 'E')
6256 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6257 if (loc != &XVECEXP (x, i, j)
6258 && refers_to_regno_for_reload_p (regno, endregno,
6259 XVECEXP (x, i, j), loc))
6266 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6267 we check if any register number in X conflicts with the relevant register
6268 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6269 contains a MEM (we don't bother checking for memory addresses that can't
6270 conflict because we expect this to be a rare case.
6272 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6273 that we look at equivalences for pseudos that didn't get hard registers. */
6276 reg_overlap_mentioned_for_reload_p (rtx x, rtx in)
6278 int regno, endregno;
6280 /* Overly conservative. */
6281 if (GET_CODE (x) == STRICT_LOW_PART
6282 || GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
6285 /* If either argument is a constant, then modifying X can not affect IN. */
6286 if (CONSTANT_P (x) || CONSTANT_P (in))
6288 else if (GET_CODE (x) == SUBREG)
6290 regno = REGNO (SUBREG_REG (x));
6291 if (regno < FIRST_PSEUDO_REGISTER)
6292 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6293 GET_MODE (SUBREG_REG (x)),
6301 /* If this is a pseudo, it must not have been assigned a hard register.
6302 Therefore, it must either be in memory or be a constant. */
6304 if (regno >= FIRST_PSEUDO_REGISTER)
6306 if (reg_equiv_memory_loc[regno])
6307 return refers_to_mem_for_reload_p (in);
6308 gcc_assert (reg_equiv_constant[regno]);
6313 return refers_to_mem_for_reload_p (in);
6314 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6315 || GET_CODE (x) == CC0)
6316 return reg_mentioned_p (x, in);
6319 gcc_assert (GET_CODE (x) == PLUS);
6321 /* We actually want to know if X is mentioned somewhere inside IN.
6322 We must not say that (plus (sp) (const_int 124)) is in
6323 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6324 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6325 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6330 else if (GET_CODE (in) == PLUS)
6331 return (reg_overlap_mentioned_for_reload_p (x, XEXP (in, 0))
6332 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 1)));
6333 else return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6334 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6337 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6338 ? hard_regno_nregs[regno][GET_MODE (x)] : 1);
6340 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6343 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6347 refers_to_mem_for_reload_p (rtx x)
6356 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6357 && reg_equiv_memory_loc[REGNO (x)]);
6359 fmt = GET_RTX_FORMAT (GET_CODE (x));
6360 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6362 && (MEM_P (XEXP (x, i))
6363 || refers_to_mem_for_reload_p (XEXP (x, i))))
6369 /* Check the insns before INSN to see if there is a suitable register
6370 containing the same value as GOAL.
6371 If OTHER is -1, look for a register in class CLASS.
6372 Otherwise, just see if register number OTHER shares GOAL's value.
6374 Return an rtx for the register found, or zero if none is found.
6376 If RELOAD_REG_P is (short *)1,
6377 we reject any hard reg that appears in reload_reg_rtx
6378 because such a hard reg is also needed coming into this insn.
6380 If RELOAD_REG_P is any other nonzero value,
6381 it is a vector indexed by hard reg number
6382 and we reject any hard reg whose element in the vector is nonnegative
6383 as well as any that appears in reload_reg_rtx.
6385 If GOAL is zero, then GOALREG is a register number; we look
6386 for an equivalent for that register.
6388 MODE is the machine mode of the value we want an equivalence for.
6389 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6391 This function is used by jump.c as well as in the reload pass.
6393 If GOAL is the sum of the stack pointer and a constant, we treat it
6394 as if it were a constant except that sp is required to be unchanging. */
6397 find_equiv_reg (rtx goal, rtx insn, enum reg_class class, int other,
6398 short *reload_reg_p, int goalreg, enum machine_mode mode)
6401 rtx goaltry, valtry, value, where;
6407 int goal_mem_addr_varies = 0;
6408 int need_stable_sp = 0;
6415 else if (REG_P (goal))
6416 regno = REGNO (goal);
6417 else if (MEM_P (goal))
6419 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6420 if (MEM_VOLATILE_P (goal))
6422 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
6424 /* An address with side effects must be reexecuted. */
6439 else if (CONSTANT_P (goal))
6441 else if (GET_CODE (goal) == PLUS
6442 && XEXP (goal, 0) == stack_pointer_rtx
6443 && CONSTANT_P (XEXP (goal, 1)))
6444 goal_const = need_stable_sp = 1;
6445 else if (GET_CODE (goal) == PLUS
6446 && XEXP (goal, 0) == frame_pointer_rtx
6447 && CONSTANT_P (XEXP (goal, 1)))
6453 /* Scan insns back from INSN, looking for one that copies
6454 a value into or out of GOAL.
6455 Stop and give up if we reach a label. */
6461 if (p == 0 || LABEL_P (p)
6462 || num > PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS))
6465 if (NONJUMP_INSN_P (p)
6466 /* If we don't want spill regs ... */
6467 && (! (reload_reg_p != 0
6468 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6469 /* ... then ignore insns introduced by reload; they aren't
6470 useful and can cause results in reload_as_needed to be
6471 different from what they were when calculating the need for
6472 spills. If we notice an input-reload insn here, we will
6473 reject it below, but it might hide a usable equivalent.
6474 That makes bad code. It may even abort: perhaps no reg was
6475 spilled for this insn because it was assumed we would find
6477 || INSN_UID (p) < reload_first_uid))
6480 pat = single_set (p);
6482 /* First check for something that sets some reg equal to GOAL. */
6485 && true_regnum (SET_SRC (pat)) == regno
6486 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6489 && true_regnum (SET_DEST (pat)) == regno
6490 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6492 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6493 /* When looking for stack pointer + const,
6494 make sure we don't use a stack adjust. */
6495 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6496 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6498 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6499 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6501 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6502 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6503 /* If we are looking for a constant,
6504 and something equivalent to that constant was copied
6505 into a reg, we can use that reg. */
6506 || (goal_const && REG_NOTES (p) != 0
6507 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6508 && ((rtx_equal_p (XEXP (tem, 0), goal)
6510 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6511 || (REG_P (SET_DEST (pat))
6512 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6513 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6515 && GET_CODE (goal) == CONST_INT
6517 = operand_subword (XEXP (tem, 0), 0, 0,
6519 && rtx_equal_p (goal, goaltry)
6521 = operand_subword (SET_DEST (pat), 0, 0,
6523 && (valueno = true_regnum (valtry)) >= 0)))
6524 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6526 && REG_P (SET_DEST (pat))
6527 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6528 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6530 && GET_CODE (goal) == CONST_INT
6531 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6533 && rtx_equal_p (goal, goaltry)
6535 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6536 && (valueno = true_regnum (valtry)) >= 0)))
6540 if (valueno != other)
6543 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6549 for (i = hard_regno_nregs[valueno][mode] - 1; i >= 0; i--)
6550 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6563 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6564 (or copying VALUE into GOAL, if GOAL is also a register).
6565 Now verify that VALUE is really valid. */
6567 /* VALUENO is the register number of VALUE; a hard register. */
6569 /* Don't try to re-use something that is killed in this insn. We want
6570 to be able to trust REG_UNUSED notes. */
6571 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6574 /* If we propose to get the value from the stack pointer or if GOAL is
6575 a MEM based on the stack pointer, we need a stable SP. */
6576 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6577 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6581 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6582 if (GET_MODE (value) != mode)
6585 /* Reject VALUE if it was loaded from GOAL
6586 and is also a register that appears in the address of GOAL. */
6588 if (goal_mem && value == SET_DEST (single_set (where))
6589 && refers_to_regno_for_reload_p (valueno,
6591 + hard_regno_nregs[valueno][mode]),
6595 /* Reject registers that overlap GOAL. */
6597 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6598 nregs = hard_regno_nregs[regno][mode];
6601 valuenregs = hard_regno_nregs[valueno][mode];
6603 if (!goal_mem && !goal_const
6604 && regno + nregs > valueno && regno < valueno + valuenregs)
6607 /* Reject VALUE if it is one of the regs reserved for reloads.
6608 Reload1 knows how to reuse them anyway, and it would get
6609 confused if we allocated one without its knowledge.
6610 (Now that insns introduced by reload are ignored above,
6611 this case shouldn't happen, but I'm not positive.) */
6613 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6616 for (i = 0; i < valuenregs; ++i)
6617 if (reload_reg_p[valueno + i] >= 0)
6621 /* Reject VALUE if it is a register being used for an input reload
6622 even if it is not one of those reserved. */
6624 if (reload_reg_p != 0)
6627 for (i = 0; i < n_reloads; i++)
6628 if (rld[i].reg_rtx != 0 && rld[i].in)
6630 int regno1 = REGNO (rld[i].reg_rtx);
6631 int nregs1 = hard_regno_nregs[regno1]
6632 [GET_MODE (rld[i].reg_rtx)];
6633 if (regno1 < valueno + valuenregs
6634 && regno1 + nregs1 > valueno)
6640 /* We must treat frame pointer as varying here,
6641 since it can vary--in a nonlocal goto as generated by expand_goto. */
6642 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6644 /* Now verify that the values of GOAL and VALUE remain unaltered
6645 until INSN is reached. */
6654 /* Don't trust the conversion past a function call
6655 if either of the two is in a call-clobbered register, or memory. */
6660 if (goal_mem || need_stable_sp)
6663 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6664 for (i = 0; i < nregs; ++i)
6665 if (call_used_regs[regno + i])
6668 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6669 for (i = 0; i < valuenregs; ++i)
6670 if (call_used_regs[valueno + i])
6672 #ifdef NON_SAVING_SETJMP
6673 if (NON_SAVING_SETJMP && find_reg_note (p, REG_SETJMP, NULL))
6682 /* Watch out for unspec_volatile, and volatile asms. */
6683 if (volatile_insn_p (pat))
6686 /* If this insn P stores in either GOAL or VALUE, return 0.
6687 If GOAL is a memory ref and this insn writes memory, return 0.
6688 If GOAL is a memory ref and its address is not constant,
6689 and this insn P changes a register used in GOAL, return 0. */
6691 if (GET_CODE (pat) == COND_EXEC)
6692 pat = COND_EXEC_CODE (pat);
6693 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6695 rtx dest = SET_DEST (pat);
6696 while (GET_CODE (dest) == SUBREG
6697 || GET_CODE (dest) == ZERO_EXTRACT
6698 || GET_CODE (dest) == SIGN_EXTRACT
6699 || GET_CODE (dest) == STRICT_LOW_PART)
6700 dest = XEXP (dest, 0);
6703 int xregno = REGNO (dest);
6705 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6706 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
6709 if (xregno < regno + nregs && xregno + xnregs > regno)
6711 if (xregno < valueno + valuenregs
6712 && xregno + xnregs > valueno)
6714 if (goal_mem_addr_varies
6715 && reg_overlap_mentioned_for_reload_p (dest, goal))
6717 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6720 else if (goal_mem && MEM_P (dest)
6721 && ! push_operand (dest, GET_MODE (dest)))
6723 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
6724 && reg_equiv_memory_loc[regno] != 0)
6726 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6729 else if (GET_CODE (pat) == PARALLEL)
6732 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6734 rtx v1 = XVECEXP (pat, 0, i);
6735 if (GET_CODE (v1) == COND_EXEC)
6736 v1 = COND_EXEC_CODE (v1);
6737 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6739 rtx dest = SET_DEST (v1);
6740 while (GET_CODE (dest) == SUBREG
6741 || GET_CODE (dest) == ZERO_EXTRACT
6742 || GET_CODE (dest) == SIGN_EXTRACT
6743 || GET_CODE (dest) == STRICT_LOW_PART)
6744 dest = XEXP (dest, 0);
6747 int xregno = REGNO (dest);
6749 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6750 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
6753 if (xregno < regno + nregs
6754 && xregno + xnregs > regno)
6756 if (xregno < valueno + valuenregs
6757 && xregno + xnregs > valueno)
6759 if (goal_mem_addr_varies
6760 && reg_overlap_mentioned_for_reload_p (dest,
6763 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6766 else if (goal_mem && MEM_P (dest)
6767 && ! push_operand (dest, GET_MODE (dest)))
6769 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
6770 && reg_equiv_memory_loc[regno] != 0)
6772 else if (need_stable_sp
6773 && push_operand (dest, GET_MODE (dest)))
6779 if (CALL_P (p) && CALL_INSN_FUNCTION_USAGE (p))
6783 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6784 link = XEXP (link, 1))
6786 pat = XEXP (link, 0);
6787 if (GET_CODE (pat) == CLOBBER)
6789 rtx dest = SET_DEST (pat);
6793 int xregno = REGNO (dest);
6795 = hard_regno_nregs[xregno][GET_MODE (dest)];
6797 if (xregno < regno + nregs
6798 && xregno + xnregs > regno)
6800 else if (xregno < valueno + valuenregs
6801 && xregno + xnregs > valueno)
6803 else if (goal_mem_addr_varies
6804 && reg_overlap_mentioned_for_reload_p (dest,
6809 else if (goal_mem && MEM_P (dest)
6810 && ! push_operand (dest, GET_MODE (dest)))
6812 else if (need_stable_sp
6813 && push_operand (dest, GET_MODE (dest)))
6820 /* If this insn auto-increments or auto-decrements
6821 either regno or valueno, return 0 now.
6822 If GOAL is a memory ref and its address is not constant,
6823 and this insn P increments a register used in GOAL, return 0. */
6827 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6828 if (REG_NOTE_KIND (link) == REG_INC
6829 && REG_P (XEXP (link, 0)))
6831 int incno = REGNO (XEXP (link, 0));
6832 if (incno < regno + nregs && incno >= regno)
6834 if (incno < valueno + valuenregs && incno >= valueno)
6836 if (goal_mem_addr_varies
6837 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6847 /* Find a place where INCED appears in an increment or decrement operator
6848 within X, and return the amount INCED is incremented or decremented by.
6849 The value is always positive. */
6852 find_inc_amount (rtx x, rtx inced)
6854 enum rtx_code code = GET_CODE (x);
6860 rtx addr = XEXP (x, 0);
6861 if ((GET_CODE (addr) == PRE_DEC
6862 || GET_CODE (addr) == POST_DEC
6863 || GET_CODE (addr) == PRE_INC
6864 || GET_CODE (addr) == POST_INC)
6865 && XEXP (addr, 0) == inced)
6866 return GET_MODE_SIZE (GET_MODE (x));
6867 else if ((GET_CODE (addr) == PRE_MODIFY
6868 || GET_CODE (addr) == POST_MODIFY)
6869 && GET_CODE (XEXP (addr, 1)) == PLUS
6870 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
6871 && XEXP (addr, 0) == inced
6872 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
6874 i = INTVAL (XEXP (XEXP (addr, 1), 1));
6875 return i < 0 ? -i : i;
6879 fmt = GET_RTX_FORMAT (code);
6880 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6884 int tem = find_inc_amount (XEXP (x, i), inced);
6891 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6893 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6903 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6904 If SETS is nonzero, also consider SETs. */
6907 regno_clobbered_p (unsigned int regno, rtx insn, enum machine_mode mode,
6910 unsigned int nregs = hard_regno_nregs[regno][mode];
6911 unsigned int endregno = regno + nregs;
6913 if ((GET_CODE (PATTERN (insn)) == CLOBBER
6914 || (sets && GET_CODE (PATTERN (insn)) == SET))
6915 && REG_P (XEXP (PATTERN (insn), 0)))
6917 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
6919 return test >= regno && test < endregno;
6922 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6924 int i = XVECLEN (PATTERN (insn), 0) - 1;
6928 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6929 if ((GET_CODE (elt) == CLOBBER
6930 || (sets && GET_CODE (PATTERN (insn)) == SET))
6931 && REG_P (XEXP (elt, 0)))
6933 unsigned int test = REGNO (XEXP (elt, 0));
6935 if (test >= regno && test < endregno)
6944 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
6946 reload_adjust_reg_for_mode (rtx reloadreg, enum machine_mode mode)
6950 if (GET_MODE (reloadreg) == mode)
6953 regno = REGNO (reloadreg);
6955 if (WORDS_BIG_ENDIAN)
6956 regno += (int) hard_regno_nregs[regno][GET_MODE (reloadreg)]
6957 - (int) hard_regno_nregs[regno][mode];
6959 return gen_rtx_REG (mode, regno);
6962 static const char *const reload_when_needed_name[] =
6965 "RELOAD_FOR_OUTPUT",
6967 "RELOAD_FOR_INPUT_ADDRESS",
6968 "RELOAD_FOR_INPADDR_ADDRESS",
6969 "RELOAD_FOR_OUTPUT_ADDRESS",
6970 "RELOAD_FOR_OUTADDR_ADDRESS",
6971 "RELOAD_FOR_OPERAND_ADDRESS",
6972 "RELOAD_FOR_OPADDR_ADDR",
6974 "RELOAD_FOR_OTHER_ADDRESS"
6977 static const char * const reg_class_names[] = REG_CLASS_NAMES;
6979 /* These functions are used to print the variables set by 'find_reloads' */
6982 debug_reload_to_stream (FILE *f)
6989 for (r = 0; r < n_reloads; r++)
6991 fprintf (f, "Reload %d: ", r);
6995 fprintf (f, "reload_in (%s) = ",
6996 GET_MODE_NAME (rld[r].inmode));
6997 print_inline_rtx (f, rld[r].in, 24);
6998 fprintf (f, "\n\t");
7001 if (rld[r].out != 0)
7003 fprintf (f, "reload_out (%s) = ",
7004 GET_MODE_NAME (rld[r].outmode));
7005 print_inline_rtx (f, rld[r].out, 24);
7006 fprintf (f, "\n\t");
7009 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
7011 fprintf (f, "%s (opnum = %d)",
7012 reload_when_needed_name[(int) rld[r].when_needed],
7015 if (rld[r].optional)
7016 fprintf (f, ", optional");
7018 if (rld[r].nongroup)
7019 fprintf (f, ", nongroup");
7021 if (rld[r].inc != 0)
7022 fprintf (f, ", inc by %d", rld[r].inc);
7024 if (rld[r].nocombine)
7025 fprintf (f, ", can't combine");
7027 if (rld[r].secondary_p)
7028 fprintf (f, ", secondary_reload_p");
7030 if (rld[r].in_reg != 0)
7032 fprintf (f, "\n\treload_in_reg: ");
7033 print_inline_rtx (f, rld[r].in_reg, 24);
7036 if (rld[r].out_reg != 0)
7038 fprintf (f, "\n\treload_out_reg: ");
7039 print_inline_rtx (f, rld[r].out_reg, 24);
7042 if (rld[r].reg_rtx != 0)
7044 fprintf (f, "\n\treload_reg_rtx: ");
7045 print_inline_rtx (f, rld[r].reg_rtx, 24);
7049 if (rld[r].secondary_in_reload != -1)
7051 fprintf (f, "%ssecondary_in_reload = %d",
7052 prefix, rld[r].secondary_in_reload);
7056 if (rld[r].secondary_out_reload != -1)
7057 fprintf (f, "%ssecondary_out_reload = %d\n",
7058 prefix, rld[r].secondary_out_reload);
7061 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7063 fprintf (f, "%ssecondary_in_icode = %s", prefix,
7064 insn_data[rld[r].secondary_in_icode].name);
7068 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7069 fprintf (f, "%ssecondary_out_icode = %s", prefix,
7070 insn_data[rld[r].secondary_out_icode].name);
7079 debug_reload_to_stream (stderr);