1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92, 93, 94, 1995 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This file contains subroutines used only from the file reload1.c.
22 It knows how to scan one insn for operands and values
23 that need to be copied into registers to make valid code.
24 It also finds other operands and values which are valid
25 but for which equivalent values in registers exist and
26 ought to be used instead.
28 Before processing the first insn of the function, call `init_reload'.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
92 #include "insn-config.h"
93 #include "insn-codes.h"
97 #include "hard-reg-set.h"
101 #ifndef REGISTER_MOVE_COST
102 #define REGISTER_MOVE_COST(x, y) 2
105 /* The variables set up by `find_reloads' are:
107 n_reloads number of distinct reloads needed; max reload # + 1
108 tables indexed by reload number
109 reload_in rtx for value to reload from
110 reload_out rtx for where to store reload-reg afterward if nec
111 (often the same as reload_in)
112 reload_reg_class enum reg_class, saying what regs to reload into
113 reload_inmode enum machine_mode; mode this operand should have
114 when reloaded, on input.
115 reload_outmode enum machine_mode; mode this operand should have
116 when reloaded, on output.
117 reload_optional char, nonzero for an optional reload.
118 Optional reloads are ignored unless the
119 value is already sitting in a register.
120 reload_inc int, positive amount to increment or decrement by if
121 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
122 Ignored otherwise (don't assume it is zero).
123 reload_in_reg rtx. A reg for which reload_in is the equivalent.
124 If reload_in is a symbol_ref which came from
125 reg_equiv_constant, then this is the pseudo
126 which has that symbol_ref as equivalent.
127 reload_reg_rtx rtx. This is the register to reload into.
128 If it is zero when `find_reloads' returns,
129 you must find a suitable register in the class
130 specified by reload_reg_class, and store here
131 an rtx for that register with mode from
132 reload_inmode or reload_outmode.
133 reload_nocombine char, nonzero if this reload shouldn't be
134 combined with another reload.
135 reload_opnum int, operand number being reloaded. This is
136 used to group related reloads and need not always
137 be equal to the actual operand number in the insn,
138 though it current will be; for in-out operands, it
139 is one of the two operand numbers.
140 reload_when_needed enum, classifies reload as needed either for
141 addressing an input reload, addressing an output,
142 for addressing a non-reloaded mem ref,
143 or for unspecified purposes (i.e., more than one
145 reload_secondary_p int, 1 if this is a secondary register for one
147 reload_secondary_in_reload
148 reload_secondary_out_reload
149 int, gives the reload number of a secondary
150 reload, when needed; otherwise -1
151 reload_secondary_in_icode
152 reload_secondary_out_icode
153 enum insn_code, if a secondary reload is required,
154 gives the INSN_CODE that uses the secondary
155 reload as a scratch register, or CODE_FOR_nothing
156 if the secondary reload register is to be an
157 intermediate register. */
160 rtx reload_in[MAX_RELOADS];
161 rtx reload_out[MAX_RELOADS];
162 enum reg_class reload_reg_class[MAX_RELOADS];
163 enum machine_mode reload_inmode[MAX_RELOADS];
164 enum machine_mode reload_outmode[MAX_RELOADS];
165 rtx reload_reg_rtx[MAX_RELOADS];
166 char reload_optional[MAX_RELOADS];
167 int reload_inc[MAX_RELOADS];
168 rtx reload_in_reg[MAX_RELOADS];
169 char reload_nocombine[MAX_RELOADS];
170 int reload_opnum[MAX_RELOADS];
171 enum reload_type reload_when_needed[MAX_RELOADS];
172 int reload_secondary_p[MAX_RELOADS];
173 int reload_secondary_in_reload[MAX_RELOADS];
174 int reload_secondary_out_reload[MAX_RELOADS];
175 enum insn_code reload_secondary_in_icode[MAX_RELOADS];
176 enum insn_code reload_secondary_out_icode[MAX_RELOADS];
178 /* All the "earlyclobber" operands of the current insn
179 are recorded here. */
181 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
183 int reload_n_operands;
185 /* Replacing reloads.
187 If `replace_reloads' is nonzero, then as each reload is recorded
188 an entry is made for it in the table `replacements'.
189 Then later `subst_reloads' can look through that table and
190 perform all the replacements needed. */
192 /* Nonzero means record the places to replace. */
193 static int replace_reloads;
195 /* Each replacement is recorded with a structure like this. */
198 rtx *where; /* Location to store in */
199 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
200 a SUBREG; 0 otherwise. */
201 int what; /* which reload this is for */
202 enum machine_mode mode; /* mode it must have */
205 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
207 /* Number of replacements currently recorded. */
208 static int n_replacements;
210 /* Used to track what is modified by an operand. */
213 int reg_flag; /* Nonzero if referencing a register. */
214 int safe; /* Nonzero if this can't conflict with anything. */
215 rtx base; /* Base adddress for MEM. */
216 HOST_WIDE_INT start; /* Starting offset or register number. */
217 HOST_WIDE_INT end; /* Endinf offset or register number. */
220 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
221 (see reg_equiv_address). */
222 static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
223 static int n_memlocs;
225 #ifdef SECONDARY_MEMORY_NEEDED
227 /* Save MEMs needed to copy from one class of registers to another. One MEM
228 is used per mode, but normally only one or two modes are ever used.
230 We keep two versions, before and after register elimination. The one
231 after register elimination is record separately for each operand. This
232 is done in case the address is not valid to be sure that we separately
235 static rtx secondary_memlocs[NUM_MACHINE_MODES];
236 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
239 /* The instruction we are doing reloads for;
240 so we can test whether a register dies in it. */
241 static rtx this_insn;
243 /* Nonzero if this instruction is a user-specified asm with operands. */
244 static int this_insn_is_asm;
246 /* If hard_regs_live_known is nonzero,
247 we can tell which hard regs are currently live,
248 at least enough to succeed in choosing dummy reloads. */
249 static int hard_regs_live_known;
251 /* Indexed by hard reg number,
252 element is nonegative if hard reg has been spilled.
253 This vector is passed to `find_reloads' as an argument
254 and is not changed here. */
255 static short *static_reload_reg_p;
257 /* Set to 1 in subst_reg_equivs if it changes anything. */
258 static int subst_reg_equivs_changed;
260 /* On return from push_reload, holds the reload-number for the OUT
261 operand, which can be different for that from the input operand. */
262 static int output_reloadnum;
264 /* Compare two RTX's. */
265 #define MATCHES(x, y) \
266 (x == y || (x != 0 && (GET_CODE (x) == REG \
267 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
268 : rtx_equal_p (x, y) && ! side_effects_p (x))))
270 /* Indicates if two reloads purposes are for similar enough things that we
271 can merge their reloads. */
272 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
273 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
274 || ((when1) == (when2) && (op1) == (op2)) \
275 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
276 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
277 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
278 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
279 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
281 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
282 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
283 ((when1) != (when2) \
284 || ! ((op1) == (op2) \
285 || (when1) == RELOAD_FOR_INPUT \
286 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
287 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
289 static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class,
290 enum machine_mode, enum reload_type,
292 static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
293 enum machine_mode, enum machine_mode,
294 int, int, int, enum reload_type));
295 static void push_replacement PROTO((rtx *, int, enum machine_mode));
296 static void combine_reloads PROTO((void));
297 static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
298 enum machine_mode, enum machine_mode,
299 enum reg_class, int));
300 static int earlyclobber_operand_p PROTO((rtx));
301 static int hard_reg_set_here_p PROTO((int, int, rtx));
302 static struct decomposition decompose PROTO((rtx));
303 static int immune_p PROTO((rtx, rtx, struct decomposition));
304 static int alternative_allows_memconst PROTO((char *, int));
305 static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int));
306 static rtx make_memloc PROTO((rtx, int));
307 static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
308 int, enum reload_type, int));
309 static rtx subst_reg_equivs PROTO((rtx));
310 static rtx subst_indexed_address PROTO((rtx));
311 static int find_reloads_address_1 PROTO((rtx, int, rtx *, int,
312 enum reload_type,int));
313 static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
314 enum machine_mode, int,
315 enum reload_type, int));
316 static int find_inc_amount PROTO((rtx, rtx));
318 #ifdef HAVE_SECONDARY_RELOADS
320 /* Determine if any secondary reloads are needed for loading (if IN_P is
321 non-zero) or storing (if IN_P is zero) X to or from a reload register of
322 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
323 are needed, push them.
325 Return the reload number of the secondary reload we made, or -1 if
326 we didn't need one. *PICODE is set to the insn_code to use if we do
327 need a secondary reload. */
330 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
336 enum reg_class reload_class;
337 enum machine_mode reload_mode;
338 enum reload_type type;
339 enum insn_code *picode;
341 enum reg_class class = NO_REGS;
342 enum machine_mode mode = reload_mode;
343 enum insn_code icode = CODE_FOR_nothing;
344 enum reg_class t_class = NO_REGS;
345 enum machine_mode t_mode = VOIDmode;
346 enum insn_code t_icode = CODE_FOR_nothing;
347 enum reload_type secondary_type;
349 int s_reload, t_reload = -1;
351 if (type == RELOAD_FOR_INPUT_ADDRESS || type == RELOAD_FOR_OUTPUT_ADDRESS)
352 secondary_type = type;
354 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
356 *picode = CODE_FOR_nothing;
358 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
359 is still a pseudo-register by now, it *must* have an equivalent MEM
360 but we don't want to assume that), use that equivalent when seeing if
361 a secondary reload is needed since whether or not a reload is needed
362 might be sensitive to the form of the MEM. */
364 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
365 && reg_equiv_mem[REGNO (x)] != 0)
366 x = reg_equiv_mem[REGNO (x)];
368 #ifdef SECONDARY_INPUT_RELOAD_CLASS
370 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
373 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
375 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
378 /* If we don't need any secondary registers, done. */
379 if (class == NO_REGS)
382 /* Get a possible insn to use. If the predicate doesn't accept X, don't
385 icode = (in_p ? reload_in_optab[(int) reload_mode]
386 : reload_out_optab[(int) reload_mode]);
388 if (icode != CODE_FOR_nothing
389 && insn_operand_predicate[(int) icode][in_p]
390 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
391 icode = CODE_FOR_nothing;
393 /* If we will be using an insn, see if it can directly handle the reload
394 register we will be using. If it can, the secondary reload is for a
395 scratch register. If it can't, we will use the secondary reload for
396 an intermediate register and require a tertiary reload for the scratch
399 if (icode != CODE_FOR_nothing)
401 /* If IN_P is non-zero, the reload register will be the output in
402 operand 0. If IN_P is zero, the reload register will be the input
403 in operand 1. Outputs should have an initial "=", which we must
406 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
407 enum reg_class insn_class
408 = (insn_letter == 'r' ? GENERAL_REGS
409 : REG_CLASS_FROM_LETTER (insn_letter));
411 if (insn_class == NO_REGS
412 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
413 /* The scratch register's constraint must start with "=&". */
414 || insn_operand_constraint[(int) icode][2][0] != '='
415 || insn_operand_constraint[(int) icode][2][1] != '&')
418 if (reg_class_subset_p (reload_class, insn_class))
419 mode = insn_operand_mode[(int) icode][2];
422 char t_letter = insn_operand_constraint[(int) icode][2][2];
424 t_mode = insn_operand_mode[(int) icode][2];
425 t_class = (t_letter == 'r' ? GENERAL_REGS
426 : REG_CLASS_FROM_LETTER (t_letter));
428 icode = CODE_FOR_nothing;
432 /* This case isn't valid, so fail. Reload is allowed to use the same
433 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
434 in the case of a secondary register, we actually need two different
435 registers for correct code. We fail here to prevent the possibility of
436 silently generating incorrect code later.
438 The convention is that secondary input reloads are valid only if the
439 secondary_class is different from class. If you have such a case, you
440 can not use secondary reloads, you must work around the problem some
443 Allow this when MODE is not reload_mode and assume that the generated
444 code handles this case (it does on the Alpha, which is the only place
445 this currently happens). */
447 if (in_p && class == reload_class && mode == reload_mode)
450 /* If we need a tertiary reload, see if we have one we can reuse or else
453 if (t_class != NO_REGS)
455 for (t_reload = 0; t_reload < n_reloads; t_reload++)
456 if (reload_secondary_p[t_reload]
457 && (reg_class_subset_p (t_class, reload_reg_class[t_reload])
458 || reg_class_subset_p (reload_reg_class[t_reload], t_class))
459 && ((in_p && reload_inmode[t_reload] == t_mode)
460 || (! in_p && reload_outmode[t_reload] == t_mode))
461 && ((in_p && (reload_secondary_in_icode[t_reload]
462 == CODE_FOR_nothing))
463 || (! in_p &&(reload_secondary_out_icode[t_reload]
464 == CODE_FOR_nothing)))
465 && (reg_class_size[(int) t_class] == 1
466 #ifdef SMALL_REGISTER_CLASSES
470 && MERGABLE_RELOADS (secondary_type,
471 reload_when_needed[t_reload],
472 opnum, reload_opnum[t_reload]))
475 reload_inmode[t_reload] = t_mode;
477 reload_outmode[t_reload] = t_mode;
479 if (reg_class_subset_p (t_class, reload_reg_class[t_reload]))
480 reload_reg_class[t_reload] = t_class;
482 reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum);
483 reload_optional[t_reload] &= optional;
484 reload_secondary_p[t_reload] = 1;
485 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload],
486 opnum, reload_opnum[t_reload]))
487 reload_when_needed[t_reload] = RELOAD_OTHER;
490 if (t_reload == n_reloads)
492 /* We need to make a new tertiary reload for this register class. */
493 reload_in[t_reload] = reload_out[t_reload] = 0;
494 reload_reg_class[t_reload] = t_class;
495 reload_inmode[t_reload] = in_p ? t_mode : VOIDmode;
496 reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode;
497 reload_reg_rtx[t_reload] = 0;
498 reload_optional[t_reload] = optional;
499 reload_inc[t_reload] = 0;
500 /* Maybe we could combine these, but it seems too tricky. */
501 reload_nocombine[t_reload] = 1;
502 reload_in_reg[t_reload] = 0;
503 reload_opnum[t_reload] = opnum;
504 reload_when_needed[t_reload] = secondary_type;
505 reload_secondary_in_reload[t_reload] = -1;
506 reload_secondary_out_reload[t_reload] = -1;
507 reload_secondary_in_icode[t_reload] = CODE_FOR_nothing;
508 reload_secondary_out_icode[t_reload] = CODE_FOR_nothing;
509 reload_secondary_p[t_reload] = 1;
515 /* See if we can reuse an existing secondary reload. */
516 for (s_reload = 0; s_reload < n_reloads; s_reload++)
517 if (reload_secondary_p[s_reload]
518 && (reg_class_subset_p (class, reload_reg_class[s_reload])
519 || reg_class_subset_p (reload_reg_class[s_reload], class))
520 && ((in_p && reload_inmode[s_reload] == mode)
521 || (! in_p && reload_outmode[s_reload] == mode))
522 && ((in_p && reload_secondary_in_reload[s_reload] == t_reload)
523 || (! in_p && reload_secondary_out_reload[s_reload] == t_reload))
524 && ((in_p && reload_secondary_in_icode[s_reload] == t_icode)
525 || (! in_p && reload_secondary_out_icode[s_reload] == t_icode))
526 && (reg_class_size[(int) class] == 1
527 #ifdef SMALL_REGISTER_CLASSES
531 && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload],
532 opnum, reload_opnum[s_reload]))
535 reload_inmode[s_reload] = mode;
537 reload_outmode[s_reload] = mode;
539 if (reg_class_subset_p (class, reload_reg_class[s_reload]))
540 reload_reg_class[s_reload] = class;
542 reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum);
543 reload_optional[s_reload] &= optional;
544 reload_secondary_p[s_reload] = 1;
545 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload],
546 opnum, reload_opnum[s_reload]))
547 reload_when_needed[s_reload] = RELOAD_OTHER;
550 if (s_reload == n_reloads)
552 /* We need to make a new secondary reload for this register class. */
553 reload_in[s_reload] = reload_out[s_reload] = 0;
554 reload_reg_class[s_reload] = class;
556 reload_inmode[s_reload] = in_p ? mode : VOIDmode;
557 reload_outmode[s_reload] = ! in_p ? mode : VOIDmode;
558 reload_reg_rtx[s_reload] = 0;
559 reload_optional[s_reload] = optional;
560 reload_inc[s_reload] = 0;
561 /* Maybe we could combine these, but it seems too tricky. */
562 reload_nocombine[s_reload] = 1;
563 reload_in_reg[s_reload] = 0;
564 reload_opnum[s_reload] = opnum;
565 reload_when_needed[s_reload] = secondary_type;
566 reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1;
567 reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1;
568 reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing;
569 reload_secondary_out_icode[s_reload]
570 = ! in_p ? t_icode : CODE_FOR_nothing;
571 reload_secondary_p[s_reload] = 1;
575 #ifdef SECONDARY_MEMORY_NEEDED
576 /* If we need a memory location to copy between the two reload regs,
579 if (in_p && icode == CODE_FOR_nothing
580 && SECONDARY_MEMORY_NEEDED (class, reload_class, reload_mode))
581 get_secondary_mem (x, reload_mode, opnum, type);
583 if (! in_p && icode == CODE_FOR_nothing
584 && SECONDARY_MEMORY_NEEDED (reload_class, class, reload_mode))
585 get_secondary_mem (x, reload_mode, opnum, type);
592 #endif /* HAVE_SECONDARY_RELOADS */
594 #ifdef SECONDARY_MEMORY_NEEDED
596 /* Return a memory location that will be used to copy X in mode MODE.
597 If we haven't already made a location for this mode in this insn,
598 call find_reloads_address on the location being returned. */
601 get_secondary_mem (x, mode, opnum, type)
603 enum machine_mode mode;
605 enum reload_type type;
610 /* By default, if MODE is narrower than a word, widen it to a word.
611 This is required because most machines that require these memory
612 locations do not support short load and stores from all registers
613 (e.g., FP registers). */
615 #ifdef SECONDARY_MEMORY_NEEDED_MODE
616 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
618 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
619 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
622 /* If we already have made a MEM for this operand in MODE, return it. */
623 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
624 return secondary_memlocs_elim[(int) mode][opnum];
626 /* If this is the first time we've tried to get a MEM for this mode,
627 allocate a new one. `something_changed' in reload will get set
628 by noticing that the frame size has changed. */
630 if (secondary_memlocs[(int) mode] == 0)
632 #ifdef SECONDARY_MEMORY_NEEDED_RTX
633 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
635 secondary_memlocs[(int) mode]
636 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
640 /* Get a version of the address doing any eliminations needed. If that
641 didn't give us a new MEM, make a new one if it isn't valid. */
643 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
644 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
646 if (! mem_valid && loc == secondary_memlocs[(int) mode])
647 loc = copy_rtx (loc);
649 /* The only time the call below will do anything is if the stack
650 offset is too large. In that case IND_LEVELS doesn't matter, so we
651 can just pass a zero. Adjust the type to be the address of the
652 corresponding object. If the address was valid, save the eliminated
653 address. If it wasn't valid, we need to make a reload each time, so
658 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
659 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
662 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
666 secondary_memlocs_elim[(int) mode][opnum] = loc;
670 /* Clear any secondary memory locations we've made. */
673 clear_secondary_mem ()
675 bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);
677 #endif /* SECONDARY_MEMORY_NEEDED */
679 /* Record one reload that needs to be performed.
680 IN is an rtx saying where the data are to be found before this instruction.
681 OUT says where they must be stored after the instruction.
682 (IN is zero for data not read, and OUT is zero for data not written.)
683 INLOC and OUTLOC point to the places in the instructions where
684 IN and OUT were found.
685 If IN and OUT are both non-zero, it means the same register must be used
686 to reload both IN and OUT.
688 CLASS is a register class required for the reloaded data.
689 INMODE is the machine mode that the instruction requires
690 for the reg that replaces IN and OUTMODE is likewise for OUT.
692 If IN is zero, then OUT's location and mode should be passed as
695 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
697 OPTIONAL nonzero means this reload does not need to be performed:
698 it can be discarded if that is more convenient.
700 OPNUM and TYPE say what the purpose of this reload is.
702 The return value is the reload-number for this reload.
704 If both IN and OUT are nonzero, in some rare cases we might
705 want to make two separate reloads. (Actually we never do this now.)
706 Therefore, the reload-number for OUT is stored in
707 output_reloadnum when we return; the return value applies to IN.
708 Usually (presently always), when IN and OUT are nonzero,
709 the two reload-numbers are equal, but the caller should be careful to
713 push_reload (in, out, inloc, outloc, class,
714 inmode, outmode, strict_low, optional, opnum, type)
715 register rtx in, out;
717 enum reg_class class;
718 enum machine_mode inmode, outmode;
722 enum reload_type type;
726 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
727 int secondary_in_reload = -1, secondary_out_reload = -1;
728 enum insn_code secondary_in_icode, secondary_out_icode;
730 /* INMODE and/or OUTMODE could be VOIDmode if no mode
731 has been specified for the operand. In that case,
732 use the operand's mode as the mode to reload. */
733 if (inmode == VOIDmode && in != 0)
734 inmode = GET_MODE (in);
735 if (outmode == VOIDmode && out != 0)
736 outmode = GET_MODE (out);
738 /* If IN is a pseudo register everywhere-equivalent to a constant, and
739 it is not in a hard register, reload straight from the constant,
740 since we want to get rid of such pseudo registers.
741 Often this is done earlier, but not always in find_reloads_address. */
742 if (in != 0 && GET_CODE (in) == REG)
744 register int regno = REGNO (in);
746 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
747 && reg_equiv_constant[regno] != 0)
748 in = reg_equiv_constant[regno];
751 /* Likewise for OUT. Of course, OUT will never be equivalent to
752 an actual constant, but it might be equivalent to a memory location
753 (in the case of a parameter). */
754 if (out != 0 && GET_CODE (out) == REG)
756 register int regno = REGNO (out);
758 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
759 && reg_equiv_constant[regno] != 0)
760 out = reg_equiv_constant[regno];
763 /* If we have a read-write operand with an address side-effect,
764 change either IN or OUT so the side-effect happens only once. */
765 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
767 if (GET_CODE (XEXP (in, 0)) == POST_INC
768 || GET_CODE (XEXP (in, 0)) == POST_DEC)
769 in = gen_rtx (MEM, GET_MODE (in), XEXP (XEXP (in, 0), 0));
770 if (GET_CODE (XEXP (in, 0)) == PRE_INC
771 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
772 out = gen_rtx (MEM, GET_MODE (out), XEXP (XEXP (out, 0), 0));
775 /* If we are reloading a (SUBREG constant ...), really reload just the
776 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
777 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
778 a pseudo and hence will become a MEM) with M1 wider than M2 and the
779 register is a pseudo, also reload the inside expression.
780 For machines that extend byte loads, do this for any SUBREG of a pseudo
781 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
782 M2 is an integral mode that gets extended when loaded.
783 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
784 either M1 is not valid for R or M2 is wider than a word but we only
785 need one word to store an M2-sized quantity in R.
786 (However, if OUT is nonzero, we need to reload the reg *and*
787 the subreg, so do nothing here, and let following statement handle it.)
789 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
790 we can't handle it here because CONST_INT does not indicate a mode.
792 Similarly, we must reload the inside expression if we have a
793 STRICT_LOW_PART (presumably, in == out in the cas).
795 Also reload the inner expression if it does not require a secondary
796 reload but the SUBREG does.
798 Finally, reload the inner expression if it is a register that is in
799 the class whose registers cannot be referenced in a different size
800 and M1 is not the same size as M2. */
802 if (in != 0 && GET_CODE (in) == SUBREG
803 #ifdef CLASS_CANNOT_CHANGE_SIZE
804 && class != CLASS_CANNOT_CHANGE_SIZE
806 && (CONSTANT_P (SUBREG_REG (in))
807 || GET_CODE (SUBREG_REG (in)) == PLUS
809 || (((GET_CODE (SUBREG_REG (in)) == REG
810 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
811 || GET_CODE (SUBREG_REG (in)) == MEM)
812 && ((GET_MODE_SIZE (inmode)
813 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
814 #ifdef LOAD_EXTEND_OP
815 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
816 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
818 && (GET_MODE_SIZE (inmode)
819 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
820 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
821 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
824 || (GET_CODE (SUBREG_REG (in)) == REG
825 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
826 /* The case where out is nonzero
827 is handled differently in the following statement. */
828 && (out == 0 || SUBREG_WORD (in) == 0)
829 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
830 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
832 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
834 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
835 GET_MODE (SUBREG_REG (in)))))
836 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
839 #ifdef SECONDARY_INPUT_RELOAD_CLASS
840 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
841 && (SECONDARY_INPUT_RELOAD_CLASS (class,
842 GET_MODE (SUBREG_REG (in)),
846 #ifdef CLASS_CANNOT_CHANGE_SIZE
847 || (GET_CODE (SUBREG_REG (in)) == REG
848 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
849 && (TEST_HARD_REG_BIT
850 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
851 REGNO (SUBREG_REG (in))))
852 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
853 != GET_MODE_SIZE (inmode)))
857 in_subreg_loc = inloc;
858 inloc = &SUBREG_REG (in);
860 #ifndef LOAD_EXTEND_OP
861 if (GET_CODE (in) == MEM)
862 /* This is supposed to happen only for paradoxical subregs made by
863 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
864 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
867 inmode = GET_MODE (in);
870 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
871 either M1 is not valid for R or M2 is wider than a word but we only
872 need one word to store an M2-sized quantity in R.
874 However, we must reload the inner reg *as well as* the subreg in
877 if (in != 0 && GET_CODE (in) == SUBREG
878 && GET_CODE (SUBREG_REG (in)) == REG
879 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
880 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in)), inmode)
881 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
882 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
884 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
886 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
887 GET_MODE (SUBREG_REG (in)))))))
889 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
890 GENERAL_REGS, VOIDmode, VOIDmode, 0, 0, opnum, type);
894 /* Similarly for paradoxical and problematical SUBREGs on the output.
895 Note that there is no reason we need worry about the previous value
896 of SUBREG_REG (out); even if wider than out,
897 storing in a subreg is entitled to clobber it all
898 (except in the case of STRICT_LOW_PART,
899 and in that case the constraint should label it input-output.) */
900 if (out != 0 && GET_CODE (out) == SUBREG
901 #ifdef CLASS_CANNOT_CHANGE_SIZE
902 && class != CLASS_CANNOT_CHANGE_SIZE
904 && (CONSTANT_P (SUBREG_REG (out))
906 || (((GET_CODE (SUBREG_REG (out)) == REG
907 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
908 || GET_CODE (SUBREG_REG (out)) == MEM)
909 && ((GET_MODE_SIZE (outmode)
910 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))))
911 || (GET_CODE (SUBREG_REG (out)) == REG
912 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
913 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
914 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
916 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
918 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
919 GET_MODE (SUBREG_REG (out)))))
920 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
921 + SUBREG_WORD (out)),
923 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
924 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
925 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
926 GET_MODE (SUBREG_REG (out)),
930 #ifdef CLASS_CANNOT_CHANGE_SIZE
931 || (GET_CODE (SUBREG_REG (out)) == REG
932 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
933 && (TEST_HARD_REG_BIT
934 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
935 REGNO (SUBREG_REG (out))))
936 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
937 != GET_MODE_SIZE (outmode)))
941 out_subreg_loc = outloc;
942 outloc = &SUBREG_REG (out);
944 #ifndef LOAD_EXTEND_OP
945 if (GET_CODE (out) == MEM
946 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
949 outmode = GET_MODE (out);
952 /* If IN appears in OUT, we can't share any input-only reload for IN. */
953 if (in != 0 && out != 0 && GET_CODE (out) == MEM
954 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
955 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
958 /* If IN is a SUBREG of a hard register, make a new REG. This
959 simplifies some of the cases below. */
961 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
962 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
963 in = gen_rtx (REG, GET_MODE (in),
964 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
966 /* Similarly for OUT. */
967 if (out != 0 && GET_CODE (out) == SUBREG
968 && GET_CODE (SUBREG_REG (out)) == REG
969 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
970 out = gen_rtx (REG, GET_MODE (out),
971 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
973 /* Narrow down the class of register wanted if that is
974 desirable on this machine for efficiency. */
976 class = PREFERRED_RELOAD_CLASS (in, class);
978 /* Output reloads may need analogous treatment, different in detail. */
979 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
981 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
984 /* Make sure we use a class that can handle the actual pseudo
985 inside any subreg. For example, on the 386, QImode regs
986 can appear within SImode subregs. Although GENERAL_REGS
987 can handle SImode, QImode needs a smaller class. */
988 #ifdef LIMIT_RELOAD_CLASS
990 class = LIMIT_RELOAD_CLASS (inmode, class);
991 else if (in != 0 && GET_CODE (in) == SUBREG)
992 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
995 class = LIMIT_RELOAD_CLASS (outmode, class);
996 if (out != 0 && GET_CODE (out) == SUBREG)
997 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1000 /* Verify that this class is at least possible for the mode that
1002 if (this_insn_is_asm)
1004 enum machine_mode mode;
1005 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1009 if (mode == VOIDmode)
1011 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1016 outmode = word_mode;
1018 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1019 if (HARD_REGNO_MODE_OK (i, mode)
1020 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1022 int nregs = HARD_REGNO_NREGS (i, mode);
1025 for (j = 1; j < nregs; j++)
1026 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1031 if (i == FIRST_PSEUDO_REGISTER)
1033 error_for_asm (this_insn, "impossible register constraint in `asm'");
1038 if (class == NO_REGS)
1041 /* We can use an existing reload if the class is right
1042 and at least one of IN and OUT is a match
1043 and the other is at worst neutral.
1044 (A zero compared against anything is neutral.)
1046 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
1047 for the same thing since that can cause us to need more reload registers
1048 than we otherwise would. */
1050 for (i = 0; i < n_reloads; i++)
1051 if ((reg_class_subset_p (class, reload_reg_class[i])
1052 || reg_class_subset_p (reload_reg_class[i], class))
1053 /* If the existing reload has a register, it must fit our class. */
1054 && (reload_reg_rtx[i] == 0
1055 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1056 true_regnum (reload_reg_rtx[i])))
1057 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
1058 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
1060 (out != 0 && MATCHES (reload_out[i], out)
1061 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
1062 && (reg_class_size[(int) class] == 1
1063 #ifdef SMALL_REGISTER_CLASSES
1067 && MERGABLE_RELOADS (type, reload_when_needed[i],
1068 opnum, reload_opnum[i]))
1071 /* Reloading a plain reg for input can match a reload to postincrement
1072 that reg, since the postincrement's value is the right value.
1073 Likewise, it can match a preincrement reload, since we regard
1074 the preincrementation as happening before any ref in this insn
1075 to that register. */
1077 for (i = 0; i < n_reloads; i++)
1078 if ((reg_class_subset_p (class, reload_reg_class[i])
1079 || reg_class_subset_p (reload_reg_class[i], class))
1080 /* If the existing reload has a register, it must fit our class. */
1081 && (reload_reg_rtx[i] == 0
1082 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1083 true_regnum (reload_reg_rtx[i])))
1084 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
1085 && ((GET_CODE (in) == REG
1086 && (GET_CODE (reload_in[i]) == POST_INC
1087 || GET_CODE (reload_in[i]) == POST_DEC
1088 || GET_CODE (reload_in[i]) == PRE_INC
1089 || GET_CODE (reload_in[i]) == PRE_DEC)
1090 && MATCHES (XEXP (reload_in[i], 0), in))
1092 (GET_CODE (reload_in[i]) == REG
1093 && (GET_CODE (in) == POST_INC
1094 || GET_CODE (in) == POST_DEC
1095 || GET_CODE (in) == PRE_INC
1096 || GET_CODE (in) == PRE_DEC)
1097 && MATCHES (XEXP (in, 0), reload_in[i])))
1098 && (reg_class_size[(int) class] == 1
1099 #ifdef SMALL_REGISTER_CLASSES
1103 && MERGABLE_RELOADS (type, reload_when_needed[i],
1104 opnum, reload_opnum[i]))
1106 /* Make sure reload_in ultimately has the increment,
1107 not the plain register. */
1108 if (GET_CODE (in) == REG)
1115 /* See if we need a secondary reload register to move between CLASS
1116 and IN or CLASS and OUT. Get the icode and push any required reloads
1117 needed for each of them if so. */
1119 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1122 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1123 &secondary_in_icode);
1126 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1127 if (out != 0 && GET_CODE (out) != SCRATCH)
1128 secondary_out_reload
1129 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1130 type, &secondary_out_icode);
1133 /* We found no existing reload suitable for re-use.
1134 So add an additional reload. */
1138 reload_out[i] = out;
1139 reload_reg_class[i] = class;
1140 reload_inmode[i] = inmode;
1141 reload_outmode[i] = outmode;
1142 reload_reg_rtx[i] = 0;
1143 reload_optional[i] = optional;
1145 reload_nocombine[i] = 0;
1146 reload_in_reg[i] = inloc ? *inloc : 0;
1147 reload_opnum[i] = opnum;
1148 reload_when_needed[i] = type;
1149 reload_secondary_in_reload[i] = secondary_in_reload;
1150 reload_secondary_out_reload[i] = secondary_out_reload;
1151 reload_secondary_in_icode[i] = secondary_in_icode;
1152 reload_secondary_out_icode[i] = secondary_out_icode;
1153 reload_secondary_p[i] = 0;
1157 #ifdef SECONDARY_MEMORY_NEEDED
1158 /* If a memory location is needed for the copy, make one. */
1159 if (in != 0 && GET_CODE (in) == REG
1160 && REGNO (in) < FIRST_PSEUDO_REGISTER
1161 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1163 get_secondary_mem (in, inmode, opnum, type);
1165 if (out != 0 && GET_CODE (out) == REG
1166 && REGNO (out) < FIRST_PSEUDO_REGISTER
1167 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1169 get_secondary_mem (out, outmode, opnum, type);
1174 /* We are reusing an existing reload,
1175 but we may have additional information for it.
1176 For example, we may now have both IN and OUT
1177 while the old one may have just one of them. */
1179 if (inmode != VOIDmode)
1180 reload_inmode[i] = inmode;
1181 if (outmode != VOIDmode)
1182 reload_outmode[i] = outmode;
1186 reload_out[i] = out;
1187 if (reg_class_subset_p (class, reload_reg_class[i]))
1188 reload_reg_class[i] = class;
1189 reload_optional[i] &= optional;
1190 if (MERGE_TO_OTHER (type, reload_when_needed[i],
1191 opnum, reload_opnum[i]))
1192 reload_when_needed[i] = RELOAD_OTHER;
1193 reload_opnum[i] = MIN (reload_opnum[i], opnum);
1196 /* If the ostensible rtx being reload differs from the rtx found
1197 in the location to substitute, this reload is not safe to combine
1198 because we cannot reliably tell whether it appears in the insn. */
1200 if (in != 0 && in != *inloc)
1201 reload_nocombine[i] = 1;
1204 /* This was replaced by changes in find_reloads_address_1 and the new
1205 function inc_for_reload, which go with a new meaning of reload_inc. */
1207 /* If this is an IN/OUT reload in an insn that sets the CC,
1208 it must be for an autoincrement. It doesn't work to store
1209 the incremented value after the insn because that would clobber the CC.
1210 So we must do the increment of the value reloaded from,
1211 increment it, store it back, then decrement again. */
1212 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1216 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1217 /* If we did not find a nonzero amount-to-increment-by,
1218 that contradicts the belief that IN is being incremented
1219 in an address in this insn. */
1220 if (reload_inc[i] == 0)
1225 /* If we will replace IN and OUT with the reload-reg,
1226 record where they are located so that substitution need
1227 not do a tree walk. */
1229 if (replace_reloads)
1233 register struct replacement *r = &replacements[n_replacements++];
1235 r->subreg_loc = in_subreg_loc;
1239 if (outloc != 0 && outloc != inloc)
1241 register struct replacement *r = &replacements[n_replacements++];
1244 r->subreg_loc = out_subreg_loc;
1249 /* If this reload is just being introduced and it has both
1250 an incoming quantity and an outgoing quantity that are
1251 supposed to be made to match, see if either one of the two
1252 can serve as the place to reload into.
1254 If one of them is acceptable, set reload_reg_rtx[i]
1257 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1259 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1261 reload_reg_class[i], i);
1263 /* If the outgoing register already contains the same value
1264 as the incoming one, we can dispense with loading it.
1265 The easiest way to tell the caller that is to give a phony
1266 value for the incoming operand (same as outgoing one). */
1267 if (reload_reg_rtx[i] == out
1268 && (GET_CODE (in) == REG || CONSTANT_P (in))
1269 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1270 static_reload_reg_p, i, inmode))
1274 /* If this is an input reload and the operand contains a register that
1275 dies in this insn and is used nowhere else, see if it is the right class
1276 to be used for this reload. Use it if so. (This occurs most commonly
1277 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1278 this if it is also an output reload that mentions the register unless
1279 the output is a SUBREG that clobbers an entire register.
1281 Note that the operand might be one of the spill regs, if it is a
1282 pseudo reg and we are in a block where spilling has not taken place.
1283 But if there is no spilling in this block, that is OK.
1284 An explicitly used hard reg cannot be a spill reg. */
1286 if (reload_reg_rtx[i] == 0 && in != 0)
1291 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1292 if (REG_NOTE_KIND (note) == REG_DEAD
1293 && GET_CODE (XEXP (note, 0)) == REG
1294 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1295 && reg_mentioned_p (XEXP (note, 0), in)
1296 && ! refers_to_regno_for_reload_p (regno,
1298 + HARD_REGNO_NREGS (regno,
1300 PATTERN (this_insn), inloc)
1301 /* If this is also an output reload, IN cannot be used as
1302 the reload register if it is set in this insn unless IN
1304 && (out == 0 || in == out
1305 || ! hard_reg_set_here_p (regno,
1307 + HARD_REGNO_NREGS (regno,
1309 PATTERN (this_insn)))
1310 /* ??? Why is this code so different from the previous?
1311 Is there any simple coherent way to describe the two together?
1312 What's going on here. */
1314 || (GET_CODE (in) == SUBREG
1315 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1317 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1318 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1319 /* Make sure the operand fits in the reg that dies. */
1320 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1321 && HARD_REGNO_MODE_OK (regno, inmode)
1322 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1323 && HARD_REGNO_MODE_OK (regno, outmode)
1324 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1325 && !fixed_regs[regno])
1327 reload_reg_rtx[i] = gen_rtx (REG, inmode, regno);
1333 output_reloadnum = i;
1338 /* Record an additional place we must replace a value
1339 for which we have already recorded a reload.
1340 RELOADNUM is the value returned by push_reload
1341 when the reload was recorded.
1342 This is used in insn patterns that use match_dup. */
1345 push_replacement (loc, reloadnum, mode)
1348 enum machine_mode mode;
1350 if (replace_reloads)
1352 register struct replacement *r = &replacements[n_replacements++];
1353 r->what = reloadnum;
1360 /* Transfer all replacements that used to be in reload FROM to be in
1364 transfer_replacements (to, from)
1369 for (i = 0; i < n_replacements; i++)
1370 if (replacements[i].what == from)
1371 replacements[i].what = to;
1374 /* If there is only one output reload, and it is not for an earlyclobber
1375 operand, try to combine it with a (logically unrelated) input reload
1376 to reduce the number of reload registers needed.
1378 This is safe if the input reload does not appear in
1379 the value being output-reloaded, because this implies
1380 it is not needed any more once the original insn completes.
1382 If that doesn't work, see we can use any of the registers that
1383 die in this insn as a reload register. We can if it is of the right
1384 class and does not appear in the value being output-reloaded. */
1390 int output_reload = -1;
1391 int secondary_out = -1;
1394 /* Find the output reload; return unless there is exactly one
1395 and that one is mandatory. */
1397 for (i = 0; i < n_reloads; i++)
1398 if (reload_out[i] != 0)
1400 if (output_reload >= 0)
1405 if (output_reload < 0 || reload_optional[output_reload])
1408 /* An input-output reload isn't combinable. */
1410 if (reload_in[output_reload] != 0)
1413 /* If this reload is for an earlyclobber operand, we can't do anything. */
1414 if (earlyclobber_operand_p (reload_out[output_reload]))
1417 /* Check each input reload; can we combine it? */
1419 for (i = 0; i < n_reloads; i++)
1420 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1421 /* Life span of this reload must not extend past main insn. */
1422 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
1423 && reload_when_needed[i] != RELOAD_OTHER
1424 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
1425 == CLASS_MAX_NREGS (reload_reg_class[output_reload],
1426 reload_outmode[output_reload]))
1427 && reload_inc[i] == 0
1428 && reload_reg_rtx[i] == 0
1429 #ifdef SECONDARY_MEMORY_NEEDED
1430 /* Don't combine two reloads with different secondary
1431 memory locations. */
1432 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
1433 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
1434 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
1435 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
1437 #ifdef SMALL_REGISTER_CLASSES
1438 && reload_reg_class[i] == reload_reg_class[output_reload]
1440 && (reg_class_subset_p (reload_reg_class[i],
1441 reload_reg_class[output_reload])
1442 || reg_class_subset_p (reload_reg_class[output_reload],
1443 reload_reg_class[i]))
1445 && (MATCHES (reload_in[i], reload_out[output_reload])
1446 /* Args reversed because the first arg seems to be
1447 the one that we imagine being modified
1448 while the second is the one that might be affected. */
1449 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1451 /* However, if the input is a register that appears inside
1452 the output, then we also can't share.
1453 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1454 If the same reload reg is used for both reg 69 and the
1455 result to be stored in memory, then that result
1456 will clobber the address of the memory ref. */
1457 && ! (GET_CODE (reload_in[i]) == REG
1458 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1459 reload_out[output_reload]))))
1460 && (reg_class_size[(int) reload_reg_class[i]]
1461 #ifdef SMALL_REGISTER_CLASSES
1465 /* We will allow making things slightly worse by combining an
1466 input and an output, but no worse than that. */
1467 && (reload_when_needed[i] == RELOAD_FOR_INPUT
1468 || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
1472 /* We have found a reload to combine with! */
1473 reload_out[i] = reload_out[output_reload];
1474 reload_outmode[i] = reload_outmode[output_reload];
1475 /* Mark the old output reload as inoperative. */
1476 reload_out[output_reload] = 0;
1477 /* The combined reload is needed for the entire insn. */
1478 reload_when_needed[i] = RELOAD_OTHER;
1479 /* If the output reload had a secondary reload, copy it. */
1480 if (reload_secondary_out_reload[output_reload] != -1)
1482 reload_secondary_out_reload[i]
1483 = reload_secondary_out_reload[output_reload];
1484 reload_secondary_out_icode[i]
1485 = reload_secondary_out_icode[output_reload];
1488 #ifdef SECONDARY_MEMORY_NEEDED
1489 /* Copy any secondary MEM. */
1490 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
1491 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
1492 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
1494 /* If required, minimize the register class. */
1495 if (reg_class_subset_p (reload_reg_class[output_reload],
1496 reload_reg_class[i]))
1497 reload_reg_class[i] = reload_reg_class[output_reload];
1499 /* Transfer all replacements from the old reload to the combined. */
1500 for (j = 0; j < n_replacements; j++)
1501 if (replacements[j].what == output_reload)
1502 replacements[j].what = i;
1507 /* If this insn has only one operand that is modified or written (assumed
1508 to be the first), it must be the one corresponding to this reload. It
1509 is safe to use anything that dies in this insn for that output provided
1510 that it does not occur in the output (we already know it isn't an
1511 earlyclobber. If this is an asm insn, give up. */
1513 if (INSN_CODE (this_insn) == -1)
1516 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1517 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1518 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1521 /* See if some hard register that dies in this insn and is not used in
1522 the output is the right class. Only works if the register we pick
1523 up can fully hold our output reload. */
1524 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1525 if (REG_NOTE_KIND (note) == REG_DEAD
1526 && GET_CODE (XEXP (note, 0)) == REG
1527 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1528 reload_out[output_reload])
1529 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1530 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1531 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1532 REGNO (XEXP (note, 0)))
1533 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1534 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1535 /* Ensure that a secondary or tertiary reload for this output
1536 won't want this register. */
1537 && ((secondary_out = reload_secondary_out_reload[output_reload]) == -1
1538 || (! (TEST_HARD_REG_BIT
1539 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1540 REGNO (XEXP (note, 0))))
1541 && ((secondary_out = reload_secondary_out_reload[secondary_out]) == -1
1542 || ! (TEST_HARD_REG_BIT
1543 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1544 REGNO (XEXP (note, 0)))))))
1545 && ! fixed_regs[REGNO (XEXP (note, 0))])
1547 reload_reg_rtx[output_reload] = gen_rtx (REG,
1548 reload_outmode[output_reload],
1549 REGNO (XEXP (note, 0)));
1554 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1555 See if one of IN and OUT is a register that may be used;
1556 this is desirable since a spill-register won't be needed.
1557 If so, return the register rtx that proves acceptable.
1559 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1560 CLASS is the register class required for the reload.
1562 If FOR_REAL is >= 0, it is the number of the reload,
1563 and in some cases when it can be discovered that OUT doesn't need
1564 to be computed, clear out reload_out[FOR_REAL].
1566 If FOR_REAL is -1, this should not be done, because this call
1567 is just to see if a register can be found, not to find and install it. */
1570 find_dummy_reload (real_in, real_out, inloc, outloc,
1571 inmode, outmode, class, for_real)
1572 rtx real_in, real_out;
1573 rtx *inloc, *outloc;
1574 enum machine_mode inmode, outmode;
1575 enum reg_class class;
1584 /* If operands exceed a word, we can't use either of them
1585 unless they have the same size. */
1586 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1587 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1588 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1591 /* Find the inside of any subregs. */
1592 while (GET_CODE (out) == SUBREG)
1594 out_offset = SUBREG_WORD (out);
1595 out = SUBREG_REG (out);
1597 while (GET_CODE (in) == SUBREG)
1599 in_offset = SUBREG_WORD (in);
1600 in = SUBREG_REG (in);
1603 /* Narrow down the reg class, the same way push_reload will;
1604 otherwise we might find a dummy now, but push_reload won't. */
1605 class = PREFERRED_RELOAD_CLASS (in, class);
1607 /* See if OUT will do. */
1608 if (GET_CODE (out) == REG
1609 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1611 register int regno = REGNO (out) + out_offset;
1612 int nwords = HARD_REGNO_NREGS (regno, outmode);
1615 /* When we consider whether the insn uses OUT,
1616 ignore references within IN. They don't prevent us
1617 from copying IN into OUT, because those refs would
1618 move into the insn that reloads IN.
1620 However, we only ignore IN in its role as this reload.
1621 If the insn uses IN elsewhere and it contains OUT,
1622 that counts. We can't be sure it's the "same" operand
1623 so it might not go through this reload. */
1625 *inloc = const0_rtx;
1627 if (regno < FIRST_PSEUDO_REGISTER
1628 /* A fixed reg that can overlap other regs better not be used
1629 for reloading in any way. */
1630 #ifdef OVERLAPPING_REGNO_P
1631 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1633 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1634 PATTERN (this_insn), outloc))
1637 for (i = 0; i < nwords; i++)
1638 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1644 if (GET_CODE (real_out) == REG)
1647 value = gen_rtx (REG, outmode, regno);
1654 /* Consider using IN if OUT was not acceptable
1655 or if OUT dies in this insn (like the quotient in a divmod insn).
1656 We can't use IN unless it is dies in this insn,
1657 which means we must know accurately which hard regs are live.
1658 Also, the result can't go in IN if IN is used within OUT. */
1659 if (hard_regs_live_known
1660 && GET_CODE (in) == REG
1661 && REGNO (in) < FIRST_PSEUDO_REGISTER
1663 || find_reg_note (this_insn, REG_UNUSED, real_out))
1664 && find_reg_note (this_insn, REG_DEAD, real_in)
1665 && !fixed_regs[REGNO (in)]
1666 && HARD_REGNO_MODE_OK (REGNO (in),
1667 /* The only case where out and real_out might
1668 have different modes is where real_out
1669 is a subreg, and in that case, out
1671 (GET_MODE (out) != VOIDmode
1672 ? GET_MODE (out) : outmode)))
1674 register int regno = REGNO (in) + in_offset;
1675 int nwords = HARD_REGNO_NREGS (regno, inmode);
1677 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1678 && ! hard_reg_set_here_p (regno, regno + nwords,
1679 PATTERN (this_insn)))
1682 for (i = 0; i < nwords; i++)
1683 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1689 /* If we were going to use OUT as the reload reg
1690 and changed our mind, it means OUT is a dummy that
1691 dies here. So don't bother copying value to it. */
1692 if (for_real >= 0 && value == real_out)
1693 reload_out[for_real] = 0;
1694 if (GET_CODE (real_in) == REG)
1697 value = gen_rtx (REG, inmode, regno);
1705 /* This page contains subroutines used mainly for determining
1706 whether the IN or an OUT of a reload can serve as the
1709 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1712 earlyclobber_operand_p (x)
1717 for (i = 0; i < n_earlyclobbers; i++)
1718 if (reload_earlyclobbers[i] == x)
1724 /* Return 1 if expression X alters a hard reg in the range
1725 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1726 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1727 X should be the body of an instruction. */
1730 hard_reg_set_here_p (beg_regno, end_regno, x)
1731 register int beg_regno, end_regno;
1734 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1736 register rtx op0 = SET_DEST (x);
1737 while (GET_CODE (op0) == SUBREG)
1738 op0 = SUBREG_REG (op0);
1739 if (GET_CODE (op0) == REG)
1741 register int r = REGNO (op0);
1742 /* See if this reg overlaps range under consideration. */
1744 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1748 else if (GET_CODE (x) == PARALLEL)
1750 register int i = XVECLEN (x, 0) - 1;
1752 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1759 /* Return 1 if ADDR is a valid memory address for mode MODE,
1760 and check that each pseudo reg has the proper kind of
1764 strict_memory_address_p (mode, addr)
1765 enum machine_mode mode;
1768 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
1775 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1776 if they are the same hard reg, and has special hacks for
1777 autoincrement and autodecrement.
1778 This is specifically intended for find_reloads to use
1779 in determining whether two operands match.
1780 X is the operand whose number is the lower of the two.
1782 The value is 2 if Y contains a pre-increment that matches
1783 a non-incrementing address in X. */
1785 /* ??? To be completely correct, we should arrange to pass
1786 for X the output operand and for Y the input operand.
1787 For now, we assume that the output operand has the lower number
1788 because that is natural in (SET output (... input ...)). */
1791 operands_match_p (x, y)
1795 register RTX_CODE code = GET_CODE (x);
1801 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
1802 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
1803 && GET_CODE (SUBREG_REG (y)) == REG)))
1809 i = REGNO (SUBREG_REG (x));
1810 if (i >= FIRST_PSEUDO_REGISTER)
1812 i += SUBREG_WORD (x);
1817 if (GET_CODE (y) == SUBREG)
1819 j = REGNO (SUBREG_REG (y));
1820 if (j >= FIRST_PSEUDO_REGISTER)
1822 j += SUBREG_WORD (y);
1827 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1828 multiple hard register group, so that for example (reg:DI 0) and
1829 (reg:SI 1) will be considered the same register. */
1830 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
1831 && i < FIRST_PSEUDO_REGISTER)
1832 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
1833 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
1834 && j < FIRST_PSEUDO_REGISTER)
1835 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
1839 /* If two operands must match, because they are really a single
1840 operand of an assembler insn, then two postincrements are invalid
1841 because the assembler insn would increment only once.
1842 On the other hand, an postincrement matches ordinary indexing
1843 if the postincrement is the output operand. */
1844 if (code == POST_DEC || code == POST_INC)
1845 return operands_match_p (XEXP (x, 0), y);
1846 /* Two preincrements are invalid
1847 because the assembler insn would increment only once.
1848 On the other hand, an preincrement matches ordinary indexing
1849 if the preincrement is the input operand.
1850 In this case, return 2, since some callers need to do special
1851 things when this happens. */
1852 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
1853 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
1857 /* Now we have disposed of all the cases
1858 in which different rtx codes can match. */
1859 if (code != GET_CODE (y))
1861 if (code == LABEL_REF)
1862 return XEXP (x, 0) == XEXP (y, 0);
1863 if (code == SYMBOL_REF)
1864 return XSTR (x, 0) == XSTR (y, 0);
1866 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1868 if (GET_MODE (x) != GET_MODE (y))
1871 /* Compare the elements. If any pair of corresponding elements
1872 fail to match, return 0 for the whole things. */
1875 fmt = GET_RTX_FORMAT (code);
1876 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1882 if (XWINT (x, i) != XWINT (y, i))
1887 if (XINT (x, i) != XINT (y, i))
1892 val = operands_match_p (XEXP (x, i), XEXP (y, i));
1895 /* If any subexpression returns 2,
1896 we should return 2 if we are successful. */
1904 /* It is believed that rtx's at this level will never
1905 contain anything but integers and other rtx's,
1906 except for within LABEL_REFs and SYMBOL_REFs. */
1911 return 1 + success_2;
1914 /* Return the number of times character C occurs in string S. */
1917 n_occurrences (c, s)
1927 /* Describe the range of registers or memory referenced by X.
1928 If X is a register, set REG_FLAG and put the first register
1929 number into START and the last plus one into END.
1930 If X is a memory reference, put a base address into BASE
1931 and a range of integer offsets into START and END.
1932 If X is pushing on the stack, we can assume it causes no trouble,
1933 so we set the SAFE field. */
1935 static struct decomposition
1939 struct decomposition val;
1944 if (GET_CODE (x) == MEM)
1946 rtx base, offset = 0;
1947 rtx addr = XEXP (x, 0);
1949 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
1950 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
1952 val.base = XEXP (addr, 0);
1953 val.start = - GET_MODE_SIZE (GET_MODE (x));
1954 val.end = GET_MODE_SIZE (GET_MODE (x));
1955 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
1959 if (GET_CODE (addr) == CONST)
1961 addr = XEXP (addr, 0);
1964 if (GET_CODE (addr) == PLUS)
1966 if (CONSTANT_P (XEXP (addr, 0)))
1968 base = XEXP (addr, 1);
1969 offset = XEXP (addr, 0);
1971 else if (CONSTANT_P (XEXP (addr, 1)))
1973 base = XEXP (addr, 0);
1974 offset = XEXP (addr, 1);
1981 offset = const0_rtx;
1983 if (GET_CODE (offset) == CONST)
1984 offset = XEXP (offset, 0);
1985 if (GET_CODE (offset) == PLUS)
1987 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
1989 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 1));
1990 offset = XEXP (offset, 0);
1992 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
1994 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 0));
1995 offset = XEXP (offset, 1);
1999 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
2000 offset = const0_rtx;
2003 else if (GET_CODE (offset) != CONST_INT)
2005 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
2006 offset = const0_rtx;
2009 if (all_const && GET_CODE (base) == PLUS)
2010 base = gen_rtx (CONST, GET_MODE (base), base);
2012 if (GET_CODE (offset) != CONST_INT)
2015 val.start = INTVAL (offset);
2016 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2020 else if (GET_CODE (x) == REG)
2023 val.start = true_regnum (x);
2026 /* A pseudo with no hard reg. */
2027 val.start = REGNO (x);
2028 val.end = val.start + 1;
2032 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2034 else if (GET_CODE (x) == SUBREG)
2036 if (GET_CODE (SUBREG_REG (x)) != REG)
2037 /* This could be more precise, but it's good enough. */
2038 return decompose (SUBREG_REG (x));
2040 val.start = true_regnum (x);
2042 return decompose (SUBREG_REG (x));
2045 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2047 else if (CONSTANT_P (x)
2048 /* This hasn't been assigned yet, so it can't conflict yet. */
2049 || GET_CODE (x) == SCRATCH)
2056 /* Return 1 if altering Y will not modify the value of X.
2057 Y is also described by YDATA, which should be decompose (Y). */
2060 immune_p (x, y, ydata)
2062 struct decomposition ydata;
2064 struct decomposition xdata;
2067 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2071 if (GET_CODE (y) != MEM)
2073 /* If Y is memory and X is not, Y can't affect X. */
2074 if (GET_CODE (x) != MEM)
2077 xdata = decompose (x);
2079 if (! rtx_equal_p (xdata.base, ydata.base))
2081 /* If bases are distinct symbolic constants, there is no overlap. */
2082 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2084 /* Constants and stack slots never overlap. */
2085 if (CONSTANT_P (xdata.base)
2086 && (ydata.base == frame_pointer_rtx
2087 || ydata.base == hard_frame_pointer_rtx
2088 || ydata.base == stack_pointer_rtx))
2090 if (CONSTANT_P (ydata.base)
2091 && (xdata.base == frame_pointer_rtx
2092 || xdata.base == hard_frame_pointer_rtx
2093 || xdata.base == stack_pointer_rtx))
2095 /* If either base is variable, we don't know anything. */
2100 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2103 /* Similar, but calls decompose. */
2106 safe_from_earlyclobber (op, clobber)
2109 struct decomposition early_data;
2111 early_data = decompose (clobber);
2112 return immune_p (op, clobber, early_data);
2115 /* Main entry point of this file: search the body of INSN
2116 for values that need reloading and record them with push_reload.
2117 REPLACE nonzero means record also where the values occur
2118 so that subst_reloads can be used.
2120 IND_LEVELS says how many levels of indirection are supported by this
2121 machine; a value of zero means that a memory reference is not a valid
2124 LIVE_KNOWN says we have valid information about which hard
2125 regs are live at each point in the program; this is true when
2126 we are called from global_alloc but false when stupid register
2127 allocation has been done.
2129 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2130 which is nonnegative if the reg has been commandeered for reloading into.
2131 It is copied into STATIC_RELOAD_REG_P and referenced from there
2132 by various subroutines. */
2135 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2137 int replace, ind_levels;
2139 short *reload_reg_p;
2141 #ifdef REGISTER_CONSTRAINTS
2143 register int insn_code_number;
2146 /* These are the constraints for the insn. We don't change them. */
2147 char *constraints1[MAX_RECOG_OPERANDS];
2148 /* These start out as the constraints for the insn
2149 and they are chewed up as we consider alternatives. */
2150 char *constraints[MAX_RECOG_OPERANDS];
2151 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2153 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2154 char pref_or_nothing[MAX_RECOG_OPERANDS];
2155 /* Nonzero for a MEM operand whose entire address needs a reload. */
2156 int address_reloaded[MAX_RECOG_OPERANDS];
2157 /* Value of enum reload_type to use for operand. */
2158 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2159 /* Value of enum reload_type to use within address of operand. */
2160 enum reload_type address_type[MAX_RECOG_OPERANDS];
2161 /* Save the usage of each operand. */
2162 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2163 int no_input_reloads = 0, no_output_reloads = 0;
2165 int this_alternative[MAX_RECOG_OPERANDS];
2166 char this_alternative_win[MAX_RECOG_OPERANDS];
2167 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2168 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2169 int this_alternative_matches[MAX_RECOG_OPERANDS];
2171 int goal_alternative[MAX_RECOG_OPERANDS];
2172 int this_alternative_number;
2173 int goal_alternative_number;
2174 int operand_reloadnum[MAX_RECOG_OPERANDS];
2175 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2176 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2177 char goal_alternative_win[MAX_RECOG_OPERANDS];
2178 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2179 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2180 int goal_alternative_swapped;
2183 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2184 rtx substed_operand[MAX_RECOG_OPERANDS];
2185 rtx body = PATTERN (insn);
2186 rtx set = single_set (insn);
2187 int goal_earlyclobber, this_earlyclobber;
2188 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2191 this_insn_is_asm = 0; /* Tentative. */
2195 n_earlyclobbers = 0;
2196 replace_reloads = replace;
2197 hard_regs_live_known = live_known;
2198 static_reload_reg_p = reload_reg_p;
2200 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2201 neither are insns that SET cc0. Insns that use CC0 are not allowed
2202 to have any input reloads. */
2203 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2204 no_output_reloads = 1;
2207 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2208 no_input_reloads = 1;
2209 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2210 no_output_reloads = 1;
2213 #ifdef SECONDARY_MEMORY_NEEDED
2214 /* The eliminated forms of any secondary memory locations are per-insn, so
2215 clear them out here. */
2217 bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2220 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2221 Make OPERANDS point to a vector of operand values.
2222 Make OPERAND_LOCS point to a vector of pointers to
2223 where the operands were found.
2224 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2225 constraint-strings for this insn.
2226 Return if the insn needs no reload processing. */
2228 switch (GET_CODE (body))
2238 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2239 is cheap to move between them. If it is not, there may not be an insn
2240 to do the copy, so we may need a reload. */
2241 if (GET_CODE (SET_DEST (body)) == REG
2242 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2243 && GET_CODE (SET_SRC (body)) == REG
2244 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2245 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2246 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2250 reload_n_operands = noperands = asm_noperands (body);
2253 /* This insn is an `asm' with operands. */
2255 insn_code_number = -1;
2256 this_insn_is_asm = 1;
2258 /* expand_asm_operands makes sure there aren't too many operands. */
2259 if (noperands > MAX_RECOG_OPERANDS)
2262 /* Now get the operand values and constraints out of the insn. */
2264 decode_asm_operands (body, recog_operand, recog_operand_loc,
2265 constraints, operand_mode);
2268 bcopy ((char *) constraints, (char *) constraints1,
2269 noperands * sizeof (char *));
2270 n_alternatives = n_occurrences (',', constraints[0]) + 1;
2271 for (i = 1; i < noperands; i++)
2272 if (n_alternatives != n_occurrences (',', constraints[i]) + 1)
2274 error_for_asm (insn, "operand constraints differ in number of alternatives");
2275 /* Avoid further trouble with this insn. */
2276 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
2285 /* Ordinary insn: recognize it, get the operands via insn_extract
2286 and get the constraints. */
2288 insn_code_number = recog_memoized (insn);
2289 if (insn_code_number < 0)
2290 fatal_insn_not_found (insn);
2292 reload_n_operands = noperands = insn_n_operands[insn_code_number];
2293 n_alternatives = insn_n_alternatives[insn_code_number];
2294 /* Just return "no reloads" if insn has no operands with constraints. */
2295 if (n_alternatives == 0)
2297 insn_extract (insn);
2298 for (i = 0; i < noperands; i++)
2300 constraints[i] = constraints1[i]
2301 = insn_operand_constraint[insn_code_number][i];
2302 operand_mode[i] = insn_operand_mode[insn_code_number][i];
2311 /* If we will need to know, later, whether some pair of operands
2312 are the same, we must compare them now and save the result.
2313 Reloading the base and index registers will clobber them
2314 and afterward they will fail to match. */
2316 for (i = 0; i < noperands; i++)
2321 substed_operand[i] = recog_operand[i];
2324 modified[i] = RELOAD_READ;
2326 /* Scan this operand's constraint to see if it is an output operand,
2327 an in-out operand, is commutative, or should match another. */
2332 modified[i] = RELOAD_WRITE;
2334 modified[i] = RELOAD_READ_WRITE;
2337 /* The last operand should not be marked commutative. */
2338 if (i == noperands - 1)
2340 if (this_insn_is_asm)
2341 warning_for_asm (this_insn,
2342 "`%%' constraint used with last operand");
2349 else if (c >= '0' && c <= '9')
2352 operands_match[c][i]
2353 = operands_match_p (recog_operand[c], recog_operand[i]);
2355 /* An operand may not match itself. */
2358 if (this_insn_is_asm)
2359 warning_for_asm (this_insn,
2360 "operand %d has constraint %d", i, c);
2365 /* If C can be commuted with C+1, and C might need to match I,
2366 then C+1 might also need to match I. */
2367 if (commutative >= 0)
2369 if (c == commutative || c == commutative + 1)
2371 int other = c + (c == commutative ? 1 : -1);
2372 operands_match[other][i]
2373 = operands_match_p (recog_operand[other], recog_operand[i]);
2375 if (i == commutative || i == commutative + 1)
2377 int other = i + (i == commutative ? 1 : -1);
2378 operands_match[c][other]
2379 = operands_match_p (recog_operand[c], recog_operand[other]);
2381 /* Note that C is supposed to be less than I.
2382 No need to consider altering both C and I because in
2383 that case we would alter one into the other. */
2389 /* Examine each operand that is a memory reference or memory address
2390 and reload parts of the addresses into index registers.
2391 Also here any references to pseudo regs that didn't get hard regs
2392 but are equivalent to constants get replaced in the insn itself
2393 with those constants. Nobody will ever see them again.
2395 Finally, set up the preferred classes of each operand. */
2397 for (i = 0; i < noperands; i++)
2399 register RTX_CODE code = GET_CODE (recog_operand[i]);
2401 address_reloaded[i] = 0;
2402 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2403 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2406 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2407 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2410 if (*constraints[i] == 0)
2411 /* Ignore things like match_operator operands. */
2413 else if (constraints[i][0] == 'p')
2415 find_reloads_address (VOIDmode, NULL_PTR,
2416 recog_operand[i], recog_operand_loc[i],
2417 i, operand_type[i], ind_levels);
2418 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2420 else if (code == MEM)
2422 if (find_reloads_address (GET_MODE (recog_operand[i]),
2423 recog_operand_loc[i],
2424 XEXP (recog_operand[i], 0),
2425 &XEXP (recog_operand[i], 0),
2426 i, address_type[i], ind_levels))
2427 address_reloaded[i] = 1;
2428 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2430 else if (code == SUBREG)
2431 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2432 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2435 && &SET_DEST (set) == recog_operand_loc[i]);
2436 else if (code == PLUS)
2437 /* We can get a PLUS as an "operand" as a result of
2438 register elimination. See eliminate_regs and gen_reload. */
2439 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2440 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2442 else if (code == REG)
2444 /* This is equivalent to calling find_reloads_toplev.
2445 The code is duplicated for speed.
2446 When we find a pseudo always equivalent to a constant,
2447 we replace it by the constant. We must be sure, however,
2448 that we don't try to replace it in the insn in which it
2450 register int regno = REGNO (recog_operand[i]);
2451 if (reg_equiv_constant[regno] != 0
2452 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2453 substed_operand[i] = recog_operand[i]
2454 = reg_equiv_constant[regno];
2455 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2456 that feeds this insn. */
2457 if (reg_equiv_mem[regno] != 0)
2458 substed_operand[i] = recog_operand[i]
2459 = reg_equiv_mem[regno];
2461 if (reg_equiv_address[regno] != 0)
2463 /* If reg_equiv_address is not a constant address, copy it,
2464 since it may be shared. */
2465 rtx address = reg_equiv_address[regno];
2467 if (rtx_varies_p (address))
2468 address = copy_rtx (address);
2470 /* If this is an output operand, we must output a CLOBBER
2471 after INSN so find_equiv_reg knows REGNO is being written.
2472 Mark this insn specially, do we can put our output reloads
2475 if (modified[i] != RELOAD_READ)
2476 PUT_MODE (emit_insn_after (gen_rtx (CLOBBER, VOIDmode,
2481 *recog_operand_loc[i] = recog_operand[i]
2482 = gen_rtx (MEM, GET_MODE (recog_operand[i]), address);
2483 RTX_UNCHANGING_P (recog_operand[i])
2484 = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
2485 find_reloads_address (GET_MODE (recog_operand[i]),
2486 recog_operand_loc[i],
2487 XEXP (recog_operand[i], 0),
2488 &XEXP (recog_operand[i], 0),
2489 i, address_type[i], ind_levels);
2490 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2493 /* If the operand is still a register (we didn't replace it with an
2494 equivalent), get the preferred class to reload it into. */
2495 code = GET_CODE (recog_operand[i]);
2497 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
2498 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2500 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
2501 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2504 /* If this is simply a copy from operand 1 to operand 0, merge the
2505 preferred classes for the operands. */
2506 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2507 && recog_operand[1] == SET_SRC (set))
2509 preferred_class[0] = preferred_class[1]
2510 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2511 pref_or_nothing[0] |= pref_or_nothing[1];
2512 pref_or_nothing[1] |= pref_or_nothing[0];
2515 /* Now see what we need for pseudo-regs that didn't get hard regs
2516 or got the wrong kind of hard reg. For this, we must consider
2517 all the operands together against the register constraints. */
2519 best = MAX_RECOG_OPERANDS + 300;
2522 goal_alternative_swapped = 0;
2525 /* The constraints are made of several alternatives.
2526 Each operand's constraint looks like foo,bar,... with commas
2527 separating the alternatives. The first alternatives for all
2528 operands go together, the second alternatives go together, etc.
2530 First loop over alternatives. */
2532 for (this_alternative_number = 0;
2533 this_alternative_number < n_alternatives;
2534 this_alternative_number++)
2536 /* Loop over operands for one constraint alternative. */
2537 /* LOSERS counts those that don't fit this alternative
2538 and would require loading. */
2540 /* BAD is set to 1 if it some operand can't fit this alternative
2541 even after reloading. */
2543 /* REJECT is a count of how undesirable this alternative says it is
2544 if any reloading is required. If the alternative matches exactly
2545 then REJECT is ignored, but otherwise it gets this much
2546 counted against it in addition to the reloading needed. Each
2547 ? counts three times here since we want the disparaging caused by
2548 a bad register class to only count 1/3 as much. */
2551 this_earlyclobber = 0;
2553 for (i = 0; i < noperands; i++)
2555 register char *p = constraints[i];
2556 register int win = 0;
2557 /* 0 => this operand can be reloaded somehow for this alternative */
2559 /* 0 => this operand can be reloaded if the alternative allows regs. */
2562 register rtx operand = recog_operand[i];
2564 /* Nonzero means this is a MEM that must be reloaded into a reg
2565 regardless of what the constraint says. */
2566 int force_reload = 0;
2568 /* Nonzero if a constant forced into memory would be OK for this
2571 int earlyclobber = 0;
2573 /* If the operand is a SUBREG, extract
2574 the REG or MEM (or maybe even a constant) within.
2575 (Constants can occur as a result of reg_equiv_constant.) */
2577 while (GET_CODE (operand) == SUBREG)
2579 offset += SUBREG_WORD (operand);
2580 operand = SUBREG_REG (operand);
2581 /* Force reload if this is a constant or PLUS or if there may may
2582 be a problem accessing OPERAND in the outer mode. */
2583 if (CONSTANT_P (operand)
2584 || GET_CODE (operand) == PLUS
2585 /* We must force a reload of paradoxical SUBREGs
2586 of a MEM because the alignment of the inner value
2587 may not be enough to do the outer reference. On
2588 big-endian machines, it may also reference outside
2591 On machines that extend byte operations and we have a
2592 SUBREG where both the inner and outer modes are no wider
2593 than a word and the inner mode is narrower, is integral,
2594 and gets extended when loaded from memory, combine.c has
2595 made assumptions about the behavior of the machine in such
2596 register access. If the data is, in fact, in memory we
2597 must always load using the size assumed to be in the
2598 register and let the insn do the different-sized
2600 || ((GET_CODE (operand) == MEM
2601 || (GET_CODE (operand)== REG
2602 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2603 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2604 < BIGGEST_ALIGNMENT)
2605 && (GET_MODE_SIZE (operand_mode[i])
2606 > GET_MODE_SIZE (GET_MODE (operand))))
2607 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2608 #ifdef LOAD_EXTEND_OP
2609 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2610 && (GET_MODE_SIZE (GET_MODE (operand))
2612 && (GET_MODE_SIZE (operand_mode[i])
2613 > GET_MODE_SIZE (GET_MODE (operand)))
2614 && INTEGRAL_MODE_P (GET_MODE (operand))
2615 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2618 /* Subreg of a hard reg which can't handle the subreg's mode
2619 or which would handle that mode in the wrong number of
2620 registers for subregging to work. */
2621 || (GET_CODE (operand) == REG
2622 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2623 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2624 && (GET_MODE_SIZE (GET_MODE (operand))
2626 && ((GET_MODE_SIZE (GET_MODE (operand))
2628 != HARD_REGNO_NREGS (REGNO (operand),
2629 GET_MODE (operand))))
2630 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2635 this_alternative[i] = (int) NO_REGS;
2636 this_alternative_win[i] = 0;
2637 this_alternative_offmemok[i] = 0;
2638 this_alternative_earlyclobber[i] = 0;
2639 this_alternative_matches[i] = -1;
2641 /* An empty constraint or empty alternative
2642 allows anything which matched the pattern. */
2643 if (*p == 0 || *p == ',')
2646 /* Scan this alternative's specs for this operand;
2647 set WIN if the operand fits any letter in this alternative.
2648 Otherwise, clear BADOP if this operand could
2649 fit some letter after reloads,
2650 or set WINREG if this operand could fit after reloads
2651 provided the constraint allows some registers. */
2653 while (*p && (c = *p++) != ',')
2662 /* The last operand should not be marked commutative. */
2663 if (i != noperands - 1)
2676 /* Ignore rest of this alternative as far as
2677 reloading is concerned. */
2678 while (*p && *p != ',') p++;
2687 this_alternative_matches[i] = c;
2688 /* We are supposed to match a previous operand.
2689 If we do, we win if that one did.
2690 If we do not, count both of the operands as losers.
2691 (This is too conservative, since most of the time
2692 only a single reload insn will be needed to make
2693 the two operands win. As a result, this alternative
2694 may be rejected when it is actually desirable.) */
2695 if ((swapped && (c != commutative || i != commutative + 1))
2696 /* If we are matching as if two operands were swapped,
2697 also pretend that operands_match had been computed
2699 But if I is the second of those and C is the first,
2700 don't exchange them, because operands_match is valid
2701 only on one side of its diagonal. */
2703 [(c == commutative || c == commutative + 1)
2704 ? 2*commutative + 1 - c : c]
2705 [(i == commutative || i == commutative + 1)
2706 ? 2*commutative + 1 - i : i])
2707 : operands_match[c][i])
2708 win = this_alternative_win[c];
2711 /* Operands don't match. */
2713 /* Retroactively mark the operand we had to match
2714 as a loser, if it wasn't already. */
2715 if (this_alternative_win[c])
2717 this_alternative_win[c] = 0;
2718 if (this_alternative[c] == (int) NO_REGS)
2720 /* But count the pair only once in the total badness of
2721 this alternative, if the pair can be a dummy reload. */
2723 = find_dummy_reload (recog_operand[i], recog_operand[c],
2724 recog_operand_loc[i], recog_operand_loc[c],
2725 operand_mode[i], operand_mode[c],
2726 this_alternative[c], -1);
2731 /* This can be fixed with reloads if the operand
2732 we are supposed to match can be fixed with reloads. */
2734 this_alternative[i] = this_alternative[c];
2736 /* If we have to reload this operand and some previous
2737 operand also had to match the same thing as this
2738 operand, we don't know how to do that. So reject this
2740 if (! win || force_reload)
2741 for (j = 0; j < i; j++)
2742 if (this_alternative_matches[j]
2743 == this_alternative_matches[i])
2749 /* All necessary reloads for an address_operand
2750 were handled in find_reloads_address. */
2751 this_alternative[i] = (int) BASE_REG_CLASS;
2758 if (GET_CODE (operand) == MEM
2759 || (GET_CODE (operand) == REG
2760 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2761 && reg_renumber[REGNO (operand)] < 0))
2763 if (CONSTANT_P (operand))
2769 if (GET_CODE (operand) == MEM
2770 && ! address_reloaded[i]
2771 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2772 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2777 if (GET_CODE (operand) == MEM
2778 && ! address_reloaded[i]
2779 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2780 || GET_CODE (XEXP (operand, 0)) == POST_INC))
2784 /* Memory operand whose address is not offsettable. */
2788 if (GET_CODE (operand) == MEM
2789 && ! (ind_levels ? offsettable_memref_p (operand)
2790 : offsettable_nonstrict_memref_p (operand))
2791 /* Certain mem addresses will become offsettable
2792 after they themselves are reloaded. This is important;
2793 we don't want our own handling of unoffsettables
2794 to override the handling of reg_equiv_address. */
2795 && !(GET_CODE (XEXP (operand, 0)) == REG
2797 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
2801 /* Memory operand whose address is offsettable. */
2805 if ((GET_CODE (operand) == MEM
2806 /* If IND_LEVELS, find_reloads_address won't reload a
2807 pseudo that didn't get a hard reg, so we have to
2808 reject that case. */
2809 && (ind_levels ? offsettable_memref_p (operand)
2810 : offsettable_nonstrict_memref_p (operand)))
2811 /* A reloaded auto-increment address is offsettable,
2812 because it is now just a simple register indirect. */
2813 || (GET_CODE (operand) == MEM
2814 && address_reloaded[i]
2815 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2816 || GET_CODE (XEXP (operand, 0)) == PRE_DEC
2817 || GET_CODE (XEXP (operand, 0)) == POST_INC
2818 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2819 /* Certain mem addresses will become offsettable
2820 after they themselves are reloaded. This is important;
2821 we don't want our own handling of unoffsettables
2822 to override the handling of reg_equiv_address. */
2823 || (GET_CODE (operand) == MEM
2824 && GET_CODE (XEXP (operand, 0)) == REG
2826 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))
2827 || (GET_CODE (operand) == REG
2828 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2829 && reg_renumber[REGNO (operand)] < 0
2830 /* If reg_equiv_address is nonzero, we will be
2831 loading it into a register; hence it will be
2832 offsettable, but we cannot say that reg_equiv_mem
2833 is offsettable without checking. */
2834 && ((reg_equiv_mem[REGNO (operand)] != 0
2835 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
2836 || (reg_equiv_address[REGNO (operand)] != 0))))
2838 if (CONSTANT_P (operand) || GET_CODE (operand) == MEM)
2845 /* Output operand that is stored before the need for the
2846 input operands (and their index registers) is over. */
2847 earlyclobber = 1, this_earlyclobber = 1;
2851 /* Match any floating double constant, but only if
2852 we can examine the bits of it reliably. */
2853 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
2854 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
2855 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
2857 if (GET_CODE (operand) == CONST_DOUBLE)
2862 if (GET_CODE (operand) == CONST_DOUBLE)
2868 if (GET_CODE (operand) == CONST_DOUBLE
2869 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
2874 if (GET_CODE (operand) == CONST_INT
2875 || (GET_CODE (operand) == CONST_DOUBLE
2876 && GET_MODE (operand) == VOIDmode))
2879 if (CONSTANT_P (operand)
2880 #ifdef LEGITIMATE_PIC_OPERAND_P
2881 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
2888 if (GET_CODE (operand) == CONST_INT
2889 || (GET_CODE (operand) == CONST_DOUBLE
2890 && GET_MODE (operand) == VOIDmode))
2902 if (GET_CODE (operand) == CONST_INT
2903 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
2913 /* A PLUS is never a valid operand, but reload can make
2914 it from a register when eliminating registers. */
2915 && GET_CODE (operand) != PLUS
2916 /* A SCRATCH is not a valid operand. */
2917 && GET_CODE (operand) != SCRATCH
2918 #ifdef LEGITIMATE_PIC_OPERAND_P
2919 && (! CONSTANT_P (operand)
2921 || LEGITIMATE_PIC_OPERAND_P (operand))
2923 && (GENERAL_REGS == ALL_REGS
2924 || GET_CODE (operand) != REG
2925 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
2926 && reg_renumber[REGNO (operand)] < 0)))
2928 /* Drop through into 'r' case */
2932 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
2935 #ifdef EXTRA_CONSTRAINT
2941 if (EXTRA_CONSTRAINT (operand, c))
2948 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
2951 if (GET_MODE (operand) == BLKmode)
2954 if (GET_CODE (operand) == REG
2955 && reg_fits_class_p (operand, this_alternative[i],
2956 offset, GET_MODE (recog_operand[i])))
2963 /* If this operand could be handled with a reg,
2964 and some reg is allowed, then this operand can be handled. */
2965 if (winreg && this_alternative[i] != (int) NO_REGS)
2968 /* Record which operands fit this alternative. */
2969 this_alternative_earlyclobber[i] = earlyclobber;
2970 if (win && ! force_reload)
2971 this_alternative_win[i] = 1;
2974 int const_to_mem = 0;
2976 this_alternative_offmemok[i] = offmemok;
2980 /* Alternative loses if it has no regs for a reg operand. */
2981 if (GET_CODE (operand) == REG
2982 && this_alternative[i] == (int) NO_REGS
2983 && this_alternative_matches[i] < 0)
2986 /* Alternative loses if it requires a type of reload not
2987 permitted for this insn. We can always reload SCRATCH
2988 and objects with a REG_UNUSED note. */
2989 if (GET_CODE (operand) != SCRATCH
2990 && modified[i] != RELOAD_READ && no_output_reloads
2991 && ! find_reg_note (insn, REG_UNUSED, operand))
2993 else if (modified[i] != RELOAD_WRITE && no_input_reloads)
2996 /* If this is a constant that is reloaded into the desired
2997 class by copying it to memory first, count that as another
2998 reload. This is consistent with other code and is
2999 required to avoid chosing another alternative when
3000 the constant is moved into memory by this function on
3001 an early reload pass. Note that the test here is
3002 precisely the same as in the code below that calls
3004 if (CONSTANT_P (operand)
3005 /* force_const_mem does not accept HIGH. */
3006 && GET_CODE (operand) != HIGH
3007 && (PREFERRED_RELOAD_CLASS (operand,
3008 (enum reg_class) this_alternative[i])
3010 && operand_mode[i] != VOIDmode)
3013 if (this_alternative[i] != (int) NO_REGS)
3017 /* If we can't reload this value at all, reject this
3018 alternative. Note that we could also lose due to
3019 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3022 if (! CONSTANT_P (operand)
3023 && (enum reg_class) this_alternative[i] != NO_REGS
3024 && (PREFERRED_RELOAD_CLASS (operand,
3025 (enum reg_class) this_alternative[i])
3029 /* We prefer to reload pseudos over reloading other things,
3030 since such reloads may be able to be eliminated later.
3031 If we are reloading a SCRATCH, we won't be generating any
3032 insns, just using a register, so it is also preferred.
3033 So bump REJECT in other cases. Don't do this in the
3034 case where we are forcing a constant into memory and
3035 it will then win since we don't want to have a different
3036 alternative match then. */
3037 if (! (GET_CODE (operand) == REG
3038 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3039 && GET_CODE (operand) != SCRATCH
3040 && ! (const_to_mem && constmemok))
3044 /* If this operand is a pseudo register that didn't get a hard
3045 reg and this alternative accepts some register, see if the
3046 class that we want is a subset of the preferred class for this
3047 register. If not, but it intersects that class, use the
3048 preferred class instead. If it does not intersect the preferred
3049 class, show that usage of this alternative should be discouraged;
3050 it will be discouraged more still if the register is `preferred
3051 or nothing'. We do this because it increases the chance of
3052 reusing our spill register in a later insn and avoiding a pair
3053 of memory stores and loads.
3055 Don't bother with this if this alternative will accept this
3058 Don't do this for a multiword operand, since it is only a
3059 small win and has the risk of requiring more spill registers,
3060 which could cause a large loss.
3062 Don't do this if the preferred class has only one register
3063 because we might otherwise exhaust the class. */
3066 if (! win && this_alternative[i] != (int) NO_REGS
3067 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3068 && reg_class_size[(int) preferred_class[i]] > 1)
3070 if (! reg_class_subset_p (this_alternative[i],
3071 preferred_class[i]))
3073 /* Since we don't have a way of forming the intersection,
3074 we just do something special if the preferred class
3075 is a subset of the class we have; that's the most
3076 common case anyway. */
3077 if (reg_class_subset_p (preferred_class[i],
3078 this_alternative[i]))
3079 this_alternative[i] = (int) preferred_class[i];
3081 reject += (1 + pref_or_nothing[i]);
3086 /* Now see if any output operands that are marked "earlyclobber"
3087 in this alternative conflict with any input operands
3088 or any memory addresses. */
3090 for (i = 0; i < noperands; i++)
3091 if (this_alternative_earlyclobber[i]
3092 && this_alternative_win[i])
3094 struct decomposition early_data;
3096 early_data = decompose (recog_operand[i]);
3098 if (modified[i] == RELOAD_READ)
3100 if (this_insn_is_asm)
3101 warning_for_asm (this_insn,
3102 "`&' constraint used with input operand");
3108 if (this_alternative[i] == NO_REGS)
3110 this_alternative_earlyclobber[i] = 0;
3111 if (this_insn_is_asm)
3112 error_for_asm (this_insn,
3113 "`&' constraint used with no register class");
3118 for (j = 0; j < noperands; j++)
3119 /* Is this an input operand or a memory ref? */
3120 if ((GET_CODE (recog_operand[j]) == MEM
3121 || modified[j] != RELOAD_WRITE)
3123 /* Ignore things like match_operator operands. */
3124 && *constraints1[j] != 0
3125 /* Don't count an input operand that is constrained to match
3126 the early clobber operand. */
3127 && ! (this_alternative_matches[j] == i
3128 && rtx_equal_p (recog_operand[i], recog_operand[j]))
3129 /* Is it altered by storing the earlyclobber operand? */
3130 && !immune_p (recog_operand[j], recog_operand[i], early_data))
3132 /* If the output is in a single-reg class,
3133 it's costly to reload it, so reload the input instead. */
3134 if (reg_class_size[this_alternative[i]] == 1
3135 && (GET_CODE (recog_operand[j]) == REG
3136 || GET_CODE (recog_operand[j]) == SUBREG))
3139 this_alternative_win[j] = 0;
3144 /* If an earlyclobber operand conflicts with something,
3145 it must be reloaded, so request this and count the cost. */
3149 this_alternative_win[i] = 0;
3150 for (j = 0; j < noperands; j++)
3151 if (this_alternative_matches[j] == i
3152 && this_alternative_win[j])
3154 this_alternative_win[j] = 0;
3160 /* If one alternative accepts all the operands, no reload required,
3161 choose that alternative; don't consider the remaining ones. */
3164 /* Unswap these so that they are never swapped at `finish'. */
3165 if (commutative >= 0)
3167 recog_operand[commutative] = substed_operand[commutative];
3168 recog_operand[commutative + 1]
3169 = substed_operand[commutative + 1];
3171 for (i = 0; i < noperands; i++)
3173 goal_alternative_win[i] = 1;
3174 goal_alternative[i] = this_alternative[i];
3175 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3176 goal_alternative_matches[i] = this_alternative_matches[i];
3177 goal_alternative_earlyclobber[i]
3178 = this_alternative_earlyclobber[i];
3180 goal_alternative_number = this_alternative_number;
3181 goal_alternative_swapped = swapped;
3182 goal_earlyclobber = this_earlyclobber;
3186 /* REJECT, set by the ! and ? constraint characters and when a register
3187 would be reloaded into a non-preferred class, discourages the use of
3188 this alternative for a reload goal. REJECT is incremented by three
3189 for each ? and one for each non-preferred class. */
3190 losers = losers * 3 + reject;
3192 /* If this alternative can be made to work by reloading,
3193 and it needs less reloading than the others checked so far,
3194 record it as the chosen goal for reloading. */
3195 if (! bad && best > losers)
3197 for (i = 0; i < noperands; i++)
3199 goal_alternative[i] = this_alternative[i];
3200 goal_alternative_win[i] = this_alternative_win[i];
3201 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3202 goal_alternative_matches[i] = this_alternative_matches[i];
3203 goal_alternative_earlyclobber[i]
3204 = this_alternative_earlyclobber[i];
3206 goal_alternative_swapped = swapped;
3208 goal_alternative_number = this_alternative_number;
3209 goal_earlyclobber = this_earlyclobber;
3213 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3214 then we need to try each alternative twice,
3215 the second time matching those two operands
3216 as if we had exchanged them.
3217 To do this, really exchange them in operands.
3219 If we have just tried the alternatives the second time,
3220 return operands to normal and drop through. */
3222 if (commutative >= 0)
3227 register enum reg_class tclass;
3230 recog_operand[commutative] = substed_operand[commutative + 1];
3231 recog_operand[commutative + 1] = substed_operand[commutative];
3233 tclass = preferred_class[commutative];
3234 preferred_class[commutative] = preferred_class[commutative + 1];
3235 preferred_class[commutative + 1] = tclass;
3237 t = pref_or_nothing[commutative];
3238 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3239 pref_or_nothing[commutative + 1] = t;
3241 bcopy ((char *) constraints1, (char *) constraints,
3242 noperands * sizeof (char *));
3247 recog_operand[commutative] = substed_operand[commutative];
3248 recog_operand[commutative + 1] = substed_operand[commutative + 1];
3252 /* The operands don't meet the constraints.
3253 goal_alternative describes the alternative
3254 that we could reach by reloading the fewest operands.
3255 Reload so as to fit it. */
3257 if (best == MAX_RECOG_OPERANDS + 300)
3259 /* No alternative works with reloads?? */
3260 if (insn_code_number >= 0)
3262 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3263 /* Avoid further trouble with this insn. */
3264 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3269 /* Jump to `finish' from above if all operands are valid already.
3270 In that case, goal_alternative_win is all 1. */
3273 /* Right now, for any pair of operands I and J that are required to match,
3275 goal_alternative_matches[J] is I.
3276 Set up goal_alternative_matched as the inverse function:
3277 goal_alternative_matched[I] = J. */
3279 for (i = 0; i < noperands; i++)
3280 goal_alternative_matched[i] = -1;
3282 for (i = 0; i < noperands; i++)
3283 if (! goal_alternative_win[i]
3284 && goal_alternative_matches[i] >= 0)
3285 goal_alternative_matched[goal_alternative_matches[i]] = i;
3287 /* If the best alternative is with operands 1 and 2 swapped,
3288 consider them swapped before reporting the reloads. Update the
3289 operand numbers of any reloads already pushed. */
3291 if (goal_alternative_swapped)
3295 tem = substed_operand[commutative];
3296 substed_operand[commutative] = substed_operand[commutative + 1];
3297 substed_operand[commutative + 1] = tem;
3298 tem = recog_operand[commutative];
3299 recog_operand[commutative] = recog_operand[commutative + 1];
3300 recog_operand[commutative + 1] = tem;
3302 for (i = 0; i < n_reloads; i++)
3304 if (reload_opnum[i] == commutative)
3305 reload_opnum[i] = commutative + 1;
3306 else if (reload_opnum[i] == commutative + 1)
3307 reload_opnum[i] = commutative;
3311 /* Perform whatever substitutions on the operands we are supposed
3312 to make due to commutativity or replacement of registers
3313 with equivalent constants or memory slots. */
3315 for (i = 0; i < noperands; i++)
3317 *recog_operand_loc[i] = substed_operand[i];
3318 /* While we are looping on operands, initialize this. */
3319 operand_reloadnum[i] = -1;
3321 /* If this is an earlyclobber operand, we need to widen the scope.
3322 The reload must remain valid from the start of the insn being
3323 reloaded until after the operand is stored into its destination.
3324 We approximate this with RELOAD_OTHER even though we know that we
3325 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3327 One special case that is worth checking is when we have an
3328 output that is earlyclobber but isn't used past the insn (typically
3329 a SCRATCH). In this case, we only need have the reload live
3330 through the insn itself, but not for any of our input or output
3333 In any case, anything needed to address this operand can remain
3334 however they were previously categorized. */
3336 if (goal_alternative_earlyclobber[i])
3338 = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
3339 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3342 /* Any constants that aren't allowed and can't be reloaded
3343 into registers are here changed into memory references. */
3344 for (i = 0; i < noperands; i++)
3345 if (! goal_alternative_win[i]
3346 && CONSTANT_P (recog_operand[i])
3347 /* force_const_mem does not accept HIGH. */
3348 && GET_CODE (recog_operand[i]) != HIGH
3349 && (PREFERRED_RELOAD_CLASS (recog_operand[i],
3350 (enum reg_class) goal_alternative[i])
3352 && operand_mode[i] != VOIDmode)
3354 *recog_operand_loc[i] = recog_operand[i]
3355 = find_reloads_toplev (force_const_mem (operand_mode[i],
3357 i, address_type[i], ind_levels, 0);
3358 if (alternative_allows_memconst (constraints1[i],
3359 goal_alternative_number))
3360 goal_alternative_win[i] = 1;
3363 /* Record the values of the earlyclobber operands for the caller. */
3364 if (goal_earlyclobber)
3365 for (i = 0; i < noperands; i++)
3366 if (goal_alternative_earlyclobber[i])
3367 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3369 /* Now record reloads for all the operands that need them. */
3370 for (i = 0; i < noperands; i++)
3371 if (! goal_alternative_win[i])
3373 /* Operands that match previous ones have already been handled. */
3374 if (goal_alternative_matches[i] >= 0)
3376 /* Handle an operand with a nonoffsettable address
3377 appearing where an offsettable address will do
3378 by reloading the address into a base register.
3380 ??? We can also do this when the operand is a register and
3381 reg_equiv_mem is not offsettable, but this is a bit tricky,
3382 so we don't bother with it. It may not be worth doing. */
3383 else if (goal_alternative_matched[i] == -1
3384 && goal_alternative_offmemok[i]
3385 && GET_CODE (recog_operand[i]) == MEM)
3387 operand_reloadnum[i]
3388 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
3389 &XEXP (recog_operand[i], 0), NULL_PTR,
3390 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
3391 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3392 reload_inc[operand_reloadnum[i]]
3393 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
3395 /* If this operand is an output, we will have made any
3396 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3397 now we are treating part of the operand as an input, so
3398 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3400 if (modified[i] == RELOAD_WRITE)
3401 for (j = 0; j < n_reloads; j++)
3402 if (reload_opnum[j] == i
3403 && reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3404 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
3406 else if (goal_alternative_matched[i] == -1)
3407 operand_reloadnum[i] =
3408 push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3409 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3410 (modified[i] != RELOAD_WRITE ?
3411 recog_operand_loc[i] : 0),
3412 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
3413 (enum reg_class) goal_alternative[i],
3414 (modified[i] == RELOAD_WRITE
3415 ? VOIDmode : operand_mode[i]),
3416 (modified[i] == RELOAD_READ
3417 ? VOIDmode : operand_mode[i]),
3418 (insn_code_number < 0 ? 0
3419 : insn_operand_strict_low[insn_code_number][i]),
3420 0, i, operand_type[i]);
3421 /* In a matching pair of operands, one must be input only
3422 and the other must be output only.
3423 Pass the input operand as IN and the other as OUT. */
3424 else if (modified[i] == RELOAD_READ
3425 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3427 operand_reloadnum[i]
3428 = push_reload (recog_operand[i],
3429 recog_operand[goal_alternative_matched[i]],
3430 recog_operand_loc[i],
3431 recog_operand_loc[goal_alternative_matched[i]],
3432 (enum reg_class) goal_alternative[i],
3434 operand_mode[goal_alternative_matched[i]],
3435 0, 0, i, RELOAD_OTHER);
3436 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3438 else if (modified[i] == RELOAD_WRITE
3439 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3441 operand_reloadnum[goal_alternative_matched[i]]
3442 = push_reload (recog_operand[goal_alternative_matched[i]],
3444 recog_operand_loc[goal_alternative_matched[i]],
3445 recog_operand_loc[i],
3446 (enum reg_class) goal_alternative[i],
3447 operand_mode[goal_alternative_matched[i]],
3449 0, 0, i, RELOAD_OTHER);
3450 operand_reloadnum[i] = output_reloadnum;
3452 else if (insn_code_number >= 0)
3456 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3457 /* Avoid further trouble with this insn. */
3458 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3463 else if (goal_alternative_matched[i] < 0
3464 && goal_alternative_matches[i] < 0
3467 /* For each non-matching operand that's a MEM or a pseudo-register
3468 that didn't get a hard register, make an optional reload.
3469 This may get done even if the insn needs no reloads otherwise. */
3471 rtx operand = recog_operand[i];
3473 while (GET_CODE (operand) == SUBREG)
3474 operand = XEXP (operand, 0);
3475 if ((GET_CODE (operand) == MEM
3476 || (GET_CODE (operand) == REG
3477 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3478 && (enum reg_class) goal_alternative[i] != NO_REGS
3479 && ! no_input_reloads
3480 /* Optional output reloads don't do anything and we mustn't
3481 make in-out reloads on insns that are not permitted output
3483 && (modified[i] == RELOAD_READ
3484 || (modified[i] == RELOAD_READ_WRITE && ! no_output_reloads)))
3485 operand_reloadnum[i]
3486 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3487 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3488 (modified[i] != RELOAD_WRITE
3489 ? recog_operand_loc[i] : 0),
3490 (modified[i] != RELOAD_READ
3491 ? recog_operand_loc[i] : 0),
3492 (enum reg_class) goal_alternative[i],
3493 (modified[i] == RELOAD_WRITE
3494 ? VOIDmode : operand_mode[i]),
3495 (modified[i] == RELOAD_READ
3496 ? VOIDmode : operand_mode[i]),
3497 (insn_code_number < 0 ? 0
3498 : insn_operand_strict_low[insn_code_number][i]),
3499 1, i, operand_type[i]);
3501 else if (goal_alternative_matches[i] >= 0
3502 && goal_alternative_win[goal_alternative_matches[i]]
3503 && modified[i] == RELOAD_READ
3504 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3505 && ! no_input_reloads && ! no_output_reloads
3508 /* Similarly, make an optional reload for a pair of matching
3509 objects that are in MEM or a pseudo that didn't get a hard reg. */
3511 rtx operand = recog_operand[i];
3513 while (GET_CODE (operand) == SUBREG)
3514 operand = XEXP (operand, 0);
3515 if ((GET_CODE (operand) == MEM
3516 || (GET_CODE (operand) == REG
3517 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3518 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3520 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3521 = push_reload (recog_operand[goal_alternative_matches[i]],
3523 recog_operand_loc[goal_alternative_matches[i]],
3524 recog_operand_loc[i],
3525 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3526 operand_mode[goal_alternative_matches[i]],
3528 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3531 /* If this insn pattern contains any MATCH_DUP's, make sure that
3532 they will be substituted if the operands they match are substituted.
3533 Also do now any substitutions we already did on the operands.
3535 Don't do this if we aren't making replacements because we might be
3536 propagating things allocated by frame pointer elimination into places
3537 it doesn't expect. */
3539 if (insn_code_number >= 0 && replace)
3540 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3542 int opno = recog_dup_num[i];
3543 *recog_dup_loc[i] = *recog_operand_loc[opno];
3544 if (operand_reloadnum[opno] >= 0)
3545 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3546 insn_operand_mode[insn_code_number][opno]);
3550 /* This loses because reloading of prior insns can invalidate the equivalence
3551 (or at least find_equiv_reg isn't smart enough to find it any more),
3552 causing this insn to need more reload regs than it needed before.
3553 It may be too late to make the reload regs available.
3554 Now this optimization is done safely in choose_reload_regs. */
3556 /* For each reload of a reg into some other class of reg,
3557 search for an existing equivalent reg (same value now) in the right class.
3558 We can use it as long as we don't need to change its contents. */
3559 for (i = 0; i < n_reloads; i++)
3560 if (reload_reg_rtx[i] == 0
3561 && reload_in[i] != 0
3562 && GET_CODE (reload_in[i]) == REG
3563 && reload_out[i] == 0)
3566 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3567 static_reload_reg_p, 0, reload_inmode[i]);
3568 /* Prevent generation of insn to load the value
3569 because the one we found already has the value. */
3570 if (reload_reg_rtx[i])
3571 reload_in[i] = reload_reg_rtx[i];
3575 /* Perhaps an output reload can be combined with another
3576 to reduce needs by one. */
3577 if (!goal_earlyclobber)
3580 /* If we have a pair of reloads for parts of an address, they are reloading
3581 the same object, the operands themselves were not reloaded, and they
3582 are for two operands that are supposed to match, merge the reloads and
3583 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3585 for (i = 0; i < n_reloads; i++)
3589 for (j = i + 1; j < n_reloads; j++)
3590 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3591 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
3592 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
3593 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3594 && rtx_equal_p (reload_in[i], reload_in[j])
3595 && (operand_reloadnum[reload_opnum[i]] < 0
3596 || reload_optional[operand_reloadnum[reload_opnum[i]]])
3597 && (operand_reloadnum[reload_opnum[j]] < 0
3598 || reload_optional[operand_reloadnum[reload_opnum[j]]])
3599 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
3600 || (goal_alternative_matches[reload_opnum[j]]
3601 == reload_opnum[i])))
3603 for (k = 0; k < n_replacements; k++)
3604 if (replacements[k].what == j)
3605 replacements[k].what = i;
3607 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3612 /* Scan all the reloads and update their type.
3613 If a reload is for the address of an operand and we didn't reload
3614 that operand, change the type. Similarly, change the operand number
3615 of a reload when two operands match. If a reload is optional, treat it
3616 as though the operand isn't reloaded.
3618 ??? This latter case is somewhat odd because if we do the optional
3619 reload, it means the object is hanging around. Thus we need only
3620 do the address reload if the optional reload was NOT done.
3622 Change secondary reloads to be the address type of their operand, not
3625 If an operand's reload is now RELOAD_OTHER, change any
3626 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3627 RELOAD_FOR_OTHER_ADDRESS. */
3629 for (i = 0; i < n_reloads; i++)
3631 if (reload_secondary_p[i]
3632 && reload_when_needed[i] == operand_type[reload_opnum[i]])
3633 reload_when_needed[i] = address_type[reload_opnum[i]];
3635 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3636 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
3637 && (operand_reloadnum[reload_opnum[i]] < 0
3638 || reload_optional[operand_reloadnum[reload_opnum[i]]]))
3640 /* If we have a secondary reload to go along with this reload,
3641 change its type to RELOAD_FOR_OPADDR_ADDR. */
3643 if (reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3644 && reload_secondary_in_reload[i] != -1)
3646 int secondary_in_reload = reload_secondary_in_reload[i];
3648 reload_when_needed[secondary_in_reload] =
3649 RELOAD_FOR_OPADDR_ADDR;
3651 /* If there's a tertiary reload we have to change it also. */
3652 if (secondary_in_reload > 0
3653 && reload_secondary_in_reload[secondary_in_reload] != -1)
3654 reload_when_needed[reload_secondary_in_reload[secondary_in_reload]]
3655 = RELOAD_FOR_OPADDR_ADDR;
3658 if (reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3659 && reload_secondary_out_reload[i] != -1)
3661 int secondary_out_reload = reload_secondary_out_reload[i];
3663 reload_when_needed[secondary_out_reload] =
3664 RELOAD_FOR_OPADDR_ADDR;
3666 /* If there's a tertiary reload we have to change it also. */
3667 if (secondary_out_reload
3668 && reload_secondary_out_reload[secondary_out_reload] != -1)
3669 reload_when_needed[reload_secondary_out_reload[secondary_out_reload]]
3670 = RELOAD_FOR_OPADDR_ADDR;
3672 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3675 if (reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3676 && operand_reloadnum[reload_opnum[i]] >= 0
3677 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
3679 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
3681 if (goal_alternative_matches[reload_opnum[i]] >= 0)
3682 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
3685 /* See if we have any reloads that are now allowed to be merged
3686 because we've changed when the reload is needed to
3687 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3688 check for the most common cases. */
3690 for (i = 0; i < n_reloads; i++)
3691 if (reload_in[i] != 0 && reload_out[i] == 0
3692 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
3693 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
3694 for (j = 0; j < n_reloads; j++)
3695 if (i != j && reload_in[j] != 0 && reload_out[j] == 0
3696 && reload_when_needed[j] == reload_when_needed[i]
3697 && MATCHES (reload_in[i], reload_in[j])
3698 && reload_reg_class[i] == reload_reg_class[j]
3699 && !reload_nocombine[i] && !reload_nocombine[j]
3700 && reload_reg_rtx[i] == reload_reg_rtx[j])
3702 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
3703 transfer_replacements (i, j);
3707 #else /* no REGISTER_CONSTRAINTS */
3709 int insn_code_number;
3710 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
3712 rtx body = PATTERN (insn);
3716 n_earlyclobbers = 0;
3717 replace_reloads = replace;
3720 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3721 Store the operand values in RECOG_OPERAND and the locations
3722 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3723 Return if the insn needs no reload processing. */
3725 switch (GET_CODE (body))
3736 noperands = asm_noperands (body);
3739 /* This insn is an `asm' with operands.
3740 First, find out how many operands, and allocate space. */
3742 insn_code_number = -1;
3743 /* ??? This is a bug! ???
3744 Give up and delete this insn if it has too many operands. */
3745 if (noperands > MAX_RECOG_OPERANDS)
3748 /* Now get the operand values out of the insn. */
3750 decode_asm_operands (body, recog_operand, recog_operand_loc,
3751 NULL_PTR, NULL_PTR);
3756 /* Ordinary insn: recognize it, allocate space for operands and
3757 constraints, and get them out via insn_extract. */
3759 insn_code_number = recog_memoized (insn);
3760 noperands = insn_n_operands[insn_code_number];
3761 insn_extract (insn);
3767 for (i = 0; i < noperands; i++)
3769 register RTX_CODE code = GET_CODE (recog_operand[i]);
3770 int is_set_dest = GET_CODE (body) == SET && (i == 0);
3772 if (insn_code_number >= 0)
3773 if (insn_operand_address_p[insn_code_number][i])
3774 find_reloads_address (VOIDmode, NULL_PTR,
3775 recog_operand[i], recog_operand_loc[i],
3776 i, RELOAD_FOR_INPUT, ind_levels);
3778 /* In these cases, we can't tell if the operand is an input
3779 or an output, so be conservative. In practice it won't be
3783 find_reloads_address (GET_MODE (recog_operand[i]),
3784 recog_operand_loc[i],
3785 XEXP (recog_operand[i], 0),
3786 &XEXP (recog_operand[i], 0),
3787 i, RELOAD_OTHER, ind_levels);
3789 recog_operand[i] = *recog_operand_loc[i]
3790 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
3791 ind_levels, is_set_dest);
3794 register int regno = REGNO (recog_operand[i]);
3795 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3796 recog_operand[i] = *recog_operand_loc[i]
3797 = reg_equiv_constant[regno];
3798 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3799 that feeds this insn. */
3800 if (reg_equiv_mem[regno] != 0)
3801 recog_operand[i] = *recog_operand_loc[i]
3802 = reg_equiv_mem[regno];
3807 /* Perhaps an output reload can be combined with another
3808 to reduce needs by one. */
3809 if (!goal_earlyclobber)
3811 #endif /* no REGISTER_CONSTRAINTS */
3814 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3815 accepts a memory operand with constant address. */
3818 alternative_allows_memconst (constraint, altnum)
3823 /* Skip alternatives before the one requested. */
3826 while (*constraint++ != ',');
3829 /* Scan the requested alternative for 'm' or 'o'.
3830 If one of them is present, this alternative accepts memory constants. */
3831 while ((c = *constraint++) && c != ',' && c != '#')
3832 if (c == 'm' || c == 'o')
3837 /* Scan X for memory references and scan the addresses for reloading.
3838 Also checks for references to "constant" regs that we want to eliminate
3839 and replaces them with the values they stand for.
3840 We may alter X destructively if it contains a reference to such.
3841 If X is just a constant reg, we return the equivalent value
3844 IND_LEVELS says how many levels of indirect addressing this machine
3847 OPNUM and TYPE identify the purpose of the reload.
3849 IS_SET_DEST is true if X is the destination of a SET, which is not
3850 appropriate to be replaced by a constant. */
3853 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest)
3856 enum reload_type type;
3860 register RTX_CODE code = GET_CODE (x);
3862 register char *fmt = GET_RTX_FORMAT (code);
3867 /* This code is duplicated for speed in find_reloads. */
3868 register int regno = REGNO (x);
3869 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3870 x = reg_equiv_constant[regno];
3872 /* This creates (subreg (mem...)) which would cause an unnecessary
3873 reload of the mem. */
3874 else if (reg_equiv_mem[regno] != 0)
3875 x = reg_equiv_mem[regno];
3877 else if (reg_equiv_address[regno] != 0)
3879 /* If reg_equiv_address varies, it may be shared, so copy it. */
3880 rtx addr = reg_equiv_address[regno];
3882 if (rtx_varies_p (addr))
3883 addr = copy_rtx (addr);
3885 x = gen_rtx (MEM, GET_MODE (x), addr);
3886 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3887 find_reloads_address (GET_MODE (x), NULL_PTR,
3889 &XEXP (x, 0), opnum, type, ind_levels);
3896 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
3897 opnum, type, ind_levels);
3901 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
3903 /* Check for SUBREG containing a REG that's equivalent to a constant.
3904 If the constant has a known value, truncate it right now.
3905 Similarly if we are extracting a single-word of a multi-word
3906 constant. If the constant is symbolic, allow it to be substituted
3907 normally. push_reload will strip the subreg later. If the
3908 constant is VOIDmode, abort because we will lose the mode of
3909 the register (this should never happen because one of the cases
3910 above should handle it). */
3912 register int regno = REGNO (SUBREG_REG (x));
3915 if (subreg_lowpart_p (x)
3916 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3917 && reg_equiv_constant[regno] != 0
3918 && (tem = gen_lowpart_common (GET_MODE (x),
3919 reg_equiv_constant[regno])) != 0)
3922 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
3923 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3924 && reg_equiv_constant[regno] != 0
3925 && (tem = operand_subword (reg_equiv_constant[regno],
3927 GET_MODE (SUBREG_REG (x)))) != 0)
3930 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3931 && reg_equiv_constant[regno] != 0
3932 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
3935 /* If the subreg contains a reg that will be converted to a mem,
3936 convert the subreg to a narrower memref now.
3937 Otherwise, we would get (subreg (mem ...) ...),
3938 which would force reload of the mem.
3940 We also need to do this if there is an equivalent MEM that is
3941 not offsettable. In that case, alter_subreg would produce an
3942 invalid address on big-endian machines.
3944 For machines that extend byte loads, we must not reload using
3945 a wider mode if we have a paradoxical SUBREG. find_reloads will
3946 force a reload in that case. So we should not do anything here. */
3948 else if (regno >= FIRST_PSEUDO_REGISTER
3949 #ifdef LOAD_EXTEND_OP
3950 && (GET_MODE_SIZE (GET_MODE (x))
3951 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3953 && (reg_equiv_address[regno] != 0
3954 || (reg_equiv_mem[regno] != 0
3955 && (! strict_memory_address_p (GET_MODE (x),
3956 XEXP (reg_equiv_mem[regno], 0))
3957 || ! offsettable_memref_p (reg_equiv_mem[regno])))))
3959 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
3960 rtx addr = (reg_equiv_address[regno] ? reg_equiv_address[regno]
3961 : XEXP (reg_equiv_mem[regno], 0));
3962 if (BYTES_BIG_ENDIAN)
3965 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
3966 offset += MIN (size, UNITS_PER_WORD);
3967 size = GET_MODE_SIZE (GET_MODE (x));
3968 offset -= MIN (size, UNITS_PER_WORD);
3970 addr = plus_constant (addr, offset);
3971 x = gen_rtx (MEM, GET_MODE (x), addr);
3972 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3973 find_reloads_address (GET_MODE (x), NULL_PTR,
3975 &XEXP (x, 0), opnum, type, ind_levels);
3980 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3983 XEXP (x, i) = find_reloads_toplev (XEXP (x, i), opnum, type,
3984 ind_levels, is_set_dest);
3989 /* Return a mem ref for the memory equivalent of reg REGNO.
3990 This mem ref is not shared with anything. */
3993 make_memloc (ad, regno)
3998 rtx tem = reg_equiv_address[regno];
4000 #if 0 /* We cannot safely reuse a memloc made here;
4001 if the pseudo appears twice, and its mem needs a reload,
4002 it gets two separate reloads assigned, but it only
4003 gets substituted with the second of them;
4004 then it can get used before that reload reg gets loaded up. */
4005 for (i = 0; i < n_memlocs; i++)
4006 if (rtx_equal_p (tem, XEXP (memlocs[i], 0)))
4010 /* If TEM might contain a pseudo, we must copy it to avoid
4011 modifying it when we do the substitution for the reload. */
4012 if (rtx_varies_p (tem))
4013 tem = copy_rtx (tem);
4015 tem = gen_rtx (MEM, GET_MODE (ad), tem);
4016 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4017 memlocs[n_memlocs++] = tem;
4021 /* Record all reloads needed for handling memory address AD
4022 which appears in *LOC in a memory reference to mode MODE
4023 which itself is found in location *MEMREFLOC.
4024 Note that we take shortcuts assuming that no multi-reg machine mode
4025 occurs as part of an address.
4027 OPNUM and TYPE specify the purpose of this reload.
4029 IND_LEVELS says how many levels of indirect addressing this machine
4032 Value is nonzero if this address is reloaded or replaced as a whole.
4033 This is interesting to the caller if the address is an autoincrement.
4035 Note that there is no verification that the address will be valid after
4036 this routine does its work. Instead, we rely on the fact that the address
4037 was valid when reload started. So we need only undo things that reload
4038 could have broken. These are wrong register types, pseudos not allocated
4039 to a hard register, and frame pointer elimination. */
4042 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels)
4043 enum machine_mode mode;
4048 enum reload_type type;
4054 /* If the address is a register, see if it is a legitimate address and
4055 reload if not. We first handle the cases where we need not reload
4056 or where we must reload in a non-standard way. */
4058 if (GET_CODE (ad) == REG)
4062 if (reg_equiv_constant[regno] != 0
4063 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
4065 *loc = ad = reg_equiv_constant[regno];
4069 else if (reg_equiv_address[regno] != 0)
4071 tem = make_memloc (ad, regno);
4072 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
4073 &XEXP (tem, 0), opnum, type, ind_levels);
4074 push_reload (tem, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
4075 GET_MODE (ad), VOIDmode, 0, 0,
4080 /* We can avoid a reload if the register's equivalent memory expression
4081 is valid as an indirect memory address.
4082 But not all addresses are valid in a mem used as an indirect address:
4083 only reg or reg+constant. */
4085 else if (reg_equiv_mem[regno] != 0 && ind_levels > 0
4086 && strict_memory_address_p (mode, reg_equiv_mem[regno])
4087 && (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == REG
4088 || (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == PLUS
4089 && GET_CODE (XEXP (XEXP (reg_equiv_mem[regno], 0), 0)) == REG
4090 && CONSTANT_P (XEXP (XEXP (reg_equiv_mem[regno], 0), 1)))))
4093 /* The only remaining case where we can avoid a reload is if this is a
4094 hard register that is valid as a base register and which is not the
4095 subject of a CLOBBER in this insn. */
4097 else if (regno < FIRST_PSEUDO_REGISTER && REGNO_OK_FOR_BASE_P (regno)
4098 && ! regno_clobbered_p (regno, this_insn))
4101 /* If we do not have one of the cases above, we must do the reload. */
4102 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
4103 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4107 if (strict_memory_address_p (mode, ad))
4109 /* The address appears valid, so reloads are not needed.
4110 But the address may contain an eliminable register.
4111 This can happen because a machine with indirect addressing
4112 may consider a pseudo register by itself a valid address even when
4113 it has failed to get a hard reg.
4114 So do a tree-walk to find and eliminate all such regs. */
4116 /* But first quickly dispose of a common case. */
4117 if (GET_CODE (ad) == PLUS
4118 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4119 && GET_CODE (XEXP (ad, 0)) == REG
4120 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4123 subst_reg_equivs_changed = 0;
4124 *loc = subst_reg_equivs (ad);
4126 if (! subst_reg_equivs_changed)
4129 /* Check result for validity after substitution. */
4130 if (strict_memory_address_p (mode, ad))
4134 /* The address is not valid. We have to figure out why. One possibility
4135 is that it is itself a MEM. This can happen when the frame pointer is
4136 being eliminated, a pseudo is not allocated to a hard register, and the
4137 offset between the frame and stack pointers is not its initial value.
4138 In that case the pseudo will have been replaced by a MEM referring to
4139 the stack pointer. */
4140 if (GET_CODE (ad) == MEM)
4142 /* First ensure that the address in this MEM is valid. Then, unless
4143 indirect addresses are valid, reload the MEM into a register. */
4145 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4146 opnum, type, ind_levels == 0 ? 0 : ind_levels - 1);
4148 /* If tem was changed, then we must create a new memory reference to
4149 hold it and store it back into memrefloc. */
4150 if (tem != ad && memrefloc)
4152 *memrefloc = copy_rtx (*memrefloc);
4153 copy_replacements (tem, XEXP (*memrefloc, 0));
4154 loc = &XEXP (*memrefloc, 0);
4157 /* Check similar cases as for indirect addresses as above except
4158 that we can allow pseudos and a MEM since they should have been
4159 taken care of above. */
4162 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4163 || GET_CODE (XEXP (tem, 0)) == MEM
4164 || ! (GET_CODE (XEXP (tem, 0)) == REG
4165 || (GET_CODE (XEXP (tem, 0)) == PLUS
4166 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4167 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4169 /* Must use TEM here, not AD, since it is the one that will
4170 have any subexpressions reloaded, if needed. */
4171 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4172 BASE_REG_CLASS, GET_MODE (tem), VOIDmode, 0,
4180 /* If we have address of a stack slot but it's not valid
4181 (displacement is too large), compute the sum in a register. */
4182 else if (GET_CODE (ad) == PLUS
4183 && (XEXP (ad, 0) == frame_pointer_rtx
4184 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4185 || XEXP (ad, 0) == hard_frame_pointer_rtx
4187 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4188 || XEXP (ad, 0) == arg_pointer_rtx
4190 || XEXP (ad, 0) == stack_pointer_rtx)
4191 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4193 /* Unshare the MEM rtx so we can safely alter it. */
4196 *memrefloc = copy_rtx (*memrefloc);
4197 loc = &XEXP (*memrefloc, 0);
4199 if (double_reg_address_ok)
4201 /* Unshare the sum as well. */
4202 *loc = ad = copy_rtx (ad);
4203 /* Reload the displacement into an index reg.
4204 We assume the frame pointer or arg pointer is a base reg. */
4205 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4206 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4211 /* If the sum of two regs is not necessarily valid,
4212 reload the sum into a base reg.
4213 That will at least work. */
4214 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode,
4215 opnum, type, ind_levels);
4220 /* If we have an indexed stack slot, there are three possible reasons why
4221 it might be invalid: The index might need to be reloaded, the address
4222 might have been made by frame pointer elimination and hence have a
4223 constant out of range, or both reasons might apply.
4225 We can easily check for an index needing reload, but even if that is the
4226 case, we might also have an invalid constant. To avoid making the
4227 conservative assumption and requiring two reloads, we see if this address
4228 is valid when not interpreted strictly. If it is, the only problem is
4229 that the index needs a reload and find_reloads_address_1 will take care
4232 There is still a case when we might generate an extra reload,
4233 however. In certain cases eliminate_regs will return a MEM for a REG
4234 (see the code there for details). In those cases, memory_address_p
4235 applied to our address will return 0 so we will think that our offset
4236 must be too large. But it might indeed be valid and the only problem
4237 is that a MEM is present where a REG should be. This case should be
4238 very rare and there doesn't seem to be any way to avoid it.
4240 If we decide to do something here, it must be that
4241 `double_reg_address_ok' is true and that this address rtl was made by
4242 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4243 rework the sum so that the reload register will be added to the index.
4244 This is safe because we know the address isn't shared.
4246 We check for fp/ap/sp as both the first and second operand of the
4249 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4250 && GET_CODE (XEXP (ad, 0)) == PLUS
4251 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4252 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4253 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4255 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4256 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4258 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4259 && ! memory_address_p (mode, ad))
4261 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
4262 plus_constant (XEXP (XEXP (ad, 0), 0),
4263 INTVAL (XEXP (ad, 1))),
4264 XEXP (XEXP (ad, 0), 1));
4265 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4266 GET_MODE (ad), opnum, type, ind_levels);
4267 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, type, 0);
4272 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4273 && GET_CODE (XEXP (ad, 0)) == PLUS
4274 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4275 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4276 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4278 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4279 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4281 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4282 && ! memory_address_p (mode, ad))
4284 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
4285 XEXP (XEXP (ad, 0), 0),
4286 plus_constant (XEXP (XEXP (ad, 0), 1),
4287 INTVAL (XEXP (ad, 1))));
4288 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), BASE_REG_CLASS,
4289 GET_MODE (ad), opnum, type, ind_levels);
4290 find_reloads_address_1 (XEXP (ad, 0), 1, &XEXP (ad, 0), opnum, type, 0);
4295 /* See if address becomes valid when an eliminable register
4296 in a sum is replaced. */
4299 if (GET_CODE (ad) == PLUS)
4300 tem = subst_indexed_address (ad);
4301 if (tem != ad && strict_memory_address_p (mode, tem))
4303 /* Ok, we win that way. Replace any additional eliminable
4306 subst_reg_equivs_changed = 0;
4307 tem = subst_reg_equivs (tem);
4309 /* Make sure that didn't make the address invalid again. */
4311 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4318 /* If constants aren't valid addresses, reload the constant address
4320 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4322 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4323 Unshare it so we can safely alter it. */
4324 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4325 && CONSTANT_POOL_ADDRESS_P (ad))
4327 *memrefloc = copy_rtx (*memrefloc);
4328 loc = &XEXP (*memrefloc, 0);
4331 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
4336 return find_reloads_address_1 (ad, 0, loc, opnum, type, ind_levels);
4339 /* Find all pseudo regs appearing in AD
4340 that are eliminable in favor of equivalent values
4341 and do not have hard regs; replace them by their equivalents. */
4344 subst_reg_equivs (ad)
4347 register RTX_CODE code = GET_CODE (ad);
4365 register int regno = REGNO (ad);
4367 if (reg_equiv_constant[regno] != 0)
4369 subst_reg_equivs_changed = 1;
4370 return reg_equiv_constant[regno];
4376 /* Quickly dispose of a common case. */
4377 if (XEXP (ad, 0) == frame_pointer_rtx
4378 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4382 fmt = GET_RTX_FORMAT (code);
4383 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4385 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i));
4389 /* Compute the sum of X and Y, making canonicalizations assumed in an
4390 address, namely: sum constant integers, surround the sum of two
4391 constants with a CONST, put the constant as the second operand, and
4392 group the constant on the outermost sum.
4394 This routine assumes both inputs are already in canonical form. */
4401 enum machine_mode mode = GET_MODE (x);
4403 if (mode == VOIDmode)
4404 mode = GET_MODE (y);
4406 if (mode == VOIDmode)
4409 if (GET_CODE (x) == CONST_INT)
4410 return plus_constant (y, INTVAL (x));
4411 else if (GET_CODE (y) == CONST_INT)
4412 return plus_constant (x, INTVAL (y));
4413 else if (CONSTANT_P (x))
4414 tem = x, x = y, y = tem;
4416 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
4417 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
4419 /* Note that if the operands of Y are specified in the opposite
4420 order in the recursive calls below, infinite recursion will occur. */
4421 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
4422 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
4424 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4425 constant will have been placed second. */
4426 if (CONSTANT_P (x) && CONSTANT_P (y))
4428 if (GET_CODE (x) == CONST)
4430 if (GET_CODE (y) == CONST)
4433 return gen_rtx (CONST, VOIDmode, gen_rtx (PLUS, mode, x, y));
4436 return gen_rtx (PLUS, mode, x, y);
4439 /* If ADDR is a sum containing a pseudo register that should be
4440 replaced with a constant (from reg_equiv_constant),
4441 return the result of doing so, and also apply the associative
4442 law so that the result is more likely to be a valid address.
4443 (But it is not guaranteed to be one.)
4445 Note that at most one register is replaced, even if more are
4446 replaceable. Also, we try to put the result into a canonical form
4447 so it is more likely to be a valid address.
4449 In all other cases, return ADDR. */
4452 subst_indexed_address (addr)
4455 rtx op0 = 0, op1 = 0, op2 = 0;
4459 if (GET_CODE (addr) == PLUS)
4461 /* Try to find a register to replace. */
4462 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
4463 if (GET_CODE (op0) == REG
4464 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
4465 && reg_renumber[regno] < 0
4466 && reg_equiv_constant[regno] != 0)
4467 op0 = reg_equiv_constant[regno];
4468 else if (GET_CODE (op1) == REG
4469 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
4470 && reg_renumber[regno] < 0
4471 && reg_equiv_constant[regno] != 0)
4472 op1 = reg_equiv_constant[regno];
4473 else if (GET_CODE (op0) == PLUS
4474 && (tem = subst_indexed_address (op0)) != op0)
4476 else if (GET_CODE (op1) == PLUS
4477 && (tem = subst_indexed_address (op1)) != op1)
4482 /* Pick out up to three things to add. */
4483 if (GET_CODE (op1) == PLUS)
4484 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
4485 else if (GET_CODE (op0) == PLUS)
4486 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4488 /* Compute the sum. */
4490 op1 = form_sum (op1, op2);
4492 op0 = form_sum (op0, op1);
4499 /* Record the pseudo registers we must reload into hard registers
4500 in a subexpression of a would-be memory address, X.
4501 (This function is not called if the address we find is strictly valid.)
4502 CONTEXT = 1 means we are considering regs as index regs,
4503 = 0 means we are considering them as base regs.
4505 OPNUM and TYPE specify the purpose of any reloads made.
4507 IND_LEVELS says how many levels of indirect addressing are
4508 supported at this point in the address.
4510 We return nonzero if X, as a whole, is reloaded or replaced. */
4512 /* Note that we take shortcuts assuming that no multi-reg machine mode
4513 occurs as part of an address.
4514 Also, this is not fully machine-customizable; it works for machines
4515 such as vaxes and 68000's and 32000's, but other possible machines
4516 could have addressing modes that this does not handle right. */
4519 find_reloads_address_1 (x, context, loc, opnum, type, ind_levels)
4524 enum reload_type type;
4527 register RTX_CODE code = GET_CODE (x);
4533 register rtx orig_op0 = XEXP (x, 0);
4534 register rtx orig_op1 = XEXP (x, 1);
4535 register RTX_CODE code0 = GET_CODE (orig_op0);
4536 register RTX_CODE code1 = GET_CODE (orig_op1);
4537 register rtx op0 = orig_op0;
4538 register rtx op1 = orig_op1;
4540 if (GET_CODE (op0) == SUBREG)
4542 op0 = SUBREG_REG (op0);
4543 code0 = GET_CODE (op0);
4546 if (GET_CODE (op1) == SUBREG)
4548 op1 = SUBREG_REG (op1);
4549 code1 = GET_CODE (op1);
4552 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
4553 || code0 == ZERO_EXTEND || code1 == MEM)
4555 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4557 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4561 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
4562 || code1 == ZERO_EXTEND || code0 == MEM)
4564 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4566 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4570 else if (code0 == CONST_INT || code0 == CONST
4571 || code0 == SYMBOL_REF || code0 == LABEL_REF)
4572 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4575 else if (code1 == CONST_INT || code1 == CONST
4576 || code1 == SYMBOL_REF || code1 == LABEL_REF)
4577 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4580 else if (code0 == REG && code1 == REG)
4582 if (REG_OK_FOR_INDEX_P (op0)
4583 && REG_OK_FOR_BASE_P (op1))
4585 else if (REG_OK_FOR_INDEX_P (op1)
4586 && REG_OK_FOR_BASE_P (op0))
4588 else if (REG_OK_FOR_BASE_P (op1))
4589 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4591 else if (REG_OK_FOR_BASE_P (op0))
4592 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4594 else if (REG_OK_FOR_INDEX_P (op1))
4595 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4597 else if (REG_OK_FOR_INDEX_P (op0))
4598 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4602 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4604 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4609 else if (code0 == REG)
4611 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4613 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4617 else if (code1 == REG)
4619 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4621 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4632 if (GET_CODE (XEXP (x, 0)) == REG)
4634 register int regno = REGNO (XEXP (x, 0));
4638 /* A register that is incremented cannot be constant! */
4639 if (regno >= FIRST_PSEUDO_REGISTER
4640 && reg_equiv_constant[regno] != 0)
4643 /* Handle a register that is equivalent to a memory location
4644 which cannot be addressed directly. */
4645 if (reg_equiv_address[regno] != 0)
4647 rtx tem = make_memloc (XEXP (x, 0), regno);
4648 /* First reload the memory location's address. */
4649 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
4650 &XEXP (tem, 0), opnum, type, ind_levels);
4651 /* Put this inside a new increment-expression. */
4652 x = gen_rtx (GET_CODE (x), GET_MODE (x), tem);
4653 /* Proceed to reload that, as if it contained a register. */
4656 /* If we have a hard register that is ok as an index,
4657 don't make a reload. If an autoincrement of a nice register
4658 isn't "valid", it must be that no autoincrement is "valid".
4659 If that is true and something made an autoincrement anyway,
4660 this must be a special context where one is allowed.
4661 (For example, a "push" instruction.)
4662 We can't improve this address, so leave it alone. */
4664 /* Otherwise, reload the autoincrement into a suitable hard reg
4665 and record how much to increment by. */
4667 if (reg_renumber[regno] >= 0)
4668 regno = reg_renumber[regno];
4669 if ((regno >= FIRST_PSEUDO_REGISTER
4670 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4671 : REGNO_OK_FOR_BASE_P (regno))))
4676 = push_reload (x, NULL_RTX, loc, NULL_PTR,
4677 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4678 GET_MODE (x), GET_MODE (x), VOIDmode, 0,
4680 reload_inc[reloadnum]
4681 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
4686 /* Update the REG_INC notes. */
4688 for (link = REG_NOTES (this_insn);
4689 link; link = XEXP (link, 1))
4690 if (REG_NOTE_KIND (link) == REG_INC
4691 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
4692 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4698 else if (GET_CODE (XEXP (x, 0)) == MEM)
4700 /* This is probably the result of a substitution, by eliminate_regs,
4701 of an equivalent address for a pseudo that was not allocated to a
4702 hard register. Verify that the specified address is valid and
4703 reload it into a register. */
4704 rtx tem = XEXP (x, 0);
4708 /* Since we know we are going to reload this item, don't decrement
4709 for the indirection level.
4711 Note that this is actually conservative: it would be slightly
4712 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4714 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
4715 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
4716 opnum, type, ind_levels);
4718 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
4719 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4720 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4721 reload_inc[reloadnum]
4722 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
4724 link = FIND_REG_INC_NOTE (this_insn, tem);
4726 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4733 /* This is probably the result of a substitution, by eliminate_regs, of
4734 an equivalent address for a pseudo that was not allocated to a hard
4735 register. Verify that the specified address is valid and reload it
4738 Since we know we are going to reload this item, don't decrement for
4739 the indirection level.
4741 Note that this is actually conservative: it would be slightly more
4742 efficient to use the value of SPILL_INDIRECT_LEVELS from
4745 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
4746 opnum, type, ind_levels);
4747 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
4748 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4749 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4754 register int regno = REGNO (x);
4756 if (reg_equiv_constant[regno] != 0)
4758 find_reloads_address_part (reg_equiv_constant[regno], loc,
4759 (context ? INDEX_REG_CLASS
4761 GET_MODE (x), opnum, type, ind_levels);
4765 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4766 that feeds this insn. */
4767 if (reg_equiv_mem[regno] != 0)
4769 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
4770 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4771 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4776 if (reg_equiv_address[regno] != 0)
4778 x = make_memloc (x, regno);
4779 find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0),
4780 opnum, type, ind_levels);
4783 if (reg_renumber[regno] >= 0)
4784 regno = reg_renumber[regno];
4786 if ((regno >= FIRST_PSEUDO_REGISTER
4787 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4788 : REGNO_OK_FOR_BASE_P (regno))))
4790 push_reload (x, NULL_RTX, loc, NULL_PTR,
4791 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4792 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4796 /* If a register appearing in an address is the subject of a CLOBBER
4797 in this insn, reload it into some other register to be safe.
4798 The CLOBBER is supposed to make the register unavailable
4799 from before this insn to after it. */
4800 if (regno_clobbered_p (regno, this_insn))
4802 push_reload (x, NULL_RTX, loc, NULL_PTR,
4803 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4804 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4811 /* If this is a SUBREG of a hard register and the resulting register is
4812 of the wrong class, reload the whole SUBREG. This avoids needless
4813 copies if SUBREG_REG is multi-word. */
4814 if (GET_CODE (SUBREG_REG (x)) == REG
4815 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
4817 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
4819 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
4820 : REGNO_OK_FOR_BASE_P (regno)))
4822 push_reload (x, NULL_RTX, loc, NULL_PTR,
4823 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4824 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4832 register char *fmt = GET_RTX_FORMAT (code);
4835 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4838 find_reloads_address_1 (XEXP (x, i), context, &XEXP (x, i),
4839 opnum, type, ind_levels);
4846 /* X, which is found at *LOC, is a part of an address that needs to be
4847 reloaded into a register of class CLASS. If X is a constant, or if
4848 X is a PLUS that contains a constant, check that the constant is a
4849 legitimate operand and that we are supposed to be able to load
4850 it into the register.
4852 If not, force the constant into memory and reload the MEM instead.
4854 MODE is the mode to use, in case X is an integer constant.
4856 OPNUM and TYPE describe the purpose of any reloads made.
4858 IND_LEVELS says how many levels of indirect addressing this machine
4862 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
4865 enum reg_class class;
4866 enum machine_mode mode;
4868 enum reload_type type;
4872 && (! LEGITIMATE_CONSTANT_P (x)
4873 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
4875 rtx tem = x = force_const_mem (mode, x);
4876 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4877 opnum, type, ind_levels);
4880 else if (GET_CODE (x) == PLUS
4881 && CONSTANT_P (XEXP (x, 1))
4882 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
4883 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
4885 rtx tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
4887 x = gen_rtx (PLUS, GET_MODE (x), XEXP (x, 0), tem);
4888 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4889 opnum, type, ind_levels);
4892 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
4893 mode, VOIDmode, 0, 0, opnum, type);
4896 /* Substitute into the current INSN the registers into which we have reloaded
4897 the things that need reloading. The array `replacements'
4898 says contains the locations of all pointers that must be changed
4899 and says what to replace them with.
4901 Return the rtx that X translates into; usually X, but modified. */
4908 for (i = 0; i < n_replacements; i++)
4910 register struct replacement *r = &replacements[i];
4911 register rtx reloadreg = reload_reg_rtx[r->what];
4914 /* Encapsulate RELOADREG so its machine mode matches what
4915 used to be there. Note that gen_lowpart_common will
4916 do the wrong thing if RELOADREG is multi-word. RELOADREG
4917 will always be a REG here. */
4918 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
4919 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
4921 /* If we are putting this into a SUBREG and RELOADREG is a
4922 SUBREG, we would be making nested SUBREGs, so we have to fix
4923 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
4925 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
4927 if (GET_MODE (*r->subreg_loc)
4928 == GET_MODE (SUBREG_REG (reloadreg)))
4929 *r->subreg_loc = SUBREG_REG (reloadreg);
4932 *r->where = SUBREG_REG (reloadreg);
4933 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
4937 *r->where = reloadreg;
4939 /* If reload got no reg and isn't optional, something's wrong. */
4940 else if (! reload_optional[r->what])
4945 /* Make a copy of any replacements being done into X and move those copies
4946 to locations in Y, a copy of X. We only look at the highest level of
4950 copy_replacements (x, y)
4955 enum rtx_code code = GET_CODE (x);
4956 char *fmt = GET_RTX_FORMAT (code);
4957 struct replacement *r;
4959 /* We can't support X being a SUBREG because we might then need to know its
4960 location if something inside it was replaced. */
4964 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4966 for (j = 0; j < n_replacements; j++)
4968 if (replacements[j].subreg_loc == &XEXP (x, i))
4970 r = &replacements[n_replacements++];
4971 r->where = replacements[j].where;
4972 r->subreg_loc = &XEXP (y, i);
4973 r->what = replacements[j].what;
4974 r->mode = replacements[j].mode;
4976 else if (replacements[j].where == &XEXP (x, i))
4978 r = &replacements[n_replacements++];
4979 r->where = &XEXP (y, i);
4981 r->what = replacements[j].what;
4982 r->mode = replacements[j].mode;
4987 /* If LOC was scheduled to be replaced by something, return the replacement.
4988 Otherwise, return *LOC. */
4991 find_replacement (loc)
4994 struct replacement *r;
4996 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
4998 rtx reloadreg = reload_reg_rtx[r->what];
5000 if (reloadreg && r->where == loc)
5002 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
5003 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
5007 else if (reloadreg && r->subreg_loc == loc)
5009 /* RELOADREG must be either a REG or a SUBREG.
5011 ??? Is it actually still ever a SUBREG? If so, why? */
5013 if (GET_CODE (reloadreg) == REG)
5014 return gen_rtx (REG, GET_MODE (*loc),
5015 REGNO (reloadreg) + SUBREG_WORD (*loc));
5016 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
5019 return gen_rtx (SUBREG, GET_MODE (*loc), SUBREG_REG (reloadreg),
5020 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
5027 /* Return nonzero if register in range [REGNO, ENDREGNO)
5028 appears either explicitly or implicitly in X
5029 other than being stored into (except for earlyclobber operands).
5031 References contained within the substructure at LOC do not count.
5032 LOC may be zero, meaning don't ignore anything.
5034 This is similar to refers_to_regno_p in rtlanal.c except that we
5035 look at equivalences for pseudos that didn't get hard registers. */
5038 refers_to_regno_for_reload_p (regno, endregno, x, loc)
5039 int regno, endregno;
5044 register RTX_CODE code;
5051 code = GET_CODE (x);
5058 /* If this is a pseudo, a hard register must not have been allocated.
5059 X must therefore either be a constant or be in memory. */
5060 if (i >= FIRST_PSEUDO_REGISTER)
5062 if (reg_equiv_memory_loc[i])
5063 return refers_to_regno_for_reload_p (regno, endregno,
5064 reg_equiv_memory_loc[i],
5067 if (reg_equiv_constant[i])
5073 return (endregno > i
5074 && regno < i + (i < FIRST_PSEUDO_REGISTER
5075 ? HARD_REGNO_NREGS (i, GET_MODE (x))
5079 /* If this is a SUBREG of a hard reg, we can see exactly which
5080 registers are being modified. Otherwise, handle normally. */
5081 if (GET_CODE (SUBREG_REG (x)) == REG
5082 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5084 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5086 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
5087 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5089 return endregno > inner_regno && regno < inner_endregno;
5095 if (&SET_DEST (x) != loc
5096 /* Note setting a SUBREG counts as referring to the REG it is in for
5097 a pseudo but not for hard registers since we can
5098 treat each word individually. */
5099 && ((GET_CODE (SET_DEST (x)) == SUBREG
5100 && loc != &SUBREG_REG (SET_DEST (x))
5101 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
5102 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
5103 && refers_to_regno_for_reload_p (regno, endregno,
5104 SUBREG_REG (SET_DEST (x)),
5106 /* If the ouput is an earlyclobber operand, this is
5108 || ((GET_CODE (SET_DEST (x)) != REG
5109 || earlyclobber_operand_p (SET_DEST (x)))
5110 && refers_to_regno_for_reload_p (regno, endregno,
5111 SET_DEST (x), loc))))
5114 if (code == CLOBBER || loc == &SET_SRC (x))
5120 /* X does not match, so try its subexpressions. */
5122 fmt = GET_RTX_FORMAT (code);
5123 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5125 if (fmt[i] == 'e' && loc != &XEXP (x, i))
5133 if (refers_to_regno_for_reload_p (regno, endregno,
5137 else if (fmt[i] == 'E')
5140 for (j = XVECLEN (x, i) - 1; j >=0; j--)
5141 if (loc != &XVECEXP (x, i, j)
5142 && refers_to_regno_for_reload_p (regno, endregno,
5143 XVECEXP (x, i, j), loc))
5150 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5151 we check if any register number in X conflicts with the relevant register
5152 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5153 contains a MEM (we don't bother checking for memory addresses that can't
5154 conflict because we expect this to be a rare case.
5156 This function is similar to reg_overlap_mention_p in rtlanal.c except
5157 that we look at equivalences for pseudos that didn't get hard registers. */
5160 reg_overlap_mentioned_for_reload_p (x, in)
5163 int regno, endregno;
5165 if (GET_CODE (x) == SUBREG)
5167 regno = REGNO (SUBREG_REG (x));
5168 if (regno < FIRST_PSEUDO_REGISTER)
5169 regno += SUBREG_WORD (x);
5171 else if (GET_CODE (x) == REG)
5175 /* If this is a pseudo, it must not have been assigned a hard register.
5176 Therefore, it must either be in memory or be a constant. */
5178 if (regno >= FIRST_PSEUDO_REGISTER)
5180 if (reg_equiv_memory_loc[regno])
5181 return refers_to_mem_for_reload_p (in);
5182 else if (reg_equiv_constant[regno])
5187 else if (CONSTANT_P (x))
5189 else if (GET_CODE (x) == MEM)
5190 return refers_to_mem_for_reload_p (in);
5191 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
5192 || GET_CODE (x) == CC0)
5193 return reg_mentioned_p (x, in);
5197 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
5198 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5200 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
5203 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5207 refers_to_mem_for_reload_p (x)
5213 if (GET_CODE (x) == MEM)
5216 if (GET_CODE (x) == REG)
5217 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
5218 && reg_equiv_memory_loc[REGNO (x)]);
5220 fmt = GET_RTX_FORMAT (GET_CODE (x));
5221 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
5223 && (GET_CODE (XEXP (x, i)) == MEM
5224 || refers_to_mem_for_reload_p (XEXP (x, i))))
5230 /* Check the insns before INSN to see if there is a suitable register
5231 containing the same value as GOAL.
5232 If OTHER is -1, look for a register in class CLASS.
5233 Otherwise, just see if register number OTHER shares GOAL's value.
5235 Return an rtx for the register found, or zero if none is found.
5237 If RELOAD_REG_P is (short *)1,
5238 we reject any hard reg that appears in reload_reg_rtx
5239 because such a hard reg is also needed coming into this insn.
5241 If RELOAD_REG_P is any other nonzero value,
5242 it is a vector indexed by hard reg number
5243 and we reject any hard reg whose element in the vector is nonnegative
5244 as well as any that appears in reload_reg_rtx.
5246 If GOAL is zero, then GOALREG is a register number; we look
5247 for an equivalent for that register.
5249 MODE is the machine mode of the value we want an equivalence for.
5250 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5252 This function is used by jump.c as well as in the reload pass.
5254 If GOAL is the sum of the stack pointer and a constant, we treat it
5255 as if it were a constant except that sp is required to be unchanging. */
5258 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
5261 enum reg_class class;
5263 short *reload_reg_p;
5265 enum machine_mode mode;
5267 register rtx p = insn;
5268 rtx goaltry, valtry, value, where;
5270 register int regno = -1;
5274 int goal_mem_addr_varies = 0;
5275 int need_stable_sp = 0;
5281 else if (GET_CODE (goal) == REG)
5282 regno = REGNO (goal);
5283 else if (GET_CODE (goal) == MEM)
5285 enum rtx_code code = GET_CODE (XEXP (goal, 0));
5286 if (MEM_VOLATILE_P (goal))
5288 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
5290 /* An address with side effects must be reexecuted. */
5301 else if (CONSTANT_P (goal))
5303 else if (GET_CODE (goal) == PLUS
5304 && XEXP (goal, 0) == stack_pointer_rtx
5305 && CONSTANT_P (XEXP (goal, 1)))
5306 goal_const = need_stable_sp = 1;
5310 /* On some machines, certain regs must always be rejected
5311 because they don't behave the way ordinary registers do. */
5313 #ifdef OVERLAPPING_REGNO_P
5314 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5315 && OVERLAPPING_REGNO_P (regno))
5319 /* Scan insns back from INSN, looking for one that copies
5320 a value into or out of GOAL.
5321 Stop and give up if we reach a label. */
5326 if (p == 0 || GET_CODE (p) == CODE_LABEL)
5328 if (GET_CODE (p) == INSN
5329 /* If we don't want spill regs ... */
5330 && (! (reload_reg_p != 0
5331 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
5332 /* ... then ignore insns introduced by reload; they aren't useful
5333 and can cause results in reload_as_needed to be different
5334 from what they were when calculating the need for spills.
5335 If we notice an input-reload insn here, we will reject it below,
5336 but it might hide a usable equivalent. That makes bad code.
5337 It may even abort: perhaps no reg was spilled for this insn
5338 because it was assumed we would find that equivalent. */
5339 || INSN_UID (p) < reload_first_uid))
5342 pat = single_set (p);
5343 /* First check for something that sets some reg equal to GOAL. */
5346 && true_regnum (SET_SRC (pat)) == regno
5347 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5350 && true_regnum (SET_DEST (pat)) == regno
5351 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
5353 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
5354 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5356 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
5357 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
5359 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
5360 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
5361 /* If we are looking for a constant,
5362 and something equivalent to that constant was copied
5363 into a reg, we can use that reg. */
5364 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5366 && rtx_equal_p (XEXP (tem, 0), goal)
5367 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5368 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5370 && GET_CODE (SET_DEST (pat)) == REG
5371 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5372 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5373 && GET_CODE (goal) == CONST_INT
5374 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
5376 && rtx_equal_p (goal, goaltry)
5377 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
5379 && (valueno = true_regnum (valtry)) >= 0)
5380 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5382 && GET_CODE (SET_DEST (pat)) == REG
5383 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5384 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5385 && GET_CODE (goal) == CONST_INT
5386 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
5388 && rtx_equal_p (goal, goaltry)
5390 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
5391 && (valueno = true_regnum (valtry)) >= 0)))
5394 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
5395 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
5405 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5406 (or copying VALUE into GOAL, if GOAL is also a register).
5407 Now verify that VALUE is really valid. */
5409 /* VALUENO is the register number of VALUE; a hard register. */
5411 /* Don't try to re-use something that is killed in this insn. We want
5412 to be able to trust REG_UNUSED notes. */
5413 if (find_reg_note (where, REG_UNUSED, value))
5416 /* If we propose to get the value from the stack pointer or if GOAL is
5417 a MEM based on the stack pointer, we need a stable SP. */
5418 if (valueno == STACK_POINTER_REGNUM
5419 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
5423 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5424 if (GET_MODE (value) != mode)
5427 /* Reject VALUE if it was loaded from GOAL
5428 and is also a register that appears in the address of GOAL. */
5430 if (goal_mem && value == SET_DEST (PATTERN (where))
5431 && refers_to_regno_for_reload_p (valueno,
5433 + HARD_REGNO_NREGS (valueno, mode)),
5437 /* Reject registers that overlap GOAL. */
5439 if (!goal_mem && !goal_const
5440 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
5441 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
5444 /* Reject VALUE if it is one of the regs reserved for reloads.
5445 Reload1 knows how to reuse them anyway, and it would get
5446 confused if we allocated one without its knowledge.
5447 (Now that insns introduced by reload are ignored above,
5448 this case shouldn't happen, but I'm not positive.) */
5450 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
5451 && reload_reg_p[valueno] >= 0)
5454 /* On some machines, certain regs must always be rejected
5455 because they don't behave the way ordinary registers do. */
5457 #ifdef OVERLAPPING_REGNO_P
5458 if (OVERLAPPING_REGNO_P (valueno))
5462 nregs = HARD_REGNO_NREGS (regno, mode);
5463 valuenregs = HARD_REGNO_NREGS (valueno, mode);
5465 /* Reject VALUE if it is a register being used for an input reload
5466 even if it is not one of those reserved. */
5468 if (reload_reg_p != 0)
5471 for (i = 0; i < n_reloads; i++)
5472 if (reload_reg_rtx[i] != 0 && reload_in[i])
5474 int regno1 = REGNO (reload_reg_rtx[i]);
5475 int nregs1 = HARD_REGNO_NREGS (regno1,
5476 GET_MODE (reload_reg_rtx[i]));
5477 if (regno1 < valueno + valuenregs
5478 && regno1 + nregs1 > valueno)
5484 /* We must treat frame pointer as varying here,
5485 since it can vary--in a nonlocal goto as generated by expand_goto. */
5486 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
5488 /* Now verify that the values of GOAL and VALUE remain unaltered
5489 until INSN is reached. */
5498 /* Don't trust the conversion past a function call
5499 if either of the two is in a call-clobbered register, or memory. */
5500 if (GET_CODE (p) == CALL_INSN
5501 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5502 && call_used_regs[regno])
5504 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5505 && call_used_regs[valueno])
5511 #ifdef INSN_CLOBBERS_REGNO_P
5512 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5513 && INSN_CLOBBERS_REGNO_P (p, valueno))
5514 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5515 && INSN_CLOBBERS_REGNO_P (p, regno)))
5519 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
5521 /* If this insn P stores in either GOAL or VALUE, return 0.
5522 If GOAL is a memory ref and this insn writes memory, return 0.
5523 If GOAL is a memory ref and its address is not constant,
5524 and this insn P changes a register used in GOAL, return 0. */
5527 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
5529 register rtx dest = SET_DEST (pat);
5530 while (GET_CODE (dest) == SUBREG
5531 || GET_CODE (dest) == ZERO_EXTRACT
5532 || GET_CODE (dest) == SIGN_EXTRACT
5533 || GET_CODE (dest) == STRICT_LOW_PART)
5534 dest = XEXP (dest, 0);
5535 if (GET_CODE (dest) == REG)
5537 register int xregno = REGNO (dest);
5539 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5540 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5543 if (xregno < regno + nregs && xregno + xnregs > regno)
5545 if (xregno < valueno + valuenregs
5546 && xregno + xnregs > valueno)
5548 if (goal_mem_addr_varies
5549 && reg_overlap_mentioned_for_reload_p (dest, goal))
5552 else if (goal_mem && GET_CODE (dest) == MEM
5553 && ! push_operand (dest, GET_MODE (dest)))
5555 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
5558 else if (GET_CODE (pat) == PARALLEL)
5561 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
5563 register rtx v1 = XVECEXP (pat, 0, i);
5564 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
5566 register rtx dest = SET_DEST (v1);
5567 while (GET_CODE (dest) == SUBREG
5568 || GET_CODE (dest) == ZERO_EXTRACT
5569 || GET_CODE (dest) == SIGN_EXTRACT
5570 || GET_CODE (dest) == STRICT_LOW_PART)
5571 dest = XEXP (dest, 0);
5572 if (GET_CODE (dest) == REG)
5574 register int xregno = REGNO (dest);
5576 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5577 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5580 if (xregno < regno + nregs
5581 && xregno + xnregs > regno)
5583 if (xregno < valueno + valuenregs
5584 && xregno + xnregs > valueno)
5586 if (goal_mem_addr_varies
5587 && reg_overlap_mentioned_for_reload_p (dest,
5591 else if (goal_mem && GET_CODE (dest) == MEM
5592 && ! push_operand (dest, GET_MODE (dest)))
5594 else if (need_stable_sp
5595 && push_operand (dest, GET_MODE (dest)))
5601 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
5605 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
5606 link = XEXP (link, 1))
5608 pat = XEXP (link, 0);
5609 if (GET_CODE (pat) == CLOBBER)
5611 register rtx dest = SET_DEST (pat);
5612 while (GET_CODE (dest) == SUBREG
5613 || GET_CODE (dest) == ZERO_EXTRACT
5614 || GET_CODE (dest) == SIGN_EXTRACT
5615 || GET_CODE (dest) == STRICT_LOW_PART)
5616 dest = XEXP (dest, 0);
5617 if (GET_CODE (dest) == REG)
5619 register int xregno = REGNO (dest);
5621 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5622 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5625 if (xregno < regno + nregs
5626 && xregno + xnregs > regno)
5628 if (xregno < valueno + valuenregs
5629 && xregno + xnregs > valueno)
5631 if (goal_mem_addr_varies
5632 && reg_overlap_mentioned_for_reload_p (dest,
5636 else if (goal_mem && GET_CODE (dest) == MEM
5637 && ! push_operand (dest, GET_MODE (dest)))
5639 else if (need_stable_sp
5640 && push_operand (dest, GET_MODE (dest)))
5647 /* If this insn auto-increments or auto-decrements
5648 either regno or valueno, return 0 now.
5649 If GOAL is a memory ref and its address is not constant,
5650 and this insn P increments a register used in GOAL, return 0. */
5654 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
5655 if (REG_NOTE_KIND (link) == REG_INC
5656 && GET_CODE (XEXP (link, 0)) == REG)
5658 register int incno = REGNO (XEXP (link, 0));
5659 if (incno < regno + nregs && incno >= regno)
5661 if (incno < valueno + valuenregs && incno >= valueno)
5663 if (goal_mem_addr_varies
5664 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
5674 /* Find a place where INCED appears in an increment or decrement operator
5675 within X, and return the amount INCED is incremented or decremented by.
5676 The value is always positive. */
5679 find_inc_amount (x, inced)
5682 register enum rtx_code code = GET_CODE (x);
5688 register rtx addr = XEXP (x, 0);
5689 if ((GET_CODE (addr) == PRE_DEC
5690 || GET_CODE (addr) == POST_DEC
5691 || GET_CODE (addr) == PRE_INC
5692 || GET_CODE (addr) == POST_INC)
5693 && XEXP (addr, 0) == inced)
5694 return GET_MODE_SIZE (GET_MODE (x));
5697 fmt = GET_RTX_FORMAT (code);
5698 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5702 register int tem = find_inc_amount (XEXP (x, i), inced);
5709 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5711 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
5721 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5724 regno_clobbered_p (regno, insn)
5728 if (GET_CODE (PATTERN (insn)) == CLOBBER
5729 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
5730 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
5732 if (GET_CODE (PATTERN (insn)) == PARALLEL)
5734 int i = XVECLEN (PATTERN (insn), 0) - 1;
5738 rtx elt = XVECEXP (PATTERN (insn), 0, i);
5739 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
5740 && REGNO (XEXP (elt, 0)) == regno)
5748 static char *reload_when_needed_name[] =
5751 "RELOAD_FOR_OUTPUT",
5753 "RELOAD_FOR_INPUT_ADDRESS",
5754 "RELOAD_FOR_OUTPUT_ADDRESS",
5755 "RELOAD_FOR_OPERAND_ADDRESS",
5756 "RELOAD_FOR_OPADDR_ADDR",
5758 "RELOAD_FOR_OTHER_ADDRESS"
5761 static char *reg_class_names[] = REG_CLASS_NAMES;
5763 /* This function is used to print the variables set by 'find_reloads' */
5770 fprintf (stderr, "\nn_reloads = %d\n", n_reloads);
5772 for (r = 0; r < n_reloads; r++)
5774 fprintf (stderr, "\nRELOAD %d\n", r);
5778 fprintf (stderr, "\nreload_in (%s) = ",
5779 GET_MODE_NAME (reload_inmode[r]));
5780 debug_rtx (reload_in[r]);
5785 fprintf (stderr, "\nreload_out (%s) = ",
5786 GET_MODE_NAME (reload_outmode[r]));
5787 debug_rtx (reload_out[r]);
5790 fprintf (stderr, "%s, ", reg_class_names[(int) reload_reg_class[r]]);
5792 fprintf (stderr, "%s (opnum = %d)",
5793 reload_when_needed_name[(int)reload_when_needed[r]],
5796 if (reload_optional[r])
5797 fprintf (stderr, ", optional");
5800 fprintf (stderr, ", inc by %d\n", reload_inc[r]);
5802 if (reload_nocombine[r])
5803 fprintf (stderr, ", can combine", reload_nocombine[r]);
5805 if (reload_secondary_p[r])
5806 fprintf (stderr, ", secondary_reload_p");
5808 if (reload_in_reg[r])
5810 fprintf (stderr, "\nreload_in_reg:\t\t\t");
5811 debug_rtx (reload_in_reg[r]);
5814 if (reload_reg_rtx[r])
5816 fprintf (stderr, "\nreload_reg_rtx:\t\t\t");
5817 debug_rtx (reload_reg_rtx[r]);
5820 if (reload_secondary_in_reload[r] != -1)
5822 fprintf (stderr, "\nsecondary_in_reload = ");
5823 fprintf (stderr, "%d ", reload_secondary_in_reload[r]);
5826 if (reload_secondary_out_reload[r] != -1)
5828 if (reload_secondary_in_reload[r] != -1)
5829 fprintf (stderr, ", secondary_out_reload = ");
5831 fprintf (stderr, "\nsecondary_out_reload = ");
5833 fprintf (stderr, "%d", reload_secondary_out_reload[r]);
5837 if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
5839 fprintf (stderr, "\nsecondary_in_icode = ");
5840 fprintf (stderr, "%s", insn_name[r]);
5843 if (reload_secondary_out_icode[r] != CODE_FOR_nothing)
5845 if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
5846 fprintf (stderr, ", secondary_out_icode = ");
5848 fprintf (stderr, "\nsecondary_out_icode = ");
5850 fprintf (stderr, "%s ", insn_name[r]);
5852 fprintf (stderr, "\n");
5855 fprintf (stderr, "\n");