1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This file contains subroutines used only from the file reload1.c.
22 It knows how to scan one insn for operands and values
23 that need to be copied into registers to make valid code.
24 It also finds other operands and values which are valid
25 but for which equivalent values in registers exist and
26 ought to be used instead.
28 Before processing the first insn of the function, call `init_reload'.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
91 #include "insn-config.h"
92 #include "insn-codes.h"
96 #include "hard-reg-set.h"
100 #ifndef REGISTER_MOVE_COST
101 #define REGISTER_MOVE_COST(x, y) 2
104 /* The variables set up by `find_reloads' are:
106 n_reloads number of distinct reloads needed; max reload # + 1
107 tables indexed by reload number
108 reload_in rtx for value to reload from
109 reload_out rtx for where to store reload-reg afterward if nec
110 (often the same as reload_in)
111 reload_reg_class enum reg_class, saying what regs to reload into
112 reload_inmode enum machine_mode; mode this operand should have
113 when reloaded, on input.
114 reload_outmode enum machine_mode; mode this operand should have
115 when reloaded, on output.
116 reload_strict_low char; currently always zero; used to mean that this
117 reload is inside a STRICT_LOW_PART, but we don't
118 need to know this anymore.
119 reload_optional char, nonzero for an optional reload.
120 Optional reloads are ignored unless the
121 value is already sitting in a register.
122 reload_inc int, positive amount to increment or decrement by if
123 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
124 Ignored otherwise (don't assume it is zero).
125 reload_in_reg rtx. A reg for which reload_in is the equivalent.
126 If reload_in is a symbol_ref which came from
127 reg_equiv_constant, then this is the pseudo
128 which has that symbol_ref as equivalent.
129 reload_reg_rtx rtx. This is the register to reload into.
130 If it is zero when `find_reloads' returns,
131 you must find a suitable register in the class
132 specified by reload_reg_class, and store here
133 an rtx for that register with mode from
134 reload_inmode or reload_outmode.
135 reload_nocombine char, nonzero if this reload shouldn't be
136 combined with another reload.
137 reload_needed_for rtx, operand this reload is needed for address of.
138 0 means it isn't needed for addressing.
139 reload_needed_for_multiple
140 int, 1 if this reload needed for more than one thing.
141 reload_when_needed enum, classifies reload as needed either for
142 addressing an input reload, addressing an output,
143 for addressing a non-reloaded mem ref,
144 or for unspecified purposes (i.e., more than one
146 reload_secondary_reload int, gives the reload number of a secondary
147 reload, when needed; otherwise -1
148 reload_secondary_p int, 1 if this is a secondary register for one
150 reload_secondary_icode enum insn_code, if a secondary reload is required,
151 gives the INSN_CODE that uses the secondary
152 reload as a scratch register, or CODE_FOR_nothing
153 if the secondary reload register is to be an
154 intermediate register. */
157 rtx reload_in[MAX_RELOADS];
158 rtx reload_out[MAX_RELOADS];
159 enum reg_class reload_reg_class[MAX_RELOADS];
160 enum machine_mode reload_inmode[MAX_RELOADS];
161 enum machine_mode reload_outmode[MAX_RELOADS];
162 char reload_strict_low[MAX_RELOADS];
163 rtx reload_reg_rtx[MAX_RELOADS];
164 char reload_optional[MAX_RELOADS];
165 int reload_inc[MAX_RELOADS];
166 rtx reload_in_reg[MAX_RELOADS];
167 char reload_nocombine[MAX_RELOADS];
168 int reload_needed_for_multiple[MAX_RELOADS];
169 rtx reload_needed_for[MAX_RELOADS];
170 enum reload_when_needed reload_when_needed[MAX_RELOADS];
171 int reload_secondary_reload[MAX_RELOADS];
172 int reload_secondary_p[MAX_RELOADS];
173 enum insn_code reload_secondary_icode[MAX_RELOADS];
175 /* All the "earlyclobber" operands of the current insn
176 are recorded here. */
178 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
180 /* Replacing reloads.
182 If `replace_reloads' is nonzero, then as each reload is recorded
183 an entry is made for it in the table `replacements'.
184 Then later `subst_reloads' can look through that table and
185 perform all the replacements needed. */
187 /* Nonzero means record the places to replace. */
188 static int replace_reloads;
190 /* Each replacement is recorded with a structure like this. */
193 rtx *where; /* Location to store in */
194 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
195 a SUBREG; 0 otherwise. */
196 int what; /* which reload this is for */
197 enum machine_mode mode; /* mode it must have */
200 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
202 /* Number of replacements currently recorded. */
203 static int n_replacements;
205 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
206 (see reg_equiv_address). */
207 static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
208 static int n_memlocs;
210 #ifdef SECONDARY_MEMORY_NEEDED
212 /* Save MEMs needed to copy from one class of registers to another. One MEM
213 is used per mode, but normally only one or two modes are ever used.
215 We keep two versions, before and after register elimination. */
217 static rtx secondary_memlocs[NUM_MACHINE_MODES];
218 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES];
221 /* The instruction we are doing reloads for;
222 so we can test whether a register dies in it. */
223 static rtx this_insn;
225 /* Nonzero if this instruction is a user-specified asm with operands. */
226 static int this_insn_is_asm;
228 /* If hard_regs_live_known is nonzero,
229 we can tell which hard regs are currently live,
230 at least enough to succeed in choosing dummy reloads. */
231 static int hard_regs_live_known;
233 /* Indexed by hard reg number,
234 element is nonegative if hard reg has been spilled.
235 This vector is passed to `find_reloads' as an argument
236 and is not changed here. */
237 static short *static_reload_reg_p;
239 /* Set to 1 in subst_reg_equivs if it changes anything. */
240 static int subst_reg_equivs_changed;
242 /* On return from push_reload, holds the reload-number for the OUT
243 operand, which can be different for that from the input operand. */
244 static int output_reloadnum;
246 static int alternative_allows_memconst ();
247 static rtx find_dummy_reload ();
248 static rtx find_reloads_toplev ();
249 static int find_reloads_address ();
250 static int find_reloads_address_1 ();
251 static void find_reloads_address_part ();
252 static int hard_reg_set_here_p ();
253 /* static rtx forget_volatility (); */
254 static rtx subst_reg_equivs ();
255 static rtx subst_indexed_address ();
256 void copy_replacements ();
257 rtx find_equiv_reg ();
258 static int find_inc_amount ();
260 #ifdef HAVE_SECONDARY_RELOADS
262 /* Determine if any secondary reloads are needed for loading (if IN_P is
263 non-zero) or storing (if IN_P is zero) X to or from a reload register of
264 register class RELOAD_CLASS in mode RELOAD_MODE.
266 Return the register class of a secondary reload register, or NO_REGS if
267 none. *PMODE is set to the mode that the register is required in.
268 If the reload register is needed as a scratch register instead of an
269 intermediate register, *PICODE is set to the insn_code of the insn to be
270 used to load or store the primary reload register; otherwise *PICODE
271 is set to CODE_FOR_nothing.
273 In some cases (such as storing MQ into an external memory location on
274 the RT), both an intermediate register and a scratch register. In that
275 case, *PICODE is set to CODE_FOR_nothing, the class for the intermediate
276 register is returned, and the *PTERTIARY_... variables are set to describe
277 the scratch register. */
279 static enum reg_class
280 find_secondary_reload (x, reload_class, reload_mode, in_p, picode, pmode,
281 ptertiary_class, ptertiary_icode, ptertiary_mode)
283 enum reg_class reload_class;
284 enum machine_mode reload_mode;
286 enum insn_code *picode;
287 enum machine_mode *pmode;
288 enum reg_class *ptertiary_class;
289 enum insn_code *ptertiary_icode;
290 enum machine_mode *ptertiary_mode;
292 enum reg_class class = NO_REGS;
293 enum machine_mode mode = reload_mode;
294 enum insn_code icode = CODE_FOR_nothing;
295 enum reg_class t_class = NO_REGS;
296 enum machine_mode t_mode = VOIDmode;
297 enum insn_code t_icode = CODE_FOR_nothing;
299 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
300 is still a pseudo-register by now, it *must* have an equivalent MEM
301 but we don't want to assume that), use that equivalent when seeing if
302 a secondary reload is needed since whether or not a reload is needed
303 might be sensitive to the form of the MEM. */
305 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
306 && reg_equiv_mem[REGNO (x)] != 0)
307 x = reg_equiv_mem[REGNO (x)];
309 #ifdef SECONDARY_INPUT_RELOAD_CLASS
311 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
314 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
316 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
319 /* If we don't need any secondary registers, go away; the rest of the
320 values won't be used. */
321 if (class == NO_REGS)
324 /* Get a possible insn to use. If the predicate doesn't accept X, don't
327 icode = (in_p ? reload_in_optab[(int) reload_mode]
328 : reload_out_optab[(int) reload_mode]);
330 if (icode != CODE_FOR_nothing
331 && insn_operand_predicate[(int) icode][in_p]
332 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
333 icode = CODE_FOR_nothing;
335 /* If we will be using an insn, see if it can directly handle the reload
336 register we will be using. If it can, the secondary reload is for a
337 scratch register. If it can't, we will use the secondary reload for
338 an intermediate register and require a tertiary reload for the scratch
341 if (icode != CODE_FOR_nothing)
343 /* If IN_P is non-zero, the reload register will be the output in
344 operand 0. If IN_P is zero, the reload register will be the input
345 in operand 1. Outputs should have an initial "=", which we must
348 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
349 enum reg_class insn_class
350 = (insn_letter == 'r' ? GENERAL_REGS
351 : REG_CLASS_FROM_LETTER (insn_letter));
353 if (insn_class == NO_REGS
354 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
355 /* The scratch register's constraint must start with "=&". */
356 || insn_operand_constraint[(int) icode][2][0] != '='
357 || insn_operand_constraint[(int) icode][2][1] != '&')
360 if (reg_class_subset_p (reload_class, insn_class))
361 mode = insn_operand_mode[(int) icode][2];
364 char t_letter = insn_operand_constraint[(int) icode][2][2];
366 t_mode = insn_operand_mode[(int) icode][2];
367 t_class = (t_letter == 'r' ? GENERAL_REGS
368 : REG_CLASS_FROM_LETTER (t_letter));
370 icode = CODE_FOR_nothing;
376 *ptertiary_class = t_class;
377 *ptertiary_mode = t_mode;
378 *ptertiary_icode = t_icode;
382 #endif /* HAVE_SECONDARY_RELOADS */
384 #ifdef SECONDARY_MEMORY_NEEDED
386 /* Return a memory location that will be used to copy X in mode MODE.
387 If we haven't already made a location for this mode in this insn,
388 call find_reloads_address on the location being returned. */
391 get_secondary_mem (x, mode)
393 enum machine_mode mode;
398 /* If MODE is narrower than a word, widen it. This is required because
399 most machines that require these memory locations do not support
400 short load and stores from all registers (e.g., FP registers). We could
401 possibly conditionalize this, but we lose nothing by doing the wider
404 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
405 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
407 /* If we already have made a MEM for this insn, return it. */
408 if (secondary_memlocs_elim[(int) mode] != 0)
409 return secondary_memlocs_elim[(int) mode];
411 /* If this is the first time we've tried to get a MEM for this mode,
412 allocate a new one. `something_changed' in reload will get set
413 by noticing that the frame size has changed. */
415 if (secondary_memlocs[(int) mode] == 0)
416 secondary_memlocs[(int) mode]
417 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
419 /* Get a version of the address doing any eliminations needed. If that
420 didn't give us a new MEM, make a new one if it isn't valid. */
422 loc = eliminate_regs (secondary_memlocs[(int) mode], 0, NULL_RTX);
423 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
425 if (! mem_valid && loc == secondary_memlocs[(int) mode])
426 loc = copy_rtx (loc);
428 /* The only time the call below will do anything is if the stack
429 offset is too large. In that case IND_LEVELS doesn't matter, so we
430 can just pass a zero. */
432 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0), x, 0);
434 /* If the address was not valid to begin with, we can not save it, because
435 there is no guarantee that the reloads needed to make it valid will
436 occur before every use of this address. */
439 secondary_memlocs_elim[(int) mode] = loc;
444 /* Clear any secondary memory locations we've made. */
447 clear_secondary_mem ()
451 for (i = 0; i < NUM_MACHINE_MODES; i++)
452 secondary_memlocs[i] = 0;
454 #endif /* SECONDARY_MEMORY_NEEDED */
456 /* Record one (sometimes two) reload that needs to be performed.
457 IN is an rtx saying where the data are to be found before this instruction.
458 OUT says where they must be stored after the instruction.
459 (IN is zero for data not read, and OUT is zero for data not written.)
460 INLOC and OUTLOC point to the places in the instructions where
461 IN and OUT were found.
462 CLASS is a register class required for the reloaded data.
463 INMODE is the machine mode that the instruction requires
464 for the reg that replaces IN and OUTMODE is likewise for OUT.
466 If IN is zero, then OUT's location and mode should be passed as
469 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
471 OPTIONAL nonzero means this reload does not need to be performed:
472 it can be discarded if that is more convenient.
474 The return value is the reload-number for this reload.
476 If both IN and OUT are nonzero, in some rare cases we might
477 want to make two separate reloads. (Actually we never do this now.)
478 Therefore, the reload-number for OUT is stored in
479 output_reloadnum when we return; the return value applies to IN.
480 Usually (presently always), when IN and OUT are nonzero,
481 the two reload-numbers are equal, but the caller should be careful to
485 push_reload (in, out, inloc, outloc, class,
486 inmode, outmode, strict_low, optional, needed_for)
487 register rtx in, out;
489 enum reg_class class;
490 enum machine_mode inmode, outmode;
497 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
498 int secondary_reload = -1;
499 enum insn_code secondary_icode = CODE_FOR_nothing;
501 /* Compare two RTX's. */
502 #define MATCHES(x, y) \
503 (x == y || (x != 0 && (GET_CODE (x) == REG \
504 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
505 : rtx_equal_p (x, y) && ! side_effects_p (x))))
507 /* INMODE and/or OUTMODE could be VOIDmode if no mode
508 has been specified for the operand. In that case,
509 use the operand's mode as the mode to reload. */
510 if (inmode == VOIDmode && in != 0)
511 inmode = GET_MODE (in);
512 if (outmode == VOIDmode && out != 0)
513 outmode = GET_MODE (out);
515 /* If IN is a pseudo register everywhere-equivalent to a constant, and
516 it is not in a hard register, reload straight from the constant,
517 since we want to get rid of such pseudo registers.
518 Often this is done earlier, but not always in find_reloads_address. */
519 if (in != 0 && GET_CODE (in) == REG)
521 register int regno = REGNO (in);
523 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
524 && reg_equiv_constant[regno] != 0)
525 in = reg_equiv_constant[regno];
528 /* Likewise for OUT. Of course, OUT will never be equivalent to
529 an actual constant, but it might be equivalent to a memory location
530 (in the case of a parameter). */
531 if (out != 0 && GET_CODE (out) == REG)
533 register int regno = REGNO (out);
535 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
536 && reg_equiv_constant[regno] != 0)
537 out = reg_equiv_constant[regno];
540 /* If we have a read-write operand with an address side-effect,
541 change either IN or OUT so the side-effect happens only once. */
542 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
544 if (GET_CODE (XEXP (in, 0)) == POST_INC
545 || GET_CODE (XEXP (in, 0)) == POST_DEC)
546 in = gen_rtx (MEM, GET_MODE (in), XEXP (XEXP (in, 0), 0));
547 if (GET_CODE (XEXP (in, 0)) == PRE_INC
548 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
549 out = gen_rtx (MEM, GET_MODE (out), XEXP (XEXP (out, 0), 0));
552 /* If we are reloading a (SUBREG (MEM ...) ...) or (SUBREG constant ...),
553 really reload just the inside expression in its own mode.
554 If we have (SUBREG:M1 (REG:M2 ...) ...) with M1 wider than M2 and the
555 register is a pseudo, this will become the same as the above case.
556 Do the same for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
557 either M1 is not valid for R or M2 is wider than a word but we only
558 need one word to store an M2-sized quantity in R.
559 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
560 we can't handle it here because CONST_INT does not indicate a mode.
562 Similarly, we must reload the inside expression if we have a
563 STRICT_LOW_PART (presumably, in == out in the cas).
565 Also reload the inner expression if it does not require a secondary
566 reload but the SUBREG does. */
568 if (in != 0 && GET_CODE (in) == SUBREG
569 && (GET_CODE (SUBREG_REG (in)) != REG
571 || (GET_CODE (SUBREG_REG (in)) == REG
572 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER
573 && (GET_MODE_SIZE (inmode)
574 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))))
575 || (GET_CODE (SUBREG_REG (in)) == REG
576 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
577 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in)), inmode)
578 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
579 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
581 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
583 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
584 GET_MODE (SUBREG_REG (in)))))))
585 #ifdef SECONDARY_INPUT_RELOAD_CLASS
586 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
587 && (SECONDARY_INPUT_RELOAD_CLASS (class,
588 GET_MODE (SUBREG_REG (in)),
594 in_subreg_loc = inloc;
595 inloc = &SUBREG_REG (in);
597 if (GET_CODE (in) == MEM)
598 /* This is supposed to happen only for paradoxical subregs made by
599 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
600 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
602 inmode = GET_MODE (in);
605 /* Similarly for paradoxical and problematical SUBREGs on the output.
606 Note that there is no reason we need worry about the previous value
607 of SUBREG_REG (out); even if wider than out,
608 storing in a subreg is entitled to clobber it all
609 (except in the case of STRICT_LOW_PART,
610 and in that case the constraint should label it input-output.) */
611 if (out != 0 && GET_CODE (out) == SUBREG
612 && (GET_CODE (SUBREG_REG (out)) != REG
614 || (GET_CODE (SUBREG_REG (out)) == REG
615 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER
616 && (GET_MODE_SIZE (outmode)
617 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))))
618 || (GET_CODE (SUBREG_REG (out)) == REG
619 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
620 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)), outmode)
621 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
622 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
624 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
626 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
627 GET_MODE (SUBREG_REG (out)))))))
628 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
629 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
630 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
631 GET_MODE (SUBREG_REG (out)),
637 out_subreg_loc = outloc;
638 outloc = &SUBREG_REG (out);
640 if (GET_CODE (out) == MEM
641 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
643 outmode = GET_MODE (out);
646 /* That's all we use STRICT_LOW for, so clear it. At some point,
647 we may want to get rid of reload_strict_low. */
650 /* If IN appears in OUT, we can't share any input-only reload for IN. */
651 if (in != 0 && out != 0 && GET_CODE (out) == MEM
652 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
653 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
656 /* If IN is a SUBREG of a hard register, make a new REG. This
657 simplifies some of the cases below. */
659 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
660 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
661 in = gen_rtx (REG, GET_MODE (in),
662 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
664 /* Similarly for OUT. */
665 if (out != 0 && GET_CODE (out) == SUBREG
666 && GET_CODE (SUBREG_REG (out)) == REG
667 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
668 out = gen_rtx (REG, GET_MODE (out),
669 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
671 /* Narrow down the class of register wanted if that is
672 desirable on this machine for efficiency. */
674 class = PREFERRED_RELOAD_CLASS (in, class);
676 /* Output reloads may need analogous treatment, different in detail. */
677 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
679 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
682 /* Make sure we use a class that can handle the actual pseudo
683 inside any subreg. For example, on the 386, QImode regs
684 can appear within SImode subregs. Although GENERAL_REGS
685 can handle SImode, QImode needs a smaller class. */
686 #ifdef LIMIT_RELOAD_CLASS
688 class = LIMIT_RELOAD_CLASS (inmode, class);
689 else if (in != 0 && GET_CODE (in) == SUBREG)
690 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
693 class = LIMIT_RELOAD_CLASS (outmode, class);
694 if (out != 0 && GET_CODE (out) == SUBREG)
695 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
698 /* Verify that this class is at least possible for the mode that
700 if (this_insn_is_asm)
702 enum machine_mode mode;
703 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
707 if (mode == VOIDmode)
709 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
716 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
717 if (HARD_REGNO_MODE_OK (i, mode)
718 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
720 int nregs = HARD_REGNO_NREGS (i, mode);
723 for (j = 1; j < nregs; j++)
724 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
729 if (i == FIRST_PSEUDO_REGISTER)
731 error_for_asm (this_insn, "impossible register constraint in `asm'");
736 if (class == NO_REGS)
739 /* We can use an existing reload if the class is right
740 and at least one of IN and OUT is a match
741 and the other is at worst neutral.
742 (A zero compared against anything is neutral.) */
743 for (i = 0; i < n_reloads; i++)
744 if ((reg_class_subset_p (class, reload_reg_class[i])
745 || reg_class_subset_p (reload_reg_class[i], class))
746 && reload_strict_low[i] == strict_low
747 /* If the existing reload has a register, it must fit our class. */
748 && (reload_reg_rtx[i] == 0
749 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
750 true_regnum (reload_reg_rtx[i])))
751 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
752 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
754 (out != 0 && MATCHES (reload_out[i], out)
755 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in)))))
758 /* Reloading a plain reg for input can match a reload to postincrement
759 that reg, since the postincrement's value is the right value.
760 Likewise, it can match a preincrement reload, since we regard
761 the preincrementation as happening before any ref in this insn
764 for (i = 0; i < n_reloads; i++)
765 if ((reg_class_subset_p (class, reload_reg_class[i])
766 || reg_class_subset_p (reload_reg_class[i], class))
767 /* If the existing reload has a register, it must fit our class. */
768 && (reload_reg_rtx[i] == 0
769 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
770 true_regnum (reload_reg_rtx[i])))
771 && reload_strict_low[i] == strict_low
772 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
773 && ((GET_CODE (in) == REG
774 && (GET_CODE (reload_in[i]) == POST_INC
775 || GET_CODE (reload_in[i]) == POST_DEC
776 || GET_CODE (reload_in[i]) == PRE_INC
777 || GET_CODE (reload_in[i]) == PRE_DEC)
778 && MATCHES (XEXP (reload_in[i], 0), in))
780 (GET_CODE (reload_in[i]) == REG
781 && (GET_CODE (in) == POST_INC
782 || GET_CODE (in) == POST_DEC
783 || GET_CODE (in) == PRE_INC
784 || GET_CODE (in) == PRE_DEC)
785 && MATCHES (XEXP (in, 0), reload_in[i]))))
787 /* Make sure reload_in ultimately has the increment,
788 not the plain register. */
789 if (GET_CODE (in) == REG)
796 #ifdef HAVE_SECONDARY_RELOADS
797 enum reg_class secondary_class = NO_REGS;
798 enum reg_class secondary_out_class = NO_REGS;
799 enum machine_mode secondary_mode = inmode;
800 enum machine_mode secondary_out_mode = outmode;
801 enum insn_code secondary_icode;
802 enum insn_code secondary_out_icode = CODE_FOR_nothing;
803 enum reg_class tertiary_class = NO_REGS;
804 enum reg_class tertiary_out_class = NO_REGS;
805 enum machine_mode tertiary_mode;
806 enum machine_mode tertiary_out_mode;
807 enum insn_code tertiary_icode;
808 enum insn_code tertiary_out_icode = CODE_FOR_nothing;
809 int tertiary_reload = -1;
811 /* See if we need a secondary reload register to move between
812 CLASS and IN or CLASS and OUT. Get the modes and icodes to
813 use for each of them if so. */
815 #ifdef SECONDARY_INPUT_RELOAD_CLASS
818 = find_secondary_reload (in, class, inmode, 1, &secondary_icode,
819 &secondary_mode, &tertiary_class,
820 &tertiary_icode, &tertiary_mode);
823 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
824 if (out != 0 && GET_CODE (out) != SCRATCH)
826 = find_secondary_reload (out, class, outmode, 0,
827 &secondary_out_icode, &secondary_out_mode,
828 &tertiary_out_class, &tertiary_out_icode,
832 /* We can only record one secondary and one tertiary reload. If both
833 IN and OUT need secondary reloads, we can only make an in-out
834 reload if neither need an insn and if the classes are compatible. */
836 if (secondary_class != NO_REGS && secondary_out_class != NO_REGS
837 && reg_class_subset_p (secondary_out_class, secondary_class))
838 secondary_class = secondary_out_class;
840 if (secondary_class != NO_REGS && secondary_out_class != NO_REGS
841 && (! reg_class_subset_p (secondary_class, secondary_out_class)
842 || secondary_icode != CODE_FOR_nothing
843 || secondary_out_icode != CODE_FOR_nothing))
845 push_reload (NULL_RTX, out, NULL_PTR, outloc, class,
846 VOIDmode, outmode, strict_low, optional, needed_for);
852 /* If we need a secondary reload for OUT but not IN, copy the
854 if (secondary_class == NO_REGS && secondary_out_class != NO_REGS)
856 secondary_class = secondary_out_class;
857 secondary_icode = secondary_out_icode;
858 tertiary_class = tertiary_out_class;
859 tertiary_icode = tertiary_out_icode;
860 tertiary_mode = tertiary_out_mode;
863 if (secondary_class != NO_REGS)
865 /* If we need a tertiary reload, see if we have one we can reuse
868 if (tertiary_class != NO_REGS)
870 for (tertiary_reload = 0; tertiary_reload < n_reloads;
872 if (reload_secondary_p[tertiary_reload]
873 && (reg_class_subset_p (tertiary_class,
874 reload_reg_class[tertiary_reload])
875 || reg_class_subset_p (reload_reg_class[tertiary_reload],
877 && ((reload_inmode[tertiary_reload] == tertiary_mode)
878 || reload_inmode[tertiary_reload] == VOIDmode)
879 && ((reload_outmode[tertiary_reload] == tertiary_mode)
880 || reload_outmode[tertiary_reload] == VOIDmode)
881 && (reload_secondary_icode[tertiary_reload]
882 == CODE_FOR_nothing))
885 if (tertiary_mode != VOIDmode)
886 reload_inmode[tertiary_reload] = tertiary_mode;
887 if (tertiary_out_mode != VOIDmode)
888 reload_outmode[tertiary_reload] = tertiary_mode;
889 if (reg_class_subset_p (tertiary_class,
890 reload_reg_class[tertiary_reload]))
891 reload_reg_class[tertiary_reload] = tertiary_class;
892 if (reload_needed_for[tertiary_reload] != needed_for)
893 reload_needed_for_multiple[tertiary_reload] = 1;
894 reload_optional[tertiary_reload] &= optional;
895 reload_secondary_p[tertiary_reload] = 1;
898 if (tertiary_reload == n_reloads)
900 /* We need to make a new tertiary reload for this register
902 reload_in[tertiary_reload] = reload_out[tertiary_reload] = 0;
903 reload_reg_class[tertiary_reload] = tertiary_class;
904 reload_inmode[tertiary_reload] = tertiary_mode;
905 reload_outmode[tertiary_reload] = tertiary_mode;
906 reload_reg_rtx[tertiary_reload] = 0;
907 reload_optional[tertiary_reload] = optional;
908 reload_inc[tertiary_reload] = 0;
909 reload_strict_low[tertiary_reload] = 0;
910 /* Maybe we could combine these, but it seems too tricky. */
911 reload_nocombine[tertiary_reload] = 1;
912 reload_in_reg[tertiary_reload] = 0;
913 reload_needed_for[tertiary_reload] = needed_for;
914 reload_needed_for_multiple[tertiary_reload] = 0;
915 reload_secondary_reload[tertiary_reload] = -1;
916 reload_secondary_icode[tertiary_reload] = CODE_FOR_nothing;
917 reload_secondary_p[tertiary_reload] = 1;
924 /* See if we can reuse an existing secondary reload. */
925 for (secondary_reload = 0; secondary_reload < n_reloads;
927 if (reload_secondary_p[secondary_reload]
928 && (reg_class_subset_p (secondary_class,
929 reload_reg_class[secondary_reload])
930 || reg_class_subset_p (reload_reg_class[secondary_reload],
932 && ((reload_inmode[secondary_reload] == secondary_mode)
933 || reload_inmode[secondary_reload] == VOIDmode)
934 && ((reload_outmode[secondary_reload] == secondary_out_mode)
935 || reload_outmode[secondary_reload] == VOIDmode)
936 && reload_secondary_reload[secondary_reload] == tertiary_reload
937 && reload_secondary_icode[secondary_reload] == tertiary_icode)
939 if (secondary_mode != VOIDmode)
940 reload_inmode[secondary_reload] = secondary_mode;
941 if (secondary_out_mode != VOIDmode)
942 reload_outmode[secondary_reload] = secondary_out_mode;
943 if (reg_class_subset_p (secondary_class,
944 reload_reg_class[secondary_reload]))
945 reload_reg_class[secondary_reload] = secondary_class;
946 if (reload_needed_for[secondary_reload] != needed_for)
947 reload_needed_for_multiple[secondary_reload] = 1;
948 reload_optional[secondary_reload] &= optional;
949 reload_secondary_p[secondary_reload] = 1;
952 if (secondary_reload == n_reloads)
954 /* We need to make a new secondary reload for this register
956 reload_in[secondary_reload] = reload_out[secondary_reload] = 0;
957 reload_reg_class[secondary_reload] = secondary_class;
958 reload_inmode[secondary_reload] = secondary_mode;
959 reload_outmode[secondary_reload] = secondary_out_mode;
960 reload_reg_rtx[secondary_reload] = 0;
961 reload_optional[secondary_reload] = optional;
962 reload_inc[secondary_reload] = 0;
963 reload_strict_low[secondary_reload] = 0;
964 /* Maybe we could combine these, but it seems too tricky. */
965 reload_nocombine[secondary_reload] = 1;
966 reload_in_reg[secondary_reload] = 0;
967 reload_needed_for[secondary_reload] = needed_for;
968 reload_needed_for_multiple[secondary_reload] = 0;
969 reload_secondary_reload[secondary_reload] = tertiary_reload;
970 reload_secondary_icode[secondary_reload] = tertiary_icode;
971 reload_secondary_p[secondary_reload] = 1;
976 #ifdef SECONDARY_MEMORY_NEEDED
977 /* If we need a memory location to copy between the two
978 reload regs, set it up now. */
980 if (in != 0 && secondary_icode == CODE_FOR_nothing
981 && SECONDARY_MEMORY_NEEDED (secondary_class, class, inmode))
982 get_secondary_mem (in, inmode);
984 if (out != 0 && secondary_icode == CODE_FOR_nothing
985 && SECONDARY_MEMORY_NEEDED (class, secondary_class, outmode))
986 get_secondary_mem (out, outmode);
992 /* We found no existing reload suitable for re-use.
993 So add an additional reload. */
997 reload_reg_class[i] = class;
998 reload_inmode[i] = inmode;
999 reload_outmode[i] = outmode;
1000 reload_reg_rtx[i] = 0;
1001 reload_optional[i] = optional;
1003 reload_strict_low[i] = strict_low;
1004 reload_nocombine[i] = 0;
1005 reload_in_reg[i] = inloc ? *inloc : 0;
1006 reload_needed_for[i] = needed_for;
1007 reload_needed_for_multiple[i] = 0;
1008 reload_secondary_reload[i] = secondary_reload;
1009 reload_secondary_icode[i] = secondary_icode;
1010 reload_secondary_p[i] = 0;
1014 #ifdef SECONDARY_MEMORY_NEEDED
1015 /* If a memory location is needed for the copy, make one. */
1016 if (in != 0 && GET_CODE (in) == REG
1017 && REGNO (in) < FIRST_PSEUDO_REGISTER
1018 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1020 get_secondary_mem (in, inmode);
1022 if (out != 0 && GET_CODE (out) == REG
1023 && REGNO (out) < FIRST_PSEUDO_REGISTER
1024 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1026 get_secondary_mem (out, outmode);
1031 /* We are reusing an existing reload,
1032 but we may have additional information for it.
1033 For example, we may now have both IN and OUT
1034 while the old one may have just one of them. */
1036 if (inmode != VOIDmode)
1037 reload_inmode[i] = inmode;
1038 if (outmode != VOIDmode)
1039 reload_outmode[i] = outmode;
1043 reload_out[i] = out;
1044 if (reg_class_subset_p (class, reload_reg_class[i]))
1045 reload_reg_class[i] = class;
1046 reload_optional[i] &= optional;
1047 if (reload_needed_for[i] != needed_for)
1048 reload_needed_for_multiple[i] = 1;
1051 /* If the ostensible rtx being reload differs from the rtx found
1052 in the location to substitute, this reload is not safe to combine
1053 because we cannot reliably tell whether it appears in the insn. */
1055 if (in != 0 && in != *inloc)
1056 reload_nocombine[i] = 1;
1059 /* This was replaced by changes in find_reloads_address_1 and the new
1060 function inc_for_reload, which go with a new meaning of reload_inc. */
1062 /* If this is an IN/OUT reload in an insn that sets the CC,
1063 it must be for an autoincrement. It doesn't work to store
1064 the incremented value after the insn because that would clobber the CC.
1065 So we must do the increment of the value reloaded from,
1066 increment it, store it back, then decrement again. */
1067 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1071 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1072 /* If we did not find a nonzero amount-to-increment-by,
1073 that contradicts the belief that IN is being incremented
1074 in an address in this insn. */
1075 if (reload_inc[i] == 0)
1080 /* If we will replace IN and OUT with the reload-reg,
1081 record where they are located so that substitution need
1082 not do a tree walk. */
1084 if (replace_reloads)
1088 register struct replacement *r = &replacements[n_replacements++];
1090 r->subreg_loc = in_subreg_loc;
1094 if (outloc != 0 && outloc != inloc)
1096 register struct replacement *r = &replacements[n_replacements++];
1099 r->subreg_loc = out_subreg_loc;
1104 /* If this reload is just being introduced and it has both
1105 an incoming quantity and an outgoing quantity that are
1106 supposed to be made to match, see if either one of the two
1107 can serve as the place to reload into.
1109 If one of them is acceptable, set reload_reg_rtx[i]
1112 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1114 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1115 reload_reg_class[i], i);
1117 /* If the outgoing register already contains the same value
1118 as the incoming one, we can dispense with loading it.
1119 The easiest way to tell the caller that is to give a phony
1120 value for the incoming operand (same as outgoing one). */
1121 if (reload_reg_rtx[i] == out
1122 && (GET_CODE (in) == REG || CONSTANT_P (in))
1123 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1124 static_reload_reg_p, i, inmode))
1128 /* If this is an input reload and the operand contains a register that
1129 dies in this insn and is used nowhere else, see if it is the right class
1130 to be used for this reload. Use it if so. (This occurs most commonly
1131 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1132 this if it is also an output reload that mentions the register unless
1133 the output is a SUBREG that clobbers an entire register.
1135 Note that the operand might be one of the spill regs, if it is a
1136 pseudo reg and we are in a block where spilling has not taken place.
1137 But if there is no spilling in this block, that is OK.
1138 An explicitly used hard reg cannot be a spill reg. */
1140 if (reload_reg_rtx[i] == 0 && in != 0)
1145 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1146 if (REG_NOTE_KIND (note) == REG_DEAD
1147 && GET_CODE (XEXP (note, 0)) == REG
1148 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1149 && reg_mentioned_p (XEXP (note, 0), in)
1150 && ! refers_to_regno_for_reload_p (regno,
1152 + HARD_REGNO_NREGS (regno,
1154 PATTERN (this_insn), inloc)
1156 || (GET_CODE (in) == SUBREG
1157 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1159 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1160 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1161 /* Make sure the operand fits in the reg that dies. */
1162 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1163 && HARD_REGNO_MODE_OK (regno, inmode)
1164 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1165 && HARD_REGNO_MODE_OK (regno, outmode)
1166 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1167 && !fixed_regs[regno])
1169 reload_reg_rtx[i] = gen_rtx (REG, inmode, regno);
1175 output_reloadnum = i;
1180 /* Record an additional place we must replace a value
1181 for which we have already recorded a reload.
1182 RELOADNUM is the value returned by push_reload
1183 when the reload was recorded.
1184 This is used in insn patterns that use match_dup. */
1187 push_replacement (loc, reloadnum, mode)
1190 enum machine_mode mode;
1192 if (replace_reloads)
1194 register struct replacement *r = &replacements[n_replacements++];
1195 r->what = reloadnum;
1202 /* If there is only one output reload, and it is not for an earlyclobber
1203 operand, try to combine it with a (logically unrelated) input reload
1204 to reduce the number of reload registers needed.
1206 This is safe if the input reload does not appear in
1207 the value being output-reloaded, because this implies
1208 it is not needed any more once the original insn completes.
1210 If that doesn't work, see we can use any of the registers that
1211 die in this insn as a reload register. We can if it is of the right
1212 class and does not appear in the value being output-reloaded. */
1218 int output_reload = -1;
1221 /* Find the output reload; return unless there is exactly one
1222 and that one is mandatory. */
1224 for (i = 0; i < n_reloads; i++)
1225 if (reload_out[i] != 0)
1227 if (output_reload >= 0)
1232 if (output_reload < 0 || reload_optional[output_reload])
1235 /* An input-output reload isn't combinable. */
1237 if (reload_in[output_reload] != 0)
1240 /* If this reload is for an earlyclobber operand, we can't do anything. */
1242 for (i = 0; i < n_earlyclobbers; i++)
1243 if (reload_out[output_reload] == reload_earlyclobbers[i])
1246 /* Check each input reload; can we combine it? */
1248 for (i = 0; i < n_reloads; i++)
1249 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1250 /* Life span of this reload must not extend past main insn. */
1251 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_RELOAD_ADDRESS
1252 && ! reload_needed_for_multiple[i]
1253 && reload_inmode[i] == reload_outmode[output_reload]
1254 && reload_inc[i] == 0
1255 && reload_reg_rtx[i] == 0
1256 && reload_strict_low[i] == 0
1257 /* Don't combine two reloads with different secondary reloads. */
1258 && (reload_secondary_reload[i] == reload_secondary_reload[output_reload]
1259 || reload_secondary_reload[i] == -1
1260 || reload_secondary_reload[output_reload] == -1)
1261 && (reg_class_subset_p (reload_reg_class[i],
1262 reload_reg_class[output_reload])
1263 || reg_class_subset_p (reload_reg_class[output_reload],
1264 reload_reg_class[i]))
1265 && (MATCHES (reload_in[i], reload_out[output_reload])
1266 /* Args reversed because the first arg seems to be
1267 the one that we imagine being modified
1268 while the second is the one that might be affected. */
1269 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1271 /* However, if the input is a register that appears inside
1272 the output, then we also can't share.
1273 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1274 If the same reload reg is used for both reg 69 and the
1275 result to be stored in memory, then that result
1276 will clobber the address of the memory ref. */
1277 && ! (GET_CODE (reload_in[i]) == REG
1278 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1279 reload_out[output_reload])))))
1283 /* We have found a reload to combine with! */
1284 reload_out[i] = reload_out[output_reload];
1285 reload_outmode[i] = reload_outmode[output_reload];
1286 /* Mark the old output reload as inoperative. */
1287 reload_out[output_reload] = 0;
1288 /* The combined reload is needed for the entire insn. */
1289 reload_needed_for_multiple[i] = 1;
1290 reload_when_needed[i] = RELOAD_OTHER;
1291 /* If the output reload had a secondary reload, copy it. */
1292 if (reload_secondary_reload[output_reload] != -1)
1293 reload_secondary_reload[i] = reload_secondary_reload[output_reload];
1294 /* If required, minimize the register class. */
1295 if (reg_class_subset_p (reload_reg_class[output_reload],
1296 reload_reg_class[i]))
1297 reload_reg_class[i] = reload_reg_class[output_reload];
1299 /* Transfer all replacements from the old reload to the combined. */
1300 for (j = 0; j < n_replacements; j++)
1301 if (replacements[j].what == output_reload)
1302 replacements[j].what = i;
1307 /* If this insn has only one operand that is modified or written (assumed
1308 to be the first), it must be the one corresponding to this reload. It
1309 is safe to use anything that dies in this insn for that output provided
1310 that it does not occur in the output (we already know it isn't an
1311 earlyclobber. If this is an asm insn, give up. */
1313 if (INSN_CODE (this_insn) == -1)
1316 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1317 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1318 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1321 /* See if some hard register that dies in this insn and is not used in
1322 the output is the right class. Only works if the register we pick
1323 up can fully hold our output reload. */
1324 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1325 if (REG_NOTE_KIND (note) == REG_DEAD
1326 && GET_CODE (XEXP (note, 0)) == REG
1327 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1328 reload_out[output_reload])
1329 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1330 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1331 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1332 REGNO (XEXP (note, 0)))
1333 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1334 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1335 && ! fixed_regs[REGNO (XEXP (note, 0))])
1337 reload_reg_rtx[output_reload] = gen_rtx (REG,
1338 reload_outmode[output_reload],
1339 REGNO (XEXP (note, 0)));
1344 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1345 See if one of IN and OUT is a register that may be used;
1346 this is desirable since a spill-register won't be needed.
1347 If so, return the register rtx that proves acceptable.
1349 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1350 CLASS is the register class required for the reload.
1352 If FOR_REAL is >= 0, it is the number of the reload,
1353 and in some cases when it can be discovered that OUT doesn't need
1354 to be computed, clear out reload_out[FOR_REAL].
1356 If FOR_REAL is -1, this should not be done, because this call
1357 is just to see if a register can be found, not to find and install it. */
1360 find_dummy_reload (real_in, real_out, inloc, outloc, class, for_real)
1361 rtx real_in, real_out;
1362 rtx *inloc, *outloc;
1363 enum reg_class class;
1372 /* If operands exceed a word, we can't use either of them
1373 unless they have the same size. */
1374 if (GET_MODE_SIZE (GET_MODE (real_out)) != GET_MODE_SIZE (GET_MODE (real_in))
1375 && (GET_MODE_SIZE (GET_MODE (real_out)) > UNITS_PER_WORD
1376 || GET_MODE_SIZE (GET_MODE (real_in)) > UNITS_PER_WORD))
1379 /* Find the inside of any subregs. */
1380 while (GET_CODE (out) == SUBREG)
1382 out_offset = SUBREG_WORD (out);
1383 out = SUBREG_REG (out);
1385 while (GET_CODE (in) == SUBREG)
1387 in_offset = SUBREG_WORD (in);
1388 in = SUBREG_REG (in);
1391 /* Narrow down the reg class, the same way push_reload will;
1392 otherwise we might find a dummy now, but push_reload won't. */
1393 class = PREFERRED_RELOAD_CLASS (in, class);
1395 /* See if OUT will do. */
1396 if (GET_CODE (out) == REG
1397 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1399 register int regno = REGNO (out) + out_offset;
1400 int nwords = HARD_REGNO_NREGS (regno, GET_MODE (real_out));
1403 /* When we consider whether the insn uses OUT,
1404 ignore references within IN. They don't prevent us
1405 from copying IN into OUT, because those refs would
1406 move into the insn that reloads IN.
1408 However, we only ignore IN in its role as this reload.
1409 If the insn uses IN elsewhere and it contains OUT,
1410 that counts. We can't be sure it's the "same" operand
1411 so it might not go through this reload. */
1413 *inloc = const0_rtx;
1415 if (regno < FIRST_PSEUDO_REGISTER
1416 /* A fixed reg that can overlap other regs better not be used
1417 for reloading in any way. */
1418 #ifdef OVERLAPPING_REGNO_P
1419 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1421 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1422 PATTERN (this_insn), outloc))
1425 for (i = 0; i < nwords; i++)
1426 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1432 if (GET_CODE (real_out) == REG)
1435 value = gen_rtx (REG, GET_MODE (real_out), regno);
1442 /* Consider using IN if OUT was not acceptable
1443 or if OUT dies in this insn (like the quotient in a divmod insn).
1444 We can't use IN unless it is dies in this insn,
1445 which means we must know accurately which hard regs are live.
1446 Also, the result can't go in IN if IN is used within OUT. */
1447 if (hard_regs_live_known
1448 && GET_CODE (in) == REG
1449 && REGNO (in) < FIRST_PSEUDO_REGISTER
1451 || find_reg_note (this_insn, REG_UNUSED, real_out))
1452 && find_reg_note (this_insn, REG_DEAD, real_in)
1453 && !fixed_regs[REGNO (in)]
1454 && HARD_REGNO_MODE_OK (REGNO (in), GET_MODE (out)))
1456 register int regno = REGNO (in) + in_offset;
1457 int nwords = HARD_REGNO_NREGS (regno, GET_MODE (real_in));
1459 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1460 && ! hard_reg_set_here_p (regno, regno + nwords,
1461 PATTERN (this_insn)))
1464 for (i = 0; i < nwords; i++)
1465 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1471 /* If we were going to use OUT as the reload reg
1472 and changed our mind, it means OUT is a dummy that
1473 dies here. So don't bother copying value to it. */
1474 if (for_real >= 0 && value == real_out)
1475 reload_out[for_real] = 0;
1476 if (GET_CODE (real_in) == REG)
1479 value = gen_rtx (REG, GET_MODE (real_in), regno);
1487 /* This page contains subroutines used mainly for determining
1488 whether the IN or an OUT of a reload can serve as the
1491 /* Return 1 if expression X alters a hard reg in the range
1492 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1493 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1494 X should be the body of an instruction. */
1497 hard_reg_set_here_p (beg_regno, end_regno, x)
1498 register int beg_regno, end_regno;
1501 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1503 register rtx op0 = SET_DEST (x);
1504 while (GET_CODE (op0) == SUBREG)
1505 op0 = SUBREG_REG (op0);
1506 if (GET_CODE (op0) == REG)
1508 register int r = REGNO (op0);
1509 /* See if this reg overlaps range under consideration. */
1511 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1515 else if (GET_CODE (x) == PARALLEL)
1517 register int i = XVECLEN (x, 0) - 1;
1519 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1526 /* Return 1 if ADDR is a valid memory address for mode MODE,
1527 and check that each pseudo reg has the proper kind of
1531 strict_memory_address_p (mode, addr)
1532 enum machine_mode mode;
1535 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
1543 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1544 if they are the same hard reg, and has special hacks for
1545 autoincrement and autodecrement.
1546 This is specifically intended for find_reloads to use
1547 in determining whether two operands match.
1548 X is the operand whose number is the lower of the two.
1550 The value is 2 if Y contains a pre-increment that matches
1551 a non-incrementing address in X. */
1553 /* ??? To be completely correct, we should arrange to pass
1554 for X the output operand and for Y the input operand.
1555 For now, we assume that the output operand has the lower number
1556 because that is natural in (SET output (... input ...)). */
1559 operands_match_p (x, y)
1563 register RTX_CODE code = GET_CODE (x);
1569 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
1570 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
1571 && GET_CODE (SUBREG_REG (y)) == REG)))
1577 i = REGNO (SUBREG_REG (x));
1578 if (i >= FIRST_PSEUDO_REGISTER)
1580 i += SUBREG_WORD (x);
1585 if (GET_CODE (y) == SUBREG)
1587 j = REGNO (SUBREG_REG (y));
1588 if (j >= FIRST_PSEUDO_REGISTER)
1590 j += SUBREG_WORD (y);
1595 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1596 multiple hard register group, so that for example (reg:DI 0) and
1597 (reg:SI 1) will be considered the same register. */
1598 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
1599 && i < FIRST_PSEUDO_REGISTER)
1600 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
1601 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
1602 && j < FIRST_PSEUDO_REGISTER)
1603 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
1607 /* If two operands must match, because they are really a single
1608 operand of an assembler insn, then two postincrements are invalid
1609 because the assembler insn would increment only once.
1610 On the other hand, an postincrement matches ordinary indexing
1611 if the postincrement is the output operand. */
1612 if (code == POST_DEC || code == POST_INC)
1613 return operands_match_p (XEXP (x, 0), y);
1614 /* Two preincrements are invalid
1615 because the assembler insn would increment only once.
1616 On the other hand, an preincrement matches ordinary indexing
1617 if the preincrement is the input operand.
1618 In this case, return 2, since some callers need to do special
1619 things when this happens. */
1620 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
1621 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
1625 /* Now we have disposed of all the cases
1626 in which different rtx codes can match. */
1627 if (code != GET_CODE (y))
1629 if (code == LABEL_REF)
1630 return XEXP (x, 0) == XEXP (y, 0);
1631 if (code == SYMBOL_REF)
1632 return XSTR (x, 0) == XSTR (y, 0);
1634 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1636 if (GET_MODE (x) != GET_MODE (y))
1639 /* Compare the elements. If any pair of corresponding elements
1640 fail to match, return 0 for the whole things. */
1643 fmt = GET_RTX_FORMAT (code);
1644 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1650 if (XWINT (x, i) != XWINT (y, i))
1655 if (XINT (x, i) != XINT (y, i))
1660 val = operands_match_p (XEXP (x, i), XEXP (y, i));
1663 /* If any subexpression returns 2,
1664 we should return 2 if we are successful. */
1672 /* It is believed that rtx's at this level will never
1673 contain anything but integers and other rtx's,
1674 except for within LABEL_REFs and SYMBOL_REFs. */
1679 return 1 + success_2;
1682 /* Return the number of times character C occurs in string S. */
1685 n_occurrences (c, s)
1695 struct decomposition
1700 HOST_WIDE_INT start;
1704 /* Describe the range of registers or memory referenced by X.
1705 If X is a register, set REG_FLAG and put the first register
1706 number into START and the last plus one into END.
1707 If X is a memory reference, put a base address into BASE
1708 and a range of integer offsets into START and END.
1709 If X is pushing on the stack, we can assume it causes no trouble,
1710 so we set the SAFE field. */
1712 static struct decomposition
1716 struct decomposition val;
1721 if (GET_CODE (x) == MEM)
1723 rtx base, offset = 0;
1724 rtx addr = XEXP (x, 0);
1726 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
1727 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
1729 val.base = XEXP (addr, 0);
1730 val.start = - GET_MODE_SIZE (GET_MODE (x));
1731 val.end = GET_MODE_SIZE (GET_MODE (x));
1732 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
1736 if (GET_CODE (addr) == CONST)
1738 addr = XEXP (addr, 0);
1741 if (GET_CODE (addr) == PLUS)
1743 if (CONSTANT_P (XEXP (addr, 0)))
1745 base = XEXP (addr, 1);
1746 offset = XEXP (addr, 0);
1748 else if (CONSTANT_P (XEXP (addr, 1)))
1750 base = XEXP (addr, 0);
1751 offset = XEXP (addr, 1);
1758 offset = const0_rtx;
1760 if (GET_CODE (offset) == CONST)
1761 offset = XEXP (offset, 0);
1762 if (GET_CODE (offset) == PLUS)
1764 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
1766 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 1));
1767 offset = XEXP (offset, 0);
1769 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
1771 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 0));
1772 offset = XEXP (offset, 1);
1776 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
1777 offset = const0_rtx;
1780 else if (GET_CODE (offset) != CONST_INT)
1782 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
1783 offset = const0_rtx;
1786 if (all_const && GET_CODE (base) == PLUS)
1787 base = gen_rtx (CONST, GET_MODE (base), base);
1789 if (GET_CODE (offset) != CONST_INT)
1792 val.start = INTVAL (offset);
1793 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
1797 else if (GET_CODE (x) == REG)
1800 val.start = true_regnum (x);
1803 /* A pseudo with no hard reg. */
1804 val.start = REGNO (x);
1805 val.end = val.start + 1;
1809 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
1811 else if (GET_CODE (x) == SUBREG)
1813 if (GET_CODE (SUBREG_REG (x)) != REG)
1814 /* This could be more precise, but it's good enough. */
1815 return decompose (SUBREG_REG (x));
1817 val.start = true_regnum (x);
1819 return decompose (SUBREG_REG (x));
1822 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
1824 else if (CONSTANT_P (x)
1825 /* This hasn't been assigned yet, so it can't conflict yet. */
1826 || GET_CODE (x) == SCRATCH)
1833 /* Return 1 if altering Y will not modify the value of X.
1834 Y is also described by YDATA, which should be decompose (Y). */
1837 immune_p (x, y, ydata)
1839 struct decomposition ydata;
1841 struct decomposition xdata;
1844 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
1848 if (GET_CODE (y) != MEM)
1850 /* If Y is memory and X is not, Y can't affect X. */
1851 if (GET_CODE (x) != MEM)
1854 xdata = decompose (x);
1856 if (! rtx_equal_p (xdata.base, ydata.base))
1858 /* If bases are distinct symbolic constants, there is no overlap. */
1859 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
1861 /* Constants and stack slots never overlap. */
1862 if (CONSTANT_P (xdata.base)
1863 && (ydata.base == frame_pointer_rtx
1864 || ydata.base == stack_pointer_rtx))
1866 if (CONSTANT_P (ydata.base)
1867 && (xdata.base == frame_pointer_rtx
1868 || xdata.base == stack_pointer_rtx))
1870 /* If either base is variable, we don't know anything. */
1875 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
1878 /* Similar, but calls decompose. */
1881 safe_from_earlyclobber (op, clobber)
1884 struct decomposition early_data;
1886 early_data = decompose (clobber);
1887 return immune_p (op, clobber, early_data);
1890 /* Main entry point of this file: search the body of INSN
1891 for values that need reloading and record them with push_reload.
1892 REPLACE nonzero means record also where the values occur
1893 so that subst_reloads can be used.
1895 IND_LEVELS says how many levels of indirection are supported by this
1896 machine; a value of zero means that a memory reference is not a valid
1899 LIVE_KNOWN says we have valid information about which hard
1900 regs are live at each point in the program; this is true when
1901 we are called from global_alloc but false when stupid register
1902 allocation has been done.
1904 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
1905 which is nonnegative if the reg has been commandeered for reloading into.
1906 It is copied into STATIC_RELOAD_REG_P and referenced from there
1907 by various subroutines. */
1910 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
1912 int replace, ind_levels;
1914 short *reload_reg_p;
1916 rtx non_reloaded_operands[MAX_RECOG_OPERANDS];
1917 int n_non_reloaded_operands = 0;
1918 #ifdef REGISTER_CONSTRAINTS
1920 enum reload_modified { RELOAD_NOTHING, RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE };
1922 register int insn_code_number;
1925 /* These are the constraints for the insn. We don't change them. */
1926 char *constraints1[MAX_RECOG_OPERANDS];
1927 /* These start out as the constraints for the insn
1928 and they are chewed up as we consider alternatives. */
1929 char *constraints[MAX_RECOG_OPERANDS];
1930 /* These are the preferred classes for an operand, or NO_REGS if it isn't
1932 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
1933 char pref_or_nothing[MAX_RECOG_OPERANDS];
1934 /* Nonzero for a MEM operand whose entire address needs a reload. */
1935 int address_reloaded[MAX_RECOG_OPERANDS];
1936 int no_input_reloads = 0, no_output_reloads = 0;
1938 int this_alternative[MAX_RECOG_OPERANDS];
1939 char this_alternative_win[MAX_RECOG_OPERANDS];
1940 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
1941 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
1942 int this_alternative_matches[MAX_RECOG_OPERANDS];
1944 int goal_alternative[MAX_RECOG_OPERANDS];
1945 int this_alternative_number;
1946 int goal_alternative_number;
1947 int operand_reloadnum[MAX_RECOG_OPERANDS];
1948 int goal_alternative_matches[MAX_RECOG_OPERANDS];
1949 int goal_alternative_matched[MAX_RECOG_OPERANDS];
1950 char goal_alternative_win[MAX_RECOG_OPERANDS];
1951 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
1952 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
1953 int goal_alternative_swapped;
1954 enum reload_modified modified[MAX_RECOG_OPERANDS];
1957 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
1958 rtx substed_operand[MAX_RECOG_OPERANDS];
1959 rtx body = PATTERN (insn);
1960 rtx set = single_set (insn);
1961 int goal_earlyclobber, this_earlyclobber;
1962 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
1965 this_insn_is_asm = 0; /* Tentative. */
1969 n_earlyclobbers = 0;
1970 replace_reloads = replace;
1971 hard_regs_live_known = live_known;
1972 static_reload_reg_p = reload_reg_p;
1974 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
1975 neither are insns that SET cc0. Insns that use CC0 are not allowed
1976 to have any input reloads. */
1977 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
1978 no_output_reloads = 1;
1981 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
1982 no_input_reloads = 1;
1983 if (reg_set_p (cc0_rtx, PATTERN (insn)))
1984 no_output_reloads = 1;
1987 #ifdef SECONDARY_MEMORY_NEEDED
1988 /* The eliminated forms of any secondary memory locations are per-insn, so
1989 clear them out here. */
1991 bzero (secondary_memlocs_elim, sizeof secondary_memlocs_elim);
1994 /* Find what kind of insn this is. NOPERANDS gets number of operands.
1995 Make OPERANDS point to a vector of operand values.
1996 Make OPERAND_LOCS point to a vector of pointers to
1997 where the operands were found.
1998 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
1999 constraint-strings for this insn.
2000 Return if the insn needs no reload processing. */
2002 switch (GET_CODE (body))
2012 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2013 is cheap to move between them. If it is not, there may not be an insn
2014 to do the copy, so we may need a reload. */
2015 if (GET_CODE (SET_DEST (body)) == REG
2016 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2017 && GET_CODE (SET_SRC (body)) == REG
2018 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2019 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2020 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2024 noperands = asm_noperands (body);
2027 /* This insn is an `asm' with operands. */
2029 insn_code_number = -1;
2030 this_insn_is_asm = 1;
2032 /* expand_asm_operands makes sure there aren't too many operands. */
2033 if (noperands > MAX_RECOG_OPERANDS)
2036 /* Now get the operand values and constraints out of the insn. */
2038 decode_asm_operands (body, recog_operand, recog_operand_loc,
2039 constraints, operand_mode);
2042 bcopy (constraints, constraints1, noperands * sizeof (char *));
2043 n_alternatives = n_occurrences (',', constraints[0]) + 1;
2044 for (i = 1; i < noperands; i++)
2045 if (n_alternatives != n_occurrences (',', constraints[i]) + 1)
2047 error_for_asm (insn, "operand constraints differ in number of alternatives");
2048 /* Avoid further trouble with this insn. */
2049 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
2058 /* Ordinary insn: recognize it, get the operands via insn_extract
2059 and get the constraints. */
2061 insn_code_number = recog_memoized (insn);
2062 if (insn_code_number < 0)
2063 fatal_insn_not_found (insn);
2065 noperands = insn_n_operands[insn_code_number];
2066 n_alternatives = insn_n_alternatives[insn_code_number];
2067 /* Just return "no reloads" if insn has no operands with constraints. */
2068 if (n_alternatives == 0)
2070 insn_extract (insn);
2071 for (i = 0; i < noperands; i++)
2073 constraints[i] = constraints1[i]
2074 = insn_operand_constraint[insn_code_number][i];
2075 operand_mode[i] = insn_operand_mode[insn_code_number][i];
2084 /* If we will need to know, later, whether some pair of operands
2085 are the same, we must compare them now and save the result.
2086 Reloading the base and index registers will clobber them
2087 and afterward they will fail to match. */
2089 for (i = 0; i < noperands; i++)
2094 substed_operand[i] = recog_operand[i];
2097 /* Scan this operand's constraint to see if it should match another. */
2102 /* The last operand should not be marked commutative. */
2103 if (i == noperands - 1)
2105 if (this_insn_is_asm)
2106 warning_for_asm (this_insn,
2107 "`%%' constraint used with last operand");
2114 else if (c >= '0' && c <= '9')
2117 operands_match[c][i]
2118 = operands_match_p (recog_operand[c], recog_operand[i]);
2120 /* An operand may not match itself. */
2123 if (this_insn_is_asm)
2124 warning_for_asm (this_insn,
2125 "operand %d has constraint %d", i, c);
2130 /* If C can be commuted with C+1, and C might need to match I,
2131 then C+1 might also need to match I. */
2132 if (commutative >= 0)
2134 if (c == commutative || c == commutative + 1)
2136 int other = c + (c == commutative ? 1 : -1);
2137 operands_match[other][i]
2138 = operands_match_p (recog_operand[other], recog_operand[i]);
2140 if (i == commutative || i == commutative + 1)
2142 int other = i + (i == commutative ? 1 : -1);
2143 operands_match[c][other]
2144 = operands_match_p (recog_operand[c], recog_operand[other]);
2146 /* Note that C is supposed to be less than I.
2147 No need to consider altering both C and I
2148 because in that case we would alter one into the other. */
2153 /* Examine each operand that is a memory reference or memory address
2154 and reload parts of the addresses into index registers.
2155 While we are at it, initialize the array `modified'.
2156 Also here any references to pseudo regs that didn't get hard regs
2157 but are equivalent to constants get replaced in the insn itself
2158 with those constants. Nobody will ever see them again.
2160 Finally, set up the preferred classes of each operand. */
2162 for (i = 0; i < noperands; i++)
2164 register RTX_CODE code = GET_CODE (recog_operand[i]);
2165 modified[i] = RELOAD_READ;
2166 address_reloaded[i] = 0;
2168 if (constraints[i][0] == 'p')
2170 find_reloads_address (VOIDmode, NULL_PTR,
2171 recog_operand[i], recog_operand_loc[i],
2172 recog_operand[i], ind_levels);
2173 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2175 else if (code == MEM)
2177 if (find_reloads_address (GET_MODE (recog_operand[i]),
2178 recog_operand_loc[i],
2179 XEXP (recog_operand[i], 0),
2180 &XEXP (recog_operand[i], 0),
2181 recog_operand[i], ind_levels))
2182 address_reloaded[i] = 1;
2183 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2185 else if (code == SUBREG)
2186 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2187 = find_reloads_toplev (recog_operand[i], ind_levels,
2189 && &SET_DEST (set) == recog_operand_loc[i]);
2190 else if (code == REG)
2192 /* This is equivalent to calling find_reloads_toplev.
2193 The code is duplicated for speed.
2194 When we find a pseudo always equivalent to a constant,
2195 we replace it by the constant. We must be sure, however,
2196 that we don't try to replace it in the insn in which it
2198 register int regno = REGNO (recog_operand[i]);
2199 if (reg_equiv_constant[regno] != 0
2200 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2201 substed_operand[i] = recog_operand[i]
2202 = reg_equiv_constant[regno];
2203 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2204 that feeds this insn. */
2205 if (reg_equiv_mem[regno] != 0)
2206 substed_operand[i] = recog_operand[i]
2207 = reg_equiv_mem[regno];
2209 if (reg_equiv_address[regno] != 0)
2211 /* If reg_equiv_address is not a constant address, copy it,
2212 since it may be shared. */
2213 rtx address = reg_equiv_address[regno];
2215 if (rtx_varies_p (address))
2216 address = copy_rtx (address);
2218 /* If this is an output operand, we must output a CLOBBER
2219 after INSN so find_equiv_reg knows REGNO is being written. */
2220 if (constraints[i][0] == '='
2221 || constraints[i][0] == '+')
2222 emit_insn_after (gen_rtx (CLOBBER, VOIDmode, recog_operand[i]),
2225 *recog_operand_loc[i] = recog_operand[i]
2226 = gen_rtx (MEM, GET_MODE (recog_operand[i]), address);
2227 RTX_UNCHANGING_P (recog_operand[i])
2228 = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
2229 find_reloads_address (GET_MODE (recog_operand[i]),
2230 recog_operand_loc[i],
2231 XEXP (recog_operand[i], 0),
2232 &XEXP (recog_operand[i], 0),
2233 recog_operand[i], ind_levels);
2234 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2237 /* If the operand is still a register (we didn't replace it with an
2238 equivalent), get the preferred class to reload it into. */
2239 code = GET_CODE (recog_operand[i]);
2241 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
2242 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2244 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
2245 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2248 /* If this is simply a copy from operand 1 to operand 0, merge the
2249 preferred classes for the operands. */
2250 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2251 && recog_operand[1] == SET_SRC (set))
2253 preferred_class[0] = preferred_class[1]
2254 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2255 pref_or_nothing[0] |= pref_or_nothing[1];
2256 pref_or_nothing[1] |= pref_or_nothing[0];
2259 /* Now see what we need for pseudo-regs that didn't get hard regs
2260 or got the wrong kind of hard reg. For this, we must consider
2261 all the operands together against the register constraints. */
2263 best = MAX_RECOG_OPERANDS + 300;
2266 goal_alternative_swapped = 0;
2269 /* The constraints are made of several alternatives.
2270 Each operand's constraint looks like foo,bar,... with commas
2271 separating the alternatives. The first alternatives for all
2272 operands go together, the second alternatives go together, etc.
2274 First loop over alternatives. */
2276 for (this_alternative_number = 0;
2277 this_alternative_number < n_alternatives;
2278 this_alternative_number++)
2280 /* Loop over operands for one constraint alternative. */
2281 /* LOSERS counts those that don't fit this alternative
2282 and would require loading. */
2284 /* BAD is set to 1 if it some operand can't fit this alternative
2285 even after reloading. */
2287 /* REJECT is a count of how undesirable this alternative says it is
2288 if any reloading is required. If the alternative matches exactly
2289 then REJECT is ignored, but otherwise it gets this much
2290 counted against it in addition to the reloading needed. Each
2291 ? counts three times here since we want the disparaging caused by
2292 a bad register class to only count 1/3 as much. */
2295 this_earlyclobber = 0;
2297 for (i = 0; i < noperands; i++)
2299 register char *p = constraints[i];
2300 register int win = 0;
2301 /* 0 => this operand can be reloaded somehow for this alternative */
2303 /* 0 => this operand can be reloaded if the alternative allows regs. */
2306 register rtx operand = recog_operand[i];
2308 /* Nonzero means this is a MEM that must be reloaded into a reg
2309 regardless of what the constraint says. */
2310 int force_reload = 0;
2312 int earlyclobber = 0;
2314 /* If the operand is a SUBREG, extract
2315 the REG or MEM (or maybe even a constant) within.
2316 (Constants can occur as a result of reg_equiv_constant.) */
2318 while (GET_CODE (operand) == SUBREG)
2320 offset += SUBREG_WORD (operand);
2321 operand = SUBREG_REG (operand);
2322 /* Force reload if this is not a register or if there may may
2323 be a problem accessing the register in the outer mode. */
2324 if (GET_CODE (operand) != REG
2325 #if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
2326 /* ??? The comment below clearly does not match the code.
2327 What the code below actually does is set force_reload
2328 for a paradoxical subreg of a pseudo. rms and kenner
2329 can't see the point of doing this. */
2330 /* Nonparadoxical subreg of a pseudoreg.
2331 Don't to load the full width if on this machine
2332 we expected the fetch to extend. */
2333 || ((GET_MODE_SIZE (operand_mode[i])
2334 > GET_MODE_SIZE (GET_MODE (operand)))
2335 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
2337 /* Subreg of a hard reg which can't handle the subreg's mode
2338 or which would handle that mode in the wrong number of
2339 registers for subregging to work. */
2340 || (REGNO (operand) < FIRST_PSEUDO_REGISTER
2341 && (! HARD_REGNO_MODE_OK (REGNO (operand),
2343 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2344 && (GET_MODE_SIZE (GET_MODE (operand))
2346 && ((GET_MODE_SIZE (GET_MODE (operand))
2348 != HARD_REGNO_NREGS (REGNO (operand),
2349 GET_MODE (operand)))))))
2353 this_alternative[i] = (int) NO_REGS;
2354 this_alternative_win[i] = 0;
2355 this_alternative_offmemok[i] = 0;
2356 this_alternative_earlyclobber[i] = 0;
2357 this_alternative_matches[i] = -1;
2359 /* An empty constraint or empty alternative
2360 allows anything which matched the pattern. */
2361 if (*p == 0 || *p == ',')
2364 /* Scan this alternative's specs for this operand;
2365 set WIN if the operand fits any letter in this alternative.
2366 Otherwise, clear BADOP if this operand could
2367 fit some letter after reloads,
2368 or set WINREG if this operand could fit after reloads
2369 provided the constraint allows some registers. */
2371 while (*p && (c = *p++) != ',')
2375 modified[i] = RELOAD_WRITE;
2379 modified[i] = RELOAD_READ_WRITE;
2386 /* The last operand should not be marked commutative. */
2387 if (i != noperands - 1)
2400 /* Ignore rest of this alternative as far as
2401 reloading is concerned. */
2402 while (*p && *p != ',') p++;
2411 this_alternative_matches[i] = c;
2412 /* We are supposed to match a previous operand.
2413 If we do, we win if that one did.
2414 If we do not, count both of the operands as losers.
2415 (This is too conservative, since most of the time
2416 only a single reload insn will be needed to make
2417 the two operands win. As a result, this alternative
2418 may be rejected when it is actually desirable.) */
2419 if ((swapped && (c != commutative || i != commutative + 1))
2420 /* If we are matching as if two operands were swapped,
2421 also pretend that operands_match had been computed
2423 But if I is the second of those and C is the first,
2424 don't exchange them, because operands_match is valid
2425 only on one side of its diagonal. */
2427 [(c == commutative || c == commutative + 1)
2428 ? 2*commutative + 1 - c : c]
2429 [(i == commutative || i == commutative + 1)
2430 ? 2*commutative + 1 - i : i])
2431 : operands_match[c][i])
2432 win = this_alternative_win[c];
2435 /* Operands don't match. */
2437 /* Retroactively mark the operand we had to match
2438 as a loser, if it wasn't already. */
2439 if (this_alternative_win[c])
2441 this_alternative_win[c] = 0;
2442 if (this_alternative[c] == (int) NO_REGS)
2444 /* But count the pair only once in the total badness of
2445 this alternative, if the pair can be a dummy reload. */
2447 = find_dummy_reload (recog_operand[i], recog_operand[c],
2448 recog_operand_loc[i], recog_operand_loc[c],
2449 this_alternative[c], -1);
2454 /* This can be fixed with reloads if the operand
2455 we are supposed to match can be fixed with reloads. */
2457 this_alternative[i] = this_alternative[c];
2461 /* All necessary reloads for an address_operand
2462 were handled in find_reloads_address. */
2463 this_alternative[i] = (int) ALL_REGS;
2470 if (GET_CODE (operand) == MEM
2471 || (GET_CODE (operand) == REG
2472 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2473 && reg_renumber[REGNO (operand)] < 0))
2475 if (CONSTANT_P (operand))
2480 if (GET_CODE (operand) == MEM
2481 && ! address_reloaded[i]
2482 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2483 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2488 if (GET_CODE (operand) == MEM
2489 && ! address_reloaded[i]
2490 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2491 || GET_CODE (XEXP (operand, 0)) == POST_INC))
2495 /* Memory operand whose address is not offsettable. */
2499 if (GET_CODE (operand) == MEM
2500 && ! (ind_levels ? offsettable_memref_p (operand)
2501 : offsettable_nonstrict_memref_p (operand))
2502 /* Certain mem addresses will become offsettable
2503 after they themselves are reloaded. This is important;
2504 we don't want our own handling of unoffsettables
2505 to override the handling of reg_equiv_address. */
2506 && !(GET_CODE (XEXP (operand, 0)) == REG
2508 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
2512 /* Memory operand whose address is offsettable. */
2516 if ((GET_CODE (operand) == MEM
2517 /* If IND_LEVELS, find_reloads_address won't reload a
2518 pseudo that didn't get a hard reg, so we have to
2519 reject that case. */
2520 && (ind_levels ? offsettable_memref_p (operand)
2521 : offsettable_nonstrict_memref_p (operand)))
2522 /* Certain mem addresses will become offsettable
2523 after they themselves are reloaded. This is important;
2524 we don't want our own handling of unoffsettables
2525 to override the handling of reg_equiv_address. */
2526 || (GET_CODE (operand) == MEM
2527 && GET_CODE (XEXP (operand, 0)) == REG
2529 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))
2530 || (GET_CODE (operand) == REG
2531 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2532 && reg_renumber[REGNO (operand)] < 0))
2534 if (CONSTANT_P (operand) || GET_CODE (operand) == MEM)
2540 /* Output operand that is stored before the need for the
2541 input operands (and their index registers) is over. */
2542 earlyclobber = 1, this_earlyclobber = 1;
2546 /* Match any floating double constant, but only if
2547 we can examine the bits of it reliably. */
2548 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
2549 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
2550 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
2552 if (GET_CODE (operand) == CONST_DOUBLE)
2557 if (GET_CODE (operand) == CONST_DOUBLE)
2563 if (GET_CODE (operand) == CONST_DOUBLE
2564 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
2569 if (GET_CODE (operand) == CONST_INT
2570 || (GET_CODE (operand) == CONST_DOUBLE
2571 && GET_MODE (operand) == VOIDmode))
2574 if (CONSTANT_P (operand)
2575 #ifdef LEGITIMATE_PIC_OPERAND_P
2576 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
2583 if (GET_CODE (operand) == CONST_INT
2584 || (GET_CODE (operand) == CONST_DOUBLE
2585 && GET_MODE (operand) == VOIDmode))
2597 if (GET_CODE (operand) == CONST_INT
2598 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
2608 /* A PLUS is never a valid operand, but reload can make
2609 it from a register when eliminating registers. */
2610 && GET_CODE (operand) != PLUS
2611 /* A SCRATCH is not a valid operand. */
2612 && GET_CODE (operand) != SCRATCH
2613 #ifdef LEGITIMATE_PIC_OPERAND_P
2614 && (! CONSTANT_P (operand)
2616 || LEGITIMATE_PIC_OPERAND_P (operand))
2618 && (GENERAL_REGS == ALL_REGS
2619 || GET_CODE (operand) != REG
2620 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
2621 && reg_renumber[REGNO (operand)] < 0)))
2623 /* Drop through into 'r' case */
2627 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
2630 #ifdef EXTRA_CONSTRAINT
2636 if (EXTRA_CONSTRAINT (operand, c))
2643 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
2646 if (GET_MODE (operand) == BLKmode)
2649 if (GET_CODE (operand) == REG
2650 && reg_fits_class_p (operand, this_alternative[i],
2651 offset, GET_MODE (recog_operand[i])))
2658 /* If this operand could be handled with a reg,
2659 and some reg is allowed, then this operand can be handled. */
2660 if (winreg && this_alternative[i] != (int) NO_REGS)
2663 /* Record which operands fit this alternative. */
2664 this_alternative_earlyclobber[i] = earlyclobber;
2665 if (win && ! force_reload)
2666 this_alternative_win[i] = 1;
2669 this_alternative_offmemok[i] = offmemok;
2673 /* Alternative loses if it has no regs for a reg operand. */
2674 if (GET_CODE (operand) == REG
2675 && this_alternative[i] == (int) NO_REGS
2676 && this_alternative_matches[i] < 0)
2679 /* Alternative loses if it requires a type of reload not
2680 permitted for this insn. We can always reload SCRATCH
2681 and objects with a REG_UNUSED note. */
2682 if (GET_CODE (operand) != SCRATCH && modified[i] != RELOAD_READ
2683 && no_output_reloads
2684 && ! find_reg_note (insn, REG_UNUSED, operand))
2686 else if (modified[i] != RELOAD_WRITE && no_input_reloads)
2689 /* We prefer to reload pseudos over reloading other things,
2690 since such reloads may be able to be eliminated later.
2691 If we are reloading a SCRATCH, we won't be generating any
2692 insns, just using a register, so it is also preferred.
2693 So bump REJECT in other cases. */
2694 if (GET_CODE (operand) != REG && GET_CODE (operand) != SCRATCH)
2698 /* If this operand is a pseudo register that didn't get a hard
2699 reg and this alternative accepts some register, see if the
2700 class that we want is a subset of the preferred class for this
2701 register. If not, but it intersects that class, use the
2702 preferred class instead. If it does not intersect the preferred
2703 class, show that usage of this alternative should be discouraged;
2704 it will be discouraged more still if the register is `preferred
2705 or nothing'. We do this because it increases the chance of
2706 reusing our spill register in a later insn and avoiding a pair
2707 of memory stores and loads.
2709 Don't bother with this if this alternative will accept this
2712 Don't do this for a multiword operand, if
2713 we have to worry about small classes, because making reg groups
2714 harder to allocate is asking for trouble.
2716 Don't do this if the preferred class has only one register
2717 because we might otherwise exhaust the class. */
2720 if (! win && this_alternative[i] != (int) NO_REGS
2721 #ifdef SMALL_REGISTER_CLASSES
2722 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2724 && reg_class_size[(int) preferred_class[i]] > 1)
2726 if (! reg_class_subset_p (this_alternative[i],
2727 preferred_class[i]))
2729 /* Since we don't have a way of forming the intersection,
2730 we just do something special if the preferred class
2731 is a subset of the class we have; that's the most
2732 common case anyway. */
2733 if (reg_class_subset_p (preferred_class[i],
2734 this_alternative[i]))
2735 this_alternative[i] = (int) preferred_class[i];
2737 reject += (1 + pref_or_nothing[i]);
2742 /* Now see if any output operands that are marked "earlyclobber"
2743 in this alternative conflict with any input operands
2744 or any memory addresses. */
2746 for (i = 0; i < noperands; i++)
2747 if (this_alternative_earlyclobber[i]
2748 && this_alternative_win[i])
2750 struct decomposition early_data;
2753 early_data = decompose (recog_operand[i]);
2755 if (modified[i] == RELOAD_READ)
2757 if (this_insn_is_asm)
2758 warning_for_asm (this_insn,
2759 "`&' constraint used with input operand");
2765 if (this_alternative[i] == NO_REGS)
2767 this_alternative_earlyclobber[i] = 0;
2768 if (this_insn_is_asm)
2769 error_for_asm (this_insn,
2770 "`&' constraint used with no register class");
2775 for (j = 0; j < noperands; j++)
2776 /* Is this an input operand or a memory ref? */
2777 if ((GET_CODE (recog_operand[j]) == MEM
2778 || modified[j] != RELOAD_WRITE)
2780 /* Ignore things like match_operator operands. */
2781 && *constraints1[j] != 0
2782 /* Don't count an input operand that is constrained to match
2783 the early clobber operand. */
2784 && ! (this_alternative_matches[j] == i
2785 && rtx_equal_p (recog_operand[i], recog_operand[j]))
2786 /* Is it altered by storing the earlyclobber operand? */
2787 && !immune_p (recog_operand[j], recog_operand[i], early_data))
2789 /* If the output is in a single-reg class,
2790 it's costly to reload it, so reload the input instead. */
2791 if (reg_class_size[this_alternative[i]] == 1
2792 && (GET_CODE (recog_operand[j]) == REG
2793 || GET_CODE (recog_operand[j]) == SUBREG))
2796 this_alternative_win[j] = 0;
2801 /* If an earlyclobber operand conflicts with something,
2802 it must be reloaded, so request this and count the cost. */
2806 this_alternative_win[i] = 0;
2807 for (j = 0; j < noperands; j++)
2808 if (this_alternative_matches[j] == i
2809 && this_alternative_win[j])
2811 this_alternative_win[j] = 0;
2817 /* If one alternative accepts all the operands, no reload required,
2818 choose that alternative; don't consider the remaining ones. */
2821 /* Unswap these so that they are never swapped at `finish'. */
2822 if (commutative >= 0)
2824 recog_operand[commutative] = substed_operand[commutative];
2825 recog_operand[commutative + 1]
2826 = substed_operand[commutative + 1];
2828 for (i = 0; i < noperands; i++)
2830 goal_alternative_win[i] = 1;
2831 goal_alternative[i] = this_alternative[i];
2832 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
2833 goal_alternative_matches[i] = this_alternative_matches[i];
2834 goal_alternative_earlyclobber[i]
2835 = this_alternative_earlyclobber[i];
2837 goal_alternative_number = this_alternative_number;
2838 goal_alternative_swapped = swapped;
2839 goal_earlyclobber = this_earlyclobber;
2843 /* REJECT, set by the ! and ? constraint characters and when a register
2844 would be reloaded into a non-preferred class, discourages the use of
2845 this alternative for a reload goal. REJECT is incremented by three
2846 for each ? and one for each non-preferred class. */
2847 losers = losers * 3 + reject;
2849 /* If this alternative can be made to work by reloading,
2850 and it needs less reloading than the others checked so far,
2851 record it as the chosen goal for reloading. */
2852 if (! bad && best > losers)
2854 for (i = 0; i < noperands; i++)
2856 goal_alternative[i] = this_alternative[i];
2857 goal_alternative_win[i] = this_alternative_win[i];
2858 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
2859 goal_alternative_matches[i] = this_alternative_matches[i];
2860 goal_alternative_earlyclobber[i]
2861 = this_alternative_earlyclobber[i];
2863 goal_alternative_swapped = swapped;
2865 goal_alternative_number = this_alternative_number;
2866 goal_earlyclobber = this_earlyclobber;
2870 /* If insn is commutative (it's safe to exchange a certain pair of operands)
2871 then we need to try each alternative twice,
2872 the second time matching those two operands
2873 as if we had exchanged them.
2874 To do this, really exchange them in operands.
2876 If we have just tried the alternatives the second time,
2877 return operands to normal and drop through. */
2879 if (commutative >= 0)
2884 register enum reg_class tclass;
2887 recog_operand[commutative] = substed_operand[commutative + 1];
2888 recog_operand[commutative + 1] = substed_operand[commutative];
2890 tclass = preferred_class[commutative];
2891 preferred_class[commutative] = preferred_class[commutative + 1];
2892 preferred_class[commutative + 1] = tclass;
2894 t = pref_or_nothing[commutative];
2895 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
2896 pref_or_nothing[commutative + 1] = t;
2898 bcopy (constraints1, constraints, noperands * sizeof (char *));
2903 recog_operand[commutative] = substed_operand[commutative];
2904 recog_operand[commutative + 1] = substed_operand[commutative + 1];
2908 /* The operands don't meet the constraints.
2909 goal_alternative describes the alternative
2910 that we could reach by reloading the fewest operands.
2911 Reload so as to fit it. */
2913 if (best == MAX_RECOG_OPERANDS + 300)
2915 /* No alternative works with reloads?? */
2916 if (insn_code_number >= 0)
2918 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
2919 /* Avoid further trouble with this insn. */
2920 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
2925 /* Jump to `finish' from above if all operands are valid already.
2926 In that case, goal_alternative_win is all 1. */
2929 /* Right now, for any pair of operands I and J that are required to match,
2931 goal_alternative_matches[J] is I.
2932 Set up goal_alternative_matched as the inverse function:
2933 goal_alternative_matched[I] = J. */
2935 for (i = 0; i < noperands; i++)
2936 goal_alternative_matched[i] = -1;
2938 for (i = 0; i < noperands; i++)
2939 if (! goal_alternative_win[i]
2940 && goal_alternative_matches[i] >= 0)
2941 goal_alternative_matched[goal_alternative_matches[i]] = i;
2943 /* If the best alternative is with operands 1 and 2 swapped,
2944 consider them swapped before reporting the reloads. */
2946 if (goal_alternative_swapped)
2950 tem = substed_operand[commutative];
2951 substed_operand[commutative] = substed_operand[commutative + 1];
2952 substed_operand[commutative + 1] = tem;
2953 tem = recog_operand[commutative];
2954 recog_operand[commutative] = recog_operand[commutative + 1];
2955 recog_operand[commutative + 1] = tem;
2958 /* Perform whatever substitutions on the operands we are supposed
2959 to make due to commutativity or replacement of registers
2960 with equivalent constants or memory slots. */
2962 for (i = 0; i < noperands; i++)
2964 *recog_operand_loc[i] = substed_operand[i];
2965 /* While we are looping on operands, initialize this. */
2966 operand_reloadnum[i] = -1;
2969 /* Any constants that aren't allowed and can't be reloaded
2970 into registers are here changed into memory references. */
2971 for (i = 0; i < noperands; i++)
2972 if (! goal_alternative_win[i]
2973 && CONSTANT_P (recog_operand[i])
2974 && (PREFERRED_RELOAD_CLASS (recog_operand[i],
2975 (enum reg_class) goal_alternative[i])
2977 && operand_mode[i] != VOIDmode)
2979 *recog_operand_loc[i] = recog_operand[i]
2980 = find_reloads_toplev (force_const_mem (operand_mode[i],
2983 if (alternative_allows_memconst (constraints1[i],
2984 goal_alternative_number))
2985 goal_alternative_win[i] = 1;
2988 /* Now record reloads for all the operands that need them. */
2989 for (i = 0; i < noperands; i++)
2990 if (! goal_alternative_win[i])
2992 /* Operands that match previous ones have already been handled. */
2993 if (goal_alternative_matches[i] >= 0)
2995 /* Handle an operand with a nonoffsettable address
2996 appearing where an offsettable address will do
2997 by reloading the address into a base register. */
2998 else if (goal_alternative_matched[i] == -1
2999 && goal_alternative_offmemok[i]
3000 && GET_CODE (recog_operand[i]) == MEM)
3002 operand_reloadnum[i]
3003 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
3004 &XEXP (recog_operand[i], 0), NULL_PTR,
3005 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
3006 VOIDmode, 0, 0, NULL_RTX);
3007 reload_inc[operand_reloadnum[i]]
3008 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
3010 else if (goal_alternative_matched[i] == -1)
3011 operand_reloadnum[i] =
3012 push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3013 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3014 modified[i] != RELOAD_WRITE ? recog_operand_loc[i] : 0,
3015 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
3016 (enum reg_class) goal_alternative[i],
3017 (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]),
3018 (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]),
3019 (insn_code_number < 0 ? 0
3020 : insn_operand_strict_low[insn_code_number][i]),
3022 /* In a matching pair of operands, one must be input only
3023 and the other must be output only.
3024 Pass the input operand as IN and the other as OUT. */
3025 else if (modified[i] == RELOAD_READ
3026 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3028 operand_reloadnum[i]
3029 = push_reload (recog_operand[i],
3030 recog_operand[goal_alternative_matched[i]],
3031 recog_operand_loc[i],
3032 recog_operand_loc[goal_alternative_matched[i]],
3033 (enum reg_class) goal_alternative[i],
3035 operand_mode[goal_alternative_matched[i]],
3037 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3039 else if (modified[i] == RELOAD_WRITE
3040 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3042 operand_reloadnum[goal_alternative_matched[i]]
3043 = push_reload (recog_operand[goal_alternative_matched[i]],
3045 recog_operand_loc[goal_alternative_matched[i]],
3046 recog_operand_loc[i],
3047 (enum reg_class) goal_alternative[i],
3048 operand_mode[goal_alternative_matched[i]],
3051 operand_reloadnum[i] = output_reloadnum;
3053 else if (insn_code_number >= 0)
3057 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3058 /* Avoid further trouble with this insn. */
3059 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3064 else if (goal_alternative_matched[i] < 0
3065 && goal_alternative_matches[i] < 0
3068 rtx operand = recog_operand[i];
3069 /* For each non-matching operand that's a pseudo-register
3070 that didn't get a hard register, make an optional reload.
3071 This may get done even if the insn needs no reloads otherwise. */
3072 /* (It would be safe to make an optional reload for a matching pair
3073 of operands, but we don't bother yet.) */
3074 while (GET_CODE (operand) == SUBREG)
3075 operand = XEXP (operand, 0);
3076 if (GET_CODE (operand) == REG
3077 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3078 && reg_renumber[REGNO (operand)] < 0
3079 && (enum reg_class) goal_alternative[i] != NO_REGS
3080 /* Don't make optional output reloads for jump insns
3081 (such as aobjeq on the vax). */
3082 && (modified[i] == RELOAD_READ
3083 || GET_CODE (insn) != JUMP_INSN))
3084 operand_reloadnum[i]
3085 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3086 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3087 modified[i] != RELOAD_WRITE ? recog_operand_loc[i] : 0,
3088 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
3089 (enum reg_class) goal_alternative[i],
3090 (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]),
3091 (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]),
3092 (insn_code_number < 0 ? 0
3093 : insn_operand_strict_low[insn_code_number][i]),
3095 /* Make an optional reload for an explicit mem ref. */
3096 else if (GET_CODE (operand) == MEM
3097 && (enum reg_class) goal_alternative[i] != NO_REGS
3098 /* Don't make optional output reloads for jump insns
3099 (such as aobjeq on the vax). */
3100 && (modified[i] == RELOAD_READ
3101 || GET_CODE (insn) != JUMP_INSN))
3102 operand_reloadnum[i]
3103 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3104 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3105 modified[i] != RELOAD_WRITE ? recog_operand_loc[i] : 0,
3106 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
3107 (enum reg_class) goal_alternative[i],
3108 (modified[i] == RELOAD_WRITE ? VOIDmode : operand_mode[i]),
3109 (modified[i] == RELOAD_READ ? VOIDmode : operand_mode[i]),
3110 (insn_code_number < 0 ? 0
3111 : insn_operand_strict_low[insn_code_number][i]),
3114 non_reloaded_operands[n_non_reloaded_operands++] = recog_operand[i];
3116 else if (goal_alternative_matched[i] < 0
3117 && goal_alternative_matches[i] < 0)
3118 non_reloaded_operands[n_non_reloaded_operands++] = recog_operand[i];
3120 /* Record the values of the earlyclobber operands for the caller. */
3121 if (goal_earlyclobber)
3122 for (i = 0; i < noperands; i++)
3123 if (goal_alternative_earlyclobber[i])
3124 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3126 /* If this insn pattern contains any MATCH_DUP's, make sure that
3127 they will be substituted if the operands they match are substituted.
3128 Also do now any substitutions we already did on the operands.
3130 Don't do this if we aren't making replacements because we might be
3131 propagating things allocated by frame pointer elimination into places
3132 it doesn't expect. */
3134 if (insn_code_number >= 0 && replace)
3135 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3137 int opno = recog_dup_num[i];
3138 *recog_dup_loc[i] = *recog_operand_loc[opno];
3139 if (operand_reloadnum[opno] >= 0)
3140 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3141 insn_operand_mode[insn_code_number][opno]);
3145 /* This loses because reloading of prior insns can invalidate the equivalence
3146 (or at least find_equiv_reg isn't smart enough to find it any more),
3147 causing this insn to need more reload regs than it needed before.
3148 It may be too late to make the reload regs available.
3149 Now this optimization is done safely in choose_reload_regs. */
3151 /* For each reload of a reg into some other class of reg,
3152 search for an existing equivalent reg (same value now) in the right class.
3153 We can use it as long as we don't need to change its contents. */
3154 for (i = 0; i < n_reloads; i++)
3155 if (reload_reg_rtx[i] == 0
3156 && reload_in[i] != 0
3157 && GET_CODE (reload_in[i]) == REG
3158 && reload_out[i] == 0)
3161 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3162 static_reload_reg_p, 0, reload_inmode[i]);
3163 /* Prevent generation of insn to load the value
3164 because the one we found already has the value. */
3165 if (reload_reg_rtx[i])
3166 reload_in[i] = reload_reg_rtx[i];
3170 #else /* no REGISTER_CONSTRAINTS */
3172 int insn_code_number;
3173 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
3175 rtx body = PATTERN (insn);
3179 n_earlyclobbers = 0;
3180 replace_reloads = replace;
3183 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3184 Store the operand values in RECOG_OPERAND and the locations
3185 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3186 Return if the insn needs no reload processing. */
3188 switch (GET_CODE (body))
3199 noperands = asm_noperands (body);
3202 /* This insn is an `asm' with operands.
3203 First, find out how many operands, and allocate space. */
3205 insn_code_number = -1;
3206 /* ??? This is a bug! ???
3207 Give up and delete this insn if it has too many operands. */
3208 if (noperands > MAX_RECOG_OPERANDS)
3211 /* Now get the operand values out of the insn. */
3213 decode_asm_operands (body, recog_operand, recog_operand_loc,
3214 NULL_PTR, NULL_PTR);
3219 /* Ordinary insn: recognize it, allocate space for operands and
3220 constraints, and get them out via insn_extract. */
3222 insn_code_number = recog_memoized (insn);
3223 noperands = insn_n_operands[insn_code_number];
3224 insn_extract (insn);
3230 for (i = 0; i < noperands; i++)
3232 register RTX_CODE code = GET_CODE (recog_operand[i]);
3233 int is_set_dest = GET_CODE (body) == SET && (i == 0);
3235 if (insn_code_number >= 0)
3236 if (insn_operand_address_p[insn_code_number][i])
3237 find_reloads_address (VOIDmode, NULL_PTR,
3238 recog_operand[i], recog_operand_loc[i],
3239 recog_operand[i], ind_levels);
3241 find_reloads_address (GET_MODE (recog_operand[i]),
3242 recog_operand_loc[i],
3243 XEXP (recog_operand[i], 0),
3244 &XEXP (recog_operand[i], 0),
3245 recog_operand[i], ind_levels);
3247 recog_operand[i] = *recog_operand_loc[i]
3248 = find_reloads_toplev (recog_operand[i], ind_levels, is_set_dest);
3251 register int regno = REGNO (recog_operand[i]);
3252 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3253 recog_operand[i] = *recog_operand_loc[i]
3254 = reg_equiv_constant[regno];
3255 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3256 that feeds this insn. */
3257 if (reg_equiv_mem[regno] != 0)
3258 recog_operand[i] = *recog_operand_loc[i]
3259 = reg_equiv_mem[regno];
3262 /* All operands are non-reloaded. */
3263 non_reloaded_operands[n_non_reloaded_operands++] = recog_operand[i];
3265 #endif /* no REGISTER_CONSTRAINTS */
3267 /* Determine which part of the insn each reload is needed for,
3268 based on which operand the reload is needed for.
3269 Reloads of entire operands are classified as RELOAD_OTHER.
3270 So are reloads for which a unique purpose is not known. */
3272 for (i = 0; i < n_reloads; i++)
3274 reload_when_needed[i] = RELOAD_OTHER;
3276 if (reload_needed_for[i] != 0 && ! reload_needed_for_multiple[i])
3279 int output_address = 0;
3280 int input_address = 0;
3281 int operand_address = 0;
3283 /* This reload is needed only for the address of something.
3284 Determine whether it is needed for addressing an operand
3285 being reloaded for input, whether it is needed for an
3286 operand being reloaded for output, and whether it is needed
3287 for addressing an operand that won't really be reloaded.
3289 Note that we know that this reload is needed in only one address,
3290 but we have not yet checked for the case where that same address
3291 is used in both input and output reloads.
3292 The following code detects this case. */
3294 for (j = 0; j < n_reloads; j++)
3295 if (reload_needed_for[i] == reload_in[j]
3296 || reload_needed_for[i] == reload_out[j])
3298 if (reload_optional[j])
3299 operand_address = 1;
3302 if (reload_needed_for[i] == reload_in[j])
3304 if (reload_needed_for[i] == reload_out[j])
3308 /* Don't ignore memrefs without optional reloads. */
3309 for (j = 0; j < n_non_reloaded_operands; j++)
3310 if (reload_needed_for[i] == non_reloaded_operands[j])
3311 operand_address = 1;
3313 /* If it is needed for only one of those, record which one. */
3315 if (input_address && ! output_address && ! operand_address)
3316 reload_when_needed[i] = RELOAD_FOR_INPUT_RELOAD_ADDRESS;
3317 if (output_address && ! input_address && ! operand_address)
3318 reload_when_needed[i] = RELOAD_FOR_OUTPUT_RELOAD_ADDRESS;
3319 if (operand_address && ! input_address && ! output_address)
3320 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3322 /* Indicate those RELOAD_OTHER reloads which, though they have
3323 0 for reload_output, still cannot overlap an output reload. */
3325 if (output_address && reload_when_needed[i] == RELOAD_OTHER)
3326 reload_needed_for_multiple[i] = 1;
3328 /* If we have earlyclobbers, make sure nothing overlaps them. */
3329 if (n_earlyclobbers > 0)
3331 reload_when_needed[i] = RELOAD_OTHER;
3332 reload_needed_for_multiple[i] = 1;
3337 /* Perhaps an output reload can be combined with another
3338 to reduce needs by one. */
3339 if (!goal_earlyclobber)
3343 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3344 accepts a memory operand with constant address. */
3347 alternative_allows_memconst (constraint, altnum)
3352 /* Skip alternatives before the one requested. */
3355 while (*constraint++ != ',');
3358 /* Scan the requested alternative for 'm' or 'o'.
3359 If one of them is present, this alternative accepts memory constants. */
3360 while ((c = *constraint++) && c != ',' && c != '#')
3361 if (c == 'm' || c == 'o')
3366 /* Scan X for memory references and scan the addresses for reloading.
3367 Also checks for references to "constant" regs that we want to eliminate
3368 and replaces them with the values they stand for.
3369 We may alter X destructively if it contains a reference to such.
3370 If X is just a constant reg, we return the equivalent value
3373 IND_LEVELS says how many levels of indirect addressing this machine
3376 IS_SET_DEST is true if X is the destination of a SET, which is not
3377 appropriate to be replaced by a constant. */
3380 find_reloads_toplev (x, ind_levels, is_set_dest)
3385 register RTX_CODE code = GET_CODE (x);
3387 register char *fmt = GET_RTX_FORMAT (code);
3392 /* This code is duplicated for speed in find_reloads. */
3393 register int regno = REGNO (x);
3394 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3395 x = reg_equiv_constant[regno];
3397 /* This creates (subreg (mem...)) which would cause an unnecessary
3398 reload of the mem. */
3399 else if (reg_equiv_mem[regno] != 0)
3400 x = reg_equiv_mem[regno];
3402 else if (reg_equiv_address[regno] != 0)
3404 /* If reg_equiv_address varies, it may be shared, so copy it. */
3405 rtx addr = reg_equiv_address[regno];
3407 if (rtx_varies_p (addr))
3408 addr = copy_rtx (addr);
3410 x = gen_rtx (MEM, GET_MODE (x), addr);
3411 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3412 find_reloads_address (GET_MODE (x), NULL_PTR,
3414 &XEXP (x, 0), x, ind_levels);
3421 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
3426 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
3428 /* Check for SUBREG containing a REG that's equivalent to a constant.
3429 If the constant has a known value, truncate it right now.
3430 Similarly if we are extracting a single-word of a multi-word
3431 constant. If the constant is symbolic, allow it to be substituted
3432 normally. push_reload will strip the subreg later. If the
3433 constant is VOIDmode, abort because we will lose the mode of
3434 the register (this should never happen because one of the cases
3435 above should handle it). */
3437 register int regno = REGNO (SUBREG_REG (x));
3440 if (subreg_lowpart_p (x)
3441 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3442 && reg_equiv_constant[regno] != 0
3443 && (tem = gen_lowpart_common (GET_MODE (x),
3444 reg_equiv_constant[regno])) != 0)
3447 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
3448 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3449 && reg_equiv_constant[regno] != 0
3450 && (tem = operand_subword (reg_equiv_constant[regno],
3452 GET_MODE (SUBREG_REG (x)))) != 0)
3455 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3456 && reg_equiv_constant[regno] != 0
3457 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
3460 /* If the subreg contains a reg that will be converted to a mem,
3461 convert the subreg to a narrower memref now.
3462 Otherwise, we would get (subreg (mem ...) ...),
3463 which would force reload of the mem.
3465 We also need to do this if there is an equivalent MEM that is
3466 not offsettable. In that case, alter_subreg would produce an
3467 invalid address on big-endian machines.
3469 For machines that extend byte loads, we must not reload using
3470 a wider mode if we have a paradoxical SUBREG. find_reloads will
3471 force a reload in that case. So we should not do anything here. */
3473 else if (regno >= FIRST_PSEUDO_REGISTER
3474 #if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
3475 && (GET_MODE_SIZE (GET_MODE (x))
3476 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3478 && (reg_equiv_address[regno] != 0
3479 || (reg_equiv_mem[regno] != 0
3480 && (! strict_memory_address_p (GET_MODE (x),
3481 XEXP (reg_equiv_mem[regno], 0))
3482 || ! offsettable_memref_p (reg_equiv_mem[regno])))))
3484 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
3485 rtx addr = (reg_equiv_address[regno] ? reg_equiv_address[regno]
3486 : XEXP (reg_equiv_mem[regno], 0));
3487 #if BYTES_BIG_ENDIAN
3489 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
3490 offset += MIN (size, UNITS_PER_WORD);
3491 size = GET_MODE_SIZE (GET_MODE (x));
3492 offset -= MIN (size, UNITS_PER_WORD);
3494 addr = plus_constant (addr, offset);
3495 x = gen_rtx (MEM, GET_MODE (x), addr);
3496 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3497 find_reloads_address (GET_MODE (x), NULL_PTR,
3499 &XEXP (x, 0), x, ind_levels);
3504 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3507 XEXP (x, i) = find_reloads_toplev (XEXP (x, i),
3508 ind_levels, is_set_dest);
3514 make_memloc (ad, regno)
3519 rtx tem = reg_equiv_address[regno];
3520 for (i = 0; i < n_memlocs; i++)
3521 if (rtx_equal_p (tem, XEXP (memlocs[i], 0)))
3524 /* If TEM might contain a pseudo, we must copy it to avoid
3525 modifying it when we do the substitution for the reload. */
3526 if (rtx_varies_p (tem))
3527 tem = copy_rtx (tem);
3529 tem = gen_rtx (MEM, GET_MODE (ad), tem);
3530 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3531 memlocs[n_memlocs++] = tem;
3535 /* Record all reloads needed for handling memory address AD
3536 which appears in *LOC in a memory reference to mode MODE
3537 which itself is found in location *MEMREFLOC.
3538 Note that we take shortcuts assuming that no multi-reg machine mode
3539 occurs as part of an address.
3541 OPERAND is the operand of the insn within which this address appears.
3543 IND_LEVELS says how many levels of indirect addressing this machine
3546 Value is nonzero if this address is reloaded or replaced as a whole.
3547 This is interesting to the caller if the address is an autoincrement.
3549 Note that there is no verification that the address will be valid after
3550 this routine does its work. Instead, we rely on the fact that the address
3551 was valid when reload started. So we need only undo things that reload
3552 could have broken. These are wrong register types, pseudos not allocated
3553 to a hard register, and frame pointer elimination. */
3556 find_reloads_address (mode, memrefloc, ad, loc, operand, ind_levels)
3557 enum machine_mode mode;
3567 /* If the address is a register, see if it is a legitimate address and
3568 reload if not. We first handle the cases where we need not reload
3569 or where we must reload in a non-standard way. */
3571 if (GET_CODE (ad) == REG)
3575 if (reg_equiv_constant[regno] != 0
3576 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
3578 *loc = ad = reg_equiv_constant[regno];
3582 else if (reg_equiv_address[regno] != 0)
3584 tem = make_memloc (ad, regno);
3585 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
3586 &XEXP (tem, 0), operand, ind_levels);
3587 push_reload (tem, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
3588 GET_MODE (ad), VOIDmode, 0, 0,
3593 /* We can avoid a reload if the register's equivalent memory expression
3594 is valid as an indirect memory address. */
3596 else if (reg_equiv_mem[regno] != 0 && ind_levels > 0
3597 && strict_memory_address_p (mode, reg_equiv_mem[regno]))
3600 /* The only remaining case where we can avoid a reload is if this is a
3601 hard register that is valid as a base register and which is not the
3602 subject of a CLOBBER in this insn. */
3604 else if (regno < FIRST_PSEUDO_REGISTER && REGNO_OK_FOR_BASE_P (regno)
3605 && ! regno_clobbered_p (regno, this_insn))
3608 /* If we do not have one of the cases above, we must do the reload. */
3609 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
3610 GET_MODE (ad), VOIDmode, 0, 0, operand);
3614 if (strict_memory_address_p (mode, ad))
3616 /* The address appears valid, so reloads are not needed.
3617 But the address may contain an eliminable register.
3618 This can happen because a machine with indirect addressing
3619 may consider a pseudo register by itself a valid address even when
3620 it has failed to get a hard reg.
3621 So do a tree-walk to find and eliminate all such regs. */
3623 /* But first quickly dispose of a common case. */
3624 if (GET_CODE (ad) == PLUS
3625 && GET_CODE (XEXP (ad, 1)) == CONST_INT
3626 && GET_CODE (XEXP (ad, 0)) == REG
3627 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
3630 subst_reg_equivs_changed = 0;
3631 *loc = subst_reg_equivs (ad);
3633 if (! subst_reg_equivs_changed)
3636 /* Check result for validity after substitution. */
3637 if (strict_memory_address_p (mode, ad))
3641 /* The address is not valid. We have to figure out why. One possibility
3642 is that it is itself a MEM. This can happen when the frame pointer is
3643 being eliminated, a pseudo is not allocated to a hard register, and the
3644 offset between the frame and stack pointers is not its initial value.
3645 In that case the pseudo will have been replaced by a MEM referring to
3646 the stack pointer. */
3647 if (GET_CODE (ad) == MEM)
3649 /* First ensure that the address in this MEM is valid. Then, unless
3650 indirect addresses are valid, reload the MEM into a register. */
3652 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
3653 operand, ind_levels == 0 ? 0 : ind_levels - 1);
3655 /* If tem was changed, then we must create a new memory reference to
3656 hold it and store it back into memrefloc. */
3657 if (tem != ad && memrefloc)
3659 rtx oldref = *memrefloc;
3660 *memrefloc = copy_rtx (*memrefloc);
3661 copy_replacements (tem, XEXP (*memrefloc, 0));
3662 loc = &XEXP (*memrefloc, 0);
3663 if (operand == oldref)
3664 operand = *memrefloc;
3667 /* Check similar cases as for indirect addresses as above except
3668 that we can allow pseudos and a MEM since they should have been
3669 taken care of above. */
3672 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
3673 || GET_CODE (XEXP (tem, 0)) == MEM
3674 || ! (GET_CODE (XEXP (tem, 0)) == REG
3675 || (GET_CODE (XEXP (tem, 0)) == PLUS
3676 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
3677 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
3679 /* Must use TEM here, not AD, since it is the one that will
3680 have any subexpressions reloaded, if needed. */
3681 push_reload (tem, NULL_RTX, loc, NULL_PTR,
3682 BASE_REG_CLASS, GET_MODE (tem), VOIDmode, 0,
3690 /* If we have address of a stack slot but it's not valid
3691 (displacement is too large), compute the sum in a register. */
3692 else if (GET_CODE (ad) == PLUS
3693 && (XEXP (ad, 0) == frame_pointer_rtx
3694 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3695 || XEXP (ad, 0) == arg_pointer_rtx
3697 || XEXP (ad, 0) == stack_pointer_rtx)
3698 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
3700 /* Unshare the MEM rtx so we can safely alter it. */
3703 rtx oldref = *memrefloc;
3704 *memrefloc = copy_rtx (*memrefloc);
3705 loc = &XEXP (*memrefloc, 0);
3706 if (operand == oldref)
3707 operand = *memrefloc;
3709 if (double_reg_address_ok)
3711 /* Unshare the sum as well. */
3712 *loc = ad = copy_rtx (ad);
3713 /* Reload the displacement into an index reg.
3714 We assume the frame pointer or arg pointer is a base reg. */
3715 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
3716 INDEX_REG_CLASS, GET_MODE (ad), operand,
3721 /* If the sum of two regs is not necessarily valid,
3722 reload the sum into a base reg.
3723 That will at least work. */
3724 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode,
3725 operand, ind_levels);
3730 /* If we have an indexed stack slot, there are three possible reasons why
3731 it might be invalid: The index might need to be reloaded, the address
3732 might have been made by frame pointer elimination and hence have a
3733 constant out of range, or both reasons might apply.
3735 We can easily check for an index needing reload, but even if that is the
3736 case, we might also have an invalid constant. To avoid making the
3737 conservative assumption and requiring two reloads, we see if this address
3738 is valid when not interpreted strictly. If it is, the only problem is
3739 that the index needs a reload and find_reloads_address_1 will take care
3742 There is still a case when we might generate an extra reload,
3743 however. In certain cases eliminate_regs will return a MEM for a REG
3744 (see the code there for details). In those cases, memory_address_p
3745 applied to our address will return 0 so we will think that our offset
3746 must be too large. But it might indeed be valid and the only problem
3747 is that a MEM is present where a REG should be. This case should be
3748 very rare and there doesn't seem to be any way to avoid it.
3750 If we decide to do something here, it must be that
3751 `double_reg_address_ok' is true and that this address rtl was made by
3752 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
3753 rework the sum so that the reload register will be added to the index.
3754 This is safe because we know the address isn't shared.
3756 We check for fp/ap/sp as both the first and second operand of the
3759 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
3760 && GET_CODE (XEXP (ad, 0)) == PLUS
3761 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
3762 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3763 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
3765 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
3766 && ! memory_address_p (mode, ad))
3768 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
3769 plus_constant (XEXP (XEXP (ad, 0), 0),
3770 INTVAL (XEXP (ad, 1))),
3771 XEXP (XEXP (ad, 0), 1));
3772 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
3773 GET_MODE (ad), operand, ind_levels);
3774 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), operand, 0);
3779 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
3780 && GET_CODE (XEXP (ad, 0)) == PLUS
3781 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
3782 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3783 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
3785 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
3786 && ! memory_address_p (mode, ad))
3788 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
3789 plus_constant (XEXP (XEXP (ad, 0), 1),
3790 INTVAL (XEXP (ad, 1))),
3791 XEXP (XEXP (ad, 0), 0));
3792 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
3793 GET_MODE (ad), operand, ind_levels);
3794 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), operand, 0);
3799 /* See if address becomes valid when an eliminable register
3800 in a sum is replaced. */
3803 if (GET_CODE (ad) == PLUS)
3804 tem = subst_indexed_address (ad);
3805 if (tem != ad && strict_memory_address_p (mode, tem))
3807 /* Ok, we win that way. Replace any additional eliminable
3810 subst_reg_equivs_changed = 0;
3811 tem = subst_reg_equivs (tem);
3813 /* Make sure that didn't make the address invalid again. */
3815 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
3822 /* If constants aren't valid addresses, reload the constant address
3824 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
3826 /* If AD is in address in the constant pool, the MEM rtx may be shared.
3827 Unshare it so we can safely alter it. */
3828 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
3829 && CONSTANT_POOL_ADDRESS_P (ad))
3831 rtx oldref = *memrefloc;
3832 *memrefloc = copy_rtx (*memrefloc);
3833 loc = &XEXP (*memrefloc, 0);
3834 if (operand == oldref)
3835 operand = *memrefloc;
3838 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, operand,
3843 return find_reloads_address_1 (ad, 0, loc, operand, ind_levels);
3846 /* Find all pseudo regs appearing in AD
3847 that are eliminable in favor of equivalent values
3848 and do not have hard regs; replace them by their equivalents. */
3851 subst_reg_equivs (ad)
3854 register RTX_CODE code = GET_CODE (ad);
3872 register int regno = REGNO (ad);
3874 if (reg_equiv_constant[regno] != 0)
3876 subst_reg_equivs_changed = 1;
3877 return reg_equiv_constant[regno];
3883 /* Quickly dispose of a common case. */
3884 if (XEXP (ad, 0) == frame_pointer_rtx
3885 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
3889 fmt = GET_RTX_FORMAT (code);
3890 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3892 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i));
3896 /* Compute the sum of X and Y, making canonicalizations assumed in an
3897 address, namely: sum constant integers, surround the sum of two
3898 constants with a CONST, put the constant as the second operand, and
3899 group the constant on the outermost sum.
3901 This routine assumes both inputs are already in canonical form. */
3909 if (GET_CODE (x) == CONST_INT)
3910 return plus_constant (y, INTVAL (x));
3911 else if (GET_CODE (y) == CONST_INT)
3912 return plus_constant (x, INTVAL (y));
3913 else if (CONSTANT_P (x))
3914 tem = x, x = y, y = tem;
3916 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
3917 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
3919 /* Note that if the operands of Y are specified in the opposite
3920 order in the recursive calls below, infinite recursion will occur. */
3921 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
3922 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
3924 /* If both constant, encapsulate sum. Otherwise, just form sum. A
3925 constant will have been placed second. */
3926 if (CONSTANT_P (x) && CONSTANT_P (y))
3928 if (GET_CODE (x) == CONST)
3930 if (GET_CODE (y) == CONST)
3933 return gen_rtx (CONST, VOIDmode, gen_rtx (PLUS, Pmode, x, y));
3936 return gen_rtx (PLUS, Pmode, x, y);
3939 /* If ADDR is a sum containing a pseudo register that should be
3940 replaced with a constant (from reg_equiv_constant),
3941 return the result of doing so, and also apply the associative
3942 law so that the result is more likely to be a valid address.
3943 (But it is not guaranteed to be one.)
3945 Note that at most one register is replaced, even if more are
3946 replaceable. Also, we try to put the result into a canonical form
3947 so it is more likely to be a valid address.
3949 In all other cases, return ADDR. */
3952 subst_indexed_address (addr)
3955 rtx op0 = 0, op1 = 0, op2 = 0;
3959 if (GET_CODE (addr) == PLUS)
3961 /* Try to find a register to replace. */
3962 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
3963 if (GET_CODE (op0) == REG
3964 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
3965 && reg_renumber[regno] < 0
3966 && reg_equiv_constant[regno] != 0)
3967 op0 = reg_equiv_constant[regno];
3968 else if (GET_CODE (op1) == REG
3969 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
3970 && reg_renumber[regno] < 0
3971 && reg_equiv_constant[regno] != 0)
3972 op1 = reg_equiv_constant[regno];
3973 else if (GET_CODE (op0) == PLUS
3974 && (tem = subst_indexed_address (op0)) != op0)
3976 else if (GET_CODE (op1) == PLUS
3977 && (tem = subst_indexed_address (op1)) != op1)
3982 /* Pick out up to three things to add. */
3983 if (GET_CODE (op1) == PLUS)
3984 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
3985 else if (GET_CODE (op0) == PLUS)
3986 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
3988 /* Compute the sum. */
3990 op1 = form_sum (op1, op2);
3992 op0 = form_sum (op0, op1);
3999 /* Record the pseudo registers we must reload into hard registers
4000 in a subexpression of a would-be memory address, X.
4001 (This function is not called if the address we find is strictly valid.)
4002 CONTEXT = 1 means we are considering regs as index regs,
4003 = 0 means we are considering them as base regs.
4005 OPERAND is the operand of the insn within which this address appears.
4007 IND_LEVELS says how many levels of indirect addressing are
4008 supported at this point in the address.
4010 We return nonzero if X, as a whole, is reloaded or replaced. */
4012 /* Note that we take shortcuts assuming that no multi-reg machine mode
4013 occurs as part of an address.
4014 Also, this is not fully machine-customizable; it works for machines
4015 such as vaxes and 68000's and 32000's, but other possible machines
4016 could have addressing modes that this does not handle right. */
4019 find_reloads_address_1 (x, context, loc, operand, ind_levels)
4026 register RTX_CODE code = GET_CODE (x);
4030 register rtx op0 = XEXP (x, 0);
4031 register rtx op1 = XEXP (x, 1);
4032 register RTX_CODE code0 = GET_CODE (op0);
4033 register RTX_CODE code1 = GET_CODE (op1);
4034 if (code0 == MULT || code0 == SIGN_EXTEND || code1 == MEM)
4036 find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand, ind_levels);
4037 find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
4039 else if (code1 == MULT || code1 == SIGN_EXTEND || code0 == MEM)
4041 find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
4042 find_reloads_address_1 (op1, 1, &XEXP (x, 1), operand, ind_levels);
4044 else if (code0 == CONST_INT || code0 == CONST
4045 || code0 == SYMBOL_REF || code0 == LABEL_REF)
4047 find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
4049 else if (code1 == CONST_INT || code1 == CONST
4050 || code1 == SYMBOL_REF || code1 == LABEL_REF)
4052 find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
4054 else if (code0 == REG && code1 == REG)
4056 if (REG_OK_FOR_INDEX_P (op0)
4057 && REG_OK_FOR_BASE_P (op1))
4059 else if (REG_OK_FOR_INDEX_P (op1)
4060 && REG_OK_FOR_BASE_P (op0))
4062 else if (REG_OK_FOR_BASE_P (op1))
4063 find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand, ind_levels);
4064 else if (REG_OK_FOR_BASE_P (op0))
4065 find_reloads_address_1 (op1, 1, &XEXP (x, 1), operand, ind_levels);
4066 else if (REG_OK_FOR_INDEX_P (op1))
4067 find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
4068 else if (REG_OK_FOR_INDEX_P (op0))
4069 find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
4072 find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand,
4074 find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand,
4078 else if (code0 == REG)
4080 find_reloads_address_1 (op0, 1, &XEXP (x, 0), operand, ind_levels);
4081 find_reloads_address_1 (op1, 0, &XEXP (x, 1), operand, ind_levels);
4083 else if (code1 == REG)
4085 find_reloads_address_1 (op1, 1, &XEXP (x, 1), operand, ind_levels);
4086 find_reloads_address_1 (op0, 0, &XEXP (x, 0), operand, ind_levels);
4089 else if (code == POST_INC || code == POST_DEC
4090 || code == PRE_INC || code == PRE_DEC)
4092 if (GET_CODE (XEXP (x, 0)) == REG)
4094 register int regno = REGNO (XEXP (x, 0));
4098 /* A register that is incremented cannot be constant! */
4099 if (regno >= FIRST_PSEUDO_REGISTER
4100 && reg_equiv_constant[regno] != 0)
4103 /* Handle a register that is equivalent to a memory location
4104 which cannot be addressed directly. */
4105 if (reg_equiv_address[regno] != 0)
4107 rtx tem = make_memloc (XEXP (x, 0), regno);
4108 /* First reload the memory location's address. */
4109 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
4110 &XEXP (tem, 0), operand, ind_levels);
4111 /* Put this inside a new increment-expression. */
4112 x = gen_rtx (GET_CODE (x), GET_MODE (x), tem);
4113 /* Proceed to reload that, as if it contained a register. */
4116 /* If we have a hard register that is ok as an index,
4117 don't make a reload. If an autoincrement of a nice register
4118 isn't "valid", it must be that no autoincrement is "valid".
4119 If that is true and something made an autoincrement anyway,
4120 this must be a special context where one is allowed.
4121 (For example, a "push" instruction.)
4122 We can't improve this address, so leave it alone. */
4124 /* Otherwise, reload the autoincrement into a suitable hard reg
4125 and record how much to increment by. */
4127 if (reg_renumber[regno] >= 0)
4128 regno = reg_renumber[regno];
4129 if ((regno >= FIRST_PSEUDO_REGISTER
4130 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4131 : REGNO_OK_FOR_BASE_P (regno))))
4136 = push_reload (x, NULL_RTX, loc, NULL_PTR,
4137 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4138 GET_MODE (x), GET_MODE (x), VOIDmode, 0, operand);
4139 reload_inc[reloadnum]
4140 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
4145 /* Update the REG_INC notes. */
4147 for (link = REG_NOTES (this_insn);
4148 link; link = XEXP (link, 1))
4149 if (REG_NOTE_KIND (link) == REG_INC
4150 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
4151 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4156 else if (GET_CODE (XEXP (x, 0)) == MEM)
4158 /* This is probably the result of a substitution, by eliminate_regs,
4159 of an equivalent address for a pseudo that was not allocated to a
4160 hard register. Verify that the specified address is valid and
4161 reload it into a register. */
4162 rtx tem = XEXP (x, 0);
4166 /* Since we know we are going to reload this item, don't decrement
4167 for the indirection level.
4169 Note that this is actually conservative: it would be slightly
4170 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4172 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
4173 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
4174 operand, ind_levels);
4176 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
4177 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4178 GET_MODE (x), VOIDmode, 0, 0, operand);
4179 reload_inc[reloadnum]
4180 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
4182 link = FIND_REG_INC_NOTE (this_insn, tem);
4184 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4189 else if (code == MEM)
4191 /* This is probably the result of a substitution, by eliminate_regs,
4192 of an equivalent address for a pseudo that was not allocated to a
4193 hard register. Verify that the specified address is valid and reload
4196 Since we know we are going to reload this item, don't decrement
4197 for the indirection level.
4199 Note that this is actually conservative: it would be slightly more
4200 efficient to use the value of SPILL_INDIRECT_LEVELS from
4203 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
4204 operand, ind_levels);
4206 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
4207 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4208 GET_MODE (x), VOIDmode, 0, 0, operand);
4211 else if (code == REG)
4213 register int regno = REGNO (x);
4215 if (reg_equiv_constant[regno] != 0)
4217 find_reloads_address_part (reg_equiv_constant[regno], loc,
4218 (context ? INDEX_REG_CLASS
4220 GET_MODE (x), operand, ind_levels);
4224 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4225 that feeds this insn. */
4226 if (reg_equiv_mem[regno] != 0)
4228 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
4229 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4230 GET_MODE (x), VOIDmode, 0, 0, operand);
4234 if (reg_equiv_address[regno] != 0)
4236 x = make_memloc (x, regno);
4237 find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0),
4238 operand, ind_levels);
4241 if (reg_renumber[regno] >= 0)
4242 regno = reg_renumber[regno];
4243 if ((regno >= FIRST_PSEUDO_REGISTER
4244 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4245 : REGNO_OK_FOR_BASE_P (regno))))
4247 push_reload (x, NULL_RTX, loc, NULL_PTR,
4248 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4249 GET_MODE (x), VOIDmode, 0, 0, operand);
4253 /* If a register appearing in an address is the subject of a CLOBBER
4254 in this insn, reload it into some other register to be safe.
4255 The CLOBBER is supposed to make the register unavailable
4256 from before this insn to after it. */
4257 if (regno_clobbered_p (regno, this_insn))
4259 push_reload (x, NULL_RTX, loc, NULL_PTR,
4260 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4261 GET_MODE (x), VOIDmode, 0, 0, operand);
4267 register char *fmt = GET_RTX_FORMAT (code);
4269 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4272 find_reloads_address_1 (XEXP (x, i), context, &XEXP (x, i),
4273 operand, ind_levels);
4280 /* X, which is found at *LOC, is a part of an address that needs to be
4281 reloaded into a register of class CLASS. If X is a constant, or if
4282 X is a PLUS that contains a constant, check that the constant is a
4283 legitimate operand and that we are supposed to be able to load
4284 it into the register.
4286 If not, force the constant into memory and reload the MEM instead.
4288 MODE is the mode to use, in case X is an integer constant.
4290 NEEDED_FOR says which operand this reload is needed for.
4292 IND_LEVELS says how many levels of indirect addressing this machine
4296 find_reloads_address_part (x, loc, class, mode, needed_for, ind_levels)
4299 enum reg_class class;
4300 enum machine_mode mode;
4305 && (! LEGITIMATE_CONSTANT_P (x)
4306 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
4308 rtx tem = x = force_const_mem (mode, x);
4309 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4310 needed_for, ind_levels);
4313 else if (GET_CODE (x) == PLUS
4314 && CONSTANT_P (XEXP (x, 1))
4315 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
4316 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
4318 rtx tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
4320 x = gen_rtx (PLUS, GET_MODE (x), XEXP (x, 0), tem);
4321 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4322 needed_for, ind_levels);
4325 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
4326 mode, VOIDmode, 0, 0, needed_for);
4329 /* Substitute into X the registers into which we have reloaded
4330 the things that need reloading. The array `replacements'
4331 says contains the locations of all pointers that must be changed
4332 and says what to replace them with.
4334 Return the rtx that X translates into; usually X, but modified. */
4341 for (i = 0; i < n_replacements; i++)
4343 register struct replacement *r = &replacements[i];
4344 register rtx reloadreg = reload_reg_rtx[r->what];
4347 /* Encapsulate RELOADREG so its machine mode matches what
4348 used to be there. */
4349 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
4350 reloadreg = gen_lowpart_common (r->mode, reloadreg);
4352 /* If we are putting this into a SUBREG and RELOADREG is a
4353 SUBREG, we would be making nested SUBREGs, so we have to fix
4354 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
4356 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
4358 if (GET_MODE (*r->subreg_loc)
4359 == GET_MODE (SUBREG_REG (reloadreg)))
4360 *r->subreg_loc = SUBREG_REG (reloadreg);
4363 *r->where = SUBREG_REG (reloadreg);
4364 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
4368 *r->where = reloadreg;
4370 /* If reload got no reg and isn't optional, something's wrong. */
4371 else if (! reload_optional[r->what])
4376 /* Make a copy of any replacements being done into X and move those copies
4377 to locations in Y, a copy of X. We only look at the highest level of
4381 copy_replacements (x, y)
4386 enum rtx_code code = GET_CODE (x);
4387 char *fmt = GET_RTX_FORMAT (code);
4388 struct replacement *r;
4390 /* We can't support X being a SUBREG because we might then need to know its
4391 location if something inside it was replaced. */
4395 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4397 for (j = 0; j < n_replacements; j++)
4399 if (replacements[j].subreg_loc == &XEXP (x, i))
4401 r = &replacements[n_replacements++];
4402 r->where = replacements[j].where;
4403 r->subreg_loc = &XEXP (y, i);
4404 r->what = replacements[j].what;
4405 r->mode = replacements[j].mode;
4407 else if (replacements[j].where == &XEXP (x, i))
4409 r = &replacements[n_replacements++];
4410 r->where = &XEXP (y, i);
4412 r->what = replacements[j].what;
4413 r->mode = replacements[j].mode;
4418 /* If LOC was scheduled to be replaced by something, return the replacement.
4419 Otherwise, return *LOC. */
4422 find_replacement (loc)
4425 struct replacement *r;
4427 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
4429 rtx reloadreg = reload_reg_rtx[r->what];
4431 if (reloadreg && r->where == loc)
4433 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
4434 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
4438 else if (reloadreg && r->subreg_loc == loc)
4440 /* RELOADREG must be either a REG or a SUBREG.
4442 ??? Is it actually still ever a SUBREG? If so, why? */
4444 if (GET_CODE (reloadreg) == REG)
4445 return gen_rtx (REG, GET_MODE (*loc),
4446 REGNO (reloadreg) + SUBREG_WORD (*loc));
4447 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
4450 return gen_rtx (SUBREG, GET_MODE (*loc), SUBREG_REG (reloadreg),
4451 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
4458 /* Return nonzero if register in range [REGNO, ENDREGNO)
4459 appears either explicitly or implicitly in X
4460 other than being stored into.
4462 References contained within the substructure at LOC do not count.
4463 LOC may be zero, meaning don't ignore anything.
4465 This is similar to refers_to_regno_p in rtlanal.c except that we
4466 look at equivalences for pseudos that didn't get hard registers. */
4469 refers_to_regno_for_reload_p (regno, endregno, x, loc)
4470 int regno, endregno;
4475 register RTX_CODE code;
4482 code = GET_CODE (x);
4489 /* If this is a pseudo, a hard register must not have been allocated.
4490 X must therefore either be a constant or be in memory. */
4491 if (i >= FIRST_PSEUDO_REGISTER)
4493 if (reg_equiv_memory_loc[i])
4494 return refers_to_regno_for_reload_p (regno, endregno,
4495 reg_equiv_memory_loc[i],
4498 if (reg_equiv_constant[i])
4504 return (endregno > i
4505 && regno < i + (i < FIRST_PSEUDO_REGISTER
4506 ? HARD_REGNO_NREGS (i, GET_MODE (x))
4510 /* If this is a SUBREG of a hard reg, we can see exactly which
4511 registers are being modified. Otherwise, handle normally. */
4512 if (GET_CODE (SUBREG_REG (x)) == REG
4513 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
4515 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
4517 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
4518 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
4520 return endregno > inner_regno && regno < inner_endregno;
4526 if (&SET_DEST (x) != loc
4527 /* Note setting a SUBREG counts as referring to the REG it is in for
4528 a pseudo but not for hard registers since we can
4529 treat each word individually. */
4530 && ((GET_CODE (SET_DEST (x)) == SUBREG
4531 && loc != &SUBREG_REG (SET_DEST (x))
4532 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
4533 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
4534 && refers_to_regno_for_reload_p (regno, endregno,
4535 SUBREG_REG (SET_DEST (x)),
4537 || (GET_CODE (SET_DEST (x)) != REG
4538 && refers_to_regno_for_reload_p (regno, endregno,
4539 SET_DEST (x), loc))))
4542 if (code == CLOBBER || loc == &SET_SRC (x))
4548 /* X does not match, so try its subexpressions. */
4550 fmt = GET_RTX_FORMAT (code);
4551 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4553 if (fmt[i] == 'e' && loc != &XEXP (x, i))
4561 if (refers_to_regno_for_reload_p (regno, endregno,
4565 else if (fmt[i] == 'E')
4568 for (j = XVECLEN (x, i) - 1; j >=0; j--)
4569 if (loc != &XVECEXP (x, i, j)
4570 && refers_to_regno_for_reload_p (regno, endregno,
4571 XVECEXP (x, i, j), loc))
4578 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
4579 we check if any register number in X conflicts with the relevant register
4580 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
4581 contains a MEM (we don't bother checking for memory addresses that can't
4582 conflict because we expect this to be a rare case.
4584 This function is similar to reg_overlap_mention_p in rtlanal.c except
4585 that we look at equivalences for pseudos that didn't get hard registers. */
4588 reg_overlap_mentioned_for_reload_p (x, in)
4591 int regno, endregno;
4593 if (GET_CODE (x) == SUBREG)
4595 regno = REGNO (SUBREG_REG (x));
4596 if (regno < FIRST_PSEUDO_REGISTER)
4597 regno += SUBREG_WORD (x);
4599 else if (GET_CODE (x) == REG)
4603 /* If this is a pseudo, it must not have been assigned a hard register.
4604 Therefore, it must either be in memory or be a constant. */
4606 if (regno >= FIRST_PSEUDO_REGISTER)
4608 if (reg_equiv_memory_loc[regno])
4609 return refers_to_mem_for_reload_p (in);
4610 else if (reg_equiv_constant[regno])
4615 else if (CONSTANT_P (x))
4617 else if (GET_CODE (x) == MEM)
4618 return refers_to_mem_for_reload_p (in);
4619 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
4620 || GET_CODE (x) == CC0)
4621 return reg_mentioned_p (x, in);
4625 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
4626 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
4628 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
4631 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
4635 refers_to_mem_for_reload_p (x)
4641 if (GET_CODE (x) == MEM)
4644 if (GET_CODE (x) == REG)
4645 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
4646 && reg_equiv_memory_loc[REGNO (x)]);
4648 fmt = GET_RTX_FORMAT (GET_CODE (x));
4649 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4651 && (GET_CODE (XEXP (x, i)) == MEM
4652 || refers_to_mem_for_reload_p (XEXP (x, i))))
4660 /* [[This function is currently obsolete, now that volatility
4661 is represented by a special bit `volatil' so VOLATILE is never used;
4662 and UNCHANGING has never been brought into use.]]
4664 Alter X by eliminating all VOLATILE and UNCHANGING expressions.
4665 Each of them is replaced by its operand.
4666 Thus, (PLUS (VOLATILE (MEM (REG 5))) (CONST_INT 4))
4667 becomes (PLUS (MEM (REG 5)) (CONST_INT 4)).
4669 If X is itself a VOLATILE expression,
4670 we return the expression that should replace it
4671 but we do not modify X. */
4674 forget_volatility (x)
4677 enum rtx_code code = GET_CODE (x);
4680 register rtx value = 0;
4699 fmt = GET_RTX_FORMAT (code);
4700 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4703 XEXP (x, i) = forget_volatility (XEXP (x, i));
4707 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
4708 XVECEXP (x, i, j) = forget_volatility (XVECEXP (x, i, j));
4717 /* Check the insns before INSN to see if there is a suitable register
4718 containing the same value as GOAL.
4719 If OTHER is -1, look for a register in class CLASS.
4720 Otherwise, just see if register number OTHER shares GOAL's value.
4722 Return an rtx for the register found, or zero if none is found.
4724 If RELOAD_REG_P is (short *)1,
4725 we reject any hard reg that appears in reload_reg_rtx
4726 because such a hard reg is also needed coming into this insn.
4728 If RELOAD_REG_P is any other nonzero value,
4729 it is a vector indexed by hard reg number
4730 and we reject any hard reg whose element in the vector is nonnegative
4731 as well as any that appears in reload_reg_rtx.
4733 If GOAL is zero, then GOALREG is a register number; we look
4734 for an equivalent for that register.
4736 MODE is the machine mode of the value we want an equivalence for.
4737 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
4739 This function is used by jump.c as well as in the reload pass.
4741 If GOAL is the sum of the stack pointer and a constant, we treat it
4742 as if it were a constant except that sp is required to be unchanging. */
4745 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
4748 enum reg_class class;
4750 short *reload_reg_p;
4752 enum machine_mode mode;
4754 register rtx p = insn;
4755 rtx valtry, value, where;
4757 register int regno = -1;
4761 int goal_mem_addr_varies = 0;
4762 int need_stable_sp = 0;
4768 else if (GET_CODE (goal) == REG)
4769 regno = REGNO (goal);
4770 else if (GET_CODE (goal) == MEM)
4772 enum rtx_code code = GET_CODE (XEXP (goal, 0));
4773 if (MEM_VOLATILE_P (goal))
4775 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
4777 /* An address with side effects must be reexecuted. */
4788 else if (CONSTANT_P (goal))
4790 else if (GET_CODE (goal) == PLUS
4791 && XEXP (goal, 0) == stack_pointer_rtx
4792 && CONSTANT_P (XEXP (goal, 1)))
4793 goal_const = need_stable_sp = 1;
4797 /* On some machines, certain regs must always be rejected
4798 because they don't behave the way ordinary registers do. */
4800 #ifdef OVERLAPPING_REGNO_P
4801 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
4802 && OVERLAPPING_REGNO_P (regno))
4806 /* Scan insns back from INSN, looking for one that copies
4807 a value into or out of GOAL.
4808 Stop and give up if we reach a label. */
4813 if (p == 0 || GET_CODE (p) == CODE_LABEL)
4815 if (GET_CODE (p) == INSN
4816 /* If we don't want spill regs ... */
4817 && (! (reload_reg_p != 0 && reload_reg_p != (short *)1)
4818 /* ... then ignore insns introduced by reload; they aren't useful
4819 and can cause results in reload_as_needed to be different
4820 from what they were when calculating the need for spills.
4821 If we notice an input-reload insn here, we will reject it below,
4822 but it might hide a usable equivalent. That makes bad code.
4823 It may even abort: perhaps no reg was spilled for this insn
4824 because it was assumed we would find that equivalent. */
4825 || INSN_UID (p) < reload_first_uid))
4828 pat = single_set (p);
4829 /* First check for something that sets some reg equal to GOAL. */
4832 && true_regnum (SET_SRC (pat)) == regno
4833 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
4836 && true_regnum (SET_DEST (pat)) == regno
4837 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
4839 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
4840 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
4842 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
4843 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
4845 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
4846 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
4847 /* If we are looking for a constant,
4848 and something equivalent to that constant was copied
4849 into a reg, we can use that reg. */
4850 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
4852 && rtx_equal_p (XEXP (tem, 0), goal)
4853 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
4854 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
4856 && GET_CODE (SET_DEST (pat)) == REG
4857 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
4858 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
4859 && GET_CODE (goal) == CONST_INT
4860 && INTVAL (goal) == CONST_DOUBLE_LOW (XEXP (tem, 0))
4861 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
4863 && (valueno = true_regnum (valtry)) >= 0)
4864 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
4866 && GET_CODE (SET_DEST (pat)) == REG
4867 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
4868 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
4869 && GET_CODE (goal) == CONST_INT
4870 && INTVAL (goal) == CONST_DOUBLE_HIGH (XEXP (tem, 0))
4872 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
4873 && (valueno = true_regnum (valtry)) >= 0)))
4876 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
4877 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
4887 /* We found a previous insn copying GOAL into a suitable other reg VALUE
4888 (or copying VALUE into GOAL, if GOAL is also a register).
4889 Now verify that VALUE is really valid. */
4891 /* VALUENO is the register number of VALUE; a hard register. */
4893 /* Don't try to re-use something that is killed in this insn. We want
4894 to be able to trust REG_UNUSED notes. */
4895 if (find_reg_note (where, REG_UNUSED, value))
4898 /* If we propose to get the value from the stack pointer or if GOAL is
4899 a MEM based on the stack pointer, we need a stable SP. */
4900 if (valueno == STACK_POINTER_REGNUM
4901 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
4905 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
4906 if (GET_MODE (value) != mode)
4909 /* Reject VALUE if it was loaded from GOAL
4910 and is also a register that appears in the address of GOAL. */
4912 if (goal_mem && value == SET_DEST (PATTERN (where))
4913 && refers_to_regno_for_reload_p (valueno,
4915 + HARD_REGNO_NREGS (valueno, mode)),
4919 /* Reject registers that overlap GOAL. */
4921 if (!goal_mem && !goal_const
4922 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
4923 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
4926 /* Reject VALUE if it is one of the regs reserved for reloads.
4927 Reload1 knows how to reuse them anyway, and it would get
4928 confused if we allocated one without its knowledge.
4929 (Now that insns introduced by reload are ignored above,
4930 this case shouldn't happen, but I'm not positive.) */
4932 if (reload_reg_p != 0 && reload_reg_p != (short *)1
4933 && reload_reg_p[valueno] >= 0)
4936 /* On some machines, certain regs must always be rejected
4937 because they don't behave the way ordinary registers do. */
4939 #ifdef OVERLAPPING_REGNO_P
4940 if (OVERLAPPING_REGNO_P (valueno))
4944 nregs = HARD_REGNO_NREGS (regno, mode);
4945 valuenregs = HARD_REGNO_NREGS (valueno, mode);
4947 /* Reject VALUE if it is a register being used for an input reload
4948 even if it is not one of those reserved. */
4950 if (reload_reg_p != 0)
4953 for (i = 0; i < n_reloads; i++)
4954 if (reload_reg_rtx[i] != 0 && reload_in[i])
4956 int regno1 = REGNO (reload_reg_rtx[i]);
4957 int nregs1 = HARD_REGNO_NREGS (regno1,
4958 GET_MODE (reload_reg_rtx[i]));
4959 if (regno1 < valueno + valuenregs
4960 && regno1 + nregs1 > valueno)
4966 goal_mem_addr_varies = rtx_addr_varies_p (goal);
4968 /* Now verify that the values of GOAL and VALUE remain unaltered
4969 until INSN is reached. */
4978 /* Don't trust the conversion past a function call
4979 if either of the two is in a call-clobbered register, or memory. */
4980 if (GET_CODE (p) == CALL_INSN
4981 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
4982 && call_used_regs[regno])
4984 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
4985 && call_used_regs[valueno])
4991 #ifdef INSN_CLOBBERS_REGNO_P
4992 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
4993 && INSN_CLOBBERS_REGNO_P (p, valueno))
4994 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
4995 && INSN_CLOBBERS_REGNO_P (p, regno)))
4999 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
5001 /* If this insn P stores in either GOAL or VALUE, return 0.
5002 If GOAL is a memory ref and this insn writes memory, return 0.
5003 If GOAL is a memory ref and its address is not constant,
5004 and this insn P changes a register used in GOAL, return 0. */
5007 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
5009 register rtx dest = SET_DEST (pat);
5010 while (GET_CODE (dest) == SUBREG
5011 || GET_CODE (dest) == ZERO_EXTRACT
5012 || GET_CODE (dest) == SIGN_EXTRACT
5013 || GET_CODE (dest) == STRICT_LOW_PART)
5014 dest = XEXP (dest, 0);
5015 if (GET_CODE (dest) == REG)
5017 register int xregno = REGNO (dest);
5019 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5020 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5023 if (xregno < regno + nregs && xregno + xnregs > regno)
5025 if (xregno < valueno + valuenregs
5026 && xregno + xnregs > valueno)
5028 if (goal_mem_addr_varies
5029 && reg_overlap_mentioned_for_reload_p (dest, goal))
5032 else if (goal_mem && GET_CODE (dest) == MEM
5033 && ! push_operand (dest, GET_MODE (dest)))
5035 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
5038 else if (GET_CODE (pat) == PARALLEL)
5041 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
5043 register rtx v1 = XVECEXP (pat, 0, i);
5044 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
5046 register rtx dest = SET_DEST (v1);
5047 while (GET_CODE (dest) == SUBREG
5048 || GET_CODE (dest) == ZERO_EXTRACT
5049 || GET_CODE (dest) == SIGN_EXTRACT
5050 || GET_CODE (dest) == STRICT_LOW_PART)
5051 dest = XEXP (dest, 0);
5052 if (GET_CODE (dest) == REG)
5054 register int xregno = REGNO (dest);
5056 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5057 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5060 if (xregno < regno + nregs
5061 && xregno + xnregs > regno)
5063 if (xregno < valueno + valuenregs
5064 && xregno + xnregs > valueno)
5066 if (goal_mem_addr_varies
5067 && reg_overlap_mentioned_for_reload_p (dest,
5071 else if (goal_mem && GET_CODE (dest) == MEM
5072 && ! push_operand (dest, GET_MODE (dest)))
5074 else if (need_stable_sp
5075 && push_operand (dest, GET_MODE (dest)))
5082 /* If this insn auto-increments or auto-decrements
5083 either regno or valueno, return 0 now.
5084 If GOAL is a memory ref and its address is not constant,
5085 and this insn P increments a register used in GOAL, return 0. */
5089 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
5090 if (REG_NOTE_KIND (link) == REG_INC
5091 && GET_CODE (XEXP (link, 0)) == REG)
5093 register int incno = REGNO (XEXP (link, 0));
5094 if (incno < regno + nregs && incno >= regno)
5096 if (incno < valueno + valuenregs && incno >= valueno)
5098 if (goal_mem_addr_varies
5099 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
5109 /* Find a place where INCED appears in an increment or decrement operator
5110 within X, and return the amount INCED is incremented or decremented by.
5111 The value is always positive. */
5114 find_inc_amount (x, inced)
5117 register enum rtx_code code = GET_CODE (x);
5123 register rtx addr = XEXP (x, 0);
5124 if ((GET_CODE (addr) == PRE_DEC
5125 || GET_CODE (addr) == POST_DEC
5126 || GET_CODE (addr) == PRE_INC
5127 || GET_CODE (addr) == POST_INC)
5128 && XEXP (addr, 0) == inced)
5129 return GET_MODE_SIZE (GET_MODE (x));
5132 fmt = GET_RTX_FORMAT (code);
5133 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5137 register int tem = find_inc_amount (XEXP (x, i), inced);
5144 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5146 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
5156 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5159 regno_clobbered_p (regno, insn)
5163 if (GET_CODE (PATTERN (insn)) == CLOBBER
5164 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
5165 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
5167 if (GET_CODE (PATTERN (insn)) == PARALLEL)
5169 int i = XVECLEN (PATTERN (insn), 0) - 1;
5173 rtx elt = XVECEXP (PATTERN (insn), 0, i);
5174 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
5175 && REGNO (XEXP (elt, 0)) == regno)
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