1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This file contains subroutines used only from the file reload1.c.
22 It knows how to scan one insn for operands and values
23 that need to be copied into registers to make valid code.
24 It also finds other operands and values which are valid
25 but for which equivalent values in registers exist and
26 ought to be used instead.
28 Before processing the first insn of the function, call `init_reload'.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
91 #include "insn-config.h"
92 #include "insn-codes.h"
96 #include "hard-reg-set.h"
100 #ifndef REGISTER_MOVE_COST
101 #define REGISTER_MOVE_COST(x, y) 2
104 /* The variables set up by `find_reloads' are:
106 n_reloads number of distinct reloads needed; max reload # + 1
107 tables indexed by reload number
108 reload_in rtx for value to reload from
109 reload_out rtx for where to store reload-reg afterward if nec
110 (often the same as reload_in)
111 reload_reg_class enum reg_class, saying what regs to reload into
112 reload_inmode enum machine_mode; mode this operand should have
113 when reloaded, on input.
114 reload_outmode enum machine_mode; mode this operand should have
115 when reloaded, on output.
116 reload_optional char, nonzero for an optional reload.
117 Optional reloads are ignored unless the
118 value is already sitting in a register.
119 reload_inc int, positive amount to increment or decrement by if
120 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
121 Ignored otherwise (don't assume it is zero).
122 reload_in_reg rtx. A reg for which reload_in is the equivalent.
123 If reload_in is a symbol_ref which came from
124 reg_equiv_constant, then this is the pseudo
125 which has that symbol_ref as equivalent.
126 reload_reg_rtx rtx. This is the register to reload into.
127 If it is zero when `find_reloads' returns,
128 you must find a suitable register in the class
129 specified by reload_reg_class, and store here
130 an rtx for that register with mode from
131 reload_inmode or reload_outmode.
132 reload_nocombine char, nonzero if this reload shouldn't be
133 combined with another reload.
134 reload_opnum int, operand number being reloaded. This is
135 used to group related reloads and need not always
136 be equal to the actual operand number in the insn,
137 though it current will be; for in-out operands, it
138 is one of the two operand numbers.
139 reload_when_needed enum, classifies reload as needed either for
140 addressing an input reload, addressing an output,
141 for addressing a non-reloaded mem ref,
142 or for unspecified purposes (i.e., more than one
144 reload_secondary_reload int, gives the reload number of a secondary
145 reload, when needed; otherwise -1
146 reload_secondary_p int, 1 if this is a secondary register for one
148 reload_secondary_icode enum insn_code, if a secondary reload is required,
149 gives the INSN_CODE that uses the secondary
150 reload as a scratch register, or CODE_FOR_nothing
151 if the secondary reload register is to be an
152 intermediate register. */
155 rtx reload_in[MAX_RELOADS];
156 rtx reload_out[MAX_RELOADS];
157 enum reg_class reload_reg_class[MAX_RELOADS];
158 enum machine_mode reload_inmode[MAX_RELOADS];
159 enum machine_mode reload_outmode[MAX_RELOADS];
160 rtx reload_reg_rtx[MAX_RELOADS];
161 char reload_optional[MAX_RELOADS];
162 int reload_inc[MAX_RELOADS];
163 rtx reload_in_reg[MAX_RELOADS];
164 char reload_nocombine[MAX_RELOADS];
165 int reload_opnum[MAX_RELOADS];
166 enum reload_type reload_when_needed[MAX_RELOADS];
167 int reload_secondary_reload[MAX_RELOADS];
168 int reload_secondary_p[MAX_RELOADS];
169 enum insn_code reload_secondary_icode[MAX_RELOADS];
171 /* All the "earlyclobber" operands of the current insn
172 are recorded here. */
174 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
176 int reload_n_operands;
178 /* Replacing reloads.
180 If `replace_reloads' is nonzero, then as each reload is recorded
181 an entry is made for it in the table `replacements'.
182 Then later `subst_reloads' can look through that table and
183 perform all the replacements needed. */
185 /* Nonzero means record the places to replace. */
186 static int replace_reloads;
188 /* Each replacement is recorded with a structure like this. */
191 rtx *where; /* Location to store in */
192 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
193 a SUBREG; 0 otherwise. */
194 int what; /* which reload this is for */
195 enum machine_mode mode; /* mode it must have */
198 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
200 /* Number of replacements currently recorded. */
201 static int n_replacements;
203 /* Used to track what is modified by an operand. */
206 int reg_flag; /* Nonzero if referencing a register. */
207 int safe; /* Nonzero if this can't conflict with anything. */
208 rtx base; /* Base adddress for MEM. */
209 HOST_WIDE_INT start; /* Starting offset or register number. */
210 HOST_WIDE_INT end; /* Endinf offset or register number. */
213 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
214 (see reg_equiv_address). */
215 static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
216 static int n_memlocs;
218 #ifdef SECONDARY_MEMORY_NEEDED
220 /* Save MEMs needed to copy from one class of registers to another. One MEM
221 is used per mode, but normally only one or two modes are ever used.
223 We keep two versions, before and after register elimination. The one
224 after register elimination is record separately for each operand. This
225 is done in case the address is not valid to be sure that we separately
228 static rtx secondary_memlocs[NUM_MACHINE_MODES];
229 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
232 /* The instruction we are doing reloads for;
233 so we can test whether a register dies in it. */
234 static rtx this_insn;
236 /* Nonzero if this instruction is a user-specified asm with operands. */
237 static int this_insn_is_asm;
239 /* If hard_regs_live_known is nonzero,
240 we can tell which hard regs are currently live,
241 at least enough to succeed in choosing dummy reloads. */
242 static int hard_regs_live_known;
244 /* Indexed by hard reg number,
245 element is nonegative if hard reg has been spilled.
246 This vector is passed to `find_reloads' as an argument
247 and is not changed here. */
248 static short *static_reload_reg_p;
250 /* Set to 1 in subst_reg_equivs if it changes anything. */
251 static int subst_reg_equivs_changed;
253 /* On return from push_reload, holds the reload-number for the OUT
254 operand, which can be different for that from the input operand. */
255 static int output_reloadnum;
257 static enum reg_class find_secondary_reload PROTO((rtx, enum reg_class,
258 enum machine_mode, int,
263 enum machine_mode *));
264 static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
265 enum machine_mode, enum machine_mode,
266 int, int, int, enum reload_type));
267 static void push_replacement PROTO((rtx *, int, enum machine_mode));
268 static void combine_reloads PROTO((void));
269 static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
270 enum reg_class, int));
271 static int hard_reg_set_here_p PROTO((int, int, rtx));
272 static struct decomposition decompose PROTO((rtx));
273 static int immune_p PROTO((rtx, rtx, struct decomposition));
274 static int alternative_allows_memconst PROTO((char *, int));
275 static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int));
276 static rtx make_memloc PROTO((rtx, int));
277 static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
278 int, enum reload_type, int));
279 static rtx subst_reg_equivs PROTO((rtx));
280 static rtx subst_indexed_address PROTO((rtx));
281 static int find_reloads_address_1 PROTO((rtx, int, rtx *, int,
282 enum reload_type,int));
283 static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
284 enum machine_mode, int,
285 enum reload_type, int));
286 static int find_inc_amount PROTO((rtx, rtx));
288 #ifdef HAVE_SECONDARY_RELOADS
290 /* Determine if any secondary reloads are needed for loading (if IN_P is
291 non-zero) or storing (if IN_P is zero) X to or from a reload register of
292 register class RELOAD_CLASS in mode RELOAD_MODE.
294 Return the register class of a secondary reload register, or NO_REGS if
295 none. *PMODE is set to the mode that the register is required in.
296 If the reload register is needed as a scratch register instead of an
297 intermediate register, *PICODE is set to the insn_code of the insn to be
298 used to load or store the primary reload register; otherwise *PICODE
299 is set to CODE_FOR_nothing.
301 In some cases (such as storing MQ into an external memory location on
302 the RT), both an intermediate register and a scratch register. In that
303 case, *PICODE is set to CODE_FOR_nothing, the class for the intermediate
304 register is returned, and the *PTERTIARY_... variables are set to describe
305 the scratch register. */
307 static enum reg_class
308 find_secondary_reload (x, reload_class, reload_mode, in_p, picode, pmode,
309 ptertiary_class, ptertiary_icode, ptertiary_mode)
311 enum reg_class reload_class;
312 enum machine_mode reload_mode;
314 enum insn_code *picode;
315 enum machine_mode *pmode;
316 enum reg_class *ptertiary_class;
317 enum insn_code *ptertiary_icode;
318 enum machine_mode *ptertiary_mode;
320 enum reg_class class = NO_REGS;
321 enum machine_mode mode = reload_mode;
322 enum insn_code icode = CODE_FOR_nothing;
323 enum reg_class t_class = NO_REGS;
324 enum machine_mode t_mode = VOIDmode;
325 enum insn_code t_icode = CODE_FOR_nothing;
327 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
328 is still a pseudo-register by now, it *must* have an equivalent MEM
329 but we don't want to assume that), use that equivalent when seeing if
330 a secondary reload is needed since whether or not a reload is needed
331 might be sensitive to the form of the MEM. */
333 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
334 && reg_equiv_mem[REGNO (x)] != 0)
335 x = reg_equiv_mem[REGNO (x)];
337 #ifdef SECONDARY_INPUT_RELOAD_CLASS
339 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
342 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
344 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
347 /* If we don't need any secondary registers, go away; the rest of the
348 values won't be used. */
349 if (class == NO_REGS)
352 /* Get a possible insn to use. If the predicate doesn't accept X, don't
355 icode = (in_p ? reload_in_optab[(int) reload_mode]
356 : reload_out_optab[(int) reload_mode]);
358 if (icode != CODE_FOR_nothing
359 && insn_operand_predicate[(int) icode][in_p]
360 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
361 icode = CODE_FOR_nothing;
363 /* If we will be using an insn, see if it can directly handle the reload
364 register we will be using. If it can, the secondary reload is for a
365 scratch register. If it can't, we will use the secondary reload for
366 an intermediate register and require a tertiary reload for the scratch
369 if (icode != CODE_FOR_nothing)
371 /* If IN_P is non-zero, the reload register will be the output in
372 operand 0. If IN_P is zero, the reload register will be the input
373 in operand 1. Outputs should have an initial "=", which we must
376 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
377 enum reg_class insn_class
378 = (insn_letter == 'r' ? GENERAL_REGS
379 : REG_CLASS_FROM_LETTER (insn_letter));
381 if (insn_class == NO_REGS
382 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
383 /* The scratch register's constraint must start with "=&". */
384 || insn_operand_constraint[(int) icode][2][0] != '='
385 || insn_operand_constraint[(int) icode][2][1] != '&')
388 if (reg_class_subset_p (reload_class, insn_class))
389 mode = insn_operand_mode[(int) icode][2];
392 char t_letter = insn_operand_constraint[(int) icode][2][2];
394 t_mode = insn_operand_mode[(int) icode][2];
395 t_class = (t_letter == 'r' ? GENERAL_REGS
396 : REG_CLASS_FROM_LETTER (t_letter));
398 icode = CODE_FOR_nothing;
404 *ptertiary_class = t_class;
405 *ptertiary_mode = t_mode;
406 *ptertiary_icode = t_icode;
410 #endif /* HAVE_SECONDARY_RELOADS */
412 #ifdef SECONDARY_MEMORY_NEEDED
414 /* Return a memory location that will be used to copy X in mode MODE.
415 If we haven't already made a location for this mode in this insn,
416 call find_reloads_address on the location being returned. */
419 get_secondary_mem (x, mode, opnum, type)
421 enum machine_mode mode;
423 enum reload_type type;
428 /* If MODE is narrower than a word, widen it. This is required because
429 most machines that require these memory locations do not support
430 short load and stores from all registers (e.g., FP registers). We could
431 possibly conditionalize this, but we lose nothing by doing the wider
434 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
435 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
437 /* If we already have made a MEM for this operand in MODE, return it. */
438 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
439 return secondary_memlocs_elim[(int) mode][opnum];
441 /* If this is the first time we've tried to get a MEM for this mode,
442 allocate a new one. `something_changed' in reload will get set
443 by noticing that the frame size has changed. */
445 if (secondary_memlocs[(int) mode] == 0)
447 #ifdef SECONDARY_MEMORY_NEEDED_RTX
448 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
450 secondary_memlocs[(int) mode]
451 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
455 /* Get a version of the address doing any eliminations needed. If that
456 didn't give us a new MEM, make a new one if it isn't valid. */
458 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
459 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
461 if (! mem_valid && loc == secondary_memlocs[(int) mode])
462 loc = copy_rtx (loc);
464 /* The only time the call below will do anything is if the stack
465 offset is too large. In that case IND_LEVELS doesn't matter, so we
466 can just pass a zero. Adjust the type to be the address of the
467 corresponding object. If the address was valid, save the eliminated
468 address. If it wasn't valid, we need to make a reload each time, so
473 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
474 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
477 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
481 secondary_memlocs_elim[(int) mode][opnum] = loc;
485 /* Clear any secondary memory locations we've made. */
488 clear_secondary_mem ()
490 bzero (secondary_memlocs, sizeof secondary_memlocs);
492 #endif /* SECONDARY_MEMORY_NEEDED */
494 /* Record one reload that needs to be performed.
495 IN is an rtx saying where the data are to be found before this instruction.
496 OUT says where they must be stored after the instruction.
497 (IN is zero for data not read, and OUT is zero for data not written.)
498 INLOC and OUTLOC point to the places in the instructions where
499 IN and OUT were found.
500 If IN and OUT are both non-zero, it means the same register must be used
501 to reload both IN and OUT.
503 CLASS is a register class required for the reloaded data.
504 INMODE is the machine mode that the instruction requires
505 for the reg that replaces IN and OUTMODE is likewise for OUT.
507 If IN is zero, then OUT's location and mode should be passed as
510 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
512 OPTIONAL nonzero means this reload does not need to be performed:
513 it can be discarded if that is more convenient.
515 OPNUM and TYPE say what the purpose of this reload is.
517 The return value is the reload-number for this reload.
519 If both IN and OUT are nonzero, in some rare cases we might
520 want to make two separate reloads. (Actually we never do this now.)
521 Therefore, the reload-number for OUT is stored in
522 output_reloadnum when we return; the return value applies to IN.
523 Usually (presently always), when IN and OUT are nonzero,
524 the two reload-numbers are equal, but the caller should be careful to
528 push_reload (in, out, inloc, outloc, class,
529 inmode, outmode, strict_low, optional, opnum, type)
530 register rtx in, out;
532 enum reg_class class;
533 enum machine_mode inmode, outmode;
537 enum reload_type type;
541 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
542 int secondary_reload = -1;
543 enum insn_code secondary_icode = CODE_FOR_nothing;
545 /* Compare two RTX's. */
546 #define MATCHES(x, y) \
547 (x == y || (x != 0 && (GET_CODE (x) == REG \
548 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
549 : rtx_equal_p (x, y) && ! side_effects_p (x))))
551 /* Indicates if two reloads purposes are for similar enough things that we
552 can merge their reloads. */
553 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
554 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
555 || ((when1) == (when2) && (op1) == (op2)) \
556 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
557 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
558 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
559 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
560 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
562 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
563 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
564 ((when1) != (when2) \
565 || ! ((op1) == (op2) \
566 || (when1) == RELOAD_FOR_INPUT \
567 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
568 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
570 /* INMODE and/or OUTMODE could be VOIDmode if no mode
571 has been specified for the operand. In that case,
572 use the operand's mode as the mode to reload. */
573 if (inmode == VOIDmode && in != 0)
574 inmode = GET_MODE (in);
575 if (outmode == VOIDmode && out != 0)
576 outmode = GET_MODE (out);
578 /* If IN is a pseudo register everywhere-equivalent to a constant, and
579 it is not in a hard register, reload straight from the constant,
580 since we want to get rid of such pseudo registers.
581 Often this is done earlier, but not always in find_reloads_address. */
582 if (in != 0 && GET_CODE (in) == REG)
584 register int regno = REGNO (in);
586 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
587 && reg_equiv_constant[regno] != 0)
588 in = reg_equiv_constant[regno];
591 /* Likewise for OUT. Of course, OUT will never be equivalent to
592 an actual constant, but it might be equivalent to a memory location
593 (in the case of a parameter). */
594 if (out != 0 && GET_CODE (out) == REG)
596 register int regno = REGNO (out);
598 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
599 && reg_equiv_constant[regno] != 0)
600 out = reg_equiv_constant[regno];
603 /* If we have a read-write operand with an address side-effect,
604 change either IN or OUT so the side-effect happens only once. */
605 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
607 if (GET_CODE (XEXP (in, 0)) == POST_INC
608 || GET_CODE (XEXP (in, 0)) == POST_DEC)
609 in = gen_rtx (MEM, GET_MODE (in), XEXP (XEXP (in, 0), 0));
610 if (GET_CODE (XEXP (in, 0)) == PRE_INC
611 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
612 out = gen_rtx (MEM, GET_MODE (out), XEXP (XEXP (out, 0), 0));
615 /* If we are reloading a (SUBREG (MEM ...) ...) or (SUBREG constant ...),
616 really reload just the inside expression in its own mode.
617 If we have (SUBREG:M1 (REG:M2 ...) ...) with M1 wider than M2 and the
618 register is a pseudo, this will become the same as the above case.
619 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
620 either M1 is not valid for R or M2 is wider than a word but we only
621 need one word to store an M2-sized quantity in R.
622 (However, if OUT is nonzero, we need to reload the reg *and*
623 the subreg, so do nothing here, and let following statement handle it.)
625 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
626 we can't handle it here because CONST_INT does not indicate a mode.
628 Similarly, we must reload the inside expression if we have a
629 STRICT_LOW_PART (presumably, in == out in the cas).
631 Also reload the inner expression if it does not require a secondary
632 reload but the SUBREG does. */
634 if (in != 0 && GET_CODE (in) == SUBREG
635 && (GET_CODE (SUBREG_REG (in)) != REG
637 || (GET_CODE (SUBREG_REG (in)) == REG
638 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER
639 && (GET_MODE_SIZE (inmode)
640 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))))
641 || (REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
642 /* The case where out is nonzero
643 is handled differently in the following statement. */
644 && (out == 0 || SUBREG_WORD (in) == 0)
645 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in)), inmode)
646 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
647 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
649 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
651 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
652 GET_MODE (SUBREG_REG (in)))))))
653 #ifdef SECONDARY_INPUT_RELOAD_CLASS
654 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
655 && (SECONDARY_INPUT_RELOAD_CLASS (class,
656 GET_MODE (SUBREG_REG (in)),
662 in_subreg_loc = inloc;
663 inloc = &SUBREG_REG (in);
665 #if ! defined(BYTE_LOADS_ZERO_EXTEND) && ! defined(BYTE_LOADS_SIGN_EXTEND)
666 if (GET_CODE (in) == MEM)
667 /* This is supposed to happen only for paradoxical subregs made by
668 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
669 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
672 inmode = GET_MODE (in);
675 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
676 either M1 is not valid for R or M2 is wider than a word but we only
677 need one word to store an M2-sized quantity in R.
679 However, we must reload the inner reg *as well as* the subreg in
682 if (in != 0 && GET_CODE (in) == SUBREG
683 && GET_CODE (SUBREG_REG (in)) == REG
684 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
685 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in)), inmode)
686 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
687 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
689 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
691 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
692 GET_MODE (SUBREG_REG (in)))))))
694 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
695 GENERAL_REGS, VOIDmode, VOIDmode, 0, 0, opnum, type);
699 /* Similarly for paradoxical and problematical SUBREGs on the output.
700 Note that there is no reason we need worry about the previous value
701 of SUBREG_REG (out); even if wider than out,
702 storing in a subreg is entitled to clobber it all
703 (except in the case of STRICT_LOW_PART,
704 and in that case the constraint should label it input-output.) */
705 if (out != 0 && GET_CODE (out) == SUBREG
706 && (GET_CODE (SUBREG_REG (out)) != REG
708 || (GET_CODE (SUBREG_REG (out)) == REG
709 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER
710 && (GET_MODE_SIZE (outmode)
711 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))))
712 || (GET_CODE (SUBREG_REG (out)) == REG
713 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
714 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)), outmode)
715 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
716 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
718 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
720 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
721 GET_MODE (SUBREG_REG (out)))))))
722 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
723 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
724 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
725 GET_MODE (SUBREG_REG (out)),
731 out_subreg_loc = outloc;
732 outloc = &SUBREG_REG (out);
734 #if ! defined(BYTE_LOADS_ZERO_EXTEND) && ! defined(BYTE_LOADS_SIGN_EXTEND)
735 if (GET_CODE (out) == MEM
736 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
739 outmode = GET_MODE (out);
742 /* If IN appears in OUT, we can't share any input-only reload for IN. */
743 if (in != 0 && out != 0 && GET_CODE (out) == MEM
744 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
745 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
748 /* If IN is a SUBREG of a hard register, make a new REG. This
749 simplifies some of the cases below. */
751 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
752 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
753 in = gen_rtx (REG, GET_MODE (in),
754 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
756 /* Similarly for OUT. */
757 if (out != 0 && GET_CODE (out) == SUBREG
758 && GET_CODE (SUBREG_REG (out)) == REG
759 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
760 out = gen_rtx (REG, GET_MODE (out),
761 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
763 /* Narrow down the class of register wanted if that is
764 desirable on this machine for efficiency. */
766 class = PREFERRED_RELOAD_CLASS (in, class);
768 /* Output reloads may need analogous treatment, different in detail. */
769 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
771 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
774 /* Make sure we use a class that can handle the actual pseudo
775 inside any subreg. For example, on the 386, QImode regs
776 can appear within SImode subregs. Although GENERAL_REGS
777 can handle SImode, QImode needs a smaller class. */
778 #ifdef LIMIT_RELOAD_CLASS
780 class = LIMIT_RELOAD_CLASS (inmode, class);
781 else if (in != 0 && GET_CODE (in) == SUBREG)
782 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
785 class = LIMIT_RELOAD_CLASS (outmode, class);
786 if (out != 0 && GET_CODE (out) == SUBREG)
787 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
790 /* Verify that this class is at least possible for the mode that
792 if (this_insn_is_asm)
794 enum machine_mode mode;
795 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
799 if (mode == VOIDmode)
801 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
808 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
809 if (HARD_REGNO_MODE_OK (i, mode)
810 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
812 int nregs = HARD_REGNO_NREGS (i, mode);
815 for (j = 1; j < nregs; j++)
816 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
821 if (i == FIRST_PSEUDO_REGISTER)
823 error_for_asm (this_insn, "impossible register constraint in `asm'");
828 if (class == NO_REGS)
831 /* We can use an existing reload if the class is right
832 and at least one of IN and OUT is a match
833 and the other is at worst neutral.
834 (A zero compared against anything is neutral.)
836 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
837 for the same thing since that can cause us to need more reload registers
838 than we otherwise would. */
840 for (i = 0; i < n_reloads; i++)
841 if ((reg_class_subset_p (class, reload_reg_class[i])
842 || reg_class_subset_p (reload_reg_class[i], class))
843 /* If the existing reload has a register, it must fit our class. */
844 && (reload_reg_rtx[i] == 0
845 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
846 true_regnum (reload_reg_rtx[i])))
847 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
848 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
850 (out != 0 && MATCHES (reload_out[i], out)
851 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
852 && (reg_class_size[(int) class] == 1
853 #ifdef SMALL_REGISTER_CLASSES
857 && MERGABLE_RELOADS (type, reload_when_needed[i],
858 opnum, reload_opnum[i]))
861 /* Reloading a plain reg for input can match a reload to postincrement
862 that reg, since the postincrement's value is the right value.
863 Likewise, it can match a preincrement reload, since we regard
864 the preincrementation as happening before any ref in this insn
867 for (i = 0; i < n_reloads; i++)
868 if ((reg_class_subset_p (class, reload_reg_class[i])
869 || reg_class_subset_p (reload_reg_class[i], class))
870 /* If the existing reload has a register, it must fit our class. */
871 && (reload_reg_rtx[i] == 0
872 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
873 true_regnum (reload_reg_rtx[i])))
874 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
875 && ((GET_CODE (in) == REG
876 && (GET_CODE (reload_in[i]) == POST_INC
877 || GET_CODE (reload_in[i]) == POST_DEC
878 || GET_CODE (reload_in[i]) == PRE_INC
879 || GET_CODE (reload_in[i]) == PRE_DEC)
880 && MATCHES (XEXP (reload_in[i], 0), in))
882 (GET_CODE (reload_in[i]) == REG
883 && (GET_CODE (in) == POST_INC
884 || GET_CODE (in) == POST_DEC
885 || GET_CODE (in) == PRE_INC
886 || GET_CODE (in) == PRE_DEC)
887 && MATCHES (XEXP (in, 0), reload_in[i])))
888 && (reg_class_size[(int) class] == 1
889 #ifdef SMALL_REGISTER_CLASSES
893 && MERGABLE_RELOADS (type, reload_when_needed[i],
894 opnum, reload_opnum[i]))
896 /* Make sure reload_in ultimately has the increment,
897 not the plain register. */
898 if (GET_CODE (in) == REG)
905 #ifdef HAVE_SECONDARY_RELOADS
906 enum reg_class secondary_class = NO_REGS;
907 enum reg_class secondary_out_class = NO_REGS;
908 enum machine_mode secondary_mode = inmode;
909 enum machine_mode secondary_out_mode = outmode;
910 enum insn_code secondary_icode;
911 enum insn_code secondary_out_icode = CODE_FOR_nothing;
912 enum reg_class tertiary_class = NO_REGS;
913 enum reg_class tertiary_out_class = NO_REGS;
914 enum machine_mode tertiary_mode;
915 enum machine_mode tertiary_out_mode;
916 enum insn_code tertiary_icode;
917 enum insn_code tertiary_out_icode = CODE_FOR_nothing;
918 int tertiary_reload = -1;
920 /* See if we need a secondary reload register to move between
921 CLASS and IN or CLASS and OUT. Get the modes and icodes to
922 use for each of them if so. */
924 #ifdef SECONDARY_INPUT_RELOAD_CLASS
927 = find_secondary_reload (in, class, inmode, 1, &secondary_icode,
928 &secondary_mode, &tertiary_class,
929 &tertiary_icode, &tertiary_mode);
932 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
933 if (out != 0 && GET_CODE (out) != SCRATCH)
935 = find_secondary_reload (out, class, outmode, 0,
936 &secondary_out_icode, &secondary_out_mode,
937 &tertiary_out_class, &tertiary_out_icode,
941 /* We can only record one secondary and one tertiary reload. If both
942 IN and OUT need secondary reloads, we can only make an in-out
943 reload if neither need an insn and if the classes are compatible.
944 If they aren't, all we can do is abort since making two separate
945 reloads is invalid. */
947 if (secondary_class != NO_REGS && secondary_out_class != NO_REGS
948 && reg_class_subset_p (secondary_out_class, secondary_class))
949 secondary_class = secondary_out_class;
951 if (secondary_class != NO_REGS && secondary_out_class != NO_REGS
952 && (! reg_class_subset_p (secondary_class, secondary_out_class)
953 || secondary_icode != CODE_FOR_nothing
954 || secondary_out_icode != CODE_FOR_nothing))
957 /* If we need a secondary reload for OUT but not IN, copy the
959 if (secondary_class == NO_REGS && secondary_out_class != NO_REGS)
961 secondary_class = secondary_out_class;
962 secondary_icode = secondary_out_icode;
963 tertiary_class = tertiary_out_class;
964 tertiary_icode = tertiary_out_icode;
965 tertiary_mode = tertiary_out_mode;
968 if (secondary_class != NO_REGS)
970 /* Secondary reloads don't conflict as badly as the primary object
971 being reload. Specifically, we can always treat them as
972 being for an input or output address and hence allowed to be
973 reused in the same manner such address components could be
974 reused. This is used as the reload_type for our secondary
977 enum reload_type secondary_type
978 = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
979 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
982 /* If we need a tertiary reload, see if we have one we can reuse
985 if (tertiary_class != NO_REGS)
987 for (tertiary_reload = 0; tertiary_reload < n_reloads;
989 if (reload_secondary_p[tertiary_reload]
990 && (reg_class_subset_p (tertiary_class,
991 reload_reg_class[tertiary_reload])
992 || reg_class_subset_p (reload_reg_class[tertiary_reload],
994 && ((reload_inmode[tertiary_reload] == tertiary_mode)
995 || reload_inmode[tertiary_reload] == VOIDmode)
996 && ((reload_outmode[tertiary_reload] == tertiary_mode)
997 || reload_outmode[tertiary_reload] == VOIDmode)
998 && (reload_secondary_icode[tertiary_reload]
1000 && (reg_class_size[(int) tertiary_class] == 1
1001 #ifdef SMALL_REGISTER_CLASSES
1005 && MERGABLE_RELOADS (secondary_type,
1006 reload_when_needed[tertiary_reload],
1007 opnum, reload_opnum[tertiary_reload]))
1009 if (tertiary_mode != VOIDmode)
1010 reload_inmode[tertiary_reload] = tertiary_mode;
1011 if (tertiary_out_mode != VOIDmode)
1012 reload_outmode[tertiary_reload] = tertiary_mode;
1013 if (reg_class_subset_p (tertiary_class,
1014 reload_reg_class[tertiary_reload]))
1015 reload_reg_class[tertiary_reload] = tertiary_class;
1016 if (MERGE_TO_OTHER (secondary_type,
1017 reload_when_needed[tertiary_reload],
1019 reload_opnum[tertiary_reload]))
1020 reload_when_needed[tertiary_reload] = RELOAD_OTHER;
1021 reload_opnum[tertiary_reload]
1022 = MIN (reload_opnum[tertiary_reload], opnum);
1023 reload_optional[tertiary_reload] &= optional;
1024 reload_secondary_p[tertiary_reload] = 1;
1027 if (tertiary_reload == n_reloads)
1029 /* We need to make a new tertiary reload for this register
1031 reload_in[tertiary_reload] = reload_out[tertiary_reload] = 0;
1032 reload_reg_class[tertiary_reload] = tertiary_class;
1033 reload_inmode[tertiary_reload] = tertiary_mode;
1034 reload_outmode[tertiary_reload] = tertiary_mode;
1035 reload_reg_rtx[tertiary_reload] = 0;
1036 reload_optional[tertiary_reload] = optional;
1037 reload_inc[tertiary_reload] = 0;
1038 /* Maybe we could combine these, but it seems too tricky. */
1039 reload_nocombine[tertiary_reload] = 1;
1040 reload_in_reg[tertiary_reload] = 0;
1041 reload_opnum[tertiary_reload] = opnum;
1042 reload_when_needed[tertiary_reload] = secondary_type;
1043 reload_secondary_reload[tertiary_reload] = -1;
1044 reload_secondary_icode[tertiary_reload] = CODE_FOR_nothing;
1045 reload_secondary_p[tertiary_reload] = 1;
1052 /* See if we can reuse an existing secondary reload. */
1053 for (secondary_reload = 0; secondary_reload < n_reloads;
1055 if (reload_secondary_p[secondary_reload]
1056 && (reg_class_subset_p (secondary_class,
1057 reload_reg_class[secondary_reload])
1058 || reg_class_subset_p (reload_reg_class[secondary_reload],
1060 && ((reload_inmode[secondary_reload] == secondary_mode)
1061 || reload_inmode[secondary_reload] == VOIDmode)
1062 && ((reload_outmode[secondary_reload] == secondary_out_mode)
1063 || reload_outmode[secondary_reload] == VOIDmode)
1064 && reload_secondary_reload[secondary_reload] == tertiary_reload
1065 && reload_secondary_icode[secondary_reload] == tertiary_icode
1066 && (reg_class_size[(int) secondary_class] == 1
1067 #ifdef SMALL_REGISTER_CLASSES
1071 && MERGABLE_RELOADS (secondary_type,
1072 reload_when_needed[secondary_reload],
1073 opnum, reload_opnum[secondary_reload]))
1075 if (secondary_mode != VOIDmode)
1076 reload_inmode[secondary_reload] = secondary_mode;
1077 if (secondary_out_mode != VOIDmode)
1078 reload_outmode[secondary_reload] = secondary_out_mode;
1079 if (reg_class_subset_p (secondary_class,
1080 reload_reg_class[secondary_reload]))
1081 reload_reg_class[secondary_reload] = secondary_class;
1082 if (MERGE_TO_OTHER (secondary_type,
1083 reload_when_needed[secondary_reload],
1084 opnum, reload_opnum[secondary_reload]))
1085 reload_when_needed[secondary_reload] = RELOAD_OTHER;
1086 reload_opnum[secondary_reload]
1087 = MIN (reload_opnum[secondary_reload], opnum);
1088 reload_optional[secondary_reload] &= optional;
1089 reload_secondary_p[secondary_reload] = 1;
1092 if (secondary_reload == n_reloads)
1094 /* We need to make a new secondary reload for this register
1096 reload_in[secondary_reload] = reload_out[secondary_reload] = 0;
1097 reload_reg_class[secondary_reload] = secondary_class;
1098 reload_inmode[secondary_reload] = secondary_mode;
1099 reload_outmode[secondary_reload] = secondary_out_mode;
1100 reload_reg_rtx[secondary_reload] = 0;
1101 reload_optional[secondary_reload] = optional;
1102 reload_inc[secondary_reload] = 0;
1103 /* Maybe we could combine these, but it seems too tricky. */
1104 reload_nocombine[secondary_reload] = 1;
1105 reload_in_reg[secondary_reload] = 0;
1106 reload_opnum[secondary_reload] = opnum;
1107 reload_when_needed[secondary_reload] = secondary_type;
1108 reload_secondary_reload[secondary_reload] = tertiary_reload;
1109 reload_secondary_icode[secondary_reload] = tertiary_icode;
1110 reload_secondary_p[secondary_reload] = 1;
1115 #ifdef SECONDARY_MEMORY_NEEDED
1116 /* If we need a memory location to copy between the two
1117 reload regs, set it up now. */
1119 if (in != 0 && secondary_icode == CODE_FOR_nothing
1120 && SECONDARY_MEMORY_NEEDED (secondary_class, class, inmode))
1121 get_secondary_mem (in, inmode, opnum, type);
1123 if (out != 0 && secondary_icode == CODE_FOR_nothing
1124 && SECONDARY_MEMORY_NEEDED (class, secondary_class, outmode))
1125 get_secondary_mem (out, outmode, opnum, type);
1131 /* We found no existing reload suitable for re-use.
1132 So add an additional reload. */
1135 reload_out[i] = out;
1136 reload_reg_class[i] = class;
1137 reload_inmode[i] = inmode;
1138 reload_outmode[i] = outmode;
1139 reload_reg_rtx[i] = 0;
1140 reload_optional[i] = optional;
1142 reload_nocombine[i] = 0;
1143 reload_in_reg[i] = inloc ? *inloc : 0;
1144 reload_opnum[i] = opnum;
1145 reload_when_needed[i] = type;
1146 reload_secondary_reload[i] = secondary_reload;
1147 reload_secondary_icode[i] = secondary_icode;
1148 reload_secondary_p[i] = 0;
1152 #ifdef SECONDARY_MEMORY_NEEDED
1153 /* If a memory location is needed for the copy, make one. */
1154 if (in != 0 && GET_CODE (in) == REG
1155 && REGNO (in) < FIRST_PSEUDO_REGISTER
1156 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1158 get_secondary_mem (in, inmode, opnum, type);
1160 if (out != 0 && GET_CODE (out) == REG
1161 && REGNO (out) < FIRST_PSEUDO_REGISTER
1162 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1164 get_secondary_mem (out, outmode, opnum, type);
1169 /* We are reusing an existing reload,
1170 but we may have additional information for it.
1171 For example, we may now have both IN and OUT
1172 while the old one may have just one of them. */
1174 if (inmode != VOIDmode)
1175 reload_inmode[i] = inmode;
1176 if (outmode != VOIDmode)
1177 reload_outmode[i] = outmode;
1181 reload_out[i] = out;
1182 if (reg_class_subset_p (class, reload_reg_class[i]))
1183 reload_reg_class[i] = class;
1184 reload_optional[i] &= optional;
1185 if (MERGE_TO_OTHER (type, reload_when_needed[i],
1186 opnum, reload_opnum[i]))
1187 reload_when_needed[i] = RELOAD_OTHER;
1188 reload_opnum[i] = MIN (reload_opnum[i], opnum);
1191 /* If the ostensible rtx being reload differs from the rtx found
1192 in the location to substitute, this reload is not safe to combine
1193 because we cannot reliably tell whether it appears in the insn. */
1195 if (in != 0 && in != *inloc)
1196 reload_nocombine[i] = 1;
1199 /* This was replaced by changes in find_reloads_address_1 and the new
1200 function inc_for_reload, which go with a new meaning of reload_inc. */
1202 /* If this is an IN/OUT reload in an insn that sets the CC,
1203 it must be for an autoincrement. It doesn't work to store
1204 the incremented value after the insn because that would clobber the CC.
1205 So we must do the increment of the value reloaded from,
1206 increment it, store it back, then decrement again. */
1207 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1211 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1212 /* If we did not find a nonzero amount-to-increment-by,
1213 that contradicts the belief that IN is being incremented
1214 in an address in this insn. */
1215 if (reload_inc[i] == 0)
1220 /* If we will replace IN and OUT with the reload-reg,
1221 record where they are located so that substitution need
1222 not do a tree walk. */
1224 if (replace_reloads)
1228 register struct replacement *r = &replacements[n_replacements++];
1230 r->subreg_loc = in_subreg_loc;
1234 if (outloc != 0 && outloc != inloc)
1236 register struct replacement *r = &replacements[n_replacements++];
1239 r->subreg_loc = out_subreg_loc;
1244 /* If this reload is just being introduced and it has both
1245 an incoming quantity and an outgoing quantity that are
1246 supposed to be made to match, see if either one of the two
1247 can serve as the place to reload into.
1249 If one of them is acceptable, set reload_reg_rtx[i]
1252 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1254 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1255 reload_reg_class[i], i);
1257 /* If the outgoing register already contains the same value
1258 as the incoming one, we can dispense with loading it.
1259 The easiest way to tell the caller that is to give a phony
1260 value for the incoming operand (same as outgoing one). */
1261 if (reload_reg_rtx[i] == out
1262 && (GET_CODE (in) == REG || CONSTANT_P (in))
1263 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1264 static_reload_reg_p, i, inmode))
1268 /* If this is an input reload and the operand contains a register that
1269 dies in this insn and is used nowhere else, see if it is the right class
1270 to be used for this reload. Use it if so. (This occurs most commonly
1271 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1272 this if it is also an output reload that mentions the register unless
1273 the output is a SUBREG that clobbers an entire register.
1275 Note that the operand might be one of the spill regs, if it is a
1276 pseudo reg and we are in a block where spilling has not taken place.
1277 But if there is no spilling in this block, that is OK.
1278 An explicitly used hard reg cannot be a spill reg. */
1280 if (reload_reg_rtx[i] == 0 && in != 0)
1285 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1286 if (REG_NOTE_KIND (note) == REG_DEAD
1287 && GET_CODE (XEXP (note, 0)) == REG
1288 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1289 && reg_mentioned_p (XEXP (note, 0), in)
1290 && ! refers_to_regno_for_reload_p (regno,
1292 + HARD_REGNO_NREGS (regno,
1294 PATTERN (this_insn), inloc)
1295 /* If this is also an output reload, IN cannot be used as
1296 the reload register if it is set in this insn unless IN
1298 && (out == 0 || in == out
1299 || ! hard_reg_set_here_p (regno,
1301 + HARD_REGNO_NREGS (regno,
1303 PATTERN (this_insn)))
1304 /* ??? Why is this code so different from the previous?
1305 Is there any simple coherent way to describe the two together?
1306 What's going on here. */
1308 || (GET_CODE (in) == SUBREG
1309 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1311 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1312 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1313 /* Make sure the operand fits in the reg that dies. */
1314 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1315 && HARD_REGNO_MODE_OK (regno, inmode)
1316 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1317 && HARD_REGNO_MODE_OK (regno, outmode)
1318 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1319 && !fixed_regs[regno])
1321 reload_reg_rtx[i] = gen_rtx (REG, inmode, regno);
1327 output_reloadnum = i;
1332 /* Record an additional place we must replace a value
1333 for which we have already recorded a reload.
1334 RELOADNUM is the value returned by push_reload
1335 when the reload was recorded.
1336 This is used in insn patterns that use match_dup. */
1339 push_replacement (loc, reloadnum, mode)
1342 enum machine_mode mode;
1344 if (replace_reloads)
1346 register struct replacement *r = &replacements[n_replacements++];
1347 r->what = reloadnum;
1354 /* Transfer all replacements that used to be in reload FROM to be in
1358 transfer_replacements (to, from)
1363 for (i = 0; i < n_replacements; i++)
1364 if (replacements[i].what == from)
1365 replacements[i].what = to;
1368 /* If there is only one output reload, and it is not for an earlyclobber
1369 operand, try to combine it with a (logically unrelated) input reload
1370 to reduce the number of reload registers needed.
1372 This is safe if the input reload does not appear in
1373 the value being output-reloaded, because this implies
1374 it is not needed any more once the original insn completes.
1376 If that doesn't work, see we can use any of the registers that
1377 die in this insn as a reload register. We can if it is of the right
1378 class and does not appear in the value being output-reloaded. */
1384 int output_reload = -1;
1387 /* Find the output reload; return unless there is exactly one
1388 and that one is mandatory. */
1390 for (i = 0; i < n_reloads; i++)
1391 if (reload_out[i] != 0)
1393 if (output_reload >= 0)
1398 if (output_reload < 0 || reload_optional[output_reload])
1401 /* An input-output reload isn't combinable. */
1403 if (reload_in[output_reload] != 0)
1406 /* If this reload is for an earlyclobber operand, we can't do anything. */
1408 for (i = 0; i < n_earlyclobbers; i++)
1409 if (reload_out[output_reload] == reload_earlyclobbers[i])
1412 /* Check each input reload; can we combine it? */
1414 for (i = 0; i < n_reloads; i++)
1415 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1416 /* Life span of this reload must not extend past main insn. */
1417 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
1418 && reload_when_needed[i] != RELOAD_OTHER
1419 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
1420 == CLASS_MAX_NREGS (reload_reg_class[output_reload],
1421 reload_outmode[output_reload]))
1422 && reload_inc[i] == 0
1423 && reload_reg_rtx[i] == 0
1424 /* Don't combine two reloads with different secondary reloads. */
1425 && (reload_secondary_reload[i] == reload_secondary_reload[output_reload]
1426 || reload_secondary_reload[i] == -1
1427 || reload_secondary_reload[output_reload] == -1)
1428 #ifdef SECONDARY_MEMORY_NEEDED
1429 /* Likewise for different secondary memory locations. */
1430 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
1431 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
1432 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
1433 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
1435 #ifdef SMALL_REGISTER_CLASSES
1436 && reload_reg_class[i] == reload_reg_class[output_reload]
1438 && (reg_class_subset_p (reload_reg_class[i],
1439 reload_reg_class[output_reload])
1440 || reg_class_subset_p (reload_reg_class[output_reload],
1441 reload_reg_class[i]))
1443 && (MATCHES (reload_in[i], reload_out[output_reload])
1444 /* Args reversed because the first arg seems to be
1445 the one that we imagine being modified
1446 while the second is the one that might be affected. */
1447 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1449 /* However, if the input is a register that appears inside
1450 the output, then we also can't share.
1451 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1452 If the same reload reg is used for both reg 69 and the
1453 result to be stored in memory, then that result
1454 will clobber the address of the memory ref. */
1455 && ! (GET_CODE (reload_in[i]) == REG
1456 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1457 reload_out[output_reload]))))
1458 && (reg_class_size[(int) reload_reg_class[i]]
1459 #ifdef SMALL_REGISTER_CLASSES
1463 /* We will allow making things slightly worse by combining an
1464 input and an output, but no worse than that. */
1465 && (reload_when_needed[i] == RELOAD_FOR_INPUT
1466 || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
1470 /* We have found a reload to combine with! */
1471 reload_out[i] = reload_out[output_reload];
1472 reload_outmode[i] = reload_outmode[output_reload];
1473 /* Mark the old output reload as inoperative. */
1474 reload_out[output_reload] = 0;
1475 /* The combined reload is needed for the entire insn. */
1476 reload_when_needed[i] = RELOAD_OTHER;
1477 /* If the output reload had a secondary reload, copy it. */
1478 if (reload_secondary_reload[output_reload] != -1)
1479 reload_secondary_reload[i] = reload_secondary_reload[output_reload];
1480 #ifdef SECONDARY_MEMORY_NEEDED
1481 /* Copy any secondary MEM. */
1482 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
1483 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
1484 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
1486 /* If required, minimize the register class. */
1487 if (reg_class_subset_p (reload_reg_class[output_reload],
1488 reload_reg_class[i]))
1489 reload_reg_class[i] = reload_reg_class[output_reload];
1491 /* Transfer all replacements from the old reload to the combined. */
1492 for (j = 0; j < n_replacements; j++)
1493 if (replacements[j].what == output_reload)
1494 replacements[j].what = i;
1499 /* If this insn has only one operand that is modified or written (assumed
1500 to be the first), it must be the one corresponding to this reload. It
1501 is safe to use anything that dies in this insn for that output provided
1502 that it does not occur in the output (we already know it isn't an
1503 earlyclobber. If this is an asm insn, give up. */
1505 if (INSN_CODE (this_insn) == -1)
1508 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1509 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1510 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1513 /* See if some hard register that dies in this insn and is not used in
1514 the output is the right class. Only works if the register we pick
1515 up can fully hold our output reload. */
1516 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1517 if (REG_NOTE_KIND (note) == REG_DEAD
1518 && GET_CODE (XEXP (note, 0)) == REG
1519 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1520 reload_out[output_reload])
1521 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1522 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1523 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1524 REGNO (XEXP (note, 0)))
1525 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1526 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1527 && ! fixed_regs[REGNO (XEXP (note, 0))])
1529 reload_reg_rtx[output_reload] = gen_rtx (REG,
1530 reload_outmode[output_reload],
1531 REGNO (XEXP (note, 0)));
1536 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1537 See if one of IN and OUT is a register that may be used;
1538 this is desirable since a spill-register won't be needed.
1539 If so, return the register rtx that proves acceptable.
1541 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1542 CLASS is the register class required for the reload.
1544 If FOR_REAL is >= 0, it is the number of the reload,
1545 and in some cases when it can be discovered that OUT doesn't need
1546 to be computed, clear out reload_out[FOR_REAL].
1548 If FOR_REAL is -1, this should not be done, because this call
1549 is just to see if a register can be found, not to find and install it. */
1552 find_dummy_reload (real_in, real_out, inloc, outloc, class, for_real)
1553 rtx real_in, real_out;
1554 rtx *inloc, *outloc;
1555 enum reg_class class;
1564 /* If operands exceed a word, we can't use either of them
1565 unless they have the same size. */
1566 if (GET_MODE_SIZE (GET_MODE (real_out)) != GET_MODE_SIZE (GET_MODE (real_in))
1567 && (GET_MODE_SIZE (GET_MODE (real_out)) > UNITS_PER_WORD
1568 || GET_MODE_SIZE (GET_MODE (real_in)) > UNITS_PER_WORD))
1571 /* Find the inside of any subregs. */
1572 while (GET_CODE (out) == SUBREG)
1574 out_offset = SUBREG_WORD (out);
1575 out = SUBREG_REG (out);
1577 while (GET_CODE (in) == SUBREG)
1579 in_offset = SUBREG_WORD (in);
1580 in = SUBREG_REG (in);
1583 /* Narrow down the reg class, the same way push_reload will;
1584 otherwise we might find a dummy now, but push_reload won't. */
1585 class = PREFERRED_RELOAD_CLASS (in, class);
1587 /* See if OUT will do. */
1588 if (GET_CODE (out) == REG
1589 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1591 register int regno = REGNO (out) + out_offset;
1592 int nwords = HARD_REGNO_NREGS (regno, GET_MODE (real_out));
1595 /* When we consider whether the insn uses OUT,
1596 ignore references within IN. They don't prevent us
1597 from copying IN into OUT, because those refs would
1598 move into the insn that reloads IN.
1600 However, we only ignore IN in its role as this reload.
1601 If the insn uses IN elsewhere and it contains OUT,
1602 that counts. We can't be sure it's the "same" operand
1603 so it might not go through this reload. */
1605 *inloc = const0_rtx;
1607 if (regno < FIRST_PSEUDO_REGISTER
1608 /* A fixed reg that can overlap other regs better not be used
1609 for reloading in any way. */
1610 #ifdef OVERLAPPING_REGNO_P
1611 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1613 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1614 PATTERN (this_insn), outloc))
1617 for (i = 0; i < nwords; i++)
1618 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1624 if (GET_CODE (real_out) == REG)
1627 value = gen_rtx (REG, GET_MODE (real_out), regno);
1634 /* Consider using IN if OUT was not acceptable
1635 or if OUT dies in this insn (like the quotient in a divmod insn).
1636 We can't use IN unless it is dies in this insn,
1637 which means we must know accurately which hard regs are live.
1638 Also, the result can't go in IN if IN is used within OUT. */
1639 if (hard_regs_live_known
1640 && GET_CODE (in) == REG
1641 && REGNO (in) < FIRST_PSEUDO_REGISTER
1643 || find_reg_note (this_insn, REG_UNUSED, real_out))
1644 && find_reg_note (this_insn, REG_DEAD, real_in)
1645 && !fixed_regs[REGNO (in)]
1646 && HARD_REGNO_MODE_OK (REGNO (in), GET_MODE (out)))
1648 register int regno = REGNO (in) + in_offset;
1649 int nwords = HARD_REGNO_NREGS (regno, GET_MODE (real_in));
1651 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1652 && ! hard_reg_set_here_p (regno, regno + nwords,
1653 PATTERN (this_insn)))
1656 for (i = 0; i < nwords; i++)
1657 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1663 /* If we were going to use OUT as the reload reg
1664 and changed our mind, it means OUT is a dummy that
1665 dies here. So don't bother copying value to it. */
1666 if (for_real >= 0 && value == real_out)
1667 reload_out[for_real] = 0;
1668 if (GET_CODE (real_in) == REG)
1671 value = gen_rtx (REG, GET_MODE (real_in), regno);
1679 /* This page contains subroutines used mainly for determining
1680 whether the IN or an OUT of a reload can serve as the
1683 /* Return 1 if expression X alters a hard reg in the range
1684 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1685 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1686 X should be the body of an instruction. */
1689 hard_reg_set_here_p (beg_regno, end_regno, x)
1690 register int beg_regno, end_regno;
1693 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1695 register rtx op0 = SET_DEST (x);
1696 while (GET_CODE (op0) == SUBREG)
1697 op0 = SUBREG_REG (op0);
1698 if (GET_CODE (op0) == REG)
1700 register int r = REGNO (op0);
1701 /* See if this reg overlaps range under consideration. */
1703 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1707 else if (GET_CODE (x) == PARALLEL)
1709 register int i = XVECLEN (x, 0) - 1;
1711 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1718 /* Return 1 if ADDR is a valid memory address for mode MODE,
1719 and check that each pseudo reg has the proper kind of
1723 strict_memory_address_p (mode, addr)
1724 enum machine_mode mode;
1727 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
1734 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1735 if they are the same hard reg, and has special hacks for
1736 autoincrement and autodecrement.
1737 This is specifically intended for find_reloads to use
1738 in determining whether two operands match.
1739 X is the operand whose number is the lower of the two.
1741 The value is 2 if Y contains a pre-increment that matches
1742 a non-incrementing address in X. */
1744 /* ??? To be completely correct, we should arrange to pass
1745 for X the output operand and for Y the input operand.
1746 For now, we assume that the output operand has the lower number
1747 because that is natural in (SET output (... input ...)). */
1750 operands_match_p (x, y)
1754 register RTX_CODE code = GET_CODE (x);
1760 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
1761 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
1762 && GET_CODE (SUBREG_REG (y)) == REG)))
1768 i = REGNO (SUBREG_REG (x));
1769 if (i >= FIRST_PSEUDO_REGISTER)
1771 i += SUBREG_WORD (x);
1776 if (GET_CODE (y) == SUBREG)
1778 j = REGNO (SUBREG_REG (y));
1779 if (j >= FIRST_PSEUDO_REGISTER)
1781 j += SUBREG_WORD (y);
1786 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1787 multiple hard register group, so that for example (reg:DI 0) and
1788 (reg:SI 1) will be considered the same register. */
1789 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
1790 && i < FIRST_PSEUDO_REGISTER)
1791 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
1792 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
1793 && j < FIRST_PSEUDO_REGISTER)
1794 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
1798 /* If two operands must match, because they are really a single
1799 operand of an assembler insn, then two postincrements are invalid
1800 because the assembler insn would increment only once.
1801 On the other hand, an postincrement matches ordinary indexing
1802 if the postincrement is the output operand. */
1803 if (code == POST_DEC || code == POST_INC)
1804 return operands_match_p (XEXP (x, 0), y);
1805 /* Two preincrements are invalid
1806 because the assembler insn would increment only once.
1807 On the other hand, an preincrement matches ordinary indexing
1808 if the preincrement is the input operand.
1809 In this case, return 2, since some callers need to do special
1810 things when this happens. */
1811 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
1812 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
1816 /* Now we have disposed of all the cases
1817 in which different rtx codes can match. */
1818 if (code != GET_CODE (y))
1820 if (code == LABEL_REF)
1821 return XEXP (x, 0) == XEXP (y, 0);
1822 if (code == SYMBOL_REF)
1823 return XSTR (x, 0) == XSTR (y, 0);
1825 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1827 if (GET_MODE (x) != GET_MODE (y))
1830 /* Compare the elements. If any pair of corresponding elements
1831 fail to match, return 0 for the whole things. */
1834 fmt = GET_RTX_FORMAT (code);
1835 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1841 if (XWINT (x, i) != XWINT (y, i))
1846 if (XINT (x, i) != XINT (y, i))
1851 val = operands_match_p (XEXP (x, i), XEXP (y, i));
1854 /* If any subexpression returns 2,
1855 we should return 2 if we are successful. */
1863 /* It is believed that rtx's at this level will never
1864 contain anything but integers and other rtx's,
1865 except for within LABEL_REFs and SYMBOL_REFs. */
1870 return 1 + success_2;
1873 /* Return the number of times character C occurs in string S. */
1876 n_occurrences (c, s)
1886 /* Describe the range of registers or memory referenced by X.
1887 If X is a register, set REG_FLAG and put the first register
1888 number into START and the last plus one into END.
1889 If X is a memory reference, put a base address into BASE
1890 and a range of integer offsets into START and END.
1891 If X is pushing on the stack, we can assume it causes no trouble,
1892 so we set the SAFE field. */
1894 static struct decomposition
1898 struct decomposition val;
1903 if (GET_CODE (x) == MEM)
1905 rtx base, offset = 0;
1906 rtx addr = XEXP (x, 0);
1908 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
1909 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
1911 val.base = XEXP (addr, 0);
1912 val.start = - GET_MODE_SIZE (GET_MODE (x));
1913 val.end = GET_MODE_SIZE (GET_MODE (x));
1914 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
1918 if (GET_CODE (addr) == CONST)
1920 addr = XEXP (addr, 0);
1923 if (GET_CODE (addr) == PLUS)
1925 if (CONSTANT_P (XEXP (addr, 0)))
1927 base = XEXP (addr, 1);
1928 offset = XEXP (addr, 0);
1930 else if (CONSTANT_P (XEXP (addr, 1)))
1932 base = XEXP (addr, 0);
1933 offset = XEXP (addr, 1);
1940 offset = const0_rtx;
1942 if (GET_CODE (offset) == CONST)
1943 offset = XEXP (offset, 0);
1944 if (GET_CODE (offset) == PLUS)
1946 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
1948 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 1));
1949 offset = XEXP (offset, 0);
1951 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
1953 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 0));
1954 offset = XEXP (offset, 1);
1958 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
1959 offset = const0_rtx;
1962 else if (GET_CODE (offset) != CONST_INT)
1964 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
1965 offset = const0_rtx;
1968 if (all_const && GET_CODE (base) == PLUS)
1969 base = gen_rtx (CONST, GET_MODE (base), base);
1971 if (GET_CODE (offset) != CONST_INT)
1974 val.start = INTVAL (offset);
1975 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
1979 else if (GET_CODE (x) == REG)
1982 val.start = true_regnum (x);
1985 /* A pseudo with no hard reg. */
1986 val.start = REGNO (x);
1987 val.end = val.start + 1;
1991 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
1993 else if (GET_CODE (x) == SUBREG)
1995 if (GET_CODE (SUBREG_REG (x)) != REG)
1996 /* This could be more precise, but it's good enough. */
1997 return decompose (SUBREG_REG (x));
1999 val.start = true_regnum (x);
2001 return decompose (SUBREG_REG (x));
2004 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2006 else if (CONSTANT_P (x)
2007 /* This hasn't been assigned yet, so it can't conflict yet. */
2008 || GET_CODE (x) == SCRATCH)
2015 /* Return 1 if altering Y will not modify the value of X.
2016 Y is also described by YDATA, which should be decompose (Y). */
2019 immune_p (x, y, ydata)
2021 struct decomposition ydata;
2023 struct decomposition xdata;
2026 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2030 if (GET_CODE (y) != MEM)
2032 /* If Y is memory and X is not, Y can't affect X. */
2033 if (GET_CODE (x) != MEM)
2036 xdata = decompose (x);
2038 if (! rtx_equal_p (xdata.base, ydata.base))
2040 /* If bases are distinct symbolic constants, there is no overlap. */
2041 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2043 /* Constants and stack slots never overlap. */
2044 if (CONSTANT_P (xdata.base)
2045 && (ydata.base == frame_pointer_rtx
2046 || ydata.base == stack_pointer_rtx))
2048 if (CONSTANT_P (ydata.base)
2049 && (xdata.base == frame_pointer_rtx
2050 || xdata.base == stack_pointer_rtx))
2052 /* If either base is variable, we don't know anything. */
2057 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2060 /* Similar, but calls decompose. */
2063 safe_from_earlyclobber (op, clobber)
2066 struct decomposition early_data;
2068 early_data = decompose (clobber);
2069 return immune_p (op, clobber, early_data);
2072 /* Main entry point of this file: search the body of INSN
2073 for values that need reloading and record them with push_reload.
2074 REPLACE nonzero means record also where the values occur
2075 so that subst_reloads can be used.
2077 IND_LEVELS says how many levels of indirection are supported by this
2078 machine; a value of zero means that a memory reference is not a valid
2081 LIVE_KNOWN says we have valid information about which hard
2082 regs are live at each point in the program; this is true when
2083 we are called from global_alloc but false when stupid register
2084 allocation has been done.
2086 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2087 which is nonnegative if the reg has been commandeered for reloading into.
2088 It is copied into STATIC_RELOAD_REG_P and referenced from there
2089 by various subroutines. */
2092 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2094 int replace, ind_levels;
2096 short *reload_reg_p;
2098 #ifdef REGISTER_CONSTRAINTS
2100 register int insn_code_number;
2103 /* These are the constraints for the insn. We don't change them. */
2104 char *constraints1[MAX_RECOG_OPERANDS];
2105 /* These start out as the constraints for the insn
2106 and they are chewed up as we consider alternatives. */
2107 char *constraints[MAX_RECOG_OPERANDS];
2108 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2110 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2111 char pref_or_nothing[MAX_RECOG_OPERANDS];
2112 /* Nonzero for a MEM operand whose entire address needs a reload. */
2113 int address_reloaded[MAX_RECOG_OPERANDS];
2114 /* Value of enum reload_type to use for operand. */
2115 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2116 /* Value of enum reload_type to use within address of operand. */
2117 enum reload_type address_type[MAX_RECOG_OPERANDS];
2118 /* Save the usage of each operand. */
2119 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2120 int no_input_reloads = 0, no_output_reloads = 0;
2122 int this_alternative[MAX_RECOG_OPERANDS];
2123 char this_alternative_win[MAX_RECOG_OPERANDS];
2124 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2125 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2126 int this_alternative_matches[MAX_RECOG_OPERANDS];
2128 int goal_alternative[MAX_RECOG_OPERANDS];
2129 int this_alternative_number;
2130 int goal_alternative_number;
2131 int operand_reloadnum[MAX_RECOG_OPERANDS];
2132 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2133 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2134 char goal_alternative_win[MAX_RECOG_OPERANDS];
2135 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2136 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2137 int goal_alternative_swapped;
2140 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2141 rtx substed_operand[MAX_RECOG_OPERANDS];
2142 rtx body = PATTERN (insn);
2143 rtx set = single_set (insn);
2144 int goal_earlyclobber, this_earlyclobber;
2145 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2148 this_insn_is_asm = 0; /* Tentative. */
2152 n_earlyclobbers = 0;
2153 replace_reloads = replace;
2154 hard_regs_live_known = live_known;
2155 static_reload_reg_p = reload_reg_p;
2157 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2158 neither are insns that SET cc0. Insns that use CC0 are not allowed
2159 to have any input reloads. */
2160 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2161 no_output_reloads = 1;
2164 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2165 no_input_reloads = 1;
2166 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2167 no_output_reloads = 1;
2170 #ifdef SECONDARY_MEMORY_NEEDED
2171 /* The eliminated forms of any secondary memory locations are per-insn, so
2172 clear them out here. */
2174 bzero (secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2177 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2178 Make OPERANDS point to a vector of operand values.
2179 Make OPERAND_LOCS point to a vector of pointers to
2180 where the operands were found.
2181 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2182 constraint-strings for this insn.
2183 Return if the insn needs no reload processing. */
2185 switch (GET_CODE (body))
2195 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2196 is cheap to move between them. If it is not, there may not be an insn
2197 to do the copy, so we may need a reload. */
2198 if (GET_CODE (SET_DEST (body)) == REG
2199 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2200 && GET_CODE (SET_SRC (body)) == REG
2201 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2202 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2203 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2207 reload_n_operands = noperands = asm_noperands (body);
2210 /* This insn is an `asm' with operands. */
2212 insn_code_number = -1;
2213 this_insn_is_asm = 1;
2215 /* expand_asm_operands makes sure there aren't too many operands. */
2216 if (noperands > MAX_RECOG_OPERANDS)
2219 /* Now get the operand values and constraints out of the insn. */
2221 decode_asm_operands (body, recog_operand, recog_operand_loc,
2222 constraints, operand_mode);
2225 bcopy (constraints, constraints1, noperands * sizeof (char *));
2226 n_alternatives = n_occurrences (',', constraints[0]) + 1;
2227 for (i = 1; i < noperands; i++)
2228 if (n_alternatives != n_occurrences (',', constraints[i]) + 1)
2230 error_for_asm (insn, "operand constraints differ in number of alternatives");
2231 /* Avoid further trouble with this insn. */
2232 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
2241 /* Ordinary insn: recognize it, get the operands via insn_extract
2242 and get the constraints. */
2244 insn_code_number = recog_memoized (insn);
2245 if (insn_code_number < 0)
2246 fatal_insn_not_found (insn);
2248 reload_n_operands = noperands = insn_n_operands[insn_code_number];
2249 n_alternatives = insn_n_alternatives[insn_code_number];
2250 /* Just return "no reloads" if insn has no operands with constraints. */
2251 if (n_alternatives == 0)
2253 insn_extract (insn);
2254 for (i = 0; i < noperands; i++)
2256 constraints[i] = constraints1[i]
2257 = insn_operand_constraint[insn_code_number][i];
2258 operand_mode[i] = insn_operand_mode[insn_code_number][i];
2267 /* If we will need to know, later, whether some pair of operands
2268 are the same, we must compare them now and save the result.
2269 Reloading the base and index registers will clobber them
2270 and afterward they will fail to match. */
2272 for (i = 0; i < noperands; i++)
2277 substed_operand[i] = recog_operand[i];
2280 modified[i] = RELOAD_READ;
2282 /* Scan this operand's constraint to see if it is an output operand,
2283 an in-out operand, is commutative, or should match another. */
2288 modified[i] = RELOAD_WRITE;
2290 modified[i] = RELOAD_READ_WRITE;
2293 /* The last operand should not be marked commutative. */
2294 if (i == noperands - 1)
2296 if (this_insn_is_asm)
2297 warning_for_asm (this_insn,
2298 "`%%' constraint used with last operand");
2305 else if (c >= '0' && c <= '9')
2308 operands_match[c][i]
2309 = operands_match_p (recog_operand[c], recog_operand[i]);
2311 /* An operand may not match itself. */
2314 if (this_insn_is_asm)
2315 warning_for_asm (this_insn,
2316 "operand %d has constraint %d", i, c);
2321 /* If C can be commuted with C+1, and C might need to match I,
2322 then C+1 might also need to match I. */
2323 if (commutative >= 0)
2325 if (c == commutative || c == commutative + 1)
2327 int other = c + (c == commutative ? 1 : -1);
2328 operands_match[other][i]
2329 = operands_match_p (recog_operand[other], recog_operand[i]);
2331 if (i == commutative || i == commutative + 1)
2333 int other = i + (i == commutative ? 1 : -1);
2334 operands_match[c][other]
2335 = operands_match_p (recog_operand[c], recog_operand[other]);
2337 /* Note that C is supposed to be less than I.
2338 No need to consider altering both C and I because in
2339 that case we would alter one into the other. */
2345 /* Examine each operand that is a memory reference or memory address
2346 and reload parts of the addresses into index registers.
2347 Also here any references to pseudo regs that didn't get hard regs
2348 but are equivalent to constants get replaced in the insn itself
2349 with those constants. Nobody will ever see them again.
2351 Finally, set up the preferred classes of each operand. */
2353 for (i = 0; i < noperands; i++)
2355 register RTX_CODE code = GET_CODE (recog_operand[i]);
2357 address_reloaded[i] = 0;
2358 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2359 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2362 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2363 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2366 if (constraints[i][0] == 'p')
2368 find_reloads_address (VOIDmode, NULL_PTR,
2369 recog_operand[i], recog_operand_loc[i],
2370 i, operand_type[i], ind_levels);
2371 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2373 else if (code == MEM)
2375 if (find_reloads_address (GET_MODE (recog_operand[i]),
2376 recog_operand_loc[i],
2377 XEXP (recog_operand[i], 0),
2378 &XEXP (recog_operand[i], 0),
2379 i, address_type[i], ind_levels))
2380 address_reloaded[i] = 1;
2381 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2383 else if (code == SUBREG)
2384 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2385 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2388 && &SET_DEST (set) == recog_operand_loc[i]);
2389 else if (code == REG)
2391 /* This is equivalent to calling find_reloads_toplev.
2392 The code is duplicated for speed.
2393 When we find a pseudo always equivalent to a constant,
2394 we replace it by the constant. We must be sure, however,
2395 that we don't try to replace it in the insn in which it
2397 register int regno = REGNO (recog_operand[i]);
2398 if (reg_equiv_constant[regno] != 0
2399 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2400 substed_operand[i] = recog_operand[i]
2401 = reg_equiv_constant[regno];
2402 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2403 that feeds this insn. */
2404 if (reg_equiv_mem[regno] != 0)
2405 substed_operand[i] = recog_operand[i]
2406 = reg_equiv_mem[regno];
2408 if (reg_equiv_address[regno] != 0)
2410 /* If reg_equiv_address is not a constant address, copy it,
2411 since it may be shared. */
2412 rtx address = reg_equiv_address[regno];
2414 if (rtx_varies_p (address))
2415 address = copy_rtx (address);
2417 /* If this is an output operand, we must output a CLOBBER
2418 after INSN so find_equiv_reg knows REGNO is being written.
2419 Mark this insn specially, do we can put our output reloads
2422 if (modified[i] != RELOAD_READ)
2423 PUT_MODE (emit_insn_after (gen_rtx (CLOBBER, VOIDmode,
2428 *recog_operand_loc[i] = recog_operand[i]
2429 = gen_rtx (MEM, GET_MODE (recog_operand[i]), address);
2430 RTX_UNCHANGING_P (recog_operand[i])
2431 = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
2432 find_reloads_address (GET_MODE (recog_operand[i]),
2433 recog_operand_loc[i],
2434 XEXP (recog_operand[i], 0),
2435 &XEXP (recog_operand[i], 0),
2436 i, address_type[i], ind_levels);
2437 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2440 /* If the operand is still a register (we didn't replace it with an
2441 equivalent), get the preferred class to reload it into. */
2442 code = GET_CODE (recog_operand[i]);
2444 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
2445 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2447 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
2448 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2451 /* If this is simply a copy from operand 1 to operand 0, merge the
2452 preferred classes for the operands. */
2453 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2454 && recog_operand[1] == SET_SRC (set))
2456 preferred_class[0] = preferred_class[1]
2457 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2458 pref_or_nothing[0] |= pref_or_nothing[1];
2459 pref_or_nothing[1] |= pref_or_nothing[0];
2462 /* Now see what we need for pseudo-regs that didn't get hard regs
2463 or got the wrong kind of hard reg. For this, we must consider
2464 all the operands together against the register constraints. */
2466 best = MAX_RECOG_OPERANDS + 300;
2469 goal_alternative_swapped = 0;
2472 /* The constraints are made of several alternatives.
2473 Each operand's constraint looks like foo,bar,... with commas
2474 separating the alternatives. The first alternatives for all
2475 operands go together, the second alternatives go together, etc.
2477 First loop over alternatives. */
2479 for (this_alternative_number = 0;
2480 this_alternative_number < n_alternatives;
2481 this_alternative_number++)
2483 /* Loop over operands for one constraint alternative. */
2484 /* LOSERS counts those that don't fit this alternative
2485 and would require loading. */
2487 /* BAD is set to 1 if it some operand can't fit this alternative
2488 even after reloading. */
2490 /* REJECT is a count of how undesirable this alternative says it is
2491 if any reloading is required. If the alternative matches exactly
2492 then REJECT is ignored, but otherwise it gets this much
2493 counted against it in addition to the reloading needed. Each
2494 ? counts three times here since we want the disparaging caused by
2495 a bad register class to only count 1/3 as much. */
2498 this_earlyclobber = 0;
2500 for (i = 0; i < noperands; i++)
2502 register char *p = constraints[i];
2503 register int win = 0;
2504 /* 0 => this operand can be reloaded somehow for this alternative */
2506 /* 0 => this operand can be reloaded if the alternative allows regs. */
2509 register rtx operand = recog_operand[i];
2511 /* Nonzero means this is a MEM that must be reloaded into a reg
2512 regardless of what the constraint says. */
2513 int force_reload = 0;
2515 int earlyclobber = 0;
2517 /* If the operand is a SUBREG, extract
2518 the REG or MEM (or maybe even a constant) within.
2519 (Constants can occur as a result of reg_equiv_constant.) */
2521 while (GET_CODE (operand) == SUBREG)
2523 offset += SUBREG_WORD (operand);
2524 operand = SUBREG_REG (operand);
2525 /* Force reload if this is not a register or if there may may
2526 be a problem accessing the register in the outer mode. */
2527 if (GET_CODE (operand) != REG
2528 #if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
2529 /* ??? The comment below clearly does not match the code.
2530 What the code below actually does is set force_reload
2531 for a paradoxical subreg of a pseudo. rms and kenner
2532 can't see the point of doing this. */
2533 /* Nonparadoxical subreg of a pseudoreg.
2534 Don't to load the full width if on this machine
2535 we expected the fetch to extend. */
2536 || ((GET_MODE_SIZE (operand_mode[i])
2537 > GET_MODE_SIZE (GET_MODE (operand)))
2538 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
2540 /* Subreg of a hard reg which can't handle the subreg's mode
2541 or which would handle that mode in the wrong number of
2542 registers for subregging to work. */
2543 || (REGNO (operand) < FIRST_PSEUDO_REGISTER
2544 && (! HARD_REGNO_MODE_OK (REGNO (operand),
2546 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2547 && (GET_MODE_SIZE (GET_MODE (operand))
2549 && ((GET_MODE_SIZE (GET_MODE (operand))
2551 != HARD_REGNO_NREGS (REGNO (operand),
2552 GET_MODE (operand)))))))
2556 this_alternative[i] = (int) NO_REGS;
2557 this_alternative_win[i] = 0;
2558 this_alternative_offmemok[i] = 0;
2559 this_alternative_earlyclobber[i] = 0;
2560 this_alternative_matches[i] = -1;
2562 /* An empty constraint or empty alternative
2563 allows anything which matched the pattern. */
2564 if (*p == 0 || *p == ',')
2567 /* Scan this alternative's specs for this operand;
2568 set WIN if the operand fits any letter in this alternative.
2569 Otherwise, clear BADOP if this operand could
2570 fit some letter after reloads,
2571 or set WINREG if this operand could fit after reloads
2572 provided the constraint allows some registers. */
2574 while (*p && (c = *p++) != ',')
2583 /* The last operand should not be marked commutative. */
2584 if (i != noperands - 1)
2597 /* Ignore rest of this alternative as far as
2598 reloading is concerned. */
2599 while (*p && *p != ',') p++;
2608 this_alternative_matches[i] = c;
2609 /* We are supposed to match a previous operand.
2610 If we do, we win if that one did.
2611 If we do not, count both of the operands as losers.
2612 (This is too conservative, since most of the time
2613 only a single reload insn will be needed to make
2614 the two operands win. As a result, this alternative
2615 may be rejected when it is actually desirable.) */
2616 if ((swapped && (c != commutative || i != commutative + 1))
2617 /* If we are matching as if two operands were swapped,
2618 also pretend that operands_match had been computed
2620 But if I is the second of those and C is the first,
2621 don't exchange them, because operands_match is valid
2622 only on one side of its diagonal. */
2624 [(c == commutative || c == commutative + 1)
2625 ? 2*commutative + 1 - c : c]
2626 [(i == commutative || i == commutative + 1)
2627 ? 2*commutative + 1 - i : i])
2628 : operands_match[c][i])
2629 win = this_alternative_win[c];
2632 /* Operands don't match. */
2634 /* Retroactively mark the operand we had to match
2635 as a loser, if it wasn't already. */
2636 if (this_alternative_win[c])
2638 this_alternative_win[c] = 0;
2639 if (this_alternative[c] == (int) NO_REGS)
2641 /* But count the pair only once in the total badness of
2642 this alternative, if the pair can be a dummy reload. */
2644 = find_dummy_reload (recog_operand[i], recog_operand[c],
2645 recog_operand_loc[i], recog_operand_loc[c],
2646 this_alternative[c], -1);
2651 /* This can be fixed with reloads if the operand
2652 we are supposed to match can be fixed with reloads. */
2654 this_alternative[i] = this_alternative[c];
2658 /* All necessary reloads for an address_operand
2659 were handled in find_reloads_address. */
2660 this_alternative[i] = (int) ALL_REGS;
2667 if (GET_CODE (operand) == MEM
2668 || (GET_CODE (operand) == REG
2669 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2670 && reg_renumber[REGNO (operand)] < 0))
2672 if (CONSTANT_P (operand))
2677 if (GET_CODE (operand) == MEM
2678 && ! address_reloaded[i]
2679 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2680 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2685 if (GET_CODE (operand) == MEM
2686 && ! address_reloaded[i]
2687 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2688 || GET_CODE (XEXP (operand, 0)) == POST_INC))
2692 /* Memory operand whose address is not offsettable. */
2696 if (GET_CODE (operand) == MEM
2697 && ! (ind_levels ? offsettable_memref_p (operand)
2698 : offsettable_nonstrict_memref_p (operand))
2699 /* Certain mem addresses will become offsettable
2700 after they themselves are reloaded. This is important;
2701 we don't want our own handling of unoffsettables
2702 to override the handling of reg_equiv_address. */
2703 && !(GET_CODE (XEXP (operand, 0)) == REG
2705 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
2709 /* Memory operand whose address is offsettable. */
2713 if ((GET_CODE (operand) == MEM
2714 /* If IND_LEVELS, find_reloads_address won't reload a
2715 pseudo that didn't get a hard reg, so we have to
2716 reject that case. */
2717 && (ind_levels ? offsettable_memref_p (operand)
2718 : offsettable_nonstrict_memref_p (operand)))
2719 /* Certain mem addresses will become offsettable
2720 after they themselves are reloaded. This is important;
2721 we don't want our own handling of unoffsettables
2722 to override the handling of reg_equiv_address. */
2723 || (GET_CODE (operand) == MEM
2724 && GET_CODE (XEXP (operand, 0)) == REG
2726 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))
2727 || (GET_CODE (operand) == REG
2728 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2729 && reg_renumber[REGNO (operand)] < 0))
2731 if (CONSTANT_P (operand) || GET_CODE (operand) == MEM)
2737 /* Output operand that is stored before the need for the
2738 input operands (and their index registers) is over. */
2739 earlyclobber = 1, this_earlyclobber = 1;
2743 /* Match any floating double constant, but only if
2744 we can examine the bits of it reliably. */
2745 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
2746 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
2747 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
2749 if (GET_CODE (operand) == CONST_DOUBLE)
2754 if (GET_CODE (operand) == CONST_DOUBLE)
2760 if (GET_CODE (operand) == CONST_DOUBLE
2761 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
2766 if (GET_CODE (operand) == CONST_INT
2767 || (GET_CODE (operand) == CONST_DOUBLE
2768 && GET_MODE (operand) == VOIDmode))
2771 if (CONSTANT_P (operand)
2772 #ifdef LEGITIMATE_PIC_OPERAND_P
2773 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
2780 if (GET_CODE (operand) == CONST_INT
2781 || (GET_CODE (operand) == CONST_DOUBLE
2782 && GET_MODE (operand) == VOIDmode))
2794 if (GET_CODE (operand) == CONST_INT
2795 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
2805 /* A PLUS is never a valid operand, but reload can make
2806 it from a register when eliminating registers. */
2807 && GET_CODE (operand) != PLUS
2808 /* A SCRATCH is not a valid operand. */
2809 && GET_CODE (operand) != SCRATCH
2810 #ifdef LEGITIMATE_PIC_OPERAND_P
2811 && (! CONSTANT_P (operand)
2813 || LEGITIMATE_PIC_OPERAND_P (operand))
2815 && (GENERAL_REGS == ALL_REGS
2816 || GET_CODE (operand) != REG
2817 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
2818 && reg_renumber[REGNO (operand)] < 0)))
2820 /* Drop through into 'r' case */
2824 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
2827 #ifdef EXTRA_CONSTRAINT
2833 if (EXTRA_CONSTRAINT (operand, c))
2840 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
2843 if (GET_MODE (operand) == BLKmode)
2846 if (GET_CODE (operand) == REG
2847 && reg_fits_class_p (operand, this_alternative[i],
2848 offset, GET_MODE (recog_operand[i])))
2855 /* If this operand could be handled with a reg,
2856 and some reg is allowed, then this operand can be handled. */
2857 if (winreg && this_alternative[i] != (int) NO_REGS)
2860 /* Record which operands fit this alternative. */
2861 this_alternative_earlyclobber[i] = earlyclobber;
2862 if (win && ! force_reload)
2863 this_alternative_win[i] = 1;
2866 this_alternative_offmemok[i] = offmemok;
2870 /* Alternative loses if it has no regs for a reg operand. */
2871 if (GET_CODE (operand) == REG
2872 && this_alternative[i] == (int) NO_REGS
2873 && this_alternative_matches[i] < 0)
2876 /* Alternative loses if it requires a type of reload not
2877 permitted for this insn. We can always reload SCRATCH
2878 and objects with a REG_UNUSED note. */
2879 if (GET_CODE (operand) != SCRATCH
2880 && modified[i] != RELOAD_READ && no_output_reloads
2881 && ! find_reg_note (insn, REG_UNUSED, operand))
2883 else if (modified[i] != RELOAD_WRITE && no_input_reloads)
2886 /* We prefer to reload pseudos over reloading other things,
2887 since such reloads may be able to be eliminated later.
2888 If we are reloading a SCRATCH, we won't be generating any
2889 insns, just using a register, so it is also preferred.
2890 So bump REJECT in other cases. */
2891 if (GET_CODE (operand) != REG && GET_CODE (operand) != SCRATCH)
2895 /* If this operand is a pseudo register that didn't get a hard
2896 reg and this alternative accepts some register, see if the
2897 class that we want is a subset of the preferred class for this
2898 register. If not, but it intersects that class, use the
2899 preferred class instead. If it does not intersect the preferred
2900 class, show that usage of this alternative should be discouraged;
2901 it will be discouraged more still if the register is `preferred
2902 or nothing'. We do this because it increases the chance of
2903 reusing our spill register in a later insn and avoiding a pair
2904 of memory stores and loads.
2906 Don't bother with this if this alternative will accept this
2909 Don't do this for a multiword operand, if
2910 we have to worry about small classes, because making reg groups
2911 harder to allocate is asking for trouble.
2913 Don't do this if the preferred class has only one register
2914 because we might otherwise exhaust the class. */
2917 if (! win && this_alternative[i] != (int) NO_REGS
2918 #ifdef SMALL_REGISTER_CLASSES
2919 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2921 && reg_class_size[(int) preferred_class[i]] > 1)
2923 if (! reg_class_subset_p (this_alternative[i],
2924 preferred_class[i]))
2926 /* Since we don't have a way of forming the intersection,
2927 we just do something special if the preferred class
2928 is a subset of the class we have; that's the most
2929 common case anyway. */
2930 if (reg_class_subset_p (preferred_class[i],
2931 this_alternative[i]))
2932 this_alternative[i] = (int) preferred_class[i];
2934 reject += (1 + pref_or_nothing[i]);
2939 /* Now see if any output operands that are marked "earlyclobber"
2940 in this alternative conflict with any input operands
2941 or any memory addresses. */
2943 for (i = 0; i < noperands; i++)
2944 if (this_alternative_earlyclobber[i]
2945 && this_alternative_win[i])
2947 struct decomposition early_data;
2949 early_data = decompose (recog_operand[i]);
2951 if (modified[i] == RELOAD_READ)
2953 if (this_insn_is_asm)
2954 warning_for_asm (this_insn,
2955 "`&' constraint used with input operand");
2961 if (this_alternative[i] == NO_REGS)
2963 this_alternative_earlyclobber[i] = 0;
2964 if (this_insn_is_asm)
2965 error_for_asm (this_insn,
2966 "`&' constraint used with no register class");
2971 for (j = 0; j < noperands; j++)
2972 /* Is this an input operand or a memory ref? */
2973 if ((GET_CODE (recog_operand[j]) == MEM
2974 || modified[j] != RELOAD_WRITE)
2976 /* Ignore things like match_operator operands. */
2977 && *constraints1[j] != 0
2978 /* Don't count an input operand that is constrained to match
2979 the early clobber operand. */
2980 && ! (this_alternative_matches[j] == i
2981 && rtx_equal_p (recog_operand[i], recog_operand[j]))
2982 /* Is it altered by storing the earlyclobber operand? */
2983 && !immune_p (recog_operand[j], recog_operand[i], early_data))
2985 /* If the output is in a single-reg class,
2986 it's costly to reload it, so reload the input instead. */
2987 if (reg_class_size[this_alternative[i]] == 1
2988 && (GET_CODE (recog_operand[j]) == REG
2989 || GET_CODE (recog_operand[j]) == SUBREG))
2992 this_alternative_win[j] = 0;
2997 /* If an earlyclobber operand conflicts with something,
2998 it must be reloaded, so request this and count the cost. */
3002 this_alternative_win[i] = 0;
3003 for (j = 0; j < noperands; j++)
3004 if (this_alternative_matches[j] == i
3005 && this_alternative_win[j])
3007 this_alternative_win[j] = 0;
3013 /* If one alternative accepts all the operands, no reload required,
3014 choose that alternative; don't consider the remaining ones. */
3017 /* Unswap these so that they are never swapped at `finish'. */
3018 if (commutative >= 0)
3020 recog_operand[commutative] = substed_operand[commutative];
3021 recog_operand[commutative + 1]
3022 = substed_operand[commutative + 1];
3024 for (i = 0; i < noperands; i++)
3026 goal_alternative_win[i] = 1;
3027 goal_alternative[i] = this_alternative[i];
3028 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3029 goal_alternative_matches[i] = this_alternative_matches[i];
3030 goal_alternative_earlyclobber[i]
3031 = this_alternative_earlyclobber[i];
3033 goal_alternative_number = this_alternative_number;
3034 goal_alternative_swapped = swapped;
3035 goal_earlyclobber = this_earlyclobber;
3039 /* REJECT, set by the ! and ? constraint characters and when a register
3040 would be reloaded into a non-preferred class, discourages the use of
3041 this alternative for a reload goal. REJECT is incremented by three
3042 for each ? and one for each non-preferred class. */
3043 losers = losers * 3 + reject;
3045 /* If this alternative can be made to work by reloading,
3046 and it needs less reloading than the others checked so far,
3047 record it as the chosen goal for reloading. */
3048 if (! bad && best > losers)
3050 for (i = 0; i < noperands; i++)
3052 goal_alternative[i] = this_alternative[i];
3053 goal_alternative_win[i] = this_alternative_win[i];
3054 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3055 goal_alternative_matches[i] = this_alternative_matches[i];
3056 goal_alternative_earlyclobber[i]
3057 = this_alternative_earlyclobber[i];
3059 goal_alternative_swapped = swapped;
3061 goal_alternative_number = this_alternative_number;
3062 goal_earlyclobber = this_earlyclobber;
3066 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3067 then we need to try each alternative twice,
3068 the second time matching those two operands
3069 as if we had exchanged them.
3070 To do this, really exchange them in operands.
3072 If we have just tried the alternatives the second time,
3073 return operands to normal and drop through. */
3075 if (commutative >= 0)
3080 register enum reg_class tclass;
3083 recog_operand[commutative] = substed_operand[commutative + 1];
3084 recog_operand[commutative + 1] = substed_operand[commutative];
3086 tclass = preferred_class[commutative];
3087 preferred_class[commutative] = preferred_class[commutative + 1];
3088 preferred_class[commutative + 1] = tclass;
3090 t = pref_or_nothing[commutative];
3091 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3092 pref_or_nothing[commutative + 1] = t;
3094 bcopy (constraints1, constraints, noperands * sizeof (char *));
3099 recog_operand[commutative] = substed_operand[commutative];
3100 recog_operand[commutative + 1] = substed_operand[commutative + 1];
3104 /* The operands don't meet the constraints.
3105 goal_alternative describes the alternative
3106 that we could reach by reloading the fewest operands.
3107 Reload so as to fit it. */
3109 if (best == MAX_RECOG_OPERANDS + 300)
3111 /* No alternative works with reloads?? */
3112 if (insn_code_number >= 0)
3114 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3115 /* Avoid further trouble with this insn. */
3116 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3121 /* Jump to `finish' from above if all operands are valid already.
3122 In that case, goal_alternative_win is all 1. */
3125 /* Right now, for any pair of operands I and J that are required to match,
3127 goal_alternative_matches[J] is I.
3128 Set up goal_alternative_matched as the inverse function:
3129 goal_alternative_matched[I] = J. */
3131 for (i = 0; i < noperands; i++)
3132 goal_alternative_matched[i] = -1;
3134 for (i = 0; i < noperands; i++)
3135 if (! goal_alternative_win[i]
3136 && goal_alternative_matches[i] >= 0)
3137 goal_alternative_matched[goal_alternative_matches[i]] = i;
3139 /* If the best alternative is with operands 1 and 2 swapped,
3140 consider them swapped before reporting the reloads. Update the
3141 operand numbers of any reloads already pushed. */
3143 if (goal_alternative_swapped)
3147 tem = substed_operand[commutative];
3148 substed_operand[commutative] = substed_operand[commutative + 1];
3149 substed_operand[commutative + 1] = tem;
3150 tem = recog_operand[commutative];
3151 recog_operand[commutative] = recog_operand[commutative + 1];
3152 recog_operand[commutative + 1] = tem;
3154 for (i = 0; i < n_reloads; i++)
3156 if (reload_opnum[i] == commutative)
3157 reload_opnum[i] = commutative + 1;
3158 else if (reload_opnum[i] == commutative + 1)
3159 reload_opnum[i] = commutative;
3163 /* Perform whatever substitutions on the operands we are supposed
3164 to make due to commutativity or replacement of registers
3165 with equivalent constants or memory slots. */
3167 for (i = 0; i < noperands; i++)
3169 *recog_operand_loc[i] = substed_operand[i];
3170 /* While we are looping on operands, initialize this. */
3171 operand_reloadnum[i] = -1;
3173 /* If this is an earlyclobber operand, we need to widen the scope.
3174 The reload must remain valid from the start of the insn being
3175 reloaded until after the operand is stored into its destination.
3176 We approximate this with RELOAD_OTHER even though we know that we
3177 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3179 One special case that is worth checking is when we have an
3180 output that is earlyclobber but isn't used past the insn (typically
3181 a SCRATCH). In this case, we only need have the reload live
3182 through the insn itself, but not for any of our input or output
3185 In any case, anything needed to address this operand can remain
3186 however they were previously categorized. */
3188 if (goal_alternative_earlyclobber[i])
3190 = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
3191 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3194 /* Any constants that aren't allowed and can't be reloaded
3195 into registers are here changed into memory references. */
3196 for (i = 0; i < noperands; i++)
3197 if (! goal_alternative_win[i]
3198 && CONSTANT_P (recog_operand[i])
3199 && (PREFERRED_RELOAD_CLASS (recog_operand[i],
3200 (enum reg_class) goal_alternative[i])
3202 && operand_mode[i] != VOIDmode)
3204 *recog_operand_loc[i] = recog_operand[i]
3205 = find_reloads_toplev (force_const_mem (operand_mode[i],
3207 i, address_type[i], ind_levels, 0);
3208 if (alternative_allows_memconst (constraints1[i],
3209 goal_alternative_number))
3210 goal_alternative_win[i] = 1;
3213 /* Now record reloads for all the operands that need them. */
3214 for (i = 0; i < noperands; i++)
3215 if (! goal_alternative_win[i])
3217 /* Operands that match previous ones have already been handled. */
3218 if (goal_alternative_matches[i] >= 0)
3220 /* Handle an operand with a nonoffsettable address
3221 appearing where an offsettable address will do
3222 by reloading the address into a base register. */
3223 else if (goal_alternative_matched[i] == -1
3224 && goal_alternative_offmemok[i]
3225 && GET_CODE (recog_operand[i]) == MEM)
3227 operand_reloadnum[i]
3228 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
3229 &XEXP (recog_operand[i], 0), NULL_PTR,
3230 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
3231 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3232 reload_inc[operand_reloadnum[i]]
3233 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
3235 /* If this operand is an output, we will have made any
3236 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3237 now we are treating part of the operand as an input, so
3238 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3240 if (operand_type[i] == RELOAD_FOR_OUTPUT)
3241 for (j = 0; j < n_reloads; j++)
3242 if (reload_opnum[j] == i
3243 && reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3244 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
3246 else if (goal_alternative_matched[i] == -1)
3247 operand_reloadnum[i] =
3248 push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3249 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3250 (modified[i] != RELOAD_WRITE ?
3251 recog_operand_loc[i] : 0),
3252 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
3253 (enum reg_class) goal_alternative[i],
3254 (modified[i] == RELOAD_WRITE
3255 ? VOIDmode : operand_mode[i]),
3256 (modified[i] == RELOAD_READ
3257 ? VOIDmode : operand_mode[i]),
3258 (insn_code_number < 0 ? 0
3259 : insn_operand_strict_low[insn_code_number][i]),
3260 0, i, operand_type[i]);
3261 /* In a matching pair of operands, one must be input only
3262 and the other must be output only.
3263 Pass the input operand as IN and the other as OUT. */
3264 else if (modified[i] == RELOAD_READ
3265 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3267 operand_reloadnum[i]
3268 = push_reload (recog_operand[i],
3269 recog_operand[goal_alternative_matched[i]],
3270 recog_operand_loc[i],
3271 recog_operand_loc[goal_alternative_matched[i]],
3272 (enum reg_class) goal_alternative[i],
3274 operand_mode[goal_alternative_matched[i]],
3275 0, 0, i, RELOAD_OTHER);
3276 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3278 else if (modified[i] == RELOAD_WRITE
3279 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3281 operand_reloadnum[goal_alternative_matched[i]]
3282 = push_reload (recog_operand[goal_alternative_matched[i]],
3284 recog_operand_loc[goal_alternative_matched[i]],
3285 recog_operand_loc[i],
3286 (enum reg_class) goal_alternative[i],
3287 operand_mode[goal_alternative_matched[i]],
3289 0, 0, i, RELOAD_OTHER);
3290 operand_reloadnum[i] = output_reloadnum;
3292 else if (insn_code_number >= 0)
3296 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3297 /* Avoid further trouble with this insn. */
3298 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3303 else if (goal_alternative_matched[i] < 0
3304 && goal_alternative_matches[i] < 0
3307 /* For each non-matching operand that's a MEM or a pseudo-register
3308 that didn't get a hard register, make an optional reload.
3309 This may get done even if the insn needs no reloads otherwise. */
3311 rtx operand = recog_operand[i];
3313 while (GET_CODE (operand) == SUBREG)
3314 operand = XEXP (operand, 0);
3315 if ((GET_CODE (operand) == MEM
3316 || (GET_CODE (operand) == REG
3317 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3318 && (enum reg_class) goal_alternative[i] != NO_REGS
3319 && ! no_input_reloads
3320 /* Optional output reloads don't do anything and we mustn't
3321 make in-out reloads on insns that are not permitted output
3323 && (modified[i] == RELOAD_READ
3324 || (modified[i] == RELOAD_READ_WRITE && ! no_output_reloads)))
3325 operand_reloadnum[i]
3326 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3327 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3328 (modified[i] != RELOAD_WRITE
3329 ? recog_operand_loc[i] : 0),
3330 (modified[i] != RELOAD_READ
3331 ? recog_operand_loc[i] : 0),
3332 (enum reg_class) goal_alternative[i],
3333 (modified[i] == RELOAD_WRITE
3334 ? VOIDmode : operand_mode[i]),
3335 (modified[i] == RELOAD_READ
3336 ? VOIDmode : operand_mode[i]),
3337 (insn_code_number < 0 ? 0
3338 : insn_operand_strict_low[insn_code_number][i]),
3339 1, i, operand_type[i]);
3341 else if (goal_alternative_matches[i] >= 0
3342 && goal_alternative_win[goal_alternative_matches[i]]
3343 && modified[i] == RELOAD_READ
3344 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3345 && ! no_input_reloads && ! no_output_reloads
3348 /* Similarly, make an optional reload for a pair of matching
3349 objects that are in MEM or a pseudo that didn't get a hard reg. */
3351 rtx operand = recog_operand[i];
3353 while (GET_CODE (operand) == SUBREG)
3354 operand = XEXP (operand, 0);
3355 if ((GET_CODE (operand) == MEM
3356 || (GET_CODE (operand) == REG
3357 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3358 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3360 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3361 = push_reload (recog_operand[goal_alternative_matches[i]],
3363 recog_operand_loc[goal_alternative_matches[i]],
3364 recog_operand_loc[i],
3365 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3366 operand_mode[goal_alternative_matches[i]],
3368 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3371 /* Record the values of the earlyclobber operands for the caller. */
3372 if (goal_earlyclobber)
3373 for (i = 0; i < noperands; i++)
3374 if (goal_alternative_earlyclobber[i])
3375 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3377 /* If this insn pattern contains any MATCH_DUP's, make sure that
3378 they will be substituted if the operands they match are substituted.
3379 Also do now any substitutions we already did on the operands.
3381 Don't do this if we aren't making replacements because we might be
3382 propagating things allocated by frame pointer elimination into places
3383 it doesn't expect. */
3385 if (insn_code_number >= 0 && replace)
3386 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3388 int opno = recog_dup_num[i];
3389 *recog_dup_loc[i] = *recog_operand_loc[opno];
3390 if (operand_reloadnum[opno] >= 0)
3391 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3392 insn_operand_mode[insn_code_number][opno]);
3396 /* This loses because reloading of prior insns can invalidate the equivalence
3397 (or at least find_equiv_reg isn't smart enough to find it any more),
3398 causing this insn to need more reload regs than it needed before.
3399 It may be too late to make the reload regs available.
3400 Now this optimization is done safely in choose_reload_regs. */
3402 /* For each reload of a reg into some other class of reg,
3403 search for an existing equivalent reg (same value now) in the right class.
3404 We can use it as long as we don't need to change its contents. */
3405 for (i = 0; i < n_reloads; i++)
3406 if (reload_reg_rtx[i] == 0
3407 && reload_in[i] != 0
3408 && GET_CODE (reload_in[i]) == REG
3409 && reload_out[i] == 0)
3412 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3413 static_reload_reg_p, 0, reload_inmode[i]);
3414 /* Prevent generation of insn to load the value
3415 because the one we found already has the value. */
3416 if (reload_reg_rtx[i])
3417 reload_in[i] = reload_reg_rtx[i];
3421 /* Perhaps an output reload can be combined with another
3422 to reduce needs by one. */
3423 if (!goal_earlyclobber)
3426 /* If we have a pair of reloads for parts of an address, they are reloading
3427 the same object, the operands themselves were not reloaded, and they
3428 are for two operands that are supposed to match, merge the reloads and
3429 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3431 for (i = 0; i < n_reloads; i++)
3435 for (j = i + 1; j < n_reloads; j++)
3436 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3437 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
3438 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
3439 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3440 && rtx_equal_p (reload_in[i], reload_in[j])
3441 && (operand_reloadnum[reload_opnum[i]] < 0
3442 || reload_optional[operand_reloadnum[reload_opnum[i]]])
3443 && (operand_reloadnum[reload_opnum[j]] < 0
3444 || reload_optional[operand_reloadnum[reload_opnum[j]]])
3445 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
3446 || (goal_alternative_matches[reload_opnum[j]]
3447 == reload_opnum[i])))
3449 for (k = 0; k < n_replacements; k++)
3450 if (replacements[k].what == j)
3451 replacements[k].what = i;
3453 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3458 /* Scan all the reloads and update their type.
3459 If a reload is for the address of an operand and we didn't reload
3460 that operand, change the type. Similarly, change the operand number
3461 of a reload when two operands match. If a reload is optional, treat it
3462 as though the operand isn't reloaded.
3464 ??? This latter case is somewhat odd because if we do the optional
3465 reload, it means the object is hanging around. Thus we need only
3466 do the address reload if the optional reload was NOT done.
3468 Change secondary reloads to be the address type of their operand, not
3471 If an operand's reload is now RELOAD_OTHER, change any
3472 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3473 RELOAD_FOR_OTHER_ADDRESS. */
3475 for (i = 0; i < n_reloads; i++)
3477 if (reload_secondary_p[i]
3478 && reload_when_needed[i] == operand_type[reload_opnum[i]])
3479 reload_when_needed[i] = address_type[reload_opnum[i]];
3481 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3482 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
3483 && (operand_reloadnum[reload_opnum[i]] < 0
3484 || reload_optional[operand_reloadnum[reload_opnum[i]]]))
3485 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3487 if (reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3488 && operand_reloadnum[reload_opnum[i]] >= 0
3489 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
3491 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
3493 if (goal_alternative_matches[reload_opnum[i]] >= 0)
3494 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
3497 /* See if we have any reloads that are now allowed to be merged
3498 because we've changed when the reload is needed to
3499 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3500 check for the most common cases. */
3502 for (i = 0; i < n_reloads; i++)
3503 if (reload_in[i] != 0 && reload_out[i] == 0
3504 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
3505 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
3506 for (j = 0; j < n_reloads; j++)
3507 if (i != j && reload_in[j] != 0 && reload_out[j] == 0
3508 && reload_when_needed[j] == reload_when_needed[i]
3509 && MATCHES (reload_in[i], reload_in[j])
3510 && reload_reg_class[i] == reload_reg_class[j]
3511 && !reload_nocombine[i] && !reload_nocombine[j])
3513 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
3514 transfer_replacements (i, j);
3518 #else /* no REGISTER_CONSTRAINTS */
3520 int insn_code_number;
3521 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
3523 rtx body = PATTERN (insn);
3527 n_earlyclobbers = 0;
3528 replace_reloads = replace;
3531 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3532 Store the operand values in RECOG_OPERAND and the locations
3533 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3534 Return if the insn needs no reload processing. */
3536 switch (GET_CODE (body))
3547 noperands = asm_noperands (body);
3550 /* This insn is an `asm' with operands.
3551 First, find out how many operands, and allocate space. */
3553 insn_code_number = -1;
3554 /* ??? This is a bug! ???
3555 Give up and delete this insn if it has too many operands. */
3556 if (noperands > MAX_RECOG_OPERANDS)
3559 /* Now get the operand values out of the insn. */
3561 decode_asm_operands (body, recog_operand, recog_operand_loc,
3562 NULL_PTR, NULL_PTR);
3567 /* Ordinary insn: recognize it, allocate space for operands and
3568 constraints, and get them out via insn_extract. */
3570 insn_code_number = recog_memoized (insn);
3571 noperands = insn_n_operands[insn_code_number];
3572 insn_extract (insn);
3578 for (i = 0; i < noperands; i++)
3580 register RTX_CODE code = GET_CODE (recog_operand[i]);
3581 int is_set_dest = GET_CODE (body) == SET && (i == 0);
3583 if (insn_code_number >= 0)
3584 if (insn_operand_address_p[insn_code_number][i])
3585 find_reloads_address (VOIDmode, NULL_PTR,
3586 recog_operand[i], recog_operand_loc[i],
3587 i, RELOAD_FOR_INPUT, ind_levels);
3589 /* In these cases, we can't tell if the operand is an input
3590 or an output, so be conservative. In practice it won't be
3594 find_reloads_address (GET_MODE (recog_operand[i]),
3595 recog_operand_loc[i],
3596 XEXP (recog_operand[i], 0),
3597 &XEXP (recog_operand[i], 0),
3598 i, RELOAD_OTHER, ind_levels);
3600 recog_operand[i] = *recog_operand_loc[i]
3601 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
3602 ind_levels, is_set_dest);
3605 register int regno = REGNO (recog_operand[i]);
3606 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3607 recog_operand[i] = *recog_operand_loc[i]
3608 = reg_equiv_constant[regno];
3609 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3610 that feeds this insn. */
3611 if (reg_equiv_mem[regno] != 0)
3612 recog_operand[i] = *recog_operand_loc[i]
3613 = reg_equiv_mem[regno];
3618 /* Perhaps an output reload can be combined with another
3619 to reduce needs by one. */
3620 if (!goal_earlyclobber)
3622 #endif /* no REGISTER_CONSTRAINTS */
3625 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3626 accepts a memory operand with constant address. */
3629 alternative_allows_memconst (constraint, altnum)
3634 /* Skip alternatives before the one requested. */
3637 while (*constraint++ != ',');
3640 /* Scan the requested alternative for 'm' or 'o'.
3641 If one of them is present, this alternative accepts memory constants. */
3642 while ((c = *constraint++) && c != ',' && c != '#')
3643 if (c == 'm' || c == 'o')
3648 /* Scan X for memory references and scan the addresses for reloading.
3649 Also checks for references to "constant" regs that we want to eliminate
3650 and replaces them with the values they stand for.
3651 We may alter X destructively if it contains a reference to such.
3652 If X is just a constant reg, we return the equivalent value
3655 IND_LEVELS says how many levels of indirect addressing this machine
3658 OPNUM and TYPE identify the purpose of the reload.
3660 IS_SET_DEST is true if X is the destination of a SET, which is not
3661 appropriate to be replaced by a constant. */
3664 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest)
3667 enum reload_type type;
3671 register RTX_CODE code = GET_CODE (x);
3673 register char *fmt = GET_RTX_FORMAT (code);
3678 /* This code is duplicated for speed in find_reloads. */
3679 register int regno = REGNO (x);
3680 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3681 x = reg_equiv_constant[regno];
3683 /* This creates (subreg (mem...)) which would cause an unnecessary
3684 reload of the mem. */
3685 else if (reg_equiv_mem[regno] != 0)
3686 x = reg_equiv_mem[regno];
3688 else if (reg_equiv_address[regno] != 0)
3690 /* If reg_equiv_address varies, it may be shared, so copy it. */
3691 rtx addr = reg_equiv_address[regno];
3693 if (rtx_varies_p (addr))
3694 addr = copy_rtx (addr);
3696 x = gen_rtx (MEM, GET_MODE (x), addr);
3697 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3698 find_reloads_address (GET_MODE (x), NULL_PTR,
3700 &XEXP (x, 0), opnum, type, ind_levels);
3707 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
3708 opnum, type, ind_levels);
3712 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
3714 /* Check for SUBREG containing a REG that's equivalent to a constant.
3715 If the constant has a known value, truncate it right now.
3716 Similarly if we are extracting a single-word of a multi-word
3717 constant. If the constant is symbolic, allow it to be substituted
3718 normally. push_reload will strip the subreg later. If the
3719 constant is VOIDmode, abort because we will lose the mode of
3720 the register (this should never happen because one of the cases
3721 above should handle it). */
3723 register int regno = REGNO (SUBREG_REG (x));
3726 if (subreg_lowpart_p (x)
3727 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3728 && reg_equiv_constant[regno] != 0
3729 && (tem = gen_lowpart_common (GET_MODE (x),
3730 reg_equiv_constant[regno])) != 0)
3733 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
3734 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3735 && reg_equiv_constant[regno] != 0
3736 && (tem = operand_subword (reg_equiv_constant[regno],
3738 GET_MODE (SUBREG_REG (x)))) != 0)
3741 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3742 && reg_equiv_constant[regno] != 0
3743 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
3746 /* If the subreg contains a reg that will be converted to a mem,
3747 convert the subreg to a narrower memref now.
3748 Otherwise, we would get (subreg (mem ...) ...),
3749 which would force reload of the mem.
3751 We also need to do this if there is an equivalent MEM that is
3752 not offsettable. In that case, alter_subreg would produce an
3753 invalid address on big-endian machines.
3755 For machines that extend byte loads, we must not reload using
3756 a wider mode if we have a paradoxical SUBREG. find_reloads will
3757 force a reload in that case. So we should not do anything here. */
3759 else if (regno >= FIRST_PSEUDO_REGISTER
3760 #if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
3761 && (GET_MODE_SIZE (GET_MODE (x))
3762 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3764 && (reg_equiv_address[regno] != 0
3765 || (reg_equiv_mem[regno] != 0
3766 && (! strict_memory_address_p (GET_MODE (x),
3767 XEXP (reg_equiv_mem[regno], 0))
3768 || ! offsettable_memref_p (reg_equiv_mem[regno])))))
3770 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
3771 rtx addr = (reg_equiv_address[regno] ? reg_equiv_address[regno]
3772 : XEXP (reg_equiv_mem[regno], 0));
3773 #if BYTES_BIG_ENDIAN
3775 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
3776 offset += MIN (size, UNITS_PER_WORD);
3777 size = GET_MODE_SIZE (GET_MODE (x));
3778 offset -= MIN (size, UNITS_PER_WORD);
3780 addr = plus_constant (addr, offset);
3781 x = gen_rtx (MEM, GET_MODE (x), addr);
3782 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3783 find_reloads_address (GET_MODE (x), NULL_PTR,
3785 &XEXP (x, 0), opnum, type, ind_levels);
3790 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3793 XEXP (x, i) = find_reloads_toplev (XEXP (x, i), opnum, type,
3794 ind_levels, is_set_dest);
3799 /* Return a mem ref for the memory equivalent of reg REGNO.
3800 This mem ref is not shared with anything. */
3803 make_memloc (ad, regno)
3808 rtx tem = reg_equiv_address[regno];
3810 #if 0 /* We cannot safely reuse a memloc made here;
3811 if the pseudo appears twice, and its mem needs a reload,
3812 it gets two separate reloads assigned, but it only
3813 gets substituted with the second of them;
3814 then it can get used before that reload reg gets loaded up. */
3815 for (i = 0; i < n_memlocs; i++)
3816 if (rtx_equal_p (tem, XEXP (memlocs[i], 0)))
3820 /* If TEM might contain a pseudo, we must copy it to avoid
3821 modifying it when we do the substitution for the reload. */
3822 if (rtx_varies_p (tem))
3823 tem = copy_rtx (tem);
3825 tem = gen_rtx (MEM, GET_MODE (ad), tem);
3826 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3827 memlocs[n_memlocs++] = tem;
3831 /* Record all reloads needed for handling memory address AD
3832 which appears in *LOC in a memory reference to mode MODE
3833 which itself is found in location *MEMREFLOC.
3834 Note that we take shortcuts assuming that no multi-reg machine mode
3835 occurs as part of an address.
3837 OPNUM and TYPE specify the purpose of this reload.
3839 IND_LEVELS says how many levels of indirect addressing this machine
3842 Value is nonzero if this address is reloaded or replaced as a whole.
3843 This is interesting to the caller if the address is an autoincrement.
3845 Note that there is no verification that the address will be valid after
3846 this routine does its work. Instead, we rely on the fact that the address
3847 was valid when reload started. So we need only undo things that reload
3848 could have broken. These are wrong register types, pseudos not allocated
3849 to a hard register, and frame pointer elimination. */
3852 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels)
3853 enum machine_mode mode;
3858 enum reload_type type;
3864 /* If the address is a register, see if it is a legitimate address and
3865 reload if not. We first handle the cases where we need not reload
3866 or where we must reload in a non-standard way. */
3868 if (GET_CODE (ad) == REG)
3872 if (reg_equiv_constant[regno] != 0
3873 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
3875 *loc = ad = reg_equiv_constant[regno];
3879 else if (reg_equiv_address[regno] != 0)
3881 tem = make_memloc (ad, regno);
3882 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
3883 &XEXP (tem, 0), opnum, type, ind_levels);
3884 push_reload (tem, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
3885 GET_MODE (ad), VOIDmode, 0, 0,
3890 /* We can avoid a reload if the register's equivalent memory expression
3891 is valid as an indirect memory address.
3892 But not all addresses are valid in a mem used as an indirect address:
3893 only reg or reg+constant. */
3895 else if (reg_equiv_mem[regno] != 0 && ind_levels > 0
3896 && strict_memory_address_p (mode, reg_equiv_mem[regno])
3897 && (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == REG
3898 || (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == PLUS
3899 && GET_CODE (XEXP (XEXP (reg_equiv_mem[regno], 0), 0)) == REG
3900 && CONSTANT_P (XEXP (XEXP (reg_equiv_mem[regno], 0), 0)))))
3903 /* The only remaining case where we can avoid a reload is if this is a
3904 hard register that is valid as a base register and which is not the
3905 subject of a CLOBBER in this insn. */
3907 else if (regno < FIRST_PSEUDO_REGISTER && REGNO_OK_FOR_BASE_P (regno)
3908 && ! regno_clobbered_p (regno, this_insn))
3911 /* If we do not have one of the cases above, we must do the reload. */
3912 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
3913 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
3917 if (strict_memory_address_p (mode, ad))
3919 /* The address appears valid, so reloads are not needed.
3920 But the address may contain an eliminable register.
3921 This can happen because a machine with indirect addressing
3922 may consider a pseudo register by itself a valid address even when
3923 it has failed to get a hard reg.
3924 So do a tree-walk to find and eliminate all such regs. */
3926 /* But first quickly dispose of a common case. */
3927 if (GET_CODE (ad) == PLUS
3928 && GET_CODE (XEXP (ad, 1)) == CONST_INT
3929 && GET_CODE (XEXP (ad, 0)) == REG
3930 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
3933 subst_reg_equivs_changed = 0;
3934 *loc = subst_reg_equivs (ad);
3936 if (! subst_reg_equivs_changed)
3939 /* Check result for validity after substitution. */
3940 if (strict_memory_address_p (mode, ad))
3944 /* The address is not valid. We have to figure out why. One possibility
3945 is that it is itself a MEM. This can happen when the frame pointer is
3946 being eliminated, a pseudo is not allocated to a hard register, and the
3947 offset between the frame and stack pointers is not its initial value.
3948 In that case the pseudo will have been replaced by a MEM referring to
3949 the stack pointer. */
3950 if (GET_CODE (ad) == MEM)
3952 /* First ensure that the address in this MEM is valid. Then, unless
3953 indirect addresses are valid, reload the MEM into a register. */
3955 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
3956 opnum, type, ind_levels == 0 ? 0 : ind_levels - 1);
3958 /* If tem was changed, then we must create a new memory reference to
3959 hold it and store it back into memrefloc. */
3960 if (tem != ad && memrefloc)
3962 *memrefloc = copy_rtx (*memrefloc);
3963 copy_replacements (tem, XEXP (*memrefloc, 0));
3964 loc = &XEXP (*memrefloc, 0);
3967 /* Check similar cases as for indirect addresses as above except
3968 that we can allow pseudos and a MEM since they should have been
3969 taken care of above. */
3972 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
3973 || GET_CODE (XEXP (tem, 0)) == MEM
3974 || ! (GET_CODE (XEXP (tem, 0)) == REG
3975 || (GET_CODE (XEXP (tem, 0)) == PLUS
3976 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
3977 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
3979 /* Must use TEM here, not AD, since it is the one that will
3980 have any subexpressions reloaded, if needed. */
3981 push_reload (tem, NULL_RTX, loc, NULL_PTR,
3982 BASE_REG_CLASS, GET_MODE (tem), VOIDmode, 0,
3990 /* If we have address of a stack slot but it's not valid
3991 (displacement is too large), compute the sum in a register. */
3992 else if (GET_CODE (ad) == PLUS
3993 && (XEXP (ad, 0) == frame_pointer_rtx
3994 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3995 || XEXP (ad, 0) == arg_pointer_rtx
3997 || XEXP (ad, 0) == stack_pointer_rtx)
3998 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4000 /* Unshare the MEM rtx so we can safely alter it. */
4003 rtx oldref = *memrefloc;
4004 *memrefloc = copy_rtx (*memrefloc);
4005 loc = &XEXP (*memrefloc, 0);
4007 if (double_reg_address_ok)
4009 /* Unshare the sum as well. */
4010 *loc = ad = copy_rtx (ad);
4011 /* Reload the displacement into an index reg.
4012 We assume the frame pointer or arg pointer is a base reg. */
4013 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4014 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4019 /* If the sum of two regs is not necessarily valid,
4020 reload the sum into a base reg.
4021 That will at least work. */
4022 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode,
4023 opnum, type, ind_levels);
4028 /* If we have an indexed stack slot, there are three possible reasons why
4029 it might be invalid: The index might need to be reloaded, the address
4030 might have been made by frame pointer elimination and hence have a
4031 constant out of range, or both reasons might apply.
4033 We can easily check for an index needing reload, but even if that is the
4034 case, we might also have an invalid constant. To avoid making the
4035 conservative assumption and requiring two reloads, we see if this address
4036 is valid when not interpreted strictly. If it is, the only problem is
4037 that the index needs a reload and find_reloads_address_1 will take care
4040 There is still a case when we might generate an extra reload,
4041 however. In certain cases eliminate_regs will return a MEM for a REG
4042 (see the code there for details). In those cases, memory_address_p
4043 applied to our address will return 0 so we will think that our offset
4044 must be too large. But it might indeed be valid and the only problem
4045 is that a MEM is present where a REG should be. This case should be
4046 very rare and there doesn't seem to be any way to avoid it.
4048 If we decide to do something here, it must be that
4049 `double_reg_address_ok' is true and that this address rtl was made by
4050 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4051 rework the sum so that the reload register will be added to the index.
4052 This is safe because we know the address isn't shared.
4054 We check for fp/ap/sp as both the first and second operand of the
4057 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4058 && GET_CODE (XEXP (ad, 0)) == PLUS
4059 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4060 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4061 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4063 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4064 && ! memory_address_p (mode, ad))
4066 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
4067 plus_constant (XEXP (XEXP (ad, 0), 0),
4068 INTVAL (XEXP (ad, 1))),
4069 XEXP (XEXP (ad, 0), 1));
4070 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4071 GET_MODE (ad), opnum, type, ind_levels);
4072 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, type, 0);
4077 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4078 && GET_CODE (XEXP (ad, 0)) == PLUS
4079 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4080 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4081 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4083 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4084 && ! memory_address_p (mode, ad))
4086 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
4087 plus_constant (XEXP (XEXP (ad, 0), 1),
4088 INTVAL (XEXP (ad, 1))),
4089 XEXP (XEXP (ad, 0), 0));
4090 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4091 GET_MODE (ad), opnum, type, ind_levels);
4092 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, type, 0);
4097 /* See if address becomes valid when an eliminable register
4098 in a sum is replaced. */
4101 if (GET_CODE (ad) == PLUS)
4102 tem = subst_indexed_address (ad);
4103 if (tem != ad && strict_memory_address_p (mode, tem))
4105 /* Ok, we win that way. Replace any additional eliminable
4108 subst_reg_equivs_changed = 0;
4109 tem = subst_reg_equivs (tem);
4111 /* Make sure that didn't make the address invalid again. */
4113 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4120 /* If constants aren't valid addresses, reload the constant address
4122 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4124 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4125 Unshare it so we can safely alter it. */
4126 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4127 && CONSTANT_POOL_ADDRESS_P (ad))
4129 rtx oldref = *memrefloc;
4130 *memrefloc = copy_rtx (*memrefloc);
4131 loc = &XEXP (*memrefloc, 0);
4134 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
4139 return find_reloads_address_1 (ad, 0, loc, opnum, type, ind_levels);
4142 /* Find all pseudo regs appearing in AD
4143 that are eliminable in favor of equivalent values
4144 and do not have hard regs; replace them by their equivalents. */
4147 subst_reg_equivs (ad)
4150 register RTX_CODE code = GET_CODE (ad);
4168 register int regno = REGNO (ad);
4170 if (reg_equiv_constant[regno] != 0)
4172 subst_reg_equivs_changed = 1;
4173 return reg_equiv_constant[regno];
4179 /* Quickly dispose of a common case. */
4180 if (XEXP (ad, 0) == frame_pointer_rtx
4181 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4185 fmt = GET_RTX_FORMAT (code);
4186 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4188 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i));
4192 /* Compute the sum of X and Y, making canonicalizations assumed in an
4193 address, namely: sum constant integers, surround the sum of two
4194 constants with a CONST, put the constant as the second operand, and
4195 group the constant on the outermost sum.
4197 This routine assumes both inputs are already in canonical form. */
4204 enum machine_mode mode = GET_MODE (x);
4206 if (mode == VOIDmode)
4207 mode = GET_MODE (y);
4209 if (mode == VOIDmode)
4212 if (GET_CODE (x) == CONST_INT)
4213 return plus_constant (y, INTVAL (x));
4214 else if (GET_CODE (y) == CONST_INT)
4215 return plus_constant (x, INTVAL (y));
4216 else if (CONSTANT_P (x))
4217 tem = x, x = y, y = tem;
4219 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
4220 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
4222 /* Note that if the operands of Y are specified in the opposite
4223 order in the recursive calls below, infinite recursion will occur. */
4224 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
4225 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
4227 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4228 constant will have been placed second. */
4229 if (CONSTANT_P (x) && CONSTANT_P (y))
4231 if (GET_CODE (x) == CONST)
4233 if (GET_CODE (y) == CONST)
4236 return gen_rtx (CONST, VOIDmode, gen_rtx (PLUS, mode, x, y));
4239 return gen_rtx (PLUS, mode, x, y);
4242 /* If ADDR is a sum containing a pseudo register that should be
4243 replaced with a constant (from reg_equiv_constant),
4244 return the result of doing so, and also apply the associative
4245 law so that the result is more likely to be a valid address.
4246 (But it is not guaranteed to be one.)
4248 Note that at most one register is replaced, even if more are
4249 replaceable. Also, we try to put the result into a canonical form
4250 so it is more likely to be a valid address.
4252 In all other cases, return ADDR. */
4255 subst_indexed_address (addr)
4258 rtx op0 = 0, op1 = 0, op2 = 0;
4262 if (GET_CODE (addr) == PLUS)
4264 /* Try to find a register to replace. */
4265 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
4266 if (GET_CODE (op0) == REG
4267 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
4268 && reg_renumber[regno] < 0
4269 && reg_equiv_constant[regno] != 0)
4270 op0 = reg_equiv_constant[regno];
4271 else if (GET_CODE (op1) == REG
4272 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
4273 && reg_renumber[regno] < 0
4274 && reg_equiv_constant[regno] != 0)
4275 op1 = reg_equiv_constant[regno];
4276 else if (GET_CODE (op0) == PLUS
4277 && (tem = subst_indexed_address (op0)) != op0)
4279 else if (GET_CODE (op1) == PLUS
4280 && (tem = subst_indexed_address (op1)) != op1)
4285 /* Pick out up to three things to add. */
4286 if (GET_CODE (op1) == PLUS)
4287 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
4288 else if (GET_CODE (op0) == PLUS)
4289 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4291 /* Compute the sum. */
4293 op1 = form_sum (op1, op2);
4295 op0 = form_sum (op0, op1);
4302 /* Record the pseudo registers we must reload into hard registers
4303 in a subexpression of a would-be memory address, X.
4304 (This function is not called if the address we find is strictly valid.)
4305 CONTEXT = 1 means we are considering regs as index regs,
4306 = 0 means we are considering them as base regs.
4308 OPNUM and TYPE specify the purpose of any reloads made.
4310 IND_LEVELS says how many levels of indirect addressing are
4311 supported at this point in the address.
4313 We return nonzero if X, as a whole, is reloaded or replaced. */
4315 /* Note that we take shortcuts assuming that no multi-reg machine mode
4316 occurs as part of an address.
4317 Also, this is not fully machine-customizable; it works for machines
4318 such as vaxes and 68000's and 32000's, but other possible machines
4319 could have addressing modes that this does not handle right. */
4322 find_reloads_address_1 (x, context, loc, opnum, type, ind_levels)
4327 enum reload_type type;
4330 register RTX_CODE code = GET_CODE (x);
4334 register rtx op0 = XEXP (x, 0);
4335 register rtx op1 = XEXP (x, 1);
4336 register RTX_CODE code0 = GET_CODE (op0);
4337 register RTX_CODE code1 = GET_CODE (op1);
4338 if (code0 == MULT || code0 == SIGN_EXTEND || code1 == MEM)
4340 find_reloads_address_1 (op0, 1, &XEXP (x, 0), opnum, type,
4342 find_reloads_address_1 (op1, 0, &XEXP (x, 1), opnum, type,
4345 else if (code1 == MULT || code1 == SIGN_EXTEND || code0 == MEM)
4347 find_reloads_address_1 (op0, 0, &XEXP (x, 0), opnum, type,
4349 find_reloads_address_1 (op1, 1, &XEXP (x, 1), opnum, type,
4352 else if (code0 == CONST_INT || code0 == CONST
4353 || code0 == SYMBOL_REF || code0 == LABEL_REF)
4354 find_reloads_address_1 (op1, 0, &XEXP (x, 1), opnum, type, ind_levels);
4355 else if (code1 == CONST_INT || code1 == CONST
4356 || code1 == SYMBOL_REF || code1 == LABEL_REF)
4357 find_reloads_address_1 (op0, 0, &XEXP (x, 0), opnum, type, ind_levels);
4358 else if (code0 == REG && code1 == REG)
4360 if (REG_OK_FOR_INDEX_P (op0)
4361 && REG_OK_FOR_BASE_P (op1))
4363 else if (REG_OK_FOR_INDEX_P (op1)
4364 && REG_OK_FOR_BASE_P (op0))
4366 else if (REG_OK_FOR_BASE_P (op1))
4367 find_reloads_address_1 (op0, 1, &XEXP (x, 0), opnum, type,
4369 else if (REG_OK_FOR_BASE_P (op0))
4370 find_reloads_address_1 (op1, 1, &XEXP (x, 1), opnum, type,
4372 else if (REG_OK_FOR_INDEX_P (op1))
4373 find_reloads_address_1 (op0, 0, &XEXP (x, 0), opnum, type,
4375 else if (REG_OK_FOR_INDEX_P (op0))
4376 find_reloads_address_1 (op1, 0, &XEXP (x, 1), opnum, type,
4380 find_reloads_address_1 (op0, 1, &XEXP (x, 0), opnum, type,
4382 find_reloads_address_1 (op1, 0, &XEXP (x, 1), opnum, type,
4386 else if (code0 == REG)
4388 find_reloads_address_1 (op0, 1, &XEXP (x, 0), opnum, type,
4390 find_reloads_address_1 (op1, 0, &XEXP (x, 1), opnum, type,
4393 else if (code1 == REG)
4395 find_reloads_address_1 (op1, 1, &XEXP (x, 1), opnum, type,
4397 find_reloads_address_1 (op0, 0, &XEXP (x, 0), opnum, type,
4401 else if (code == POST_INC || code == POST_DEC
4402 || code == PRE_INC || code == PRE_DEC)
4404 if (GET_CODE (XEXP (x, 0)) == REG)
4406 register int regno = REGNO (XEXP (x, 0));
4410 /* A register that is incremented cannot be constant! */
4411 if (regno >= FIRST_PSEUDO_REGISTER
4412 && reg_equiv_constant[regno] != 0)
4415 /* Handle a register that is equivalent to a memory location
4416 which cannot be addressed directly. */
4417 if (reg_equiv_address[regno] != 0)
4419 rtx tem = make_memloc (XEXP (x, 0), regno);
4420 /* First reload the memory location's address. */
4421 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
4422 &XEXP (tem, 0), opnum, type, ind_levels);
4423 /* Put this inside a new increment-expression. */
4424 x = gen_rtx (GET_CODE (x), GET_MODE (x), tem);
4425 /* Proceed to reload that, as if it contained a register. */
4428 /* If we have a hard register that is ok as an index,
4429 don't make a reload. If an autoincrement of a nice register
4430 isn't "valid", it must be that no autoincrement is "valid".
4431 If that is true and something made an autoincrement anyway,
4432 this must be a special context where one is allowed.
4433 (For example, a "push" instruction.)
4434 We can't improve this address, so leave it alone. */
4436 /* Otherwise, reload the autoincrement into a suitable hard reg
4437 and record how much to increment by. */
4439 if (reg_renumber[regno] >= 0)
4440 regno = reg_renumber[regno];
4441 if ((regno >= FIRST_PSEUDO_REGISTER
4442 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4443 : REGNO_OK_FOR_BASE_P (regno))))
4448 = push_reload (x, NULL_RTX, loc, NULL_PTR,
4449 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4450 GET_MODE (x), GET_MODE (x), VOIDmode, 0,
4452 reload_inc[reloadnum]
4453 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
4458 /* Update the REG_INC notes. */
4460 for (link = REG_NOTES (this_insn);
4461 link; link = XEXP (link, 1))
4462 if (REG_NOTE_KIND (link) == REG_INC
4463 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
4464 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4469 else if (GET_CODE (XEXP (x, 0)) == MEM)
4471 /* This is probably the result of a substitution, by eliminate_regs,
4472 of an equivalent address for a pseudo that was not allocated to a
4473 hard register. Verify that the specified address is valid and
4474 reload it into a register. */
4475 rtx tem = XEXP (x, 0);
4479 /* Since we know we are going to reload this item, don't decrement
4480 for the indirection level.
4482 Note that this is actually conservative: it would be slightly
4483 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4485 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
4486 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
4487 opnum, type, ind_levels);
4489 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
4490 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4491 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4492 reload_inc[reloadnum]
4493 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
4495 link = FIND_REG_INC_NOTE (this_insn, tem);
4497 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4502 else if (code == MEM)
4504 /* This is probably the result of a substitution, by eliminate_regs,
4505 of an equivalent address for a pseudo that was not allocated to a
4506 hard register. Verify that the specified address is valid and reload
4509 Since we know we are going to reload this item, don't decrement
4510 for the indirection level.
4512 Note that this is actually conservative: it would be slightly more
4513 efficient to use the value of SPILL_INDIRECT_LEVELS from
4516 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
4517 opnum, type, ind_levels);
4519 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
4520 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4521 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4524 else if (code == REG)
4526 register int regno = REGNO (x);
4528 if (reg_equiv_constant[regno] != 0)
4530 find_reloads_address_part (reg_equiv_constant[regno], loc,
4531 (context ? INDEX_REG_CLASS
4533 GET_MODE (x), opnum, type, ind_levels);
4537 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4538 that feeds this insn. */
4539 if (reg_equiv_mem[regno] != 0)
4541 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
4542 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4543 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4547 if (reg_equiv_address[regno] != 0)
4549 x = make_memloc (x, regno);
4550 find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0),
4551 opnum, type, ind_levels);
4554 if (reg_renumber[regno] >= 0)
4555 regno = reg_renumber[regno];
4556 if ((regno >= FIRST_PSEUDO_REGISTER
4557 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4558 : REGNO_OK_FOR_BASE_P (regno))))
4560 push_reload (x, NULL_RTX, loc, NULL_PTR,
4561 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4562 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4566 /* If a register appearing in an address is the subject of a CLOBBER
4567 in this insn, reload it into some other register to be safe.
4568 The CLOBBER is supposed to make the register unavailable
4569 from before this insn to after it. */
4570 if (regno_clobbered_p (regno, this_insn))
4572 push_reload (x, NULL_RTX, loc, NULL_PTR,
4573 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4574 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4580 register char *fmt = GET_RTX_FORMAT (code);
4582 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4585 find_reloads_address_1 (XEXP (x, i), context, &XEXP (x, i),
4586 opnum, type, ind_levels);
4593 /* X, which is found at *LOC, is a part of an address that needs to be
4594 reloaded into a register of class CLASS. If X is a constant, or if
4595 X is a PLUS that contains a constant, check that the constant is a
4596 legitimate operand and that we are supposed to be able to load
4597 it into the register.
4599 If not, force the constant into memory and reload the MEM instead.
4601 MODE is the mode to use, in case X is an integer constant.
4603 OPNUM and TYPE describe the purpose of any reloads made.
4605 IND_LEVELS says how many levels of indirect addressing this machine
4609 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
4612 enum reg_class class;
4613 enum machine_mode mode;
4615 enum reload_type type;
4619 && (! LEGITIMATE_CONSTANT_P (x)
4620 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
4622 rtx tem = x = force_const_mem (mode, x);
4623 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4624 opnum, type, ind_levels);
4627 else if (GET_CODE (x) == PLUS
4628 && CONSTANT_P (XEXP (x, 1))
4629 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
4630 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
4632 rtx tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
4634 x = gen_rtx (PLUS, GET_MODE (x), XEXP (x, 0), tem);
4635 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4636 opnum, type, ind_levels);
4639 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
4640 mode, VOIDmode, 0, 0, opnum, type);
4643 /* Substitute into the current INSN the registers into which we have reloaded
4644 the things that need reloading. The array `replacements'
4645 says contains the locations of all pointers that must be changed
4646 and says what to replace them with.
4648 Return the rtx that X translates into; usually X, but modified. */
4655 for (i = 0; i < n_replacements; i++)
4657 register struct replacement *r = &replacements[i];
4658 register rtx reloadreg = reload_reg_rtx[r->what];
4661 /* Encapsulate RELOADREG so its machine mode matches what
4662 used to be there. Note that gen_lowpart_common will
4663 do the wrong thing if RELOADREG is multi-word. RELOADREG
4664 will always be a REG here. */
4665 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
4666 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
4668 /* If we are putting this into a SUBREG and RELOADREG is a
4669 SUBREG, we would be making nested SUBREGs, so we have to fix
4670 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
4672 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
4674 if (GET_MODE (*r->subreg_loc)
4675 == GET_MODE (SUBREG_REG (reloadreg)))
4676 *r->subreg_loc = SUBREG_REG (reloadreg);
4679 *r->where = SUBREG_REG (reloadreg);
4680 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
4684 *r->where = reloadreg;
4686 /* If reload got no reg and isn't optional, something's wrong. */
4687 else if (! reload_optional[r->what])
4692 /* Make a copy of any replacements being done into X and move those copies
4693 to locations in Y, a copy of X. We only look at the highest level of
4697 copy_replacements (x, y)
4702 enum rtx_code code = GET_CODE (x);
4703 char *fmt = GET_RTX_FORMAT (code);
4704 struct replacement *r;
4706 /* We can't support X being a SUBREG because we might then need to know its
4707 location if something inside it was replaced. */
4711 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4713 for (j = 0; j < n_replacements; j++)
4715 if (replacements[j].subreg_loc == &XEXP (x, i))
4717 r = &replacements[n_replacements++];
4718 r->where = replacements[j].where;
4719 r->subreg_loc = &XEXP (y, i);
4720 r->what = replacements[j].what;
4721 r->mode = replacements[j].mode;
4723 else if (replacements[j].where == &XEXP (x, i))
4725 r = &replacements[n_replacements++];
4726 r->where = &XEXP (y, i);
4728 r->what = replacements[j].what;
4729 r->mode = replacements[j].mode;
4734 /* If LOC was scheduled to be replaced by something, return the replacement.
4735 Otherwise, return *LOC. */
4738 find_replacement (loc)
4741 struct replacement *r;
4743 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
4745 rtx reloadreg = reload_reg_rtx[r->what];
4747 if (reloadreg && r->where == loc)
4749 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
4750 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
4754 else if (reloadreg && r->subreg_loc == loc)
4756 /* RELOADREG must be either a REG or a SUBREG.
4758 ??? Is it actually still ever a SUBREG? If so, why? */
4760 if (GET_CODE (reloadreg) == REG)
4761 return gen_rtx (REG, GET_MODE (*loc),
4762 REGNO (reloadreg) + SUBREG_WORD (*loc));
4763 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
4766 return gen_rtx (SUBREG, GET_MODE (*loc), SUBREG_REG (reloadreg),
4767 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
4774 /* Return nonzero if register in range [REGNO, ENDREGNO)
4775 appears either explicitly or implicitly in X
4776 other than being stored into.
4778 References contained within the substructure at LOC do not count.
4779 LOC may be zero, meaning don't ignore anything.
4781 This is similar to refers_to_regno_p in rtlanal.c except that we
4782 look at equivalences for pseudos that didn't get hard registers. */
4785 refers_to_regno_for_reload_p (regno, endregno, x, loc)
4786 int regno, endregno;
4791 register RTX_CODE code;
4798 code = GET_CODE (x);
4805 /* If this is a pseudo, a hard register must not have been allocated.
4806 X must therefore either be a constant or be in memory. */
4807 if (i >= FIRST_PSEUDO_REGISTER)
4809 if (reg_equiv_memory_loc[i])
4810 return refers_to_regno_for_reload_p (regno, endregno,
4811 reg_equiv_memory_loc[i],
4814 if (reg_equiv_constant[i])
4820 return (endregno > i
4821 && regno < i + (i < FIRST_PSEUDO_REGISTER
4822 ? HARD_REGNO_NREGS (i, GET_MODE (x))
4826 /* If this is a SUBREG of a hard reg, we can see exactly which
4827 registers are being modified. Otherwise, handle normally. */
4828 if (GET_CODE (SUBREG_REG (x)) == REG
4829 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
4831 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
4833 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
4834 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
4836 return endregno > inner_regno && regno < inner_endregno;
4842 if (&SET_DEST (x) != loc
4843 /* Note setting a SUBREG counts as referring to the REG it is in for
4844 a pseudo but not for hard registers since we can
4845 treat each word individually. */
4846 && ((GET_CODE (SET_DEST (x)) == SUBREG
4847 && loc != &SUBREG_REG (SET_DEST (x))
4848 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
4849 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
4850 && refers_to_regno_for_reload_p (regno, endregno,
4851 SUBREG_REG (SET_DEST (x)),
4853 || (GET_CODE (SET_DEST (x)) != REG
4854 && refers_to_regno_for_reload_p (regno, endregno,
4855 SET_DEST (x), loc))))
4858 if (code == CLOBBER || loc == &SET_SRC (x))
4864 /* X does not match, so try its subexpressions. */
4866 fmt = GET_RTX_FORMAT (code);
4867 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4869 if (fmt[i] == 'e' && loc != &XEXP (x, i))
4877 if (refers_to_regno_for_reload_p (regno, endregno,
4881 else if (fmt[i] == 'E')
4884 for (j = XVECLEN (x, i) - 1; j >=0; j--)
4885 if (loc != &XVECEXP (x, i, j)
4886 && refers_to_regno_for_reload_p (regno, endregno,
4887 XVECEXP (x, i, j), loc))
4894 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
4895 we check if any register number in X conflicts with the relevant register
4896 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
4897 contains a MEM (we don't bother checking for memory addresses that can't
4898 conflict because we expect this to be a rare case.
4900 This function is similar to reg_overlap_mention_p in rtlanal.c except
4901 that we look at equivalences for pseudos that didn't get hard registers. */
4904 reg_overlap_mentioned_for_reload_p (x, in)
4907 int regno, endregno;
4909 if (GET_CODE (x) == SUBREG)
4911 regno = REGNO (SUBREG_REG (x));
4912 if (regno < FIRST_PSEUDO_REGISTER)
4913 regno += SUBREG_WORD (x);
4915 else if (GET_CODE (x) == REG)
4919 /* If this is a pseudo, it must not have been assigned a hard register.
4920 Therefore, it must either be in memory or be a constant. */
4922 if (regno >= FIRST_PSEUDO_REGISTER)
4924 if (reg_equiv_memory_loc[regno])
4925 return refers_to_mem_for_reload_p (in);
4926 else if (reg_equiv_constant[regno])
4931 else if (CONSTANT_P (x))
4933 else if (GET_CODE (x) == MEM)
4934 return refers_to_mem_for_reload_p (in);
4935 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
4936 || GET_CODE (x) == CC0)
4937 return reg_mentioned_p (x, in);
4941 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
4942 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
4944 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
4947 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
4951 refers_to_mem_for_reload_p (x)
4957 if (GET_CODE (x) == MEM)
4960 if (GET_CODE (x) == REG)
4961 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
4962 && reg_equiv_memory_loc[REGNO (x)]);
4964 fmt = GET_RTX_FORMAT (GET_CODE (x));
4965 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4967 && (GET_CODE (XEXP (x, i)) == MEM
4968 || refers_to_mem_for_reload_p (XEXP (x, i))))
4974 /* Check the insns before INSN to see if there is a suitable register
4975 containing the same value as GOAL.
4976 If OTHER is -1, look for a register in class CLASS.
4977 Otherwise, just see if register number OTHER shares GOAL's value.
4979 Return an rtx for the register found, or zero if none is found.
4981 If RELOAD_REG_P is (short *)1,
4982 we reject any hard reg that appears in reload_reg_rtx
4983 because such a hard reg is also needed coming into this insn.
4985 If RELOAD_REG_P is any other nonzero value,
4986 it is a vector indexed by hard reg number
4987 and we reject any hard reg whose element in the vector is nonnegative
4988 as well as any that appears in reload_reg_rtx.
4990 If GOAL is zero, then GOALREG is a register number; we look
4991 for an equivalent for that register.
4993 MODE is the machine mode of the value we want an equivalence for.
4994 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
4996 This function is used by jump.c as well as in the reload pass.
4998 If GOAL is the sum of the stack pointer and a constant, we treat it
4999 as if it were a constant except that sp is required to be unchanging. */
5002 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
5005 enum reg_class class;
5007 short *reload_reg_p;
5009 enum machine_mode mode;
5011 register rtx p = insn;
5012 rtx goaltry, valtry, value, where;
5014 register int regno = -1;
5018 int goal_mem_addr_varies = 0;
5019 int need_stable_sp = 0;
5025 else if (GET_CODE (goal) == REG)
5026 regno = REGNO (goal);
5027 else if (GET_CODE (goal) == MEM)
5029 enum rtx_code code = GET_CODE (XEXP (goal, 0));
5030 if (MEM_VOLATILE_P (goal))
5032 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
5034 /* An address with side effects must be reexecuted. */
5045 else if (CONSTANT_P (goal))
5047 else if (GET_CODE (goal) == PLUS
5048 && XEXP (goal, 0) == stack_pointer_rtx
5049 && CONSTANT_P (XEXP (goal, 1)))
5050 goal_const = need_stable_sp = 1;
5054 /* On some machines, certain regs must always be rejected
5055 because they don't behave the way ordinary registers do. */
5057 #ifdef OVERLAPPING_REGNO_P
5058 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5059 && OVERLAPPING_REGNO_P (regno))
5063 /* Scan insns back from INSN, looking for one that copies
5064 a value into or out of GOAL.
5065 Stop and give up if we reach a label. */
5070 if (p == 0 || GET_CODE (p) == CODE_LABEL)
5072 if (GET_CODE (p) == INSN
5073 /* If we don't want spill regs ... */
5074 && (! (reload_reg_p != 0
5075 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
5076 /* ... then ignore insns introduced by reload; they aren't useful
5077 and can cause results in reload_as_needed to be different
5078 from what they were when calculating the need for spills.
5079 If we notice an input-reload insn here, we will reject it below,
5080 but it might hide a usable equivalent. That makes bad code.
5081 It may even abort: perhaps no reg was spilled for this insn
5082 because it was assumed we would find that equivalent. */
5083 || INSN_UID (p) < reload_first_uid))
5086 pat = single_set (p);
5087 /* First check for something that sets some reg equal to GOAL. */
5090 && true_regnum (SET_SRC (pat)) == regno
5091 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5094 && true_regnum (SET_DEST (pat)) == regno
5095 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
5097 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
5098 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5100 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
5101 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
5103 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
5104 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
5105 /* If we are looking for a constant,
5106 and something equivalent to that constant was copied
5107 into a reg, we can use that reg. */
5108 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5110 && rtx_equal_p (XEXP (tem, 0), goal)
5111 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5112 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5114 && GET_CODE (SET_DEST (pat)) == REG
5115 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5116 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5117 && GET_CODE (goal) == CONST_INT
5118 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
5120 && rtx_equal_p (goal, goaltry)
5121 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
5123 && (valueno = true_regnum (valtry)) >= 0)
5124 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5126 && GET_CODE (SET_DEST (pat)) == REG
5127 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5128 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5129 && GET_CODE (goal) == CONST_INT
5130 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
5132 && rtx_equal_p (goal, goaltry)
5134 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
5135 && (valueno = true_regnum (valtry)) >= 0)))
5138 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
5139 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
5149 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5150 (or copying VALUE into GOAL, if GOAL is also a register).
5151 Now verify that VALUE is really valid. */
5153 /* VALUENO is the register number of VALUE; a hard register. */
5155 /* Don't try to re-use something that is killed in this insn. We want
5156 to be able to trust REG_UNUSED notes. */
5157 if (find_reg_note (where, REG_UNUSED, value))
5160 /* If we propose to get the value from the stack pointer or if GOAL is
5161 a MEM based on the stack pointer, we need a stable SP. */
5162 if (valueno == STACK_POINTER_REGNUM
5163 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
5167 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5168 if (GET_MODE (value) != mode)
5171 /* Reject VALUE if it was loaded from GOAL
5172 and is also a register that appears in the address of GOAL. */
5174 if (goal_mem && value == SET_DEST (PATTERN (where))
5175 && refers_to_regno_for_reload_p (valueno,
5177 + HARD_REGNO_NREGS (valueno, mode)),
5181 /* Reject registers that overlap GOAL. */
5183 if (!goal_mem && !goal_const
5184 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
5185 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
5188 /* Reject VALUE if it is one of the regs reserved for reloads.
5189 Reload1 knows how to reuse them anyway, and it would get
5190 confused if we allocated one without its knowledge.
5191 (Now that insns introduced by reload are ignored above,
5192 this case shouldn't happen, but I'm not positive.) */
5194 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
5195 && reload_reg_p[valueno] >= 0)
5198 /* On some machines, certain regs must always be rejected
5199 because they don't behave the way ordinary registers do. */
5201 #ifdef OVERLAPPING_REGNO_P
5202 if (OVERLAPPING_REGNO_P (valueno))
5206 nregs = HARD_REGNO_NREGS (regno, mode);
5207 valuenregs = HARD_REGNO_NREGS (valueno, mode);
5209 /* Reject VALUE if it is a register being used for an input reload
5210 even if it is not one of those reserved. */
5212 if (reload_reg_p != 0)
5215 for (i = 0; i < n_reloads; i++)
5216 if (reload_reg_rtx[i] != 0 && reload_in[i])
5218 int regno1 = REGNO (reload_reg_rtx[i]);
5219 int nregs1 = HARD_REGNO_NREGS (regno1,
5220 GET_MODE (reload_reg_rtx[i]));
5221 if (regno1 < valueno + valuenregs
5222 && regno1 + nregs1 > valueno)
5228 /* We must treat frame pointer as varying here,
5229 since it can vary--in a nonlocal goto as generated by expand_goto. */
5230 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
5232 /* Now verify that the values of GOAL and VALUE remain unaltered
5233 until INSN is reached. */
5242 /* Don't trust the conversion past a function call
5243 if either of the two is in a call-clobbered register, or memory. */
5244 if (GET_CODE (p) == CALL_INSN
5245 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5246 && call_used_regs[regno])
5248 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5249 && call_used_regs[valueno])
5255 #ifdef INSN_CLOBBERS_REGNO_P
5256 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5257 && INSN_CLOBBERS_REGNO_P (p, valueno))
5258 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5259 && INSN_CLOBBERS_REGNO_P (p, regno)))
5263 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
5265 /* If this insn P stores in either GOAL or VALUE, return 0.
5266 If GOAL is a memory ref and this insn writes memory, return 0.
5267 If GOAL is a memory ref and its address is not constant,
5268 and this insn P changes a register used in GOAL, return 0. */
5271 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
5273 register rtx dest = SET_DEST (pat);
5274 while (GET_CODE (dest) == SUBREG
5275 || GET_CODE (dest) == ZERO_EXTRACT
5276 || GET_CODE (dest) == SIGN_EXTRACT
5277 || GET_CODE (dest) == STRICT_LOW_PART)
5278 dest = XEXP (dest, 0);
5279 if (GET_CODE (dest) == REG)
5281 register int xregno = REGNO (dest);
5283 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5284 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5287 if (xregno < regno + nregs && xregno + xnregs > regno)
5289 if (xregno < valueno + valuenregs
5290 && xregno + xnregs > valueno)
5292 if (goal_mem_addr_varies
5293 && reg_overlap_mentioned_for_reload_p (dest, goal))
5296 else if (goal_mem && GET_CODE (dest) == MEM
5297 && ! push_operand (dest, GET_MODE (dest)))
5299 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
5302 else if (GET_CODE (pat) == PARALLEL)
5305 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
5307 register rtx v1 = XVECEXP (pat, 0, i);
5308 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
5310 register rtx dest = SET_DEST (v1);
5311 while (GET_CODE (dest) == SUBREG
5312 || GET_CODE (dest) == ZERO_EXTRACT
5313 || GET_CODE (dest) == SIGN_EXTRACT
5314 || GET_CODE (dest) == STRICT_LOW_PART)
5315 dest = XEXP (dest, 0);
5316 if (GET_CODE (dest) == REG)
5318 register int xregno = REGNO (dest);
5320 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5321 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5324 if (xregno < regno + nregs
5325 && xregno + xnregs > regno)
5327 if (xregno < valueno + valuenregs
5328 && xregno + xnregs > valueno)
5330 if (goal_mem_addr_varies
5331 && reg_overlap_mentioned_for_reload_p (dest,
5335 else if (goal_mem && GET_CODE (dest) == MEM
5336 && ! push_operand (dest, GET_MODE (dest)))
5338 else if (need_stable_sp
5339 && push_operand (dest, GET_MODE (dest)))
5346 /* If this insn auto-increments or auto-decrements
5347 either regno or valueno, return 0 now.
5348 If GOAL is a memory ref and its address is not constant,
5349 and this insn P increments a register used in GOAL, return 0. */
5353 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
5354 if (REG_NOTE_KIND (link) == REG_INC
5355 && GET_CODE (XEXP (link, 0)) == REG)
5357 register int incno = REGNO (XEXP (link, 0));
5358 if (incno < regno + nregs && incno >= regno)
5360 if (incno < valueno + valuenregs && incno >= valueno)
5362 if (goal_mem_addr_varies
5363 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
5373 /* Find a place where INCED appears in an increment or decrement operator
5374 within X, and return the amount INCED is incremented or decremented by.
5375 The value is always positive. */
5378 find_inc_amount (x, inced)
5381 register enum rtx_code code = GET_CODE (x);
5387 register rtx addr = XEXP (x, 0);
5388 if ((GET_CODE (addr) == PRE_DEC
5389 || GET_CODE (addr) == POST_DEC
5390 || GET_CODE (addr) == PRE_INC
5391 || GET_CODE (addr) == POST_INC)
5392 && XEXP (addr, 0) == inced)
5393 return GET_MODE_SIZE (GET_MODE (x));
5396 fmt = GET_RTX_FORMAT (code);
5397 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5401 register int tem = find_inc_amount (XEXP (x, i), inced);
5408 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5410 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
5420 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5423 regno_clobbered_p (regno, insn)
5427 if (GET_CODE (PATTERN (insn)) == CLOBBER
5428 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
5429 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
5431 if (GET_CODE (PATTERN (insn)) == PARALLEL)
5433 int i = XVECLEN (PATTERN (insn), 0) - 1;
5437 rtx elt = XVECEXP (PATTERN (insn), 0, i);
5438 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
5439 && REGNO (XEXP (elt, 0)) == regno)