1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
93 #include "insn-config.h"
99 #include "hard-reg-set.h"
103 #include "function.h"
106 #ifndef REGISTER_MOVE_COST
107 #define REGISTER_MOVE_COST(m, x, y) 2
110 #ifndef REGNO_MODE_OK_FOR_BASE_P
111 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
114 #ifndef REG_MODE_OK_FOR_BASE_P
115 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
118 /* All reloads of the current insn are recorded here. See reload.h for
121 struct reload rld[MAX_RELOADS];
123 /* All the "earlyclobber" operands of the current insn
124 are recorded here. */
126 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
128 int reload_n_operands;
130 /* Replacing reloads.
132 If `replace_reloads' is nonzero, then as each reload is recorded
133 an entry is made for it in the table `replacements'.
134 Then later `subst_reloads' can look through that table and
135 perform all the replacements needed. */
137 /* Nonzero means record the places to replace. */
138 static int replace_reloads;
140 /* Each replacement is recorded with a structure like this. */
143 rtx *where; /* Location to store in */
144 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
145 a SUBREG; 0 otherwise. */
146 int what; /* which reload this is for */
147 enum machine_mode mode; /* mode it must have */
150 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
152 /* Number of replacements currently recorded. */
153 static int n_replacements;
155 /* Used to track what is modified by an operand. */
158 int reg_flag; /* Nonzero if referencing a register. */
159 int safe; /* Nonzero if this can't conflict with anything. */
160 rtx base; /* Base address for MEM. */
161 HOST_WIDE_INT start; /* Starting offset or register number. */
162 HOST_WIDE_INT end; /* Ending offset or register number. */
165 #ifdef SECONDARY_MEMORY_NEEDED
167 /* Save MEMs needed to copy from one class of registers to another. One MEM
168 is used per mode, but normally only one or two modes are ever used.
170 We keep two versions, before and after register elimination. The one
171 after register elimination is record separately for each operand. This
172 is done in case the address is not valid to be sure that we separately
175 static rtx secondary_memlocs[NUM_MACHINE_MODES];
176 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
179 /* The instruction we are doing reloads for;
180 so we can test whether a register dies in it. */
181 static rtx this_insn;
183 /* Nonzero if this instruction is a user-specified asm with operands. */
184 static int this_insn_is_asm;
186 /* If hard_regs_live_known is nonzero,
187 we can tell which hard regs are currently live,
188 at least enough to succeed in choosing dummy reloads. */
189 static int hard_regs_live_known;
191 /* Indexed by hard reg number,
192 element is nonnegative if hard reg has been spilled.
193 This vector is passed to `find_reloads' as an argument
194 and is not changed here. */
195 static short *static_reload_reg_p;
197 /* Set to 1 in subst_reg_equivs if it changes anything. */
198 static int subst_reg_equivs_changed;
200 /* On return from push_reload, holds the reload-number for the OUT
201 operand, which can be different for that from the input operand. */
202 static int output_reloadnum;
204 /* Compare two RTX's. */
205 #define MATCHES(x, y) \
206 (x == y || (x != 0 && (GET_CODE (x) == REG \
207 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
208 : rtx_equal_p (x, y) && ! side_effects_p (x))))
210 /* Indicates if two reloads purposes are for similar enough things that we
211 can merge their reloads. */
212 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
213 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
214 || ((when1) == (when2) && (op1) == (op2)) \
215 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
216 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
217 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
218 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
219 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
221 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
222 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
223 ((when1) != (when2) \
224 || ! ((op1) == (op2) \
225 || (when1) == RELOAD_FOR_INPUT \
226 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
227 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
229 /* If we are going to reload an address, compute the reload type to
231 #define ADDR_TYPE(type) \
232 ((type) == RELOAD_FOR_INPUT_ADDRESS \
233 ? RELOAD_FOR_INPADDR_ADDRESS \
234 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
235 ? RELOAD_FOR_OUTADDR_ADDRESS \
238 #ifdef HAVE_SECONDARY_RELOADS
239 static int push_secondary_reload PARAMS ((int, rtx, int, int, enum reg_class,
240 enum machine_mode, enum reload_type,
243 static enum reg_class find_valid_class PARAMS ((enum machine_mode, int));
244 static int reload_inner_reg_of_subreg PARAMS ((rtx, enum machine_mode));
245 static void push_replacement PARAMS ((rtx *, int, enum machine_mode));
246 static void combine_reloads PARAMS ((void));
247 static int find_reusable_reload PARAMS ((rtx *, rtx, enum reg_class,
248 enum reload_type, int, int));
249 static rtx find_dummy_reload PARAMS ((rtx, rtx, rtx *, rtx *,
250 enum machine_mode, enum machine_mode,
251 enum reg_class, int, int));
252 static int hard_reg_set_here_p PARAMS ((unsigned int, unsigned int, rtx));
253 static struct decomposition decompose PARAMS ((rtx));
254 static int immune_p PARAMS ((rtx, rtx, struct decomposition));
255 static int alternative_allows_memconst PARAMS ((const char *, int));
256 static rtx find_reloads_toplev PARAMS ((rtx, int, enum reload_type, int,
258 static rtx make_memloc PARAMS ((rtx, int));
259 static int find_reloads_address PARAMS ((enum machine_mode, rtx *, rtx, rtx *,
260 int, enum reload_type, int, rtx));
261 static rtx subst_reg_equivs PARAMS ((rtx, rtx));
262 static rtx subst_indexed_address PARAMS ((rtx));
263 static void update_auto_inc_notes PARAMS ((rtx, int, int));
264 static int find_reloads_address_1 PARAMS ((enum machine_mode, rtx, int, rtx *,
265 int, enum reload_type,int, rtx));
266 static void find_reloads_address_part PARAMS ((rtx, rtx *, enum reg_class,
267 enum machine_mode, int,
268 enum reload_type, int));
269 static rtx find_reloads_subreg_address PARAMS ((rtx, int, int, enum reload_type,
271 static int find_inc_amount PARAMS ((rtx, rtx));
273 #ifdef HAVE_SECONDARY_RELOADS
275 /* Determine if any secondary reloads are needed for loading (if IN_P is
276 non-zero) or storing (if IN_P is zero) X to or from a reload register of
277 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
278 are needed, push them.
280 Return the reload number of the secondary reload we made, or -1 if
281 we didn't need one. *PICODE is set to the insn_code to use if we do
282 need a secondary reload. */
285 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
291 enum reg_class reload_class;
292 enum machine_mode reload_mode;
293 enum reload_type type;
294 enum insn_code *picode;
296 enum reg_class class = NO_REGS;
297 enum machine_mode mode = reload_mode;
298 enum insn_code icode = CODE_FOR_nothing;
299 enum reg_class t_class = NO_REGS;
300 enum machine_mode t_mode = VOIDmode;
301 enum insn_code t_icode = CODE_FOR_nothing;
302 enum reload_type secondary_type;
303 int s_reload, t_reload = -1;
305 if (type == RELOAD_FOR_INPUT_ADDRESS
306 || type == RELOAD_FOR_OUTPUT_ADDRESS
307 || type == RELOAD_FOR_INPADDR_ADDRESS
308 || type == RELOAD_FOR_OUTADDR_ADDRESS)
309 secondary_type = type;
311 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
313 *picode = CODE_FOR_nothing;
315 /* If X is a paradoxical SUBREG, use the inner value to determine both the
316 mode and object being reloaded. */
317 if (GET_CODE (x) == SUBREG
318 && (GET_MODE_SIZE (GET_MODE (x))
319 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
322 reload_mode = GET_MODE (x);
325 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
326 is still a pseudo-register by now, it *must* have an equivalent MEM
327 but we don't want to assume that), use that equivalent when seeing if
328 a secondary reload is needed since whether or not a reload is needed
329 might be sensitive to the form of the MEM. */
331 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
332 && reg_equiv_mem[REGNO (x)] != 0)
333 x = reg_equiv_mem[REGNO (x)];
335 #ifdef SECONDARY_INPUT_RELOAD_CLASS
337 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
340 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
342 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
345 /* If we don't need any secondary registers, done. */
346 if (class == NO_REGS)
349 /* Get a possible insn to use. If the predicate doesn't accept X, don't
352 icode = (in_p ? reload_in_optab[(int) reload_mode]
353 : reload_out_optab[(int) reload_mode]);
355 if (icode != CODE_FOR_nothing
356 && insn_data[(int) icode].operand[in_p].predicate
357 && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode)))
358 icode = CODE_FOR_nothing;
360 /* If we will be using an insn, see if it can directly handle the reload
361 register we will be using. If it can, the secondary reload is for a
362 scratch register. If it can't, we will use the secondary reload for
363 an intermediate register and require a tertiary reload for the scratch
366 if (icode != CODE_FOR_nothing)
368 /* If IN_P is non-zero, the reload register will be the output in
369 operand 0. If IN_P is zero, the reload register will be the input
370 in operand 1. Outputs should have an initial "=", which we must
373 enum reg_class insn_class;
375 if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0)
376 insn_class = ALL_REGS;
380 = insn_data[(int) icode].operand[!in_p].constraint[in_p];
382 = (insn_letter == 'r' ? GENERAL_REGS
383 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter));
385 if (insn_class == NO_REGS)
388 && insn_data[(int) icode].operand[!in_p].constraint[0] != '=')
392 /* The scratch register's constraint must start with "=&". */
393 if (insn_data[(int) icode].operand[2].constraint[0] != '='
394 || insn_data[(int) icode].operand[2].constraint[1] != '&')
397 if (reg_class_subset_p (reload_class, insn_class))
398 mode = insn_data[(int) icode].operand[2].mode;
401 char t_letter = insn_data[(int) icode].operand[2].constraint[2];
403 t_mode = insn_data[(int) icode].operand[2].mode;
404 t_class = (t_letter == 'r' ? GENERAL_REGS
405 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter));
407 icode = CODE_FOR_nothing;
411 /* This case isn't valid, so fail. Reload is allowed to use the same
412 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
413 in the case of a secondary register, we actually need two different
414 registers for correct code. We fail here to prevent the possibility of
415 silently generating incorrect code later.
417 The convention is that secondary input reloads are valid only if the
418 secondary_class is different from class. If you have such a case, you
419 can not use secondary reloads, you must work around the problem some
422 Allow this when a reload_in/out pattern is being used. I.e. assume
423 that the generated code handles this case. */
425 if (in_p && class == reload_class && icode == CODE_FOR_nothing
426 && t_icode == CODE_FOR_nothing)
429 /* If we need a tertiary reload, see if we have one we can reuse or else
432 if (t_class != NO_REGS)
434 for (t_reload = 0; t_reload < n_reloads; t_reload++)
435 if (rld[t_reload].secondary_p
436 && (reg_class_subset_p (t_class, rld[t_reload].class)
437 || reg_class_subset_p (rld[t_reload].class, t_class))
438 && ((in_p && rld[t_reload].inmode == t_mode)
439 || (! in_p && rld[t_reload].outmode == t_mode))
440 && ((in_p && (rld[t_reload].secondary_in_icode
441 == CODE_FOR_nothing))
442 || (! in_p &&(rld[t_reload].secondary_out_icode
443 == CODE_FOR_nothing)))
444 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
445 && MERGABLE_RELOADS (secondary_type,
446 rld[t_reload].when_needed,
447 opnum, rld[t_reload].opnum))
450 rld[t_reload].inmode = t_mode;
452 rld[t_reload].outmode = t_mode;
454 if (reg_class_subset_p (t_class, rld[t_reload].class))
455 rld[t_reload].class = t_class;
457 rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum);
458 rld[t_reload].optional &= optional;
459 rld[t_reload].secondary_p = 1;
460 if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed,
461 opnum, rld[t_reload].opnum))
462 rld[t_reload].when_needed = RELOAD_OTHER;
465 if (t_reload == n_reloads)
467 /* We need to make a new tertiary reload for this register class. */
468 rld[t_reload].in = rld[t_reload].out = 0;
469 rld[t_reload].class = t_class;
470 rld[t_reload].inmode = in_p ? t_mode : VOIDmode;
471 rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode;
472 rld[t_reload].reg_rtx = 0;
473 rld[t_reload].optional = optional;
474 rld[t_reload].inc = 0;
475 /* Maybe we could combine these, but it seems too tricky. */
476 rld[t_reload].nocombine = 1;
477 rld[t_reload].in_reg = 0;
478 rld[t_reload].out_reg = 0;
479 rld[t_reload].opnum = opnum;
480 rld[t_reload].when_needed = secondary_type;
481 rld[t_reload].secondary_in_reload = -1;
482 rld[t_reload].secondary_out_reload = -1;
483 rld[t_reload].secondary_in_icode = CODE_FOR_nothing;
484 rld[t_reload].secondary_out_icode = CODE_FOR_nothing;
485 rld[t_reload].secondary_p = 1;
491 /* See if we can reuse an existing secondary reload. */
492 for (s_reload = 0; s_reload < n_reloads; s_reload++)
493 if (rld[s_reload].secondary_p
494 && (reg_class_subset_p (class, rld[s_reload].class)
495 || reg_class_subset_p (rld[s_reload].class, class))
496 && ((in_p && rld[s_reload].inmode == mode)
497 || (! in_p && rld[s_reload].outmode == mode))
498 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
499 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
500 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
501 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
502 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
503 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
504 opnum, rld[s_reload].opnum))
507 rld[s_reload].inmode = mode;
509 rld[s_reload].outmode = mode;
511 if (reg_class_subset_p (class, rld[s_reload].class))
512 rld[s_reload].class = class;
514 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
515 rld[s_reload].optional &= optional;
516 rld[s_reload].secondary_p = 1;
517 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
518 opnum, rld[s_reload].opnum))
519 rld[s_reload].when_needed = RELOAD_OTHER;
522 if (s_reload == n_reloads)
524 #ifdef SECONDARY_MEMORY_NEEDED
525 /* If we need a memory location to copy between the two reload regs,
526 set it up now. Note that we do the input case before making
527 the reload and the output case after. This is due to the
528 way reloads are output. */
530 if (in_p && icode == CODE_FOR_nothing
531 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
533 get_secondary_mem (x, reload_mode, opnum, type);
535 /* We may have just added new reloads. Make sure we add
536 the new reload at the end. */
537 s_reload = n_reloads;
541 /* We need to make a new secondary reload for this register class. */
542 rld[s_reload].in = rld[s_reload].out = 0;
543 rld[s_reload].class = class;
545 rld[s_reload].inmode = in_p ? mode : VOIDmode;
546 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
547 rld[s_reload].reg_rtx = 0;
548 rld[s_reload].optional = optional;
549 rld[s_reload].inc = 0;
550 /* Maybe we could combine these, but it seems too tricky. */
551 rld[s_reload].nocombine = 1;
552 rld[s_reload].in_reg = 0;
553 rld[s_reload].out_reg = 0;
554 rld[s_reload].opnum = opnum;
555 rld[s_reload].when_needed = secondary_type;
556 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
557 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
558 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
559 rld[s_reload].secondary_out_icode
560 = ! in_p ? t_icode : CODE_FOR_nothing;
561 rld[s_reload].secondary_p = 1;
565 #ifdef SECONDARY_MEMORY_NEEDED
566 if (! in_p && icode == CODE_FOR_nothing
567 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
568 get_secondary_mem (x, mode, opnum, type);
575 #endif /* HAVE_SECONDARY_RELOADS */
577 #ifdef SECONDARY_MEMORY_NEEDED
579 /* Return a memory location that will be used to copy X in mode MODE.
580 If we haven't already made a location for this mode in this insn,
581 call find_reloads_address on the location being returned. */
584 get_secondary_mem (x, mode, opnum, type)
585 rtx x ATTRIBUTE_UNUSED;
586 enum machine_mode mode;
588 enum reload_type type;
593 /* By default, if MODE is narrower than a word, widen it to a word.
594 This is required because most machines that require these memory
595 locations do not support short load and stores from all registers
596 (e.g., FP registers). */
598 #ifdef SECONDARY_MEMORY_NEEDED_MODE
599 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
601 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
602 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
605 /* If we already have made a MEM for this operand in MODE, return it. */
606 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
607 return secondary_memlocs_elim[(int) mode][opnum];
609 /* If this is the first time we've tried to get a MEM for this mode,
610 allocate a new one. `something_changed' in reload will get set
611 by noticing that the frame size has changed. */
613 if (secondary_memlocs[(int) mode] == 0)
615 #ifdef SECONDARY_MEMORY_NEEDED_RTX
616 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
618 secondary_memlocs[(int) mode]
619 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
623 /* Get a version of the address doing any eliminations needed. If that
624 didn't give us a new MEM, make a new one if it isn't valid. */
626 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
627 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
629 if (! mem_valid && loc == secondary_memlocs[(int) mode])
630 loc = copy_rtx (loc);
632 /* The only time the call below will do anything is if the stack
633 offset is too large. In that case IND_LEVELS doesn't matter, so we
634 can just pass a zero. Adjust the type to be the address of the
635 corresponding object. If the address was valid, save the eliminated
636 address. If it wasn't valid, we need to make a reload each time, so
641 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
642 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
645 find_reloads_address (mode, (rtx*) 0, XEXP (loc, 0), &XEXP (loc, 0),
649 secondary_memlocs_elim[(int) mode][opnum] = loc;
653 /* Clear any secondary memory locations we've made. */
656 clear_secondary_mem ()
658 memset ((char *) secondary_memlocs, 0, sizeof secondary_memlocs);
660 #endif /* SECONDARY_MEMORY_NEEDED */
662 /* Find the largest class for which every register number plus N is valid in
663 M1 (if in range). Abort if no such class exists. */
665 static enum reg_class
666 find_valid_class (m1, n)
667 enum machine_mode m1 ATTRIBUTE_UNUSED;
672 enum reg_class best_class = NO_REGS;
673 unsigned int best_size = 0;
675 for (class = 1; class < N_REG_CLASSES; class++)
678 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
679 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
680 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
681 && ! HARD_REGNO_MODE_OK (regno + n, m1))
684 if (! bad && reg_class_size[class] > best_size)
685 best_class = class, best_size = reg_class_size[class];
694 /* Return the number of a previously made reload that can be combined with
695 a new one, or n_reloads if none of the existing reloads can be used.
696 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
697 push_reload, they determine the kind of the new reload that we try to
698 combine. P_IN points to the corresponding value of IN, which can be
699 modified by this function.
700 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
703 find_reusable_reload (p_in, out, class, type, opnum, dont_share)
705 enum reg_class class;
706 enum reload_type type;
707 int opnum, dont_share;
711 /* We can't merge two reloads if the output of either one is
714 if (earlyclobber_operand_p (out))
717 /* We can use an existing reload if the class is right
718 and at least one of IN and OUT is a match
719 and the other is at worst neutral.
720 (A zero compared against anything is neutral.)
722 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
723 for the same thing since that can cause us to need more reload registers
724 than we otherwise would. */
726 for (i = 0; i < n_reloads; i++)
727 if ((reg_class_subset_p (class, rld[i].class)
728 || reg_class_subset_p (rld[i].class, class))
729 /* If the existing reload has a register, it must fit our class. */
730 && (rld[i].reg_rtx == 0
731 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
732 true_regnum (rld[i].reg_rtx)))
733 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
734 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
735 || (out != 0 && MATCHES (rld[i].out, out)
736 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
737 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
738 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
739 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
742 /* Reloading a plain reg for input can match a reload to postincrement
743 that reg, since the postincrement's value is the right value.
744 Likewise, it can match a preincrement reload, since we regard
745 the preincrementation as happening before any ref in this insn
747 for (i = 0; i < n_reloads; i++)
748 if ((reg_class_subset_p (class, rld[i].class)
749 || reg_class_subset_p (rld[i].class, class))
750 /* If the existing reload has a register, it must fit our
752 && (rld[i].reg_rtx == 0
753 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
754 true_regnum (rld[i].reg_rtx)))
755 && out == 0 && rld[i].out == 0 && rld[i].in != 0
756 && ((GET_CODE (in) == REG
757 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == 'a'
758 && MATCHES (XEXP (rld[i].in, 0), in))
759 || (GET_CODE (rld[i].in) == REG
760 && GET_RTX_CLASS (GET_CODE (in)) == 'a'
761 && MATCHES (XEXP (in, 0), rld[i].in)))
762 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
763 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
764 && MERGABLE_RELOADS (type, rld[i].when_needed,
765 opnum, rld[i].opnum))
767 /* Make sure reload_in ultimately has the increment,
768 not the plain register. */
769 if (GET_CODE (in) == REG)
776 /* Return nonzero if X is a SUBREG which will require reloading of its
777 SUBREG_REG expression. */
780 reload_inner_reg_of_subreg (x, mode)
782 enum machine_mode mode;
786 /* Only SUBREGs are problematical. */
787 if (GET_CODE (x) != SUBREG)
790 inner = SUBREG_REG (x);
792 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
793 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
796 /* If INNER is not a hard register, then INNER will not need to
798 if (GET_CODE (inner) != REG
799 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
802 /* If INNER is not ok for MODE, then INNER will need reloading. */
803 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
806 /* If the outer part is a word or smaller, INNER larger than a
807 word and the number of regs for INNER is not the same as the
808 number of words in INNER, then INNER will need reloading. */
809 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
810 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
811 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
812 != HARD_REGNO_NREGS (REGNO (inner), GET_MODE (inner))));
815 /* Record one reload that needs to be performed.
816 IN is an rtx saying where the data are to be found before this instruction.
817 OUT says where they must be stored after the instruction.
818 (IN is zero for data not read, and OUT is zero for data not written.)
819 INLOC and OUTLOC point to the places in the instructions where
820 IN and OUT were found.
821 If IN and OUT are both non-zero, it means the same register must be used
822 to reload both IN and OUT.
824 CLASS is a register class required for the reloaded data.
825 INMODE is the machine mode that the instruction requires
826 for the reg that replaces IN and OUTMODE is likewise for OUT.
828 If IN is zero, then OUT's location and mode should be passed as
831 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
833 OPTIONAL nonzero means this reload does not need to be performed:
834 it can be discarded if that is more convenient.
836 OPNUM and TYPE say what the purpose of this reload is.
838 The return value is the reload-number for this reload.
840 If both IN and OUT are nonzero, in some rare cases we might
841 want to make two separate reloads. (Actually we never do this now.)
842 Therefore, the reload-number for OUT is stored in
843 output_reloadnum when we return; the return value applies to IN.
844 Usually (presently always), when IN and OUT are nonzero,
845 the two reload-numbers are equal, but the caller should be careful to
849 push_reload (in, out, inloc, outloc, class,
850 inmode, outmode, strict_low, optional, opnum, type)
853 enum reg_class class;
854 enum machine_mode inmode, outmode;
858 enum reload_type type;
862 int dont_remove_subreg = 0;
863 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
864 int secondary_in_reload = -1, secondary_out_reload = -1;
865 enum insn_code secondary_in_icode = CODE_FOR_nothing;
866 enum insn_code secondary_out_icode = CODE_FOR_nothing;
868 /* INMODE and/or OUTMODE could be VOIDmode if no mode
869 has been specified for the operand. In that case,
870 use the operand's mode as the mode to reload. */
871 if (inmode == VOIDmode && in != 0)
872 inmode = GET_MODE (in);
873 if (outmode == VOIDmode && out != 0)
874 outmode = GET_MODE (out);
876 /* If IN is a pseudo register everywhere-equivalent to a constant, and
877 it is not in a hard register, reload straight from the constant,
878 since we want to get rid of such pseudo registers.
879 Often this is done earlier, but not always in find_reloads_address. */
880 if (in != 0 && GET_CODE (in) == REG)
882 int regno = REGNO (in);
884 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
885 && reg_equiv_constant[regno] != 0)
886 in = reg_equiv_constant[regno];
889 /* Likewise for OUT. Of course, OUT will never be equivalent to
890 an actual constant, but it might be equivalent to a memory location
891 (in the case of a parameter). */
892 if (out != 0 && GET_CODE (out) == REG)
894 int regno = REGNO (out);
896 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
897 && reg_equiv_constant[regno] != 0)
898 out = reg_equiv_constant[regno];
901 /* If we have a read-write operand with an address side-effect,
902 change either IN or OUT so the side-effect happens only once. */
903 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
904 switch (GET_CODE (XEXP (in, 0)))
906 case POST_INC: case POST_DEC: case POST_MODIFY:
907 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
910 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
911 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
918 /* If we are reloading a (SUBREG constant ...), really reload just the
919 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
920 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
921 a pseudo and hence will become a MEM) with M1 wider than M2 and the
922 register is a pseudo, also reload the inside expression.
923 For machines that extend byte loads, do this for any SUBREG of a pseudo
924 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
925 M2 is an integral mode that gets extended when loaded.
926 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
927 either M1 is not valid for R or M2 is wider than a word but we only
928 need one word to store an M2-sized quantity in R.
929 (However, if OUT is nonzero, we need to reload the reg *and*
930 the subreg, so do nothing here, and let following statement handle it.)
932 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
933 we can't handle it here because CONST_INT does not indicate a mode.
935 Similarly, we must reload the inside expression if we have a
936 STRICT_LOW_PART (presumably, in == out in the cas).
938 Also reload the inner expression if it does not require a secondary
939 reload but the SUBREG does.
941 Finally, reload the inner expression if it is a register that is in
942 the class whose registers cannot be referenced in a different size
943 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
944 cannot reload just the inside since we might end up with the wrong
945 register class. But if it is inside a STRICT_LOW_PART, we have
946 no choice, so we hope we do get the right register class there. */
948 if (in != 0 && GET_CODE (in) == SUBREG
949 && (subreg_lowpart_p (in) || strict_low)
950 #ifdef CLASS_CANNOT_CHANGE_MODE
951 && (class != CLASS_CANNOT_CHANGE_MODE
952 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)), inmode))
954 && (CONSTANT_P (SUBREG_REG (in))
955 || GET_CODE (SUBREG_REG (in)) == PLUS
957 || (((GET_CODE (SUBREG_REG (in)) == REG
958 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
959 || GET_CODE (SUBREG_REG (in)) == MEM)
960 && ((GET_MODE_SIZE (inmode)
961 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
962 #ifdef LOAD_EXTEND_OP
963 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
964 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
966 && (GET_MODE_SIZE (inmode)
967 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
968 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
969 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
971 #ifdef WORD_REGISTER_OPERATIONS
972 || ((GET_MODE_SIZE (inmode)
973 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
974 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
975 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
979 || (GET_CODE (SUBREG_REG (in)) == REG
980 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
981 /* The case where out is nonzero
982 is handled differently in the following statement. */
983 && (out == 0 || subreg_lowpart_p (in))
984 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
985 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
987 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
989 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
990 GET_MODE (SUBREG_REG (in)))))
991 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
992 #ifdef SECONDARY_INPUT_RELOAD_CLASS
993 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
994 && (SECONDARY_INPUT_RELOAD_CLASS (class,
995 GET_MODE (SUBREG_REG (in)),
999 #ifdef CLASS_CANNOT_CHANGE_MODE
1000 || (GET_CODE (SUBREG_REG (in)) == REG
1001 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1002 && (TEST_HARD_REG_BIT
1003 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
1004 REGNO (SUBREG_REG (in))))
1005 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)),
1010 in_subreg_loc = inloc;
1011 inloc = &SUBREG_REG (in);
1013 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1014 if (GET_CODE (in) == MEM)
1015 /* This is supposed to happen only for paradoxical subregs made by
1016 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1017 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
1020 inmode = GET_MODE (in);
1023 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1024 either M1 is not valid for R or M2 is wider than a word but we only
1025 need one word to store an M2-sized quantity in R.
1027 However, we must reload the inner reg *as well as* the subreg in
1030 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1031 code above. This can happen if SUBREG_BYTE != 0. */
1033 if (in != 0 && reload_inner_reg_of_subreg (in, inmode))
1035 enum reg_class in_class = class;
1037 if (GET_CODE (SUBREG_REG (in)) == REG)
1039 = find_valid_class (inmode,
1040 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1041 GET_MODE (SUBREG_REG (in)),
1045 /* This relies on the fact that emit_reload_insns outputs the
1046 instructions for input reloads of type RELOAD_OTHER in the same
1047 order as the reloads. Thus if the outer reload is also of type
1048 RELOAD_OTHER, we are guaranteed that this inner reload will be
1049 output before the outer reload. */
1050 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1051 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1052 dont_remove_subreg = 1;
1055 /* Similarly for paradoxical and problematical SUBREGs on the output.
1056 Note that there is no reason we need worry about the previous value
1057 of SUBREG_REG (out); even if wider than out,
1058 storing in a subreg is entitled to clobber it all
1059 (except in the case of STRICT_LOW_PART,
1060 and in that case the constraint should label it input-output.) */
1061 if (out != 0 && GET_CODE (out) == SUBREG
1062 && (subreg_lowpart_p (out) || strict_low)
1063 #ifdef CLASS_CANNOT_CHANGE_MODE
1064 && (class != CLASS_CANNOT_CHANGE_MODE
1065 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)),
1068 && (CONSTANT_P (SUBREG_REG (out))
1070 || (((GET_CODE (SUBREG_REG (out)) == REG
1071 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1072 || GET_CODE (SUBREG_REG (out)) == MEM)
1073 && ((GET_MODE_SIZE (outmode)
1074 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1075 #ifdef WORD_REGISTER_OPERATIONS
1076 || ((GET_MODE_SIZE (outmode)
1077 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1078 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1079 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1083 || (GET_CODE (SUBREG_REG (out)) == REG
1084 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1085 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1086 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1088 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1090 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1091 GET_MODE (SUBREG_REG (out)))))
1092 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1093 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1094 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1095 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1096 GET_MODE (SUBREG_REG (out)),
1100 #ifdef CLASS_CANNOT_CHANGE_MODE
1101 || (GET_CODE (SUBREG_REG (out)) == REG
1102 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1103 && (TEST_HARD_REG_BIT
1104 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
1105 REGNO (SUBREG_REG (out))))
1106 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)),
1111 out_subreg_loc = outloc;
1112 outloc = &SUBREG_REG (out);
1114 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1115 if (GET_CODE (out) == MEM
1116 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1119 outmode = GET_MODE (out);
1122 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1123 either M1 is not valid for R or M2 is wider than a word but we only
1124 need one word to store an M2-sized quantity in R.
1126 However, we must reload the inner reg *as well as* the subreg in
1127 that case. In this case, the inner reg is an in-out reload. */
1129 if (out != 0 && reload_inner_reg_of_subreg (out, outmode))
1131 /* This relies on the fact that emit_reload_insns outputs the
1132 instructions for output reloads of type RELOAD_OTHER in reverse
1133 order of the reloads. Thus if the outer reload is also of type
1134 RELOAD_OTHER, we are guaranteed that this inner reload will be
1135 output after the outer reload. */
1136 dont_remove_subreg = 1;
1137 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1139 find_valid_class (outmode,
1140 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1141 GET_MODE (SUBREG_REG (out)),
1144 VOIDmode, VOIDmode, 0, 0,
1145 opnum, RELOAD_OTHER);
1148 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1149 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1150 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1151 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1154 /* If IN is a SUBREG of a hard register, make a new REG. This
1155 simplifies some of the cases below. */
1157 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1158 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1159 && ! dont_remove_subreg)
1160 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1162 /* Similarly for OUT. */
1163 if (out != 0 && GET_CODE (out) == SUBREG
1164 && GET_CODE (SUBREG_REG (out)) == REG
1165 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1166 && ! dont_remove_subreg)
1167 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1169 /* Narrow down the class of register wanted if that is
1170 desirable on this machine for efficiency. */
1172 class = PREFERRED_RELOAD_CLASS (in, class);
1174 /* Output reloads may need analogous treatment, different in detail. */
1175 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1177 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1180 /* Make sure we use a class that can handle the actual pseudo
1181 inside any subreg. For example, on the 386, QImode regs
1182 can appear within SImode subregs. Although GENERAL_REGS
1183 can handle SImode, QImode needs a smaller class. */
1184 #ifdef LIMIT_RELOAD_CLASS
1186 class = LIMIT_RELOAD_CLASS (inmode, class);
1187 else if (in != 0 && GET_CODE (in) == SUBREG)
1188 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1191 class = LIMIT_RELOAD_CLASS (outmode, class);
1192 if (out != 0 && GET_CODE (out) == SUBREG)
1193 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1196 /* Verify that this class is at least possible for the mode that
1198 if (this_insn_is_asm)
1200 enum machine_mode mode;
1201 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1205 if (mode == VOIDmode)
1207 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1212 outmode = word_mode;
1214 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1215 if (HARD_REGNO_MODE_OK (i, mode)
1216 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1218 int nregs = HARD_REGNO_NREGS (i, mode);
1221 for (j = 1; j < nregs; j++)
1222 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1227 if (i == FIRST_PSEUDO_REGISTER)
1229 error_for_asm (this_insn, "impossible register constraint in `asm'");
1234 /* Optional output reloads are always OK even if we have no register class,
1235 since the function of these reloads is only to have spill_reg_store etc.
1236 set, so that the storing insn can be deleted later. */
1237 if (class == NO_REGS
1238 && (optional == 0 || type != RELOAD_FOR_OUTPUT))
1241 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1245 /* See if we need a secondary reload register to move between CLASS
1246 and IN or CLASS and OUT. Get the icode and push any required reloads
1247 needed for each of them if so. */
1249 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1252 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1253 &secondary_in_icode);
1256 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1257 if (out != 0 && GET_CODE (out) != SCRATCH)
1258 secondary_out_reload
1259 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1260 type, &secondary_out_icode);
1263 /* We found no existing reload suitable for re-use.
1264 So add an additional reload. */
1266 #ifdef SECONDARY_MEMORY_NEEDED
1267 /* If a memory location is needed for the copy, make one. */
1268 if (in != 0 && GET_CODE (in) == REG
1269 && REGNO (in) < FIRST_PSEUDO_REGISTER
1270 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1272 get_secondary_mem (in, inmode, opnum, type);
1278 rld[i].class = class;
1279 rld[i].inmode = inmode;
1280 rld[i].outmode = outmode;
1282 rld[i].optional = optional;
1284 rld[i].nocombine = 0;
1285 rld[i].in_reg = inloc ? *inloc : 0;
1286 rld[i].out_reg = outloc ? *outloc : 0;
1287 rld[i].opnum = opnum;
1288 rld[i].when_needed = type;
1289 rld[i].secondary_in_reload = secondary_in_reload;
1290 rld[i].secondary_out_reload = secondary_out_reload;
1291 rld[i].secondary_in_icode = secondary_in_icode;
1292 rld[i].secondary_out_icode = secondary_out_icode;
1293 rld[i].secondary_p = 0;
1297 #ifdef SECONDARY_MEMORY_NEEDED
1298 if (out != 0 && GET_CODE (out) == REG
1299 && REGNO (out) < FIRST_PSEUDO_REGISTER
1300 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1302 get_secondary_mem (out, outmode, opnum, type);
1307 /* We are reusing an existing reload,
1308 but we may have additional information for it.
1309 For example, we may now have both IN and OUT
1310 while the old one may have just one of them. */
1312 /* The modes can be different. If they are, we want to reload in
1313 the larger mode, so that the value is valid for both modes. */
1314 if (inmode != VOIDmode
1315 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1316 rld[i].inmode = inmode;
1317 if (outmode != VOIDmode
1318 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1319 rld[i].outmode = outmode;
1322 rtx in_reg = inloc ? *inloc : 0;
1323 /* If we merge reloads for two distinct rtl expressions that
1324 are identical in content, there might be duplicate address
1325 reloads. Remove the extra set now, so that if we later find
1326 that we can inherit this reload, we can get rid of the
1327 address reloads altogether.
1329 Do not do this if both reloads are optional since the result
1330 would be an optional reload which could potentially leave
1331 unresolved address replacements.
1333 It is not sufficient to call transfer_replacements since
1334 choose_reload_regs will remove the replacements for address
1335 reloads of inherited reloads which results in the same
1337 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1338 && ! (rld[i].optional && optional))
1340 /* We must keep the address reload with the lower operand
1342 if (opnum > rld[i].opnum)
1344 remove_address_replacements (in);
1346 in_reg = rld[i].in_reg;
1349 remove_address_replacements (rld[i].in);
1352 rld[i].in_reg = in_reg;
1357 rld[i].out_reg = outloc ? *outloc : 0;
1359 if (reg_class_subset_p (class, rld[i].class))
1360 rld[i].class = class;
1361 rld[i].optional &= optional;
1362 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1363 opnum, rld[i].opnum))
1364 rld[i].when_needed = RELOAD_OTHER;
1365 rld[i].opnum = MIN (rld[i].opnum, opnum);
1368 /* If the ostensible rtx being reloaded differs from the rtx found
1369 in the location to substitute, this reload is not safe to combine
1370 because we cannot reliably tell whether it appears in the insn. */
1372 if (in != 0 && in != *inloc)
1373 rld[i].nocombine = 1;
1376 /* This was replaced by changes in find_reloads_address_1 and the new
1377 function inc_for_reload, which go with a new meaning of reload_inc. */
1379 /* If this is an IN/OUT reload in an insn that sets the CC,
1380 it must be for an autoincrement. It doesn't work to store
1381 the incremented value after the insn because that would clobber the CC.
1382 So we must do the increment of the value reloaded from,
1383 increment it, store it back, then decrement again. */
1384 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1388 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1389 /* If we did not find a nonzero amount-to-increment-by,
1390 that contradicts the belief that IN is being incremented
1391 in an address in this insn. */
1392 if (rld[i].inc == 0)
1397 /* If we will replace IN and OUT with the reload-reg,
1398 record where they are located so that substitution need
1399 not do a tree walk. */
1401 if (replace_reloads)
1405 struct replacement *r = &replacements[n_replacements++];
1407 r->subreg_loc = in_subreg_loc;
1411 if (outloc != 0 && outloc != inloc)
1413 struct replacement *r = &replacements[n_replacements++];
1416 r->subreg_loc = out_subreg_loc;
1421 /* If this reload is just being introduced and it has both
1422 an incoming quantity and an outgoing quantity that are
1423 supposed to be made to match, see if either one of the two
1424 can serve as the place to reload into.
1426 If one of them is acceptable, set rld[i].reg_rtx
1429 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1431 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1434 earlyclobber_operand_p (out));
1436 /* If the outgoing register already contains the same value
1437 as the incoming one, we can dispense with loading it.
1438 The easiest way to tell the caller that is to give a phony
1439 value for the incoming operand (same as outgoing one). */
1440 if (rld[i].reg_rtx == out
1441 && (GET_CODE (in) == REG || CONSTANT_P (in))
1442 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1443 static_reload_reg_p, i, inmode))
1447 /* If this is an input reload and the operand contains a register that
1448 dies in this insn and is used nowhere else, see if it is the right class
1449 to be used for this reload. Use it if so. (This occurs most commonly
1450 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1451 this if it is also an output reload that mentions the register unless
1452 the output is a SUBREG that clobbers an entire register.
1454 Note that the operand might be one of the spill regs, if it is a
1455 pseudo reg and we are in a block where spilling has not taken place.
1456 But if there is no spilling in this block, that is OK.
1457 An explicitly used hard reg cannot be a spill reg. */
1459 if (rld[i].reg_rtx == 0 && in != 0)
1463 enum machine_mode rel_mode = inmode;
1465 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1468 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1469 if (REG_NOTE_KIND (note) == REG_DEAD
1470 && GET_CODE (XEXP (note, 0)) == REG
1471 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1472 && reg_mentioned_p (XEXP (note, 0), in)
1473 && ! refers_to_regno_for_reload_p (regno,
1475 + HARD_REGNO_NREGS (regno,
1477 PATTERN (this_insn), inloc)
1478 /* If this is also an output reload, IN cannot be used as
1479 the reload register if it is set in this insn unless IN
1481 && (out == 0 || in == out
1482 || ! hard_reg_set_here_p (regno,
1484 + HARD_REGNO_NREGS (regno,
1486 PATTERN (this_insn)))
1487 /* ??? Why is this code so different from the previous?
1488 Is there any simple coherent way to describe the two together?
1489 What's going on here. */
1491 || (GET_CODE (in) == SUBREG
1492 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1494 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1495 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1496 /* Make sure the operand fits in the reg that dies. */
1497 && (GET_MODE_SIZE (rel_mode)
1498 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1499 && HARD_REGNO_MODE_OK (regno, inmode)
1500 && HARD_REGNO_MODE_OK (regno, outmode))
1503 unsigned int nregs = MAX (HARD_REGNO_NREGS (regno, inmode),
1504 HARD_REGNO_NREGS (regno, outmode));
1506 for (offs = 0; offs < nregs; offs++)
1507 if (fixed_regs[regno + offs]
1508 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1514 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1521 output_reloadnum = i;
1526 /* Record an additional place we must replace a value
1527 for which we have already recorded a reload.
1528 RELOADNUM is the value returned by push_reload
1529 when the reload was recorded.
1530 This is used in insn patterns that use match_dup. */
1533 push_replacement (loc, reloadnum, mode)
1536 enum machine_mode mode;
1538 if (replace_reloads)
1540 struct replacement *r = &replacements[n_replacements++];
1541 r->what = reloadnum;
1548 /* Transfer all replacements that used to be in reload FROM to be in
1552 transfer_replacements (to, from)
1557 for (i = 0; i < n_replacements; i++)
1558 if (replacements[i].what == from)
1559 replacements[i].what = to;
1562 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1563 or a subpart of it. If we have any replacements registered for IN_RTX,
1564 cancel the reloads that were supposed to load them.
1565 Return non-zero if we canceled any reloads. */
1567 remove_address_replacements (in_rtx)
1571 char reload_flags[MAX_RELOADS];
1572 int something_changed = 0;
1574 memset (reload_flags, 0, sizeof reload_flags);
1575 for (i = 0, j = 0; i < n_replacements; i++)
1577 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1578 reload_flags[replacements[i].what] |= 1;
1581 replacements[j++] = replacements[i];
1582 reload_flags[replacements[i].what] |= 2;
1585 /* Note that the following store must be done before the recursive calls. */
1588 for (i = n_reloads - 1; i >= 0; i--)
1590 if (reload_flags[i] == 1)
1592 deallocate_reload_reg (i);
1593 remove_address_replacements (rld[i].in);
1595 something_changed = 1;
1598 return something_changed;
1601 /* If there is only one output reload, and it is not for an earlyclobber
1602 operand, try to combine it with a (logically unrelated) input reload
1603 to reduce the number of reload registers needed.
1605 This is safe if the input reload does not appear in
1606 the value being output-reloaded, because this implies
1607 it is not needed any more once the original insn completes.
1609 If that doesn't work, see we can use any of the registers that
1610 die in this insn as a reload register. We can if it is of the right
1611 class and does not appear in the value being output-reloaded. */
1617 int output_reload = -1;
1618 int secondary_out = -1;
1621 /* Find the output reload; return unless there is exactly one
1622 and that one is mandatory. */
1624 for (i = 0; i < n_reloads; i++)
1625 if (rld[i].out != 0)
1627 if (output_reload >= 0)
1632 if (output_reload < 0 || rld[output_reload].optional)
1635 /* An input-output reload isn't combinable. */
1637 if (rld[output_reload].in != 0)
1640 /* If this reload is for an earlyclobber operand, we can't do anything. */
1641 if (earlyclobber_operand_p (rld[output_reload].out))
1644 /* If there is a reload for part of the address of this operand, we would
1645 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1646 its life to the point where doing this combine would not lower the
1647 number of spill registers needed. */
1648 for (i = 0; i < n_reloads; i++)
1649 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1650 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1651 && rld[i].opnum == rld[output_reload].opnum)
1654 /* Check each input reload; can we combine it? */
1656 for (i = 0; i < n_reloads; i++)
1657 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1658 /* Life span of this reload must not extend past main insn. */
1659 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1660 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1661 && rld[i].when_needed != RELOAD_OTHER
1662 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1663 == CLASS_MAX_NREGS (rld[output_reload].class,
1664 rld[output_reload].outmode))
1666 && rld[i].reg_rtx == 0
1667 #ifdef SECONDARY_MEMORY_NEEDED
1668 /* Don't combine two reloads with different secondary
1669 memory locations. */
1670 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1671 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1672 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1673 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1675 && (SMALL_REGISTER_CLASSES
1676 ? (rld[i].class == rld[output_reload].class)
1677 : (reg_class_subset_p (rld[i].class,
1678 rld[output_reload].class)
1679 || reg_class_subset_p (rld[output_reload].class,
1681 && (MATCHES (rld[i].in, rld[output_reload].out)
1682 /* Args reversed because the first arg seems to be
1683 the one that we imagine being modified
1684 while the second is the one that might be affected. */
1685 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1687 /* However, if the input is a register that appears inside
1688 the output, then we also can't share.
1689 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1690 If the same reload reg is used for both reg 69 and the
1691 result to be stored in memory, then that result
1692 will clobber the address of the memory ref. */
1693 && ! (GET_CODE (rld[i].in) == REG
1694 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1695 rld[output_reload].out))))
1696 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode)
1697 && (reg_class_size[(int) rld[i].class]
1698 || SMALL_REGISTER_CLASSES)
1699 /* We will allow making things slightly worse by combining an
1700 input and an output, but no worse than that. */
1701 && (rld[i].when_needed == RELOAD_FOR_INPUT
1702 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1706 /* We have found a reload to combine with! */
1707 rld[i].out = rld[output_reload].out;
1708 rld[i].out_reg = rld[output_reload].out_reg;
1709 rld[i].outmode = rld[output_reload].outmode;
1710 /* Mark the old output reload as inoperative. */
1711 rld[output_reload].out = 0;
1712 /* The combined reload is needed for the entire insn. */
1713 rld[i].when_needed = RELOAD_OTHER;
1714 /* If the output reload had a secondary reload, copy it. */
1715 if (rld[output_reload].secondary_out_reload != -1)
1717 rld[i].secondary_out_reload
1718 = rld[output_reload].secondary_out_reload;
1719 rld[i].secondary_out_icode
1720 = rld[output_reload].secondary_out_icode;
1723 #ifdef SECONDARY_MEMORY_NEEDED
1724 /* Copy any secondary MEM. */
1725 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1726 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1727 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1729 /* If required, minimize the register class. */
1730 if (reg_class_subset_p (rld[output_reload].class,
1732 rld[i].class = rld[output_reload].class;
1734 /* Transfer all replacements from the old reload to the combined. */
1735 for (j = 0; j < n_replacements; j++)
1736 if (replacements[j].what == output_reload)
1737 replacements[j].what = i;
1742 /* If this insn has only one operand that is modified or written (assumed
1743 to be the first), it must be the one corresponding to this reload. It
1744 is safe to use anything that dies in this insn for that output provided
1745 that it does not occur in the output (we already know it isn't an
1746 earlyclobber. If this is an asm insn, give up. */
1748 if (INSN_CODE (this_insn) == -1)
1751 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1752 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1753 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1756 /* See if some hard register that dies in this insn and is not used in
1757 the output is the right class. Only works if the register we pick
1758 up can fully hold our output reload. */
1759 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1760 if (REG_NOTE_KIND (note) == REG_DEAD
1761 && GET_CODE (XEXP (note, 0)) == REG
1762 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1763 rld[output_reload].out)
1764 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1765 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1766 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1767 REGNO (XEXP (note, 0)))
1768 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1769 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1770 /* Ensure that a secondary or tertiary reload for this output
1771 won't want this register. */
1772 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1773 || (! (TEST_HARD_REG_BIT
1774 (reg_class_contents[(int) rld[secondary_out].class],
1775 REGNO (XEXP (note, 0))))
1776 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1777 || ! (TEST_HARD_REG_BIT
1778 (reg_class_contents[(int) rld[secondary_out].class],
1779 REGNO (XEXP (note, 0)))))))
1780 && ! fixed_regs[REGNO (XEXP (note, 0))])
1782 rld[output_reload].reg_rtx
1783 = gen_rtx_REG (rld[output_reload].outmode,
1784 REGNO (XEXP (note, 0)));
1789 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1790 See if one of IN and OUT is a register that may be used;
1791 this is desirable since a spill-register won't be needed.
1792 If so, return the register rtx that proves acceptable.
1794 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1795 CLASS is the register class required for the reload.
1797 If FOR_REAL is >= 0, it is the number of the reload,
1798 and in some cases when it can be discovered that OUT doesn't need
1799 to be computed, clear out rld[FOR_REAL].out.
1801 If FOR_REAL is -1, this should not be done, because this call
1802 is just to see if a register can be found, not to find and install it.
1804 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1805 puts an additional constraint on being able to use IN for OUT since
1806 IN must not appear elsewhere in the insn (it is assumed that IN itself
1807 is safe from the earlyclobber). */
1810 find_dummy_reload (real_in, real_out, inloc, outloc,
1811 inmode, outmode, class, for_real, earlyclobber)
1812 rtx real_in, real_out;
1813 rtx *inloc, *outloc;
1814 enum machine_mode inmode, outmode;
1815 enum reg_class class;
1825 /* If operands exceed a word, we can't use either of them
1826 unless they have the same size. */
1827 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1828 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1829 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1832 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1833 respectively refers to a hard register. */
1835 /* Find the inside of any subregs. */
1836 while (GET_CODE (out) == SUBREG)
1838 if (GET_CODE (SUBREG_REG (out)) == REG
1839 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1840 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1841 GET_MODE (SUBREG_REG (out)),
1844 out = SUBREG_REG (out);
1846 while (GET_CODE (in) == SUBREG)
1848 if (GET_CODE (SUBREG_REG (in)) == REG
1849 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1850 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1851 GET_MODE (SUBREG_REG (in)),
1854 in = SUBREG_REG (in);
1857 /* Narrow down the reg class, the same way push_reload will;
1858 otherwise we might find a dummy now, but push_reload won't. */
1859 class = PREFERRED_RELOAD_CLASS (in, class);
1861 /* See if OUT will do. */
1862 if (GET_CODE (out) == REG
1863 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1865 unsigned int regno = REGNO (out) + out_offset;
1866 unsigned int nwords = HARD_REGNO_NREGS (regno, outmode);
1869 /* When we consider whether the insn uses OUT,
1870 ignore references within IN. They don't prevent us
1871 from copying IN into OUT, because those refs would
1872 move into the insn that reloads IN.
1874 However, we only ignore IN in its role as this reload.
1875 If the insn uses IN elsewhere and it contains OUT,
1876 that counts. We can't be sure it's the "same" operand
1877 so it might not go through this reload. */
1879 *inloc = const0_rtx;
1881 if (regno < FIRST_PSEUDO_REGISTER
1882 && HARD_REGNO_MODE_OK (regno, outmode)
1883 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1884 PATTERN (this_insn), outloc))
1888 for (i = 0; i < nwords; i++)
1889 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1895 if (GET_CODE (real_out) == REG)
1898 value = gen_rtx_REG (outmode, regno);
1905 /* Consider using IN if OUT was not acceptable
1906 or if OUT dies in this insn (like the quotient in a divmod insn).
1907 We can't use IN unless it is dies in this insn,
1908 which means we must know accurately which hard regs are live.
1909 Also, the result can't go in IN if IN is used within OUT,
1910 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1911 if (hard_regs_live_known
1912 && GET_CODE (in) == REG
1913 && REGNO (in) < FIRST_PSEUDO_REGISTER
1915 || find_reg_note (this_insn, REG_UNUSED, real_out))
1916 && find_reg_note (this_insn, REG_DEAD, real_in)
1917 && !fixed_regs[REGNO (in)]
1918 && HARD_REGNO_MODE_OK (REGNO (in),
1919 /* The only case where out and real_out might
1920 have different modes is where real_out
1921 is a subreg, and in that case, out
1923 (GET_MODE (out) != VOIDmode
1924 ? GET_MODE (out) : outmode)))
1926 unsigned int regno = REGNO (in) + in_offset;
1927 unsigned int nwords = HARD_REGNO_NREGS (regno, inmode);
1929 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
1930 && ! hard_reg_set_here_p (regno, regno + nwords,
1931 PATTERN (this_insn))
1933 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1934 PATTERN (this_insn), inloc)))
1938 for (i = 0; i < nwords; i++)
1939 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1945 /* If we were going to use OUT as the reload reg
1946 and changed our mind, it means OUT is a dummy that
1947 dies here. So don't bother copying value to it. */
1948 if (for_real >= 0 && value == real_out)
1949 rld[for_real].out = 0;
1950 if (GET_CODE (real_in) == REG)
1953 value = gen_rtx_REG (inmode, regno);
1961 /* This page contains subroutines used mainly for determining
1962 whether the IN or an OUT of a reload can serve as the
1965 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1968 earlyclobber_operand_p (x)
1973 for (i = 0; i < n_earlyclobbers; i++)
1974 if (reload_earlyclobbers[i] == x)
1980 /* Return 1 if expression X alters a hard reg in the range
1981 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1982 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1983 X should be the body of an instruction. */
1986 hard_reg_set_here_p (beg_regno, end_regno, x)
1987 unsigned int beg_regno, end_regno;
1990 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1992 rtx op0 = SET_DEST (x);
1994 while (GET_CODE (op0) == SUBREG)
1995 op0 = SUBREG_REG (op0);
1996 if (GET_CODE (op0) == REG)
1998 unsigned int r = REGNO (op0);
2000 /* See if this reg overlaps range under consideration. */
2002 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
2006 else if (GET_CODE (x) == PARALLEL)
2008 int i = XVECLEN (x, 0) - 1;
2011 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2018 /* Return 1 if ADDR is a valid memory address for mode MODE,
2019 and check that each pseudo reg has the proper kind of
2023 strict_memory_address_p (mode, addr)
2024 enum machine_mode mode ATTRIBUTE_UNUSED;
2027 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2034 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2035 if they are the same hard reg, and has special hacks for
2036 autoincrement and autodecrement.
2037 This is specifically intended for find_reloads to use
2038 in determining whether two operands match.
2039 X is the operand whose number is the lower of the two.
2041 The value is 2 if Y contains a pre-increment that matches
2042 a non-incrementing address in X. */
2044 /* ??? To be completely correct, we should arrange to pass
2045 for X the output operand and for Y the input operand.
2046 For now, we assume that the output operand has the lower number
2047 because that is natural in (SET output (... input ...)). */
2050 operands_match_p (x, y)
2054 RTX_CODE code = GET_CODE (x);
2060 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2061 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2062 && GET_CODE (SUBREG_REG (y)) == REG)))
2068 i = REGNO (SUBREG_REG (x));
2069 if (i >= FIRST_PSEUDO_REGISTER)
2071 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2072 GET_MODE (SUBREG_REG (x)),
2079 if (GET_CODE (y) == SUBREG)
2081 j = REGNO (SUBREG_REG (y));
2082 if (j >= FIRST_PSEUDO_REGISTER)
2084 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2085 GET_MODE (SUBREG_REG (y)),
2092 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2093 multiple hard register group, so that for example (reg:DI 0) and
2094 (reg:SI 1) will be considered the same register. */
2095 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2096 && i < FIRST_PSEUDO_REGISTER)
2097 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
2098 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2099 && j < FIRST_PSEUDO_REGISTER)
2100 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
2104 /* If two operands must match, because they are really a single
2105 operand of an assembler insn, then two postincrements are invalid
2106 because the assembler insn would increment only once.
2107 On the other hand, an postincrement matches ordinary indexing
2108 if the postincrement is the output operand. */
2109 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2110 return operands_match_p (XEXP (x, 0), y);
2111 /* Two preincrements are invalid
2112 because the assembler insn would increment only once.
2113 On the other hand, an preincrement matches ordinary indexing
2114 if the preincrement is the input operand.
2115 In this case, return 2, since some callers need to do special
2116 things when this happens. */
2117 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2118 || GET_CODE (y) == PRE_MODIFY)
2119 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2123 /* Now we have disposed of all the cases
2124 in which different rtx codes can match. */
2125 if (code != GET_CODE (y))
2127 if (code == LABEL_REF)
2128 return XEXP (x, 0) == XEXP (y, 0);
2129 if (code == SYMBOL_REF)
2130 return XSTR (x, 0) == XSTR (y, 0);
2132 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2134 if (GET_MODE (x) != GET_MODE (y))
2137 /* Compare the elements. If any pair of corresponding elements
2138 fail to match, return 0 for the whole things. */
2141 fmt = GET_RTX_FORMAT (code);
2142 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2148 if (XWINT (x, i) != XWINT (y, i))
2153 if (XINT (x, i) != XINT (y, i))
2158 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2161 /* If any subexpression returns 2,
2162 we should return 2 if we are successful. */
2171 if (XVECLEN (x, i) != XVECLEN (y, i))
2173 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2175 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2183 /* It is believed that rtx's at this level will never
2184 contain anything but integers and other rtx's,
2185 except for within LABEL_REFs and SYMBOL_REFs. */
2190 return 1 + success_2;
2193 /* Describe the range of registers or memory referenced by X.
2194 If X is a register, set REG_FLAG and put the first register
2195 number into START and the last plus one into END.
2196 If X is a memory reference, put a base address into BASE
2197 and a range of integer offsets into START and END.
2198 If X is pushing on the stack, we can assume it causes no trouble,
2199 so we set the SAFE field. */
2201 static struct decomposition
2205 struct decomposition val;
2211 if (GET_CODE (x) == MEM)
2213 rtx base = NULL_RTX, offset = 0;
2214 rtx addr = XEXP (x, 0);
2216 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2217 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2219 val.base = XEXP (addr, 0);
2220 val.start = -GET_MODE_SIZE (GET_MODE (x));
2221 val.end = GET_MODE_SIZE (GET_MODE (x));
2222 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2226 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2228 if (GET_CODE (XEXP (addr, 1)) == PLUS
2229 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2230 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2232 val.base = XEXP (addr, 0);
2233 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2234 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2235 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2240 if (GET_CODE (addr) == CONST)
2242 addr = XEXP (addr, 0);
2245 if (GET_CODE (addr) == PLUS)
2247 if (CONSTANT_P (XEXP (addr, 0)))
2249 base = XEXP (addr, 1);
2250 offset = XEXP (addr, 0);
2252 else if (CONSTANT_P (XEXP (addr, 1)))
2254 base = XEXP (addr, 0);
2255 offset = XEXP (addr, 1);
2262 offset = const0_rtx;
2264 if (GET_CODE (offset) == CONST)
2265 offset = XEXP (offset, 0);
2266 if (GET_CODE (offset) == PLUS)
2268 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2270 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2271 offset = XEXP (offset, 0);
2273 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2275 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2276 offset = XEXP (offset, 1);
2280 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2281 offset = const0_rtx;
2284 else if (GET_CODE (offset) != CONST_INT)
2286 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2287 offset = const0_rtx;
2290 if (all_const && GET_CODE (base) == PLUS)
2291 base = gen_rtx_CONST (GET_MODE (base), base);
2293 if (GET_CODE (offset) != CONST_INT)
2296 val.start = INTVAL (offset);
2297 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2301 else if (GET_CODE (x) == REG)
2304 val.start = true_regnum (x);
2307 /* A pseudo with no hard reg. */
2308 val.start = REGNO (x);
2309 val.end = val.start + 1;
2313 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2315 else if (GET_CODE (x) == SUBREG)
2317 if (GET_CODE (SUBREG_REG (x)) != REG)
2318 /* This could be more precise, but it's good enough. */
2319 return decompose (SUBREG_REG (x));
2321 val.start = true_regnum (x);
2323 return decompose (SUBREG_REG (x));
2326 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2328 else if (CONSTANT_P (x)
2329 /* This hasn't been assigned yet, so it can't conflict yet. */
2330 || GET_CODE (x) == SCRATCH)
2337 /* Return 1 if altering Y will not modify the value of X.
2338 Y is also described by YDATA, which should be decompose (Y). */
2341 immune_p (x, y, ydata)
2343 struct decomposition ydata;
2345 struct decomposition xdata;
2348 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2352 if (GET_CODE (y) != MEM)
2354 /* If Y is memory and X is not, Y can't affect X. */
2355 if (GET_CODE (x) != MEM)
2358 xdata = decompose (x);
2360 if (! rtx_equal_p (xdata.base, ydata.base))
2362 /* If bases are distinct symbolic constants, there is no overlap. */
2363 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2365 /* Constants and stack slots never overlap. */
2366 if (CONSTANT_P (xdata.base)
2367 && (ydata.base == frame_pointer_rtx
2368 || ydata.base == hard_frame_pointer_rtx
2369 || ydata.base == stack_pointer_rtx))
2371 if (CONSTANT_P (ydata.base)
2372 && (xdata.base == frame_pointer_rtx
2373 || xdata.base == hard_frame_pointer_rtx
2374 || xdata.base == stack_pointer_rtx))
2376 /* If either base is variable, we don't know anything. */
2380 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2383 /* Similar, but calls decompose. */
2386 safe_from_earlyclobber (op, clobber)
2389 struct decomposition early_data;
2391 early_data = decompose (clobber);
2392 return immune_p (op, clobber, early_data);
2395 /* Main entry point of this file: search the body of INSN
2396 for values that need reloading and record them with push_reload.
2397 REPLACE nonzero means record also where the values occur
2398 so that subst_reloads can be used.
2400 IND_LEVELS says how many levels of indirection are supported by this
2401 machine; a value of zero means that a memory reference is not a valid
2404 LIVE_KNOWN says we have valid information about which hard
2405 regs are live at each point in the program; this is true when
2406 we are called from global_alloc but false when stupid register
2407 allocation has been done.
2409 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2410 which is nonnegative if the reg has been commandeered for reloading into.
2411 It is copied into STATIC_RELOAD_REG_P and referenced from there
2412 by various subroutines.
2414 Return TRUE if some operands need to be changed, because of swapping
2415 commutative operands, reg_equiv_address substitution, or whatever. */
2418 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2420 int replace, ind_levels;
2422 short *reload_reg_p;
2424 int insn_code_number;
2427 /* These start out as the constraints for the insn
2428 and they are chewed up as we consider alternatives. */
2429 char *constraints[MAX_RECOG_OPERANDS];
2430 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2432 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2433 char pref_or_nothing[MAX_RECOG_OPERANDS];
2434 /* Nonzero for a MEM operand whose entire address needs a reload. */
2435 int address_reloaded[MAX_RECOG_OPERANDS];
2436 /* Value of enum reload_type to use for operand. */
2437 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2438 /* Value of enum reload_type to use within address of operand. */
2439 enum reload_type address_type[MAX_RECOG_OPERANDS];
2440 /* Save the usage of each operand. */
2441 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2442 int no_input_reloads = 0, no_output_reloads = 0;
2444 int this_alternative[MAX_RECOG_OPERANDS];
2445 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2446 char this_alternative_win[MAX_RECOG_OPERANDS];
2447 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2448 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2449 int this_alternative_matches[MAX_RECOG_OPERANDS];
2451 int goal_alternative[MAX_RECOG_OPERANDS];
2452 int this_alternative_number;
2453 int goal_alternative_number = 0;
2454 int operand_reloadnum[MAX_RECOG_OPERANDS];
2455 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2456 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2457 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2458 char goal_alternative_win[MAX_RECOG_OPERANDS];
2459 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2460 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2461 int goal_alternative_swapped;
2464 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2465 rtx substed_operand[MAX_RECOG_OPERANDS];
2466 rtx body = PATTERN (insn);
2467 rtx set = single_set (insn);
2468 int goal_earlyclobber = 0, this_earlyclobber;
2469 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2475 n_earlyclobbers = 0;
2476 replace_reloads = replace;
2477 hard_regs_live_known = live_known;
2478 static_reload_reg_p = reload_reg_p;
2480 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2481 neither are insns that SET cc0. Insns that use CC0 are not allowed
2482 to have any input reloads. */
2483 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2484 no_output_reloads = 1;
2487 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2488 no_input_reloads = 1;
2489 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2490 no_output_reloads = 1;
2493 #ifdef SECONDARY_MEMORY_NEEDED
2494 /* The eliminated forms of any secondary memory locations are per-insn, so
2495 clear them out here. */
2497 memset ((char *) secondary_memlocs_elim, 0, sizeof secondary_memlocs_elim);
2500 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2501 is cheap to move between them. If it is not, there may not be an insn
2502 to do the copy, so we may need a reload. */
2503 if (GET_CODE (body) == SET
2504 && GET_CODE (SET_DEST (body)) == REG
2505 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2506 && GET_CODE (SET_SRC (body)) == REG
2507 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2508 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2509 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2510 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2513 extract_insn (insn);
2515 noperands = reload_n_operands = recog_data.n_operands;
2516 n_alternatives = recog_data.n_alternatives;
2518 /* Just return "no reloads" if insn has no operands with constraints. */
2519 if (noperands == 0 || n_alternatives == 0)
2522 insn_code_number = INSN_CODE (insn);
2523 this_insn_is_asm = insn_code_number < 0;
2525 memcpy (operand_mode, recog_data.operand_mode,
2526 noperands * sizeof (enum machine_mode));
2527 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2531 /* If we will need to know, later, whether some pair of operands
2532 are the same, we must compare them now and save the result.
2533 Reloading the base and index registers will clobber them
2534 and afterward they will fail to match. */
2536 for (i = 0; i < noperands; i++)
2541 substed_operand[i] = recog_data.operand[i];
2544 modified[i] = RELOAD_READ;
2546 /* Scan this operand's constraint to see if it is an output operand,
2547 an in-out operand, is commutative, or should match another. */
2552 modified[i] = RELOAD_WRITE;
2554 modified[i] = RELOAD_READ_WRITE;
2557 /* The last operand should not be marked commutative. */
2558 if (i == noperands - 1)
2563 else if (ISDIGIT (c))
2565 c = strtoul (p - 1, &p, 10);
2567 operands_match[c][i]
2568 = operands_match_p (recog_data.operand[c],
2569 recog_data.operand[i]);
2571 /* An operand may not match itself. */
2575 /* If C can be commuted with C+1, and C might need to match I,
2576 then C+1 might also need to match I. */
2577 if (commutative >= 0)
2579 if (c == commutative || c == commutative + 1)
2581 int other = c + (c == commutative ? 1 : -1);
2582 operands_match[other][i]
2583 = operands_match_p (recog_data.operand[other],
2584 recog_data.operand[i]);
2586 if (i == commutative || i == commutative + 1)
2588 int other = i + (i == commutative ? 1 : -1);
2589 operands_match[c][other]
2590 = operands_match_p (recog_data.operand[c],
2591 recog_data.operand[other]);
2593 /* Note that C is supposed to be less than I.
2594 No need to consider altering both C and I because in
2595 that case we would alter one into the other. */
2601 /* Examine each operand that is a memory reference or memory address
2602 and reload parts of the addresses into index registers.
2603 Also here any references to pseudo regs that didn't get hard regs
2604 but are equivalent to constants get replaced in the insn itself
2605 with those constants. Nobody will ever see them again.
2607 Finally, set up the preferred classes of each operand. */
2609 for (i = 0; i < noperands; i++)
2611 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2613 address_reloaded[i] = 0;
2614 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2615 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2618 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2619 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2622 if (*constraints[i] == 0)
2623 /* Ignore things like match_operator operands. */
2625 else if (constraints[i][0] == 'p')
2627 find_reloads_address (VOIDmode, (rtx*) 0,
2628 recog_data.operand[i],
2629 recog_data.operand_loc[i],
2630 i, operand_type[i], ind_levels, insn);
2632 /* If we now have a simple operand where we used to have a
2633 PLUS or MULT, re-recognize and try again. */
2634 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
2635 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2636 && (GET_CODE (recog_data.operand[i]) == MULT
2637 || GET_CODE (recog_data.operand[i]) == PLUS))
2639 INSN_CODE (insn) = -1;
2640 retval = find_reloads (insn, replace, ind_levels, live_known,
2645 recog_data.operand[i] = *recog_data.operand_loc[i];
2646 substed_operand[i] = recog_data.operand[i];
2648 else if (code == MEM)
2651 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2652 recog_data.operand_loc[i],
2653 XEXP (recog_data.operand[i], 0),
2654 &XEXP (recog_data.operand[i], 0),
2655 i, address_type[i], ind_levels, insn);
2656 recog_data.operand[i] = *recog_data.operand_loc[i];
2657 substed_operand[i] = recog_data.operand[i];
2659 else if (code == SUBREG)
2661 rtx reg = SUBREG_REG (recog_data.operand[i]);
2663 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2666 && &SET_DEST (set) == recog_data.operand_loc[i],
2668 &address_reloaded[i]);
2670 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2671 that didn't get a hard register, emit a USE with a REG_EQUAL
2672 note in front so that we might inherit a previous, possibly
2676 && GET_CODE (op) == MEM
2677 && GET_CODE (reg) == REG
2678 && (GET_MODE_SIZE (GET_MODE (reg))
2679 >= GET_MODE_SIZE (GET_MODE (op))))
2680 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2682 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2684 substed_operand[i] = recog_data.operand[i] = op;
2686 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2687 /* We can get a PLUS as an "operand" as a result of register
2688 elimination. See eliminate_regs and gen_reload. We handle
2689 a unary operator by reloading the operand. */
2690 substed_operand[i] = recog_data.operand[i]
2691 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2692 ind_levels, 0, insn,
2693 &address_reloaded[i]);
2694 else if (code == REG)
2696 /* This is equivalent to calling find_reloads_toplev.
2697 The code is duplicated for speed.
2698 When we find a pseudo always equivalent to a constant,
2699 we replace it by the constant. We must be sure, however,
2700 that we don't try to replace it in the insn in which it
2702 int regno = REGNO (recog_data.operand[i]);
2703 if (reg_equiv_constant[regno] != 0
2704 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2706 /* Record the existing mode so that the check if constants are
2707 allowed will work when operand_mode isn't specified. */
2709 if (operand_mode[i] == VOIDmode)
2710 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2712 substed_operand[i] = recog_data.operand[i]
2713 = reg_equiv_constant[regno];
2715 if (reg_equiv_memory_loc[regno] != 0
2716 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2717 /* We need not give a valid is_set_dest argument since the case
2718 of a constant equivalence was checked above. */
2719 substed_operand[i] = recog_data.operand[i]
2720 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2721 ind_levels, 0, insn,
2722 &address_reloaded[i]);
2724 /* If the operand is still a register (we didn't replace it with an
2725 equivalent), get the preferred class to reload it into. */
2726 code = GET_CODE (recog_data.operand[i]);
2728 = ((code == REG && REGNO (recog_data.operand[i])
2729 >= FIRST_PSEUDO_REGISTER)
2730 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2734 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2735 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2738 /* If this is simply a copy from operand 1 to operand 0, merge the
2739 preferred classes for the operands. */
2740 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2741 && recog_data.operand[1] == SET_SRC (set))
2743 preferred_class[0] = preferred_class[1]
2744 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2745 pref_or_nothing[0] |= pref_or_nothing[1];
2746 pref_or_nothing[1] |= pref_or_nothing[0];
2749 /* Now see what we need for pseudo-regs that didn't get hard regs
2750 or got the wrong kind of hard reg. For this, we must consider
2751 all the operands together against the register constraints. */
2753 best = MAX_RECOG_OPERANDS * 2 + 600;
2756 goal_alternative_swapped = 0;
2759 /* The constraints are made of several alternatives.
2760 Each operand's constraint looks like foo,bar,... with commas
2761 separating the alternatives. The first alternatives for all
2762 operands go together, the second alternatives go together, etc.
2764 First loop over alternatives. */
2766 for (this_alternative_number = 0;
2767 this_alternative_number < n_alternatives;
2768 this_alternative_number++)
2770 /* Loop over operands for one constraint alternative. */
2771 /* LOSERS counts those that don't fit this alternative
2772 and would require loading. */
2774 /* BAD is set to 1 if it some operand can't fit this alternative
2775 even after reloading. */
2777 /* REJECT is a count of how undesirable this alternative says it is
2778 if any reloading is required. If the alternative matches exactly
2779 then REJECT is ignored, but otherwise it gets this much
2780 counted against it in addition to the reloading needed. Each
2781 ? counts three times here since we want the disparaging caused by
2782 a bad register class to only count 1/3 as much. */
2785 this_earlyclobber = 0;
2787 for (i = 0; i < noperands; i++)
2789 char *p = constraints[i];
2792 /* 0 => this operand can be reloaded somehow for this alternative. */
2794 /* 0 => this operand can be reloaded if the alternative allows regs. */
2797 rtx operand = recog_data.operand[i];
2799 /* Nonzero means this is a MEM that must be reloaded into a reg
2800 regardless of what the constraint says. */
2801 int force_reload = 0;
2803 /* Nonzero if a constant forced into memory would be OK for this
2806 int earlyclobber = 0;
2808 /* If the predicate accepts a unary operator, it means that
2809 we need to reload the operand, but do not do this for
2810 match_operator and friends. */
2811 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2812 operand = XEXP (operand, 0);
2814 /* If the operand is a SUBREG, extract
2815 the REG or MEM (or maybe even a constant) within.
2816 (Constants can occur as a result of reg_equiv_constant.) */
2818 while (GET_CODE (operand) == SUBREG)
2820 /* Offset only matters when operand is a REG and
2821 it is a hard reg. This is because it is passed
2822 to reg_fits_class_p if it is a REG and all pseudos
2823 return 0 from that function. */
2824 if (GET_CODE (SUBREG_REG (operand)) == REG
2825 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2827 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2828 GET_MODE (SUBREG_REG (operand)),
2829 SUBREG_BYTE (operand),
2830 GET_MODE (operand));
2832 operand = SUBREG_REG (operand);
2833 /* Force reload if this is a constant or PLUS or if there may
2834 be a problem accessing OPERAND in the outer mode. */
2835 if (CONSTANT_P (operand)
2836 || GET_CODE (operand) == PLUS
2837 /* We must force a reload of paradoxical SUBREGs
2838 of a MEM because the alignment of the inner value
2839 may not be enough to do the outer reference. On
2840 big-endian machines, it may also reference outside
2843 On machines that extend byte operations and we have a
2844 SUBREG where both the inner and outer modes are no wider
2845 than a word and the inner mode is narrower, is integral,
2846 and gets extended when loaded from memory, combine.c has
2847 made assumptions about the behavior of the machine in such
2848 register access. If the data is, in fact, in memory we
2849 must always load using the size assumed to be in the
2850 register and let the insn do the different-sized
2853 This is doubly true if WORD_REGISTER_OPERATIONS. In
2854 this case eliminate_regs has left non-paradoxical
2855 subregs for push_reloads to see. Make sure it does
2856 by forcing the reload.
2858 ??? When is it right at this stage to have a subreg
2859 of a mem that is _not_ to be handled specialy? IMO
2860 those should have been reduced to just a mem. */
2861 || ((GET_CODE (operand) == MEM
2862 || (GET_CODE (operand)== REG
2863 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2864 #ifndef WORD_REGISTER_OPERATIONS
2865 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2866 < BIGGEST_ALIGNMENT)
2867 && (GET_MODE_SIZE (operand_mode[i])
2868 > GET_MODE_SIZE (GET_MODE (operand))))
2869 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2870 #ifdef LOAD_EXTEND_OP
2871 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2872 && (GET_MODE_SIZE (GET_MODE (operand))
2874 && (GET_MODE_SIZE (operand_mode[i])
2875 > GET_MODE_SIZE (GET_MODE (operand)))
2876 && INTEGRAL_MODE_P (GET_MODE (operand))
2877 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2882 /* This following hunk of code should no longer be
2883 needed at all with SUBREG_BYTE. If you need this
2884 code back, please explain to me why so I can
2885 fix the real problem. -DaveM */
2887 /* Subreg of a hard reg which can't handle the subreg's mode
2888 or which would handle that mode in the wrong number of
2889 registers for subregging to work. */
2890 || (GET_CODE (operand) == REG
2891 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2892 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2893 && (GET_MODE_SIZE (GET_MODE (operand))
2895 && ((GET_MODE_SIZE (GET_MODE (operand))
2897 != HARD_REGNO_NREGS (REGNO (operand),
2898 GET_MODE (operand))))
2899 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2906 this_alternative[i] = (int) NO_REGS;
2907 this_alternative_win[i] = 0;
2908 this_alternative_match_win[i] = 0;
2909 this_alternative_offmemok[i] = 0;
2910 this_alternative_earlyclobber[i] = 0;
2911 this_alternative_matches[i] = -1;
2913 /* An empty constraint or empty alternative
2914 allows anything which matched the pattern. */
2915 if (*p == 0 || *p == ',')
2918 /* Scan this alternative's specs for this operand;
2919 set WIN if the operand fits any letter in this alternative.
2920 Otherwise, clear BADOP if this operand could
2921 fit some letter after reloads,
2922 or set WINREG if this operand could fit after reloads
2923 provided the constraint allows some registers. */
2925 while (*p && (c = *p++) != ',')
2928 case '=': case '+': case '*':
2932 /* The last operand should not be marked commutative. */
2933 if (i != noperands - 1)
2946 /* Ignore rest of this alternative as far as
2947 reloading is concerned. */
2948 while (*p && *p != ',')
2952 case '0': case '1': case '2': case '3': case '4':
2953 case '5': case '6': case '7': case '8': case '9':
2954 c = strtoul (p - 1, &p, 10);
2956 this_alternative_matches[i] = c;
2957 /* We are supposed to match a previous operand.
2958 If we do, we win if that one did.
2959 If we do not, count both of the operands as losers.
2960 (This is too conservative, since most of the time
2961 only a single reload insn will be needed to make
2962 the two operands win. As a result, this alternative
2963 may be rejected when it is actually desirable.) */
2964 if ((swapped && (c != commutative || i != commutative + 1))
2965 /* If we are matching as if two operands were swapped,
2966 also pretend that operands_match had been computed
2968 But if I is the second of those and C is the first,
2969 don't exchange them, because operands_match is valid
2970 only on one side of its diagonal. */
2972 [(c == commutative || c == commutative + 1)
2973 ? 2 * commutative + 1 - c : c]
2974 [(i == commutative || i == commutative + 1)
2975 ? 2 * commutative + 1 - i : i])
2976 : operands_match[c][i])
2978 /* If we are matching a non-offsettable address where an
2979 offsettable address was expected, then we must reject
2980 this combination, because we can't reload it. */
2981 if (this_alternative_offmemok[c]
2982 && GET_CODE (recog_data.operand[c]) == MEM
2983 && this_alternative[c] == (int) NO_REGS
2984 && ! this_alternative_win[c])
2987 did_match = this_alternative_win[c];
2991 /* Operands don't match. */
2993 /* Retroactively mark the operand we had to match
2994 as a loser, if it wasn't already. */
2995 if (this_alternative_win[c])
2997 this_alternative_win[c] = 0;
2998 if (this_alternative[c] == (int) NO_REGS)
3000 /* But count the pair only once in the total badness of
3001 this alternative, if the pair can be a dummy reload. */
3003 = find_dummy_reload (recog_data.operand[i],
3004 recog_data.operand[c],
3005 recog_data.operand_loc[i],
3006 recog_data.operand_loc[c],
3007 operand_mode[i], operand_mode[c],
3008 this_alternative[c], -1,
3009 this_alternative_earlyclobber[c]);
3014 /* This can be fixed with reloads if the operand
3015 we are supposed to match can be fixed with reloads. */
3017 this_alternative[i] = this_alternative[c];
3019 /* If we have to reload this operand and some previous
3020 operand also had to match the same thing as this
3021 operand, we don't know how to do that. So reject this
3023 if (! did_match || force_reload)
3024 for (j = 0; j < i; j++)
3025 if (this_alternative_matches[j]
3026 == this_alternative_matches[i])
3031 /* All necessary reloads for an address_operand
3032 were handled in find_reloads_address. */
3033 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3040 if (GET_CODE (operand) == MEM
3041 || (GET_CODE (operand) == REG
3042 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3043 && reg_renumber[REGNO (operand)] < 0))
3045 if (CONSTANT_P (operand)
3046 /* force_const_mem does not accept HIGH. */
3047 && GET_CODE (operand) != HIGH)
3053 if (GET_CODE (operand) == MEM
3054 && ! address_reloaded[i]
3055 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3056 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3061 if (GET_CODE (operand) == MEM
3062 && ! address_reloaded[i]
3063 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3064 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3068 /* Memory operand whose address is not offsettable. */
3072 if (GET_CODE (operand) == MEM
3073 && ! (ind_levels ? offsettable_memref_p (operand)
3074 : offsettable_nonstrict_memref_p (operand))
3075 /* Certain mem addresses will become offsettable
3076 after they themselves are reloaded. This is important;
3077 we don't want our own handling of unoffsettables
3078 to override the handling of reg_equiv_address. */
3079 && !(GET_CODE (XEXP (operand, 0)) == REG
3081 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3085 /* Memory operand whose address is offsettable. */
3089 if ((GET_CODE (operand) == MEM
3090 /* If IND_LEVELS, find_reloads_address won't reload a
3091 pseudo that didn't get a hard reg, so we have to
3092 reject that case. */
3093 && ((ind_levels ? offsettable_memref_p (operand)
3094 : offsettable_nonstrict_memref_p (operand))
3095 /* A reloaded address is offsettable because it is now
3096 just a simple register indirect. */
3097 || address_reloaded[i]))
3098 || (GET_CODE (operand) == REG
3099 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3100 && reg_renumber[REGNO (operand)] < 0
3101 /* If reg_equiv_address is nonzero, we will be
3102 loading it into a register; hence it will be
3103 offsettable, but we cannot say that reg_equiv_mem
3104 is offsettable without checking. */
3105 && ((reg_equiv_mem[REGNO (operand)] != 0
3106 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3107 || (reg_equiv_address[REGNO (operand)] != 0))))
3109 /* force_const_mem does not accept HIGH. */
3110 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3111 || GET_CODE (operand) == MEM)
3118 /* Output operand that is stored before the need for the
3119 input operands (and their index registers) is over. */
3120 earlyclobber = 1, this_earlyclobber = 1;
3124 #ifndef REAL_ARITHMETIC
3125 /* Match any floating double constant, but only if
3126 we can examine the bits of it reliably. */
3127 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
3128 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
3129 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
3132 if (GET_CODE (operand) == CONST_DOUBLE)
3137 if (GET_CODE (operand) == CONST_DOUBLE)
3143 if (GET_CODE (operand) == CONST_DOUBLE
3144 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
3149 if (GET_CODE (operand) == CONST_INT
3150 || (GET_CODE (operand) == CONST_DOUBLE
3151 && GET_MODE (operand) == VOIDmode))
3154 if (CONSTANT_P (operand)
3155 #ifdef LEGITIMATE_PIC_OPERAND_P
3156 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3163 if (GET_CODE (operand) == CONST_INT
3164 || (GET_CODE (operand) == CONST_DOUBLE
3165 && GET_MODE (operand) == VOIDmode))
3177 if (GET_CODE (operand) == CONST_INT
3178 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
3188 /* A PLUS is never a valid operand, but reload can make
3189 it from a register when eliminating registers. */
3190 && GET_CODE (operand) != PLUS
3191 /* A SCRATCH is not a valid operand. */
3192 && GET_CODE (operand) != SCRATCH
3193 #ifdef LEGITIMATE_PIC_OPERAND_P
3194 && (! CONSTANT_P (operand)
3196 || LEGITIMATE_PIC_OPERAND_P (operand))
3198 && (GENERAL_REGS == ALL_REGS
3199 || GET_CODE (operand) != REG
3200 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3201 && reg_renumber[REGNO (operand)] < 0)))
3203 /* Drop through into 'r' case. */
3207 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3211 if (REG_CLASS_FROM_LETTER (c) == NO_REGS)
3213 #ifdef EXTRA_CONSTRAINT
3214 if (EXTRA_CONSTRAINT (operand, c))
3221 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3223 if (GET_MODE (operand) == BLKmode)
3226 if (GET_CODE (operand) == REG
3227 && reg_fits_class_p (operand, this_alternative[i],
3228 offset, GET_MODE (recog_data.operand[i])))
3235 /* If this operand could be handled with a reg,
3236 and some reg is allowed, then this operand can be handled. */
3237 if (winreg && this_alternative[i] != (int) NO_REGS)
3240 /* Record which operands fit this alternative. */
3241 this_alternative_earlyclobber[i] = earlyclobber;
3242 if (win && ! force_reload)
3243 this_alternative_win[i] = 1;
3244 else if (did_match && ! force_reload)
3245 this_alternative_match_win[i] = 1;
3248 int const_to_mem = 0;
3250 this_alternative_offmemok[i] = offmemok;
3254 /* Alternative loses if it has no regs for a reg operand. */
3255 if (GET_CODE (operand) == REG
3256 && this_alternative[i] == (int) NO_REGS
3257 && this_alternative_matches[i] < 0)
3260 /* If this is a constant that is reloaded into the desired
3261 class by copying it to memory first, count that as another
3262 reload. This is consistent with other code and is
3263 required to avoid choosing another alternative when
3264 the constant is moved into memory by this function on
3265 an early reload pass. Note that the test here is
3266 precisely the same as in the code below that calls
3268 if (CONSTANT_P (operand)
3269 /* force_const_mem does not accept HIGH. */
3270 && GET_CODE (operand) != HIGH
3271 && ((PREFERRED_RELOAD_CLASS (operand,
3272 (enum reg_class) this_alternative[i])
3274 || no_input_reloads)
3275 && operand_mode[i] != VOIDmode)
3278 if (this_alternative[i] != (int) NO_REGS)
3282 /* If we can't reload this value at all, reject this
3283 alternative. Note that we could also lose due to
3284 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3287 if (! CONSTANT_P (operand)
3288 && (enum reg_class) this_alternative[i] != NO_REGS
3289 && (PREFERRED_RELOAD_CLASS (operand,
3290 (enum reg_class) this_alternative[i])
3294 /* Alternative loses if it requires a type of reload not
3295 permitted for this insn. We can always reload SCRATCH
3296 and objects with a REG_UNUSED note. */
3297 else if (GET_CODE (operand) != SCRATCH
3298 && modified[i] != RELOAD_READ && no_output_reloads
3299 && ! find_reg_note (insn, REG_UNUSED, operand))
3301 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3305 /* We prefer to reload pseudos over reloading other things,
3306 since such reloads may be able to be eliminated later.
3307 If we are reloading a SCRATCH, we won't be generating any
3308 insns, just using a register, so it is also preferred.
3309 So bump REJECT in other cases. Don't do this in the
3310 case where we are forcing a constant into memory and
3311 it will then win since we don't want to have a different
3312 alternative match then. */
3313 if (! (GET_CODE (operand) == REG
3314 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3315 && GET_CODE (operand) != SCRATCH
3316 && ! (const_to_mem && constmemok))
3319 /* Input reloads can be inherited more often than output
3320 reloads can be removed, so penalize output reloads. */
3321 if (operand_type[i] != RELOAD_FOR_INPUT
3322 && GET_CODE (operand) != SCRATCH)
3326 /* If this operand is a pseudo register that didn't get a hard
3327 reg and this alternative accepts some register, see if the
3328 class that we want is a subset of the preferred class for this
3329 register. If not, but it intersects that class, use the
3330 preferred class instead. If it does not intersect the preferred
3331 class, show that usage of this alternative should be discouraged;
3332 it will be discouraged more still if the register is `preferred
3333 or nothing'. We do this because it increases the chance of
3334 reusing our spill register in a later insn and avoiding a pair
3335 of memory stores and loads.
3337 Don't bother with this if this alternative will accept this
3340 Don't do this for a multiword operand, since it is only a
3341 small win and has the risk of requiring more spill registers,
3342 which could cause a large loss.
3344 Don't do this if the preferred class has only one register
3345 because we might otherwise exhaust the class. */
3347 if (! win && ! did_match
3348 && this_alternative[i] != (int) NO_REGS
3349 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3350 && reg_class_size[(int) preferred_class[i]] > 1)
3352 if (! reg_class_subset_p (this_alternative[i],
3353 preferred_class[i]))
3355 /* Since we don't have a way of forming the intersection,
3356 we just do something special if the preferred class
3357 is a subset of the class we have; that's the most
3358 common case anyway. */
3359 if (reg_class_subset_p (preferred_class[i],
3360 this_alternative[i]))
3361 this_alternative[i] = (int) preferred_class[i];
3363 reject += (2 + 2 * pref_or_nothing[i]);
3368 /* Now see if any output operands that are marked "earlyclobber"
3369 in this alternative conflict with any input operands
3370 or any memory addresses. */
3372 for (i = 0; i < noperands; i++)
3373 if (this_alternative_earlyclobber[i]
3374 && (this_alternative_win[i] || this_alternative_match_win[i]))
3376 struct decomposition early_data;
3378 early_data = decompose (recog_data.operand[i]);
3380 if (modified[i] == RELOAD_READ)
3383 if (this_alternative[i] == NO_REGS)
3385 this_alternative_earlyclobber[i] = 0;
3386 if (this_insn_is_asm)
3387 error_for_asm (this_insn,
3388 "`&' constraint used with no register class");
3393 for (j = 0; j < noperands; j++)
3394 /* Is this an input operand or a memory ref? */
3395 if ((GET_CODE (recog_data.operand[j]) == MEM
3396 || modified[j] != RELOAD_WRITE)
3398 /* Ignore things like match_operator operands. */
3399 && *recog_data.constraints[j] != 0
3400 /* Don't count an input operand that is constrained to match
3401 the early clobber operand. */
3402 && ! (this_alternative_matches[j] == i
3403 && rtx_equal_p (recog_data.operand[i],
3404 recog_data.operand[j]))
3405 /* Is it altered by storing the earlyclobber operand? */
3406 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3409 /* If the output is in a single-reg class,
3410 it's costly to reload it, so reload the input instead. */
3411 if (reg_class_size[this_alternative[i]] == 1
3412 && (GET_CODE (recog_data.operand[j]) == REG
3413 || GET_CODE (recog_data.operand[j]) == SUBREG))
3416 this_alternative_win[j] = 0;
3417 this_alternative_match_win[j] = 0;
3422 /* If an earlyclobber operand conflicts with something,
3423 it must be reloaded, so request this and count the cost. */
3427 this_alternative_win[i] = 0;
3428 this_alternative_match_win[j] = 0;
3429 for (j = 0; j < noperands; j++)
3430 if (this_alternative_matches[j] == i
3431 && this_alternative_match_win[j])
3433 this_alternative_win[j] = 0;
3434 this_alternative_match_win[j] = 0;
3440 /* If one alternative accepts all the operands, no reload required,
3441 choose that alternative; don't consider the remaining ones. */
3444 /* Unswap these so that they are never swapped at `finish'. */
3445 if (commutative >= 0)
3447 recog_data.operand[commutative] = substed_operand[commutative];
3448 recog_data.operand[commutative + 1]
3449 = substed_operand[commutative + 1];
3451 for (i = 0; i < noperands; i++)
3453 goal_alternative_win[i] = this_alternative_win[i];
3454 goal_alternative_match_win[i] = this_alternative_match_win[i];
3455 goal_alternative[i] = this_alternative[i];
3456 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3457 goal_alternative_matches[i] = this_alternative_matches[i];
3458 goal_alternative_earlyclobber[i]
3459 = this_alternative_earlyclobber[i];
3461 goal_alternative_number = this_alternative_number;
3462 goal_alternative_swapped = swapped;
3463 goal_earlyclobber = this_earlyclobber;
3467 /* REJECT, set by the ! and ? constraint characters and when a register
3468 would be reloaded into a non-preferred class, discourages the use of
3469 this alternative for a reload goal. REJECT is incremented by six
3470 for each ? and two for each non-preferred class. */
3471 losers = losers * 6 + reject;
3473 /* If this alternative can be made to work by reloading,
3474 and it needs less reloading than the others checked so far,
3475 record it as the chosen goal for reloading. */
3476 if (! bad && best > losers)
3478 for (i = 0; i < noperands; i++)
3480 goal_alternative[i] = this_alternative[i];
3481 goal_alternative_win[i] = this_alternative_win[i];
3482 goal_alternative_match_win[i] = this_alternative_match_win[i];
3483 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3484 goal_alternative_matches[i] = this_alternative_matches[i];
3485 goal_alternative_earlyclobber[i]
3486 = this_alternative_earlyclobber[i];
3488 goal_alternative_swapped = swapped;
3490 goal_alternative_number = this_alternative_number;
3491 goal_earlyclobber = this_earlyclobber;
3495 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3496 then we need to try each alternative twice,
3497 the second time matching those two operands
3498 as if we had exchanged them.
3499 To do this, really exchange them in operands.
3501 If we have just tried the alternatives the second time,
3502 return operands to normal and drop through. */
3504 if (commutative >= 0)
3509 enum reg_class tclass;
3512 recog_data.operand[commutative] = substed_operand[commutative + 1];
3513 recog_data.operand[commutative + 1] = substed_operand[commutative];
3514 /* Swap the duplicates too. */
3515 for (i = 0; i < recog_data.n_dups; i++)
3516 if (recog_data.dup_num[i] == commutative
3517 || recog_data.dup_num[i] == commutative + 1)
3518 *recog_data.dup_loc[i]
3519 = recog_data.operand[(int) recog_data.dup_num[i]];
3521 tclass = preferred_class[commutative];
3522 preferred_class[commutative] = preferred_class[commutative + 1];
3523 preferred_class[commutative + 1] = tclass;
3525 t = pref_or_nothing[commutative];
3526 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3527 pref_or_nothing[commutative + 1] = t;
3529 memcpy (constraints, recog_data.constraints,
3530 noperands * sizeof (char *));
3535 recog_data.operand[commutative] = substed_operand[commutative];
3536 recog_data.operand[commutative + 1]
3537 = substed_operand[commutative + 1];
3538 /* Unswap the duplicates too. */
3539 for (i = 0; i < recog_data.n_dups; i++)
3540 if (recog_data.dup_num[i] == commutative
3541 || recog_data.dup_num[i] == commutative + 1)
3542 *recog_data.dup_loc[i]
3543 = recog_data.operand[(int) recog_data.dup_num[i]];
3547 /* The operands don't meet the constraints.
3548 goal_alternative describes the alternative
3549 that we could reach by reloading the fewest operands.
3550 Reload so as to fit it. */
3552 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3554 /* No alternative works with reloads?? */
3555 if (insn_code_number >= 0)
3556 fatal_insn ("unable to generate reloads for:", insn);
3557 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3558 /* Avoid further trouble with this insn. */
3559 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3564 /* Jump to `finish' from above if all operands are valid already.
3565 In that case, goal_alternative_win is all 1. */
3568 /* Right now, for any pair of operands I and J that are required to match,
3570 goal_alternative_matches[J] is I.
3571 Set up goal_alternative_matched as the inverse function:
3572 goal_alternative_matched[I] = J. */
3574 for (i = 0; i < noperands; i++)
3575 goal_alternative_matched[i] = -1;
3577 for (i = 0; i < noperands; i++)
3578 if (! goal_alternative_win[i]
3579 && goal_alternative_matches[i] >= 0)
3580 goal_alternative_matched[goal_alternative_matches[i]] = i;
3582 for (i = 0; i < noperands; i++)
3583 goal_alternative_win[i] |= goal_alternative_match_win[i];
3585 /* If the best alternative is with operands 1 and 2 swapped,
3586 consider them swapped before reporting the reloads. Update the
3587 operand numbers of any reloads already pushed. */
3589 if (goal_alternative_swapped)
3593 tem = substed_operand[commutative];
3594 substed_operand[commutative] = substed_operand[commutative + 1];
3595 substed_operand[commutative + 1] = tem;
3596 tem = recog_data.operand[commutative];
3597 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3598 recog_data.operand[commutative + 1] = tem;
3599 tem = *recog_data.operand_loc[commutative];
3600 *recog_data.operand_loc[commutative]
3601 = *recog_data.operand_loc[commutative + 1];
3602 *recog_data.operand_loc[commutative + 1] = tem;
3604 for (i = 0; i < n_reloads; i++)
3606 if (rld[i].opnum == commutative)
3607 rld[i].opnum = commutative + 1;
3608 else if (rld[i].opnum == commutative + 1)
3609 rld[i].opnum = commutative;
3613 for (i = 0; i < noperands; i++)
3615 operand_reloadnum[i] = -1;
3617 /* If this is an earlyclobber operand, we need to widen the scope.
3618 The reload must remain valid from the start of the insn being
3619 reloaded until after the operand is stored into its destination.
3620 We approximate this with RELOAD_OTHER even though we know that we
3621 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3623 One special case that is worth checking is when we have an
3624 output that is earlyclobber but isn't used past the insn (typically
3625 a SCRATCH). In this case, we only need have the reload live
3626 through the insn itself, but not for any of our input or output
3628 But we must not accidentally narrow the scope of an existing
3629 RELOAD_OTHER reload - leave these alone.
3631 In any case, anything needed to address this operand can remain
3632 however they were previously categorized. */
3634 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3636 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3637 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3640 /* Any constants that aren't allowed and can't be reloaded
3641 into registers are here changed into memory references. */
3642 for (i = 0; i < noperands; i++)
3643 if (! goal_alternative_win[i]
3644 && CONSTANT_P (recog_data.operand[i])
3645 /* force_const_mem does not accept HIGH. */
3646 && GET_CODE (recog_data.operand[i]) != HIGH
3647 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3648 (enum reg_class) goal_alternative[i])
3650 || no_input_reloads)
3651 && operand_mode[i] != VOIDmode)
3653 substed_operand[i] = recog_data.operand[i]
3654 = find_reloads_toplev (force_const_mem (operand_mode[i],
3655 recog_data.operand[i]),
3656 i, address_type[i], ind_levels, 0, insn,
3658 if (alternative_allows_memconst (recog_data.constraints[i],
3659 goal_alternative_number))
3660 goal_alternative_win[i] = 1;
3663 /* Record the values of the earlyclobber operands for the caller. */
3664 if (goal_earlyclobber)
3665 for (i = 0; i < noperands; i++)
3666 if (goal_alternative_earlyclobber[i])
3667 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3669 /* Now record reloads for all the operands that need them. */
3670 for (i = 0; i < noperands; i++)
3671 if (! goal_alternative_win[i])
3673 /* Operands that match previous ones have already been handled. */
3674 if (goal_alternative_matches[i] >= 0)
3676 /* Handle an operand with a nonoffsettable address
3677 appearing where an offsettable address will do
3678 by reloading the address into a base register.
3680 ??? We can also do this when the operand is a register and
3681 reg_equiv_mem is not offsettable, but this is a bit tricky,
3682 so we don't bother with it. It may not be worth doing. */
3683 else if (goal_alternative_matched[i] == -1
3684 && goal_alternative_offmemok[i]
3685 && GET_CODE (recog_data.operand[i]) == MEM)
3687 operand_reloadnum[i]
3688 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3689 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3690 MODE_BASE_REG_CLASS (VOIDmode),
3691 GET_MODE (XEXP (recog_data.operand[i], 0)),
3692 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3693 rld[operand_reloadnum[i]].inc
3694 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3696 /* If this operand is an output, we will have made any
3697 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3698 now we are treating part of the operand as an input, so
3699 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3701 if (modified[i] == RELOAD_WRITE)
3703 for (j = 0; j < n_reloads; j++)
3705 if (rld[j].opnum == i)
3707 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3708 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3709 else if (rld[j].when_needed
3710 == RELOAD_FOR_OUTADDR_ADDRESS)
3711 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3716 else if (goal_alternative_matched[i] == -1)
3718 operand_reloadnum[i]
3719 = push_reload ((modified[i] != RELOAD_WRITE
3720 ? recog_data.operand[i] : 0),
3721 (modified[i] != RELOAD_READ
3722 ? recog_data.operand[i] : 0),
3723 (modified[i] != RELOAD_WRITE
3724 ? recog_data.operand_loc[i] : 0),
3725 (modified[i] != RELOAD_READ
3726 ? recog_data.operand_loc[i] : 0),
3727 (enum reg_class) goal_alternative[i],
3728 (modified[i] == RELOAD_WRITE
3729 ? VOIDmode : operand_mode[i]),
3730 (modified[i] == RELOAD_READ
3731 ? VOIDmode : operand_mode[i]),
3732 (insn_code_number < 0 ? 0
3733 : insn_data[insn_code_number].operand[i].strict_low),
3734 0, i, operand_type[i]);
3736 /* In a matching pair of operands, one must be input only
3737 and the other must be output only.
3738 Pass the input operand as IN and the other as OUT. */
3739 else if (modified[i] == RELOAD_READ
3740 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3742 operand_reloadnum[i]
3743 = push_reload (recog_data.operand[i],
3744 recog_data.operand[goal_alternative_matched[i]],
3745 recog_data.operand_loc[i],
3746 recog_data.operand_loc[goal_alternative_matched[i]],
3747 (enum reg_class) goal_alternative[i],
3749 operand_mode[goal_alternative_matched[i]],
3750 0, 0, i, RELOAD_OTHER);
3751 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3753 else if (modified[i] == RELOAD_WRITE
3754 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3756 operand_reloadnum[goal_alternative_matched[i]]
3757 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3758 recog_data.operand[i],
3759 recog_data.operand_loc[goal_alternative_matched[i]],
3760 recog_data.operand_loc[i],
3761 (enum reg_class) goal_alternative[i],
3762 operand_mode[goal_alternative_matched[i]],
3764 0, 0, i, RELOAD_OTHER);
3765 operand_reloadnum[i] = output_reloadnum;
3767 else if (insn_code_number >= 0)
3771 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3772 /* Avoid further trouble with this insn. */
3773 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3778 else if (goal_alternative_matched[i] < 0
3779 && goal_alternative_matches[i] < 0
3782 /* For each non-matching operand that's a MEM or a pseudo-register
3783 that didn't get a hard register, make an optional reload.
3784 This may get done even if the insn needs no reloads otherwise. */
3786 rtx operand = recog_data.operand[i];
3788 while (GET_CODE (operand) == SUBREG)
3789 operand = SUBREG_REG (operand);
3790 if ((GET_CODE (operand) == MEM
3791 || (GET_CODE (operand) == REG
3792 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3793 /* If this is only for an output, the optional reload would not
3794 actually cause us to use a register now, just note that
3795 something is stored here. */
3796 && ((enum reg_class) goal_alternative[i] != NO_REGS
3797 || modified[i] == RELOAD_WRITE)
3798 && ! no_input_reloads
3799 /* An optional output reload might allow to delete INSN later.
3800 We mustn't make in-out reloads on insns that are not permitted
3802 If this is an asm, we can't delete it; we must not even call
3803 push_reload for an optional output reload in this case,
3804 because we can't be sure that the constraint allows a register,
3805 and push_reload verifies the constraints for asms. */
3806 && (modified[i] == RELOAD_READ
3807 || (! no_output_reloads && ! this_insn_is_asm)))
3808 operand_reloadnum[i]
3809 = push_reload ((modified[i] != RELOAD_WRITE
3810 ? recog_data.operand[i] : 0),
3811 (modified[i] != RELOAD_READ
3812 ? recog_data.operand[i] : 0),
3813 (modified[i] != RELOAD_WRITE
3814 ? recog_data.operand_loc[i] : 0),
3815 (modified[i] != RELOAD_READ
3816 ? recog_data.operand_loc[i] : 0),
3817 (enum reg_class) goal_alternative[i],
3818 (modified[i] == RELOAD_WRITE
3819 ? VOIDmode : operand_mode[i]),
3820 (modified[i] == RELOAD_READ
3821 ? VOIDmode : operand_mode[i]),
3822 (insn_code_number < 0 ? 0
3823 : insn_data[insn_code_number].operand[i].strict_low),
3824 1, i, operand_type[i]);
3825 /* If a memory reference remains (either as a MEM or a pseudo that
3826 did not get a hard register), yet we can't make an optional
3827 reload, check if this is actually a pseudo register reference;
3828 we then need to emit a USE and/or a CLOBBER so that reload
3829 inheritance will do the right thing. */
3831 && (GET_CODE (operand) == MEM
3832 || (GET_CODE (operand) == REG
3833 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3834 && reg_renumber [REGNO (operand)] < 0)))
3836 operand = *recog_data.operand_loc[i];
3838 while (GET_CODE (operand) == SUBREG)
3839 operand = SUBREG_REG (operand);
3840 if (GET_CODE (operand) == REG)
3842 if (modified[i] != RELOAD_WRITE)
3843 /* We mark the USE with QImode so that we recognize
3844 it as one that can be safely deleted at the end
3846 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
3848 if (modified[i] != RELOAD_READ)
3849 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3853 else if (goal_alternative_matches[i] >= 0
3854 && goal_alternative_win[goal_alternative_matches[i]]
3855 && modified[i] == RELOAD_READ
3856 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3857 && ! no_input_reloads && ! no_output_reloads
3860 /* Similarly, make an optional reload for a pair of matching
3861 objects that are in MEM or a pseudo that didn't get a hard reg. */
3863 rtx operand = recog_data.operand[i];
3865 while (GET_CODE (operand) == SUBREG)
3866 operand = SUBREG_REG (operand);
3867 if ((GET_CODE (operand) == MEM
3868 || (GET_CODE (operand) == REG
3869 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3870 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3872 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3873 = push_reload (recog_data.operand[goal_alternative_matches[i]],
3874 recog_data.operand[i],
3875 recog_data.operand_loc[goal_alternative_matches[i]],
3876 recog_data.operand_loc[i],
3877 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3878 operand_mode[goal_alternative_matches[i]],
3880 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3883 /* Perform whatever substitutions on the operands we are supposed
3884 to make due to commutativity or replacement of registers
3885 with equivalent constants or memory slots. */
3887 for (i = 0; i < noperands; i++)
3889 /* We only do this on the last pass through reload, because it is
3890 possible for some data (like reg_equiv_address) to be changed during
3891 later passes. Moreover, we loose the opportunity to get a useful
3892 reload_{in,out}_reg when we do these replacements. */
3896 rtx substitution = substed_operand[i];
3898 *recog_data.operand_loc[i] = substitution;
3900 /* If we're replacing an operand with a LABEL_REF, we need
3901 to make sure that there's a REG_LABEL note attached to
3902 this instruction. */
3903 if (GET_CODE (insn) != JUMP_INSN
3904 && GET_CODE (substitution) == LABEL_REF
3905 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
3906 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
3907 XEXP (substitution, 0),
3911 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
3914 /* If this insn pattern contains any MATCH_DUP's, make sure that
3915 they will be substituted if the operands they match are substituted.
3916 Also do now any substitutions we already did on the operands.
3918 Don't do this if we aren't making replacements because we might be
3919 propagating things allocated by frame pointer elimination into places
3920 it doesn't expect. */
3922 if (insn_code_number >= 0 && replace)
3923 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
3925 int opno = recog_data.dup_num[i];
3926 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
3927 if (operand_reloadnum[opno] >= 0)
3928 push_replacement (recog_data.dup_loc[i], operand_reloadnum[opno],
3929 insn_data[insn_code_number].operand[opno].mode);
3933 /* This loses because reloading of prior insns can invalidate the equivalence
3934 (or at least find_equiv_reg isn't smart enough to find it any more),
3935 causing this insn to need more reload regs than it needed before.
3936 It may be too late to make the reload regs available.
3937 Now this optimization is done safely in choose_reload_regs. */
3939 /* For each reload of a reg into some other class of reg,
3940 search for an existing equivalent reg (same value now) in the right class.
3941 We can use it as long as we don't need to change its contents. */
3942 for (i = 0; i < n_reloads; i++)
3943 if (rld[i].reg_rtx == 0
3945 && GET_CODE (rld[i].in) == REG
3949 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
3950 static_reload_reg_p, 0, rld[i].inmode);
3951 /* Prevent generation of insn to load the value
3952 because the one we found already has the value. */
3954 rld[i].in = rld[i].reg_rtx;
3958 /* Perhaps an output reload can be combined with another
3959 to reduce needs by one. */
3960 if (!goal_earlyclobber)
3963 /* If we have a pair of reloads for parts of an address, they are reloading
3964 the same object, the operands themselves were not reloaded, and they
3965 are for two operands that are supposed to match, merge the reloads and
3966 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3968 for (i = 0; i < n_reloads; i++)
3972 for (j = i + 1; j < n_reloads; j++)
3973 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
3974 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
3975 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3976 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3977 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
3978 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
3979 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3980 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3981 && rtx_equal_p (rld[i].in, rld[j].in)
3982 && (operand_reloadnum[rld[i].opnum] < 0
3983 || rld[operand_reloadnum[rld[i].opnum]].optional)
3984 && (operand_reloadnum[rld[j].opnum] < 0
3985 || rld[operand_reloadnum[rld[j].opnum]].optional)
3986 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
3987 || (goal_alternative_matches[rld[j].opnum]
3990 for (k = 0; k < n_replacements; k++)
3991 if (replacements[k].what == j)
3992 replacements[k].what = i;
3994 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3995 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3996 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
3998 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4003 /* Scan all the reloads and update their type.
4004 If a reload is for the address of an operand and we didn't reload
4005 that operand, change the type. Similarly, change the operand number
4006 of a reload when two operands match. If a reload is optional, treat it
4007 as though the operand isn't reloaded.
4009 ??? This latter case is somewhat odd because if we do the optional
4010 reload, it means the object is hanging around. Thus we need only
4011 do the address reload if the optional reload was NOT done.
4013 Change secondary reloads to be the address type of their operand, not
4016 If an operand's reload is now RELOAD_OTHER, change any
4017 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4018 RELOAD_FOR_OTHER_ADDRESS. */
4020 for (i = 0; i < n_reloads; i++)
4022 if (rld[i].secondary_p
4023 && rld[i].when_needed == operand_type[rld[i].opnum])
4024 rld[i].when_needed = address_type[rld[i].opnum];
4026 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4027 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4028 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4029 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4030 && (operand_reloadnum[rld[i].opnum] < 0
4031 || rld[operand_reloadnum[rld[i].opnum]].optional))
4033 /* If we have a secondary reload to go along with this reload,
4034 change its type to RELOAD_FOR_OPADDR_ADDR. */
4036 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4037 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4038 && rld[i].secondary_in_reload != -1)
4040 int secondary_in_reload = rld[i].secondary_in_reload;
4042 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4044 /* If there's a tertiary reload we have to change it also. */
4045 if (secondary_in_reload > 0
4046 && rld[secondary_in_reload].secondary_in_reload != -1)
4047 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4048 = RELOAD_FOR_OPADDR_ADDR;
4051 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4052 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4053 && rld[i].secondary_out_reload != -1)
4055 int secondary_out_reload = rld[i].secondary_out_reload;
4057 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4059 /* If there's a tertiary reload we have to change it also. */
4060 if (secondary_out_reload
4061 && rld[secondary_out_reload].secondary_out_reload != -1)
4062 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4063 = RELOAD_FOR_OPADDR_ADDR;
4066 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4067 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4068 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4070 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4073 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4074 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4075 && operand_reloadnum[rld[i].opnum] >= 0
4076 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4078 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4080 if (goal_alternative_matches[rld[i].opnum] >= 0)
4081 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4084 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4085 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4086 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4088 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4089 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4090 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4091 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4092 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4093 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4094 This is complicated by the fact that a single operand can have more
4095 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4096 choose_reload_regs without affecting code quality, and cases that
4097 actually fail are extremely rare, so it turns out to be better to fix
4098 the problem here by not generating cases that choose_reload_regs will
4100 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4101 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4103 We can reduce the register pressure by exploiting that a
4104 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4105 does not conflict with any of them, if it is only used for the first of
4106 the RELOAD_FOR_X_ADDRESS reloads. */
4108 int first_op_addr_num = -2;
4109 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4110 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4111 int need_change = 0;
4112 /* We use last_op_addr_reload and the contents of the above arrays
4113 first as flags - -2 means no instance encountered, -1 means exactly
4114 one instance encountered.
4115 If more than one instance has been encountered, we store the reload
4116 number of the first reload of the kind in question; reload numbers
4117 are known to be non-negative. */
4118 for (i = 0; i < noperands; i++)
4119 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4120 for (i = n_reloads - 1; i >= 0; i--)
4122 switch (rld[i].when_needed)
4124 case RELOAD_FOR_OPERAND_ADDRESS:
4125 if (++first_op_addr_num >= 0)
4127 first_op_addr_num = i;
4131 case RELOAD_FOR_INPUT_ADDRESS:
4132 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4134 first_inpaddr_num[rld[i].opnum] = i;
4138 case RELOAD_FOR_OUTPUT_ADDRESS:
4139 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4141 first_outpaddr_num[rld[i].opnum] = i;
4152 for (i = 0; i < n_reloads; i++)
4155 enum reload_type type;
4157 switch (rld[i].when_needed)
4159 case RELOAD_FOR_OPADDR_ADDR:
4160 first_num = first_op_addr_num;
4161 type = RELOAD_FOR_OPERAND_ADDRESS;
4163 case RELOAD_FOR_INPADDR_ADDRESS:
4164 first_num = first_inpaddr_num[rld[i].opnum];
4165 type = RELOAD_FOR_INPUT_ADDRESS;
4167 case RELOAD_FOR_OUTADDR_ADDRESS:
4168 first_num = first_outpaddr_num[rld[i].opnum];
4169 type = RELOAD_FOR_OUTPUT_ADDRESS;
4176 else if (i > first_num)
4177 rld[i].when_needed = type;
4180 /* Check if the only TYPE reload that uses reload I is
4181 reload FIRST_NUM. */
4182 for (j = n_reloads - 1; j > first_num; j--)
4184 if (rld[j].when_needed == type
4185 && (rld[i].secondary_p
4186 ? rld[j].secondary_in_reload == i
4187 : reg_mentioned_p (rld[i].in, rld[j].in)))
4189 rld[i].when_needed = type;
4198 /* See if we have any reloads that are now allowed to be merged
4199 because we've changed when the reload is needed to
4200 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4201 check for the most common cases. */
4203 for (i = 0; i < n_reloads; i++)
4204 if (rld[i].in != 0 && rld[i].out == 0
4205 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4206 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4207 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4208 for (j = 0; j < n_reloads; j++)
4209 if (i != j && rld[j].in != 0 && rld[j].out == 0
4210 && rld[j].when_needed == rld[i].when_needed
4211 && MATCHES (rld[i].in, rld[j].in)
4212 && rld[i].class == rld[j].class
4213 && !rld[i].nocombine && !rld[j].nocombine
4214 && rld[i].reg_rtx == rld[j].reg_rtx)
4216 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4217 transfer_replacements (i, j);
4222 /* If we made any reloads for addresses, see if they violate a
4223 "no input reloads" requirement for this insn. But loads that we
4224 do after the insn (such as for output addresses) are fine. */
4225 if (no_input_reloads)
4226 for (i = 0; i < n_reloads; i++)
4228 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
4229 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS)
4233 /* Compute reload_mode and reload_nregs. */
4234 for (i = 0; i < n_reloads; i++)
4237 = (rld[i].inmode == VOIDmode
4238 || (GET_MODE_SIZE (rld[i].outmode)
4239 > GET_MODE_SIZE (rld[i].inmode)))
4240 ? rld[i].outmode : rld[i].inmode;
4242 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4245 /* Special case a simple move with an input reload and a
4246 destination of a hard reg, if the hard reg is ok, use it. */
4247 for (i = 0; i < n_reloads; i++)
4248 if (rld[i].when_needed == RELOAD_FOR_INPUT
4249 && GET_CODE (PATTERN (insn)) == SET
4250 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
4251 && SET_SRC (PATTERN (insn)) == rld[i].in)
4253 rtx dest = SET_DEST (PATTERN (insn));
4254 unsigned int regno = REGNO (dest);
4256 if (regno < FIRST_PSEUDO_REGISTER
4257 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
4258 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4259 rld[i].reg_rtx = dest;
4265 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4266 accepts a memory operand with constant address. */
4269 alternative_allows_memconst (constraint, altnum)
4270 const char *constraint;
4274 /* Skip alternatives before the one requested. */
4277 while (*constraint++ != ',');
4280 /* Scan the requested alternative for 'm' or 'o'.
4281 If one of them is present, this alternative accepts memory constants. */
4282 while ((c = *constraint++) && c != ',' && c != '#')
4283 if (c == 'm' || c == 'o')
4288 /* Scan X for memory references and scan the addresses for reloading.
4289 Also checks for references to "constant" regs that we want to eliminate
4290 and replaces them with the values they stand for.
4291 We may alter X destructively if it contains a reference to such.
4292 If X is just a constant reg, we return the equivalent value
4295 IND_LEVELS says how many levels of indirect addressing this machine
4298 OPNUM and TYPE identify the purpose of the reload.
4300 IS_SET_DEST is true if X is the destination of a SET, which is not
4301 appropriate to be replaced by a constant.
4303 INSN, if nonzero, is the insn in which we do the reload. It is used
4304 to determine if we may generate output reloads, and where to put USEs
4305 for pseudos that we have to replace with stack slots.
4307 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4308 result of find_reloads_address. */
4311 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn,
4315 enum reload_type type;
4319 int *address_reloaded;
4321 RTX_CODE code = GET_CODE (x);
4323 const char *fmt = GET_RTX_FORMAT (code);
4329 /* This code is duplicated for speed in find_reloads. */
4330 int regno = REGNO (x);
4331 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4332 x = reg_equiv_constant[regno];
4334 /* This creates (subreg (mem...)) which would cause an unnecessary
4335 reload of the mem. */
4336 else if (reg_equiv_mem[regno] != 0)
4337 x = reg_equiv_mem[regno];
4339 else if (reg_equiv_memory_loc[regno]
4340 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4342 rtx mem = make_memloc (x, regno);
4343 if (reg_equiv_address[regno]
4344 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4346 /* If this is not a toplevel operand, find_reloads doesn't see
4347 this substitution. We have to emit a USE of the pseudo so
4348 that delete_output_reload can see it. */
4349 if (replace_reloads && recog_data.operand[opnum] != x)
4350 /* We mark the USE with QImode so that we recognize it
4351 as one that can be safely deleted at the end of
4353 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4356 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4357 opnum, type, ind_levels, insn);
4358 if (address_reloaded)
4359 *address_reloaded = i;
4368 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4369 opnum, type, ind_levels, insn);
4370 if (address_reloaded)
4371 *address_reloaded = i;
4376 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4378 /* Check for SUBREG containing a REG that's equivalent to a constant.
4379 If the constant has a known value, truncate it right now.
4380 Similarly if we are extracting a single-word of a multi-word
4381 constant. If the constant is symbolic, allow it to be substituted
4382 normally. push_reload will strip the subreg later. If the
4383 constant is VOIDmode, abort because we will lose the mode of
4384 the register (this should never happen because one of the cases
4385 above should handle it). */
4387 int regno = REGNO (SUBREG_REG (x));
4390 if (subreg_lowpart_p (x)
4391 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4392 && reg_equiv_constant[regno] != 0
4393 && (tem = gen_lowpart_common (GET_MODE (x),
4394 reg_equiv_constant[regno])) != 0)
4397 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
4398 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4399 && reg_equiv_constant[regno] != 0
4400 && (tem = operand_subword (reg_equiv_constant[regno],
4401 SUBREG_BYTE (x) / UNITS_PER_WORD, 0,
4402 GET_MODE (SUBREG_REG (x)))) != 0)
4404 /* TEM is now a word sized constant for the bits from X that
4405 we wanted. However, TEM may be the wrong representation.
4407 Use gen_lowpart_common to convert a CONST_INT into a
4408 CONST_DOUBLE and vice versa as needed according to by the mode
4410 tem = gen_lowpart_common (GET_MODE (x), tem);
4416 /* If the SUBREG is wider than a word, the above test will fail.
4417 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4418 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4419 a 32 bit target. We still can - and have to - handle this
4420 for non-paradoxical subregs of CONST_INTs. */
4421 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4422 && reg_equiv_constant[regno] != 0
4423 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT
4424 && (GET_MODE_SIZE (GET_MODE (x))
4425 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
4427 int shift = SUBREG_BYTE (x) * BITS_PER_UNIT;
4428 if (WORDS_BIG_ENDIAN)
4429 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
4430 - GET_MODE_BITSIZE (GET_MODE (x))
4432 /* Here we use the knowledge that CONST_INTs have a
4433 HOST_WIDE_INT field. */
4434 if (shift >= HOST_BITS_PER_WIDE_INT)
4435 shift = HOST_BITS_PER_WIDE_INT - 1;
4436 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift);
4439 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4440 && reg_equiv_constant[regno] != 0
4441 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
4444 /* If the subreg contains a reg that will be converted to a mem,
4445 convert the subreg to a narrower memref now.
4446 Otherwise, we would get (subreg (mem ...) ...),
4447 which would force reload of the mem.
4449 We also need to do this if there is an equivalent MEM that is
4450 not offsettable. In that case, alter_subreg would produce an
4451 invalid address on big-endian machines.
4453 For machines that extend byte loads, we must not reload using
4454 a wider mode if we have a paradoxical SUBREG. find_reloads will
4455 force a reload in that case. So we should not do anything here. */
4457 else if (regno >= FIRST_PSEUDO_REGISTER
4458 #ifdef LOAD_EXTEND_OP
4459 && (GET_MODE_SIZE (GET_MODE (x))
4460 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4462 && (reg_equiv_address[regno] != 0
4463 || (reg_equiv_mem[regno] != 0
4464 && (! strict_memory_address_p (GET_MODE (x),
4465 XEXP (reg_equiv_mem[regno], 0))
4466 || ! offsettable_memref_p (reg_equiv_mem[regno])
4467 || num_not_at_initial_offset))))
4468 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4472 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4476 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4477 ind_levels, is_set_dest, insn,
4479 /* If we have replaced a reg with it's equivalent memory loc -
4480 that can still be handled here e.g. if it's in a paradoxical
4481 subreg - we must make the change in a copy, rather than using
4482 a destructive change. This way, find_reloads can still elect
4483 not to do the change. */
4484 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4486 x = shallow_copy_rtx (x);
4489 XEXP (x, i) = new_part;
4495 /* Return a mem ref for the memory equivalent of reg REGNO.
4496 This mem ref is not shared with anything. */
4499 make_memloc (ad, regno)
4503 /* We must rerun eliminate_regs, in case the elimination
4504 offsets have changed. */
4506 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4508 /* If TEM might contain a pseudo, we must copy it to avoid
4509 modifying it when we do the substitution for the reload. */
4510 if (rtx_varies_p (tem, 0))
4511 tem = copy_rtx (tem);
4513 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4514 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4516 /* Copy the result if it's still the same as the equivalence, to avoid
4517 modifying it when we do the substitution for the reload. */
4518 if (tem == reg_equiv_memory_loc[regno])
4519 tem = copy_rtx (tem);
4523 /* Record all reloads needed for handling memory address AD
4524 which appears in *LOC in a memory reference to mode MODE
4525 which itself is found in location *MEMREFLOC.
4526 Note that we take shortcuts assuming that no multi-reg machine mode
4527 occurs as part of an address.
4529 OPNUM and TYPE specify the purpose of this reload.
4531 IND_LEVELS says how many levels of indirect addressing this machine
4534 INSN, if nonzero, is the insn in which we do the reload. It is used
4535 to determine if we may generate output reloads, and where to put USEs
4536 for pseudos that we have to replace with stack slots.
4538 Value is nonzero if this address is reloaded or replaced as a whole.
4539 This is interesting to the caller if the address is an autoincrement.
4541 Note that there is no verification that the address will be valid after
4542 this routine does its work. Instead, we rely on the fact that the address
4543 was valid when reload started. So we need only undo things that reload
4544 could have broken. These are wrong register types, pseudos not allocated
4545 to a hard register, and frame pointer elimination. */
4548 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn)
4549 enum machine_mode mode;
4554 enum reload_type type;
4559 int removed_and = 0;
4562 /* If the address is a register, see if it is a legitimate address and
4563 reload if not. We first handle the cases where we need not reload
4564 or where we must reload in a non-standard way. */
4566 if (GET_CODE (ad) == REG)
4570 /* If the register is equivalent to an invariant expression, substitute
4571 the invariant, and eliminate any eliminable register references. */
4572 tem = reg_equiv_constant[regno];
4574 && (tem = eliminate_regs (tem, mode, insn))
4575 && strict_memory_address_p (mode, tem))
4581 tem = reg_equiv_memory_loc[regno];
4584 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4586 tem = make_memloc (ad, regno);
4587 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4589 find_reloads_address (GET_MODE (tem), (rtx*) 0, XEXP (tem, 0),
4590 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
4593 /* We can avoid a reload if the register's equivalent memory
4594 expression is valid as an indirect memory address.
4595 But not all addresses are valid in a mem used as an indirect
4596 address: only reg or reg+constant. */
4599 && strict_memory_address_p (mode, tem)
4600 && (GET_CODE (XEXP (tem, 0)) == REG
4601 || (GET_CODE (XEXP (tem, 0)) == PLUS
4602 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4603 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4605 /* TEM is not the same as what we'll be replacing the
4606 pseudo with after reload, put a USE in front of INSN
4607 in the final reload pass. */
4609 && num_not_at_initial_offset
4610 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4613 /* We mark the USE with QImode so that we
4614 recognize it as one that can be safely
4615 deleted at the end of reload. */
4616 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4619 /* This doesn't really count as replacing the address
4620 as a whole, since it is still a memory access. */
4628 /* The only remaining case where we can avoid a reload is if this is a
4629 hard register that is valid as a base register and which is not the
4630 subject of a CLOBBER in this insn. */
4632 else if (regno < FIRST_PSEUDO_REGISTER
4633 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4634 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4637 /* If we do not have one of the cases above, we must do the reload. */
4638 push_reload (ad, NULL_RTX, loc, (rtx*) 0, MODE_BASE_REG_CLASS (mode),
4639 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4643 if (strict_memory_address_p (mode, ad))
4645 /* The address appears valid, so reloads are not needed.
4646 But the address may contain an eliminable register.
4647 This can happen because a machine with indirect addressing
4648 may consider a pseudo register by itself a valid address even when
4649 it has failed to get a hard reg.
4650 So do a tree-walk to find and eliminate all such regs. */
4652 /* But first quickly dispose of a common case. */
4653 if (GET_CODE (ad) == PLUS
4654 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4655 && GET_CODE (XEXP (ad, 0)) == REG
4656 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4659 subst_reg_equivs_changed = 0;
4660 *loc = subst_reg_equivs (ad, insn);
4662 if (! subst_reg_equivs_changed)
4665 /* Check result for validity after substitution. */
4666 if (strict_memory_address_p (mode, ad))
4670 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4675 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4680 *memrefloc = copy_rtx (*memrefloc);
4681 XEXP (*memrefloc, 0) = ad;
4682 move_replacements (&ad, &XEXP (*memrefloc, 0));
4688 /* The address is not valid. We have to figure out why. First see if
4689 we have an outer AND and remove it if so. Then analyze what's inside. */
4691 if (GET_CODE (ad) == AND)
4694 loc = &XEXP (ad, 0);
4698 /* One possibility for why the address is invalid is that it is itself
4699 a MEM. This can happen when the frame pointer is being eliminated, a
4700 pseudo is not allocated to a hard register, and the offset between the
4701 frame and stack pointers is not its initial value. In that case the
4702 pseudo will have been replaced by a MEM referring to the
4704 if (GET_CODE (ad) == MEM)
4706 /* First ensure that the address in this MEM is valid. Then, unless
4707 indirect addresses are valid, reload the MEM into a register. */
4709 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4710 opnum, ADDR_TYPE (type),
4711 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4713 /* If tem was changed, then we must create a new memory reference to
4714 hold it and store it back into memrefloc. */
4715 if (tem != ad && memrefloc)
4717 *memrefloc = copy_rtx (*memrefloc);
4718 copy_replacements (tem, XEXP (*memrefloc, 0));
4719 loc = &XEXP (*memrefloc, 0);
4721 loc = &XEXP (*loc, 0);
4724 /* Check similar cases as for indirect addresses as above except
4725 that we can allow pseudos and a MEM since they should have been
4726 taken care of above. */
4729 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4730 || GET_CODE (XEXP (tem, 0)) == MEM
4731 || ! (GET_CODE (XEXP (tem, 0)) == REG
4732 || (GET_CODE (XEXP (tem, 0)) == PLUS
4733 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4734 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4736 /* Must use TEM here, not AD, since it is the one that will
4737 have any subexpressions reloaded, if needed. */
4738 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
4739 MODE_BASE_REG_CLASS (mode), GET_MODE (tem),
4742 return ! removed_and;
4748 /* If we have address of a stack slot but it's not valid because the
4749 displacement is too large, compute the sum in a register.
4750 Handle all base registers here, not just fp/ap/sp, because on some
4751 targets (namely SH) we can also get too large displacements from
4752 big-endian corrections. */
4753 else if (GET_CODE (ad) == PLUS
4754 && GET_CODE (XEXP (ad, 0)) == REG
4755 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4756 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4757 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4759 /* Unshare the MEM rtx so we can safely alter it. */
4762 *memrefloc = copy_rtx (*memrefloc);
4763 loc = &XEXP (*memrefloc, 0);
4765 loc = &XEXP (*loc, 0);
4768 if (double_reg_address_ok)
4770 /* Unshare the sum as well. */
4771 *loc = ad = copy_rtx (ad);
4773 /* Reload the displacement into an index reg.
4774 We assume the frame pointer or arg pointer is a base reg. */
4775 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4776 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4782 /* If the sum of two regs is not necessarily valid,
4783 reload the sum into a base reg.
4784 That will at least work. */
4785 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4786 Pmode, opnum, type, ind_levels);
4788 return ! removed_and;
4791 /* If we have an indexed stack slot, there are three possible reasons why
4792 it might be invalid: The index might need to be reloaded, the address
4793 might have been made by frame pointer elimination and hence have a
4794 constant out of range, or both reasons might apply.
4796 We can easily check for an index needing reload, but even if that is the
4797 case, we might also have an invalid constant. To avoid making the
4798 conservative assumption and requiring two reloads, we see if this address
4799 is valid when not interpreted strictly. If it is, the only problem is
4800 that the index needs a reload and find_reloads_address_1 will take care
4803 If we decide to do something here, it must be that
4804 `double_reg_address_ok' is true and that this address rtl was made by
4805 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4806 rework the sum so that the reload register will be added to the index.
4807 This is safe because we know the address isn't shared.
4809 We check for fp/ap/sp as both the first and second operand of the
4812 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4813 && GET_CODE (XEXP (ad, 0)) == PLUS
4814 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4815 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4816 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4818 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4819 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4821 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4822 && ! memory_address_p (mode, ad))
4824 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4825 plus_constant (XEXP (XEXP (ad, 0), 0),
4826 INTVAL (XEXP (ad, 1))),
4827 XEXP (XEXP (ad, 0), 1));
4828 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0),
4829 MODE_BASE_REG_CLASS (mode),
4830 GET_MODE (ad), opnum, type, ind_levels);
4831 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4837 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4838 && GET_CODE (XEXP (ad, 0)) == PLUS
4839 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4840 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4841 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4843 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4844 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4846 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4847 && ! memory_address_p (mode, ad))
4849 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4850 XEXP (XEXP (ad, 0), 0),
4851 plus_constant (XEXP (XEXP (ad, 0), 1),
4852 INTVAL (XEXP (ad, 1))));
4853 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4854 MODE_BASE_REG_CLASS (mode),
4855 GET_MODE (ad), opnum, type, ind_levels);
4856 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4862 /* See if address becomes valid when an eliminable register
4863 in a sum is replaced. */
4866 if (GET_CODE (ad) == PLUS)
4867 tem = subst_indexed_address (ad);
4868 if (tem != ad && strict_memory_address_p (mode, tem))
4870 /* Ok, we win that way. Replace any additional eliminable
4873 subst_reg_equivs_changed = 0;
4874 tem = subst_reg_equivs (tem, insn);
4876 /* Make sure that didn't make the address invalid again. */
4878 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4885 /* If constants aren't valid addresses, reload the constant address
4887 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4889 /* If AD is an address in the constant pool, the MEM rtx may be shared.
4890 Unshare it so we can safely alter it. */
4891 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4892 && CONSTANT_POOL_ADDRESS_P (ad))
4894 *memrefloc = copy_rtx (*memrefloc);
4895 loc = &XEXP (*memrefloc, 0);
4897 loc = &XEXP (*loc, 0);
4900 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4901 Pmode, opnum, type, ind_levels);
4902 return ! removed_and;
4905 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
4909 /* Find all pseudo regs appearing in AD
4910 that are eliminable in favor of equivalent values
4911 and do not have hard regs; replace them by their equivalents.
4912 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4913 front of it for pseudos that we have to replace with stack slots. */
4916 subst_reg_equivs (ad, insn)
4920 RTX_CODE code = GET_CODE (ad);
4939 int regno = REGNO (ad);
4941 if (reg_equiv_constant[regno] != 0)
4943 subst_reg_equivs_changed = 1;
4944 return reg_equiv_constant[regno];
4946 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
4948 rtx mem = make_memloc (ad, regno);
4949 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
4951 subst_reg_equivs_changed = 1;
4952 /* We mark the USE with QImode so that we recognize it
4953 as one that can be safely deleted at the end of
4955 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
4964 /* Quickly dispose of a common case. */
4965 if (XEXP (ad, 0) == frame_pointer_rtx
4966 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4974 fmt = GET_RTX_FORMAT (code);
4975 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4977 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
4981 /* Compute the sum of X and Y, making canonicalizations assumed in an
4982 address, namely: sum constant integers, surround the sum of two
4983 constants with a CONST, put the constant as the second operand, and
4984 group the constant on the outermost sum.
4986 This routine assumes both inputs are already in canonical form. */
4993 enum machine_mode mode = GET_MODE (x);
4995 if (mode == VOIDmode)
4996 mode = GET_MODE (y);
4998 if (mode == VOIDmode)
5001 if (GET_CODE (x) == CONST_INT)
5002 return plus_constant (y, INTVAL (x));
5003 else if (GET_CODE (y) == CONST_INT)
5004 return plus_constant (x, INTVAL (y));
5005 else if (CONSTANT_P (x))
5006 tem = x, x = y, y = tem;
5008 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5009 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5011 /* Note that if the operands of Y are specified in the opposite
5012 order in the recursive calls below, infinite recursion will occur. */
5013 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5014 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5016 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5017 constant will have been placed second. */
5018 if (CONSTANT_P (x) && CONSTANT_P (y))
5020 if (GET_CODE (x) == CONST)
5022 if (GET_CODE (y) == CONST)
5025 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5028 return gen_rtx_PLUS (mode, x, y);
5031 /* If ADDR is a sum containing a pseudo register that should be
5032 replaced with a constant (from reg_equiv_constant),
5033 return the result of doing so, and also apply the associative
5034 law so that the result is more likely to be a valid address.
5035 (But it is not guaranteed to be one.)
5037 Note that at most one register is replaced, even if more are
5038 replaceable. Also, we try to put the result into a canonical form
5039 so it is more likely to be a valid address.
5041 In all other cases, return ADDR. */
5044 subst_indexed_address (addr)
5047 rtx op0 = 0, op1 = 0, op2 = 0;
5051 if (GET_CODE (addr) == PLUS)
5053 /* Try to find a register to replace. */
5054 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5055 if (GET_CODE (op0) == REG
5056 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5057 && reg_renumber[regno] < 0
5058 && reg_equiv_constant[regno] != 0)
5059 op0 = reg_equiv_constant[regno];
5060 else if (GET_CODE (op1) == REG
5061 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5062 && reg_renumber[regno] < 0
5063 && reg_equiv_constant[regno] != 0)
5064 op1 = reg_equiv_constant[regno];
5065 else if (GET_CODE (op0) == PLUS
5066 && (tem = subst_indexed_address (op0)) != op0)
5068 else if (GET_CODE (op1) == PLUS
5069 && (tem = subst_indexed_address (op1)) != op1)
5074 /* Pick out up to three things to add. */
5075 if (GET_CODE (op1) == PLUS)
5076 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5077 else if (GET_CODE (op0) == PLUS)
5078 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5080 /* Compute the sum. */
5082 op1 = form_sum (op1, op2);
5084 op0 = form_sum (op0, op1);
5091 /* Update the REG_INC notes for an insn. It updates all REG_INC
5092 notes for the instruction which refer to REGNO the to refer
5093 to the reload number.
5095 INSN is the insn for which any REG_INC notes need updating.
5097 REGNO is the register number which has been reloaded.
5099 RELOADNUM is the reload number. */
5102 update_auto_inc_notes (insn, regno, reloadnum)
5103 rtx insn ATTRIBUTE_UNUSED;
5104 int regno ATTRIBUTE_UNUSED;
5105 int reloadnum ATTRIBUTE_UNUSED;
5110 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5111 if (REG_NOTE_KIND (link) == REG_INC
5112 && REGNO (XEXP (link, 0)) == regno)
5113 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5117 /* Record the pseudo registers we must reload into hard registers in a
5118 subexpression of a would-be memory address, X referring to a value
5119 in mode MODE. (This function is not called if the address we find
5122 CONTEXT = 1 means we are considering regs as index regs,
5123 = 0 means we are considering them as base regs.
5125 OPNUM and TYPE specify the purpose of any reloads made.
5127 IND_LEVELS says how many levels of indirect addressing are
5128 supported at this point in the address.
5130 INSN, if nonzero, is the insn in which we do the reload. It is used
5131 to determine if we may generate output reloads.
5133 We return nonzero if X, as a whole, is reloaded or replaced. */
5135 /* Note that we take shortcuts assuming that no multi-reg machine mode
5136 occurs as part of an address.
5137 Also, this is not fully machine-customizable; it works for machines
5138 such as VAXen and 68000's and 32000's, but other possible machines
5139 could have addressing modes that this does not handle right. */
5142 find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
5143 enum machine_mode mode;
5148 enum reload_type type;
5152 RTX_CODE code = GET_CODE (x);
5158 rtx orig_op0 = XEXP (x, 0);
5159 rtx orig_op1 = XEXP (x, 1);
5160 RTX_CODE code0 = GET_CODE (orig_op0);
5161 RTX_CODE code1 = GET_CODE (orig_op1);
5165 if (GET_CODE (op0) == SUBREG)
5167 op0 = SUBREG_REG (op0);
5168 code0 = GET_CODE (op0);
5169 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5170 op0 = gen_rtx_REG (word_mode,
5172 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5173 GET_MODE (SUBREG_REG (orig_op0)),
5174 SUBREG_BYTE (orig_op0),
5175 GET_MODE (orig_op0))));
5178 if (GET_CODE (op1) == SUBREG)
5180 op1 = SUBREG_REG (op1);
5181 code1 = GET_CODE (op1);
5182 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5183 /* ??? Why is this given op1's mode and above for
5184 ??? op0 SUBREGs we use word_mode? */
5185 op1 = gen_rtx_REG (GET_MODE (op1),
5187 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5188 GET_MODE (SUBREG_REG (orig_op1)),
5189 SUBREG_BYTE (orig_op1),
5190 GET_MODE (orig_op1))));
5193 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5194 || code0 == ZERO_EXTEND || code1 == MEM)
5196 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5197 type, ind_levels, insn);
5198 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5199 type, ind_levels, insn);
5202 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5203 || code1 == ZERO_EXTEND || code0 == MEM)
5205 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5206 type, ind_levels, insn);
5207 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5208 type, ind_levels, insn);
5211 else if (code0 == CONST_INT || code0 == CONST
5212 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5213 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5214 type, ind_levels, insn);
5216 else if (code1 == CONST_INT || code1 == CONST
5217 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5218 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5219 type, ind_levels, insn);
5221 else if (code0 == REG && code1 == REG)
5223 if (REG_OK_FOR_INDEX_P (op0)
5224 && REG_MODE_OK_FOR_BASE_P (op1, mode))
5226 else if (REG_OK_FOR_INDEX_P (op1)
5227 && REG_MODE_OK_FOR_BASE_P (op0, mode))
5229 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5230 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5231 type, ind_levels, insn);
5232 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5233 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5234 type, ind_levels, insn);
5235 else if (REG_OK_FOR_INDEX_P (op1))
5236 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5237 type, ind_levels, insn);
5238 else if (REG_OK_FOR_INDEX_P (op0))
5239 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5240 type, ind_levels, insn);
5243 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5244 type, ind_levels, insn);
5245 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5246 type, ind_levels, insn);
5250 else if (code0 == REG)
5252 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5253 type, ind_levels, insn);
5254 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5255 type, ind_levels, insn);
5258 else if (code1 == REG)
5260 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5261 type, ind_levels, insn);
5262 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5263 type, ind_levels, insn);
5272 rtx op0 = XEXP (x, 0);
5273 rtx op1 = XEXP (x, 1);
5275 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5278 /* Currently, we only support {PRE,POST}_MODIFY constructs
5279 where a base register is {inc,dec}remented by the contents
5280 of another register or by a constant value. Thus, these
5281 operands must match. */
5282 if (op0 != XEXP (op1, 0))
5285 /* Require index register (or constant). Let's just handle the
5286 register case in the meantime... If the target allows
5287 auto-modify by a constant then we could try replacing a pseudo
5288 register with its equivalent constant where applicable. */
5289 if (REG_P (XEXP (op1, 1)))
5290 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5291 find_reloads_address_1 (mode, XEXP (op1, 1), 1, &XEXP (op1, 1),
5292 opnum, type, ind_levels, insn);
5294 if (REG_P (XEXP (op1, 0)))
5296 int regno = REGNO (XEXP (op1, 0));
5299 /* A register that is incremented cannot be constant! */
5300 if (regno >= FIRST_PSEUDO_REGISTER
5301 && reg_equiv_constant[regno] != 0)
5304 /* Handle a register that is equivalent to a memory location
5305 which cannot be addressed directly. */
5306 if (reg_equiv_memory_loc[regno] != 0
5307 && (reg_equiv_address[regno] != 0
5308 || num_not_at_initial_offset))
5310 rtx tem = make_memloc (XEXP (x, 0), regno);
5312 if (reg_equiv_address[regno]
5313 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5315 /* First reload the memory location's address.
5316 We can't use ADDR_TYPE (type) here, because we need to
5317 write back the value after reading it, hence we actually
5318 need two registers. */
5319 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
5320 &XEXP (tem, 0), opnum,
5324 /* Then reload the memory location into a base
5326 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5328 MODE_BASE_REG_CLASS (mode),
5329 GET_MODE (x), GET_MODE (x), 0,
5330 0, opnum, RELOAD_OTHER);
5332 update_auto_inc_notes (this_insn, regno, reloadnum);
5337 if (reg_renumber[regno] >= 0)
5338 regno = reg_renumber[regno];
5340 /* We require a base register here... */
5341 if (!REGNO_MODE_OK_FOR_BASE_P (regno, GET_MODE (x)))
5343 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5344 &XEXP (op1, 0), &XEXP (x, 0),
5345 MODE_BASE_REG_CLASS (mode),
5346 GET_MODE (x), GET_MODE (x), 0, 0,
5347 opnum, RELOAD_OTHER);
5349 update_auto_inc_notes (this_insn, regno, reloadnum);
5362 if (GET_CODE (XEXP (x, 0)) == REG)
5364 int regno = REGNO (XEXP (x, 0));
5368 /* A register that is incremented cannot be constant! */
5369 if (regno >= FIRST_PSEUDO_REGISTER
5370 && reg_equiv_constant[regno] != 0)
5373 /* Handle a register that is equivalent to a memory location
5374 which cannot be addressed directly. */
5375 if (reg_equiv_memory_loc[regno] != 0
5376 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5378 rtx tem = make_memloc (XEXP (x, 0), regno);
5379 if (reg_equiv_address[regno]
5380 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5382 /* First reload the memory location's address.
5383 We can't use ADDR_TYPE (type) here, because we need to
5384 write back the value after reading it, hence we actually
5385 need two registers. */
5386 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5387 &XEXP (tem, 0), opnum, type,
5389 /* Put this inside a new increment-expression. */
5390 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5391 /* Proceed to reload that, as if it contained a register. */
5395 /* If we have a hard register that is ok as an index,
5396 don't make a reload. If an autoincrement of a nice register
5397 isn't "valid", it must be that no autoincrement is "valid".
5398 If that is true and something made an autoincrement anyway,
5399 this must be a special context where one is allowed.
5400 (For example, a "push" instruction.)
5401 We can't improve this address, so leave it alone. */
5403 /* Otherwise, reload the autoincrement into a suitable hard reg
5404 and record how much to increment by. */
5406 if (reg_renumber[regno] >= 0)
5407 regno = reg_renumber[regno];
5408 if ((regno >= FIRST_PSEUDO_REGISTER
5409 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5410 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5414 /* If we can output the register afterwards, do so, this
5415 saves the extra update.
5416 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5417 CALL_INSN - and it does not set CC0.
5418 But don't do this if we cannot directly address the
5419 memory location, since this will make it harder to
5420 reuse address reloads, and increases register pressure.
5421 Also don't do this if we can probably update x directly. */
5422 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM
5424 : reg_equiv_mem[regno]);
5425 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5426 if (insn && GET_CODE (insn) == INSN && equiv
5427 && memory_operand (equiv, GET_MODE (equiv))
5429 && ! sets_cc0_p (PATTERN (insn))
5431 && ! (icode != CODE_FOR_nothing
5432 && ((*insn_data[icode].operand[0].predicate)
5434 && ((*insn_data[icode].operand[1].predicate)
5437 /* We use the original pseudo for loc, so that
5438 emit_reload_insns() knows which pseudo this
5439 reload refers to and updates the pseudo rtx, not
5440 its equivalent memory location, as well as the
5441 corresponding entry in reg_last_reload_reg. */
5442 loc = &XEXP (x_orig, 0);
5445 = push_reload (x, x, loc, loc,
5446 (context ? INDEX_REG_CLASS :
5447 MODE_BASE_REG_CLASS (mode)),
5448 GET_MODE (x), GET_MODE (x), 0, 0,
5449 opnum, RELOAD_OTHER);
5454 = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5455 (context ? INDEX_REG_CLASS :
5456 MODE_BASE_REG_CLASS (mode)),
5457 GET_MODE (x), GET_MODE (x), 0, 0,
5460 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5465 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5471 else if (GET_CODE (XEXP (x, 0)) == MEM)
5473 /* This is probably the result of a substitution, by eliminate_regs,
5474 of an equivalent address for a pseudo that was not allocated to a
5475 hard register. Verify that the specified address is valid and
5476 reload it into a register. */
5477 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5478 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5482 /* Since we know we are going to reload this item, don't decrement
5483 for the indirection level.
5485 Note that this is actually conservative: it would be slightly
5486 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5488 /* We can't use ADDR_TYPE (type) here, because we need to
5489 write back the value after reading it, hence we actually
5490 need two registers. */
5491 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5492 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5493 opnum, type, ind_levels, insn);
5495 reloadnum = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5496 (context ? INDEX_REG_CLASS :
5497 MODE_BASE_REG_CLASS (mode)),
5498 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5500 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5502 link = FIND_REG_INC_NOTE (this_insn, tem);
5504 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5511 /* This is probably the result of a substitution, by eliminate_regs, of
5512 an equivalent address for a pseudo that was not allocated to a hard
5513 register. Verify that the specified address is valid and reload it
5516 Since we know we are going to reload this item, don't decrement for
5517 the indirection level.
5519 Note that this is actually conservative: it would be slightly more
5520 efficient to use the value of SPILL_INDIRECT_LEVELS from
5523 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5524 opnum, ADDR_TYPE (type), ind_levels, insn);
5525 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5526 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5527 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5532 int regno = REGNO (x);
5534 if (reg_equiv_constant[regno] != 0)
5536 find_reloads_address_part (reg_equiv_constant[regno], loc,
5537 (context ? INDEX_REG_CLASS :
5538 MODE_BASE_REG_CLASS (mode)),
5539 GET_MODE (x), opnum, type, ind_levels);
5543 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5544 that feeds this insn. */
5545 if (reg_equiv_mem[regno] != 0)
5547 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
5548 (context ? INDEX_REG_CLASS :
5549 MODE_BASE_REG_CLASS (mode)),
5550 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5555 if (reg_equiv_memory_loc[regno]
5556 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5558 rtx tem = make_memloc (x, regno);
5559 if (reg_equiv_address[regno] != 0
5560 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5563 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5564 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5569 if (reg_renumber[regno] >= 0)
5570 regno = reg_renumber[regno];
5572 if ((regno >= FIRST_PSEUDO_REGISTER
5573 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5574 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5576 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5577 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5578 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5582 /* If a register appearing in an address is the subject of a CLOBBER
5583 in this insn, reload it into some other register to be safe.
5584 The CLOBBER is supposed to make the register unavailable
5585 from before this insn to after it. */
5586 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5588 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5589 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5590 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5597 if (GET_CODE (SUBREG_REG (x)) == REG)
5599 /* If this is a SUBREG of a hard register and the resulting register
5600 is of the wrong class, reload the whole SUBREG. This avoids
5601 needless copies if SUBREG_REG is multi-word. */
5602 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5604 int regno = subreg_regno (x);
5606 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5607 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5609 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5610 (context ? INDEX_REG_CLASS :
5611 MODE_BASE_REG_CLASS (mode)),
5612 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5616 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5617 is larger than the class size, then reload the whole SUBREG. */
5620 enum reg_class class = (context ? INDEX_REG_CLASS
5621 : MODE_BASE_REG_CLASS (mode));
5622 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5623 > reg_class_size[class])
5625 x = find_reloads_subreg_address (x, 0, opnum, type,
5627 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5628 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5640 const char *fmt = GET_RTX_FORMAT (code);
5643 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5646 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5647 opnum, type, ind_levels, insn);
5654 /* X, which is found at *LOC, is a part of an address that needs to be
5655 reloaded into a register of class CLASS. If X is a constant, or if
5656 X is a PLUS that contains a constant, check that the constant is a
5657 legitimate operand and that we are supposed to be able to load
5658 it into the register.
5660 If not, force the constant into memory and reload the MEM instead.
5662 MODE is the mode to use, in case X is an integer constant.
5664 OPNUM and TYPE describe the purpose of any reloads made.
5666 IND_LEVELS says how many levels of indirect addressing this machine
5670 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
5673 enum reg_class class;
5674 enum machine_mode mode;
5676 enum reload_type type;
5680 && (! LEGITIMATE_CONSTANT_P (x)
5681 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5685 tem = x = force_const_mem (mode, x);
5686 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5687 opnum, type, ind_levels, 0);
5690 else if (GET_CODE (x) == PLUS
5691 && CONSTANT_P (XEXP (x, 1))
5692 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5693 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5697 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5698 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5699 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5700 opnum, type, ind_levels, 0);
5703 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5704 mode, VOIDmode, 0, 0, opnum, type);
5707 /* X, a subreg of a pseudo, is a part of an address that needs to be
5710 If the pseudo is equivalent to a memory location that cannot be directly
5711 addressed, make the necessary address reloads.
5713 If address reloads have been necessary, or if the address is changed
5714 by register elimination, return the rtx of the memory location;
5715 otherwise, return X.
5717 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5720 OPNUM and TYPE identify the purpose of the reload.
5722 IND_LEVELS says how many levels of indirect addressing are
5723 supported at this point in the address.
5725 INSN, if nonzero, is the insn in which we do the reload. It is used
5726 to determine where to put USEs for pseudos that we have to replace with
5730 find_reloads_subreg_address (x, force_replace, opnum, type,
5735 enum reload_type type;
5739 int regno = REGNO (SUBREG_REG (x));
5741 if (reg_equiv_memory_loc[regno])
5743 /* If the address is not directly addressable, or if the address is not
5744 offsettable, then it must be replaced. */
5746 && (reg_equiv_address[regno]
5747 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5750 if (force_replace || num_not_at_initial_offset)
5752 rtx tem = make_memloc (SUBREG_REG (x), regno);
5754 /* If the address changes because of register elimination, then
5755 it must be replaced. */
5757 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5759 int offset = SUBREG_BYTE (x);
5760 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
5761 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5763 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5764 PUT_MODE (tem, GET_MODE (x));
5766 /* If this was a paradoxical subreg that we replaced, the
5767 resulting memory must be sufficiently aligned to allow
5768 us to widen the mode of the memory. */
5769 if (outer_size > inner_size && STRICT_ALIGNMENT)
5773 base = XEXP (tem, 0);
5774 if (GET_CODE (base) == PLUS)
5776 if (GET_CODE (XEXP (base, 1)) == CONST_INT
5777 && INTVAL (XEXP (base, 1)) % outer_size != 0)
5779 base = XEXP (base, 0);
5781 if (GET_CODE (base) != REG
5782 || (REGNO_POINTER_ALIGN (REGNO (base))
5783 < outer_size * BITS_PER_UNIT))
5787 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5788 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
5791 /* If this is not a toplevel operand, find_reloads doesn't see
5792 this substitution. We have to emit a USE of the pseudo so
5793 that delete_output_reload can see it. */
5794 if (replace_reloads && recog_data.operand[opnum] != x)
5795 /* We mark the USE with QImode so that we recognize it
5796 as one that can be safely deleted at the end of
5798 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
5808 /* Substitute into the current INSN the registers into which we have reloaded
5809 the things that need reloading. The array `replacements'
5810 contains the locations of all pointers that must be changed
5811 and says what to replace them with.
5813 Return the rtx that X translates into; usually X, but modified. */
5816 subst_reloads (insn)
5821 for (i = 0; i < n_replacements; i++)
5823 struct replacement *r = &replacements[i];
5824 rtx reloadreg = rld[r->what].reg_rtx;
5827 #ifdef ENABLE_CHECKING
5828 /* Internal consistency test. Check that we don't modify
5829 anything in the equivalence arrays. Whenever something from
5830 those arrays needs to be reloaded, it must be unshared before
5831 being substituted into; the equivalence must not be modified.
5832 Otherwise, if the equivalence is used after that, it will
5833 have been modified, and the thing substituted (probably a
5834 register) is likely overwritten and not a usable equivalence. */
5837 for (check_regno = 0; check_regno < max_regno; check_regno++)
5839 #define CHECK_MODF(ARRAY) \
5840 if (ARRAY[check_regno] \
5841 && loc_mentioned_in_p (r->where, \
5842 ARRAY[check_regno])) \
5845 CHECK_MODF (reg_equiv_constant);
5846 CHECK_MODF (reg_equiv_memory_loc);
5847 CHECK_MODF (reg_equiv_address);
5848 CHECK_MODF (reg_equiv_mem);
5851 #endif /* ENABLE_CHECKING */
5853 /* If we're replacing a LABEL_REF with a register, add a
5854 REG_LABEL note to indicate to flow which label this
5855 register refers to. */
5856 if (GET_CODE (*r->where) == LABEL_REF
5857 && GET_CODE (insn) == JUMP_INSN)
5858 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
5859 XEXP (*r->where, 0),
5862 /* Encapsulate RELOADREG so its machine mode matches what
5863 used to be there. Note that gen_lowpart_common will
5864 do the wrong thing if RELOADREG is multi-word. RELOADREG
5865 will always be a REG here. */
5866 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5867 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5869 /* If we are putting this into a SUBREG and RELOADREG is a
5870 SUBREG, we would be making nested SUBREGs, so we have to fix
5871 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5873 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5875 if (GET_MODE (*r->subreg_loc)
5876 == GET_MODE (SUBREG_REG (reloadreg)))
5877 *r->subreg_loc = SUBREG_REG (reloadreg);
5881 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
5883 /* When working with SUBREGs the rule is that the byte
5884 offset must be a multiple of the SUBREG's mode. */
5885 final_offset = (final_offset /
5886 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5887 final_offset = (final_offset *
5888 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5890 *r->where = SUBREG_REG (reloadreg);
5891 SUBREG_BYTE (*r->subreg_loc) = final_offset;
5895 *r->where = reloadreg;
5897 /* If reload got no reg and isn't optional, something's wrong. */
5898 else if (! rld[r->what].optional)
5903 /* Make a copy of any replacements being done into X and move those copies
5904 to locations in Y, a copy of X. We only look at the highest level of
5908 copy_replacements (x, y)
5913 enum rtx_code code = GET_CODE (x);
5914 const char *fmt = GET_RTX_FORMAT (code);
5915 struct replacement *r;
5917 /* We can't support X being a SUBREG because we might then need to know its
5918 location if something inside it was replaced. */
5922 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5924 for (j = 0; j < n_replacements; j++)
5926 if (replacements[j].subreg_loc == &XEXP (x, i))
5928 r = &replacements[n_replacements++];
5929 r->where = replacements[j].where;
5930 r->subreg_loc = &XEXP (y, i);
5931 r->what = replacements[j].what;
5932 r->mode = replacements[j].mode;
5934 else if (replacements[j].where == &XEXP (x, i))
5936 r = &replacements[n_replacements++];
5937 r->where = &XEXP (y, i);
5939 r->what = replacements[j].what;
5940 r->mode = replacements[j].mode;
5945 /* Change any replacements being done to *X to be done to *Y */
5948 move_replacements (x, y)
5954 for (i = 0; i < n_replacements; i++)
5955 if (replacements[i].subreg_loc == x)
5956 replacements[i].subreg_loc = y;
5957 else if (replacements[i].where == x)
5959 replacements[i].where = y;
5960 replacements[i].subreg_loc = 0;
5964 /* If LOC was scheduled to be replaced by something, return the replacement.
5965 Otherwise, return *LOC. */
5968 find_replacement (loc)
5971 struct replacement *r;
5973 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
5975 rtx reloadreg = rld[r->what].reg_rtx;
5977 if (reloadreg && r->where == loc)
5979 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
5980 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5984 else if (reloadreg && r->subreg_loc == loc)
5986 /* RELOADREG must be either a REG or a SUBREG.
5988 ??? Is it actually still ever a SUBREG? If so, why? */
5990 if (GET_CODE (reloadreg) == REG)
5991 return gen_rtx_REG (GET_MODE (*loc),
5992 (REGNO (reloadreg) +
5993 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
5994 GET_MODE (SUBREG_REG (*loc)),
5997 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6001 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6003 /* When working with SUBREGs the rule is that the byte
6004 offset must be a multiple of the SUBREG's mode. */
6005 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6006 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6007 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6013 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6014 what's inside and make a new rtl if so. */
6015 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6016 || GET_CODE (*loc) == MULT)
6018 rtx x = find_replacement (&XEXP (*loc, 0));
6019 rtx y = find_replacement (&XEXP (*loc, 1));
6021 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6022 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6028 /* Return nonzero if register in range [REGNO, ENDREGNO)
6029 appears either explicitly or implicitly in X
6030 other than being stored into (except for earlyclobber operands).
6032 References contained within the substructure at LOC do not count.
6033 LOC may be zero, meaning don't ignore anything.
6035 This is similar to refers_to_regno_p in rtlanal.c except that we
6036 look at equivalences for pseudos that didn't get hard registers. */
6039 refers_to_regno_for_reload_p (regno, endregno, x, loc)
6040 unsigned int regno, endregno;
6053 code = GET_CODE (x);
6060 /* If this is a pseudo, a hard register must not have been allocated.
6061 X must therefore either be a constant or be in memory. */
6062 if (r >= FIRST_PSEUDO_REGISTER)
6064 if (reg_equiv_memory_loc[r])
6065 return refers_to_regno_for_reload_p (regno, endregno,
6066 reg_equiv_memory_loc[r],
6069 if (reg_equiv_constant[r])
6075 return (endregno > r
6076 && regno < r + (r < FIRST_PSEUDO_REGISTER
6077 ? HARD_REGNO_NREGS (r, GET_MODE (x))
6081 /* If this is a SUBREG of a hard reg, we can see exactly which
6082 registers are being modified. Otherwise, handle normally. */
6083 if (GET_CODE (SUBREG_REG (x)) == REG
6084 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6086 unsigned int inner_regno = subreg_regno (x);
6087 unsigned int inner_endregno
6088 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6089 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6091 return endregno > inner_regno && regno < inner_endregno;
6097 if (&SET_DEST (x) != loc
6098 /* Note setting a SUBREG counts as referring to the REG it is in for
6099 a pseudo but not for hard registers since we can
6100 treat each word individually. */
6101 && ((GET_CODE (SET_DEST (x)) == SUBREG
6102 && loc != &SUBREG_REG (SET_DEST (x))
6103 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
6104 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6105 && refers_to_regno_for_reload_p (regno, endregno,
6106 SUBREG_REG (SET_DEST (x)),
6108 /* If the output is an earlyclobber operand, this is
6110 || ((GET_CODE (SET_DEST (x)) != REG
6111 || earlyclobber_operand_p (SET_DEST (x)))
6112 && refers_to_regno_for_reload_p (regno, endregno,
6113 SET_DEST (x), loc))))
6116 if (code == CLOBBER || loc == &SET_SRC (x))
6125 /* X does not match, so try its subexpressions. */
6127 fmt = GET_RTX_FORMAT (code);
6128 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6130 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6138 if (refers_to_regno_for_reload_p (regno, endregno,
6142 else if (fmt[i] == 'E')
6145 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6146 if (loc != &XVECEXP (x, i, j)
6147 && refers_to_regno_for_reload_p (regno, endregno,
6148 XVECEXP (x, i, j), loc))
6155 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6156 we check if any register number in X conflicts with the relevant register
6157 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6158 contains a MEM (we don't bother checking for memory addresses that can't
6159 conflict because we expect this to be a rare case.
6161 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6162 that we look at equivalences for pseudos that didn't get hard registers. */
6165 reg_overlap_mentioned_for_reload_p (x, in)
6168 int regno, endregno;
6170 /* Overly conservative. */
6171 if (GET_CODE (x) == STRICT_LOW_PART
6172 || GET_RTX_CLASS (GET_CODE (x)) == 'a')
6175 /* If either argument is a constant, then modifying X can not affect IN. */
6176 if (CONSTANT_P (x) || CONSTANT_P (in))
6178 else if (GET_CODE (x) == SUBREG)
6180 regno = REGNO (SUBREG_REG (x));
6181 if (regno < FIRST_PSEUDO_REGISTER)
6182 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6183 GET_MODE (SUBREG_REG (x)),
6187 else if (GET_CODE (x) == REG)
6191 /* If this is a pseudo, it must not have been assigned a hard register.
6192 Therefore, it must either be in memory or be a constant. */
6194 if (regno >= FIRST_PSEUDO_REGISTER)
6196 if (reg_equiv_memory_loc[regno])
6197 return refers_to_mem_for_reload_p (in);
6198 else if (reg_equiv_constant[regno])
6203 else if (GET_CODE (x) == MEM)
6204 return refers_to_mem_for_reload_p (in);
6205 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6206 || GET_CODE (x) == CC0)
6207 return reg_mentioned_p (x, in);
6208 else if (GET_CODE (x) == PLUS)
6209 return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6210 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6214 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6215 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6217 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6220 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6224 refers_to_mem_for_reload_p (x)
6230 if (GET_CODE (x) == MEM)
6233 if (GET_CODE (x) == REG)
6234 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6235 && reg_equiv_memory_loc[REGNO (x)]);
6237 fmt = GET_RTX_FORMAT (GET_CODE (x));
6238 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6240 && (GET_CODE (XEXP (x, i)) == MEM
6241 || refers_to_mem_for_reload_p (XEXP (x, i))))
6247 /* Check the insns before INSN to see if there is a suitable register
6248 containing the same value as GOAL.
6249 If OTHER is -1, look for a register in class CLASS.
6250 Otherwise, just see if register number OTHER shares GOAL's value.
6252 Return an rtx for the register found, or zero if none is found.
6254 If RELOAD_REG_P is (short *)1,
6255 we reject any hard reg that appears in reload_reg_rtx
6256 because such a hard reg is also needed coming into this insn.
6258 If RELOAD_REG_P is any other nonzero value,
6259 it is a vector indexed by hard reg number
6260 and we reject any hard reg whose element in the vector is nonnegative
6261 as well as any that appears in reload_reg_rtx.
6263 If GOAL is zero, then GOALREG is a register number; we look
6264 for an equivalent for that register.
6266 MODE is the machine mode of the value we want an equivalence for.
6267 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6269 This function is used by jump.c as well as in the reload pass.
6271 If GOAL is the sum of the stack pointer and a constant, we treat it
6272 as if it were a constant except that sp is required to be unchanging. */
6275 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
6278 enum reg_class class;
6280 short *reload_reg_p;
6282 enum machine_mode mode;
6285 rtx goaltry, valtry, value, where;
6291 int goal_mem_addr_varies = 0;
6292 int need_stable_sp = 0;
6298 else if (GET_CODE (goal) == REG)
6299 regno = REGNO (goal);
6300 else if (GET_CODE (goal) == MEM)
6302 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6303 if (MEM_VOLATILE_P (goal))
6305 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
6307 /* An address with side effects must be reexecuted. */
6322 else if (CONSTANT_P (goal))
6324 else if (GET_CODE (goal) == PLUS
6325 && XEXP (goal, 0) == stack_pointer_rtx
6326 && CONSTANT_P (XEXP (goal, 1)))
6327 goal_const = need_stable_sp = 1;
6328 else if (GET_CODE (goal) == PLUS
6329 && XEXP (goal, 0) == frame_pointer_rtx
6330 && CONSTANT_P (XEXP (goal, 1)))
6335 /* Scan insns back from INSN, looking for one that copies
6336 a value into or out of GOAL.
6337 Stop and give up if we reach a label. */
6342 if (p == 0 || GET_CODE (p) == CODE_LABEL)
6345 if (GET_CODE (p) == INSN
6346 /* If we don't want spill regs ... */
6347 && (! (reload_reg_p != 0
6348 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6349 /* ... then ignore insns introduced by reload; they aren't
6350 useful and can cause results in reload_as_needed to be
6351 different from what they were when calculating the need for
6352 spills. If we notice an input-reload insn here, we will
6353 reject it below, but it might hide a usable equivalent.
6354 That makes bad code. It may even abort: perhaps no reg was
6355 spilled for this insn because it was assumed we would find
6357 || INSN_UID (p) < reload_first_uid))
6360 pat = single_set (p);
6362 /* First check for something that sets some reg equal to GOAL. */
6365 && true_regnum (SET_SRC (pat)) == regno
6366 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6369 && true_regnum (SET_DEST (pat)) == regno
6370 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6372 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6373 /* When looking for stack pointer + const,
6374 make sure we don't use a stack adjust. */
6375 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6376 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6378 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6379 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6381 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6382 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6383 /* If we are looking for a constant,
6384 and something equivalent to that constant was copied
6385 into a reg, we can use that reg. */
6386 || (goal_const && REG_NOTES (p) != 0
6387 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6388 && ((rtx_equal_p (XEXP (tem, 0), goal)
6390 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6391 || (GET_CODE (SET_DEST (pat)) == REG
6392 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6393 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6395 && GET_CODE (goal) == CONST_INT
6397 = operand_subword (XEXP (tem, 0), 0, 0,
6399 && rtx_equal_p (goal, goaltry)
6401 = operand_subword (SET_DEST (pat), 0, 0,
6403 && (valueno = true_regnum (valtry)) >= 0)))
6404 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6406 && GET_CODE (SET_DEST (pat)) == REG
6407 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6408 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6410 && GET_CODE (goal) == CONST_INT
6411 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6413 && rtx_equal_p (goal, goaltry)
6415 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6416 && (valueno = true_regnum (valtry)) >= 0)))
6420 if (valueno != other)
6423 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6429 for (i = HARD_REGNO_NREGS (valueno, mode) - 1; i >= 0; i--)
6430 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6443 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6444 (or copying VALUE into GOAL, if GOAL is also a register).
6445 Now verify that VALUE is really valid. */
6447 /* VALUENO is the register number of VALUE; a hard register. */
6449 /* Don't try to re-use something that is killed in this insn. We want
6450 to be able to trust REG_UNUSED notes. */
6451 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6454 /* If we propose to get the value from the stack pointer or if GOAL is
6455 a MEM based on the stack pointer, we need a stable SP. */
6456 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6457 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6461 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6462 if (GET_MODE (value) != mode)
6465 /* Reject VALUE if it was loaded from GOAL
6466 and is also a register that appears in the address of GOAL. */
6468 if (goal_mem && value == SET_DEST (single_set (where))
6469 && refers_to_regno_for_reload_p (valueno,
6471 + HARD_REGNO_NREGS (valueno, mode)),
6475 /* Reject registers that overlap GOAL. */
6477 if (!goal_mem && !goal_const
6478 && regno + (int) HARD_REGNO_NREGS (regno, mode) > valueno
6479 && regno < valueno + (int) HARD_REGNO_NREGS (valueno, mode))
6482 nregs = HARD_REGNO_NREGS (regno, mode);
6483 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6485 /* Reject VALUE if it is one of the regs reserved for reloads.
6486 Reload1 knows how to reuse them anyway, and it would get
6487 confused if we allocated one without its knowledge.
6488 (Now that insns introduced by reload are ignored above,
6489 this case shouldn't happen, but I'm not positive.) */
6491 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6494 for (i = 0; i < valuenregs; ++i)
6495 if (reload_reg_p[valueno + i] >= 0)
6499 /* Reject VALUE if it is a register being used for an input reload
6500 even if it is not one of those reserved. */
6502 if (reload_reg_p != 0)
6505 for (i = 0; i < n_reloads; i++)
6506 if (rld[i].reg_rtx != 0 && rld[i].in)
6508 int regno1 = REGNO (rld[i].reg_rtx);
6509 int nregs1 = HARD_REGNO_NREGS (regno1,
6510 GET_MODE (rld[i].reg_rtx));
6511 if (regno1 < valueno + valuenregs
6512 && regno1 + nregs1 > valueno)
6518 /* We must treat frame pointer as varying here,
6519 since it can vary--in a nonlocal goto as generated by expand_goto. */
6520 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6522 /* Now verify that the values of GOAL and VALUE remain unaltered
6523 until INSN is reached. */
6532 /* Don't trust the conversion past a function call
6533 if either of the two is in a call-clobbered register, or memory. */
6534 if (GET_CODE (p) == CALL_INSN)
6538 if (goal_mem || need_stable_sp)
6541 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6542 for (i = 0; i < nregs; ++i)
6543 if (call_used_regs[regno + i])
6546 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6547 for (i = 0; i < valuenregs; ++i)
6548 if (call_used_regs[valueno + i])
6550 #ifdef NON_SAVING_SETJMP
6551 if (NON_SAVING_SETJMP && find_reg_note (p, REG_SETJMP, NULL))
6560 /* Watch out for unspec_volatile, and volatile asms. */
6561 if (volatile_insn_p (pat))
6564 /* If this insn P stores in either GOAL or VALUE, return 0.
6565 If GOAL is a memory ref and this insn writes memory, return 0.
6566 If GOAL is a memory ref and its address is not constant,
6567 and this insn P changes a register used in GOAL, return 0. */
6569 if (GET_CODE (pat) == COND_EXEC)
6570 pat = COND_EXEC_CODE (pat);
6571 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6573 rtx dest = SET_DEST (pat);
6574 while (GET_CODE (dest) == SUBREG
6575 || GET_CODE (dest) == ZERO_EXTRACT
6576 || GET_CODE (dest) == SIGN_EXTRACT
6577 || GET_CODE (dest) == STRICT_LOW_PART)
6578 dest = XEXP (dest, 0);
6579 if (GET_CODE (dest) == REG)
6581 int xregno = REGNO (dest);
6583 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6584 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6587 if (xregno < regno + nregs && xregno + xnregs > regno)
6589 if (xregno < valueno + valuenregs
6590 && xregno + xnregs > valueno)
6592 if (goal_mem_addr_varies
6593 && reg_overlap_mentioned_for_reload_p (dest, goal))
6595 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6598 else if (goal_mem && GET_CODE (dest) == MEM
6599 && ! push_operand (dest, GET_MODE (dest)))
6601 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6602 && reg_equiv_memory_loc[regno] != 0)
6604 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6607 else if (GET_CODE (pat) == PARALLEL)
6610 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6612 rtx v1 = XVECEXP (pat, 0, i);
6613 if (GET_CODE (v1) == COND_EXEC)
6614 v1 = COND_EXEC_CODE (v1);
6615 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6617 rtx dest = SET_DEST (v1);
6618 while (GET_CODE (dest) == SUBREG
6619 || GET_CODE (dest) == ZERO_EXTRACT
6620 || GET_CODE (dest) == SIGN_EXTRACT
6621 || GET_CODE (dest) == STRICT_LOW_PART)
6622 dest = XEXP (dest, 0);
6623 if (GET_CODE (dest) == REG)
6625 int xregno = REGNO (dest);
6627 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6628 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6631 if (xregno < regno + nregs
6632 && xregno + xnregs > regno)
6634 if (xregno < valueno + valuenregs
6635 && xregno + xnregs > valueno)
6637 if (goal_mem_addr_varies
6638 && reg_overlap_mentioned_for_reload_p (dest,
6641 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6644 else if (goal_mem && GET_CODE (dest) == MEM
6645 && ! push_operand (dest, GET_MODE (dest)))
6647 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6648 && reg_equiv_memory_loc[regno] != 0)
6650 else if (need_stable_sp
6651 && push_operand (dest, GET_MODE (dest)))
6657 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
6661 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6662 link = XEXP (link, 1))
6664 pat = XEXP (link, 0);
6665 if (GET_CODE (pat) == CLOBBER)
6667 rtx dest = SET_DEST (pat);
6669 if (GET_CODE (dest) == REG)
6671 int xregno = REGNO (dest);
6673 = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6675 if (xregno < regno + nregs
6676 && xregno + xnregs > regno)
6678 else if (xregno < valueno + valuenregs
6679 && xregno + xnregs > valueno)
6681 else if (goal_mem_addr_varies
6682 && reg_overlap_mentioned_for_reload_p (dest,
6687 else if (goal_mem && GET_CODE (dest) == MEM
6688 && ! push_operand (dest, GET_MODE (dest)))
6690 else if (need_stable_sp
6691 && push_operand (dest, GET_MODE (dest)))
6698 /* If this insn auto-increments or auto-decrements
6699 either regno or valueno, return 0 now.
6700 If GOAL is a memory ref and its address is not constant,
6701 and this insn P increments a register used in GOAL, return 0. */
6705 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6706 if (REG_NOTE_KIND (link) == REG_INC
6707 && GET_CODE (XEXP (link, 0)) == REG)
6709 int incno = REGNO (XEXP (link, 0));
6710 if (incno < regno + nregs && incno >= regno)
6712 if (incno < valueno + valuenregs && incno >= valueno)
6714 if (goal_mem_addr_varies
6715 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6725 /* Find a place where INCED appears in an increment or decrement operator
6726 within X, and return the amount INCED is incremented or decremented by.
6727 The value is always positive. */
6730 find_inc_amount (x, inced)
6733 enum rtx_code code = GET_CODE (x);
6739 rtx addr = XEXP (x, 0);
6740 if ((GET_CODE (addr) == PRE_DEC
6741 || GET_CODE (addr) == POST_DEC
6742 || GET_CODE (addr) == PRE_INC
6743 || GET_CODE (addr) == POST_INC)
6744 && XEXP (addr, 0) == inced)
6745 return GET_MODE_SIZE (GET_MODE (x));
6746 else if ((GET_CODE (addr) == PRE_MODIFY
6747 || GET_CODE (addr) == POST_MODIFY)
6748 && GET_CODE (XEXP (addr, 1)) == PLUS
6749 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
6750 && XEXP (addr, 0) == inced
6751 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
6753 i = INTVAL (XEXP (XEXP (addr, 1), 1));
6754 return i < 0 ? -i : i;
6758 fmt = GET_RTX_FORMAT (code);
6759 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6763 int tem = find_inc_amount (XEXP (x, i), inced);
6770 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6772 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6782 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6783 If SETS is nonzero, also consider SETs. */
6786 regno_clobbered_p (regno, insn, mode, sets)
6789 enum machine_mode mode;
6792 unsigned int nregs = HARD_REGNO_NREGS (regno, mode);
6793 unsigned int endregno = regno + nregs;
6795 if ((GET_CODE (PATTERN (insn)) == CLOBBER
6796 || (sets && GET_CODE (PATTERN (insn)) == SET))
6797 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6799 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
6801 return test >= regno && test < endregno;
6804 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6806 int i = XVECLEN (PATTERN (insn), 0) - 1;
6810 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6811 if ((GET_CODE (elt) == CLOBBER
6812 || (sets && GET_CODE (PATTERN (insn)) == SET))
6813 && GET_CODE (XEXP (elt, 0)) == REG)
6815 unsigned int test = REGNO (XEXP (elt, 0));
6817 if (test >= regno && test < endregno)
6826 static const char *const reload_when_needed_name[] =
6829 "RELOAD_FOR_OUTPUT",
6831 "RELOAD_FOR_INPUT_ADDRESS",
6832 "RELOAD_FOR_INPADDR_ADDRESS",
6833 "RELOAD_FOR_OUTPUT_ADDRESS",
6834 "RELOAD_FOR_OUTADDR_ADDRESS",
6835 "RELOAD_FOR_OPERAND_ADDRESS",
6836 "RELOAD_FOR_OPADDR_ADDR",
6838 "RELOAD_FOR_OTHER_ADDRESS"
6841 static const char * const reg_class_names[] = REG_CLASS_NAMES;
6843 /* These functions are used to print the variables set by 'find_reloads' */
6846 debug_reload_to_stream (f)
6854 for (r = 0; r < n_reloads; r++)
6856 fprintf (f, "Reload %d: ", r);
6860 fprintf (f, "reload_in (%s) = ",
6861 GET_MODE_NAME (rld[r].inmode));
6862 print_inline_rtx (f, rld[r].in, 24);
6863 fprintf (f, "\n\t");
6866 if (rld[r].out != 0)
6868 fprintf (f, "reload_out (%s) = ",
6869 GET_MODE_NAME (rld[r].outmode));
6870 print_inline_rtx (f, rld[r].out, 24);
6871 fprintf (f, "\n\t");
6874 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
6876 fprintf (f, "%s (opnum = %d)",
6877 reload_when_needed_name[(int) rld[r].when_needed],
6880 if (rld[r].optional)
6881 fprintf (f, ", optional");
6883 if (rld[r].nongroup)
6884 fprintf (f, ", nongroup");
6886 if (rld[r].inc != 0)
6887 fprintf (f, ", inc by %d", rld[r].inc);
6889 if (rld[r].nocombine)
6890 fprintf (f, ", can't combine");
6892 if (rld[r].secondary_p)
6893 fprintf (f, ", secondary_reload_p");
6895 if (rld[r].in_reg != 0)
6897 fprintf (f, "\n\treload_in_reg: ");
6898 print_inline_rtx (f, rld[r].in_reg, 24);
6901 if (rld[r].out_reg != 0)
6903 fprintf (f, "\n\treload_out_reg: ");
6904 print_inline_rtx (f, rld[r].out_reg, 24);
6907 if (rld[r].reg_rtx != 0)
6909 fprintf (f, "\n\treload_reg_rtx: ");
6910 print_inline_rtx (f, rld[r].reg_rtx, 24);
6914 if (rld[r].secondary_in_reload != -1)
6916 fprintf (f, "%ssecondary_in_reload = %d",
6917 prefix, rld[r].secondary_in_reload);
6921 if (rld[r].secondary_out_reload != -1)
6922 fprintf (f, "%ssecondary_out_reload = %d\n",
6923 prefix, rld[r].secondary_out_reload);
6926 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
6928 fprintf (f, "%ssecondary_in_icode = %s", prefix,
6929 insn_data[rld[r].secondary_in_icode].name);
6933 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
6934 fprintf (f, "%ssecondary_out_icode = %s", prefix,
6935 insn_data[rld[r].secondary_out_icode].name);
6944 debug_reload_to_stream (stderr);