1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
91 #include "coretypes.h"
95 #include "insn-config.h"
101 #include "hard-reg-set.h"
105 #include "function.h"
109 #ifndef REGNO_MODE_OK_FOR_BASE_P
110 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
113 #ifndef REG_MODE_OK_FOR_BASE_P
114 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
117 /* All reloads of the current insn are recorded here. See reload.h for
120 struct reload rld[MAX_RELOADS];
122 /* All the "earlyclobber" operands of the current insn
123 are recorded here. */
125 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
127 int reload_n_operands;
129 /* Replacing reloads.
131 If `replace_reloads' is nonzero, then as each reload is recorded
132 an entry is made for it in the table `replacements'.
133 Then later `subst_reloads' can look through that table and
134 perform all the replacements needed. */
136 /* Nonzero means record the places to replace. */
137 static int replace_reloads;
139 /* Each replacement is recorded with a structure like this. */
142 rtx *where; /* Location to store in */
143 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
144 a SUBREG; 0 otherwise. */
145 int what; /* which reload this is for */
146 enum machine_mode mode; /* mode it must have */
149 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
151 /* Number of replacements currently recorded. */
152 static int n_replacements;
154 /* Used to track what is modified by an operand. */
157 int reg_flag; /* Nonzero if referencing a register. */
158 int safe; /* Nonzero if this can't conflict with anything. */
159 rtx base; /* Base address for MEM. */
160 HOST_WIDE_INT start; /* Starting offset or register number. */
161 HOST_WIDE_INT end; /* Ending offset or register number. */
164 #ifdef SECONDARY_MEMORY_NEEDED
166 /* Save MEMs needed to copy from one class of registers to another. One MEM
167 is used per mode, but normally only one or two modes are ever used.
169 We keep two versions, before and after register elimination. The one
170 after register elimination is record separately for each operand. This
171 is done in case the address is not valid to be sure that we separately
174 static rtx secondary_memlocs[NUM_MACHINE_MODES];
175 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
178 /* The instruction we are doing reloads for;
179 so we can test whether a register dies in it. */
180 static rtx this_insn;
182 /* Nonzero if this instruction is a user-specified asm with operands. */
183 static int this_insn_is_asm;
185 /* If hard_regs_live_known is nonzero,
186 we can tell which hard regs are currently live,
187 at least enough to succeed in choosing dummy reloads. */
188 static int hard_regs_live_known;
190 /* Indexed by hard reg number,
191 element is nonnegative if hard reg has been spilled.
192 This vector is passed to `find_reloads' as an argument
193 and is not changed here. */
194 static short *static_reload_reg_p;
196 /* Set to 1 in subst_reg_equivs if it changes anything. */
197 static int subst_reg_equivs_changed;
199 /* On return from push_reload, holds the reload-number for the OUT
200 operand, which can be different for that from the input operand. */
201 static int output_reloadnum;
203 /* Compare two RTX's. */
204 #define MATCHES(x, y) \
205 (x == y || (x != 0 && (GET_CODE (x) == REG \
206 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
207 : rtx_equal_p (x, y) && ! side_effects_p (x))))
209 /* Indicates if two reloads purposes are for similar enough things that we
210 can merge their reloads. */
211 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
212 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
213 || ((when1) == (when2) && (op1) == (op2)) \
214 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
215 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
216 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
217 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
218 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
220 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
221 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
222 ((when1) != (when2) \
223 || ! ((op1) == (op2) \
224 || (when1) == RELOAD_FOR_INPUT \
225 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
226 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
228 /* If we are going to reload an address, compute the reload type to
230 #define ADDR_TYPE(type) \
231 ((type) == RELOAD_FOR_INPUT_ADDRESS \
232 ? RELOAD_FOR_INPADDR_ADDRESS \
233 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
234 ? RELOAD_FOR_OUTADDR_ADDRESS \
237 #ifdef HAVE_SECONDARY_RELOADS
238 static int push_secondary_reload (int, rtx, int, int, enum reg_class,
239 enum machine_mode, enum reload_type,
242 static enum reg_class find_valid_class (enum machine_mode, int, unsigned int);
243 static int reload_inner_reg_of_subreg (rtx, enum machine_mode, int);
244 static void push_replacement (rtx *, int, enum machine_mode);
245 static void dup_replacements (rtx *, rtx *);
246 static void combine_reloads (void);
247 static int find_reusable_reload (rtx *, rtx, enum reg_class,
248 enum reload_type, int, int);
249 static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, enum machine_mode,
250 enum machine_mode, enum reg_class, int, int);
251 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
252 static struct decomposition decompose (rtx);
253 static int immune_p (rtx, rtx, struct decomposition);
254 static int alternative_allows_memconst (const char *, int);
255 static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx,
257 static rtx make_memloc (rtx, int);
258 static int maybe_memory_address_p (enum machine_mode, rtx, rtx *);
259 static int find_reloads_address (enum machine_mode, rtx *, rtx, rtx *,
260 int, enum reload_type, int, rtx);
261 static rtx subst_reg_equivs (rtx, rtx);
262 static rtx subst_indexed_address (rtx);
263 static void update_auto_inc_notes (rtx, int, int);
264 static int find_reloads_address_1 (enum machine_mode, rtx, int, rtx *,
265 int, enum reload_type,int, rtx);
266 static void find_reloads_address_part (rtx, rtx *, enum reg_class,
267 enum machine_mode, int,
268 enum reload_type, int);
269 static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type,
271 static void copy_replacements_1 (rtx *, rtx *, int);
272 static int find_inc_amount (rtx, rtx);
274 #ifdef HAVE_SECONDARY_RELOADS
276 /* Determine if any secondary reloads are needed for loading (if IN_P is
277 nonzero) or storing (if IN_P is zero) X to or from a reload register of
278 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
279 are needed, push them.
281 Return the reload number of the secondary reload we made, or -1 if
282 we didn't need one. *PICODE is set to the insn_code to use if we do
283 need a secondary reload. */
286 push_secondary_reload (int in_p, rtx x, int opnum, int optional,
287 enum reg_class reload_class,
288 enum machine_mode reload_mode, enum reload_type type,
289 enum insn_code *picode)
291 enum reg_class class = NO_REGS;
292 enum machine_mode mode = reload_mode;
293 enum insn_code icode = CODE_FOR_nothing;
294 enum reg_class t_class = NO_REGS;
295 enum machine_mode t_mode = VOIDmode;
296 enum insn_code t_icode = CODE_FOR_nothing;
297 enum reload_type secondary_type;
298 int s_reload, t_reload = -1;
300 if (type == RELOAD_FOR_INPUT_ADDRESS
301 || type == RELOAD_FOR_OUTPUT_ADDRESS
302 || type == RELOAD_FOR_INPADDR_ADDRESS
303 || type == RELOAD_FOR_OUTADDR_ADDRESS)
304 secondary_type = type;
306 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
308 *picode = CODE_FOR_nothing;
310 /* If X is a paradoxical SUBREG, use the inner value to determine both the
311 mode and object being reloaded. */
312 if (GET_CODE (x) == SUBREG
313 && (GET_MODE_SIZE (GET_MODE (x))
314 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
317 reload_mode = GET_MODE (x);
320 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
321 is still a pseudo-register by now, it *must* have an equivalent MEM
322 but we don't want to assume that), use that equivalent when seeing if
323 a secondary reload is needed since whether or not a reload is needed
324 might be sensitive to the form of the MEM. */
326 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
327 && reg_equiv_mem[REGNO (x)] != 0)
328 x = reg_equiv_mem[REGNO (x)];
330 #ifdef SECONDARY_INPUT_RELOAD_CLASS
332 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
335 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
337 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
340 /* If we don't need any secondary registers, done. */
341 if (class == NO_REGS)
344 /* Get a possible insn to use. If the predicate doesn't accept X, don't
347 icode = (in_p ? reload_in_optab[(int) reload_mode]
348 : reload_out_optab[(int) reload_mode]);
350 if (icode != CODE_FOR_nothing
351 && insn_data[(int) icode].operand[in_p].predicate
352 && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode)))
353 icode = CODE_FOR_nothing;
355 /* If we will be using an insn, see if it can directly handle the reload
356 register we will be using. If it can, the secondary reload is for a
357 scratch register. If it can't, we will use the secondary reload for
358 an intermediate register and require a tertiary reload for the scratch
361 if (icode != CODE_FOR_nothing)
363 /* If IN_P is nonzero, the reload register will be the output in
364 operand 0. If IN_P is zero, the reload register will be the input
365 in operand 1. Outputs should have an initial "=", which we must
368 enum reg_class insn_class;
370 if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0)
371 insn_class = ALL_REGS;
374 const char *insn_constraint
375 = &insn_data[(int) icode].operand[!in_p].constraint[in_p];
376 char insn_letter = *insn_constraint;
378 = (insn_letter == 'r' ? GENERAL_REGS
379 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) insn_letter,
382 if (insn_class == NO_REGS)
385 && insn_data[(int) icode].operand[!in_p].constraint[0] != '=')
389 /* The scratch register's constraint must start with "=&". */
390 if (insn_data[(int) icode].operand[2].constraint[0] != '='
391 || insn_data[(int) icode].operand[2].constraint[1] != '&')
394 if (reg_class_subset_p (reload_class, insn_class))
395 mode = insn_data[(int) icode].operand[2].mode;
398 const char *t_constraint
399 = &insn_data[(int) icode].operand[2].constraint[2];
400 char t_letter = *t_constraint;
402 t_mode = insn_data[(int) icode].operand[2].mode;
403 t_class = (t_letter == 'r' ? GENERAL_REGS
404 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) t_letter,
407 icode = CODE_FOR_nothing;
411 /* This case isn't valid, so fail. Reload is allowed to use the same
412 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
413 in the case of a secondary register, we actually need two different
414 registers for correct code. We fail here to prevent the possibility of
415 silently generating incorrect code later.
417 The convention is that secondary input reloads are valid only if the
418 secondary_class is different from class. If you have such a case, you
419 can not use secondary reloads, you must work around the problem some
422 Allow this when a reload_in/out pattern is being used. I.e. assume
423 that the generated code handles this case. */
425 if (in_p && class == reload_class && icode == CODE_FOR_nothing
426 && t_icode == CODE_FOR_nothing)
429 /* If we need a tertiary reload, see if we have one we can reuse or else
432 if (t_class != NO_REGS)
434 for (t_reload = 0; t_reload < n_reloads; t_reload++)
435 if (rld[t_reload].secondary_p
436 && (reg_class_subset_p (t_class, rld[t_reload].class)
437 || reg_class_subset_p (rld[t_reload].class, t_class))
438 && ((in_p && rld[t_reload].inmode == t_mode)
439 || (! in_p && rld[t_reload].outmode == t_mode))
440 && ((in_p && (rld[t_reload].secondary_in_icode
441 == CODE_FOR_nothing))
442 || (! in_p &&(rld[t_reload].secondary_out_icode
443 == CODE_FOR_nothing)))
444 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
445 && MERGABLE_RELOADS (secondary_type,
446 rld[t_reload].when_needed,
447 opnum, rld[t_reload].opnum))
450 rld[t_reload].inmode = t_mode;
452 rld[t_reload].outmode = t_mode;
454 if (reg_class_subset_p (t_class, rld[t_reload].class))
455 rld[t_reload].class = t_class;
457 rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum);
458 rld[t_reload].optional &= optional;
459 rld[t_reload].secondary_p = 1;
460 if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed,
461 opnum, rld[t_reload].opnum))
462 rld[t_reload].when_needed = RELOAD_OTHER;
465 if (t_reload == n_reloads)
467 /* We need to make a new tertiary reload for this register class. */
468 rld[t_reload].in = rld[t_reload].out = 0;
469 rld[t_reload].class = t_class;
470 rld[t_reload].inmode = in_p ? t_mode : VOIDmode;
471 rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode;
472 rld[t_reload].reg_rtx = 0;
473 rld[t_reload].optional = optional;
474 rld[t_reload].inc = 0;
475 /* Maybe we could combine these, but it seems too tricky. */
476 rld[t_reload].nocombine = 1;
477 rld[t_reload].in_reg = 0;
478 rld[t_reload].out_reg = 0;
479 rld[t_reload].opnum = opnum;
480 rld[t_reload].when_needed = secondary_type;
481 rld[t_reload].secondary_in_reload = -1;
482 rld[t_reload].secondary_out_reload = -1;
483 rld[t_reload].secondary_in_icode = CODE_FOR_nothing;
484 rld[t_reload].secondary_out_icode = CODE_FOR_nothing;
485 rld[t_reload].secondary_p = 1;
491 /* See if we can reuse an existing secondary reload. */
492 for (s_reload = 0; s_reload < n_reloads; s_reload++)
493 if (rld[s_reload].secondary_p
494 && (reg_class_subset_p (class, rld[s_reload].class)
495 || reg_class_subset_p (rld[s_reload].class, class))
496 && ((in_p && rld[s_reload].inmode == mode)
497 || (! in_p && rld[s_reload].outmode == mode))
498 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
499 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
500 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
501 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
502 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
503 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
504 opnum, rld[s_reload].opnum))
507 rld[s_reload].inmode = mode;
509 rld[s_reload].outmode = mode;
511 if (reg_class_subset_p (class, rld[s_reload].class))
512 rld[s_reload].class = class;
514 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
515 rld[s_reload].optional &= optional;
516 rld[s_reload].secondary_p = 1;
517 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
518 opnum, rld[s_reload].opnum))
519 rld[s_reload].when_needed = RELOAD_OTHER;
522 if (s_reload == n_reloads)
524 #ifdef SECONDARY_MEMORY_NEEDED
525 /* If we need a memory location to copy between the two reload regs,
526 set it up now. Note that we do the input case before making
527 the reload and the output case after. This is due to the
528 way reloads are output. */
530 if (in_p && icode == CODE_FOR_nothing
531 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
533 get_secondary_mem (x, reload_mode, opnum, type);
535 /* We may have just added new reloads. Make sure we add
536 the new reload at the end. */
537 s_reload = n_reloads;
541 /* We need to make a new secondary reload for this register class. */
542 rld[s_reload].in = rld[s_reload].out = 0;
543 rld[s_reload].class = class;
545 rld[s_reload].inmode = in_p ? mode : VOIDmode;
546 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
547 rld[s_reload].reg_rtx = 0;
548 rld[s_reload].optional = optional;
549 rld[s_reload].inc = 0;
550 /* Maybe we could combine these, but it seems too tricky. */
551 rld[s_reload].nocombine = 1;
552 rld[s_reload].in_reg = 0;
553 rld[s_reload].out_reg = 0;
554 rld[s_reload].opnum = opnum;
555 rld[s_reload].when_needed = secondary_type;
556 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
557 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
558 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
559 rld[s_reload].secondary_out_icode
560 = ! in_p ? t_icode : CODE_FOR_nothing;
561 rld[s_reload].secondary_p = 1;
565 #ifdef SECONDARY_MEMORY_NEEDED
566 if (! in_p && icode == CODE_FOR_nothing
567 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
568 get_secondary_mem (x, mode, opnum, type);
575 #endif /* HAVE_SECONDARY_RELOADS */
577 #ifdef SECONDARY_MEMORY_NEEDED
579 /* Return a memory location that will be used to copy X in mode MODE.
580 If we haven't already made a location for this mode in this insn,
581 call find_reloads_address on the location being returned. */
584 get_secondary_mem (rtx x ATTRIBUTE_UNUSED, enum machine_mode mode,
585 int opnum, enum reload_type type)
590 /* By default, if MODE is narrower than a word, widen it to a word.
591 This is required because most machines that require these memory
592 locations do not support short load and stores from all registers
593 (e.g., FP registers). */
595 #ifdef SECONDARY_MEMORY_NEEDED_MODE
596 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
598 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
599 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
602 /* If we already have made a MEM for this operand in MODE, return it. */
603 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
604 return secondary_memlocs_elim[(int) mode][opnum];
606 /* If this is the first time we've tried to get a MEM for this mode,
607 allocate a new one. `something_changed' in reload will get set
608 by noticing that the frame size has changed. */
610 if (secondary_memlocs[(int) mode] == 0)
612 #ifdef SECONDARY_MEMORY_NEEDED_RTX
613 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
615 secondary_memlocs[(int) mode]
616 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
620 /* Get a version of the address doing any eliminations needed. If that
621 didn't give us a new MEM, make a new one if it isn't valid. */
623 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
624 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
626 if (! mem_valid && loc == secondary_memlocs[(int) mode])
627 loc = copy_rtx (loc);
629 /* The only time the call below will do anything is if the stack
630 offset is too large. In that case IND_LEVELS doesn't matter, so we
631 can just pass a zero. Adjust the type to be the address of the
632 corresponding object. If the address was valid, save the eliminated
633 address. If it wasn't valid, we need to make a reload each time, so
638 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
639 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
642 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
646 secondary_memlocs_elim[(int) mode][opnum] = loc;
650 /* Clear any secondary memory locations we've made. */
653 clear_secondary_mem (void)
655 memset (secondary_memlocs, 0, sizeof secondary_memlocs);
657 #endif /* SECONDARY_MEMORY_NEEDED */
659 /* Find the largest class for which every register number plus N is valid in
660 M1 (if in range) and is cheap to move into REGNO.
661 Abort if no such class exists. */
663 static enum reg_class
664 find_valid_class (enum machine_mode m1 ATTRIBUTE_UNUSED, int n,
665 unsigned int dest_regno ATTRIBUTE_UNUSED)
670 enum reg_class best_class = NO_REGS;
671 enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
672 unsigned int best_size = 0;
675 for (class = 1; class < N_REG_CLASSES; class++)
678 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
679 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
680 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
681 && ! HARD_REGNO_MODE_OK (regno + n, m1))
686 cost = REGISTER_MOVE_COST (m1, class, dest_class);
688 if ((reg_class_size[class] > best_size
689 && (best_cost < 0 || best_cost >= cost))
693 best_size = reg_class_size[class];
694 best_cost = REGISTER_MOVE_COST (m1, class, dest_class);
704 /* Return the number of a previously made reload that can be combined with
705 a new one, or n_reloads if none of the existing reloads can be used.
706 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
707 push_reload, they determine the kind of the new reload that we try to
708 combine. P_IN points to the corresponding value of IN, which can be
709 modified by this function.
710 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
713 find_reusable_reload (rtx *p_in, rtx out, enum reg_class class,
714 enum reload_type type, int opnum, int dont_share)
718 /* We can't merge two reloads if the output of either one is
721 if (earlyclobber_operand_p (out))
724 /* We can use an existing reload if the class is right
725 and at least one of IN and OUT is a match
726 and the other is at worst neutral.
727 (A zero compared against anything is neutral.)
729 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
730 for the same thing since that can cause us to need more reload registers
731 than we otherwise would. */
733 for (i = 0; i < n_reloads; i++)
734 if ((reg_class_subset_p (class, rld[i].class)
735 || reg_class_subset_p (rld[i].class, class))
736 /* If the existing reload has a register, it must fit our class. */
737 && (rld[i].reg_rtx == 0
738 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
739 true_regnum (rld[i].reg_rtx)))
740 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
741 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
742 || (out != 0 && MATCHES (rld[i].out, out)
743 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
744 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
745 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
746 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
749 /* Reloading a plain reg for input can match a reload to postincrement
750 that reg, since the postincrement's value is the right value.
751 Likewise, it can match a preincrement reload, since we regard
752 the preincrementation as happening before any ref in this insn
754 for (i = 0; i < n_reloads; i++)
755 if ((reg_class_subset_p (class, rld[i].class)
756 || reg_class_subset_p (rld[i].class, class))
757 /* If the existing reload has a register, it must fit our
759 && (rld[i].reg_rtx == 0
760 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
761 true_regnum (rld[i].reg_rtx)))
762 && out == 0 && rld[i].out == 0 && rld[i].in != 0
763 && ((GET_CODE (in) == REG
764 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == 'a'
765 && MATCHES (XEXP (rld[i].in, 0), in))
766 || (GET_CODE (rld[i].in) == REG
767 && GET_RTX_CLASS (GET_CODE (in)) == 'a'
768 && MATCHES (XEXP (in, 0), rld[i].in)))
769 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
770 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
771 && MERGABLE_RELOADS (type, rld[i].when_needed,
772 opnum, rld[i].opnum))
774 /* Make sure reload_in ultimately has the increment,
775 not the plain register. */
776 if (GET_CODE (in) == REG)
783 /* Return nonzero if X is a SUBREG which will require reloading of its
784 SUBREG_REG expression. */
787 reload_inner_reg_of_subreg (rtx x, enum machine_mode mode, int output)
791 /* Only SUBREGs are problematical. */
792 if (GET_CODE (x) != SUBREG)
795 inner = SUBREG_REG (x);
797 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
798 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
801 /* If INNER is not a hard register, then INNER will not need to
803 if (GET_CODE (inner) != REG
804 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
807 /* If INNER is not ok for MODE, then INNER will need reloading. */
808 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
811 /* If the outer part is a word or smaller, INNER larger than a
812 word and the number of regs for INNER is not the same as the
813 number of words in INNER, then INNER will need reloading. */
814 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
816 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
817 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
818 != (int) HARD_REGNO_NREGS (REGNO (inner), GET_MODE (inner))));
821 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
822 requiring an extra reload register. The caller has already found that
823 IN contains some reference to REGNO, so check that we can produce the
824 new value in a single step. E.g. if we have
825 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
826 instruction that adds one to a register, this should succeed.
827 However, if we have something like
828 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
829 needs to be loaded into a register first, we need a separate reload
831 Such PLUS reloads are generated by find_reload_address_part.
832 The out-of-range PLUS expressions are usually introduced in the instruction
833 patterns by register elimination and substituting pseudos without a home
834 by their function-invariant equivalences. */
836 can_reload_into (rtx in, int regno, enum machine_mode mode)
840 struct recog_data save_recog_data;
842 /* For matching constraints, we often get notional input reloads where
843 we want to use the original register as the reload register. I.e.
844 technically this is a non-optional input-output reload, but IN is
845 already a valid register, and has been chosen as the reload register.
846 Speed this up, since it trivially works. */
847 if (GET_CODE (in) == REG)
850 /* To test MEMs properly, we'd have to take into account all the reloads
851 that are already scheduled, which can become quite complicated.
852 And since we've already handled address reloads for this MEM, it
853 should always succeed anyway. */
854 if (GET_CODE (in) == MEM)
857 /* If we can make a simple SET insn that does the job, everything should
859 dst = gen_rtx_REG (mode, regno);
860 test_insn = make_insn_raw (gen_rtx_SET (VOIDmode, dst, in));
861 save_recog_data = recog_data;
862 if (recog_memoized (test_insn) >= 0)
864 extract_insn (test_insn);
865 r = constrain_operands (1);
867 recog_data = save_recog_data;
871 /* Record one reload that needs to be performed.
872 IN is an rtx saying where the data are to be found before this instruction.
873 OUT says where they must be stored after the instruction.
874 (IN is zero for data not read, and OUT is zero for data not written.)
875 INLOC and OUTLOC point to the places in the instructions where
876 IN and OUT were found.
877 If IN and OUT are both nonzero, it means the same register must be used
878 to reload both IN and OUT.
880 CLASS is a register class required for the reloaded data.
881 INMODE is the machine mode that the instruction requires
882 for the reg that replaces IN and OUTMODE is likewise for OUT.
884 If IN is zero, then OUT's location and mode should be passed as
887 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
889 OPTIONAL nonzero means this reload does not need to be performed:
890 it can be discarded if that is more convenient.
892 OPNUM and TYPE say what the purpose of this reload is.
894 The return value is the reload-number for this reload.
896 If both IN and OUT are nonzero, in some rare cases we might
897 want to make two separate reloads. (Actually we never do this now.)
898 Therefore, the reload-number for OUT is stored in
899 output_reloadnum when we return; the return value applies to IN.
900 Usually (presently always), when IN and OUT are nonzero,
901 the two reload-numbers are equal, but the caller should be careful to
905 push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
906 enum reg_class class, enum machine_mode inmode,
907 enum machine_mode outmode, int strict_low, int optional,
908 int opnum, enum reload_type type)
912 int dont_remove_subreg = 0;
913 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
914 int secondary_in_reload = -1, secondary_out_reload = -1;
915 enum insn_code secondary_in_icode = CODE_FOR_nothing;
916 enum insn_code secondary_out_icode = CODE_FOR_nothing;
918 /* INMODE and/or OUTMODE could be VOIDmode if no mode
919 has been specified for the operand. In that case,
920 use the operand's mode as the mode to reload. */
921 if (inmode == VOIDmode && in != 0)
922 inmode = GET_MODE (in);
923 if (outmode == VOIDmode && out != 0)
924 outmode = GET_MODE (out);
926 /* If IN is a pseudo register everywhere-equivalent to a constant, and
927 it is not in a hard register, reload straight from the constant,
928 since we want to get rid of such pseudo registers.
929 Often this is done earlier, but not always in find_reloads_address. */
930 if (in != 0 && GET_CODE (in) == REG)
932 int regno = REGNO (in);
934 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
935 && reg_equiv_constant[regno] != 0)
936 in = reg_equiv_constant[regno];
939 /* Likewise for OUT. Of course, OUT will never be equivalent to
940 an actual constant, but it might be equivalent to a memory location
941 (in the case of a parameter). */
942 if (out != 0 && GET_CODE (out) == REG)
944 int regno = REGNO (out);
946 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
947 && reg_equiv_constant[regno] != 0)
948 out = reg_equiv_constant[regno];
951 /* If we have a read-write operand with an address side-effect,
952 change either IN or OUT so the side-effect happens only once. */
953 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
954 switch (GET_CODE (XEXP (in, 0)))
956 case POST_INC: case POST_DEC: case POST_MODIFY:
957 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
960 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
961 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
968 /* If we are reloading a (SUBREG constant ...), really reload just the
969 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
970 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
971 a pseudo and hence will become a MEM) with M1 wider than M2 and the
972 register is a pseudo, also reload the inside expression.
973 For machines that extend byte loads, do this for any SUBREG of a pseudo
974 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
975 M2 is an integral mode that gets extended when loaded.
976 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
977 either M1 is not valid for R or M2 is wider than a word but we only
978 need one word to store an M2-sized quantity in R.
979 (However, if OUT is nonzero, we need to reload the reg *and*
980 the subreg, so do nothing here, and let following statement handle it.)
982 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
983 we can't handle it here because CONST_INT does not indicate a mode.
985 Similarly, we must reload the inside expression if we have a
986 STRICT_LOW_PART (presumably, in == out in the cas).
988 Also reload the inner expression if it does not require a secondary
989 reload but the SUBREG does.
991 Finally, reload the inner expression if it is a register that is in
992 the class whose registers cannot be referenced in a different size
993 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
994 cannot reload just the inside since we might end up with the wrong
995 register class. But if it is inside a STRICT_LOW_PART, we have
996 no choice, so we hope we do get the right register class there. */
998 if (in != 0 && GET_CODE (in) == SUBREG
999 && (subreg_lowpart_p (in) || strict_low)
1000 #ifdef CANNOT_CHANGE_MODE_CLASS
1001 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, class)
1003 && (CONSTANT_P (SUBREG_REG (in))
1004 || GET_CODE (SUBREG_REG (in)) == PLUS
1006 || (((GET_CODE (SUBREG_REG (in)) == REG
1007 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
1008 || GET_CODE (SUBREG_REG (in)) == MEM)
1009 && ((GET_MODE_SIZE (inmode)
1010 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1011 #ifdef LOAD_EXTEND_OP
1012 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1013 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1015 && (GET_MODE_SIZE (inmode)
1016 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1017 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
1018 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
1020 #ifdef WORD_REGISTER_OPERATIONS
1021 || ((GET_MODE_SIZE (inmode)
1022 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1023 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1024 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1028 || (GET_CODE (SUBREG_REG (in)) == REG
1029 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1030 /* The case where out is nonzero
1031 is handled differently in the following statement. */
1032 && (out == 0 || subreg_lowpart_p (in))
1033 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1034 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1036 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1038 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1039 GET_MODE (SUBREG_REG (in)))))
1040 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1041 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1042 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
1043 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1044 GET_MODE (SUBREG_REG (in)),
1048 #ifdef CANNOT_CHANGE_MODE_CLASS
1049 || (GET_CODE (SUBREG_REG (in)) == REG
1050 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1051 && REG_CANNOT_CHANGE_MODE_P
1052 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1056 in_subreg_loc = inloc;
1057 inloc = &SUBREG_REG (in);
1059 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1060 if (GET_CODE (in) == MEM)
1061 /* This is supposed to happen only for paradoxical subregs made by
1062 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1063 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
1066 inmode = GET_MODE (in);
1069 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1070 either M1 is not valid for R or M2 is wider than a word but we only
1071 need one word to store an M2-sized quantity in R.
1073 However, we must reload the inner reg *as well as* the subreg in
1076 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1077 code above. This can happen if SUBREG_BYTE != 0. */
1079 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1081 enum reg_class in_class = class;
1083 if (GET_CODE (SUBREG_REG (in)) == REG)
1085 = find_valid_class (inmode,
1086 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1087 GET_MODE (SUBREG_REG (in)),
1090 REGNO (SUBREG_REG (in)));
1092 /* This relies on the fact that emit_reload_insns outputs the
1093 instructions for input reloads of type RELOAD_OTHER in the same
1094 order as the reloads. Thus if the outer reload is also of type
1095 RELOAD_OTHER, we are guaranteed that this inner reload will be
1096 output before the outer reload. */
1097 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1098 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1099 dont_remove_subreg = 1;
1102 /* Similarly for paradoxical and problematical SUBREGs on the output.
1103 Note that there is no reason we need worry about the previous value
1104 of SUBREG_REG (out); even if wider than out,
1105 storing in a subreg is entitled to clobber it all
1106 (except in the case of STRICT_LOW_PART,
1107 and in that case the constraint should label it input-output.) */
1108 if (out != 0 && GET_CODE (out) == SUBREG
1109 && (subreg_lowpart_p (out) || strict_low)
1110 #ifdef CANNOT_CHANGE_MODE_CLASS
1111 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, class)
1113 && (CONSTANT_P (SUBREG_REG (out))
1115 || (((GET_CODE (SUBREG_REG (out)) == REG
1116 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1117 || GET_CODE (SUBREG_REG (out)) == MEM)
1118 && ((GET_MODE_SIZE (outmode)
1119 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1120 #ifdef WORD_REGISTER_OPERATIONS
1121 || ((GET_MODE_SIZE (outmode)
1122 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1123 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1124 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1128 || (GET_CODE (SUBREG_REG (out)) == REG
1129 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1130 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1131 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1133 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1135 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1136 GET_MODE (SUBREG_REG (out)))))
1137 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1138 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1139 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1140 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1141 GET_MODE (SUBREG_REG (out)),
1145 #ifdef CANNOT_CHANGE_MODE_CLASS
1146 || (GET_CODE (SUBREG_REG (out)) == REG
1147 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1148 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1149 GET_MODE (SUBREG_REG (out)),
1154 out_subreg_loc = outloc;
1155 outloc = &SUBREG_REG (out);
1157 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1158 if (GET_CODE (out) == MEM
1159 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1162 outmode = GET_MODE (out);
1165 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1166 either M1 is not valid for R or M2 is wider than a word but we only
1167 need one word to store an M2-sized quantity in R.
1169 However, we must reload the inner reg *as well as* the subreg in
1170 that case. In this case, the inner reg is an in-out reload. */
1172 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1174 /* This relies on the fact that emit_reload_insns outputs the
1175 instructions for output reloads of type RELOAD_OTHER in reverse
1176 order of the reloads. Thus if the outer reload is also of type
1177 RELOAD_OTHER, we are guaranteed that this inner reload will be
1178 output after the outer reload. */
1179 dont_remove_subreg = 1;
1180 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1182 find_valid_class (outmode,
1183 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1184 GET_MODE (SUBREG_REG (out)),
1187 REGNO (SUBREG_REG (out))),
1188 VOIDmode, VOIDmode, 0, 0,
1189 opnum, RELOAD_OTHER);
1192 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1193 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1194 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1195 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1198 /* If IN is a SUBREG of a hard register, make a new REG. This
1199 simplifies some of the cases below. */
1201 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1202 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1203 && ! dont_remove_subreg)
1204 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1206 /* Similarly for OUT. */
1207 if (out != 0 && GET_CODE (out) == SUBREG
1208 && GET_CODE (SUBREG_REG (out)) == REG
1209 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1210 && ! dont_remove_subreg)
1211 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1213 /* Narrow down the class of register wanted if that is
1214 desirable on this machine for efficiency. */
1216 class = PREFERRED_RELOAD_CLASS (in, class);
1218 /* Output reloads may need analogous treatment, different in detail. */
1219 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1221 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1224 /* Make sure we use a class that can handle the actual pseudo
1225 inside any subreg. For example, on the 386, QImode regs
1226 can appear within SImode subregs. Although GENERAL_REGS
1227 can handle SImode, QImode needs a smaller class. */
1228 #ifdef LIMIT_RELOAD_CLASS
1230 class = LIMIT_RELOAD_CLASS (inmode, class);
1231 else if (in != 0 && GET_CODE (in) == SUBREG)
1232 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1235 class = LIMIT_RELOAD_CLASS (outmode, class);
1236 if (out != 0 && GET_CODE (out) == SUBREG)
1237 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1240 /* Verify that this class is at least possible for the mode that
1242 if (this_insn_is_asm)
1244 enum machine_mode mode;
1245 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1249 if (mode == VOIDmode)
1251 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1256 outmode = word_mode;
1258 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1259 if (HARD_REGNO_MODE_OK (i, mode)
1260 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1262 int nregs = HARD_REGNO_NREGS (i, mode);
1265 for (j = 1; j < nregs; j++)
1266 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1271 if (i == FIRST_PSEUDO_REGISTER)
1273 error_for_asm (this_insn, "impossible register constraint in `asm'");
1278 /* Optional output reloads are always OK even if we have no register class,
1279 since the function of these reloads is only to have spill_reg_store etc.
1280 set, so that the storing insn can be deleted later. */
1281 if (class == NO_REGS
1282 && (optional == 0 || type != RELOAD_FOR_OUTPUT))
1285 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1289 /* See if we need a secondary reload register to move between CLASS
1290 and IN or CLASS and OUT. Get the icode and push any required reloads
1291 needed for each of them if so. */
1293 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1296 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1297 &secondary_in_icode);
1300 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1301 if (out != 0 && GET_CODE (out) != SCRATCH)
1302 secondary_out_reload
1303 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1304 type, &secondary_out_icode);
1307 /* We found no existing reload suitable for re-use.
1308 So add an additional reload. */
1310 #ifdef SECONDARY_MEMORY_NEEDED
1311 /* If a memory location is needed for the copy, make one. */
1312 if (in != 0 && (GET_CODE (in) == REG || GET_CODE (in) == SUBREG)
1313 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1314 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1316 get_secondary_mem (in, inmode, opnum, type);
1322 rld[i].class = class;
1323 rld[i].inmode = inmode;
1324 rld[i].outmode = outmode;
1326 rld[i].optional = optional;
1328 rld[i].nocombine = 0;
1329 rld[i].in_reg = inloc ? *inloc : 0;
1330 rld[i].out_reg = outloc ? *outloc : 0;
1331 rld[i].opnum = opnum;
1332 rld[i].when_needed = type;
1333 rld[i].secondary_in_reload = secondary_in_reload;
1334 rld[i].secondary_out_reload = secondary_out_reload;
1335 rld[i].secondary_in_icode = secondary_in_icode;
1336 rld[i].secondary_out_icode = secondary_out_icode;
1337 rld[i].secondary_p = 0;
1341 #ifdef SECONDARY_MEMORY_NEEDED
1342 if (out != 0 && (GET_CODE (out) == REG || GET_CODE (out) == SUBREG)
1343 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1344 && SECONDARY_MEMORY_NEEDED (class,
1345 REGNO_REG_CLASS (reg_or_subregno (out)),
1347 get_secondary_mem (out, outmode, opnum, type);
1352 /* We are reusing an existing reload,
1353 but we may have additional information for it.
1354 For example, we may now have both IN and OUT
1355 while the old one may have just one of them. */
1357 /* The modes can be different. If they are, we want to reload in
1358 the larger mode, so that the value is valid for both modes. */
1359 if (inmode != VOIDmode
1360 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1361 rld[i].inmode = inmode;
1362 if (outmode != VOIDmode
1363 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1364 rld[i].outmode = outmode;
1367 rtx in_reg = inloc ? *inloc : 0;
1368 /* If we merge reloads for two distinct rtl expressions that
1369 are identical in content, there might be duplicate address
1370 reloads. Remove the extra set now, so that if we later find
1371 that we can inherit this reload, we can get rid of the
1372 address reloads altogether.
1374 Do not do this if both reloads are optional since the result
1375 would be an optional reload which could potentially leave
1376 unresolved address replacements.
1378 It is not sufficient to call transfer_replacements since
1379 choose_reload_regs will remove the replacements for address
1380 reloads of inherited reloads which results in the same
1382 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1383 && ! (rld[i].optional && optional))
1385 /* We must keep the address reload with the lower operand
1387 if (opnum > rld[i].opnum)
1389 remove_address_replacements (in);
1391 in_reg = rld[i].in_reg;
1394 remove_address_replacements (rld[i].in);
1397 rld[i].in_reg = in_reg;
1402 rld[i].out_reg = outloc ? *outloc : 0;
1404 if (reg_class_subset_p (class, rld[i].class))
1405 rld[i].class = class;
1406 rld[i].optional &= optional;
1407 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1408 opnum, rld[i].opnum))
1409 rld[i].when_needed = RELOAD_OTHER;
1410 rld[i].opnum = MIN (rld[i].opnum, opnum);
1413 /* If the ostensible rtx being reloaded differs from the rtx found
1414 in the location to substitute, this reload is not safe to combine
1415 because we cannot reliably tell whether it appears in the insn. */
1417 if (in != 0 && in != *inloc)
1418 rld[i].nocombine = 1;
1421 /* This was replaced by changes in find_reloads_address_1 and the new
1422 function inc_for_reload, which go with a new meaning of reload_inc. */
1424 /* If this is an IN/OUT reload in an insn that sets the CC,
1425 it must be for an autoincrement. It doesn't work to store
1426 the incremented value after the insn because that would clobber the CC.
1427 So we must do the increment of the value reloaded from,
1428 increment it, store it back, then decrement again. */
1429 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1433 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1434 /* If we did not find a nonzero amount-to-increment-by,
1435 that contradicts the belief that IN is being incremented
1436 in an address in this insn. */
1437 if (rld[i].inc == 0)
1442 /* If we will replace IN and OUT with the reload-reg,
1443 record where they are located so that substitution need
1444 not do a tree walk. */
1446 if (replace_reloads)
1450 struct replacement *r = &replacements[n_replacements++];
1452 r->subreg_loc = in_subreg_loc;
1456 if (outloc != 0 && outloc != inloc)
1458 struct replacement *r = &replacements[n_replacements++];
1461 r->subreg_loc = out_subreg_loc;
1466 /* If this reload is just being introduced and it has both
1467 an incoming quantity and an outgoing quantity that are
1468 supposed to be made to match, see if either one of the two
1469 can serve as the place to reload into.
1471 If one of them is acceptable, set rld[i].reg_rtx
1474 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1476 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1479 earlyclobber_operand_p (out));
1481 /* If the outgoing register already contains the same value
1482 as the incoming one, we can dispense with loading it.
1483 The easiest way to tell the caller that is to give a phony
1484 value for the incoming operand (same as outgoing one). */
1485 if (rld[i].reg_rtx == out
1486 && (GET_CODE (in) == REG || CONSTANT_P (in))
1487 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1488 static_reload_reg_p, i, inmode))
1492 /* If this is an input reload and the operand contains a register that
1493 dies in this insn and is used nowhere else, see if it is the right class
1494 to be used for this reload. Use it if so. (This occurs most commonly
1495 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1496 this if it is also an output reload that mentions the register unless
1497 the output is a SUBREG that clobbers an entire register.
1499 Note that the operand might be one of the spill regs, if it is a
1500 pseudo reg and we are in a block where spilling has not taken place.
1501 But if there is no spilling in this block, that is OK.
1502 An explicitly used hard reg cannot be a spill reg. */
1504 if (rld[i].reg_rtx == 0 && in != 0)
1508 enum machine_mode rel_mode = inmode;
1510 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1513 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1514 if (REG_NOTE_KIND (note) == REG_DEAD
1515 && GET_CODE (XEXP (note, 0)) == REG
1516 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1517 && reg_mentioned_p (XEXP (note, 0), in)
1518 && ! refers_to_regno_for_reload_p (regno,
1520 + HARD_REGNO_NREGS (regno,
1522 PATTERN (this_insn), inloc)
1523 /* If this is also an output reload, IN cannot be used as
1524 the reload register if it is set in this insn unless IN
1526 && (out == 0 || in == out
1527 || ! hard_reg_set_here_p (regno,
1529 + HARD_REGNO_NREGS (regno,
1531 PATTERN (this_insn)))
1532 /* ??? Why is this code so different from the previous?
1533 Is there any simple coherent way to describe the two together?
1534 What's going on here. */
1536 || (GET_CODE (in) == SUBREG
1537 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1539 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1540 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1541 /* Make sure the operand fits in the reg that dies. */
1542 && (GET_MODE_SIZE (rel_mode)
1543 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1544 && HARD_REGNO_MODE_OK (regno, inmode)
1545 && HARD_REGNO_MODE_OK (regno, outmode))
1548 unsigned int nregs = MAX (HARD_REGNO_NREGS (regno, inmode),
1549 HARD_REGNO_NREGS (regno, outmode));
1551 for (offs = 0; offs < nregs; offs++)
1552 if (fixed_regs[regno + offs]
1553 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1558 && (! (refers_to_regno_for_reload_p
1559 (regno, (regno + HARD_REGNO_NREGS (regno, inmode)),
1561 || can_reload_into (in, regno, inmode)))
1563 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1570 output_reloadnum = i;
1575 /* Record an additional place we must replace a value
1576 for which we have already recorded a reload.
1577 RELOADNUM is the value returned by push_reload
1578 when the reload was recorded.
1579 This is used in insn patterns that use match_dup. */
1582 push_replacement (rtx *loc, int reloadnum, enum machine_mode mode)
1584 if (replace_reloads)
1586 struct replacement *r = &replacements[n_replacements++];
1587 r->what = reloadnum;
1594 /* Duplicate any replacement we have recorded to apply at
1595 location ORIG_LOC to also be performed at DUP_LOC.
1596 This is used in insn patterns that use match_dup. */
1599 dup_replacements (rtx *dup_loc, rtx *orig_loc)
1601 int i, n = n_replacements;
1603 for (i = 0; i < n; i++)
1605 struct replacement *r = &replacements[i];
1606 if (r->where == orig_loc)
1607 push_replacement (dup_loc, r->what, r->mode);
1611 /* Transfer all replacements that used to be in reload FROM to be in
1615 transfer_replacements (int to, int from)
1619 for (i = 0; i < n_replacements; i++)
1620 if (replacements[i].what == from)
1621 replacements[i].what = to;
1624 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1625 or a subpart of it. If we have any replacements registered for IN_RTX,
1626 cancel the reloads that were supposed to load them.
1627 Return nonzero if we canceled any reloads. */
1629 remove_address_replacements (rtx in_rtx)
1632 char reload_flags[MAX_RELOADS];
1633 int something_changed = 0;
1635 memset (reload_flags, 0, sizeof reload_flags);
1636 for (i = 0, j = 0; i < n_replacements; i++)
1638 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1639 reload_flags[replacements[i].what] |= 1;
1642 replacements[j++] = replacements[i];
1643 reload_flags[replacements[i].what] |= 2;
1646 /* Note that the following store must be done before the recursive calls. */
1649 for (i = n_reloads - 1; i >= 0; i--)
1651 if (reload_flags[i] == 1)
1653 deallocate_reload_reg (i);
1654 remove_address_replacements (rld[i].in);
1656 something_changed = 1;
1659 return something_changed;
1662 /* If there is only one output reload, and it is not for an earlyclobber
1663 operand, try to combine it with a (logically unrelated) input reload
1664 to reduce the number of reload registers needed.
1666 This is safe if the input reload does not appear in
1667 the value being output-reloaded, because this implies
1668 it is not needed any more once the original insn completes.
1670 If that doesn't work, see we can use any of the registers that
1671 die in this insn as a reload register. We can if it is of the right
1672 class and does not appear in the value being output-reloaded. */
1675 combine_reloads (void)
1678 int output_reload = -1;
1679 int secondary_out = -1;
1682 /* Find the output reload; return unless there is exactly one
1683 and that one is mandatory. */
1685 for (i = 0; i < n_reloads; i++)
1686 if (rld[i].out != 0)
1688 if (output_reload >= 0)
1693 if (output_reload < 0 || rld[output_reload].optional)
1696 /* An input-output reload isn't combinable. */
1698 if (rld[output_reload].in != 0)
1701 /* If this reload is for an earlyclobber operand, we can't do anything. */
1702 if (earlyclobber_operand_p (rld[output_reload].out))
1705 /* If there is a reload for part of the address of this operand, we would
1706 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1707 its life to the point where doing this combine would not lower the
1708 number of spill registers needed. */
1709 for (i = 0; i < n_reloads; i++)
1710 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1711 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1712 && rld[i].opnum == rld[output_reload].opnum)
1715 /* Check each input reload; can we combine it? */
1717 for (i = 0; i < n_reloads; i++)
1718 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1719 /* Life span of this reload must not extend past main insn. */
1720 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1721 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1722 && rld[i].when_needed != RELOAD_OTHER
1723 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1724 == CLASS_MAX_NREGS (rld[output_reload].class,
1725 rld[output_reload].outmode))
1727 && rld[i].reg_rtx == 0
1728 #ifdef SECONDARY_MEMORY_NEEDED
1729 /* Don't combine two reloads with different secondary
1730 memory locations. */
1731 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1732 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1733 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1734 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1736 && (SMALL_REGISTER_CLASSES
1737 ? (rld[i].class == rld[output_reload].class)
1738 : (reg_class_subset_p (rld[i].class,
1739 rld[output_reload].class)
1740 || reg_class_subset_p (rld[output_reload].class,
1742 && (MATCHES (rld[i].in, rld[output_reload].out)
1743 /* Args reversed because the first arg seems to be
1744 the one that we imagine being modified
1745 while the second is the one that might be affected. */
1746 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1748 /* However, if the input is a register that appears inside
1749 the output, then we also can't share.
1750 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1751 If the same reload reg is used for both reg 69 and the
1752 result to be stored in memory, then that result
1753 will clobber the address of the memory ref. */
1754 && ! (GET_CODE (rld[i].in) == REG
1755 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1756 rld[output_reload].out))))
1757 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1758 rld[i].when_needed != RELOAD_FOR_INPUT)
1759 && (reg_class_size[(int) rld[i].class]
1760 || SMALL_REGISTER_CLASSES)
1761 /* We will allow making things slightly worse by combining an
1762 input and an output, but no worse than that. */
1763 && (rld[i].when_needed == RELOAD_FOR_INPUT
1764 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1768 /* We have found a reload to combine with! */
1769 rld[i].out = rld[output_reload].out;
1770 rld[i].out_reg = rld[output_reload].out_reg;
1771 rld[i].outmode = rld[output_reload].outmode;
1772 /* Mark the old output reload as inoperative. */
1773 rld[output_reload].out = 0;
1774 /* The combined reload is needed for the entire insn. */
1775 rld[i].when_needed = RELOAD_OTHER;
1776 /* If the output reload had a secondary reload, copy it. */
1777 if (rld[output_reload].secondary_out_reload != -1)
1779 rld[i].secondary_out_reload
1780 = rld[output_reload].secondary_out_reload;
1781 rld[i].secondary_out_icode
1782 = rld[output_reload].secondary_out_icode;
1785 #ifdef SECONDARY_MEMORY_NEEDED
1786 /* Copy any secondary MEM. */
1787 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1788 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1789 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1791 /* If required, minimize the register class. */
1792 if (reg_class_subset_p (rld[output_reload].class,
1794 rld[i].class = rld[output_reload].class;
1796 /* Transfer all replacements from the old reload to the combined. */
1797 for (j = 0; j < n_replacements; j++)
1798 if (replacements[j].what == output_reload)
1799 replacements[j].what = i;
1804 /* If this insn has only one operand that is modified or written (assumed
1805 to be the first), it must be the one corresponding to this reload. It
1806 is safe to use anything that dies in this insn for that output provided
1807 that it does not occur in the output (we already know it isn't an
1808 earlyclobber. If this is an asm insn, give up. */
1810 if (INSN_CODE (this_insn) == -1)
1813 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1814 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1815 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1818 /* See if some hard register that dies in this insn and is not used in
1819 the output is the right class. Only works if the register we pick
1820 up can fully hold our output reload. */
1821 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1822 if (REG_NOTE_KIND (note) == REG_DEAD
1823 && GET_CODE (XEXP (note, 0)) == REG
1824 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1825 rld[output_reload].out)
1826 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1827 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1828 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1829 REGNO (XEXP (note, 0)))
1830 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1831 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1832 /* Ensure that a secondary or tertiary reload for this output
1833 won't want this register. */
1834 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1835 || (! (TEST_HARD_REG_BIT
1836 (reg_class_contents[(int) rld[secondary_out].class],
1837 REGNO (XEXP (note, 0))))
1838 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1839 || ! (TEST_HARD_REG_BIT
1840 (reg_class_contents[(int) rld[secondary_out].class],
1841 REGNO (XEXP (note, 0)))))))
1842 && ! fixed_regs[REGNO (XEXP (note, 0))])
1844 rld[output_reload].reg_rtx
1845 = gen_rtx_REG (rld[output_reload].outmode,
1846 REGNO (XEXP (note, 0)));
1851 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1852 See if one of IN and OUT is a register that may be used;
1853 this is desirable since a spill-register won't be needed.
1854 If so, return the register rtx that proves acceptable.
1856 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1857 CLASS is the register class required for the reload.
1859 If FOR_REAL is >= 0, it is the number of the reload,
1860 and in some cases when it can be discovered that OUT doesn't need
1861 to be computed, clear out rld[FOR_REAL].out.
1863 If FOR_REAL is -1, this should not be done, because this call
1864 is just to see if a register can be found, not to find and install it.
1866 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1867 puts an additional constraint on being able to use IN for OUT since
1868 IN must not appear elsewhere in the insn (it is assumed that IN itself
1869 is safe from the earlyclobber). */
1872 find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
1873 enum machine_mode inmode, enum machine_mode outmode,
1874 enum reg_class class, int for_real, int earlyclobber)
1882 /* If operands exceed a word, we can't use either of them
1883 unless they have the same size. */
1884 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1885 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1886 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1889 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1890 respectively refers to a hard register. */
1892 /* Find the inside of any subregs. */
1893 while (GET_CODE (out) == SUBREG)
1895 if (GET_CODE (SUBREG_REG (out)) == REG
1896 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1897 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1898 GET_MODE (SUBREG_REG (out)),
1901 out = SUBREG_REG (out);
1903 while (GET_CODE (in) == SUBREG)
1905 if (GET_CODE (SUBREG_REG (in)) == REG
1906 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1907 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1908 GET_MODE (SUBREG_REG (in)),
1911 in = SUBREG_REG (in);
1914 /* Narrow down the reg class, the same way push_reload will;
1915 otherwise we might find a dummy now, but push_reload won't. */
1916 class = PREFERRED_RELOAD_CLASS (in, class);
1918 /* See if OUT will do. */
1919 if (GET_CODE (out) == REG
1920 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1922 unsigned int regno = REGNO (out) + out_offset;
1923 unsigned int nwords = HARD_REGNO_NREGS (regno, outmode);
1926 /* When we consider whether the insn uses OUT,
1927 ignore references within IN. They don't prevent us
1928 from copying IN into OUT, because those refs would
1929 move into the insn that reloads IN.
1931 However, we only ignore IN in its role as this reload.
1932 If the insn uses IN elsewhere and it contains OUT,
1933 that counts. We can't be sure it's the "same" operand
1934 so it might not go through this reload. */
1936 *inloc = const0_rtx;
1938 if (regno < FIRST_PSEUDO_REGISTER
1939 && HARD_REGNO_MODE_OK (regno, outmode)
1940 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1941 PATTERN (this_insn), outloc))
1945 for (i = 0; i < nwords; i++)
1946 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1952 if (GET_CODE (real_out) == REG)
1955 value = gen_rtx_REG (outmode, regno);
1962 /* Consider using IN if OUT was not acceptable
1963 or if OUT dies in this insn (like the quotient in a divmod insn).
1964 We can't use IN unless it is dies in this insn,
1965 which means we must know accurately which hard regs are live.
1966 Also, the result can't go in IN if IN is used within OUT,
1967 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1968 if (hard_regs_live_known
1969 && GET_CODE (in) == REG
1970 && REGNO (in) < FIRST_PSEUDO_REGISTER
1972 || find_reg_note (this_insn, REG_UNUSED, real_out))
1973 && find_reg_note (this_insn, REG_DEAD, real_in)
1974 && !fixed_regs[REGNO (in)]
1975 && HARD_REGNO_MODE_OK (REGNO (in),
1976 /* The only case where out and real_out might
1977 have different modes is where real_out
1978 is a subreg, and in that case, out
1980 (GET_MODE (out) != VOIDmode
1981 ? GET_MODE (out) : outmode)))
1983 unsigned int regno = REGNO (in) + in_offset;
1984 unsigned int nwords = HARD_REGNO_NREGS (regno, inmode);
1986 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
1987 && ! hard_reg_set_here_p (regno, regno + nwords,
1988 PATTERN (this_insn))
1990 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1991 PATTERN (this_insn), inloc)))
1995 for (i = 0; i < nwords; i++)
1996 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
2002 /* If we were going to use OUT as the reload reg
2003 and changed our mind, it means OUT is a dummy that
2004 dies here. So don't bother copying value to it. */
2005 if (for_real >= 0 && value == real_out)
2006 rld[for_real].out = 0;
2007 if (GET_CODE (real_in) == REG)
2010 value = gen_rtx_REG (inmode, regno);
2018 /* This page contains subroutines used mainly for determining
2019 whether the IN or an OUT of a reload can serve as the
2022 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2025 earlyclobber_operand_p (rtx x)
2029 for (i = 0; i < n_earlyclobbers; i++)
2030 if (reload_earlyclobbers[i] == x)
2036 /* Return 1 if expression X alters a hard reg in the range
2037 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2038 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2039 X should be the body of an instruction. */
2042 hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x)
2044 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2046 rtx op0 = SET_DEST (x);
2048 while (GET_CODE (op0) == SUBREG)
2049 op0 = SUBREG_REG (op0);
2050 if (GET_CODE (op0) == REG)
2052 unsigned int r = REGNO (op0);
2054 /* See if this reg overlaps range under consideration. */
2056 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
2060 else if (GET_CODE (x) == PARALLEL)
2062 int i = XVECLEN (x, 0) - 1;
2065 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2072 /* Return 1 if ADDR is a valid memory address for mode MODE,
2073 and check that each pseudo reg has the proper kind of
2077 strict_memory_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx addr)
2079 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2086 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2087 if they are the same hard reg, and has special hacks for
2088 autoincrement and autodecrement.
2089 This is specifically intended for find_reloads to use
2090 in determining whether two operands match.
2091 X is the operand whose number is the lower of the two.
2093 The value is 2 if Y contains a pre-increment that matches
2094 a non-incrementing address in X. */
2096 /* ??? To be completely correct, we should arrange to pass
2097 for X the output operand and for Y the input operand.
2098 For now, we assume that the output operand has the lower number
2099 because that is natural in (SET output (... input ...)). */
2102 operands_match_p (rtx x, rtx y)
2105 RTX_CODE code = GET_CODE (x);
2111 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2112 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2113 && GET_CODE (SUBREG_REG (y)) == REG)))
2119 i = REGNO (SUBREG_REG (x));
2120 if (i >= FIRST_PSEUDO_REGISTER)
2122 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2123 GET_MODE (SUBREG_REG (x)),
2130 if (GET_CODE (y) == SUBREG)
2132 j = REGNO (SUBREG_REG (y));
2133 if (j >= FIRST_PSEUDO_REGISTER)
2135 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2136 GET_MODE (SUBREG_REG (y)),
2143 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2144 multiple hard register group, so that for example (reg:DI 0) and
2145 (reg:SI 1) will be considered the same register. */
2146 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2147 && i < FIRST_PSEUDO_REGISTER)
2148 i += HARD_REGNO_NREGS (i, GET_MODE (x)) - 1;
2149 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2150 && j < FIRST_PSEUDO_REGISTER)
2151 j += HARD_REGNO_NREGS (j, GET_MODE (y)) - 1;
2155 /* If two operands must match, because they are really a single
2156 operand of an assembler insn, then two postincrements are invalid
2157 because the assembler insn would increment only once.
2158 On the other hand, a postincrement matches ordinary indexing
2159 if the postincrement is the output operand. */
2160 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2161 return operands_match_p (XEXP (x, 0), y);
2162 /* Two preincrements are invalid
2163 because the assembler insn would increment only once.
2164 On the other hand, a preincrement matches ordinary indexing
2165 if the preincrement is the input operand.
2166 In this case, return 2, since some callers need to do special
2167 things when this happens. */
2168 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2169 || GET_CODE (y) == PRE_MODIFY)
2170 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2174 /* Now we have disposed of all the cases
2175 in which different rtx codes can match. */
2176 if (code != GET_CODE (y))
2178 if (code == LABEL_REF)
2179 return XEXP (x, 0) == XEXP (y, 0);
2180 if (code == SYMBOL_REF)
2181 return XSTR (x, 0) == XSTR (y, 0);
2183 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2185 if (GET_MODE (x) != GET_MODE (y))
2188 /* Compare the elements. If any pair of corresponding elements
2189 fail to match, return 0 for the whole things. */
2192 fmt = GET_RTX_FORMAT (code);
2193 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2199 if (XWINT (x, i) != XWINT (y, i))
2204 if (XINT (x, i) != XINT (y, i))
2209 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2212 /* If any subexpression returns 2,
2213 we should return 2 if we are successful. */
2222 if (XVECLEN (x, i) != XVECLEN (y, i))
2224 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2226 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2234 /* It is believed that rtx's at this level will never
2235 contain anything but integers and other rtx's,
2236 except for within LABEL_REFs and SYMBOL_REFs. */
2241 return 1 + success_2;
2244 /* Describe the range of registers or memory referenced by X.
2245 If X is a register, set REG_FLAG and put the first register
2246 number into START and the last plus one into END.
2247 If X is a memory reference, put a base address into BASE
2248 and a range of integer offsets into START and END.
2249 If X is pushing on the stack, we can assume it causes no trouble,
2250 so we set the SAFE field. */
2252 static struct decomposition
2255 struct decomposition val;
2261 if (GET_CODE (x) == MEM)
2263 rtx base = NULL_RTX, offset = 0;
2264 rtx addr = XEXP (x, 0);
2266 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2267 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2269 val.base = XEXP (addr, 0);
2270 val.start = -GET_MODE_SIZE (GET_MODE (x));
2271 val.end = GET_MODE_SIZE (GET_MODE (x));
2272 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2276 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2278 if (GET_CODE (XEXP (addr, 1)) == PLUS
2279 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2280 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2282 val.base = XEXP (addr, 0);
2283 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2284 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2285 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2290 if (GET_CODE (addr) == CONST)
2292 addr = XEXP (addr, 0);
2295 if (GET_CODE (addr) == PLUS)
2297 if (CONSTANT_P (XEXP (addr, 0)))
2299 base = XEXP (addr, 1);
2300 offset = XEXP (addr, 0);
2302 else if (CONSTANT_P (XEXP (addr, 1)))
2304 base = XEXP (addr, 0);
2305 offset = XEXP (addr, 1);
2312 offset = const0_rtx;
2314 if (GET_CODE (offset) == CONST)
2315 offset = XEXP (offset, 0);
2316 if (GET_CODE (offset) == PLUS)
2318 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2320 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2321 offset = XEXP (offset, 0);
2323 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2325 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2326 offset = XEXP (offset, 1);
2330 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2331 offset = const0_rtx;
2334 else if (GET_CODE (offset) != CONST_INT)
2336 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2337 offset = const0_rtx;
2340 if (all_const && GET_CODE (base) == PLUS)
2341 base = gen_rtx_CONST (GET_MODE (base), base);
2343 if (GET_CODE (offset) != CONST_INT)
2346 val.start = INTVAL (offset);
2347 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2351 else if (GET_CODE (x) == REG)
2354 val.start = true_regnum (x);
2357 /* A pseudo with no hard reg. */
2358 val.start = REGNO (x);
2359 val.end = val.start + 1;
2363 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2365 else if (GET_CODE (x) == SUBREG)
2367 if (GET_CODE (SUBREG_REG (x)) != REG)
2368 /* This could be more precise, but it's good enough. */
2369 return decompose (SUBREG_REG (x));
2371 val.start = true_regnum (x);
2373 return decompose (SUBREG_REG (x));
2376 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2378 else if (CONSTANT_P (x)
2379 /* This hasn't been assigned yet, so it can't conflict yet. */
2380 || GET_CODE (x) == SCRATCH)
2387 /* Return 1 if altering Y will not modify the value of X.
2388 Y is also described by YDATA, which should be decompose (Y). */
2391 immune_p (rtx x, rtx y, struct decomposition ydata)
2393 struct decomposition xdata;
2396 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2400 if (GET_CODE (y) != MEM)
2402 /* If Y is memory and X is not, Y can't affect X. */
2403 if (GET_CODE (x) != MEM)
2406 xdata = decompose (x);
2408 if (! rtx_equal_p (xdata.base, ydata.base))
2410 /* If bases are distinct symbolic constants, there is no overlap. */
2411 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2413 /* Constants and stack slots never overlap. */
2414 if (CONSTANT_P (xdata.base)
2415 && (ydata.base == frame_pointer_rtx
2416 || ydata.base == hard_frame_pointer_rtx
2417 || ydata.base == stack_pointer_rtx))
2419 if (CONSTANT_P (ydata.base)
2420 && (xdata.base == frame_pointer_rtx
2421 || xdata.base == hard_frame_pointer_rtx
2422 || xdata.base == stack_pointer_rtx))
2424 /* If either base is variable, we don't know anything. */
2428 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2431 /* Similar, but calls decompose. */
2434 safe_from_earlyclobber (rtx op, rtx clobber)
2436 struct decomposition early_data;
2438 early_data = decompose (clobber);
2439 return immune_p (op, clobber, early_data);
2442 /* Main entry point of this file: search the body of INSN
2443 for values that need reloading and record them with push_reload.
2444 REPLACE nonzero means record also where the values occur
2445 so that subst_reloads can be used.
2447 IND_LEVELS says how many levels of indirection are supported by this
2448 machine; a value of zero means that a memory reference is not a valid
2451 LIVE_KNOWN says we have valid information about which hard
2452 regs are live at each point in the program; this is true when
2453 we are called from global_alloc but false when stupid register
2454 allocation has been done.
2456 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2457 which is nonnegative if the reg has been commandeered for reloading into.
2458 It is copied into STATIC_RELOAD_REG_P and referenced from there
2459 by various subroutines.
2461 Return TRUE if some operands need to be changed, because of swapping
2462 commutative operands, reg_equiv_address substitution, or whatever. */
2465 find_reloads (rtx insn, int replace, int ind_levels, int live_known,
2466 short *reload_reg_p)
2468 int insn_code_number;
2471 /* These start out as the constraints for the insn
2472 and they are chewed up as we consider alternatives. */
2473 char *constraints[MAX_RECOG_OPERANDS];
2474 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2476 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2477 char pref_or_nothing[MAX_RECOG_OPERANDS];
2478 /* Nonzero for a MEM operand whose entire address needs a reload. */
2479 int address_reloaded[MAX_RECOG_OPERANDS];
2480 /* Nonzero for an address operand that needs to be completely reloaded. */
2481 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2482 /* Value of enum reload_type to use for operand. */
2483 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2484 /* Value of enum reload_type to use within address of operand. */
2485 enum reload_type address_type[MAX_RECOG_OPERANDS];
2486 /* Save the usage of each operand. */
2487 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2488 int no_input_reloads = 0, no_output_reloads = 0;
2490 int this_alternative[MAX_RECOG_OPERANDS];
2491 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2492 char this_alternative_win[MAX_RECOG_OPERANDS];
2493 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2494 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2495 int this_alternative_matches[MAX_RECOG_OPERANDS];
2497 int goal_alternative[MAX_RECOG_OPERANDS];
2498 int this_alternative_number;
2499 int goal_alternative_number = 0;
2500 int operand_reloadnum[MAX_RECOG_OPERANDS];
2501 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2502 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2503 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2504 char goal_alternative_win[MAX_RECOG_OPERANDS];
2505 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2506 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2507 int goal_alternative_swapped;
2510 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2511 rtx substed_operand[MAX_RECOG_OPERANDS];
2512 rtx body = PATTERN (insn);
2513 rtx set = single_set (insn);
2514 int goal_earlyclobber = 0, this_earlyclobber;
2515 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2521 n_earlyclobbers = 0;
2522 replace_reloads = replace;
2523 hard_regs_live_known = live_known;
2524 static_reload_reg_p = reload_reg_p;
2526 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2527 neither are insns that SET cc0. Insns that use CC0 are not allowed
2528 to have any input reloads. */
2529 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2530 no_output_reloads = 1;
2533 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2534 no_input_reloads = 1;
2535 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2536 no_output_reloads = 1;
2539 #ifdef SECONDARY_MEMORY_NEEDED
2540 /* The eliminated forms of any secondary memory locations are per-insn, so
2541 clear them out here. */
2543 memset (secondary_memlocs_elim, 0, sizeof secondary_memlocs_elim);
2546 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2547 is cheap to move between them. If it is not, there may not be an insn
2548 to do the copy, so we may need a reload. */
2549 if (GET_CODE (body) == SET
2550 && GET_CODE (SET_DEST (body)) == REG
2551 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2552 && GET_CODE (SET_SRC (body)) == REG
2553 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2554 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2555 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2556 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2559 extract_insn (insn);
2561 noperands = reload_n_operands = recog_data.n_operands;
2562 n_alternatives = recog_data.n_alternatives;
2564 /* Just return "no reloads" if insn has no operands with constraints. */
2565 if (noperands == 0 || n_alternatives == 0)
2568 insn_code_number = INSN_CODE (insn);
2569 this_insn_is_asm = insn_code_number < 0;
2571 memcpy (operand_mode, recog_data.operand_mode,
2572 noperands * sizeof (enum machine_mode));
2573 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2577 /* If we will need to know, later, whether some pair of operands
2578 are the same, we must compare them now and save the result.
2579 Reloading the base and index registers will clobber them
2580 and afterward they will fail to match. */
2582 for (i = 0; i < noperands; i++)
2587 substed_operand[i] = recog_data.operand[i];
2590 modified[i] = RELOAD_READ;
2592 /* Scan this operand's constraint to see if it is an output operand,
2593 an in-out operand, is commutative, or should match another. */
2597 p += CONSTRAINT_LEN (c, p);
2599 modified[i] = RELOAD_WRITE;
2601 modified[i] = RELOAD_READ_WRITE;
2604 /* The last operand should not be marked commutative. */
2605 if (i == noperands - 1)
2608 /* We currently only support one commutative pair of
2609 operands. Some existing asm code currently uses more
2610 than one pair. Previously, that would usually work,
2611 but sometimes it would crash the compiler. We
2612 continue supporting that case as well as we can by
2613 silently ignoring all but the first pair. In the
2614 future we may handle it correctly. */
2615 if (commutative < 0)
2617 else if (!this_insn_is_asm)
2620 else if (ISDIGIT (c))
2622 c = strtoul (p - 1, &p, 10);
2624 operands_match[c][i]
2625 = operands_match_p (recog_data.operand[c],
2626 recog_data.operand[i]);
2628 /* An operand may not match itself. */
2632 /* If C can be commuted with C+1, and C might need to match I,
2633 then C+1 might also need to match I. */
2634 if (commutative >= 0)
2636 if (c == commutative || c == commutative + 1)
2638 int other = c + (c == commutative ? 1 : -1);
2639 operands_match[other][i]
2640 = operands_match_p (recog_data.operand[other],
2641 recog_data.operand[i]);
2643 if (i == commutative || i == commutative + 1)
2645 int other = i + (i == commutative ? 1 : -1);
2646 operands_match[c][other]
2647 = operands_match_p (recog_data.operand[c],
2648 recog_data.operand[other]);
2650 /* Note that C is supposed to be less than I.
2651 No need to consider altering both C and I because in
2652 that case we would alter one into the other. */
2658 /* Examine each operand that is a memory reference or memory address
2659 and reload parts of the addresses into index registers.
2660 Also here any references to pseudo regs that didn't get hard regs
2661 but are equivalent to constants get replaced in the insn itself
2662 with those constants. Nobody will ever see them again.
2664 Finally, set up the preferred classes of each operand. */
2666 for (i = 0; i < noperands; i++)
2668 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2670 address_reloaded[i] = 0;
2671 address_operand_reloaded[i] = 0;
2672 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2673 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2676 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2677 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2680 if (*constraints[i] == 0)
2681 /* Ignore things like match_operator operands. */
2683 else if (constraints[i][0] == 'p'
2684 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
2686 address_operand_reloaded[i]
2687 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2688 recog_data.operand[i],
2689 recog_data.operand_loc[i],
2690 i, operand_type[i], ind_levels, insn);
2692 /* If we now have a simple operand where we used to have a
2693 PLUS or MULT, re-recognize and try again. */
2694 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
2695 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2696 && (GET_CODE (recog_data.operand[i]) == MULT
2697 || GET_CODE (recog_data.operand[i]) == PLUS))
2699 INSN_CODE (insn) = -1;
2700 retval = find_reloads (insn, replace, ind_levels, live_known,
2705 recog_data.operand[i] = *recog_data.operand_loc[i];
2706 substed_operand[i] = recog_data.operand[i];
2708 /* Address operands are reloaded in their existing mode,
2709 no matter what is specified in the machine description. */
2710 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2712 else if (code == MEM)
2715 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2716 recog_data.operand_loc[i],
2717 XEXP (recog_data.operand[i], 0),
2718 &XEXP (recog_data.operand[i], 0),
2719 i, address_type[i], ind_levels, insn);
2720 recog_data.operand[i] = *recog_data.operand_loc[i];
2721 substed_operand[i] = recog_data.operand[i];
2723 else if (code == SUBREG)
2725 rtx reg = SUBREG_REG (recog_data.operand[i]);
2727 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2730 && &SET_DEST (set) == recog_data.operand_loc[i],
2732 &address_reloaded[i]);
2734 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2735 that didn't get a hard register, emit a USE with a REG_EQUAL
2736 note in front so that we might inherit a previous, possibly
2740 && GET_CODE (op) == MEM
2741 && GET_CODE (reg) == REG
2742 && (GET_MODE_SIZE (GET_MODE (reg))
2743 >= GET_MODE_SIZE (GET_MODE (op))))
2744 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2746 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2748 substed_operand[i] = recog_data.operand[i] = op;
2750 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2751 /* We can get a PLUS as an "operand" as a result of register
2752 elimination. See eliminate_regs and gen_reload. We handle
2753 a unary operator by reloading the operand. */
2754 substed_operand[i] = recog_data.operand[i]
2755 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2756 ind_levels, 0, insn,
2757 &address_reloaded[i]);
2758 else if (code == REG)
2760 /* This is equivalent to calling find_reloads_toplev.
2761 The code is duplicated for speed.
2762 When we find a pseudo always equivalent to a constant,
2763 we replace it by the constant. We must be sure, however,
2764 that we don't try to replace it in the insn in which it
2766 int regno = REGNO (recog_data.operand[i]);
2767 if (reg_equiv_constant[regno] != 0
2768 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2770 /* Record the existing mode so that the check if constants are
2771 allowed will work when operand_mode isn't specified. */
2773 if (operand_mode[i] == VOIDmode)
2774 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2776 substed_operand[i] = recog_data.operand[i]
2777 = reg_equiv_constant[regno];
2779 if (reg_equiv_memory_loc[regno] != 0
2780 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2781 /* We need not give a valid is_set_dest argument since the case
2782 of a constant equivalence was checked above. */
2783 substed_operand[i] = recog_data.operand[i]
2784 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2785 ind_levels, 0, insn,
2786 &address_reloaded[i]);
2788 /* If the operand is still a register (we didn't replace it with an
2789 equivalent), get the preferred class to reload it into. */
2790 code = GET_CODE (recog_data.operand[i]);
2792 = ((code == REG && REGNO (recog_data.operand[i])
2793 >= FIRST_PSEUDO_REGISTER)
2794 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2798 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2799 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2802 /* If this is simply a copy from operand 1 to operand 0, merge the
2803 preferred classes for the operands. */
2804 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2805 && recog_data.operand[1] == SET_SRC (set))
2807 preferred_class[0] = preferred_class[1]
2808 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2809 pref_or_nothing[0] |= pref_or_nothing[1];
2810 pref_or_nothing[1] |= pref_or_nothing[0];
2813 /* Now see what we need for pseudo-regs that didn't get hard regs
2814 or got the wrong kind of hard reg. For this, we must consider
2815 all the operands together against the register constraints. */
2817 best = MAX_RECOG_OPERANDS * 2 + 600;
2820 goal_alternative_swapped = 0;
2823 /* The constraints are made of several alternatives.
2824 Each operand's constraint looks like foo,bar,... with commas
2825 separating the alternatives. The first alternatives for all
2826 operands go together, the second alternatives go together, etc.
2828 First loop over alternatives. */
2830 for (this_alternative_number = 0;
2831 this_alternative_number < n_alternatives;
2832 this_alternative_number++)
2834 /* Loop over operands for one constraint alternative. */
2835 /* LOSERS counts those that don't fit this alternative
2836 and would require loading. */
2838 /* BAD is set to 1 if it some operand can't fit this alternative
2839 even after reloading. */
2841 /* REJECT is a count of how undesirable this alternative says it is
2842 if any reloading is required. If the alternative matches exactly
2843 then REJECT is ignored, but otherwise it gets this much
2844 counted against it in addition to the reloading needed. Each
2845 ? counts three times here since we want the disparaging caused by
2846 a bad register class to only count 1/3 as much. */
2849 this_earlyclobber = 0;
2851 for (i = 0; i < noperands; i++)
2853 char *p = constraints[i];
2858 /* 0 => this operand can be reloaded somehow for this alternative. */
2860 /* 0 => this operand can be reloaded if the alternative allows regs. */
2864 rtx operand = recog_data.operand[i];
2866 /* Nonzero means this is a MEM that must be reloaded into a reg
2867 regardless of what the constraint says. */
2868 int force_reload = 0;
2870 /* Nonzero if a constant forced into memory would be OK for this
2873 int earlyclobber = 0;
2875 /* If the predicate accepts a unary operator, it means that
2876 we need to reload the operand, but do not do this for
2877 match_operator and friends. */
2878 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2879 operand = XEXP (operand, 0);
2881 /* If the operand is a SUBREG, extract
2882 the REG or MEM (or maybe even a constant) within.
2883 (Constants can occur as a result of reg_equiv_constant.) */
2885 while (GET_CODE (operand) == SUBREG)
2887 /* Offset only matters when operand is a REG and
2888 it is a hard reg. This is because it is passed
2889 to reg_fits_class_p if it is a REG and all pseudos
2890 return 0 from that function. */
2891 if (GET_CODE (SUBREG_REG (operand)) == REG
2892 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2894 if (!subreg_offset_representable_p
2895 (REGNO (SUBREG_REG (operand)),
2896 GET_MODE (SUBREG_REG (operand)),
2897 SUBREG_BYTE (operand),
2898 GET_MODE (operand)))
2900 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2901 GET_MODE (SUBREG_REG (operand)),
2902 SUBREG_BYTE (operand),
2903 GET_MODE (operand));
2905 operand = SUBREG_REG (operand);
2906 /* Force reload if this is a constant or PLUS or if there may
2907 be a problem accessing OPERAND in the outer mode. */
2908 if (CONSTANT_P (operand)
2909 || GET_CODE (operand) == PLUS
2910 /* We must force a reload of paradoxical SUBREGs
2911 of a MEM because the alignment of the inner value
2912 may not be enough to do the outer reference. On
2913 big-endian machines, it may also reference outside
2916 On machines that extend byte operations and we have a
2917 SUBREG where both the inner and outer modes are no wider
2918 than a word and the inner mode is narrower, is integral,
2919 and gets extended when loaded from memory, combine.c has
2920 made assumptions about the behavior of the machine in such
2921 register access. If the data is, in fact, in memory we
2922 must always load using the size assumed to be in the
2923 register and let the insn do the different-sized
2926 This is doubly true if WORD_REGISTER_OPERATIONS. In
2927 this case eliminate_regs has left non-paradoxical
2928 subregs for push_reload to see. Make sure it does
2929 by forcing the reload.
2931 ??? When is it right at this stage to have a subreg
2932 of a mem that is _not_ to be handled specially? IMO
2933 those should have been reduced to just a mem. */
2934 || ((GET_CODE (operand) == MEM
2935 || (GET_CODE (operand)== REG
2936 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2937 #ifndef WORD_REGISTER_OPERATIONS
2938 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2939 < BIGGEST_ALIGNMENT)
2940 && (GET_MODE_SIZE (operand_mode[i])
2941 > GET_MODE_SIZE (GET_MODE (operand))))
2942 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2943 #ifdef LOAD_EXTEND_OP
2944 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2945 && (GET_MODE_SIZE (GET_MODE (operand))
2947 && (GET_MODE_SIZE (operand_mode[i])
2948 > GET_MODE_SIZE (GET_MODE (operand)))
2949 && INTEGRAL_MODE_P (GET_MODE (operand))
2950 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2959 this_alternative[i] = (int) NO_REGS;
2960 this_alternative_win[i] = 0;
2961 this_alternative_match_win[i] = 0;
2962 this_alternative_offmemok[i] = 0;
2963 this_alternative_earlyclobber[i] = 0;
2964 this_alternative_matches[i] = -1;
2966 /* An empty constraint or empty alternative
2967 allows anything which matched the pattern. */
2968 if (*p == 0 || *p == ',')
2971 /* Scan this alternative's specs for this operand;
2972 set WIN if the operand fits any letter in this alternative.
2973 Otherwise, clear BADOP if this operand could
2974 fit some letter after reloads,
2975 or set WINREG if this operand could fit after reloads
2976 provided the constraint allows some registers. */
2979 switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
2988 case '=': case '+': case '*':
2992 /* We only support one commutative marker, the first
2993 one. We already set commutative above. */
3005 /* Ignore rest of this alternative as far as
3006 reloading is concerned. */
3009 while (*p && *p != ',');
3013 case '0': case '1': case '2': case '3': case '4':
3014 case '5': case '6': case '7': case '8': case '9':
3015 m = strtoul (p, &end, 10);
3019 this_alternative_matches[i] = m;
3020 /* We are supposed to match a previous operand.
3021 If we do, we win if that one did.
3022 If we do not, count both of the operands as losers.
3023 (This is too conservative, since most of the time
3024 only a single reload insn will be needed to make
3025 the two operands win. As a result, this alternative
3026 may be rejected when it is actually desirable.) */
3027 if ((swapped && (m != commutative || i != commutative + 1))
3028 /* If we are matching as if two operands were swapped,
3029 also pretend that operands_match had been computed
3031 But if I is the second of those and C is the first,
3032 don't exchange them, because operands_match is valid
3033 only on one side of its diagonal. */
3035 [(m == commutative || m == commutative + 1)
3036 ? 2 * commutative + 1 - m : m]
3037 [(i == commutative || i == commutative + 1)
3038 ? 2 * commutative + 1 - i : i])
3039 : operands_match[m][i])
3041 /* If we are matching a non-offsettable address where an
3042 offsettable address was expected, then we must reject
3043 this combination, because we can't reload it. */
3044 if (this_alternative_offmemok[m]
3045 && GET_CODE (recog_data.operand[m]) == MEM
3046 && this_alternative[m] == (int) NO_REGS
3047 && ! this_alternative_win[m])
3050 did_match = this_alternative_win[m];
3054 /* Operands don't match. */
3056 /* Retroactively mark the operand we had to match
3057 as a loser, if it wasn't already. */
3058 if (this_alternative_win[m])
3060 this_alternative_win[m] = 0;
3061 if (this_alternative[m] == (int) NO_REGS)
3063 /* But count the pair only once in the total badness of
3064 this alternative, if the pair can be a dummy reload. */
3066 = find_dummy_reload (recog_data.operand[i],
3067 recog_data.operand[m],
3068 recog_data.operand_loc[i],
3069 recog_data.operand_loc[m],
3070 operand_mode[i], operand_mode[m],
3071 this_alternative[m], -1,
3072 this_alternative_earlyclobber[m]);
3077 /* This can be fixed with reloads if the operand
3078 we are supposed to match can be fixed with reloads. */
3080 this_alternative[i] = this_alternative[m];
3082 /* If we have to reload this operand and some previous
3083 operand also had to match the same thing as this
3084 operand, we don't know how to do that. So reject this
3086 if (! did_match || force_reload)
3087 for (j = 0; j < i; j++)
3088 if (this_alternative_matches[j]
3089 == this_alternative_matches[i])
3094 /* All necessary reloads for an address_operand
3095 were handled in find_reloads_address. */
3096 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3104 if (GET_CODE (operand) == MEM
3105 || (GET_CODE (operand) == REG
3106 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3107 && reg_renumber[REGNO (operand)] < 0))
3109 if (CONSTANT_P (operand)
3110 /* force_const_mem does not accept HIGH. */
3111 && GET_CODE (operand) != HIGH)
3117 if (GET_CODE (operand) == MEM
3118 && ! address_reloaded[i]
3119 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3120 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3125 if (GET_CODE (operand) == MEM
3126 && ! address_reloaded[i]
3127 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3128 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3132 /* Memory operand whose address is not offsettable. */
3136 if (GET_CODE (operand) == MEM
3137 && ! (ind_levels ? offsettable_memref_p (operand)
3138 : offsettable_nonstrict_memref_p (operand))
3139 /* Certain mem addresses will become offsettable
3140 after they themselves are reloaded. This is important;
3141 we don't want our own handling of unoffsettables
3142 to override the handling of reg_equiv_address. */
3143 && !(GET_CODE (XEXP (operand, 0)) == REG
3145 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3149 /* Memory operand whose address is offsettable. */
3153 if ((GET_CODE (operand) == MEM
3154 /* If IND_LEVELS, find_reloads_address won't reload a
3155 pseudo that didn't get a hard reg, so we have to
3156 reject that case. */
3157 && ((ind_levels ? offsettable_memref_p (operand)
3158 : offsettable_nonstrict_memref_p (operand))
3159 /* A reloaded address is offsettable because it is now
3160 just a simple register indirect. */
3161 || address_reloaded[i]))
3162 || (GET_CODE (operand) == REG
3163 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3164 && reg_renumber[REGNO (operand)] < 0
3165 /* If reg_equiv_address is nonzero, we will be
3166 loading it into a register; hence it will be
3167 offsettable, but we cannot say that reg_equiv_mem
3168 is offsettable without checking. */
3169 && ((reg_equiv_mem[REGNO (operand)] != 0
3170 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3171 || (reg_equiv_address[REGNO (operand)] != 0))))
3173 /* force_const_mem does not accept HIGH. */
3174 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3175 || GET_CODE (operand) == MEM)
3182 /* Output operand that is stored before the need for the
3183 input operands (and their index registers) is over. */
3184 earlyclobber = 1, this_earlyclobber = 1;
3189 if (GET_CODE (operand) == CONST_DOUBLE
3190 || (GET_CODE (operand) == CONST_VECTOR
3191 && (GET_MODE_CLASS (GET_MODE (operand))
3192 == MODE_VECTOR_FLOAT)))
3198 if (GET_CODE (operand) == CONST_DOUBLE
3199 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand, c, p))
3204 if (GET_CODE (operand) == CONST_INT
3205 || (GET_CODE (operand) == CONST_DOUBLE
3206 && GET_MODE (operand) == VOIDmode))
3209 if (CONSTANT_P (operand)
3210 #ifdef LEGITIMATE_PIC_OPERAND_P
3211 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3218 if (GET_CODE (operand) == CONST_INT
3219 || (GET_CODE (operand) == CONST_DOUBLE
3220 && GET_MODE (operand) == VOIDmode))
3232 if (GET_CODE (operand) == CONST_INT
3233 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand), c, p))
3243 /* A PLUS is never a valid operand, but reload can make
3244 it from a register when eliminating registers. */
3245 && GET_CODE (operand) != PLUS
3246 /* A SCRATCH is not a valid operand. */
3247 && GET_CODE (operand) != SCRATCH
3248 #ifdef LEGITIMATE_PIC_OPERAND_P
3249 && (! CONSTANT_P (operand)
3251 || LEGITIMATE_PIC_OPERAND_P (operand))
3253 && (GENERAL_REGS == ALL_REGS
3254 || GET_CODE (operand) != REG
3255 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3256 && reg_renumber[REGNO (operand)] < 0)))
3258 /* Drop through into 'r' case. */
3262 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3266 if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
3268 #ifdef EXTRA_CONSTRAINT_STR
3269 if (EXTRA_MEMORY_CONSTRAINT (c, p))
3273 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3275 /* If the address was already reloaded,
3277 else if (GET_CODE (operand) == MEM
3278 && address_reloaded[i])
3280 /* Likewise if the address will be reloaded because
3281 reg_equiv_address is nonzero. For reg_equiv_mem
3282 we have to check. */
3283 else if (GET_CODE (operand) == REG
3284 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3285 && reg_renumber[REGNO (operand)] < 0
3286 && ((reg_equiv_mem[REGNO (operand)] != 0
3287 && EXTRA_CONSTRAINT_STR (reg_equiv_mem[REGNO (operand)], c, p))
3288 || (reg_equiv_address[REGNO (operand)] != 0)))
3291 /* If we didn't already win, we can reload
3292 constants via force_const_mem, and other
3293 MEMs by reloading the address like for 'o'. */
3294 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3295 || GET_CODE (operand) == MEM)
3301 if (EXTRA_ADDRESS_CONSTRAINT (c, p))
3303 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3306 /* If we didn't already win, we can reload
3307 the address into a base register. */
3308 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3313 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3320 = (int) (reg_class_subunion
3321 [this_alternative[i]]
3322 [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]);
3324 if (GET_MODE (operand) == BLKmode)
3327 if (GET_CODE (operand) == REG
3328 && reg_fits_class_p (operand, this_alternative[i],
3329 offset, GET_MODE (recog_data.operand[i])))
3333 while ((p += len), c);
3337 /* If this operand could be handled with a reg,
3338 and some reg is allowed, then this operand can be handled. */
3339 if (winreg && this_alternative[i] != (int) NO_REGS)
3342 /* Record which operands fit this alternative. */
3343 this_alternative_earlyclobber[i] = earlyclobber;
3344 if (win && ! force_reload)
3345 this_alternative_win[i] = 1;
3346 else if (did_match && ! force_reload)
3347 this_alternative_match_win[i] = 1;
3350 int const_to_mem = 0;
3352 this_alternative_offmemok[i] = offmemok;
3356 /* Alternative loses if it has no regs for a reg operand. */
3357 if (GET_CODE (operand) == REG
3358 && this_alternative[i] == (int) NO_REGS
3359 && this_alternative_matches[i] < 0)
3362 /* If this is a constant that is reloaded into the desired
3363 class by copying it to memory first, count that as another
3364 reload. This is consistent with other code and is
3365 required to avoid choosing another alternative when
3366 the constant is moved into memory by this function on
3367 an early reload pass. Note that the test here is
3368 precisely the same as in the code below that calls
3370 if (CONSTANT_P (operand)
3371 /* force_const_mem does not accept HIGH. */
3372 && GET_CODE (operand) != HIGH
3373 && ((PREFERRED_RELOAD_CLASS (operand,
3374 (enum reg_class) this_alternative[i])
3376 || no_input_reloads)
3377 && operand_mode[i] != VOIDmode)
3380 if (this_alternative[i] != (int) NO_REGS)
3384 /* If we can't reload this value at all, reject this
3385 alternative. Note that we could also lose due to
3386 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3389 if (! CONSTANT_P (operand)
3390 && (enum reg_class) this_alternative[i] != NO_REGS
3391 && (PREFERRED_RELOAD_CLASS (operand,
3392 (enum reg_class) this_alternative[i])
3396 /* Alternative loses if it requires a type of reload not
3397 permitted for this insn. We can always reload SCRATCH
3398 and objects with a REG_UNUSED note. */
3399 else if (GET_CODE (operand) != SCRATCH
3400 && modified[i] != RELOAD_READ && no_output_reloads
3401 && ! find_reg_note (insn, REG_UNUSED, operand))
3403 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3407 /* We prefer to reload pseudos over reloading other things,
3408 since such reloads may be able to be eliminated later.
3409 If we are reloading a SCRATCH, we won't be generating any
3410 insns, just using a register, so it is also preferred.
3411 So bump REJECT in other cases. Don't do this in the
3412 case where we are forcing a constant into memory and
3413 it will then win since we don't want to have a different
3414 alternative match then. */
3415 if (! (GET_CODE (operand) == REG
3416 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3417 && GET_CODE (operand) != SCRATCH
3418 && ! (const_to_mem && constmemok))
3421 /* Input reloads can be inherited more often than output
3422 reloads can be removed, so penalize output reloads. */
3423 if (operand_type[i] != RELOAD_FOR_INPUT
3424 && GET_CODE (operand) != SCRATCH)
3428 /* If this operand is a pseudo register that didn't get a hard
3429 reg and this alternative accepts some register, see if the
3430 class that we want is a subset of the preferred class for this
3431 register. If not, but it intersects that class, use the
3432 preferred class instead. If it does not intersect the preferred
3433 class, show that usage of this alternative should be discouraged;
3434 it will be discouraged more still if the register is `preferred
3435 or nothing'. We do this because it increases the chance of
3436 reusing our spill register in a later insn and avoiding a pair
3437 of memory stores and loads.
3439 Don't bother with this if this alternative will accept this
3442 Don't do this for a multiword operand, since it is only a
3443 small win and has the risk of requiring more spill registers,
3444 which could cause a large loss.
3446 Don't do this if the preferred class has only one register
3447 because we might otherwise exhaust the class. */
3449 if (! win && ! did_match
3450 && this_alternative[i] != (int) NO_REGS
3451 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3452 && reg_class_size[(int) preferred_class[i]] > 1)
3454 if (! reg_class_subset_p (this_alternative[i],
3455 preferred_class[i]))
3457 /* Since we don't have a way of forming the intersection,
3458 we just do something special if the preferred class
3459 is a subset of the class we have; that's the most
3460 common case anyway. */
3461 if (reg_class_subset_p (preferred_class[i],
3462 this_alternative[i]))
3463 this_alternative[i] = (int) preferred_class[i];
3465 reject += (2 + 2 * pref_or_nothing[i]);
3470 /* Now see if any output operands that are marked "earlyclobber"
3471 in this alternative conflict with any input operands
3472 or any memory addresses. */
3474 for (i = 0; i < noperands; i++)
3475 if (this_alternative_earlyclobber[i]
3476 && (this_alternative_win[i] || this_alternative_match_win[i]))
3478 struct decomposition early_data;
3480 early_data = decompose (recog_data.operand[i]);
3482 if (modified[i] == RELOAD_READ)
3485 if (this_alternative[i] == NO_REGS)
3487 this_alternative_earlyclobber[i] = 0;
3488 if (this_insn_is_asm)
3489 error_for_asm (this_insn,
3490 "`&' constraint used with no register class");
3495 for (j = 0; j < noperands; j++)
3496 /* Is this an input operand or a memory ref? */
3497 if ((GET_CODE (recog_data.operand[j]) == MEM
3498 || modified[j] != RELOAD_WRITE)
3500 /* Ignore things like match_operator operands. */
3501 && *recog_data.constraints[j] != 0
3502 /* Don't count an input operand that is constrained to match
3503 the early clobber operand. */
3504 && ! (this_alternative_matches[j] == i
3505 && rtx_equal_p (recog_data.operand[i],
3506 recog_data.operand[j]))
3507 /* Is it altered by storing the earlyclobber operand? */
3508 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3511 /* If the output is in a single-reg class,
3512 it's costly to reload it, so reload the input instead. */
3513 if (reg_class_size[this_alternative[i]] == 1
3514 && (GET_CODE (recog_data.operand[j]) == REG
3515 || GET_CODE (recog_data.operand[j]) == SUBREG))
3518 this_alternative_win[j] = 0;
3519 this_alternative_match_win[j] = 0;
3524 /* If an earlyclobber operand conflicts with something,
3525 it must be reloaded, so request this and count the cost. */
3529 this_alternative_win[i] = 0;
3530 this_alternative_match_win[j] = 0;
3531 for (j = 0; j < noperands; j++)
3532 if (this_alternative_matches[j] == i
3533 && this_alternative_match_win[j])
3535 this_alternative_win[j] = 0;
3536 this_alternative_match_win[j] = 0;
3542 /* If one alternative accepts all the operands, no reload required,
3543 choose that alternative; don't consider the remaining ones. */
3546 /* Unswap these so that they are never swapped at `finish'. */
3547 if (commutative >= 0)
3549 recog_data.operand[commutative] = substed_operand[commutative];
3550 recog_data.operand[commutative + 1]
3551 = substed_operand[commutative + 1];
3553 for (i = 0; i < noperands; i++)
3555 goal_alternative_win[i] = this_alternative_win[i];
3556 goal_alternative_match_win[i] = this_alternative_match_win[i];
3557 goal_alternative[i] = this_alternative[i];
3558 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3559 goal_alternative_matches[i] = this_alternative_matches[i];
3560 goal_alternative_earlyclobber[i]
3561 = this_alternative_earlyclobber[i];
3563 goal_alternative_number = this_alternative_number;
3564 goal_alternative_swapped = swapped;
3565 goal_earlyclobber = this_earlyclobber;
3569 /* REJECT, set by the ! and ? constraint characters and when a register
3570 would be reloaded into a non-preferred class, discourages the use of
3571 this alternative for a reload goal. REJECT is incremented by six
3572 for each ? and two for each non-preferred class. */
3573 losers = losers * 6 + reject;
3575 /* If this alternative can be made to work by reloading,
3576 and it needs less reloading than the others checked so far,
3577 record it as the chosen goal for reloading. */
3578 if (! bad && best > losers)
3580 for (i = 0; i < noperands; i++)
3582 goal_alternative[i] = this_alternative[i];
3583 goal_alternative_win[i] = this_alternative_win[i];
3584 goal_alternative_match_win[i] = this_alternative_match_win[i];
3585 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3586 goal_alternative_matches[i] = this_alternative_matches[i];
3587 goal_alternative_earlyclobber[i]
3588 = this_alternative_earlyclobber[i];
3590 goal_alternative_swapped = swapped;
3592 goal_alternative_number = this_alternative_number;
3593 goal_earlyclobber = this_earlyclobber;
3597 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3598 then we need to try each alternative twice,
3599 the second time matching those two operands
3600 as if we had exchanged them.
3601 To do this, really exchange them in operands.
3603 If we have just tried the alternatives the second time,
3604 return operands to normal and drop through. */
3606 if (commutative >= 0)
3611 enum reg_class tclass;
3614 recog_data.operand[commutative] = substed_operand[commutative + 1];
3615 recog_data.operand[commutative + 1] = substed_operand[commutative];
3616 /* Swap the duplicates too. */
3617 for (i = 0; i < recog_data.n_dups; i++)
3618 if (recog_data.dup_num[i] == commutative
3619 || recog_data.dup_num[i] == commutative + 1)
3620 *recog_data.dup_loc[i]
3621 = recog_data.operand[(int) recog_data.dup_num[i]];
3623 tclass = preferred_class[commutative];
3624 preferred_class[commutative] = preferred_class[commutative + 1];
3625 preferred_class[commutative + 1] = tclass;
3627 t = pref_or_nothing[commutative];
3628 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3629 pref_or_nothing[commutative + 1] = t;
3631 memcpy (constraints, recog_data.constraints,
3632 noperands * sizeof (char *));
3637 recog_data.operand[commutative] = substed_operand[commutative];
3638 recog_data.operand[commutative + 1]
3639 = substed_operand[commutative + 1];
3640 /* Unswap the duplicates too. */
3641 for (i = 0; i < recog_data.n_dups; i++)
3642 if (recog_data.dup_num[i] == commutative
3643 || recog_data.dup_num[i] == commutative + 1)
3644 *recog_data.dup_loc[i]
3645 = recog_data.operand[(int) recog_data.dup_num[i]];
3649 /* The operands don't meet the constraints.
3650 goal_alternative describes the alternative
3651 that we could reach by reloading the fewest operands.
3652 Reload so as to fit it. */
3654 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3656 /* No alternative works with reloads?? */
3657 if (insn_code_number >= 0)
3658 fatal_insn ("unable to generate reloads for:", insn);
3659 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3660 /* Avoid further trouble with this insn. */
3661 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3666 /* Jump to `finish' from above if all operands are valid already.
3667 In that case, goal_alternative_win is all 1. */
3670 /* Right now, for any pair of operands I and J that are required to match,
3672 goal_alternative_matches[J] is I.
3673 Set up goal_alternative_matched as the inverse function:
3674 goal_alternative_matched[I] = J. */
3676 for (i = 0; i < noperands; i++)
3677 goal_alternative_matched[i] = -1;
3679 for (i = 0; i < noperands; i++)
3680 if (! goal_alternative_win[i]
3681 && goal_alternative_matches[i] >= 0)
3682 goal_alternative_matched[goal_alternative_matches[i]] = i;
3684 for (i = 0; i < noperands; i++)
3685 goal_alternative_win[i] |= goal_alternative_match_win[i];
3687 /* If the best alternative is with operands 1 and 2 swapped,
3688 consider them swapped before reporting the reloads. Update the
3689 operand numbers of any reloads already pushed. */
3691 if (goal_alternative_swapped)
3695 tem = substed_operand[commutative];
3696 substed_operand[commutative] = substed_operand[commutative + 1];
3697 substed_operand[commutative + 1] = tem;
3698 tem = recog_data.operand[commutative];
3699 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3700 recog_data.operand[commutative + 1] = tem;
3701 tem = *recog_data.operand_loc[commutative];
3702 *recog_data.operand_loc[commutative]
3703 = *recog_data.operand_loc[commutative + 1];
3704 *recog_data.operand_loc[commutative + 1] = tem;
3706 for (i = 0; i < n_reloads; i++)
3708 if (rld[i].opnum == commutative)
3709 rld[i].opnum = commutative + 1;
3710 else if (rld[i].opnum == commutative + 1)
3711 rld[i].opnum = commutative;
3715 for (i = 0; i < noperands; i++)
3717 operand_reloadnum[i] = -1;
3719 /* If this is an earlyclobber operand, we need to widen the scope.
3720 The reload must remain valid from the start of the insn being
3721 reloaded until after the operand is stored into its destination.
3722 We approximate this with RELOAD_OTHER even though we know that we
3723 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3725 One special case that is worth checking is when we have an
3726 output that is earlyclobber but isn't used past the insn (typically
3727 a SCRATCH). In this case, we only need have the reload live
3728 through the insn itself, but not for any of our input or output
3730 But we must not accidentally narrow the scope of an existing
3731 RELOAD_OTHER reload - leave these alone.
3733 In any case, anything needed to address this operand can remain
3734 however they were previously categorized. */
3736 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3738 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3739 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3742 /* Any constants that aren't allowed and can't be reloaded
3743 into registers are here changed into memory references. */
3744 for (i = 0; i < noperands; i++)
3745 if (! goal_alternative_win[i]
3746 && CONSTANT_P (recog_data.operand[i])
3747 /* force_const_mem does not accept HIGH. */
3748 && GET_CODE (recog_data.operand[i]) != HIGH
3749 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3750 (enum reg_class) goal_alternative[i])
3752 || no_input_reloads)
3753 && operand_mode[i] != VOIDmode)
3755 substed_operand[i] = recog_data.operand[i]
3756 = find_reloads_toplev (force_const_mem (operand_mode[i],
3757 recog_data.operand[i]),
3758 i, address_type[i], ind_levels, 0, insn,
3760 if (alternative_allows_memconst (recog_data.constraints[i],
3761 goal_alternative_number))
3762 goal_alternative_win[i] = 1;
3765 /* Record the values of the earlyclobber operands for the caller. */
3766 if (goal_earlyclobber)
3767 for (i = 0; i < noperands; i++)
3768 if (goal_alternative_earlyclobber[i])
3769 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3771 /* Now record reloads for all the operands that need them. */
3772 for (i = 0; i < noperands; i++)
3773 if (! goal_alternative_win[i])
3775 /* Operands that match previous ones have already been handled. */
3776 if (goal_alternative_matches[i] >= 0)
3778 /* Handle an operand with a nonoffsettable address
3779 appearing where an offsettable address will do
3780 by reloading the address into a base register.
3782 ??? We can also do this when the operand is a register and
3783 reg_equiv_mem is not offsettable, but this is a bit tricky,
3784 so we don't bother with it. It may not be worth doing. */
3785 else if (goal_alternative_matched[i] == -1
3786 && goal_alternative_offmemok[i]
3787 && GET_CODE (recog_data.operand[i]) == MEM)
3789 operand_reloadnum[i]
3790 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3791 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3792 MODE_BASE_REG_CLASS (VOIDmode),
3793 GET_MODE (XEXP (recog_data.operand[i], 0)),
3794 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3795 rld[operand_reloadnum[i]].inc
3796 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3798 /* If this operand is an output, we will have made any
3799 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3800 now we are treating part of the operand as an input, so
3801 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3803 if (modified[i] == RELOAD_WRITE)
3805 for (j = 0; j < n_reloads; j++)
3807 if (rld[j].opnum == i)
3809 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3810 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3811 else if (rld[j].when_needed
3812 == RELOAD_FOR_OUTADDR_ADDRESS)
3813 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3818 else if (goal_alternative_matched[i] == -1)
3820 operand_reloadnum[i]
3821 = push_reload ((modified[i] != RELOAD_WRITE
3822 ? recog_data.operand[i] : 0),
3823 (modified[i] != RELOAD_READ
3824 ? recog_data.operand[i] : 0),
3825 (modified[i] != RELOAD_WRITE
3826 ? recog_data.operand_loc[i] : 0),
3827 (modified[i] != RELOAD_READ
3828 ? recog_data.operand_loc[i] : 0),
3829 (enum reg_class) goal_alternative[i],
3830 (modified[i] == RELOAD_WRITE
3831 ? VOIDmode : operand_mode[i]),
3832 (modified[i] == RELOAD_READ
3833 ? VOIDmode : operand_mode[i]),
3834 (insn_code_number < 0 ? 0
3835 : insn_data[insn_code_number].operand[i].strict_low),
3836 0, i, operand_type[i]);
3838 /* In a matching pair of operands, one must be input only
3839 and the other must be output only.
3840 Pass the input operand as IN and the other as OUT. */
3841 else if (modified[i] == RELOAD_READ
3842 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3844 operand_reloadnum[i]
3845 = push_reload (recog_data.operand[i],
3846 recog_data.operand[goal_alternative_matched[i]],
3847 recog_data.operand_loc[i],
3848 recog_data.operand_loc[goal_alternative_matched[i]],
3849 (enum reg_class) goal_alternative[i],
3851 operand_mode[goal_alternative_matched[i]],
3852 0, 0, i, RELOAD_OTHER);
3853 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3855 else if (modified[i] == RELOAD_WRITE
3856 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3858 operand_reloadnum[goal_alternative_matched[i]]
3859 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3860 recog_data.operand[i],
3861 recog_data.operand_loc[goal_alternative_matched[i]],
3862 recog_data.operand_loc[i],
3863 (enum reg_class) goal_alternative[i],
3864 operand_mode[goal_alternative_matched[i]],
3866 0, 0, i, RELOAD_OTHER);
3867 operand_reloadnum[i] = output_reloadnum;
3869 else if (insn_code_number >= 0)
3873 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3874 /* Avoid further trouble with this insn. */
3875 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3880 else if (goal_alternative_matched[i] < 0
3881 && goal_alternative_matches[i] < 0
3882 && !address_operand_reloaded[i]
3885 /* For each non-matching operand that's a MEM or a pseudo-register
3886 that didn't get a hard register, make an optional reload.
3887 This may get done even if the insn needs no reloads otherwise. */
3889 rtx operand = recog_data.operand[i];
3891 while (GET_CODE (operand) == SUBREG)
3892 operand = SUBREG_REG (operand);
3893 if ((GET_CODE (operand) == MEM
3894 || (GET_CODE (operand) == REG
3895 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3896 /* If this is only for an output, the optional reload would not
3897 actually cause us to use a register now, just note that
3898 something is stored here. */
3899 && ((enum reg_class) goal_alternative[i] != NO_REGS
3900 || modified[i] == RELOAD_WRITE)
3901 && ! no_input_reloads
3902 /* An optional output reload might allow to delete INSN later.
3903 We mustn't make in-out reloads on insns that are not permitted
3905 If this is an asm, we can't delete it; we must not even call
3906 push_reload for an optional output reload in this case,
3907 because we can't be sure that the constraint allows a register,
3908 and push_reload verifies the constraints for asms. */
3909 && (modified[i] == RELOAD_READ
3910 || (! no_output_reloads && ! this_insn_is_asm)))
3911 operand_reloadnum[i]
3912 = push_reload ((modified[i] != RELOAD_WRITE
3913 ? recog_data.operand[i] : 0),
3914 (modified[i] != RELOAD_READ
3915 ? recog_data.operand[i] : 0),
3916 (modified[i] != RELOAD_WRITE
3917 ? recog_data.operand_loc[i] : 0),
3918 (modified[i] != RELOAD_READ
3919 ? recog_data.operand_loc[i] : 0),
3920 (enum reg_class) goal_alternative[i],
3921 (modified[i] == RELOAD_WRITE
3922 ? VOIDmode : operand_mode[i]),
3923 (modified[i] == RELOAD_READ
3924 ? VOIDmode : operand_mode[i]),
3925 (insn_code_number < 0 ? 0
3926 : insn_data[insn_code_number].operand[i].strict_low),
3927 1, i, operand_type[i]);
3928 /* If a memory reference remains (either as a MEM or a pseudo that
3929 did not get a hard register), yet we can't make an optional
3930 reload, check if this is actually a pseudo register reference;
3931 we then need to emit a USE and/or a CLOBBER so that reload
3932 inheritance will do the right thing. */
3934 && (GET_CODE (operand) == MEM
3935 || (GET_CODE (operand) == REG
3936 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3937 && reg_renumber [REGNO (operand)] < 0)))
3939 operand = *recog_data.operand_loc[i];
3941 while (GET_CODE (operand) == SUBREG)
3942 operand = SUBREG_REG (operand);
3943 if (GET_CODE (operand) == REG)
3945 if (modified[i] != RELOAD_WRITE)
3946 /* We mark the USE with QImode so that we recognize
3947 it as one that can be safely deleted at the end
3949 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
3951 if (modified[i] != RELOAD_READ)
3952 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3956 else if (goal_alternative_matches[i] >= 0
3957 && goal_alternative_win[goal_alternative_matches[i]]
3958 && modified[i] == RELOAD_READ
3959 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3960 && ! no_input_reloads && ! no_output_reloads
3963 /* Similarly, make an optional reload for a pair of matching
3964 objects that are in MEM or a pseudo that didn't get a hard reg. */
3966 rtx operand = recog_data.operand[i];
3968 while (GET_CODE (operand) == SUBREG)
3969 operand = SUBREG_REG (operand);
3970 if ((GET_CODE (operand) == MEM
3971 || (GET_CODE (operand) == REG
3972 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3973 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3975 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3976 = push_reload (recog_data.operand[goal_alternative_matches[i]],
3977 recog_data.operand[i],
3978 recog_data.operand_loc[goal_alternative_matches[i]],
3979 recog_data.operand_loc[i],
3980 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3981 operand_mode[goal_alternative_matches[i]],
3983 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3986 /* Perform whatever substitutions on the operands we are supposed
3987 to make due to commutativity or replacement of registers
3988 with equivalent constants or memory slots. */
3990 for (i = 0; i < noperands; i++)
3992 /* We only do this on the last pass through reload, because it is
3993 possible for some data (like reg_equiv_address) to be changed during
3994 later passes. Moreover, we loose the opportunity to get a useful
3995 reload_{in,out}_reg when we do these replacements. */
3999 rtx substitution = substed_operand[i];
4001 *recog_data.operand_loc[i] = substitution;
4003 /* If we're replacing an operand with a LABEL_REF, we need
4004 to make sure that there's a REG_LABEL note attached to
4005 this instruction. */
4006 if (GET_CODE (insn) != JUMP_INSN
4007 && GET_CODE (substitution) == LABEL_REF
4008 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
4009 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
4010 XEXP (substitution, 0),
4014 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
4017 /* If this insn pattern contains any MATCH_DUP's, make sure that
4018 they will be substituted if the operands they match are substituted.
4019 Also do now any substitutions we already did on the operands.
4021 Don't do this if we aren't making replacements because we might be
4022 propagating things allocated by frame pointer elimination into places
4023 it doesn't expect. */
4025 if (insn_code_number >= 0 && replace)
4026 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4028 int opno = recog_data.dup_num[i];
4029 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4030 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4034 /* This loses because reloading of prior insns can invalidate the equivalence
4035 (or at least find_equiv_reg isn't smart enough to find it any more),
4036 causing this insn to need more reload regs than it needed before.
4037 It may be too late to make the reload regs available.
4038 Now this optimization is done safely in choose_reload_regs. */
4040 /* For each reload of a reg into some other class of reg,
4041 search for an existing equivalent reg (same value now) in the right class.
4042 We can use it as long as we don't need to change its contents. */
4043 for (i = 0; i < n_reloads; i++)
4044 if (rld[i].reg_rtx == 0
4046 && GET_CODE (rld[i].in) == REG
4050 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
4051 static_reload_reg_p, 0, rld[i].inmode);
4052 /* Prevent generation of insn to load the value
4053 because the one we found already has the value. */
4055 rld[i].in = rld[i].reg_rtx;
4059 /* Perhaps an output reload can be combined with another
4060 to reduce needs by one. */
4061 if (!goal_earlyclobber)
4064 /* If we have a pair of reloads for parts of an address, they are reloading
4065 the same object, the operands themselves were not reloaded, and they
4066 are for two operands that are supposed to match, merge the reloads and
4067 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4069 for (i = 0; i < n_reloads; i++)
4073 for (j = i + 1; j < n_reloads; j++)
4074 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4075 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4076 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4077 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4078 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4079 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4080 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4081 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4082 && rtx_equal_p (rld[i].in, rld[j].in)
4083 && (operand_reloadnum[rld[i].opnum] < 0
4084 || rld[operand_reloadnum[rld[i].opnum]].optional)
4085 && (operand_reloadnum[rld[j].opnum] < 0
4086 || rld[operand_reloadnum[rld[j].opnum]].optional)
4087 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4088 || (goal_alternative_matches[rld[j].opnum]
4091 for (k = 0; k < n_replacements; k++)
4092 if (replacements[k].what == j)
4093 replacements[k].what = i;
4095 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4096 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4097 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4099 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4104 /* Scan all the reloads and update their type.
4105 If a reload is for the address of an operand and we didn't reload
4106 that operand, change the type. Similarly, change the operand number
4107 of a reload when two operands match. If a reload is optional, treat it
4108 as though the operand isn't reloaded.
4110 ??? This latter case is somewhat odd because if we do the optional
4111 reload, it means the object is hanging around. Thus we need only
4112 do the address reload if the optional reload was NOT done.
4114 Change secondary reloads to be the address type of their operand, not
4117 If an operand's reload is now RELOAD_OTHER, change any
4118 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4119 RELOAD_FOR_OTHER_ADDRESS. */
4121 for (i = 0; i < n_reloads; i++)
4123 if (rld[i].secondary_p
4124 && rld[i].when_needed == operand_type[rld[i].opnum])
4125 rld[i].when_needed = address_type[rld[i].opnum];
4127 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4128 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4129 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4130 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4131 && (operand_reloadnum[rld[i].opnum] < 0
4132 || rld[operand_reloadnum[rld[i].opnum]].optional))
4134 /* If we have a secondary reload to go along with this reload,
4135 change its type to RELOAD_FOR_OPADDR_ADDR. */
4137 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4138 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4139 && rld[i].secondary_in_reload != -1)
4141 int secondary_in_reload = rld[i].secondary_in_reload;
4143 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4145 /* If there's a tertiary reload we have to change it also. */
4146 if (secondary_in_reload > 0
4147 && rld[secondary_in_reload].secondary_in_reload != -1)
4148 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4149 = RELOAD_FOR_OPADDR_ADDR;
4152 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4153 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4154 && rld[i].secondary_out_reload != -1)
4156 int secondary_out_reload = rld[i].secondary_out_reload;
4158 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4160 /* If there's a tertiary reload we have to change it also. */
4161 if (secondary_out_reload
4162 && rld[secondary_out_reload].secondary_out_reload != -1)
4163 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4164 = RELOAD_FOR_OPADDR_ADDR;
4167 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4168 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4169 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4171 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4174 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4175 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4176 && operand_reloadnum[rld[i].opnum] >= 0
4177 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4179 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4181 if (goal_alternative_matches[rld[i].opnum] >= 0)
4182 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4185 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4186 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4187 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4189 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4190 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4191 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4192 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4193 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4194 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4195 This is complicated by the fact that a single operand can have more
4196 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4197 choose_reload_regs without affecting code quality, and cases that
4198 actually fail are extremely rare, so it turns out to be better to fix
4199 the problem here by not generating cases that choose_reload_regs will
4201 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4202 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4204 We can reduce the register pressure by exploiting that a
4205 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4206 does not conflict with any of them, if it is only used for the first of
4207 the RELOAD_FOR_X_ADDRESS reloads. */
4209 int first_op_addr_num = -2;
4210 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4211 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4212 int need_change = 0;
4213 /* We use last_op_addr_reload and the contents of the above arrays
4214 first as flags - -2 means no instance encountered, -1 means exactly
4215 one instance encountered.
4216 If more than one instance has been encountered, we store the reload
4217 number of the first reload of the kind in question; reload numbers
4218 are known to be non-negative. */
4219 for (i = 0; i < noperands; i++)
4220 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4221 for (i = n_reloads - 1; i >= 0; i--)
4223 switch (rld[i].when_needed)
4225 case RELOAD_FOR_OPERAND_ADDRESS:
4226 if (++first_op_addr_num >= 0)
4228 first_op_addr_num = i;
4232 case RELOAD_FOR_INPUT_ADDRESS:
4233 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4235 first_inpaddr_num[rld[i].opnum] = i;
4239 case RELOAD_FOR_OUTPUT_ADDRESS:
4240 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4242 first_outpaddr_num[rld[i].opnum] = i;
4253 for (i = 0; i < n_reloads; i++)
4256 enum reload_type type;
4258 switch (rld[i].when_needed)
4260 case RELOAD_FOR_OPADDR_ADDR:
4261 first_num = first_op_addr_num;
4262 type = RELOAD_FOR_OPERAND_ADDRESS;
4264 case RELOAD_FOR_INPADDR_ADDRESS:
4265 first_num = first_inpaddr_num[rld[i].opnum];
4266 type = RELOAD_FOR_INPUT_ADDRESS;
4268 case RELOAD_FOR_OUTADDR_ADDRESS:
4269 first_num = first_outpaddr_num[rld[i].opnum];
4270 type = RELOAD_FOR_OUTPUT_ADDRESS;
4277 else if (i > first_num)
4278 rld[i].when_needed = type;
4281 /* Check if the only TYPE reload that uses reload I is
4282 reload FIRST_NUM. */
4283 for (j = n_reloads - 1; j > first_num; j--)
4285 if (rld[j].when_needed == type
4286 && (rld[i].secondary_p
4287 ? rld[j].secondary_in_reload == i
4288 : reg_mentioned_p (rld[i].in, rld[j].in)))
4290 rld[i].when_needed = type;
4299 /* See if we have any reloads that are now allowed to be merged
4300 because we've changed when the reload is needed to
4301 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4302 check for the most common cases. */
4304 for (i = 0; i < n_reloads; i++)
4305 if (rld[i].in != 0 && rld[i].out == 0
4306 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4307 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4308 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4309 for (j = 0; j < n_reloads; j++)
4310 if (i != j && rld[j].in != 0 && rld[j].out == 0
4311 && rld[j].when_needed == rld[i].when_needed
4312 && MATCHES (rld[i].in, rld[j].in)
4313 && rld[i].class == rld[j].class
4314 && !rld[i].nocombine && !rld[j].nocombine
4315 && rld[i].reg_rtx == rld[j].reg_rtx)
4317 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4318 transfer_replacements (i, j);
4323 /* If we made any reloads for addresses, see if they violate a
4324 "no input reloads" requirement for this insn. But loads that we
4325 do after the insn (such as for output addresses) are fine. */
4326 if (no_input_reloads)
4327 for (i = 0; i < n_reloads; i++)
4329 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
4330 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS)
4334 /* Compute reload_mode and reload_nregs. */
4335 for (i = 0; i < n_reloads; i++)
4338 = (rld[i].inmode == VOIDmode
4339 || (GET_MODE_SIZE (rld[i].outmode)
4340 > GET_MODE_SIZE (rld[i].inmode)))
4341 ? rld[i].outmode : rld[i].inmode;
4343 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4346 /* Special case a simple move with an input reload and a
4347 destination of a hard reg, if the hard reg is ok, use it. */
4348 for (i = 0; i < n_reloads; i++)
4349 if (rld[i].when_needed == RELOAD_FOR_INPUT
4350 && GET_CODE (PATTERN (insn)) == SET
4351 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
4352 && SET_SRC (PATTERN (insn)) == rld[i].in)
4354 rtx dest = SET_DEST (PATTERN (insn));
4355 unsigned int regno = REGNO (dest);
4357 if (regno < FIRST_PSEUDO_REGISTER
4358 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
4359 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4361 int nr = HARD_REGNO_NREGS (regno, rld[i].mode);
4364 for (nri = 1; nri < nr; nri ++)
4365 if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno + nri))
4369 rld[i].reg_rtx = dest;
4376 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4377 accepts a memory operand with constant address. */
4380 alternative_allows_memconst (const char *constraint, int altnum)
4383 /* Skip alternatives before the one requested. */
4386 while (*constraint++ != ',');
4389 /* Scan the requested alternative for 'm' or 'o'.
4390 If one of them is present, this alternative accepts memory constants. */
4391 for (; (c = *constraint) && c != ',' && c != '#';
4392 constraint += CONSTRAINT_LEN (c, constraint))
4393 if (c == 'm' || c == 'o' || EXTRA_MEMORY_CONSTRAINT (c, constraint))
4398 /* Scan X for memory references and scan the addresses for reloading.
4399 Also checks for references to "constant" regs that we want to eliminate
4400 and replaces them with the values they stand for.
4401 We may alter X destructively if it contains a reference to such.
4402 If X is just a constant reg, we return the equivalent value
4405 IND_LEVELS says how many levels of indirect addressing this machine
4408 OPNUM and TYPE identify the purpose of the reload.
4410 IS_SET_DEST is true if X is the destination of a SET, which is not
4411 appropriate to be replaced by a constant.
4413 INSN, if nonzero, is the insn in which we do the reload. It is used
4414 to determine if we may generate output reloads, and where to put USEs
4415 for pseudos that we have to replace with stack slots.
4417 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4418 result of find_reloads_address. */
4421 find_reloads_toplev (rtx x, int opnum, enum reload_type type,
4422 int ind_levels, int is_set_dest, rtx insn,
4423 int *address_reloaded)
4425 RTX_CODE code = GET_CODE (x);
4427 const char *fmt = GET_RTX_FORMAT (code);
4433 /* This code is duplicated for speed in find_reloads. */
4434 int regno = REGNO (x);
4435 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4436 x = reg_equiv_constant[regno];
4438 /* This creates (subreg (mem...)) which would cause an unnecessary
4439 reload of the mem. */
4440 else if (reg_equiv_mem[regno] != 0)
4441 x = reg_equiv_mem[regno];
4443 else if (reg_equiv_memory_loc[regno]
4444 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4446 rtx mem = make_memloc (x, regno);
4447 if (reg_equiv_address[regno]
4448 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4450 /* If this is not a toplevel operand, find_reloads doesn't see
4451 this substitution. We have to emit a USE of the pseudo so
4452 that delete_output_reload can see it. */
4453 if (replace_reloads && recog_data.operand[opnum] != x)
4454 /* We mark the USE with QImode so that we recognize it
4455 as one that can be safely deleted at the end of
4457 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4460 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4461 opnum, type, ind_levels, insn);
4462 if (address_reloaded)
4463 *address_reloaded = i;
4472 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4473 opnum, type, ind_levels, insn);
4474 if (address_reloaded)
4475 *address_reloaded = i;
4480 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4482 /* Check for SUBREG containing a REG that's equivalent to a constant.
4483 If the constant has a known value, truncate it right now.
4484 Similarly if we are extracting a single-word of a multi-word
4485 constant. If the constant is symbolic, allow it to be substituted
4486 normally. push_reload will strip the subreg later. If the
4487 constant is VOIDmode, abort because we will lose the mode of
4488 the register (this should never happen because one of the cases
4489 above should handle it). */
4491 int regno = REGNO (SUBREG_REG (x));
4494 if (subreg_lowpart_p (x)
4495 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4496 && reg_equiv_constant[regno] != 0
4497 && (tem = gen_lowpart_common (GET_MODE (x),
4498 reg_equiv_constant[regno])) != 0)
4501 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4502 && reg_equiv_constant[regno] != 0)
4505 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4506 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4512 /* If the subreg contains a reg that will be converted to a mem,
4513 convert the subreg to a narrower memref now.
4514 Otherwise, we would get (subreg (mem ...) ...),
4515 which would force reload of the mem.
4517 We also need to do this if there is an equivalent MEM that is
4518 not offsettable. In that case, alter_subreg would produce an
4519 invalid address on big-endian machines.
4521 For machines that extend byte loads, we must not reload using
4522 a wider mode if we have a paradoxical SUBREG. find_reloads will
4523 force a reload in that case. So we should not do anything here. */
4525 else if (regno >= FIRST_PSEUDO_REGISTER
4526 #ifdef LOAD_EXTEND_OP
4527 && (GET_MODE_SIZE (GET_MODE (x))
4528 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4530 && (reg_equiv_address[regno] != 0
4531 || (reg_equiv_mem[regno] != 0
4532 && (! strict_memory_address_p (GET_MODE (x),
4533 XEXP (reg_equiv_mem[regno], 0))
4534 || ! offsettable_memref_p (reg_equiv_mem[regno])
4535 || num_not_at_initial_offset))))
4536 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4540 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4544 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4545 ind_levels, is_set_dest, insn,
4547 /* If we have replaced a reg with it's equivalent memory loc -
4548 that can still be handled here e.g. if it's in a paradoxical
4549 subreg - we must make the change in a copy, rather than using
4550 a destructive change. This way, find_reloads can still elect
4551 not to do the change. */
4552 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4554 x = shallow_copy_rtx (x);
4557 XEXP (x, i) = new_part;
4563 /* Return a mem ref for the memory equivalent of reg REGNO.
4564 This mem ref is not shared with anything. */
4567 make_memloc (rtx ad, int regno)
4569 /* We must rerun eliminate_regs, in case the elimination
4570 offsets have changed. */
4572 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4574 /* If TEM might contain a pseudo, we must copy it to avoid
4575 modifying it when we do the substitution for the reload. */
4576 if (rtx_varies_p (tem, 0))
4577 tem = copy_rtx (tem);
4579 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4580 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4582 /* Copy the result if it's still the same as the equivalence, to avoid
4583 modifying it when we do the substitution for the reload. */
4584 if (tem == reg_equiv_memory_loc[regno])
4585 tem = copy_rtx (tem);
4589 /* Returns true if AD could be turned into a valid memory reference
4590 to mode MODE by reloading the part pointed to by PART into a
4594 maybe_memory_address_p (enum machine_mode mode, rtx ad, rtx *part)
4598 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4601 retv = memory_address_p (mode, ad);
4607 /* Record all reloads needed for handling memory address AD
4608 which appears in *LOC in a memory reference to mode MODE
4609 which itself is found in location *MEMREFLOC.
4610 Note that we take shortcuts assuming that no multi-reg machine mode
4611 occurs as part of an address.
4613 OPNUM and TYPE specify the purpose of this reload.
4615 IND_LEVELS says how many levels of indirect addressing this machine
4618 INSN, if nonzero, is the insn in which we do the reload. It is used
4619 to determine if we may generate output reloads, and where to put USEs
4620 for pseudos that we have to replace with stack slots.
4622 Value is nonzero if this address is reloaded or replaced as a whole.
4623 This is interesting to the caller if the address is an autoincrement.
4625 Note that there is no verification that the address will be valid after
4626 this routine does its work. Instead, we rely on the fact that the address
4627 was valid when reload started. So we need only undo things that reload
4628 could have broken. These are wrong register types, pseudos not allocated
4629 to a hard register, and frame pointer elimination. */
4632 find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad,
4633 rtx *loc, int opnum, enum reload_type type,
4634 int ind_levels, rtx insn)
4637 int removed_and = 0;
4640 /* If the address is a register, see if it is a legitimate address and
4641 reload if not. We first handle the cases where we need not reload
4642 or where we must reload in a non-standard way. */
4644 if (GET_CODE (ad) == REG)
4648 /* If the register is equivalent to an invariant expression, substitute
4649 the invariant, and eliminate any eliminable register references. */
4650 tem = reg_equiv_constant[regno];
4652 && (tem = eliminate_regs (tem, mode, insn))
4653 && strict_memory_address_p (mode, tem))
4659 tem = reg_equiv_memory_loc[regno];
4662 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4664 tem = make_memloc (ad, regno);
4665 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4667 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4668 &XEXP (tem, 0), opnum,
4669 ADDR_TYPE (type), ind_levels, insn);
4671 /* We can avoid a reload if the register's equivalent memory
4672 expression is valid as an indirect memory address.
4673 But not all addresses are valid in a mem used as an indirect
4674 address: only reg or reg+constant. */
4677 && strict_memory_address_p (mode, tem)
4678 && (GET_CODE (XEXP (tem, 0)) == REG
4679 || (GET_CODE (XEXP (tem, 0)) == PLUS
4680 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4681 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4683 /* TEM is not the same as what we'll be replacing the
4684 pseudo with after reload, put a USE in front of INSN
4685 in the final reload pass. */
4687 && num_not_at_initial_offset
4688 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4691 /* We mark the USE with QImode so that we
4692 recognize it as one that can be safely
4693 deleted at the end of reload. */
4694 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4697 /* This doesn't really count as replacing the address
4698 as a whole, since it is still a memory access. */
4706 /* The only remaining case where we can avoid a reload is if this is a
4707 hard register that is valid as a base register and which is not the
4708 subject of a CLOBBER in this insn. */
4710 else if (regno < FIRST_PSEUDO_REGISTER
4711 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4712 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4715 /* If we do not have one of the cases above, we must do the reload. */
4716 push_reload (ad, NULL_RTX, loc, (rtx*) 0, MODE_BASE_REG_CLASS (mode),
4717 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4721 if (strict_memory_address_p (mode, ad))
4723 /* The address appears valid, so reloads are not needed.
4724 But the address may contain an eliminable register.
4725 This can happen because a machine with indirect addressing
4726 may consider a pseudo register by itself a valid address even when
4727 it has failed to get a hard reg.
4728 So do a tree-walk to find and eliminate all such regs. */
4730 /* But first quickly dispose of a common case. */
4731 if (GET_CODE (ad) == PLUS
4732 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4733 && GET_CODE (XEXP (ad, 0)) == REG
4734 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4737 subst_reg_equivs_changed = 0;
4738 *loc = subst_reg_equivs (ad, insn);
4740 if (! subst_reg_equivs_changed)
4743 /* Check result for validity after substitution. */
4744 if (strict_memory_address_p (mode, ad))
4748 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4753 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4758 *memrefloc = copy_rtx (*memrefloc);
4759 XEXP (*memrefloc, 0) = ad;
4760 move_replacements (&ad, &XEXP (*memrefloc, 0));
4766 /* The address is not valid. We have to figure out why. First see if
4767 we have an outer AND and remove it if so. Then analyze what's inside. */
4769 if (GET_CODE (ad) == AND)
4772 loc = &XEXP (ad, 0);
4776 /* One possibility for why the address is invalid is that it is itself
4777 a MEM. This can happen when the frame pointer is being eliminated, a
4778 pseudo is not allocated to a hard register, and the offset between the
4779 frame and stack pointers is not its initial value. In that case the
4780 pseudo will have been replaced by a MEM referring to the
4782 if (GET_CODE (ad) == MEM)
4784 /* First ensure that the address in this MEM is valid. Then, unless
4785 indirect addresses are valid, reload the MEM into a register. */
4787 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4788 opnum, ADDR_TYPE (type),
4789 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4791 /* If tem was changed, then we must create a new memory reference to
4792 hold it and store it back into memrefloc. */
4793 if (tem != ad && memrefloc)
4795 *memrefloc = copy_rtx (*memrefloc);
4796 copy_replacements (tem, XEXP (*memrefloc, 0));
4797 loc = &XEXP (*memrefloc, 0);
4799 loc = &XEXP (*loc, 0);
4802 /* Check similar cases as for indirect addresses as above except
4803 that we can allow pseudos and a MEM since they should have been
4804 taken care of above. */
4807 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4808 || GET_CODE (XEXP (tem, 0)) == MEM
4809 || ! (GET_CODE (XEXP (tem, 0)) == REG
4810 || (GET_CODE (XEXP (tem, 0)) == PLUS
4811 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4812 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4814 /* Must use TEM here, not AD, since it is the one that will
4815 have any subexpressions reloaded, if needed. */
4816 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
4817 MODE_BASE_REG_CLASS (mode), GET_MODE (tem),
4820 return ! removed_and;
4826 /* If we have address of a stack slot but it's not valid because the
4827 displacement is too large, compute the sum in a register.
4828 Handle all base registers here, not just fp/ap/sp, because on some
4829 targets (namely SH) we can also get too large displacements from
4830 big-endian corrections. */
4831 else if (GET_CODE (ad) == PLUS
4832 && GET_CODE (XEXP (ad, 0)) == REG
4833 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4834 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4835 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4837 /* Unshare the MEM rtx so we can safely alter it. */
4840 *memrefloc = copy_rtx (*memrefloc);
4841 loc = &XEXP (*memrefloc, 0);
4843 loc = &XEXP (*loc, 0);
4846 if (double_reg_address_ok)
4848 /* Unshare the sum as well. */
4849 *loc = ad = copy_rtx (ad);
4851 /* Reload the displacement into an index reg.
4852 We assume the frame pointer or arg pointer is a base reg. */
4853 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4854 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4860 /* If the sum of two regs is not necessarily valid,
4861 reload the sum into a base reg.
4862 That will at least work. */
4863 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4864 Pmode, opnum, type, ind_levels);
4866 return ! removed_and;
4869 /* If we have an indexed stack slot, there are three possible reasons why
4870 it might be invalid: The index might need to be reloaded, the address
4871 might have been made by frame pointer elimination and hence have a
4872 constant out of range, or both reasons might apply.
4874 We can easily check for an index needing reload, but even if that is the
4875 case, we might also have an invalid constant. To avoid making the
4876 conservative assumption and requiring two reloads, we see if this address
4877 is valid when not interpreted strictly. If it is, the only problem is
4878 that the index needs a reload and find_reloads_address_1 will take care
4881 Handle all base registers here, not just fp/ap/sp, because on some
4882 targets (namely SPARC) we can also get invalid addresses from preventive
4883 subreg big-endian corrections made by find_reloads_toplev.
4885 If we decide to do something, it must be that `double_reg_address_ok'
4886 is true. We generate a reload of the base register + constant and
4887 rework the sum so that the reload register will be added to the index.
4888 This is safe because we know the address isn't shared.
4890 We check for the base register as both the first and second operand of
4891 the innermost PLUS. */
4893 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4894 && GET_CODE (XEXP (ad, 0)) == PLUS
4895 && GET_CODE (XEXP (XEXP (ad, 0), 0)) == REG
4896 && REGNO (XEXP (XEXP (ad, 0), 0)) < FIRST_PSEUDO_REGISTER
4897 && (REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad, 0), 0), mode)
4898 || XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4899 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4900 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4902 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4903 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4905 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4906 && ! maybe_memory_address_p (mode, ad, &XEXP (XEXP (ad, 0), 1)))
4908 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4909 plus_constant (XEXP (XEXP (ad, 0), 0),
4910 INTVAL (XEXP (ad, 1))),
4911 XEXP (XEXP (ad, 0), 1));
4912 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0),
4913 MODE_BASE_REG_CLASS (mode),
4914 GET_MODE (ad), opnum, type, ind_levels);
4915 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4921 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4922 && GET_CODE (XEXP (ad, 0)) == PLUS
4923 && GET_CODE (XEXP (XEXP (ad, 0), 1)) == REG
4924 && REGNO (XEXP (XEXP (ad, 0), 1)) < FIRST_PSEUDO_REGISTER
4925 && (REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad, 0), 1), mode)
4926 || XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4927 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4928 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4930 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4931 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4933 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4934 && ! maybe_memory_address_p (mode, ad, &XEXP (XEXP (ad, 0), 0)))
4936 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4937 XEXP (XEXP (ad, 0), 0),
4938 plus_constant (XEXP (XEXP (ad, 0), 1),
4939 INTVAL (XEXP (ad, 1))));
4940 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4941 MODE_BASE_REG_CLASS (mode),
4942 GET_MODE (ad), opnum, type, ind_levels);
4943 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4949 /* See if address becomes valid when an eliminable register
4950 in a sum is replaced. */
4953 if (GET_CODE (ad) == PLUS)
4954 tem = subst_indexed_address (ad);
4955 if (tem != ad && strict_memory_address_p (mode, tem))
4957 /* Ok, we win that way. Replace any additional eliminable
4960 subst_reg_equivs_changed = 0;
4961 tem = subst_reg_equivs (tem, insn);
4963 /* Make sure that didn't make the address invalid again. */
4965 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4972 /* If constants aren't valid addresses, reload the constant address
4974 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4976 /* If AD is an address in the constant pool, the MEM rtx may be shared.
4977 Unshare it so we can safely alter it. */
4978 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4979 && CONSTANT_POOL_ADDRESS_P (ad))
4981 *memrefloc = copy_rtx (*memrefloc);
4982 loc = &XEXP (*memrefloc, 0);
4984 loc = &XEXP (*loc, 0);
4987 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4988 Pmode, opnum, type, ind_levels);
4989 return ! removed_and;
4992 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
4996 /* Find all pseudo regs appearing in AD
4997 that are eliminable in favor of equivalent values
4998 and do not have hard regs; replace them by their equivalents.
4999 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5000 front of it for pseudos that we have to replace with stack slots. */
5003 subst_reg_equivs (rtx ad, rtx insn)
5005 RTX_CODE code = GET_CODE (ad);
5024 int regno = REGNO (ad);
5026 if (reg_equiv_constant[regno] != 0)
5028 subst_reg_equivs_changed = 1;
5029 return reg_equiv_constant[regno];
5031 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
5033 rtx mem = make_memloc (ad, regno);
5034 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
5036 subst_reg_equivs_changed = 1;
5037 /* We mark the USE with QImode so that we recognize it
5038 as one that can be safely deleted at the end of
5040 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5049 /* Quickly dispose of a common case. */
5050 if (XEXP (ad, 0) == frame_pointer_rtx
5051 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
5059 fmt = GET_RTX_FORMAT (code);
5060 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5062 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5066 /* Compute the sum of X and Y, making canonicalizations assumed in an
5067 address, namely: sum constant integers, surround the sum of two
5068 constants with a CONST, put the constant as the second operand, and
5069 group the constant on the outermost sum.
5071 This routine assumes both inputs are already in canonical form. */
5074 form_sum (rtx x, rtx y)
5077 enum machine_mode mode = GET_MODE (x);
5079 if (mode == VOIDmode)
5080 mode = GET_MODE (y);
5082 if (mode == VOIDmode)
5085 if (GET_CODE (x) == CONST_INT)
5086 return plus_constant (y, INTVAL (x));
5087 else if (GET_CODE (y) == CONST_INT)
5088 return plus_constant (x, INTVAL (y));
5089 else if (CONSTANT_P (x))
5090 tem = x, x = y, y = tem;
5092 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5093 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5095 /* Note that if the operands of Y are specified in the opposite
5096 order in the recursive calls below, infinite recursion will occur. */
5097 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5098 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5100 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5101 constant will have been placed second. */
5102 if (CONSTANT_P (x) && CONSTANT_P (y))
5104 if (GET_CODE (x) == CONST)
5106 if (GET_CODE (y) == CONST)
5109 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5112 return gen_rtx_PLUS (mode, x, y);
5115 /* If ADDR is a sum containing a pseudo register that should be
5116 replaced with a constant (from reg_equiv_constant),
5117 return the result of doing so, and also apply the associative
5118 law so that the result is more likely to be a valid address.
5119 (But it is not guaranteed to be one.)
5121 Note that at most one register is replaced, even if more are
5122 replaceable. Also, we try to put the result into a canonical form
5123 so it is more likely to be a valid address.
5125 In all other cases, return ADDR. */
5128 subst_indexed_address (rtx addr)
5130 rtx op0 = 0, op1 = 0, op2 = 0;
5134 if (GET_CODE (addr) == PLUS)
5136 /* Try to find a register to replace. */
5137 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5138 if (GET_CODE (op0) == REG
5139 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5140 && reg_renumber[regno] < 0
5141 && reg_equiv_constant[regno] != 0)
5142 op0 = reg_equiv_constant[regno];
5143 else if (GET_CODE (op1) == REG
5144 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5145 && reg_renumber[regno] < 0
5146 && reg_equiv_constant[regno] != 0)
5147 op1 = reg_equiv_constant[regno];
5148 else if (GET_CODE (op0) == PLUS
5149 && (tem = subst_indexed_address (op0)) != op0)
5151 else if (GET_CODE (op1) == PLUS
5152 && (tem = subst_indexed_address (op1)) != op1)
5157 /* Pick out up to three things to add. */
5158 if (GET_CODE (op1) == PLUS)
5159 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5160 else if (GET_CODE (op0) == PLUS)
5161 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5163 /* Compute the sum. */
5165 op1 = form_sum (op1, op2);
5167 op0 = form_sum (op0, op1);
5174 /* Update the REG_INC notes for an insn. It updates all REG_INC
5175 notes for the instruction which refer to REGNO the to refer
5176 to the reload number.
5178 INSN is the insn for which any REG_INC notes need updating.
5180 REGNO is the register number which has been reloaded.
5182 RELOADNUM is the reload number. */
5185 update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
5186 int reloadnum ATTRIBUTE_UNUSED)
5191 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5192 if (REG_NOTE_KIND (link) == REG_INC
5193 && (int) REGNO (XEXP (link, 0)) == regno)
5194 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5198 /* Record the pseudo registers we must reload into hard registers in a
5199 subexpression of a would-be memory address, X referring to a value
5200 in mode MODE. (This function is not called if the address we find
5203 CONTEXT = 1 means we are considering regs as index regs,
5204 = 0 means we are considering them as base regs.
5206 OPNUM and TYPE specify the purpose of any reloads made.
5208 IND_LEVELS says how many levels of indirect addressing are
5209 supported at this point in the address.
5211 INSN, if nonzero, is the insn in which we do the reload. It is used
5212 to determine if we may generate output reloads.
5214 We return nonzero if X, as a whole, is reloaded or replaced. */
5216 /* Note that we take shortcuts assuming that no multi-reg machine mode
5217 occurs as part of an address.
5218 Also, this is not fully machine-customizable; it works for machines
5219 such as VAXen and 68000's and 32000's, but other possible machines
5220 could have addressing modes that this does not handle right. */
5223 find_reloads_address_1 (enum machine_mode mode, rtx x, int context,
5224 rtx *loc, int opnum, enum reload_type type,
5225 int ind_levels, rtx insn)
5227 RTX_CODE code = GET_CODE (x);
5233 rtx orig_op0 = XEXP (x, 0);
5234 rtx orig_op1 = XEXP (x, 1);
5235 RTX_CODE code0 = GET_CODE (orig_op0);
5236 RTX_CODE code1 = GET_CODE (orig_op1);
5240 if (GET_CODE (op0) == SUBREG)
5242 op0 = SUBREG_REG (op0);
5243 code0 = GET_CODE (op0);
5244 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5245 op0 = gen_rtx_REG (word_mode,
5247 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5248 GET_MODE (SUBREG_REG (orig_op0)),
5249 SUBREG_BYTE (orig_op0),
5250 GET_MODE (orig_op0))));
5253 if (GET_CODE (op1) == SUBREG)
5255 op1 = SUBREG_REG (op1);
5256 code1 = GET_CODE (op1);
5257 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5258 /* ??? Why is this given op1's mode and above for
5259 ??? op0 SUBREGs we use word_mode? */
5260 op1 = gen_rtx_REG (GET_MODE (op1),
5262 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5263 GET_MODE (SUBREG_REG (orig_op1)),
5264 SUBREG_BYTE (orig_op1),
5265 GET_MODE (orig_op1))));
5267 /* Plus in the index register may be created only as a result of
5268 register remateralization for expression like &localvar*4. Reload it.
5269 It may be possible to combine the displacement on the outer level,
5270 but it is probably not worthwhile to do so. */
5273 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5274 opnum, ADDR_TYPE (type), ind_levels, insn);
5275 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5276 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5277 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5281 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5282 || code0 == ZERO_EXTEND || code1 == MEM)
5284 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5285 type, ind_levels, insn);
5286 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5287 type, ind_levels, insn);
5290 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5291 || code1 == ZERO_EXTEND || code0 == MEM)
5293 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5294 type, ind_levels, insn);
5295 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5296 type, ind_levels, insn);
5299 else if (code0 == CONST_INT || code0 == CONST
5300 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5301 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5302 type, ind_levels, insn);
5304 else if (code1 == CONST_INT || code1 == CONST
5305 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5306 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5307 type, ind_levels, insn);
5309 else if (code0 == REG && code1 == REG)
5311 if (REG_OK_FOR_INDEX_P (op0)
5312 && REG_MODE_OK_FOR_BASE_P (op1, mode))
5314 else if (REG_OK_FOR_INDEX_P (op1)
5315 && REG_MODE_OK_FOR_BASE_P (op0, mode))
5317 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5318 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5319 type, ind_levels, insn);
5320 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5321 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5322 type, ind_levels, insn);
5323 else if (REG_OK_FOR_INDEX_P (op1))
5324 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5325 type, ind_levels, insn);
5326 else if (REG_OK_FOR_INDEX_P (op0))
5327 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5328 type, ind_levels, insn);
5331 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5332 type, ind_levels, insn);
5333 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5334 type, ind_levels, insn);
5338 else if (code0 == REG)
5340 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5341 type, ind_levels, insn);
5342 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5343 type, ind_levels, insn);
5346 else if (code1 == REG)
5348 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5349 type, ind_levels, insn);
5350 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5351 type, ind_levels, insn);
5360 rtx op0 = XEXP (x, 0);
5361 rtx op1 = XEXP (x, 1);
5363 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5366 /* Currently, we only support {PRE,POST}_MODIFY constructs
5367 where a base register is {inc,dec}remented by the contents
5368 of another register or by a constant value. Thus, these
5369 operands must match. */
5370 if (op0 != XEXP (op1, 0))
5373 /* Require index register (or constant). Let's just handle the
5374 register case in the meantime... If the target allows
5375 auto-modify by a constant then we could try replacing a pseudo
5376 register with its equivalent constant where applicable. */
5377 if (REG_P (XEXP (op1, 1)))
5378 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5379 find_reloads_address_1 (mode, XEXP (op1, 1), 1, &XEXP (op1, 1),
5380 opnum, type, ind_levels, insn);
5382 if (REG_P (XEXP (op1, 0)))
5384 int regno = REGNO (XEXP (op1, 0));
5387 /* A register that is incremented cannot be constant! */
5388 if (regno >= FIRST_PSEUDO_REGISTER
5389 && reg_equiv_constant[regno] != 0)
5392 /* Handle a register that is equivalent to a memory location
5393 which cannot be addressed directly. */
5394 if (reg_equiv_memory_loc[regno] != 0
5395 && (reg_equiv_address[regno] != 0
5396 || num_not_at_initial_offset))
5398 rtx tem = make_memloc (XEXP (x, 0), regno);
5400 if (reg_equiv_address[regno]
5401 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5403 /* First reload the memory location's address.
5404 We can't use ADDR_TYPE (type) here, because we need to
5405 write back the value after reading it, hence we actually
5406 need two registers. */
5407 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5408 &XEXP (tem, 0), opnum,
5412 /* Then reload the memory location into a base
5414 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5416 MODE_BASE_REG_CLASS (mode),
5417 GET_MODE (x), GET_MODE (x), 0,
5418 0, opnum, RELOAD_OTHER);
5420 update_auto_inc_notes (this_insn, regno, reloadnum);
5425 if (reg_renumber[regno] >= 0)
5426 regno = reg_renumber[regno];
5428 /* We require a base register here... */
5429 if (!REGNO_MODE_OK_FOR_BASE_P (regno, GET_MODE (x)))
5431 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5432 &XEXP (op1, 0), &XEXP (x, 0),
5433 MODE_BASE_REG_CLASS (mode),
5434 GET_MODE (x), GET_MODE (x), 0, 0,
5435 opnum, RELOAD_OTHER);
5437 update_auto_inc_notes (this_insn, regno, reloadnum);
5450 if (GET_CODE (XEXP (x, 0)) == REG)
5452 int regno = REGNO (XEXP (x, 0));
5456 /* A register that is incremented cannot be constant! */
5457 if (regno >= FIRST_PSEUDO_REGISTER
5458 && reg_equiv_constant[regno] != 0)
5461 /* Handle a register that is equivalent to a memory location
5462 which cannot be addressed directly. */
5463 if (reg_equiv_memory_loc[regno] != 0
5464 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5466 rtx tem = make_memloc (XEXP (x, 0), regno);
5467 if (reg_equiv_address[regno]
5468 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5470 /* First reload the memory location's address.
5471 We can't use ADDR_TYPE (type) here, because we need to
5472 write back the value after reading it, hence we actually
5473 need two registers. */
5474 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5475 &XEXP (tem, 0), opnum, type,
5477 /* Put this inside a new increment-expression. */
5478 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5479 /* Proceed to reload that, as if it contained a register. */
5483 /* If we have a hard register that is ok as an index,
5484 don't make a reload. If an autoincrement of a nice register
5485 isn't "valid", it must be that no autoincrement is "valid".
5486 If that is true and something made an autoincrement anyway,
5487 this must be a special context where one is allowed.
5488 (For example, a "push" instruction.)
5489 We can't improve this address, so leave it alone. */
5491 /* Otherwise, reload the autoincrement into a suitable hard reg
5492 and record how much to increment by. */
5494 if (reg_renumber[regno] >= 0)
5495 regno = reg_renumber[regno];
5496 if ((regno >= FIRST_PSEUDO_REGISTER
5497 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5498 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5502 /* If we can output the register afterwards, do so, this
5503 saves the extra update.
5504 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5505 CALL_INSN - and it does not set CC0.
5506 But don't do this if we cannot directly address the
5507 memory location, since this will make it harder to
5508 reuse address reloads, and increases register pressure.
5509 Also don't do this if we can probably update x directly. */
5510 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM
5512 : reg_equiv_mem[regno]);
5513 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5514 if (insn && GET_CODE (insn) == INSN && equiv
5515 && memory_operand (equiv, GET_MODE (equiv))
5517 && ! sets_cc0_p (PATTERN (insn))
5519 && ! (icode != CODE_FOR_nothing
5520 && ((*insn_data[icode].operand[0].predicate)
5522 && ((*insn_data[icode].operand[1].predicate)
5525 /* We use the original pseudo for loc, so that
5526 emit_reload_insns() knows which pseudo this
5527 reload refers to and updates the pseudo rtx, not
5528 its equivalent memory location, as well as the
5529 corresponding entry in reg_last_reload_reg. */
5530 loc = &XEXP (x_orig, 0);
5533 = push_reload (x, x, loc, loc,
5534 (context ? INDEX_REG_CLASS :
5535 MODE_BASE_REG_CLASS (mode)),
5536 GET_MODE (x), GET_MODE (x), 0, 0,
5537 opnum, RELOAD_OTHER);
5542 = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5543 (context ? INDEX_REG_CLASS :
5544 MODE_BASE_REG_CLASS (mode)),
5545 GET_MODE (x), GET_MODE (x), 0, 0,
5548 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5553 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5559 else if (GET_CODE (XEXP (x, 0)) == MEM)
5561 /* This is probably the result of a substitution, by eliminate_regs,
5562 of an equivalent address for a pseudo that was not allocated to a
5563 hard register. Verify that the specified address is valid and
5564 reload it into a register. */
5565 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5566 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5570 /* Since we know we are going to reload this item, don't decrement
5571 for the indirection level.
5573 Note that this is actually conservative: it would be slightly
5574 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5576 /* We can't use ADDR_TYPE (type) here, because we need to
5577 write back the value after reading it, hence we actually
5578 need two registers. */
5579 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5580 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5581 opnum, type, ind_levels, insn);
5583 reloadnum = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5584 (context ? INDEX_REG_CLASS :
5585 MODE_BASE_REG_CLASS (mode)),
5586 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5588 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5590 link = FIND_REG_INC_NOTE (this_insn, tem);
5592 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5599 /* This is probably the result of a substitution, by eliminate_regs, of
5600 an equivalent address for a pseudo that was not allocated to a hard
5601 register. Verify that the specified address is valid and reload it
5604 Since we know we are going to reload this item, don't decrement for
5605 the indirection level.
5607 Note that this is actually conservative: it would be slightly more
5608 efficient to use the value of SPILL_INDIRECT_LEVELS from
5611 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5612 opnum, ADDR_TYPE (type), ind_levels, insn);
5613 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5614 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5615 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5620 int regno = REGNO (x);
5622 if (reg_equiv_constant[regno] != 0)
5624 find_reloads_address_part (reg_equiv_constant[regno], loc,
5625 (context ? INDEX_REG_CLASS :
5626 MODE_BASE_REG_CLASS (mode)),
5627 GET_MODE (x), opnum, type, ind_levels);
5631 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5632 that feeds this insn. */
5633 if (reg_equiv_mem[regno] != 0)
5635 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
5636 (context ? INDEX_REG_CLASS :
5637 MODE_BASE_REG_CLASS (mode)),
5638 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5643 if (reg_equiv_memory_loc[regno]
5644 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5646 rtx tem = make_memloc (x, regno);
5647 if (reg_equiv_address[regno] != 0
5648 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5651 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5652 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5657 if (reg_renumber[regno] >= 0)
5658 regno = reg_renumber[regno];
5660 if ((regno >= FIRST_PSEUDO_REGISTER
5661 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5662 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5664 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5665 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5666 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5670 /* If a register appearing in an address is the subject of a CLOBBER
5671 in this insn, reload it into some other register to be safe.
5672 The CLOBBER is supposed to make the register unavailable
5673 from before this insn to after it. */
5674 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5676 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5677 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5678 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5685 if (GET_CODE (SUBREG_REG (x)) == REG)
5687 /* If this is a SUBREG of a hard register and the resulting register
5688 is of the wrong class, reload the whole SUBREG. This avoids
5689 needless copies if SUBREG_REG is multi-word. */
5690 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5692 int regno ATTRIBUTE_UNUSED = subreg_regno (x);
5694 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5695 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5697 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5698 (context ? INDEX_REG_CLASS :
5699 MODE_BASE_REG_CLASS (mode)),
5700 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5704 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5705 is larger than the class size, then reload the whole SUBREG. */
5708 enum reg_class class = (context ? INDEX_REG_CLASS
5709 : MODE_BASE_REG_CLASS (mode));
5710 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5711 > reg_class_size[class])
5713 x = find_reloads_subreg_address (x, 0, opnum, type,
5715 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5716 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5728 const char *fmt = GET_RTX_FORMAT (code);
5731 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5734 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5735 opnum, type, ind_levels, insn);
5742 /* X, which is found at *LOC, is a part of an address that needs to be
5743 reloaded into a register of class CLASS. If X is a constant, or if
5744 X is a PLUS that contains a constant, check that the constant is a
5745 legitimate operand and that we are supposed to be able to load
5746 it into the register.
5748 If not, force the constant into memory and reload the MEM instead.
5750 MODE is the mode to use, in case X is an integer constant.
5752 OPNUM and TYPE describe the purpose of any reloads made.
5754 IND_LEVELS says how many levels of indirect addressing this machine
5758 find_reloads_address_part (rtx x, rtx *loc, enum reg_class class,
5759 enum machine_mode mode, int opnum,
5760 enum reload_type type, int ind_levels)
5763 && (! LEGITIMATE_CONSTANT_P (x)
5764 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5768 tem = x = force_const_mem (mode, x);
5769 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5770 opnum, type, ind_levels, 0);
5773 else if (GET_CODE (x) == PLUS
5774 && CONSTANT_P (XEXP (x, 1))
5775 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5776 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5780 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5781 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5782 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5783 opnum, type, ind_levels, 0);
5786 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5787 mode, VOIDmode, 0, 0, opnum, type);
5790 /* X, a subreg of a pseudo, is a part of an address that needs to be
5793 If the pseudo is equivalent to a memory location that cannot be directly
5794 addressed, make the necessary address reloads.
5796 If address reloads have been necessary, or if the address is changed
5797 by register elimination, return the rtx of the memory location;
5798 otherwise, return X.
5800 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5803 OPNUM and TYPE identify the purpose of the reload.
5805 IND_LEVELS says how many levels of indirect addressing are
5806 supported at this point in the address.
5808 INSN, if nonzero, is the insn in which we do the reload. It is used
5809 to determine where to put USEs for pseudos that we have to replace with
5813 find_reloads_subreg_address (rtx x, int force_replace, int opnum,
5814 enum reload_type type, int ind_levels, rtx insn)
5816 int regno = REGNO (SUBREG_REG (x));
5818 if (reg_equiv_memory_loc[regno])
5820 /* If the address is not directly addressable, or if the address is not
5821 offsettable, then it must be replaced. */
5823 && (reg_equiv_address[regno]
5824 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5827 if (force_replace || num_not_at_initial_offset)
5829 rtx tem = make_memloc (SUBREG_REG (x), regno);
5831 /* If the address changes because of register elimination, then
5832 it must be replaced. */
5834 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5836 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
5837 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5840 /* For big-endian paradoxical subregs, SUBREG_BYTE does not
5841 hold the correct (negative) byte offset. */
5842 if (BYTES_BIG_ENDIAN && outer_size > inner_size)
5843 offset = inner_size - outer_size;
5845 offset = SUBREG_BYTE (x);
5847 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5848 PUT_MODE (tem, GET_MODE (x));
5850 /* If this was a paradoxical subreg that we replaced, the
5851 resulting memory must be sufficiently aligned to allow
5852 us to widen the mode of the memory. */
5853 if (outer_size > inner_size && STRICT_ALIGNMENT)
5857 base = XEXP (tem, 0);
5858 if (GET_CODE (base) == PLUS)
5860 if (GET_CODE (XEXP (base, 1)) == CONST_INT
5861 && INTVAL (XEXP (base, 1)) % outer_size != 0)
5863 base = XEXP (base, 0);
5865 if (GET_CODE (base) != REG
5866 || (REGNO_POINTER_ALIGN (REGNO (base))
5867 < outer_size * BITS_PER_UNIT))
5871 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5872 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
5875 /* If this is not a toplevel operand, find_reloads doesn't see
5876 this substitution. We have to emit a USE of the pseudo so
5877 that delete_output_reload can see it. */
5878 if (replace_reloads && recog_data.operand[opnum] != x)
5879 /* We mark the USE with QImode so that we recognize it
5880 as one that can be safely deleted at the end of
5882 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
5892 /* Substitute into the current INSN the registers into which we have reloaded
5893 the things that need reloading. The array `replacements'
5894 contains the locations of all pointers that must be changed
5895 and says what to replace them with.
5897 Return the rtx that X translates into; usually X, but modified. */
5900 subst_reloads (rtx insn)
5904 for (i = 0; i < n_replacements; i++)
5906 struct replacement *r = &replacements[i];
5907 rtx reloadreg = rld[r->what].reg_rtx;
5910 #ifdef ENABLE_CHECKING
5911 /* Internal consistency test. Check that we don't modify
5912 anything in the equivalence arrays. Whenever something from
5913 those arrays needs to be reloaded, it must be unshared before
5914 being substituted into; the equivalence must not be modified.
5915 Otherwise, if the equivalence is used after that, it will
5916 have been modified, and the thing substituted (probably a
5917 register) is likely overwritten and not a usable equivalence. */
5920 for (check_regno = 0; check_regno < max_regno; check_regno++)
5922 #define CHECK_MODF(ARRAY) \
5923 if (ARRAY[check_regno] \
5924 && loc_mentioned_in_p (r->where, \
5925 ARRAY[check_regno])) \
5928 CHECK_MODF (reg_equiv_constant);
5929 CHECK_MODF (reg_equiv_memory_loc);
5930 CHECK_MODF (reg_equiv_address);
5931 CHECK_MODF (reg_equiv_mem);
5934 #endif /* ENABLE_CHECKING */
5936 /* If we're replacing a LABEL_REF with a register, add a
5937 REG_LABEL note to indicate to flow which label this
5938 register refers to. */
5939 if (GET_CODE (*r->where) == LABEL_REF
5940 && GET_CODE (insn) == JUMP_INSN)
5941 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
5942 XEXP (*r->where, 0),
5945 /* Encapsulate RELOADREG so its machine mode matches what
5946 used to be there. Note that gen_lowpart_common will
5947 do the wrong thing if RELOADREG is multi-word. RELOADREG
5948 will always be a REG here. */
5949 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5950 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
5952 /* If we are putting this into a SUBREG and RELOADREG is a
5953 SUBREG, we would be making nested SUBREGs, so we have to fix
5954 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5956 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5958 if (GET_MODE (*r->subreg_loc)
5959 == GET_MODE (SUBREG_REG (reloadreg)))
5960 *r->subreg_loc = SUBREG_REG (reloadreg);
5964 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
5966 /* When working with SUBREGs the rule is that the byte
5967 offset must be a multiple of the SUBREG's mode. */
5968 final_offset = (final_offset /
5969 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5970 final_offset = (final_offset *
5971 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5973 *r->where = SUBREG_REG (reloadreg);
5974 SUBREG_BYTE (*r->subreg_loc) = final_offset;
5978 *r->where = reloadreg;
5980 /* If reload got no reg and isn't optional, something's wrong. */
5981 else if (! rld[r->what].optional)
5986 /* Make a copy of any replacements being done into X and move those
5987 copies to locations in Y, a copy of X. */
5990 copy_replacements (rtx x, rtx y)
5992 /* We can't support X being a SUBREG because we might then need to know its
5993 location if something inside it was replaced. */
5994 if (GET_CODE (x) == SUBREG)
5997 copy_replacements_1 (&x, &y, n_replacements);
6001 copy_replacements_1 (rtx *px, rtx *py, int orig_replacements)
6005 struct replacement *r;
6009 for (j = 0; j < orig_replacements; j++)
6011 if (replacements[j].subreg_loc == px)
6013 r = &replacements[n_replacements++];
6014 r->where = replacements[j].where;
6016 r->what = replacements[j].what;
6017 r->mode = replacements[j].mode;
6019 else if (replacements[j].where == px)
6021 r = &replacements[n_replacements++];
6024 r->what = replacements[j].what;
6025 r->mode = replacements[j].mode;
6031 code = GET_CODE (x);
6032 fmt = GET_RTX_FORMAT (code);
6034 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6037 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6038 else if (fmt[i] == 'E')
6039 for (j = XVECLEN (x, i); --j >= 0; )
6040 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6045 /* Change any replacements being done to *X to be done to *Y. */
6048 move_replacements (rtx *x, rtx *y)
6052 for (i = 0; i < n_replacements; i++)
6053 if (replacements[i].subreg_loc == x)
6054 replacements[i].subreg_loc = y;
6055 else if (replacements[i].where == x)
6057 replacements[i].where = y;
6058 replacements[i].subreg_loc = 0;
6062 /* If LOC was scheduled to be replaced by something, return the replacement.
6063 Otherwise, return *LOC. */
6066 find_replacement (rtx *loc)
6068 struct replacement *r;
6070 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6072 rtx reloadreg = rld[r->what].reg_rtx;
6074 if (reloadreg && r->where == loc)
6076 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6077 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
6081 else if (reloadreg && r->subreg_loc == loc)
6083 /* RELOADREG must be either a REG or a SUBREG.
6085 ??? Is it actually still ever a SUBREG? If so, why? */
6087 if (GET_CODE (reloadreg) == REG)
6088 return gen_rtx_REG (GET_MODE (*loc),
6089 (REGNO (reloadreg) +
6090 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
6091 GET_MODE (SUBREG_REG (*loc)),
6094 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6098 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6100 /* When working with SUBREGs the rule is that the byte
6101 offset must be a multiple of the SUBREG's mode. */
6102 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6103 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6104 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6110 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6111 what's inside and make a new rtl if so. */
6112 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6113 || GET_CODE (*loc) == MULT)
6115 rtx x = find_replacement (&XEXP (*loc, 0));
6116 rtx y = find_replacement (&XEXP (*loc, 1));
6118 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6119 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6125 /* Return nonzero if register in range [REGNO, ENDREGNO)
6126 appears either explicitly or implicitly in X
6127 other than being stored into (except for earlyclobber operands).
6129 References contained within the substructure at LOC do not count.
6130 LOC may be zero, meaning don't ignore anything.
6132 This is similar to refers_to_regno_p in rtlanal.c except that we
6133 look at equivalences for pseudos that didn't get hard registers. */
6136 refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno,
6148 code = GET_CODE (x);
6155 /* If this is a pseudo, a hard register must not have been allocated.
6156 X must therefore either be a constant or be in memory. */
6157 if (r >= FIRST_PSEUDO_REGISTER)
6159 if (reg_equiv_memory_loc[r])
6160 return refers_to_regno_for_reload_p (regno, endregno,
6161 reg_equiv_memory_loc[r],
6164 if (reg_equiv_constant[r])
6170 return (endregno > r
6171 && regno < r + (r < FIRST_PSEUDO_REGISTER
6172 ? HARD_REGNO_NREGS (r, GET_MODE (x))
6176 /* If this is a SUBREG of a hard reg, we can see exactly which
6177 registers are being modified. Otherwise, handle normally. */
6178 if (GET_CODE (SUBREG_REG (x)) == REG
6179 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6181 unsigned int inner_regno = subreg_regno (x);
6182 unsigned int inner_endregno
6183 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6184 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6186 return endregno > inner_regno && regno < inner_endregno;
6192 if (&SET_DEST (x) != loc
6193 /* Note setting a SUBREG counts as referring to the REG it is in for
6194 a pseudo but not for hard registers since we can
6195 treat each word individually. */
6196 && ((GET_CODE (SET_DEST (x)) == SUBREG
6197 && loc != &SUBREG_REG (SET_DEST (x))
6198 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
6199 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6200 && refers_to_regno_for_reload_p (regno, endregno,
6201 SUBREG_REG (SET_DEST (x)),
6203 /* If the output is an earlyclobber operand, this is
6205 || ((GET_CODE (SET_DEST (x)) != REG
6206 || earlyclobber_operand_p (SET_DEST (x)))
6207 && refers_to_regno_for_reload_p (regno, endregno,
6208 SET_DEST (x), loc))))
6211 if (code == CLOBBER || loc == &SET_SRC (x))
6220 /* X does not match, so try its subexpressions. */
6222 fmt = GET_RTX_FORMAT (code);
6223 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6225 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6233 if (refers_to_regno_for_reload_p (regno, endregno,
6237 else if (fmt[i] == 'E')
6240 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6241 if (loc != &XVECEXP (x, i, j)
6242 && refers_to_regno_for_reload_p (regno, endregno,
6243 XVECEXP (x, i, j), loc))
6250 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6251 we check if any register number in X conflicts with the relevant register
6252 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6253 contains a MEM (we don't bother checking for memory addresses that can't
6254 conflict because we expect this to be a rare case.
6256 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6257 that we look at equivalences for pseudos that didn't get hard registers. */
6260 reg_overlap_mentioned_for_reload_p (rtx x, rtx in)
6262 int regno, endregno;
6264 /* Overly conservative. */
6265 if (GET_CODE (x) == STRICT_LOW_PART
6266 || GET_RTX_CLASS (GET_CODE (x)) == 'a')
6269 /* If either argument is a constant, then modifying X can not affect IN. */
6270 if (CONSTANT_P (x) || CONSTANT_P (in))
6272 else if (GET_CODE (x) == SUBREG)
6274 regno = REGNO (SUBREG_REG (x));
6275 if (regno < FIRST_PSEUDO_REGISTER)
6276 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6277 GET_MODE (SUBREG_REG (x)),
6281 else if (GET_CODE (x) == REG)
6285 /* If this is a pseudo, it must not have been assigned a hard register.
6286 Therefore, it must either be in memory or be a constant. */
6288 if (regno >= FIRST_PSEUDO_REGISTER)
6290 if (reg_equiv_memory_loc[regno])
6291 return refers_to_mem_for_reload_p (in);
6292 else if (reg_equiv_constant[regno])
6297 else if (GET_CODE (x) == MEM)
6298 return refers_to_mem_for_reload_p (in);
6299 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6300 || GET_CODE (x) == CC0)
6301 return reg_mentioned_p (x, in);
6302 else if (GET_CODE (x) == PLUS)
6304 /* We actually want to know if X is mentioned somewhere inside IN.
6305 We must not say that (plus (sp) (const_int 124)) is in
6306 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6307 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6308 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6309 while (GET_CODE (in) == MEM)
6311 if (GET_CODE (in) == REG)
6313 else if (GET_CODE (in) == PLUS)
6314 return (reg_overlap_mentioned_for_reload_p (x, XEXP (in, 0))
6315 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 1)));
6316 else return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6317 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6322 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6323 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6325 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6328 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6332 refers_to_mem_for_reload_p (rtx x)
6337 if (GET_CODE (x) == MEM)
6340 if (GET_CODE (x) == REG)
6341 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6342 && reg_equiv_memory_loc[REGNO (x)]);
6344 fmt = GET_RTX_FORMAT (GET_CODE (x));
6345 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6347 && (GET_CODE (XEXP (x, i)) == MEM
6348 || refers_to_mem_for_reload_p (XEXP (x, i))))
6354 /* Check the insns before INSN to see if there is a suitable register
6355 containing the same value as GOAL.
6356 If OTHER is -1, look for a register in class CLASS.
6357 Otherwise, just see if register number OTHER shares GOAL's value.
6359 Return an rtx for the register found, or zero if none is found.
6361 If RELOAD_REG_P is (short *)1,
6362 we reject any hard reg that appears in reload_reg_rtx
6363 because such a hard reg is also needed coming into this insn.
6365 If RELOAD_REG_P is any other nonzero value,
6366 it is a vector indexed by hard reg number
6367 and we reject any hard reg whose element in the vector is nonnegative
6368 as well as any that appears in reload_reg_rtx.
6370 If GOAL is zero, then GOALREG is a register number; we look
6371 for an equivalent for that register.
6373 MODE is the machine mode of the value we want an equivalence for.
6374 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6376 This function is used by jump.c as well as in the reload pass.
6378 If GOAL is the sum of the stack pointer and a constant, we treat it
6379 as if it were a constant except that sp is required to be unchanging. */
6382 find_equiv_reg (rtx goal, rtx insn, enum reg_class class, int other,
6383 short *reload_reg_p, int goalreg, enum machine_mode mode)
6386 rtx goaltry, valtry, value, where;
6392 int goal_mem_addr_varies = 0;
6393 int need_stable_sp = 0;
6400 else if (GET_CODE (goal) == REG)
6401 regno = REGNO (goal);
6402 else if (GET_CODE (goal) == MEM)
6404 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6405 if (MEM_VOLATILE_P (goal))
6407 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
6409 /* An address with side effects must be reexecuted. */
6424 else if (CONSTANT_P (goal))
6426 else if (GET_CODE (goal) == PLUS
6427 && XEXP (goal, 0) == stack_pointer_rtx
6428 && CONSTANT_P (XEXP (goal, 1)))
6429 goal_const = need_stable_sp = 1;
6430 else if (GET_CODE (goal) == PLUS
6431 && XEXP (goal, 0) == frame_pointer_rtx
6432 && CONSTANT_P (XEXP (goal, 1)))
6438 /* Scan insns back from INSN, looking for one that copies
6439 a value into or out of GOAL.
6440 Stop and give up if we reach a label. */
6446 if (p == 0 || GET_CODE (p) == CODE_LABEL
6447 || num > PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS))
6450 if (GET_CODE (p) == INSN
6451 /* If we don't want spill regs ... */
6452 && (! (reload_reg_p != 0
6453 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6454 /* ... then ignore insns introduced by reload; they aren't
6455 useful and can cause results in reload_as_needed to be
6456 different from what they were when calculating the need for
6457 spills. If we notice an input-reload insn here, we will
6458 reject it below, but it might hide a usable equivalent.
6459 That makes bad code. It may even abort: perhaps no reg was
6460 spilled for this insn because it was assumed we would find
6462 || INSN_UID (p) < reload_first_uid))
6465 pat = single_set (p);
6467 /* First check for something that sets some reg equal to GOAL. */
6470 && true_regnum (SET_SRC (pat)) == regno
6471 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6474 && true_regnum (SET_DEST (pat)) == regno
6475 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6477 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6478 /* When looking for stack pointer + const,
6479 make sure we don't use a stack adjust. */
6480 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6481 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6483 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6484 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6486 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6487 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6488 /* If we are looking for a constant,
6489 and something equivalent to that constant was copied
6490 into a reg, we can use that reg. */
6491 || (goal_const && REG_NOTES (p) != 0
6492 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6493 && ((rtx_equal_p (XEXP (tem, 0), goal)
6495 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6496 || (GET_CODE (SET_DEST (pat)) == REG
6497 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6498 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6500 && GET_CODE (goal) == CONST_INT
6502 = operand_subword (XEXP (tem, 0), 0, 0,
6504 && rtx_equal_p (goal, goaltry)
6506 = operand_subword (SET_DEST (pat), 0, 0,
6508 && (valueno = true_regnum (valtry)) >= 0)))
6509 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6511 && GET_CODE (SET_DEST (pat)) == REG
6512 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6513 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6515 && GET_CODE (goal) == CONST_INT
6516 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6518 && rtx_equal_p (goal, goaltry)
6520 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6521 && (valueno = true_regnum (valtry)) >= 0)))
6525 if (valueno != other)
6528 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6534 for (i = HARD_REGNO_NREGS (valueno, mode) - 1; i >= 0; i--)
6535 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6548 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6549 (or copying VALUE into GOAL, if GOAL is also a register).
6550 Now verify that VALUE is really valid. */
6552 /* VALUENO is the register number of VALUE; a hard register. */
6554 /* Don't try to re-use something that is killed in this insn. We want
6555 to be able to trust REG_UNUSED notes. */
6556 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6559 /* If we propose to get the value from the stack pointer or if GOAL is
6560 a MEM based on the stack pointer, we need a stable SP. */
6561 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6562 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6566 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6567 if (GET_MODE (value) != mode)
6570 /* Reject VALUE if it was loaded from GOAL
6571 and is also a register that appears in the address of GOAL. */
6573 if (goal_mem && value == SET_DEST (single_set (where))
6574 && refers_to_regno_for_reload_p (valueno,
6576 + HARD_REGNO_NREGS (valueno, mode)),
6580 /* Reject registers that overlap GOAL. */
6582 if (!goal_mem && !goal_const
6583 && regno + (int) HARD_REGNO_NREGS (regno, mode) > valueno
6584 && regno < valueno + (int) HARD_REGNO_NREGS (valueno, mode))
6587 nregs = HARD_REGNO_NREGS (regno, mode);
6588 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6590 /* Reject VALUE if it is one of the regs reserved for reloads.
6591 Reload1 knows how to reuse them anyway, and it would get
6592 confused if we allocated one without its knowledge.
6593 (Now that insns introduced by reload are ignored above,
6594 this case shouldn't happen, but I'm not positive.) */
6596 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6599 for (i = 0; i < valuenregs; ++i)
6600 if (reload_reg_p[valueno + i] >= 0)
6604 /* Reject VALUE if it is a register being used for an input reload
6605 even if it is not one of those reserved. */
6607 if (reload_reg_p != 0)
6610 for (i = 0; i < n_reloads; i++)
6611 if (rld[i].reg_rtx != 0 && rld[i].in)
6613 int regno1 = REGNO (rld[i].reg_rtx);
6614 int nregs1 = HARD_REGNO_NREGS (regno1,
6615 GET_MODE (rld[i].reg_rtx));
6616 if (regno1 < valueno + valuenregs
6617 && regno1 + nregs1 > valueno)
6623 /* We must treat frame pointer as varying here,
6624 since it can vary--in a nonlocal goto as generated by expand_goto. */
6625 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6627 /* Now verify that the values of GOAL and VALUE remain unaltered
6628 until INSN is reached. */
6637 /* Don't trust the conversion past a function call
6638 if either of the two is in a call-clobbered register, or memory. */
6639 if (GET_CODE (p) == CALL_INSN)
6643 if (goal_mem || need_stable_sp)
6646 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6647 for (i = 0; i < nregs; ++i)
6648 if (call_used_regs[regno + i])
6651 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6652 for (i = 0; i < valuenregs; ++i)
6653 if (call_used_regs[valueno + i])
6655 #ifdef NON_SAVING_SETJMP
6656 if (NON_SAVING_SETJMP && find_reg_note (p, REG_SETJMP, NULL))
6665 /* Watch out for unspec_volatile, and volatile asms. */
6666 if (volatile_insn_p (pat))
6669 /* If this insn P stores in either GOAL or VALUE, return 0.
6670 If GOAL is a memory ref and this insn writes memory, return 0.
6671 If GOAL is a memory ref and its address is not constant,
6672 and this insn P changes a register used in GOAL, return 0. */
6674 if (GET_CODE (pat) == COND_EXEC)
6675 pat = COND_EXEC_CODE (pat);
6676 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6678 rtx dest = SET_DEST (pat);
6679 while (GET_CODE (dest) == SUBREG
6680 || GET_CODE (dest) == ZERO_EXTRACT
6681 || GET_CODE (dest) == SIGN_EXTRACT
6682 || GET_CODE (dest) == STRICT_LOW_PART)
6683 dest = XEXP (dest, 0);
6684 if (GET_CODE (dest) == REG)
6686 int xregno = REGNO (dest);
6688 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6689 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6692 if (xregno < regno + nregs && xregno + xnregs > regno)
6694 if (xregno < valueno + valuenregs
6695 && xregno + xnregs > valueno)
6697 if (goal_mem_addr_varies
6698 && reg_overlap_mentioned_for_reload_p (dest, goal))
6700 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6703 else if (goal_mem && GET_CODE (dest) == MEM
6704 && ! push_operand (dest, GET_MODE (dest)))
6706 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6707 && reg_equiv_memory_loc[regno] != 0)
6709 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6712 else if (GET_CODE (pat) == PARALLEL)
6715 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6717 rtx v1 = XVECEXP (pat, 0, i);
6718 if (GET_CODE (v1) == COND_EXEC)
6719 v1 = COND_EXEC_CODE (v1);
6720 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6722 rtx dest = SET_DEST (v1);
6723 while (GET_CODE (dest) == SUBREG
6724 || GET_CODE (dest) == ZERO_EXTRACT
6725 || GET_CODE (dest) == SIGN_EXTRACT
6726 || GET_CODE (dest) == STRICT_LOW_PART)
6727 dest = XEXP (dest, 0);
6728 if (GET_CODE (dest) == REG)
6730 int xregno = REGNO (dest);
6732 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6733 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6736 if (xregno < regno + nregs
6737 && xregno + xnregs > regno)
6739 if (xregno < valueno + valuenregs
6740 && xregno + xnregs > valueno)
6742 if (goal_mem_addr_varies
6743 && reg_overlap_mentioned_for_reload_p (dest,
6746 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6749 else if (goal_mem && GET_CODE (dest) == MEM
6750 && ! push_operand (dest, GET_MODE (dest)))
6752 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6753 && reg_equiv_memory_loc[regno] != 0)
6755 else if (need_stable_sp
6756 && push_operand (dest, GET_MODE (dest)))
6762 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
6766 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6767 link = XEXP (link, 1))
6769 pat = XEXP (link, 0);
6770 if (GET_CODE (pat) == CLOBBER)
6772 rtx dest = SET_DEST (pat);
6774 if (GET_CODE (dest) == REG)
6776 int xregno = REGNO (dest);
6778 = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6780 if (xregno < regno + nregs
6781 && xregno + xnregs > regno)
6783 else if (xregno < valueno + valuenregs
6784 && xregno + xnregs > valueno)
6786 else if (goal_mem_addr_varies
6787 && reg_overlap_mentioned_for_reload_p (dest,
6792 else if (goal_mem && GET_CODE (dest) == MEM
6793 && ! push_operand (dest, GET_MODE (dest)))
6795 else if (need_stable_sp
6796 && push_operand (dest, GET_MODE (dest)))
6803 /* If this insn auto-increments or auto-decrements
6804 either regno or valueno, return 0 now.
6805 If GOAL is a memory ref and its address is not constant,
6806 and this insn P increments a register used in GOAL, return 0. */
6810 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6811 if (REG_NOTE_KIND (link) == REG_INC
6812 && GET_CODE (XEXP (link, 0)) == REG)
6814 int incno = REGNO (XEXP (link, 0));
6815 if (incno < regno + nregs && incno >= regno)
6817 if (incno < valueno + valuenregs && incno >= valueno)
6819 if (goal_mem_addr_varies
6820 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6830 /* Find a place where INCED appears in an increment or decrement operator
6831 within X, and return the amount INCED is incremented or decremented by.
6832 The value is always positive. */
6835 find_inc_amount (rtx x, rtx inced)
6837 enum rtx_code code = GET_CODE (x);
6843 rtx addr = XEXP (x, 0);
6844 if ((GET_CODE (addr) == PRE_DEC
6845 || GET_CODE (addr) == POST_DEC
6846 || GET_CODE (addr) == PRE_INC
6847 || GET_CODE (addr) == POST_INC)
6848 && XEXP (addr, 0) == inced)
6849 return GET_MODE_SIZE (GET_MODE (x));
6850 else if ((GET_CODE (addr) == PRE_MODIFY
6851 || GET_CODE (addr) == POST_MODIFY)
6852 && GET_CODE (XEXP (addr, 1)) == PLUS
6853 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
6854 && XEXP (addr, 0) == inced
6855 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
6857 i = INTVAL (XEXP (XEXP (addr, 1), 1));
6858 return i < 0 ? -i : i;
6862 fmt = GET_RTX_FORMAT (code);
6863 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6867 int tem = find_inc_amount (XEXP (x, i), inced);
6874 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6876 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6886 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6887 If SETS is nonzero, also consider SETs. */
6890 regno_clobbered_p (unsigned int regno, rtx insn, enum machine_mode mode,
6893 unsigned int nregs = HARD_REGNO_NREGS (regno, mode);
6894 unsigned int endregno = regno + nregs;
6896 if ((GET_CODE (PATTERN (insn)) == CLOBBER
6897 || (sets && GET_CODE (PATTERN (insn)) == SET))
6898 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6900 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
6902 return test >= regno && test < endregno;
6905 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6907 int i = XVECLEN (PATTERN (insn), 0) - 1;
6911 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6912 if ((GET_CODE (elt) == CLOBBER
6913 || (sets && GET_CODE (PATTERN (insn)) == SET))
6914 && GET_CODE (XEXP (elt, 0)) == REG)
6916 unsigned int test = REGNO (XEXP (elt, 0));
6918 if (test >= regno && test < endregno)
6927 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
6929 reload_adjust_reg_for_mode (rtx reloadreg, enum machine_mode mode)
6933 if (GET_MODE (reloadreg) == mode)
6936 regno = REGNO (reloadreg);
6938 if (WORDS_BIG_ENDIAN)
6939 regno += HARD_REGNO_NREGS (regno, GET_MODE (reloadreg))
6940 - HARD_REGNO_NREGS (regno, mode);
6942 return gen_rtx_REG (mode, regno);
6945 static const char *const reload_when_needed_name[] =
6948 "RELOAD_FOR_OUTPUT",
6950 "RELOAD_FOR_INPUT_ADDRESS",
6951 "RELOAD_FOR_INPADDR_ADDRESS",
6952 "RELOAD_FOR_OUTPUT_ADDRESS",
6953 "RELOAD_FOR_OUTADDR_ADDRESS",
6954 "RELOAD_FOR_OPERAND_ADDRESS",
6955 "RELOAD_FOR_OPADDR_ADDR",
6957 "RELOAD_FOR_OTHER_ADDRESS"
6960 static const char * const reg_class_names[] = REG_CLASS_NAMES;
6962 /* These functions are used to print the variables set by 'find_reloads' */
6965 debug_reload_to_stream (FILE *f)
6972 for (r = 0; r < n_reloads; r++)
6974 fprintf (f, "Reload %d: ", r);
6978 fprintf (f, "reload_in (%s) = ",
6979 GET_MODE_NAME (rld[r].inmode));
6980 print_inline_rtx (f, rld[r].in, 24);
6981 fprintf (f, "\n\t");
6984 if (rld[r].out != 0)
6986 fprintf (f, "reload_out (%s) = ",
6987 GET_MODE_NAME (rld[r].outmode));
6988 print_inline_rtx (f, rld[r].out, 24);
6989 fprintf (f, "\n\t");
6992 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
6994 fprintf (f, "%s (opnum = %d)",
6995 reload_when_needed_name[(int) rld[r].when_needed],
6998 if (rld[r].optional)
6999 fprintf (f, ", optional");
7001 if (rld[r].nongroup)
7002 fprintf (f, ", nongroup");
7004 if (rld[r].inc != 0)
7005 fprintf (f, ", inc by %d", rld[r].inc);
7007 if (rld[r].nocombine)
7008 fprintf (f, ", can't combine");
7010 if (rld[r].secondary_p)
7011 fprintf (f, ", secondary_reload_p");
7013 if (rld[r].in_reg != 0)
7015 fprintf (f, "\n\treload_in_reg: ");
7016 print_inline_rtx (f, rld[r].in_reg, 24);
7019 if (rld[r].out_reg != 0)
7021 fprintf (f, "\n\treload_out_reg: ");
7022 print_inline_rtx (f, rld[r].out_reg, 24);
7025 if (rld[r].reg_rtx != 0)
7027 fprintf (f, "\n\treload_reg_rtx: ");
7028 print_inline_rtx (f, rld[r].reg_rtx, 24);
7032 if (rld[r].secondary_in_reload != -1)
7034 fprintf (f, "%ssecondary_in_reload = %d",
7035 prefix, rld[r].secondary_in_reload);
7039 if (rld[r].secondary_out_reload != -1)
7040 fprintf (f, "%ssecondary_out_reload = %d\n",
7041 prefix, rld[r].secondary_out_reload);
7044 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7046 fprintf (f, "%ssecondary_in_icode = %s", prefix,
7047 insn_data[rld[r].secondary_in_icode].name);
7051 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7052 fprintf (f, "%ssecondary_out_icode = %s", prefix,
7053 insn_data[rld[r].secondary_out_icode].name);
7062 debug_reload_to_stream (stderr);