1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
94 #include "insn-config.h"
95 #include "insn-codes.h"
99 #include "hard-reg-set.h"
103 #include "function.h"
107 #ifndef REGISTER_MOVE_COST
108 #define REGISTER_MOVE_COST(x, y) 2
111 #ifndef REGNO_MODE_OK_FOR_BASE_P
112 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
115 #ifndef REG_MODE_OK_FOR_BASE_P
116 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
119 /* All reloads of the current insn are recorded here. See reload.h for
122 struct reload rld[MAX_RELOADS];
124 /* All the "earlyclobber" operands of the current insn
125 are recorded here. */
127 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
129 int reload_n_operands;
131 /* Replacing reloads.
133 If `replace_reloads' is nonzero, then as each reload is recorded
134 an entry is made for it in the table `replacements'.
135 Then later `subst_reloads' can look through that table and
136 perform all the replacements needed. */
138 /* Nonzero means record the places to replace. */
139 static int replace_reloads;
141 /* Each replacement is recorded with a structure like this. */
144 rtx *where; /* Location to store in */
145 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
146 a SUBREG; 0 otherwise. */
147 int what; /* which reload this is for */
148 enum machine_mode mode; /* mode it must have */
151 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
153 /* Number of replacements currently recorded. */
154 static int n_replacements;
156 /* Used to track what is modified by an operand. */
159 int reg_flag; /* Nonzero if referencing a register. */
160 int safe; /* Nonzero if this can't conflict with anything. */
161 rtx base; /* Base address for MEM. */
162 HOST_WIDE_INT start; /* Starting offset or register number. */
163 HOST_WIDE_INT end; /* Ending offset or register number. */
166 #ifdef SECONDARY_MEMORY_NEEDED
168 /* Save MEMs needed to copy from one class of registers to another. One MEM
169 is used per mode, but normally only one or two modes are ever used.
171 We keep two versions, before and after register elimination. The one
172 after register elimination is record separately for each operand. This
173 is done in case the address is not valid to be sure that we separately
176 static rtx secondary_memlocs[NUM_MACHINE_MODES];
177 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
180 /* The instruction we are doing reloads for;
181 so we can test whether a register dies in it. */
182 static rtx this_insn;
184 /* Nonzero if this instruction is a user-specified asm with operands. */
185 static int this_insn_is_asm;
187 /* If hard_regs_live_known is nonzero,
188 we can tell which hard regs are currently live,
189 at least enough to succeed in choosing dummy reloads. */
190 static int hard_regs_live_known;
192 /* Indexed by hard reg number,
193 element is nonnegative if hard reg has been spilled.
194 This vector is passed to `find_reloads' as an argument
195 and is not changed here. */
196 static short *static_reload_reg_p;
198 /* Set to 1 in subst_reg_equivs if it changes anything. */
199 static int subst_reg_equivs_changed;
201 /* On return from push_reload, holds the reload-number for the OUT
202 operand, which can be different for that from the input operand. */
203 static int output_reloadnum;
205 /* Compare two RTX's. */
206 #define MATCHES(x, y) \
207 (x == y || (x != 0 && (GET_CODE (x) == REG \
208 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
209 : rtx_equal_p (x, y) && ! side_effects_p (x))))
211 /* Indicates if two reloads purposes are for similar enough things that we
212 can merge their reloads. */
213 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
214 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
215 || ((when1) == (when2) && (op1) == (op2)) \
216 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
217 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
218 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
219 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
220 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
222 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
223 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
224 ((when1) != (when2) \
225 || ! ((op1) == (op2) \
226 || (when1) == RELOAD_FOR_INPUT \
227 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
228 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
230 /* If we are going to reload an address, compute the reload type to
232 #define ADDR_TYPE(type) \
233 ((type) == RELOAD_FOR_INPUT_ADDRESS \
234 ? RELOAD_FOR_INPADDR_ADDRESS \
235 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
236 ? RELOAD_FOR_OUTADDR_ADDRESS \
239 #ifdef HAVE_SECONDARY_RELOADS
240 static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class,
241 enum machine_mode, enum reload_type,
244 static enum reg_class find_valid_class PROTO((enum machine_mode, int));
245 static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
246 enum machine_mode, enum machine_mode,
247 int, int, int, enum reload_type));
248 static void push_replacement PROTO((rtx *, int, enum machine_mode));
249 static void combine_reloads PROTO((void));
250 static int find_reusable_reload PROTO((rtx *, rtx, enum reg_class,
251 enum reload_type, int, int));
252 static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
253 enum machine_mode, enum machine_mode,
254 enum reg_class, int, int));
255 static int hard_reg_set_here_p PROTO((int, int, rtx));
256 static struct decomposition decompose PROTO((rtx));
257 static int immune_p PROTO((rtx, rtx, struct decomposition));
258 static int alternative_allows_memconst PROTO((const char *, int));
259 static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int, rtx));
260 static rtx make_memloc PROTO((rtx, int));
261 static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
262 int, enum reload_type, int, rtx));
263 static rtx subst_reg_equivs PROTO((rtx, rtx));
264 static rtx subst_indexed_address PROTO((rtx));
265 static int find_reloads_address_1 PROTO((enum machine_mode, rtx, int, rtx *,
266 int, enum reload_type,int, rtx));
267 static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
268 enum machine_mode, int,
269 enum reload_type, int));
270 static rtx find_reloads_subreg_address PROTO((rtx, int, int, enum reload_type,
272 static int find_inc_amount PROTO((rtx, rtx));
273 static int loc_mentioned_in_p PROTO((rtx *, rtx));
274 extern void debug_reload_to_stream PROTO((FILE *));
275 extern void debug_reload PROTO((void));
277 #ifdef HAVE_SECONDARY_RELOADS
279 /* Determine if any secondary reloads are needed for loading (if IN_P is
280 non-zero) or storing (if IN_P is zero) X to or from a reload register of
281 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
282 are needed, push them.
284 Return the reload number of the secondary reload we made, or -1 if
285 we didn't need one. *PICODE is set to the insn_code to use if we do
286 need a secondary reload. */
289 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
295 enum reg_class reload_class;
296 enum machine_mode reload_mode;
297 enum reload_type type;
298 enum insn_code *picode;
300 enum reg_class class = NO_REGS;
301 enum machine_mode mode = reload_mode;
302 enum insn_code icode = CODE_FOR_nothing;
303 enum reg_class t_class = NO_REGS;
304 enum machine_mode t_mode = VOIDmode;
305 enum insn_code t_icode = CODE_FOR_nothing;
306 enum reload_type secondary_type;
307 int s_reload, t_reload = -1;
309 if (type == RELOAD_FOR_INPUT_ADDRESS
310 || type == RELOAD_FOR_OUTPUT_ADDRESS
311 || type == RELOAD_FOR_INPADDR_ADDRESS
312 || type == RELOAD_FOR_OUTADDR_ADDRESS)
313 secondary_type = type;
315 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
317 *picode = CODE_FOR_nothing;
319 /* If X is a paradoxical SUBREG, use the inner value to determine both the
320 mode and object being reloaded. */
321 if (GET_CODE (x) == SUBREG
322 && (GET_MODE_SIZE (GET_MODE (x))
323 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
326 reload_mode = GET_MODE (x);
329 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
330 is still a pseudo-register by now, it *must* have an equivalent MEM
331 but we don't want to assume that), use that equivalent when seeing if
332 a secondary reload is needed since whether or not a reload is needed
333 might be sensitive to the form of the MEM. */
335 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
336 && reg_equiv_mem[REGNO (x)] != 0)
337 x = reg_equiv_mem[REGNO (x)];
339 #ifdef SECONDARY_INPUT_RELOAD_CLASS
341 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
344 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
346 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
349 /* If we don't need any secondary registers, done. */
350 if (class == NO_REGS)
353 /* Get a possible insn to use. If the predicate doesn't accept X, don't
356 icode = (in_p ? reload_in_optab[(int) reload_mode]
357 : reload_out_optab[(int) reload_mode]);
359 if (icode != CODE_FOR_nothing
360 && insn_data[(int) icode].operand[in_p].predicate
361 && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode)))
362 icode = CODE_FOR_nothing;
364 /* If we will be using an insn, see if it can directly handle the reload
365 register we will be using. If it can, the secondary reload is for a
366 scratch register. If it can't, we will use the secondary reload for
367 an intermediate register and require a tertiary reload for the scratch
370 if (icode != CODE_FOR_nothing)
372 /* If IN_P is non-zero, the reload register will be the output in
373 operand 0. If IN_P is zero, the reload register will be the input
374 in operand 1. Outputs should have an initial "=", which we must
378 = insn_data[(int) icode].operand[!in_p].constraint[in_p];
379 enum reg_class insn_class
380 = (insn_letter == 'r' ? GENERAL_REGS
381 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter));
383 if (insn_class == NO_REGS
385 && insn_data[(int) icode].operand[!in_p].constraint[0] != '=')
386 /* The scratch register's constraint must start with "=&". */
387 || insn_data[(int) icode].operand[2].constraint[0] != '='
388 || insn_data[(int) icode].operand[2].constraint[1] != '&')
391 if (reg_class_subset_p (reload_class, insn_class))
392 mode = insn_data[(int) icode].operand[2].mode;
395 char t_letter = insn_data[(int) icode].operand[2].constraint[2];
397 t_mode = insn_data[(int) icode].operand[2].mode;
398 t_class = (t_letter == 'r' ? GENERAL_REGS
399 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter));
401 icode = CODE_FOR_nothing;
405 /* This case isn't valid, so fail. Reload is allowed to use the same
406 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
407 in the case of a secondary register, we actually need two different
408 registers for correct code. We fail here to prevent the possibility of
409 silently generating incorrect code later.
411 The convention is that secondary input reloads are valid only if the
412 secondary_class is different from class. If you have such a case, you
413 can not use secondary reloads, you must work around the problem some
416 Allow this when MODE is not reload_mode and assume that the generated
417 code handles this case (it does on the Alpha, which is the only place
418 this currently happens). */
420 if (in_p && class == reload_class && mode == reload_mode)
423 /* If we need a tertiary reload, see if we have one we can reuse or else
426 if (t_class != NO_REGS)
428 for (t_reload = 0; t_reload < n_reloads; t_reload++)
429 if (rld[t_reload].secondary_p
430 && (reg_class_subset_p (t_class, rld[t_reload].class)
431 || reg_class_subset_p (rld[t_reload].class, t_class))
432 && ((in_p && rld[t_reload].inmode == t_mode)
433 || (! in_p && rld[t_reload].outmode == t_mode))
434 && ((in_p && (rld[t_reload].secondary_in_icode
435 == CODE_FOR_nothing))
436 || (! in_p &&(rld[t_reload].secondary_out_icode
437 == CODE_FOR_nothing)))
438 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
439 && MERGABLE_RELOADS (secondary_type,
440 rld[t_reload].when_needed,
441 opnum, rld[t_reload].opnum))
444 rld[t_reload].inmode = t_mode;
446 rld[t_reload].outmode = t_mode;
448 if (reg_class_subset_p (t_class, rld[t_reload].class))
449 rld[t_reload].class = t_class;
451 rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum);
452 rld[t_reload].optional &= optional;
453 rld[t_reload].secondary_p = 1;
454 if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed,
455 opnum, rld[t_reload].opnum))
456 rld[t_reload].when_needed = RELOAD_OTHER;
459 if (t_reload == n_reloads)
461 /* We need to make a new tertiary reload for this register class. */
462 rld[t_reload].in = rld[t_reload].out = 0;
463 rld[t_reload].class = t_class;
464 rld[t_reload].inmode = in_p ? t_mode : VOIDmode;
465 rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode;
466 rld[t_reload].reg_rtx = 0;
467 rld[t_reload].optional = optional;
468 rld[t_reload].inc = 0;
469 /* Maybe we could combine these, but it seems too tricky. */
470 rld[t_reload].nocombine = 1;
471 rld[t_reload].in_reg = 0;
472 rld[t_reload].out_reg = 0;
473 rld[t_reload].opnum = opnum;
474 rld[t_reload].when_needed = secondary_type;
475 rld[t_reload].secondary_in_reload = -1;
476 rld[t_reload].secondary_out_reload = -1;
477 rld[t_reload].secondary_in_icode = CODE_FOR_nothing;
478 rld[t_reload].secondary_out_icode = CODE_FOR_nothing;
479 rld[t_reload].secondary_p = 1;
485 /* See if we can reuse an existing secondary reload. */
486 for (s_reload = 0; s_reload < n_reloads; s_reload++)
487 if (rld[s_reload].secondary_p
488 && (reg_class_subset_p (class, rld[s_reload].class)
489 || reg_class_subset_p (rld[s_reload].class, class))
490 && ((in_p && rld[s_reload].inmode == mode)
491 || (! in_p && rld[s_reload].outmode == mode))
492 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
493 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
494 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
495 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
496 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
497 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
498 opnum, rld[s_reload].opnum))
501 rld[s_reload].inmode = mode;
503 rld[s_reload].outmode = mode;
505 if (reg_class_subset_p (class, rld[s_reload].class))
506 rld[s_reload].class = class;
508 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
509 rld[s_reload].optional &= optional;
510 rld[s_reload].secondary_p = 1;
511 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
512 opnum, rld[s_reload].opnum))
513 rld[s_reload].when_needed = RELOAD_OTHER;
516 if (s_reload == n_reloads)
518 #ifdef SECONDARY_MEMORY_NEEDED
519 /* If we need a memory location to copy between the two reload regs,
520 set it up now. Note that we do the input case before making
521 the reload and the output case after. This is due to the
522 way reloads are output. */
524 if (in_p && icode == CODE_FOR_nothing
525 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
526 get_secondary_mem (x, reload_mode, opnum, type);
529 /* We need to make a new secondary reload for this register class. */
530 rld[s_reload].in = rld[s_reload].out = 0;
531 rld[s_reload].class = class;
533 rld[s_reload].inmode = in_p ? mode : VOIDmode;
534 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
535 rld[s_reload].reg_rtx = 0;
536 rld[s_reload].optional = optional;
537 rld[s_reload].inc = 0;
538 /* Maybe we could combine these, but it seems too tricky. */
539 rld[s_reload].nocombine = 1;
540 rld[s_reload].in_reg = 0;
541 rld[s_reload].out_reg = 0;
542 rld[s_reload].opnum = opnum;
543 rld[s_reload].when_needed = secondary_type;
544 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
545 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
546 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
547 rld[s_reload].secondary_out_icode
548 = ! in_p ? t_icode : CODE_FOR_nothing;
549 rld[s_reload].secondary_p = 1;
553 #ifdef SECONDARY_MEMORY_NEEDED
554 if (! in_p && icode == CODE_FOR_nothing
555 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
556 get_secondary_mem (x, mode, opnum, type);
563 #endif /* HAVE_SECONDARY_RELOADS */
565 #ifdef SECONDARY_MEMORY_NEEDED
567 /* Return a memory location that will be used to copy X in mode MODE.
568 If we haven't already made a location for this mode in this insn,
569 call find_reloads_address on the location being returned. */
572 get_secondary_mem (x, mode, opnum, type)
573 rtx x ATTRIBUTE_UNUSED;
574 enum machine_mode mode;
576 enum reload_type type;
581 /* By default, if MODE is narrower than a word, widen it to a word.
582 This is required because most machines that require these memory
583 locations do not support short load and stores from all registers
584 (e.g., FP registers). */
586 #ifdef SECONDARY_MEMORY_NEEDED_MODE
587 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
589 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
590 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
593 /* If we already have made a MEM for this operand in MODE, return it. */
594 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
595 return secondary_memlocs_elim[(int) mode][opnum];
597 /* If this is the first time we've tried to get a MEM for this mode,
598 allocate a new one. `something_changed' in reload will get set
599 by noticing that the frame size has changed. */
601 if (secondary_memlocs[(int) mode] == 0)
603 #ifdef SECONDARY_MEMORY_NEEDED_RTX
604 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
606 secondary_memlocs[(int) mode]
607 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
611 /* Get a version of the address doing any eliminations needed. If that
612 didn't give us a new MEM, make a new one if it isn't valid. */
614 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
615 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
617 if (! mem_valid && loc == secondary_memlocs[(int) mode])
618 loc = copy_rtx (loc);
620 /* The only time the call below will do anything is if the stack
621 offset is too large. In that case IND_LEVELS doesn't matter, so we
622 can just pass a zero. Adjust the type to be the address of the
623 corresponding object. If the address was valid, save the eliminated
624 address. If it wasn't valid, we need to make a reload each time, so
629 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
630 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
633 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
637 secondary_memlocs_elim[(int) mode][opnum] = loc;
641 /* Clear any secondary memory locations we've made. */
644 clear_secondary_mem ()
646 bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);
648 #endif /* SECONDARY_MEMORY_NEEDED */
650 /* Find the largest class for which every register number plus N is valid in
651 M1 (if in range). Abort if no such class exists. */
653 static enum reg_class
654 find_valid_class (m1, n)
655 enum machine_mode m1;
660 enum reg_class best_class = NO_REGS;
663 for (class = 1; class < N_REG_CLASSES; class++)
666 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
667 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
668 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
669 && ! HARD_REGNO_MODE_OK (regno + n, m1))
672 if (! bad && reg_class_size[class] > best_size)
673 best_class = class, best_size = reg_class_size[class];
682 /* Return the number of a previously made reload that can be combined with
683 a new one, or n_reloads if none of the existing reloads can be used.
684 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
685 push_reload, they determine the kind of the new reload that we try to
686 combine. P_IN points to the corresponding value of IN, which can be
687 modified by this function.
688 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
690 find_reusable_reload (p_in, out, class, type, opnum, dont_share)
692 enum reg_class class;
693 enum reload_type type;
694 int opnum, dont_share;
698 /* We can't merge two reloads if the output of either one is
701 if (earlyclobber_operand_p (out))
704 /* We can use an existing reload if the class is right
705 and at least one of IN and OUT is a match
706 and the other is at worst neutral.
707 (A zero compared against anything is neutral.)
709 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
710 for the same thing since that can cause us to need more reload registers
711 than we otherwise would. */
713 for (i = 0; i < n_reloads; i++)
714 if ((reg_class_subset_p (class, rld[i].class)
715 || reg_class_subset_p (rld[i].class, class))
716 /* If the existing reload has a register, it must fit our class. */
717 && (rld[i].reg_rtx == 0
718 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
719 true_regnum (rld[i].reg_rtx)))
720 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
721 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
722 || (out != 0 && MATCHES (rld[i].out, out)
723 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
724 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
725 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
726 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
729 /* Reloading a plain reg for input can match a reload to postincrement
730 that reg, since the postincrement's value is the right value.
731 Likewise, it can match a preincrement reload, since we regard
732 the preincrementation as happening before any ref in this insn
734 for (i = 0; i < n_reloads; i++)
735 if ((reg_class_subset_p (class, rld[i].class)
736 || reg_class_subset_p (rld[i].class, class))
737 /* If the existing reload has a register, it must fit our
739 && (rld[i].reg_rtx == 0
740 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
741 true_regnum (rld[i].reg_rtx)))
742 && out == 0 && rld[i].out == 0 && rld[i].in != 0
743 && ((GET_CODE (in) == REG
744 && (GET_CODE (rld[i].in) == POST_INC
745 || GET_CODE (rld[i].in) == POST_DEC
746 || GET_CODE (rld[i].in) == PRE_INC
747 || GET_CODE (rld[i].in) == PRE_DEC)
748 && MATCHES (XEXP (rld[i].in, 0), in))
750 (GET_CODE (rld[i].in) == REG
751 && (GET_CODE (in) == POST_INC
752 || GET_CODE (in) == POST_DEC
753 || GET_CODE (in) == PRE_INC
754 || GET_CODE (in) == PRE_DEC)
755 && MATCHES (XEXP (in, 0), rld[i].in)))
756 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
757 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
758 && MERGABLE_RELOADS (type, rld[i].when_needed,
759 opnum, rld[i].opnum))
761 /* Make sure reload_in ultimately has the increment,
762 not the plain register. */
763 if (GET_CODE (in) == REG)
770 /* Record one reload that needs to be performed.
771 IN is an rtx saying where the data are to be found before this instruction.
772 OUT says where they must be stored after the instruction.
773 (IN is zero for data not read, and OUT is zero for data not written.)
774 INLOC and OUTLOC point to the places in the instructions where
775 IN and OUT were found.
776 If IN and OUT are both non-zero, it means the same register must be used
777 to reload both IN and OUT.
779 CLASS is a register class required for the reloaded data.
780 INMODE is the machine mode that the instruction requires
781 for the reg that replaces IN and OUTMODE is likewise for OUT.
783 If IN is zero, then OUT's location and mode should be passed as
786 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
788 OPTIONAL nonzero means this reload does not need to be performed:
789 it can be discarded if that is more convenient.
791 OPNUM and TYPE say what the purpose of this reload is.
793 The return value is the reload-number for this reload.
795 If both IN and OUT are nonzero, in some rare cases we might
796 want to make two separate reloads. (Actually we never do this now.)
797 Therefore, the reload-number for OUT is stored in
798 output_reloadnum when we return; the return value applies to IN.
799 Usually (presently always), when IN and OUT are nonzero,
800 the two reload-numbers are equal, but the caller should be careful to
804 push_reload (in, out, inloc, outloc, class,
805 inmode, outmode, strict_low, optional, opnum, type)
808 enum reg_class class;
809 enum machine_mode inmode, outmode;
813 enum reload_type type;
817 int dont_remove_subreg = 0;
818 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
819 int secondary_in_reload = -1, secondary_out_reload = -1;
820 enum insn_code secondary_in_icode = CODE_FOR_nothing;
821 enum insn_code secondary_out_icode = CODE_FOR_nothing;
823 /* INMODE and/or OUTMODE could be VOIDmode if no mode
824 has been specified for the operand. In that case,
825 use the operand's mode as the mode to reload. */
826 if (inmode == VOIDmode && in != 0)
827 inmode = GET_MODE (in);
828 if (outmode == VOIDmode && out != 0)
829 outmode = GET_MODE (out);
831 /* If IN is a pseudo register everywhere-equivalent to a constant, and
832 it is not in a hard register, reload straight from the constant,
833 since we want to get rid of such pseudo registers.
834 Often this is done earlier, but not always in find_reloads_address. */
835 if (in != 0 && GET_CODE (in) == REG)
837 register int regno = REGNO (in);
839 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
840 && reg_equiv_constant[regno] != 0)
841 in = reg_equiv_constant[regno];
844 /* Likewise for OUT. Of course, OUT will never be equivalent to
845 an actual constant, but it might be equivalent to a memory location
846 (in the case of a parameter). */
847 if (out != 0 && GET_CODE (out) == REG)
849 register int regno = REGNO (out);
851 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
852 && reg_equiv_constant[regno] != 0)
853 out = reg_equiv_constant[regno];
856 /* If we have a read-write operand with an address side-effect,
857 change either IN or OUT so the side-effect happens only once. */
858 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
860 if (GET_CODE (XEXP (in, 0)) == POST_INC
861 || GET_CODE (XEXP (in, 0)) == POST_DEC)
862 in = gen_rtx_MEM (GET_MODE (in), XEXP (XEXP (in, 0), 0));
863 if (GET_CODE (XEXP (in, 0)) == PRE_INC
864 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
865 out = gen_rtx_MEM (GET_MODE (out), XEXP (XEXP (out, 0), 0));
868 /* If we are reloading a (SUBREG constant ...), really reload just the
869 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
870 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
871 a pseudo and hence will become a MEM) with M1 wider than M2 and the
872 register is a pseudo, also reload the inside expression.
873 For machines that extend byte loads, do this for any SUBREG of a pseudo
874 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
875 M2 is an integral mode that gets extended when loaded.
876 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
877 either M1 is not valid for R or M2 is wider than a word but we only
878 need one word to store an M2-sized quantity in R.
879 (However, if OUT is nonzero, we need to reload the reg *and*
880 the subreg, so do nothing here, and let following statement handle it.)
882 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
883 we can't handle it here because CONST_INT does not indicate a mode.
885 Similarly, we must reload the inside expression if we have a
886 STRICT_LOW_PART (presumably, in == out in the cas).
888 Also reload the inner expression if it does not require a secondary
889 reload but the SUBREG does.
891 Finally, reload the inner expression if it is a register that is in
892 the class whose registers cannot be referenced in a different size
893 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
894 cannot reload just the inside since we might end up with the wrong
895 register class. But if it is inside a STRICT_LOW_PART, we have
896 no choice, so we hope we do get the right register class there. */
898 if (in != 0 && GET_CODE (in) == SUBREG
899 && (SUBREG_WORD (in) == 0 || strict_low)
900 #ifdef CLASS_CANNOT_CHANGE_SIZE
901 && class != CLASS_CANNOT_CHANGE_SIZE
903 && (CONSTANT_P (SUBREG_REG (in))
904 || GET_CODE (SUBREG_REG (in)) == PLUS
906 || (((GET_CODE (SUBREG_REG (in)) == REG
907 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
908 || GET_CODE (SUBREG_REG (in)) == MEM)
909 && ((GET_MODE_SIZE (inmode)
910 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
911 #ifdef LOAD_EXTEND_OP
912 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
913 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
915 && (GET_MODE_SIZE (inmode)
916 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
917 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
918 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
920 #ifdef WORD_REGISTER_OPERATIONS
921 || ((GET_MODE_SIZE (inmode)
922 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
923 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
924 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
928 || (GET_CODE (SUBREG_REG (in)) == REG
929 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
930 /* The case where out is nonzero
931 is handled differently in the following statement. */
932 && (out == 0 || SUBREG_WORD (in) == 0)
933 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
934 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
936 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
938 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
939 GET_MODE (SUBREG_REG (in)))))
940 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
943 #ifdef SECONDARY_INPUT_RELOAD_CLASS
944 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
945 && (SECONDARY_INPUT_RELOAD_CLASS (class,
946 GET_MODE (SUBREG_REG (in)),
950 #ifdef CLASS_CANNOT_CHANGE_SIZE
951 || (GET_CODE (SUBREG_REG (in)) == REG
952 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
953 && (TEST_HARD_REG_BIT
954 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
955 REGNO (SUBREG_REG (in))))
956 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
957 != GET_MODE_SIZE (inmode)))
961 in_subreg_loc = inloc;
962 inloc = &SUBREG_REG (in);
964 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
965 if (GET_CODE (in) == MEM)
966 /* This is supposed to happen only for paradoxical subregs made by
967 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
968 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
971 inmode = GET_MODE (in);
974 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
975 either M1 is not valid for R or M2 is wider than a word but we only
976 need one word to store an M2-sized quantity in R.
978 However, we must reload the inner reg *as well as* the subreg in
981 /* Similar issue for (SUBREG constant ...) if it was not handled by the
982 code above. This can happen if SUBREG_WORD != 0. */
984 if (in != 0 && GET_CODE (in) == SUBREG
985 && (CONSTANT_P (SUBREG_REG (in))
986 || (GET_CODE (SUBREG_REG (in)) == REG
987 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
988 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in))
991 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
992 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
994 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
996 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
997 GET_MODE (SUBREG_REG (in)))))))))
999 /* This relies on the fact that emit_reload_insns outputs the
1000 instructions for input reloads of type RELOAD_OTHER in the same
1001 order as the reloads. Thus if the outer reload is also of type
1002 RELOAD_OTHER, we are guaranteed that this inner reload will be
1003 output before the outer reload. */
1004 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
1005 find_valid_class (inmode, SUBREG_WORD (in)),
1006 VOIDmode, VOIDmode, 0, 0, opnum, type);
1007 dont_remove_subreg = 1;
1010 /* Similarly for paradoxical and problematical SUBREGs on the output.
1011 Note that there is no reason we need worry about the previous value
1012 of SUBREG_REG (out); even if wider than out,
1013 storing in a subreg is entitled to clobber it all
1014 (except in the case of STRICT_LOW_PART,
1015 and in that case the constraint should label it input-output.) */
1016 if (out != 0 && GET_CODE (out) == SUBREG
1017 && (SUBREG_WORD (out) == 0 || strict_low)
1018 #ifdef CLASS_CANNOT_CHANGE_SIZE
1019 && class != CLASS_CANNOT_CHANGE_SIZE
1021 && (CONSTANT_P (SUBREG_REG (out))
1023 || (((GET_CODE (SUBREG_REG (out)) == REG
1024 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1025 || GET_CODE (SUBREG_REG (out)) == MEM)
1026 && ((GET_MODE_SIZE (outmode)
1027 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1028 #ifdef WORD_REGISTER_OPERATIONS
1029 || ((GET_MODE_SIZE (outmode)
1030 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1031 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1032 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1036 || (GET_CODE (SUBREG_REG (out)) == REG
1037 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1038 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1039 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1041 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1043 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1044 GET_MODE (SUBREG_REG (out)))))
1045 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
1046 + SUBREG_WORD (out)),
1048 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1049 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1050 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1051 GET_MODE (SUBREG_REG (out)),
1055 #ifdef CLASS_CANNOT_CHANGE_SIZE
1056 || (GET_CODE (SUBREG_REG (out)) == REG
1057 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1058 && (TEST_HARD_REG_BIT
1059 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
1060 REGNO (SUBREG_REG (out))))
1061 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1062 != GET_MODE_SIZE (outmode)))
1066 out_subreg_loc = outloc;
1067 outloc = &SUBREG_REG (out);
1069 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1070 if (GET_CODE (out) == MEM
1071 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1074 outmode = GET_MODE (out);
1077 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1078 either M1 is not valid for R or M2 is wider than a word but we only
1079 need one word to store an M2-sized quantity in R.
1081 However, we must reload the inner reg *as well as* the subreg in
1082 that case. In this case, the inner reg is an in-out reload. */
1084 if (out != 0 && GET_CODE (out) == SUBREG
1085 && GET_CODE (SUBREG_REG (out)) == REG
1086 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1087 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)) + SUBREG_WORD (out),
1089 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1090 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1092 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1094 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1095 GET_MODE (SUBREG_REG (out)))))))
1097 /* This relies on the fact that emit_reload_insns outputs the
1098 instructions for output reloads of type RELOAD_OTHER in reverse
1099 order of the reloads. Thus if the outer reload is also of type
1100 RELOAD_OTHER, we are guaranteed that this inner reload will be
1101 output after the outer reload. */
1102 dont_remove_subreg = 1;
1103 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1105 find_valid_class (outmode, SUBREG_WORD (out)),
1106 VOIDmode, VOIDmode, 0, 0,
1107 opnum, RELOAD_OTHER);
1110 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1111 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1112 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1113 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1116 /* If IN is a SUBREG of a hard register, make a new REG. This
1117 simplifies some of the cases below. */
1119 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1120 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1121 && ! dont_remove_subreg)
1122 in = gen_rtx_REG (GET_MODE (in),
1123 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
1125 /* Similarly for OUT. */
1126 if (out != 0 && GET_CODE (out) == SUBREG
1127 && GET_CODE (SUBREG_REG (out)) == REG
1128 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1129 && ! dont_remove_subreg)
1130 out = gen_rtx_REG (GET_MODE (out),
1131 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
1133 /* Narrow down the class of register wanted if that is
1134 desirable on this machine for efficiency. */
1136 class = PREFERRED_RELOAD_CLASS (in, class);
1138 /* Output reloads may need analogous treatment, different in detail. */
1139 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1141 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1144 /* Make sure we use a class that can handle the actual pseudo
1145 inside any subreg. For example, on the 386, QImode regs
1146 can appear within SImode subregs. Although GENERAL_REGS
1147 can handle SImode, QImode needs a smaller class. */
1148 #ifdef LIMIT_RELOAD_CLASS
1150 class = LIMIT_RELOAD_CLASS (inmode, class);
1151 else if (in != 0 && GET_CODE (in) == SUBREG)
1152 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1155 class = LIMIT_RELOAD_CLASS (outmode, class);
1156 if (out != 0 && GET_CODE (out) == SUBREG)
1157 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1160 /* Verify that this class is at least possible for the mode that
1162 if (this_insn_is_asm)
1164 enum machine_mode mode;
1165 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1169 if (mode == VOIDmode)
1171 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1176 outmode = word_mode;
1178 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1179 if (HARD_REGNO_MODE_OK (i, mode)
1180 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1182 int nregs = HARD_REGNO_NREGS (i, mode);
1185 for (j = 1; j < nregs; j++)
1186 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1191 if (i == FIRST_PSEUDO_REGISTER)
1193 error_for_asm (this_insn, "impossible register constraint in `asm'");
1198 /* Optional output reloads are always OK even if we have no register class,
1199 since the function of these reloads is only to have spill_reg_store etc.
1200 set, so that the storing insn can be deleted later. */
1201 if (class == NO_REGS
1202 && (optional == 0 || type != RELOAD_FOR_OUTPUT))
1205 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1209 /* See if we need a secondary reload register to move between CLASS
1210 and IN or CLASS and OUT. Get the icode and push any required reloads
1211 needed for each of them if so. */
1213 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1216 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1217 &secondary_in_icode);
1220 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1221 if (out != 0 && GET_CODE (out) != SCRATCH)
1222 secondary_out_reload
1223 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1224 type, &secondary_out_icode);
1227 /* We found no existing reload suitable for re-use.
1228 So add an additional reload. */
1230 #ifdef SECONDARY_MEMORY_NEEDED
1231 /* If a memory location is needed for the copy, make one. */
1232 if (in != 0 && GET_CODE (in) == REG
1233 && REGNO (in) < FIRST_PSEUDO_REGISTER
1234 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1236 get_secondary_mem (in, inmode, opnum, type);
1242 rld[i].class = class;
1243 rld[i].inmode = inmode;
1244 rld[i].outmode = outmode;
1246 rld[i].optional = optional;
1248 rld[i].nocombine = 0;
1249 rld[i].in_reg = inloc ? *inloc : 0;
1250 rld[i].out_reg = outloc ? *outloc : 0;
1251 rld[i].opnum = opnum;
1252 rld[i].when_needed = type;
1253 rld[i].secondary_in_reload = secondary_in_reload;
1254 rld[i].secondary_out_reload = secondary_out_reload;
1255 rld[i].secondary_in_icode = secondary_in_icode;
1256 rld[i].secondary_out_icode = secondary_out_icode;
1257 rld[i].secondary_p = 0;
1261 #ifdef SECONDARY_MEMORY_NEEDED
1262 if (out != 0 && GET_CODE (out) == REG
1263 && REGNO (out) < FIRST_PSEUDO_REGISTER
1264 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1266 get_secondary_mem (out, outmode, opnum, type);
1271 /* We are reusing an existing reload,
1272 but we may have additional information for it.
1273 For example, we may now have both IN and OUT
1274 while the old one may have just one of them. */
1276 /* The modes can be different. If they are, we want to reload in
1277 the larger mode, so that the value is valid for both modes. */
1278 if (inmode != VOIDmode
1279 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1280 rld[i].inmode = inmode;
1281 if (outmode != VOIDmode
1282 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1283 rld[i].outmode = outmode;
1286 rtx in_reg = inloc ? *inloc : 0;
1287 /* If we merge reloads for two distinct rtl expressions that
1288 are identical in content, there might be duplicate address
1289 reloads. Remove the extra set now, so that if we later find
1290 that we can inherit this reload, we can get rid of the
1291 address reloads altogether.
1293 Do not do this if both reloads are optional since the result
1294 would be an optional reload which could potentially leave
1295 unresolved address replacements.
1297 It is not sufficient to call transfer_replacements since
1298 choose_reload_regs will remove the replacements for address
1299 reloads of inherited reloads which results in the same
1301 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1302 && ! (rld[i].optional && optional))
1304 /* We must keep the address reload with the lower operand
1306 if (opnum > rld[i].opnum)
1308 remove_address_replacements (in);
1310 in_reg = rld[i].in_reg;
1313 remove_address_replacements (rld[i].in);
1316 rld[i].in_reg = in_reg;
1321 rld[i].out_reg = outloc ? *outloc : 0;
1323 if (reg_class_subset_p (class, rld[i].class))
1324 rld[i].class = class;
1325 rld[i].optional &= optional;
1326 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1327 opnum, rld[i].opnum))
1328 rld[i].when_needed = RELOAD_OTHER;
1329 rld[i].opnum = MIN (rld[i].opnum, opnum);
1332 /* If the ostensible rtx being reload differs from the rtx found
1333 in the location to substitute, this reload is not safe to combine
1334 because we cannot reliably tell whether it appears in the insn. */
1336 if (in != 0 && in != *inloc)
1337 rld[i].nocombine = 1;
1340 /* This was replaced by changes in find_reloads_address_1 and the new
1341 function inc_for_reload, which go with a new meaning of reload_inc. */
1343 /* If this is an IN/OUT reload in an insn that sets the CC,
1344 it must be for an autoincrement. It doesn't work to store
1345 the incremented value after the insn because that would clobber the CC.
1346 So we must do the increment of the value reloaded from,
1347 increment it, store it back, then decrement again. */
1348 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1352 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1353 /* If we did not find a nonzero amount-to-increment-by,
1354 that contradicts the belief that IN is being incremented
1355 in an address in this insn. */
1356 if (rld[i].inc == 0)
1361 /* If we will replace IN and OUT with the reload-reg,
1362 record where they are located so that substitution need
1363 not do a tree walk. */
1365 if (replace_reloads)
1369 register struct replacement *r = &replacements[n_replacements++];
1371 r->subreg_loc = in_subreg_loc;
1375 if (outloc != 0 && outloc != inloc)
1377 register struct replacement *r = &replacements[n_replacements++];
1380 r->subreg_loc = out_subreg_loc;
1385 /* If this reload is just being introduced and it has both
1386 an incoming quantity and an outgoing quantity that are
1387 supposed to be made to match, see if either one of the two
1388 can serve as the place to reload into.
1390 If one of them is acceptable, set rld[i].reg_rtx
1393 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1395 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1398 earlyclobber_operand_p (out));
1400 /* If the outgoing register already contains the same value
1401 as the incoming one, we can dispense with loading it.
1402 The easiest way to tell the caller that is to give a phony
1403 value for the incoming operand (same as outgoing one). */
1404 if (rld[i].reg_rtx == out
1405 && (GET_CODE (in) == REG || CONSTANT_P (in))
1406 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1407 static_reload_reg_p, i, inmode))
1411 /* If this is an input reload and the operand contains a register that
1412 dies in this insn and is used nowhere else, see if it is the right class
1413 to be used for this reload. Use it if so. (This occurs most commonly
1414 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1415 this if it is also an output reload that mentions the register unless
1416 the output is a SUBREG that clobbers an entire register.
1418 Note that the operand might be one of the spill regs, if it is a
1419 pseudo reg and we are in a block where spilling has not taken place.
1420 But if there is no spilling in this block, that is OK.
1421 An explicitly used hard reg cannot be a spill reg. */
1423 if (rld[i].reg_rtx == 0 && in != 0)
1428 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1429 if (REG_NOTE_KIND (note) == REG_DEAD
1430 && GET_CODE (XEXP (note, 0)) == REG
1431 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1432 && reg_mentioned_p (XEXP (note, 0), in)
1433 && ! refers_to_regno_for_reload_p (regno,
1435 + HARD_REGNO_NREGS (regno,
1437 PATTERN (this_insn), inloc)
1438 /* If this is also an output reload, IN cannot be used as
1439 the reload register if it is set in this insn unless IN
1441 && (out == 0 || in == out
1442 || ! hard_reg_set_here_p (regno,
1444 + HARD_REGNO_NREGS (regno,
1446 PATTERN (this_insn)))
1447 /* ??? Why is this code so different from the previous?
1448 Is there any simple coherent way to describe the two together?
1449 What's going on here. */
1451 || (GET_CODE (in) == SUBREG
1452 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1454 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1455 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1456 /* Make sure the operand fits in the reg that dies. */
1457 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1458 && HARD_REGNO_MODE_OK (regno, inmode)
1459 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1460 && HARD_REGNO_MODE_OK (regno, outmode))
1463 int nregs = HARD_REGNO_NREGS (regno, inmode);
1464 for (offs = 0; offs < nregs; offs++)
1465 if (fixed_regs[regno + offs]
1466 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1472 rld[i].reg_rtx = gen_rtx_REG (inmode, regno);
1479 output_reloadnum = i;
1484 /* Record an additional place we must replace a value
1485 for which we have already recorded a reload.
1486 RELOADNUM is the value returned by push_reload
1487 when the reload was recorded.
1488 This is used in insn patterns that use match_dup. */
1491 push_replacement (loc, reloadnum, mode)
1494 enum machine_mode mode;
1496 if (replace_reloads)
1498 register struct replacement *r = &replacements[n_replacements++];
1499 r->what = reloadnum;
1506 /* Transfer all replacements that used to be in reload FROM to be in
1510 transfer_replacements (to, from)
1515 for (i = 0; i < n_replacements; i++)
1516 if (replacements[i].what == from)
1517 replacements[i].what = to;
1520 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1521 or a subpart of it. If we have any replacements registered for IN_RTX,
1522 cancel the reloads that were supposed to load them.
1523 Return non-zero if we canceled any reloads. */
1525 remove_address_replacements (in_rtx)
1529 char reload_flags[MAX_RELOADS];
1530 int something_changed = 0;
1532 bzero (reload_flags, sizeof reload_flags);
1533 for (i = 0, j = 0; i < n_replacements; i++)
1535 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1536 reload_flags[replacements[i].what] |= 1;
1539 replacements[j++] = replacements[i];
1540 reload_flags[replacements[i].what] |= 2;
1543 /* Note that the following store must be done before the recursive calls. */
1546 for (i = n_reloads - 1; i >= 0; i--)
1548 if (reload_flags[i] == 1)
1550 deallocate_reload_reg (i);
1551 remove_address_replacements (rld[i].in);
1553 something_changed = 1;
1556 return something_changed;
1559 /* Return non-zero if IN contains a piece of rtl that has the address LOC */
1561 loc_mentioned_in_p (loc, in)
1564 enum rtx_code code = GET_CODE (in);
1565 const char *fmt = GET_RTX_FORMAT (code);
1568 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1570 if (loc == &in->fld[i].rtx)
1574 if (loc_mentioned_in_p (loc, XEXP (in, i)))
1577 else if (fmt[i] == 'E')
1578 for (j = XVECLEN (in, i) - 1; i >= 0; i--)
1579 if (loc_mentioned_in_p (loc, XVECEXP (in, i, j)))
1585 /* If there is only one output reload, and it is not for an earlyclobber
1586 operand, try to combine it with a (logically unrelated) input reload
1587 to reduce the number of reload registers needed.
1589 This is safe if the input reload does not appear in
1590 the value being output-reloaded, because this implies
1591 it is not needed any more once the original insn completes.
1593 If that doesn't work, see we can use any of the registers that
1594 die in this insn as a reload register. We can if it is of the right
1595 class and does not appear in the value being output-reloaded. */
1601 int output_reload = -1;
1602 int secondary_out = -1;
1605 /* Find the output reload; return unless there is exactly one
1606 and that one is mandatory. */
1608 for (i = 0; i < n_reloads; i++)
1609 if (rld[i].out != 0)
1611 if (output_reload >= 0)
1616 if (output_reload < 0 || rld[output_reload].optional)
1619 /* An input-output reload isn't combinable. */
1621 if (rld[output_reload].in != 0)
1624 /* If this reload is for an earlyclobber operand, we can't do anything. */
1625 if (earlyclobber_operand_p (rld[output_reload].out))
1628 /* Check each input reload; can we combine it? */
1630 for (i = 0; i < n_reloads; i++)
1631 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1632 /* Life span of this reload must not extend past main insn. */
1633 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1634 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1635 && rld[i].when_needed != RELOAD_OTHER
1636 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1637 == CLASS_MAX_NREGS (rld[output_reload].class,
1638 rld[output_reload].outmode))
1640 && rld[i].reg_rtx == 0
1641 #ifdef SECONDARY_MEMORY_NEEDED
1642 /* Don't combine two reloads with different secondary
1643 memory locations. */
1644 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1645 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1646 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1647 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1649 && (SMALL_REGISTER_CLASSES
1650 ? (rld[i].class == rld[output_reload].class)
1651 : (reg_class_subset_p (rld[i].class,
1652 rld[output_reload].class)
1653 || reg_class_subset_p (rld[output_reload].class,
1655 && (MATCHES (rld[i].in, rld[output_reload].out)
1656 /* Args reversed because the first arg seems to be
1657 the one that we imagine being modified
1658 while the second is the one that might be affected. */
1659 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1661 /* However, if the input is a register that appears inside
1662 the output, then we also can't share.
1663 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1664 If the same reload reg is used for both reg 69 and the
1665 result to be stored in memory, then that result
1666 will clobber the address of the memory ref. */
1667 && ! (GET_CODE (rld[i].in) == REG
1668 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1669 rld[output_reload].out))))
1670 && (reg_class_size[(int) rld[i].class]
1671 || SMALL_REGISTER_CLASSES)
1672 /* We will allow making things slightly worse by combining an
1673 input and an output, but no worse than that. */
1674 && (rld[i].when_needed == RELOAD_FOR_INPUT
1675 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1679 /* We have found a reload to combine with! */
1680 rld[i].out = rld[output_reload].out;
1681 rld[i].out_reg = rld[output_reload].out_reg;
1682 rld[i].outmode = rld[output_reload].outmode;
1683 /* Mark the old output reload as inoperative. */
1684 rld[output_reload].out = 0;
1685 /* The combined reload is needed for the entire insn. */
1686 rld[i].when_needed = RELOAD_OTHER;
1687 /* If the output reload had a secondary reload, copy it. */
1688 if (rld[output_reload].secondary_out_reload != -1)
1690 rld[i].secondary_out_reload
1691 = rld[output_reload].secondary_out_reload;
1692 rld[i].secondary_out_icode
1693 = rld[output_reload].secondary_out_icode;
1696 #ifdef SECONDARY_MEMORY_NEEDED
1697 /* Copy any secondary MEM. */
1698 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1699 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1700 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1702 /* If required, minimize the register class. */
1703 if (reg_class_subset_p (rld[output_reload].class,
1705 rld[i].class = rld[output_reload].class;
1707 /* Transfer all replacements from the old reload to the combined. */
1708 for (j = 0; j < n_replacements; j++)
1709 if (replacements[j].what == output_reload)
1710 replacements[j].what = i;
1715 /* If this insn has only one operand that is modified or written (assumed
1716 to be the first), it must be the one corresponding to this reload. It
1717 is safe to use anything that dies in this insn for that output provided
1718 that it does not occur in the output (we already know it isn't an
1719 earlyclobber. If this is an asm insn, give up. */
1721 if (INSN_CODE (this_insn) == -1)
1724 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1725 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1726 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1729 /* See if some hard register that dies in this insn and is not used in
1730 the output is the right class. Only works if the register we pick
1731 up can fully hold our output reload. */
1732 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1733 if (REG_NOTE_KIND (note) == REG_DEAD
1734 && GET_CODE (XEXP (note, 0)) == REG
1735 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1736 rld[output_reload].out)
1737 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1738 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1739 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1740 REGNO (XEXP (note, 0)))
1741 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1742 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1743 /* Ensure that a secondary or tertiary reload for this output
1744 won't want this register. */
1745 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1746 || (! (TEST_HARD_REG_BIT
1747 (reg_class_contents[(int) rld[secondary_out].class],
1748 REGNO (XEXP (note, 0))))
1749 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1750 || ! (TEST_HARD_REG_BIT
1751 (reg_class_contents[(int) rld[secondary_out].class],
1752 REGNO (XEXP (note, 0)))))))
1753 && ! fixed_regs[REGNO (XEXP (note, 0))])
1755 rld[output_reload].reg_rtx
1756 = gen_rtx_REG (rld[output_reload].outmode,
1757 REGNO (XEXP (note, 0)));
1762 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1763 See if one of IN and OUT is a register that may be used;
1764 this is desirable since a spill-register won't be needed.
1765 If so, return the register rtx that proves acceptable.
1767 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1768 CLASS is the register class required for the reload.
1770 If FOR_REAL is >= 0, it is the number of the reload,
1771 and in some cases when it can be discovered that OUT doesn't need
1772 to be computed, clear out rld[FOR_REAL].out.
1774 If FOR_REAL is -1, this should not be done, because this call
1775 is just to see if a register can be found, not to find and install it.
1777 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1778 puts an additional constraint on being able to use IN for OUT since
1779 IN must not appear elsewhere in the insn (it is assumed that IN itself
1780 is safe from the earlyclobber). */
1783 find_dummy_reload (real_in, real_out, inloc, outloc,
1784 inmode, outmode, class, for_real, earlyclobber)
1785 rtx real_in, real_out;
1786 rtx *inloc, *outloc;
1787 enum machine_mode inmode, outmode;
1788 enum reg_class class;
1798 /* If operands exceed a word, we can't use either of them
1799 unless they have the same size. */
1800 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1801 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1802 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1805 /* Find the inside of any subregs. */
1806 while (GET_CODE (out) == SUBREG)
1808 out_offset = SUBREG_WORD (out);
1809 out = SUBREG_REG (out);
1811 while (GET_CODE (in) == SUBREG)
1813 in_offset = SUBREG_WORD (in);
1814 in = SUBREG_REG (in);
1817 /* Narrow down the reg class, the same way push_reload will;
1818 otherwise we might find a dummy now, but push_reload won't. */
1819 class = PREFERRED_RELOAD_CLASS (in, class);
1821 /* See if OUT will do. */
1822 if (GET_CODE (out) == REG
1823 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1825 register int regno = REGNO (out) + out_offset;
1826 int nwords = HARD_REGNO_NREGS (regno, outmode);
1829 /* When we consider whether the insn uses OUT,
1830 ignore references within IN. They don't prevent us
1831 from copying IN into OUT, because those refs would
1832 move into the insn that reloads IN.
1834 However, we only ignore IN in its role as this reload.
1835 If the insn uses IN elsewhere and it contains OUT,
1836 that counts. We can't be sure it's the "same" operand
1837 so it might not go through this reload. */
1839 *inloc = const0_rtx;
1841 if (regno < FIRST_PSEUDO_REGISTER
1842 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1843 PATTERN (this_insn), outloc))
1846 for (i = 0; i < nwords; i++)
1847 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1853 if (GET_CODE (real_out) == REG)
1856 value = gen_rtx_REG (outmode, regno);
1863 /* Consider using IN if OUT was not acceptable
1864 or if OUT dies in this insn (like the quotient in a divmod insn).
1865 We can't use IN unless it is dies in this insn,
1866 which means we must know accurately which hard regs are live.
1867 Also, the result can't go in IN if IN is used within OUT,
1868 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1869 if (hard_regs_live_known
1870 && GET_CODE (in) == REG
1871 && REGNO (in) < FIRST_PSEUDO_REGISTER
1873 || find_reg_note (this_insn, REG_UNUSED, real_out))
1874 && find_reg_note (this_insn, REG_DEAD, real_in)
1875 && !fixed_regs[REGNO (in)]
1876 && HARD_REGNO_MODE_OK (REGNO (in),
1877 /* The only case where out and real_out might
1878 have different modes is where real_out
1879 is a subreg, and in that case, out
1881 (GET_MODE (out) != VOIDmode
1882 ? GET_MODE (out) : outmode)))
1884 register int regno = REGNO (in) + in_offset;
1885 int nwords = HARD_REGNO_NREGS (regno, inmode);
1887 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1888 && ! hard_reg_set_here_p (regno, regno + nwords,
1889 PATTERN (this_insn))
1891 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1892 PATTERN (this_insn), inloc)))
1895 for (i = 0; i < nwords; i++)
1896 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1902 /* If we were going to use OUT as the reload reg
1903 and changed our mind, it means OUT is a dummy that
1904 dies here. So don't bother copying value to it. */
1905 if (for_real >= 0 && value == real_out)
1906 rld[for_real].out = 0;
1907 if (GET_CODE (real_in) == REG)
1910 value = gen_rtx_REG (inmode, regno);
1918 /* This page contains subroutines used mainly for determining
1919 whether the IN or an OUT of a reload can serve as the
1922 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1925 earlyclobber_operand_p (x)
1930 for (i = 0; i < n_earlyclobbers; i++)
1931 if (reload_earlyclobbers[i] == x)
1937 /* Return 1 if expression X alters a hard reg in the range
1938 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1939 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1940 X should be the body of an instruction. */
1943 hard_reg_set_here_p (beg_regno, end_regno, x)
1944 register int beg_regno, end_regno;
1947 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1949 register rtx op0 = SET_DEST (x);
1950 while (GET_CODE (op0) == SUBREG)
1951 op0 = SUBREG_REG (op0);
1952 if (GET_CODE (op0) == REG)
1954 register int r = REGNO (op0);
1955 /* See if this reg overlaps range under consideration. */
1957 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1961 else if (GET_CODE (x) == PARALLEL)
1963 register int i = XVECLEN (x, 0) - 1;
1965 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1972 /* Return 1 if ADDR is a valid memory address for mode MODE,
1973 and check that each pseudo reg has the proper kind of
1977 strict_memory_address_p (mode, addr)
1978 enum machine_mode mode;
1981 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
1988 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1989 if they are the same hard reg, and has special hacks for
1990 autoincrement and autodecrement.
1991 This is specifically intended for find_reloads to use
1992 in determining whether two operands match.
1993 X is the operand whose number is the lower of the two.
1995 The value is 2 if Y contains a pre-increment that matches
1996 a non-incrementing address in X. */
1998 /* ??? To be completely correct, we should arrange to pass
1999 for X the output operand and for Y the input operand.
2000 For now, we assume that the output operand has the lower number
2001 because that is natural in (SET output (... input ...)). */
2004 operands_match_p (x, y)
2008 register RTX_CODE code = GET_CODE (x);
2009 register const char *fmt;
2014 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2015 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2016 && GET_CODE (SUBREG_REG (y)) == REG)))
2022 i = REGNO (SUBREG_REG (x));
2023 if (i >= FIRST_PSEUDO_REGISTER)
2025 i += SUBREG_WORD (x);
2030 if (GET_CODE (y) == SUBREG)
2032 j = REGNO (SUBREG_REG (y));
2033 if (j >= FIRST_PSEUDO_REGISTER)
2035 j += SUBREG_WORD (y);
2040 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2041 multiple hard register group, so that for example (reg:DI 0) and
2042 (reg:SI 1) will be considered the same register. */
2043 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2044 && i < FIRST_PSEUDO_REGISTER)
2045 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
2046 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2047 && j < FIRST_PSEUDO_REGISTER)
2048 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
2052 /* If two operands must match, because they are really a single
2053 operand of an assembler insn, then two postincrements are invalid
2054 because the assembler insn would increment only once.
2055 On the other hand, an postincrement matches ordinary indexing
2056 if the postincrement is the output operand. */
2057 if (code == POST_DEC || code == POST_INC)
2058 return operands_match_p (XEXP (x, 0), y);
2059 /* Two preincrements are invalid
2060 because the assembler insn would increment only once.
2061 On the other hand, an preincrement matches ordinary indexing
2062 if the preincrement is the input operand.
2063 In this case, return 2, since some callers need to do special
2064 things when this happens. */
2065 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
2066 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2070 /* Now we have disposed of all the cases
2071 in which different rtx codes can match. */
2072 if (code != GET_CODE (y))
2074 if (code == LABEL_REF)
2075 return XEXP (x, 0) == XEXP (y, 0);
2076 if (code == SYMBOL_REF)
2077 return XSTR (x, 0) == XSTR (y, 0);
2079 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2081 if (GET_MODE (x) != GET_MODE (y))
2084 /* Compare the elements. If any pair of corresponding elements
2085 fail to match, return 0 for the whole things. */
2088 fmt = GET_RTX_FORMAT (code);
2089 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2095 if (XWINT (x, i) != XWINT (y, i))
2100 if (XINT (x, i) != XINT (y, i))
2105 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2108 /* If any subexpression returns 2,
2109 we should return 2 if we are successful. */
2118 if (XVECLEN (x, i) != XVECLEN (y, i))
2120 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2122 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2130 /* It is believed that rtx's at this level will never
2131 contain anything but integers and other rtx's,
2132 except for within LABEL_REFs and SYMBOL_REFs. */
2137 return 1 + success_2;
2140 /* Describe the range of registers or memory referenced by X.
2141 If X is a register, set REG_FLAG and put the first register
2142 number into START and the last plus one into END.
2143 If X is a memory reference, put a base address into BASE
2144 and a range of integer offsets into START and END.
2145 If X is pushing on the stack, we can assume it causes no trouble,
2146 so we set the SAFE field. */
2148 static struct decomposition
2152 struct decomposition val;
2158 if (GET_CODE (x) == MEM)
2160 rtx base = NULL_RTX, offset = 0;
2161 rtx addr = XEXP (x, 0);
2163 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2164 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2166 val.base = XEXP (addr, 0);
2167 val.start = - GET_MODE_SIZE (GET_MODE (x));
2168 val.end = GET_MODE_SIZE (GET_MODE (x));
2169 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2173 if (GET_CODE (addr) == CONST)
2175 addr = XEXP (addr, 0);
2178 if (GET_CODE (addr) == PLUS)
2180 if (CONSTANT_P (XEXP (addr, 0)))
2182 base = XEXP (addr, 1);
2183 offset = XEXP (addr, 0);
2185 else if (CONSTANT_P (XEXP (addr, 1)))
2187 base = XEXP (addr, 0);
2188 offset = XEXP (addr, 1);
2195 offset = const0_rtx;
2197 if (GET_CODE (offset) == CONST)
2198 offset = XEXP (offset, 0);
2199 if (GET_CODE (offset) == PLUS)
2201 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2203 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2204 offset = XEXP (offset, 0);
2206 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2208 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2209 offset = XEXP (offset, 1);
2213 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2214 offset = const0_rtx;
2217 else if (GET_CODE (offset) != CONST_INT)
2219 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2220 offset = const0_rtx;
2223 if (all_const && GET_CODE (base) == PLUS)
2224 base = gen_rtx_CONST (GET_MODE (base), base);
2226 if (GET_CODE (offset) != CONST_INT)
2229 val.start = INTVAL (offset);
2230 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2234 else if (GET_CODE (x) == REG)
2237 val.start = true_regnum (x);
2240 /* A pseudo with no hard reg. */
2241 val.start = REGNO (x);
2242 val.end = val.start + 1;
2246 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2248 else if (GET_CODE (x) == SUBREG)
2250 if (GET_CODE (SUBREG_REG (x)) != REG)
2251 /* This could be more precise, but it's good enough. */
2252 return decompose (SUBREG_REG (x));
2254 val.start = true_regnum (x);
2256 return decompose (SUBREG_REG (x));
2259 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2261 else if (CONSTANT_P (x)
2262 /* This hasn't been assigned yet, so it can't conflict yet. */
2263 || GET_CODE (x) == SCRATCH)
2270 /* Return 1 if altering Y will not modify the value of X.
2271 Y is also described by YDATA, which should be decompose (Y). */
2274 immune_p (x, y, ydata)
2276 struct decomposition ydata;
2278 struct decomposition xdata;
2281 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2285 if (GET_CODE (y) != MEM)
2287 /* If Y is memory and X is not, Y can't affect X. */
2288 if (GET_CODE (x) != MEM)
2291 xdata = decompose (x);
2293 if (! rtx_equal_p (xdata.base, ydata.base))
2295 /* If bases are distinct symbolic constants, there is no overlap. */
2296 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2298 /* Constants and stack slots never overlap. */
2299 if (CONSTANT_P (xdata.base)
2300 && (ydata.base == frame_pointer_rtx
2301 || ydata.base == hard_frame_pointer_rtx
2302 || ydata.base == stack_pointer_rtx))
2304 if (CONSTANT_P (ydata.base)
2305 && (xdata.base == frame_pointer_rtx
2306 || xdata.base == hard_frame_pointer_rtx
2307 || xdata.base == stack_pointer_rtx))
2309 /* If either base is variable, we don't know anything. */
2314 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2317 /* Similar, but calls decompose. */
2320 safe_from_earlyclobber (op, clobber)
2323 struct decomposition early_data;
2325 early_data = decompose (clobber);
2326 return immune_p (op, clobber, early_data);
2329 /* Main entry point of this file: search the body of INSN
2330 for values that need reloading and record them with push_reload.
2331 REPLACE nonzero means record also where the values occur
2332 so that subst_reloads can be used.
2334 IND_LEVELS says how many levels of indirection are supported by this
2335 machine; a value of zero means that a memory reference is not a valid
2338 LIVE_KNOWN says we have valid information about which hard
2339 regs are live at each point in the program; this is true when
2340 we are called from global_alloc but false when stupid register
2341 allocation has been done.
2343 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2344 which is nonnegative if the reg has been commandeered for reloading into.
2345 It is copied into STATIC_RELOAD_REG_P and referenced from there
2346 by various subroutines.
2348 Return TRUE if some operands need to be changed, because of swapping
2349 commutative operands, reg_equiv_address substitution, or whatever. */
2352 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2354 int replace, ind_levels;
2356 short *reload_reg_p;
2358 register int insn_code_number;
2361 /* These start out as the constraints for the insn
2362 and they are chewed up as we consider alternatives. */
2363 char *constraints[MAX_RECOG_OPERANDS];
2364 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2366 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2367 char pref_or_nothing[MAX_RECOG_OPERANDS];
2368 /* Nonzero for a MEM operand whose entire address needs a reload. */
2369 int address_reloaded[MAX_RECOG_OPERANDS];
2370 /* Value of enum reload_type to use for operand. */
2371 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2372 /* Value of enum reload_type to use within address of operand. */
2373 enum reload_type address_type[MAX_RECOG_OPERANDS];
2374 /* Save the usage of each operand. */
2375 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2376 int no_input_reloads = 0, no_output_reloads = 0;
2378 int this_alternative[MAX_RECOG_OPERANDS];
2379 char this_alternative_win[MAX_RECOG_OPERANDS];
2380 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2381 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2382 int this_alternative_matches[MAX_RECOG_OPERANDS];
2384 int goal_alternative[MAX_RECOG_OPERANDS];
2385 int this_alternative_number;
2386 int goal_alternative_number;
2387 int operand_reloadnum[MAX_RECOG_OPERANDS];
2388 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2389 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2390 char goal_alternative_win[MAX_RECOG_OPERANDS];
2391 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2392 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2393 int goal_alternative_swapped;
2397 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2398 rtx substed_operand[MAX_RECOG_OPERANDS];
2399 rtx body = PATTERN (insn);
2400 rtx set = single_set (insn);
2401 int goal_earlyclobber, this_earlyclobber;
2402 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2408 n_earlyclobbers = 0;
2409 replace_reloads = replace;
2410 hard_regs_live_known = live_known;
2411 static_reload_reg_p = reload_reg_p;
2413 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2414 neither are insns that SET cc0. Insns that use CC0 are not allowed
2415 to have any input reloads. */
2416 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2417 no_output_reloads = 1;
2420 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2421 no_input_reloads = 1;
2422 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2423 no_output_reloads = 1;
2426 #ifdef SECONDARY_MEMORY_NEEDED
2427 /* The eliminated forms of any secondary memory locations are per-insn, so
2428 clear them out here. */
2430 bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2433 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2434 is cheap to move between them. If it is not, there may not be an insn
2435 to do the copy, so we may need a reload. */
2436 if (GET_CODE (body) == SET
2437 && GET_CODE (SET_DEST (body)) == REG
2438 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2439 && GET_CODE (SET_SRC (body)) == REG
2440 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2441 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2442 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2445 extract_insn (insn);
2447 noperands = reload_n_operands = recog_data.n_operands;
2448 n_alternatives = recog_data.n_alternatives;
2450 /* Just return "no reloads" if insn has no operands with constraints. */
2451 if (noperands == 0 || n_alternatives == 0)
2454 insn_code_number = INSN_CODE (insn);
2455 this_insn_is_asm = insn_code_number < 0;
2457 memcpy (operand_mode, recog_data.operand_mode,
2458 noperands * sizeof (enum machine_mode));
2459 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2463 /* If we will need to know, later, whether some pair of operands
2464 are the same, we must compare them now and save the result.
2465 Reloading the base and index registers will clobber them
2466 and afterward they will fail to match. */
2468 for (i = 0; i < noperands; i++)
2473 substed_operand[i] = recog_data.operand[i];
2476 modified[i] = RELOAD_READ;
2478 /* Scan this operand's constraint to see if it is an output operand,
2479 an in-out operand, is commutative, or should match another. */
2484 modified[i] = RELOAD_WRITE;
2486 modified[i] = RELOAD_READ_WRITE;
2489 /* The last operand should not be marked commutative. */
2490 if (i == noperands - 1)
2495 else if (c >= '0' && c <= '9')
2498 operands_match[c][i]
2499 = operands_match_p (recog_data.operand[c],
2500 recog_data.operand[i]);
2502 /* An operand may not match itself. */
2506 /* If C can be commuted with C+1, and C might need to match I,
2507 then C+1 might also need to match I. */
2508 if (commutative >= 0)
2510 if (c == commutative || c == commutative + 1)
2512 int other = c + (c == commutative ? 1 : -1);
2513 operands_match[other][i]
2514 = operands_match_p (recog_data.operand[other],
2515 recog_data.operand[i]);
2517 if (i == commutative || i == commutative + 1)
2519 int other = i + (i == commutative ? 1 : -1);
2520 operands_match[c][other]
2521 = operands_match_p (recog_data.operand[c],
2522 recog_data.operand[other]);
2524 /* Note that C is supposed to be less than I.
2525 No need to consider altering both C and I because in
2526 that case we would alter one into the other. */
2532 /* Examine each operand that is a memory reference or memory address
2533 and reload parts of the addresses into index registers.
2534 Also here any references to pseudo regs that didn't get hard regs
2535 but are equivalent to constants get replaced in the insn itself
2536 with those constants. Nobody will ever see them again.
2538 Finally, set up the preferred classes of each operand. */
2540 for (i = 0; i < noperands; i++)
2542 register RTX_CODE code = GET_CODE (recog_data.operand[i]);
2544 address_reloaded[i] = 0;
2545 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2546 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2549 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2550 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2553 if (*constraints[i] == 0)
2554 /* Ignore things like match_operator operands. */
2556 else if (constraints[i][0] == 'p')
2558 find_reloads_address (VOIDmode, NULL_PTR,
2559 recog_data.operand[i],
2560 recog_data.operand_loc[i],
2561 i, operand_type[i], ind_levels, insn);
2563 /* If we now have a simple operand where we used to have a
2564 PLUS or MULT, re-recognize and try again. */
2565 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
2566 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2567 && (GET_CODE (recog_data.operand[i]) == MULT
2568 || GET_CODE (recog_data.operand[i]) == PLUS))
2570 INSN_CODE (insn) = -1;
2571 retval = find_reloads (insn, replace, ind_levels, live_known,
2576 recog_data.operand[i] = *recog_data.operand_loc[i];
2577 substed_operand[i] = recog_data.operand[i];
2579 else if (code == MEM)
2582 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2583 recog_data.operand_loc[i],
2584 XEXP (recog_data.operand[i], 0),
2585 &XEXP (recog_data.operand[i], 0),
2586 i, address_type[i], ind_levels, insn);
2587 recog_data.operand[i] = *recog_data.operand_loc[i];
2588 substed_operand[i] = recog_data.operand[i];
2590 else if (code == SUBREG)
2592 rtx reg = SUBREG_REG (recog_data.operand[i]);
2594 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2597 && &SET_DEST (set) == recog_data.operand_loc[i],
2600 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2601 that didn't get a hard register, emit a USE with a REG_EQUAL
2602 note in front so that we might inherit a previous, possibly
2606 && GET_CODE (op) == MEM
2607 && GET_CODE (reg) == REG
2608 && (GET_MODE_SIZE (GET_MODE (reg))
2609 >= GET_MODE_SIZE (GET_MODE (op))))
2610 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode, reg), insn))
2611 = gen_rtx_EXPR_LIST (REG_EQUAL,
2612 reg_equiv_memory_loc[REGNO (reg)], NULL_RTX);
2614 substed_operand[i] = recog_data.operand[i] = op;
2616 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2617 /* We can get a PLUS as an "operand" as a result of register
2618 elimination. See eliminate_regs and gen_reload. We handle
2619 a unary operator by reloading the operand. */
2620 substed_operand[i] = recog_data.operand[i]
2621 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2622 ind_levels, 0, insn);
2623 else if (code == REG)
2625 /* This is equivalent to calling find_reloads_toplev.
2626 The code is duplicated for speed.
2627 When we find a pseudo always equivalent to a constant,
2628 we replace it by the constant. We must be sure, however,
2629 that we don't try to replace it in the insn in which it
2631 register int regno = REGNO (recog_data.operand[i]);
2632 if (reg_equiv_constant[regno] != 0
2633 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2635 /* Record the existing mode so that the check if constants are
2636 allowed will work when operand_mode isn't specified. */
2638 if (operand_mode[i] == VOIDmode)
2639 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2641 substed_operand[i] = recog_data.operand[i]
2642 = reg_equiv_constant[regno];
2644 if (reg_equiv_memory_loc[regno] != 0
2645 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2646 /* We need not give a valid is_set_dest argument since the case
2647 of a constant equivalence was checked above. */
2648 substed_operand[i] = recog_data.operand[i]
2649 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2650 ind_levels, 0, insn);
2652 /* If the operand is still a register (we didn't replace it with an
2653 equivalent), get the preferred class to reload it into. */
2654 code = GET_CODE (recog_data.operand[i]);
2656 = ((code == REG && REGNO (recog_data.operand[i])
2657 >= FIRST_PSEUDO_REGISTER)
2658 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2662 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2663 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2666 /* If this is simply a copy from operand 1 to operand 0, merge the
2667 preferred classes for the operands. */
2668 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2669 && recog_data.operand[1] == SET_SRC (set))
2671 preferred_class[0] = preferred_class[1]
2672 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2673 pref_or_nothing[0] |= pref_or_nothing[1];
2674 pref_or_nothing[1] |= pref_or_nothing[0];
2677 /* Now see what we need for pseudo-regs that didn't get hard regs
2678 or got the wrong kind of hard reg. For this, we must consider
2679 all the operands together against the register constraints. */
2681 best = MAX_RECOG_OPERANDS * 2 + 600;
2684 goal_alternative_swapped = 0;
2687 /* The constraints are made of several alternatives.
2688 Each operand's constraint looks like foo,bar,... with commas
2689 separating the alternatives. The first alternatives for all
2690 operands go together, the second alternatives go together, etc.
2692 First loop over alternatives. */
2694 for (this_alternative_number = 0;
2695 this_alternative_number < n_alternatives;
2696 this_alternative_number++)
2698 /* Loop over operands for one constraint alternative. */
2699 /* LOSERS counts those that don't fit this alternative
2700 and would require loading. */
2702 /* BAD is set to 1 if it some operand can't fit this alternative
2703 even after reloading. */
2705 /* REJECT is a count of how undesirable this alternative says it is
2706 if any reloading is required. If the alternative matches exactly
2707 then REJECT is ignored, but otherwise it gets this much
2708 counted against it in addition to the reloading needed. Each
2709 ? counts three times here since we want the disparaging caused by
2710 a bad register class to only count 1/3 as much. */
2713 this_earlyclobber = 0;
2715 for (i = 0; i < noperands; i++)
2717 register char *p = constraints[i];
2718 register int win = 0;
2719 /* 0 => this operand can be reloaded somehow for this alternative */
2721 /* 0 => this operand can be reloaded if the alternative allows regs. */
2724 register rtx operand = recog_data.operand[i];
2726 /* Nonzero means this is a MEM that must be reloaded into a reg
2727 regardless of what the constraint says. */
2728 int force_reload = 0;
2730 /* Nonzero if a constant forced into memory would be OK for this
2733 int earlyclobber = 0;
2735 /* If the predicate accepts a unary operator, it means that
2736 we need to reload the operand, but do not do this for
2737 match_operator and friends. */
2738 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2739 operand = XEXP (operand, 0);
2741 /* If the operand is a SUBREG, extract
2742 the REG or MEM (or maybe even a constant) within.
2743 (Constants can occur as a result of reg_equiv_constant.) */
2745 while (GET_CODE (operand) == SUBREG)
2747 offset += SUBREG_WORD (operand);
2748 operand = SUBREG_REG (operand);
2749 /* Force reload if this is a constant or PLUS or if there may
2750 be a problem accessing OPERAND in the outer mode. */
2751 if (CONSTANT_P (operand)
2752 || GET_CODE (operand) == PLUS
2753 /* We must force a reload of paradoxical SUBREGs
2754 of a MEM because the alignment of the inner value
2755 may not be enough to do the outer reference. On
2756 big-endian machines, it may also reference outside
2759 On machines that extend byte operations and we have a
2760 SUBREG where both the inner and outer modes are no wider
2761 than a word and the inner mode is narrower, is integral,
2762 and gets extended when loaded from memory, combine.c has
2763 made assumptions about the behavior of the machine in such
2764 register access. If the data is, in fact, in memory we
2765 must always load using the size assumed to be in the
2766 register and let the insn do the different-sized
2769 This is doubly true if WORD_REGISTER_OPERATIONS. In
2770 this case eliminate_regs has left non-paradoxical
2771 subregs for push_reloads to see. Make sure it does
2772 by forcing the reload.
2774 ??? When is it right at this stage to have a subreg
2775 of a mem that is _not_ to be handled specialy? IMO
2776 those should have been reduced to just a mem. */
2777 || ((GET_CODE (operand) == MEM
2778 || (GET_CODE (operand)== REG
2779 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2780 #ifndef WORD_REGISTER_OPERATIONS
2781 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2782 < BIGGEST_ALIGNMENT)
2783 && (GET_MODE_SIZE (operand_mode[i])
2784 > GET_MODE_SIZE (GET_MODE (operand))))
2785 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2786 #ifdef LOAD_EXTEND_OP
2787 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2788 && (GET_MODE_SIZE (GET_MODE (operand))
2790 && (GET_MODE_SIZE (operand_mode[i])
2791 > GET_MODE_SIZE (GET_MODE (operand)))
2792 && INTEGRAL_MODE_P (GET_MODE (operand))
2793 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2798 /* Subreg of a hard reg which can't handle the subreg's mode
2799 or which would handle that mode in the wrong number of
2800 registers for subregging to work. */
2801 || (GET_CODE (operand) == REG
2802 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2803 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2804 && (GET_MODE_SIZE (GET_MODE (operand))
2806 && ((GET_MODE_SIZE (GET_MODE (operand))
2808 != HARD_REGNO_NREGS (REGNO (operand),
2809 GET_MODE (operand))))
2810 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2815 this_alternative[i] = (int) NO_REGS;
2816 this_alternative_win[i] = 0;
2817 this_alternative_offmemok[i] = 0;
2818 this_alternative_earlyclobber[i] = 0;
2819 this_alternative_matches[i] = -1;
2821 /* An empty constraint or empty alternative
2822 allows anything which matched the pattern. */
2823 if (*p == 0 || *p == ',')
2826 /* Scan this alternative's specs for this operand;
2827 set WIN if the operand fits any letter in this alternative.
2828 Otherwise, clear BADOP if this operand could
2829 fit some letter after reloads,
2830 or set WINREG if this operand could fit after reloads
2831 provided the constraint allows some registers. */
2833 while (*p && (c = *p++) != ',')
2836 case '=': case '+': case '*':
2840 /* The last operand should not be marked commutative. */
2841 if (i != noperands - 1)
2854 /* Ignore rest of this alternative as far as
2855 reloading is concerned. */
2856 while (*p && *p != ',') p++;
2859 case '0': case '1': case '2': case '3': case '4':
2860 case '5': case '6': case '7': case '8': case '9':
2863 this_alternative_matches[i] = c;
2864 /* We are supposed to match a previous operand.
2865 If we do, we win if that one did.
2866 If we do not, count both of the operands as losers.
2867 (This is too conservative, since most of the time
2868 only a single reload insn will be needed to make
2869 the two operands win. As a result, this alternative
2870 may be rejected when it is actually desirable.) */
2871 if ((swapped && (c != commutative || i != commutative + 1))
2872 /* If we are matching as if two operands were swapped,
2873 also pretend that operands_match had been computed
2875 But if I is the second of those and C is the first,
2876 don't exchange them, because operands_match is valid
2877 only on one side of its diagonal. */
2879 [(c == commutative || c == commutative + 1)
2880 ? 2*commutative + 1 - c : c]
2881 [(i == commutative || i == commutative + 1)
2882 ? 2*commutative + 1 - i : i])
2883 : operands_match[c][i])
2885 /* If we are matching a non-offsettable address where an
2886 offsettable address was expected, then we must reject
2887 this combination, because we can't reload it. */
2888 if (this_alternative_offmemok[c]
2889 && GET_CODE (recog_data.operand[c]) == MEM
2890 && this_alternative[c] == (int) NO_REGS
2891 && ! this_alternative_win[c])
2894 win = this_alternative_win[c];
2898 /* Operands don't match. */
2900 /* Retroactively mark the operand we had to match
2901 as a loser, if it wasn't already. */
2902 if (this_alternative_win[c])
2904 this_alternative_win[c] = 0;
2905 if (this_alternative[c] == (int) NO_REGS)
2907 /* But count the pair only once in the total badness of
2908 this alternative, if the pair can be a dummy reload. */
2910 = find_dummy_reload (recog_data.operand[i],
2911 recog_data.operand[c],
2912 recog_data.operand_loc[i],
2913 recog_data.operand_loc[c],
2914 operand_mode[i], operand_mode[c],
2915 this_alternative[c], -1,
2916 this_alternative_earlyclobber[c]);
2921 /* This can be fixed with reloads if the operand
2922 we are supposed to match can be fixed with reloads. */
2924 this_alternative[i] = this_alternative[c];
2926 /* If we have to reload this operand and some previous
2927 operand also had to match the same thing as this
2928 operand, we don't know how to do that. So reject this
2930 if (! win || force_reload)
2931 for (j = 0; j < i; j++)
2932 if (this_alternative_matches[j]
2933 == this_alternative_matches[i])
2939 /* All necessary reloads for an address_operand
2940 were handled in find_reloads_address. */
2941 this_alternative[i] = (int) BASE_REG_CLASS;
2948 if (GET_CODE (operand) == MEM
2949 || (GET_CODE (operand) == REG
2950 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2951 && reg_renumber[REGNO (operand)] < 0))
2953 if (CONSTANT_P (operand)
2954 /* force_const_mem does not accept HIGH. */
2955 && GET_CODE (operand) != HIGH)
2961 if (GET_CODE (operand) == MEM
2962 && ! address_reloaded[i]
2963 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2964 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2969 if (GET_CODE (operand) == MEM
2970 && ! address_reloaded[i]
2971 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2972 || GET_CODE (XEXP (operand, 0)) == POST_INC))
2976 /* Memory operand whose address is not offsettable. */
2980 if (GET_CODE (operand) == MEM
2981 && ! (ind_levels ? offsettable_memref_p (operand)
2982 : offsettable_nonstrict_memref_p (operand))
2983 /* Certain mem addresses will become offsettable
2984 after they themselves are reloaded. This is important;
2985 we don't want our own handling of unoffsettables
2986 to override the handling of reg_equiv_address. */
2987 && !(GET_CODE (XEXP (operand, 0)) == REG
2989 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
2993 /* Memory operand whose address is offsettable. */
2997 if ((GET_CODE (operand) == MEM
2998 /* If IND_LEVELS, find_reloads_address won't reload a
2999 pseudo that didn't get a hard reg, so we have to
3000 reject that case. */
3001 && ((ind_levels ? offsettable_memref_p (operand)
3002 : offsettable_nonstrict_memref_p (operand))
3003 /* A reloaded address is offsettable because it is now
3004 just a simple register indirect. */
3005 || address_reloaded[i]))
3006 || (GET_CODE (operand) == REG
3007 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3008 && reg_renumber[REGNO (operand)] < 0
3009 /* If reg_equiv_address is nonzero, we will be
3010 loading it into a register; hence it will be
3011 offsettable, but we cannot say that reg_equiv_mem
3012 is offsettable without checking. */
3013 && ((reg_equiv_mem[REGNO (operand)] != 0
3014 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3015 || (reg_equiv_address[REGNO (operand)] != 0))))
3017 /* force_const_mem does not accept HIGH. */
3018 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3019 || GET_CODE (operand) == MEM)
3026 /* Output operand that is stored before the need for the
3027 input operands (and their index registers) is over. */
3028 earlyclobber = 1, this_earlyclobber = 1;
3032 #ifndef REAL_ARITHMETIC
3033 /* Match any floating double constant, but only if
3034 we can examine the bits of it reliably. */
3035 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
3036 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
3037 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
3040 if (GET_CODE (operand) == CONST_DOUBLE)
3045 if (GET_CODE (operand) == CONST_DOUBLE)
3051 if (GET_CODE (operand) == CONST_DOUBLE
3052 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
3057 if (GET_CODE (operand) == CONST_INT
3058 || (GET_CODE (operand) == CONST_DOUBLE
3059 && GET_MODE (operand) == VOIDmode))
3062 if (CONSTANT_P (operand)
3063 #ifdef LEGITIMATE_PIC_OPERAND_P
3064 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3071 if (GET_CODE (operand) == CONST_INT
3072 || (GET_CODE (operand) == CONST_DOUBLE
3073 && GET_MODE (operand) == VOIDmode))
3085 if (GET_CODE (operand) == CONST_INT
3086 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
3096 /* A PLUS is never a valid operand, but reload can make
3097 it from a register when eliminating registers. */
3098 && GET_CODE (operand) != PLUS
3099 /* A SCRATCH is not a valid operand. */
3100 && GET_CODE (operand) != SCRATCH
3101 #ifdef LEGITIMATE_PIC_OPERAND_P
3102 && (! CONSTANT_P (operand)
3104 || LEGITIMATE_PIC_OPERAND_P (operand))
3106 && (GENERAL_REGS == ALL_REGS
3107 || GET_CODE (operand) != REG
3108 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3109 && reg_renumber[REGNO (operand)] < 0)))
3111 /* Drop through into 'r' case */
3115 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3118 #ifdef EXTRA_CONSTRAINT
3124 if (EXTRA_CONSTRAINT (operand, c))
3131 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3134 if (GET_MODE (operand) == BLKmode)
3137 if (GET_CODE (operand) == REG
3138 && reg_fits_class_p (operand, this_alternative[i],
3139 offset, GET_MODE (recog_data.operand[i])))
3146 /* If this operand could be handled with a reg,
3147 and some reg is allowed, then this operand can be handled. */
3148 if (winreg && this_alternative[i] != (int) NO_REGS)
3151 /* Record which operands fit this alternative. */
3152 this_alternative_earlyclobber[i] = earlyclobber;
3153 if (win && ! force_reload)
3154 this_alternative_win[i] = 1;
3157 int const_to_mem = 0;
3159 this_alternative_offmemok[i] = offmemok;
3163 /* Alternative loses if it has no regs for a reg operand. */
3164 if (GET_CODE (operand) == REG
3165 && this_alternative[i] == (int) NO_REGS
3166 && this_alternative_matches[i] < 0)
3169 /* If this is a constant that is reloaded into the desired
3170 class by copying it to memory first, count that as another
3171 reload. This is consistent with other code and is
3172 required to avoid choosing another alternative when
3173 the constant is moved into memory by this function on
3174 an early reload pass. Note that the test here is
3175 precisely the same as in the code below that calls
3177 if (CONSTANT_P (operand)
3178 /* force_const_mem does not accept HIGH. */
3179 && GET_CODE (operand) != HIGH
3180 && ((PREFERRED_RELOAD_CLASS (operand,
3181 (enum reg_class) this_alternative[i])
3183 || no_input_reloads)
3184 && operand_mode[i] != VOIDmode)
3187 if (this_alternative[i] != (int) NO_REGS)
3191 /* If we can't reload this value at all, reject this
3192 alternative. Note that we could also lose due to
3193 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3196 if (! CONSTANT_P (operand)
3197 && (enum reg_class) this_alternative[i] != NO_REGS
3198 && (PREFERRED_RELOAD_CLASS (operand,
3199 (enum reg_class) this_alternative[i])
3203 /* Alternative loses if it requires a type of reload not
3204 permitted for this insn. We can always reload SCRATCH
3205 and objects with a REG_UNUSED note. */
3206 else if (GET_CODE (operand) != SCRATCH
3207 && modified[i] != RELOAD_READ && no_output_reloads
3208 && ! find_reg_note (insn, REG_UNUSED, operand))
3210 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3215 /* We prefer to reload pseudos over reloading other things,
3216 since such reloads may be able to be eliminated later.
3217 If we are reloading a SCRATCH, we won't be generating any
3218 insns, just using a register, so it is also preferred.
3219 So bump REJECT in other cases. Don't do this in the
3220 case where we are forcing a constant into memory and
3221 it will then win since we don't want to have a different
3222 alternative match then. */
3223 if (! (GET_CODE (operand) == REG
3224 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3225 && GET_CODE (operand) != SCRATCH
3226 && ! (const_to_mem && constmemok))
3229 /* Input reloads can be inherited more often than output
3230 reloads can be removed, so penalize output reloads. */
3231 if (operand_type[i] != RELOAD_FOR_INPUT
3232 && GET_CODE (operand) != SCRATCH)
3236 /* If this operand is a pseudo register that didn't get a hard
3237 reg and this alternative accepts some register, see if the
3238 class that we want is a subset of the preferred class for this
3239 register. If not, but it intersects that class, use the
3240 preferred class instead. If it does not intersect the preferred
3241 class, show that usage of this alternative should be discouraged;
3242 it will be discouraged more still if the register is `preferred
3243 or nothing'. We do this because it increases the chance of
3244 reusing our spill register in a later insn and avoiding a pair
3245 of memory stores and loads.
3247 Don't bother with this if this alternative will accept this
3250 Don't do this for a multiword operand, since it is only a
3251 small win and has the risk of requiring more spill registers,
3252 which could cause a large loss.
3254 Don't do this if the preferred class has only one register
3255 because we might otherwise exhaust the class. */
3258 if (! win && this_alternative[i] != (int) NO_REGS
3259 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3260 && reg_class_size[(int) preferred_class[i]] > 1)
3262 if (! reg_class_subset_p (this_alternative[i],
3263 preferred_class[i]))
3265 /* Since we don't have a way of forming the intersection,
3266 we just do something special if the preferred class
3267 is a subset of the class we have; that's the most
3268 common case anyway. */
3269 if (reg_class_subset_p (preferred_class[i],
3270 this_alternative[i]))
3271 this_alternative[i] = (int) preferred_class[i];
3273 reject += (2 + 2 * pref_or_nothing[i]);
3278 /* Now see if any output operands that are marked "earlyclobber"
3279 in this alternative conflict with any input operands
3280 or any memory addresses. */
3282 for (i = 0; i < noperands; i++)
3283 if (this_alternative_earlyclobber[i]
3284 && this_alternative_win[i])
3286 struct decomposition early_data;
3288 early_data = decompose (recog_data.operand[i]);
3290 if (modified[i] == RELOAD_READ)
3293 if (this_alternative[i] == NO_REGS)
3295 this_alternative_earlyclobber[i] = 0;
3296 if (this_insn_is_asm)
3297 error_for_asm (this_insn,
3298 "`&' constraint used with no register class");
3303 for (j = 0; j < noperands; j++)
3304 /* Is this an input operand or a memory ref? */
3305 if ((GET_CODE (recog_data.operand[j]) == MEM
3306 || modified[j] != RELOAD_WRITE)
3308 /* Ignore things like match_operator operands. */
3309 && *recog_data.constraints[j] != 0
3310 /* Don't count an input operand that is constrained to match
3311 the early clobber operand. */
3312 && ! (this_alternative_matches[j] == i
3313 && rtx_equal_p (recog_data.operand[i],
3314 recog_data.operand[j]))
3315 /* Is it altered by storing the earlyclobber operand? */
3316 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3319 /* If the output is in a single-reg class,
3320 it's costly to reload it, so reload the input instead. */
3321 if (reg_class_size[this_alternative[i]] == 1
3322 && (GET_CODE (recog_data.operand[j]) == REG
3323 || GET_CODE (recog_data.operand[j]) == SUBREG))
3326 this_alternative_win[j] = 0;
3331 /* If an earlyclobber operand conflicts with something,
3332 it must be reloaded, so request this and count the cost. */
3336 this_alternative_win[i] = 0;
3337 for (j = 0; j < noperands; j++)
3338 if (this_alternative_matches[j] == i
3339 && this_alternative_win[j])
3341 this_alternative_win[j] = 0;
3347 /* If one alternative accepts all the operands, no reload required,
3348 choose that alternative; don't consider the remaining ones. */
3351 /* Unswap these so that they are never swapped at `finish'. */
3352 if (commutative >= 0)
3354 recog_data.operand[commutative] = substed_operand[commutative];
3355 recog_data.operand[commutative + 1]
3356 = substed_operand[commutative + 1];
3358 for (i = 0; i < noperands; i++)
3360 goal_alternative_win[i] = 1;
3361 goal_alternative[i] = this_alternative[i];
3362 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3363 goal_alternative_matches[i] = this_alternative_matches[i];
3364 goal_alternative_earlyclobber[i]
3365 = this_alternative_earlyclobber[i];
3367 goal_alternative_number = this_alternative_number;
3368 goal_alternative_swapped = swapped;
3369 goal_earlyclobber = this_earlyclobber;
3373 /* REJECT, set by the ! and ? constraint characters and when a register
3374 would be reloaded into a non-preferred class, discourages the use of
3375 this alternative for a reload goal. REJECT is incremented by six
3376 for each ? and two for each non-preferred class. */
3377 losers = losers * 6 + reject;
3379 /* If this alternative can be made to work by reloading,
3380 and it needs less reloading than the others checked so far,
3381 record it as the chosen goal for reloading. */
3382 if (! bad && best > losers)
3384 for (i = 0; i < noperands; i++)
3386 goal_alternative[i] = this_alternative[i];
3387 goal_alternative_win[i] = this_alternative_win[i];
3388 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3389 goal_alternative_matches[i] = this_alternative_matches[i];
3390 goal_alternative_earlyclobber[i]
3391 = this_alternative_earlyclobber[i];
3393 goal_alternative_swapped = swapped;
3395 goal_alternative_number = this_alternative_number;
3396 goal_earlyclobber = this_earlyclobber;
3400 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3401 then we need to try each alternative twice,
3402 the second time matching those two operands
3403 as if we had exchanged them.
3404 To do this, really exchange them in operands.
3406 If we have just tried the alternatives the second time,
3407 return operands to normal and drop through. */
3409 if (commutative >= 0)
3414 register enum reg_class tclass;
3417 recog_data.operand[commutative] = substed_operand[commutative + 1];
3418 recog_data.operand[commutative + 1] = substed_operand[commutative];
3420 tclass = preferred_class[commutative];
3421 preferred_class[commutative] = preferred_class[commutative + 1];
3422 preferred_class[commutative + 1] = tclass;
3424 t = pref_or_nothing[commutative];
3425 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3426 pref_or_nothing[commutative + 1] = t;
3428 memcpy (constraints, recog_data.constraints,
3429 noperands * sizeof (char *));
3434 recog_data.operand[commutative] = substed_operand[commutative];
3435 recog_data.operand[commutative + 1]
3436 = substed_operand[commutative + 1];
3440 /* The operands don't meet the constraints.
3441 goal_alternative describes the alternative
3442 that we could reach by reloading the fewest operands.
3443 Reload so as to fit it. */
3445 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3447 /* No alternative works with reloads?? */
3448 if (insn_code_number >= 0)
3449 fatal_insn ("Unable to generate reloads for:", insn);
3450 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3451 /* Avoid further trouble with this insn. */
3452 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3457 /* Jump to `finish' from above if all operands are valid already.
3458 In that case, goal_alternative_win is all 1. */
3461 /* Right now, for any pair of operands I and J that are required to match,
3463 goal_alternative_matches[J] is I.
3464 Set up goal_alternative_matched as the inverse function:
3465 goal_alternative_matched[I] = J. */
3467 for (i = 0; i < noperands; i++)
3468 goal_alternative_matched[i] = -1;
3470 for (i = 0; i < noperands; i++)
3471 if (! goal_alternative_win[i]
3472 && goal_alternative_matches[i] >= 0)
3473 goal_alternative_matched[goal_alternative_matches[i]] = i;
3475 /* If the best alternative is with operands 1 and 2 swapped,
3476 consider them swapped before reporting the reloads. Update the
3477 operand numbers of any reloads already pushed. */
3479 if (goal_alternative_swapped)
3483 tem = substed_operand[commutative];
3484 substed_operand[commutative] = substed_operand[commutative + 1];
3485 substed_operand[commutative + 1] = tem;
3486 tem = recog_data.operand[commutative];
3487 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3488 recog_data.operand[commutative + 1] = tem;
3489 tem = *recog_data.operand_loc[commutative];
3490 *recog_data.operand_loc[commutative]
3491 = *recog_data.operand_loc[commutative + 1];
3492 *recog_data.operand_loc[commutative+1] = tem;
3494 for (i = 0; i < n_reloads; i++)
3496 if (rld[i].opnum == commutative)
3497 rld[i].opnum = commutative + 1;
3498 else if (rld[i].opnum == commutative + 1)
3499 rld[i].opnum = commutative;
3503 for (i = 0; i < noperands; i++)
3505 operand_reloadnum[i] = -1;
3507 /* If this is an earlyclobber operand, we need to widen the scope.
3508 The reload must remain valid from the start of the insn being
3509 reloaded until after the operand is stored into its destination.
3510 We approximate this with RELOAD_OTHER even though we know that we
3511 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3513 One special case that is worth checking is when we have an
3514 output that is earlyclobber but isn't used past the insn (typically
3515 a SCRATCH). In this case, we only need have the reload live
3516 through the insn itself, but not for any of our input or output
3518 But we must not accidentally narrow the scope of an existing
3519 RELOAD_OTHER reload - leave these alone.
3521 In any case, anything needed to address this operand can remain
3522 however they were previously categorized. */
3524 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3526 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3527 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3530 /* Any constants that aren't allowed and can't be reloaded
3531 into registers are here changed into memory references. */
3532 for (i = 0; i < noperands; i++)
3533 if (! goal_alternative_win[i]
3534 && CONSTANT_P (recog_data.operand[i])
3535 /* force_const_mem does not accept HIGH. */
3536 && GET_CODE (recog_data.operand[i]) != HIGH
3537 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3538 (enum reg_class) goal_alternative[i])
3540 || no_input_reloads)
3541 && operand_mode[i] != VOIDmode)
3543 substed_operand[i] = recog_data.operand[i]
3544 = find_reloads_toplev (force_const_mem (operand_mode[i],
3545 recog_data.operand[i]),
3546 i, address_type[i], ind_levels, 0, insn);
3547 if (alternative_allows_memconst (recog_data.constraints[i],
3548 goal_alternative_number))
3549 goal_alternative_win[i] = 1;
3552 /* Record the values of the earlyclobber operands for the caller. */
3553 if (goal_earlyclobber)
3554 for (i = 0; i < noperands; i++)
3555 if (goal_alternative_earlyclobber[i])
3556 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3558 /* Now record reloads for all the operands that need them. */
3559 for (i = 0; i < noperands; i++)
3560 if (! goal_alternative_win[i])
3562 /* Operands that match previous ones have already been handled. */
3563 if (goal_alternative_matches[i] >= 0)
3565 /* Handle an operand with a nonoffsettable address
3566 appearing where an offsettable address will do
3567 by reloading the address into a base register.
3569 ??? We can also do this when the operand is a register and
3570 reg_equiv_mem is not offsettable, but this is a bit tricky,
3571 so we don't bother with it. It may not be worth doing. */
3572 else if (goal_alternative_matched[i] == -1
3573 && goal_alternative_offmemok[i]
3574 && GET_CODE (recog_data.operand[i]) == MEM)
3576 operand_reloadnum[i]
3577 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3578 &XEXP (recog_data.operand[i], 0), NULL_PTR,
3580 GET_MODE (XEXP (recog_data.operand[i], 0)),
3581 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3582 rld[operand_reloadnum[i]].inc
3583 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3585 /* If this operand is an output, we will have made any
3586 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3587 now we are treating part of the operand as an input, so
3588 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3590 if (modified[i] == RELOAD_WRITE)
3592 for (j = 0; j < n_reloads; j++)
3594 if (rld[j].opnum == i)
3596 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3597 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3598 else if (rld[j].when_needed
3599 == RELOAD_FOR_OUTADDR_ADDRESS)
3600 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3605 else if (goal_alternative_matched[i] == -1)
3607 operand_reloadnum[i]
3608 = push_reload ((modified[i] != RELOAD_WRITE
3609 ? recog_data.operand[i] : 0),
3610 (modified[i] != RELOAD_READ
3611 ? recog_data.operand[i] : 0),
3612 (modified[i] != RELOAD_WRITE
3613 ? recog_data.operand_loc[i] : 0),
3614 (modified[i] != RELOAD_READ
3615 ? recog_data.operand_loc[i] : 0),
3616 (enum reg_class) goal_alternative[i],
3617 (modified[i] == RELOAD_WRITE
3618 ? VOIDmode : operand_mode[i]),
3619 (modified[i] == RELOAD_READ
3620 ? VOIDmode : operand_mode[i]),
3621 (insn_code_number < 0 ? 0
3622 : insn_data[insn_code_number].operand[i].strict_low),
3623 0, i, operand_type[i]);
3625 /* In a matching pair of operands, one must be input only
3626 and the other must be output only.
3627 Pass the input operand as IN and the other as OUT. */
3628 else if (modified[i] == RELOAD_READ
3629 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3631 operand_reloadnum[i]
3632 = push_reload (recog_data.operand[i],
3633 recog_data.operand[goal_alternative_matched[i]],
3634 recog_data.operand_loc[i],
3635 recog_data.operand_loc[goal_alternative_matched[i]],
3636 (enum reg_class) goal_alternative[i],
3638 operand_mode[goal_alternative_matched[i]],
3639 0, 0, i, RELOAD_OTHER);
3640 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3642 else if (modified[i] == RELOAD_WRITE
3643 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3645 operand_reloadnum[goal_alternative_matched[i]]
3646 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3647 recog_data.operand[i],
3648 recog_data.operand_loc[goal_alternative_matched[i]],
3649 recog_data.operand_loc[i],
3650 (enum reg_class) goal_alternative[i],
3651 operand_mode[goal_alternative_matched[i]],
3653 0, 0, i, RELOAD_OTHER);
3654 operand_reloadnum[i] = output_reloadnum;
3656 else if (insn_code_number >= 0)
3660 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3661 /* Avoid further trouble with this insn. */
3662 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3667 else if (goal_alternative_matched[i] < 0
3668 && goal_alternative_matches[i] < 0
3671 /* For each non-matching operand that's a MEM or a pseudo-register
3672 that didn't get a hard register, make an optional reload.
3673 This may get done even if the insn needs no reloads otherwise. */
3675 rtx operand = recog_data.operand[i];
3677 while (GET_CODE (operand) == SUBREG)
3678 operand = XEXP (operand, 0);
3679 if ((GET_CODE (operand) == MEM
3680 || (GET_CODE (operand) == REG
3681 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3682 /* If this is only for an output, the optional reload would not
3683 actually cause us to use a register now, just note that
3684 something is stored here. */
3685 && ((enum reg_class) goal_alternative[i] != NO_REGS
3686 || modified[i] == RELOAD_WRITE)
3687 && ! no_input_reloads
3688 /* An optional output reload might allow to delete INSN later.
3689 We mustn't make in-out reloads on insns that are not permitted
3691 If this is an asm, we can't delete it; we must not even call
3692 push_reload for an optional output reload in this case,
3693 because we can't be sure that the constraint allows a register,
3694 and push_reload verifies the constraints for asms. */
3695 && (modified[i] == RELOAD_READ
3696 || (! no_output_reloads && ! this_insn_is_asm)))
3697 operand_reloadnum[i]
3698 = push_reload ((modified[i] != RELOAD_WRITE
3699 ? recog_data.operand[i] : 0),
3700 (modified[i] != RELOAD_READ
3701 ? recog_data.operand[i] : 0),
3702 (modified[i] != RELOAD_WRITE
3703 ? recog_data.operand_loc[i] : 0),
3704 (modified[i] != RELOAD_READ
3705 ? recog_data.operand_loc[i] : 0),
3706 (enum reg_class) goal_alternative[i],
3707 (modified[i] == RELOAD_WRITE
3708 ? VOIDmode : operand_mode[i]),
3709 (modified[i] == RELOAD_READ
3710 ? VOIDmode : operand_mode[i]),
3711 (insn_code_number < 0 ? 0
3712 : insn_data[insn_code_number].operand[i].strict_low),
3713 1, i, operand_type[i]);
3714 /* If a memory reference remains (either as a MEM or a pseudo that
3715 did not get a hard register), yet we can't make an optional
3716 reload, check if this is actually a pseudo register reference;
3717 we then need to emit a USE and/or a CLOBBER so that reload
3718 inheritance will do the right thing. */
3720 && (GET_CODE (operand) == MEM
3721 || (GET_CODE (operand) == REG
3722 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3723 && reg_renumber [REGNO (operand)] < 0)))
3725 operand = *recog_data.operand_loc[i];
3727 while (GET_CODE (operand) == SUBREG)
3728 operand = XEXP (operand, 0);
3729 if (GET_CODE (operand) == REG)
3731 if (modified[i] != RELOAD_WRITE)
3732 emit_insn_before (gen_rtx_USE (VOIDmode, operand), insn);
3733 if (modified[i] != RELOAD_READ)
3734 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3738 else if (goal_alternative_matches[i] >= 0
3739 && goal_alternative_win[goal_alternative_matches[i]]
3740 && modified[i] == RELOAD_READ
3741 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3742 && ! no_input_reloads && ! no_output_reloads
3745 /* Similarly, make an optional reload for a pair of matching
3746 objects that are in MEM or a pseudo that didn't get a hard reg. */
3748 rtx operand = recog_data.operand[i];
3750 while (GET_CODE (operand) == SUBREG)
3751 operand = XEXP (operand, 0);
3752 if ((GET_CODE (operand) == MEM
3753 || (GET_CODE (operand) == REG
3754 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3755 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3757 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3758 = push_reload (recog_data.operand[goal_alternative_matches[i]],
3759 recog_data.operand[i],
3760 recog_data.operand_loc[goal_alternative_matches[i]],
3761 recog_data.operand_loc[i],
3762 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3763 operand_mode[goal_alternative_matches[i]],
3765 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3768 /* Perform whatever substitutions on the operands we are supposed
3769 to make due to commutativity or replacement of registers
3770 with equivalent constants or memory slots. */
3772 for (i = 0; i < noperands; i++)
3774 /* We only do this on the last pass through reload, because it is
3775 possible for some data (like reg_equiv_address) to be changed during
3776 later passes. Moreover, we loose the opportunity to get a useful
3777 reload_{in,out}_reg when we do these replacements. */
3781 rtx substitution = substed_operand[i];
3783 *recog_data.operand_loc[i] = substitution;
3785 /* If we're replacing an operand with a LABEL_REF, we need
3786 to make sure that there's a REG_LABEL note attached to
3787 this instruction. */
3788 if (GET_CODE (insn) != JUMP_INSN
3789 && GET_CODE (substitution) == LABEL_REF
3790 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
3791 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL,
3792 XEXP (substitution, 0),
3796 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
3799 /* If this insn pattern contains any MATCH_DUP's, make sure that
3800 they will be substituted if the operands they match are substituted.
3801 Also do now any substitutions we already did on the operands.
3803 Don't do this if we aren't making replacements because we might be
3804 propagating things allocated by frame pointer elimination into places
3805 it doesn't expect. */
3807 if (insn_code_number >= 0 && replace)
3808 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
3810 int opno = recog_data.dup_num[i];
3811 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
3812 if (operand_reloadnum[opno] >= 0)
3813 push_replacement (recog_data.dup_loc[i], operand_reloadnum[opno],
3814 insn_data[insn_code_number].operand[opno].mode);
3818 /* This loses because reloading of prior insns can invalidate the equivalence
3819 (or at least find_equiv_reg isn't smart enough to find it any more),
3820 causing this insn to need more reload regs than it needed before.
3821 It may be too late to make the reload regs available.
3822 Now this optimization is done safely in choose_reload_regs. */
3824 /* For each reload of a reg into some other class of reg,
3825 search for an existing equivalent reg (same value now) in the right class.
3826 We can use it as long as we don't need to change its contents. */
3827 for (i = 0; i < n_reloads; i++)
3828 if (rld[i].reg_rtx == 0
3830 && GET_CODE (rld[i].in) == REG
3834 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
3835 static_reload_reg_p, 0, rld[i].inmode);
3836 /* Prevent generation of insn to load the value
3837 because the one we found already has the value. */
3839 rld[i].in = rld[i].reg_rtx;
3843 /* Perhaps an output reload can be combined with another
3844 to reduce needs by one. */
3845 if (!goal_earlyclobber)
3848 /* If we have a pair of reloads for parts of an address, they are reloading
3849 the same object, the operands themselves were not reloaded, and they
3850 are for two operands that are supposed to match, merge the reloads and
3851 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3853 for (i = 0; i < n_reloads; i++)
3857 for (j = i + 1; j < n_reloads; j++)
3858 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
3859 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
3860 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3861 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3862 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
3863 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
3864 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3865 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3866 && rtx_equal_p (rld[i].in, rld[j].in)
3867 && (operand_reloadnum[rld[i].opnum] < 0
3868 || rld[operand_reloadnum[rld[i].opnum]].optional)
3869 && (operand_reloadnum[rld[j].opnum] < 0
3870 || rld[operand_reloadnum[rld[j].opnum]].optional)
3871 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
3872 || (goal_alternative_matches[rld[j].opnum]
3875 for (k = 0; k < n_replacements; k++)
3876 if (replacements[k].what == j)
3877 replacements[k].what = i;
3879 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3880 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3881 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
3883 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
3888 /* Scan all the reloads and update their type.
3889 If a reload is for the address of an operand and we didn't reload
3890 that operand, change the type. Similarly, change the operand number
3891 of a reload when two operands match. If a reload is optional, treat it
3892 as though the operand isn't reloaded.
3894 ??? This latter case is somewhat odd because if we do the optional
3895 reload, it means the object is hanging around. Thus we need only
3896 do the address reload if the optional reload was NOT done.
3898 Change secondary reloads to be the address type of their operand, not
3901 If an operand's reload is now RELOAD_OTHER, change any
3902 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3903 RELOAD_FOR_OTHER_ADDRESS. */
3905 for (i = 0; i < n_reloads; i++)
3907 if (rld[i].secondary_p
3908 && rld[i].when_needed == operand_type[rld[i].opnum])
3909 rld[i].when_needed = address_type[rld[i].opnum];
3911 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
3912 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
3913 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3914 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3915 && (operand_reloadnum[rld[i].opnum] < 0
3916 || rld[operand_reloadnum[rld[i].opnum]].optional))
3918 /* If we have a secondary reload to go along with this reload,
3919 change its type to RELOAD_FOR_OPADDR_ADDR. */
3921 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
3922 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
3923 && rld[i].secondary_in_reload != -1)
3925 int secondary_in_reload = rld[i].secondary_in_reload;
3927 rld[secondary_in_reload].when_needed
3928 = RELOAD_FOR_OPADDR_ADDR;
3930 /* If there's a tertiary reload we have to change it also. */
3931 if (secondary_in_reload > 0
3932 && rld[secondary_in_reload].secondary_in_reload != -1)
3933 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
3934 = RELOAD_FOR_OPADDR_ADDR;
3937 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
3938 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3939 && rld[i].secondary_out_reload != -1)
3941 int secondary_out_reload = rld[i].secondary_out_reload;
3943 rld[secondary_out_reload].when_needed
3944 = RELOAD_FOR_OPADDR_ADDR;
3946 /* If there's a tertiary reload we have to change it also. */
3947 if (secondary_out_reload
3948 && rld[secondary_out_reload].secondary_out_reload != -1)
3949 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
3950 = RELOAD_FOR_OPADDR_ADDR;
3953 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
3954 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
3955 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
3957 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
3960 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
3961 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
3962 && operand_reloadnum[rld[i].opnum] >= 0
3963 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
3965 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
3967 if (goal_alternative_matches[rld[i].opnum] >= 0)
3968 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
3971 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
3972 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
3973 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
3975 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
3976 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
3977 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
3978 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
3979 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
3980 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
3981 This is complicated by the fact that a single operand can have more
3982 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
3983 choose_reload_regs without affecting code quality, and cases that
3984 actually fail are extremely rare, so it turns out to be better to fix
3985 the problem here by not generating cases that choose_reload_regs will
3987 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
3988 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
3990 We can reduce the register pressure by exploiting that a
3991 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
3992 does not conflict with any of them, if it is only used for the first of
3993 the RELOAD_FOR_X_ADDRESS reloads. */
3995 int first_op_addr_num = -2;
3996 int first_inpaddr_num[MAX_RECOG_OPERANDS];
3997 int first_outpaddr_num[MAX_RECOG_OPERANDS];
3999 /* We use last_op_addr_reload and the contents of the above arrays
4000 first as flags - -2 means no instance encountered, -1 means exactly
4001 one instance encountered.
4002 If more than one instance has been encountered, we store the reload
4003 number of the first reload of the kind in question; reload numbers
4004 are known to be non-negative. */
4005 for (i = 0; i < noperands; i++)
4006 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4007 for (i = n_reloads - 1; i >= 0; i--)
4009 switch (rld[i].when_needed)
4011 case RELOAD_FOR_OPERAND_ADDRESS:
4012 if (++first_op_addr_num >= 0)
4014 first_op_addr_num = i;
4018 case RELOAD_FOR_INPUT_ADDRESS:
4019 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4021 first_inpaddr_num[rld[i].opnum] = i;
4025 case RELOAD_FOR_OUTPUT_ADDRESS:
4026 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4028 first_outpaddr_num[rld[i].opnum] = i;
4039 for (i = 0; i < n_reloads; i++)
4041 int first_num, type;
4043 switch (rld[i].when_needed)
4045 case RELOAD_FOR_OPADDR_ADDR:
4046 first_num = first_op_addr_num;
4047 type = RELOAD_FOR_OPERAND_ADDRESS;
4049 case RELOAD_FOR_INPADDR_ADDRESS:
4050 first_num = first_inpaddr_num[rld[i].opnum];
4051 type = RELOAD_FOR_INPUT_ADDRESS;
4053 case RELOAD_FOR_OUTADDR_ADDRESS:
4054 first_num = first_outpaddr_num[rld[i].opnum];
4055 type = RELOAD_FOR_OUTPUT_ADDRESS;
4062 else if (i > first_num)
4063 rld[i].when_needed = type;
4066 /* Check if the only TYPE reload that uses reload I is
4067 reload FIRST_NUM. */
4068 for (j = n_reloads - 1; j > first_num; j--)
4070 if (rld[j].when_needed == type
4071 && (rld[i].secondary_p
4072 ? rld[j].secondary_in_reload == i
4073 : reg_mentioned_p (rld[i].in, rld[j].in)))
4075 rld[i].when_needed = type;
4084 /* See if we have any reloads that are now allowed to be merged
4085 because we've changed when the reload is needed to
4086 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4087 check for the most common cases. */
4089 for (i = 0; i < n_reloads; i++)
4090 if (rld[i].in != 0 && rld[i].out == 0
4091 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4092 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4093 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4094 for (j = 0; j < n_reloads; j++)
4095 if (i != j && rld[j].in != 0 && rld[j].out == 0
4096 && rld[j].when_needed == rld[i].when_needed
4097 && MATCHES (rld[i].in, rld[j].in)
4098 && rld[i].class == rld[j].class
4099 && !rld[i].nocombine && !rld[j].nocombine
4100 && rld[i].reg_rtx == rld[j].reg_rtx)
4102 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4103 transfer_replacements (i, j);
4108 /* If we made any reloads for addresses, see if they violate a
4109 "no input reloads" requirement for this insn. But loads that we
4110 do after the insn (such as for output addresses) are fine. */
4111 if (no_input_reloads)
4112 for (i = 0; i < n_reloads; i++)
4114 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
4115 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS)
4119 /* Compute reload_mode and reload_nregs. */
4120 for (i = 0; i < n_reloads; i++)
4123 = (rld[i].inmode == VOIDmode
4124 || (GET_MODE_SIZE (rld[i].outmode)
4125 > GET_MODE_SIZE (rld[i].inmode)))
4126 ? rld[i].outmode : rld[i].inmode;
4128 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4134 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4135 accepts a memory operand with constant address. */
4138 alternative_allows_memconst (constraint, altnum)
4139 const char *constraint;
4143 /* Skip alternatives before the one requested. */
4146 while (*constraint++ != ',');
4149 /* Scan the requested alternative for 'm' or 'o'.
4150 If one of them is present, this alternative accepts memory constants. */
4151 while ((c = *constraint++) && c != ',' && c != '#')
4152 if (c == 'm' || c == 'o')
4157 /* Scan X for memory references and scan the addresses for reloading.
4158 Also checks for references to "constant" regs that we want to eliminate
4159 and replaces them with the values they stand for.
4160 We may alter X destructively if it contains a reference to such.
4161 If X is just a constant reg, we return the equivalent value
4164 IND_LEVELS says how many levels of indirect addressing this machine
4167 OPNUM and TYPE identify the purpose of the reload.
4169 IS_SET_DEST is true if X is the destination of a SET, which is not
4170 appropriate to be replaced by a constant.
4172 INSN, if nonzero, is the insn in which we do the reload. It is used
4173 to determine if we may generate output reloads, and where to put USEs
4174 for pseudos that we have to replace with stack slots. */
4177 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn)
4180 enum reload_type type;
4185 register RTX_CODE code = GET_CODE (x);
4187 register const char *fmt = GET_RTX_FORMAT (code);
4193 /* This code is duplicated for speed in find_reloads. */
4194 register int regno = REGNO (x);
4195 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4196 x = reg_equiv_constant[regno];
4198 /* This creates (subreg (mem...)) which would cause an unnecessary
4199 reload of the mem. */
4200 else if (reg_equiv_mem[regno] != 0)
4201 x = reg_equiv_mem[regno];
4203 else if (reg_equiv_memory_loc[regno]
4204 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4206 rtx mem = make_memloc (x, regno);
4207 if (reg_equiv_address[regno]
4208 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4210 /* If this is not a toplevel operand, find_reloads doesn't see
4211 this substitution. We have to emit a USE of the pseudo so
4212 that delete_output_reload can see it. */
4213 if (replace_reloads && recog_data.operand[opnum] != x)
4214 emit_insn_before (gen_rtx_USE (VOIDmode, x), insn);
4216 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4217 opnum, type, ind_levels, insn);
4225 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4226 opnum, type, ind_levels, insn);
4230 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4232 /* Check for SUBREG containing a REG that's equivalent to a constant.
4233 If the constant has a known value, truncate it right now.
4234 Similarly if we are extracting a single-word of a multi-word
4235 constant. If the constant is symbolic, allow it to be substituted
4236 normally. push_reload will strip the subreg later. If the
4237 constant is VOIDmode, abort because we will lose the mode of
4238 the register (this should never happen because one of the cases
4239 above should handle it). */
4241 register int regno = REGNO (SUBREG_REG (x));
4244 if (subreg_lowpart_p (x)
4245 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4246 && reg_equiv_constant[regno] != 0
4247 && (tem = gen_lowpart_common (GET_MODE (x),
4248 reg_equiv_constant[regno])) != 0)
4251 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
4252 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4253 && reg_equiv_constant[regno] != 0
4254 && (tem = operand_subword (reg_equiv_constant[regno],
4256 GET_MODE (SUBREG_REG (x)))) != 0)
4258 /* TEM is now a word sized constant for the bits from X that
4259 we wanted. However, TEM may be the wrong representation.
4261 Use gen_lowpart_common to convert a CONST_INT into a
4262 CONST_DOUBLE and vice versa as needed according to by the mode
4264 tem = gen_lowpart_common (GET_MODE (x), tem);
4270 /* If the SUBREG is wider than a word, the above test will fail.
4271 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4272 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4273 a 32 bit target. We still can - and have to - handle this
4274 for non-paradoxical subregs of CONST_INTs. */
4275 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4276 && reg_equiv_constant[regno] != 0
4277 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT
4278 && (GET_MODE_SIZE (GET_MODE (x))
4279 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
4281 int shift = SUBREG_WORD (x) * BITS_PER_WORD;
4282 if (WORDS_BIG_ENDIAN)
4283 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
4284 - GET_MODE_BITSIZE (GET_MODE (x))
4286 /* Here we use the knowledge that CONST_INTs have a
4287 HOST_WIDE_INT field. */
4288 if (shift >= HOST_BITS_PER_WIDE_INT)
4289 shift = HOST_BITS_PER_WIDE_INT - 1;
4290 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift);
4293 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4294 && reg_equiv_constant[regno] != 0
4295 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
4298 /* If the subreg contains a reg that will be converted to a mem,
4299 convert the subreg to a narrower memref now.
4300 Otherwise, we would get (subreg (mem ...) ...),
4301 which would force reload of the mem.
4303 We also need to do this if there is an equivalent MEM that is
4304 not offsettable. In that case, alter_subreg would produce an
4305 invalid address on big-endian machines.
4307 For machines that extend byte loads, we must not reload using
4308 a wider mode if we have a paradoxical SUBREG. find_reloads will
4309 force a reload in that case. So we should not do anything here. */
4311 else if (regno >= FIRST_PSEUDO_REGISTER
4312 #ifdef LOAD_EXTEND_OP
4313 && (GET_MODE_SIZE (GET_MODE (x))
4314 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4316 && (reg_equiv_address[regno] != 0
4317 || (reg_equiv_mem[regno] != 0
4318 && (! strict_memory_address_p (GET_MODE (x),
4319 XEXP (reg_equiv_mem[regno], 0))
4320 || ! offsettable_memref_p (reg_equiv_mem[regno])
4321 || num_not_at_initial_offset))))
4322 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4326 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4330 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4331 ind_levels, is_set_dest, insn);
4332 /* If we have replaced a reg with it's equivalent memory loc -
4333 that can still be handled here e.g. if it's in a paradoxical
4334 subreg - we must make the change in a copy, rather than using
4335 a destructive change. This way, find_reloads can still elect
4336 not to do the change. */
4337 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4339 x = shallow_copy_rtx (x);
4342 XEXP (x, i) = new_part;
4348 /* Return a mem ref for the memory equivalent of reg REGNO.
4349 This mem ref is not shared with anything. */
4352 make_memloc (ad, regno)
4356 /* We must rerun eliminate_regs, in case the elimination
4357 offsets have changed. */
4359 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4361 /* If TEM might contain a pseudo, we must copy it to avoid
4362 modifying it when we do the substitution for the reload. */
4363 if (rtx_varies_p (tem))
4364 tem = copy_rtx (tem);
4366 tem = gen_rtx_MEM (GET_MODE (ad), tem);
4367 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4371 /* Record all reloads needed for handling memory address AD
4372 which appears in *LOC in a memory reference to mode MODE
4373 which itself is found in location *MEMREFLOC.
4374 Note that we take shortcuts assuming that no multi-reg machine mode
4375 occurs as part of an address.
4377 OPNUM and TYPE specify the purpose of this reload.
4379 IND_LEVELS says how many levels of indirect addressing this machine
4382 INSN, if nonzero, is the insn in which we do the reload. It is used
4383 to determine if we may generate output reloads, and where to put USEs
4384 for pseudos that we have to replace with stack slots.
4386 Value is nonzero if this address is reloaded or replaced as a whole.
4387 This is interesting to the caller if the address is an autoincrement.
4389 Note that there is no verification that the address will be valid after
4390 this routine does its work. Instead, we rely on the fact that the address
4391 was valid when reload started. So we need only undo things that reload
4392 could have broken. These are wrong register types, pseudos not allocated
4393 to a hard register, and frame pointer elimination. */
4396 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn)
4397 enum machine_mode mode;
4402 enum reload_type type;
4407 int removed_and = 0;
4410 /* If the address is a register, see if it is a legitimate address and
4411 reload if not. We first handle the cases where we need not reload
4412 or where we must reload in a non-standard way. */
4414 if (GET_CODE (ad) == REG)
4418 if (reg_equiv_constant[regno] != 0
4419 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
4421 *loc = ad = reg_equiv_constant[regno];
4425 tem = reg_equiv_memory_loc[regno];
4428 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4430 tem = make_memloc (ad, regno);
4431 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4433 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
4434 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
4437 /* We can avoid a reload if the register's equivalent memory
4438 expression is valid as an indirect memory address.
4439 But not all addresses are valid in a mem used as an indirect
4440 address: only reg or reg+constant. */
4443 && strict_memory_address_p (mode, tem)
4444 && (GET_CODE (XEXP (tem, 0)) == REG
4445 || (GET_CODE (XEXP (tem, 0)) == PLUS
4446 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4447 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4449 /* TEM is not the same as what we'll be replacing the
4450 pseudo with after reload, put a USE in front of INSN
4451 in the final reload pass. */
4453 && num_not_at_initial_offset
4454 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4457 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
4458 /* This doesn't really count as replacing the address
4459 as a whole, since it is still a memory access. */
4467 /* The only remaining case where we can avoid a reload is if this is a
4468 hard register that is valid as a base register and which is not the
4469 subject of a CLOBBER in this insn. */
4471 else if (regno < FIRST_PSEUDO_REGISTER
4472 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4473 && ! regno_clobbered_p (regno, this_insn))
4476 /* If we do not have one of the cases above, we must do the reload. */
4477 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
4478 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4482 if (strict_memory_address_p (mode, ad))
4484 /* The address appears valid, so reloads are not needed.
4485 But the address may contain an eliminable register.
4486 This can happen because a machine with indirect addressing
4487 may consider a pseudo register by itself a valid address even when
4488 it has failed to get a hard reg.
4489 So do a tree-walk to find and eliminate all such regs. */
4491 /* But first quickly dispose of a common case. */
4492 if (GET_CODE (ad) == PLUS
4493 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4494 && GET_CODE (XEXP (ad, 0)) == REG
4495 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4498 subst_reg_equivs_changed = 0;
4499 *loc = subst_reg_equivs (ad, insn);
4501 if (! subst_reg_equivs_changed)
4504 /* Check result for validity after substitution. */
4505 if (strict_memory_address_p (mode, ad))
4509 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4514 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4519 *memrefloc = copy_rtx (*memrefloc);
4520 XEXP (*memrefloc, 0) = ad;
4521 move_replacements (&ad, &XEXP (*memrefloc, 0));
4527 /* The address is not valid. We have to figure out why. First see if
4528 we have an outer AND and remove it if so. Then analyze what's inside. */
4530 if (GET_CODE (ad) == AND)
4533 loc = &XEXP (ad, 0);
4537 /* One possibility for why the address is invalid is that it is itself
4538 a MEM. This can happen when the frame pointer is being eliminated, a
4539 pseudo is not allocated to a hard register, and the offset between the
4540 frame and stack pointers is not its initial value. In that case the
4541 pseudo will have been replaced by a MEM referring to the
4543 if (GET_CODE (ad) == MEM)
4545 /* First ensure that the address in this MEM is valid. Then, unless
4546 indirect addresses are valid, reload the MEM into a register. */
4548 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4549 opnum, ADDR_TYPE (type),
4550 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4552 /* If tem was changed, then we must create a new memory reference to
4553 hold it and store it back into memrefloc. */
4554 if (tem != ad && memrefloc)
4556 *memrefloc = copy_rtx (*memrefloc);
4557 copy_replacements (tem, XEXP (*memrefloc, 0));
4558 loc = &XEXP (*memrefloc, 0);
4560 loc = &XEXP (*loc, 0);
4563 /* Check similar cases as for indirect addresses as above except
4564 that we can allow pseudos and a MEM since they should have been
4565 taken care of above. */
4568 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4569 || GET_CODE (XEXP (tem, 0)) == MEM
4570 || ! (GET_CODE (XEXP (tem, 0)) == REG
4571 || (GET_CODE (XEXP (tem, 0)) == PLUS
4572 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4573 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4575 /* Must use TEM here, not AD, since it is the one that will
4576 have any subexpressions reloaded, if needed. */
4577 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4578 BASE_REG_CLASS, GET_MODE (tem),
4581 return ! removed_and;
4587 /* If we have address of a stack slot but it's not valid because the
4588 displacement is too large, compute the sum in a register.
4589 Handle all base registers here, not just fp/ap/sp, because on some
4590 targets (namely SH) we can also get too large displacements from
4591 big-endian corrections. */
4592 else if (GET_CODE (ad) == PLUS
4593 && GET_CODE (XEXP (ad, 0)) == REG
4594 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4595 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4596 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4598 /* Unshare the MEM rtx so we can safely alter it. */
4601 *memrefloc = copy_rtx (*memrefloc);
4602 loc = &XEXP (*memrefloc, 0);
4604 loc = &XEXP (*loc, 0);
4607 if (double_reg_address_ok)
4609 /* Unshare the sum as well. */
4610 *loc = ad = copy_rtx (ad);
4612 /* Reload the displacement into an index reg.
4613 We assume the frame pointer or arg pointer is a base reg. */
4614 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4615 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4621 /* If the sum of two regs is not necessarily valid,
4622 reload the sum into a base reg.
4623 That will at least work. */
4624 find_reloads_address_part (ad, loc, BASE_REG_CLASS,
4625 Pmode, opnum, type, ind_levels);
4627 return ! removed_and;
4630 /* If we have an indexed stack slot, there are three possible reasons why
4631 it might be invalid: The index might need to be reloaded, the address
4632 might have been made by frame pointer elimination and hence have a
4633 constant out of range, or both reasons might apply.
4635 We can easily check for an index needing reload, but even if that is the
4636 case, we might also have an invalid constant. To avoid making the
4637 conservative assumption and requiring two reloads, we see if this address
4638 is valid when not interpreted strictly. If it is, the only problem is
4639 that the index needs a reload and find_reloads_address_1 will take care
4642 If we decide to do something here, it must be that
4643 `double_reg_address_ok' is true and that this address rtl was made by
4644 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4645 rework the sum so that the reload register will be added to the index.
4646 This is safe because we know the address isn't shared.
4648 We check for fp/ap/sp as both the first and second operand of the
4651 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4652 && GET_CODE (XEXP (ad, 0)) == PLUS
4653 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4654 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4655 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4657 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4658 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4660 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4661 && ! memory_address_p (mode, ad))
4663 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4664 plus_constant (XEXP (XEXP (ad, 0), 0),
4665 INTVAL (XEXP (ad, 1))),
4666 XEXP (XEXP (ad, 0), 1));
4667 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4668 GET_MODE (ad), opnum, type, ind_levels);
4669 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4675 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4676 && GET_CODE (XEXP (ad, 0)) == PLUS
4677 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4678 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4679 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4681 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4682 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4684 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4685 && ! memory_address_p (mode, ad))
4687 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4688 XEXP (XEXP (ad, 0), 0),
4689 plus_constant (XEXP (XEXP (ad, 0), 1),
4690 INTVAL (XEXP (ad, 1))));
4691 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), BASE_REG_CLASS,
4692 GET_MODE (ad), opnum, type, ind_levels);
4693 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4699 /* See if address becomes valid when an eliminable register
4700 in a sum is replaced. */
4703 if (GET_CODE (ad) == PLUS)
4704 tem = subst_indexed_address (ad);
4705 if (tem != ad && strict_memory_address_p (mode, tem))
4707 /* Ok, we win that way. Replace any additional eliminable
4710 subst_reg_equivs_changed = 0;
4711 tem = subst_reg_equivs (tem, insn);
4713 /* Make sure that didn't make the address invalid again. */
4715 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4722 /* If constants aren't valid addresses, reload the constant address
4724 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4726 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4727 Unshare it so we can safely alter it. */
4728 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4729 && CONSTANT_POOL_ADDRESS_P (ad))
4731 *memrefloc = copy_rtx (*memrefloc);
4732 loc = &XEXP (*memrefloc, 0);
4734 loc = &XEXP (*loc, 0);
4737 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
4739 return ! removed_and;
4742 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
4746 /* Find all pseudo regs appearing in AD
4747 that are eliminable in favor of equivalent values
4748 and do not have hard regs; replace them by their equivalents.
4749 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4750 front of it for pseudos that we have to replace with stack slots. */
4753 subst_reg_equivs (ad, insn)
4757 register RTX_CODE code = GET_CODE (ad);
4759 register const char *fmt;
4775 register int regno = REGNO (ad);
4777 if (reg_equiv_constant[regno] != 0)
4779 subst_reg_equivs_changed = 1;
4780 return reg_equiv_constant[regno];
4782 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
4784 rtx mem = make_memloc (ad, regno);
4785 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
4787 subst_reg_equivs_changed = 1;
4788 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
4796 /* Quickly dispose of a common case. */
4797 if (XEXP (ad, 0) == frame_pointer_rtx
4798 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4806 fmt = GET_RTX_FORMAT (code);
4807 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4809 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
4813 /* Compute the sum of X and Y, making canonicalizations assumed in an
4814 address, namely: sum constant integers, surround the sum of two
4815 constants with a CONST, put the constant as the second operand, and
4816 group the constant on the outermost sum.
4818 This routine assumes both inputs are already in canonical form. */
4825 enum machine_mode mode = GET_MODE (x);
4827 if (mode == VOIDmode)
4828 mode = GET_MODE (y);
4830 if (mode == VOIDmode)
4833 if (GET_CODE (x) == CONST_INT)
4834 return plus_constant (y, INTVAL (x));
4835 else if (GET_CODE (y) == CONST_INT)
4836 return plus_constant (x, INTVAL (y));
4837 else if (CONSTANT_P (x))
4838 tem = x, x = y, y = tem;
4840 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
4841 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
4843 /* Note that if the operands of Y are specified in the opposite
4844 order in the recursive calls below, infinite recursion will occur. */
4845 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
4846 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
4848 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4849 constant will have been placed second. */
4850 if (CONSTANT_P (x) && CONSTANT_P (y))
4852 if (GET_CODE (x) == CONST)
4854 if (GET_CODE (y) == CONST)
4857 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
4860 return gen_rtx_PLUS (mode, x, y);
4863 /* If ADDR is a sum containing a pseudo register that should be
4864 replaced with a constant (from reg_equiv_constant),
4865 return the result of doing so, and also apply the associative
4866 law so that the result is more likely to be a valid address.
4867 (But it is not guaranteed to be one.)
4869 Note that at most one register is replaced, even if more are
4870 replaceable. Also, we try to put the result into a canonical form
4871 so it is more likely to be a valid address.
4873 In all other cases, return ADDR. */
4876 subst_indexed_address (addr)
4879 rtx op0 = 0, op1 = 0, op2 = 0;
4883 if (GET_CODE (addr) == PLUS)
4885 /* Try to find a register to replace. */
4886 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
4887 if (GET_CODE (op0) == REG
4888 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
4889 && reg_renumber[regno] < 0
4890 && reg_equiv_constant[regno] != 0)
4891 op0 = reg_equiv_constant[regno];
4892 else if (GET_CODE (op1) == REG
4893 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
4894 && reg_renumber[regno] < 0
4895 && reg_equiv_constant[regno] != 0)
4896 op1 = reg_equiv_constant[regno];
4897 else if (GET_CODE (op0) == PLUS
4898 && (tem = subst_indexed_address (op0)) != op0)
4900 else if (GET_CODE (op1) == PLUS
4901 && (tem = subst_indexed_address (op1)) != op1)
4906 /* Pick out up to three things to add. */
4907 if (GET_CODE (op1) == PLUS)
4908 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
4909 else if (GET_CODE (op0) == PLUS)
4910 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4912 /* Compute the sum. */
4914 op1 = form_sum (op1, op2);
4916 op0 = form_sum (op0, op1);
4923 /* Record the pseudo registers we must reload into hard registers in a
4924 subexpression of a would-be memory address, X referring to a value
4925 in mode MODE. (This function is not called if the address we find
4928 CONTEXT = 1 means we are considering regs as index regs,
4929 = 0 means we are considering them as base regs.
4931 OPNUM and TYPE specify the purpose of any reloads made.
4933 IND_LEVELS says how many levels of indirect addressing are
4934 supported at this point in the address.
4936 INSN, if nonzero, is the insn in which we do the reload. It is used
4937 to determine if we may generate output reloads.
4939 We return nonzero if X, as a whole, is reloaded or replaced. */
4941 /* Note that we take shortcuts assuming that no multi-reg machine mode
4942 occurs as part of an address.
4943 Also, this is not fully machine-customizable; it works for machines
4944 such as vaxes and 68000's and 32000's, but other possible machines
4945 could have addressing modes that this does not handle right. */
4948 find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
4949 enum machine_mode mode;
4954 enum reload_type type;
4958 register RTX_CODE code = GET_CODE (x);
4964 register rtx orig_op0 = XEXP (x, 0);
4965 register rtx orig_op1 = XEXP (x, 1);
4966 register RTX_CODE code0 = GET_CODE (orig_op0);
4967 register RTX_CODE code1 = GET_CODE (orig_op1);
4968 register rtx op0 = orig_op0;
4969 register rtx op1 = orig_op1;
4971 if (GET_CODE (op0) == SUBREG)
4973 op0 = SUBREG_REG (op0);
4974 code0 = GET_CODE (op0);
4975 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
4976 op0 = gen_rtx_REG (word_mode,
4977 REGNO (op0) + SUBREG_WORD (orig_op0));
4980 if (GET_CODE (op1) == SUBREG)
4982 op1 = SUBREG_REG (op1);
4983 code1 = GET_CODE (op1);
4984 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
4985 op1 = gen_rtx_REG (GET_MODE (op1),
4986 REGNO (op1) + SUBREG_WORD (orig_op1));
4989 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
4990 || code0 == ZERO_EXTEND || code1 == MEM)
4992 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
4993 type, ind_levels, insn);
4994 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
4995 type, ind_levels, insn);
4998 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
4999 || code1 == ZERO_EXTEND || code0 == MEM)
5001 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5002 type, ind_levels, insn);
5003 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5004 type, ind_levels, insn);
5007 else if (code0 == CONST_INT || code0 == CONST
5008 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5009 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5010 type, ind_levels, insn);
5012 else if (code1 == CONST_INT || code1 == CONST
5013 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5014 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5015 type, ind_levels, insn);
5017 else if (code0 == REG && code1 == REG)
5019 if (REG_OK_FOR_INDEX_P (op0)
5020 && REG_MODE_OK_FOR_BASE_P (op1, mode))
5022 else if (REG_OK_FOR_INDEX_P (op1)
5023 && REG_MODE_OK_FOR_BASE_P (op0, mode))
5025 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5026 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5027 type, ind_levels, insn);
5028 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5029 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5030 type, ind_levels, insn);
5031 else if (REG_OK_FOR_INDEX_P (op1))
5032 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5033 type, ind_levels, insn);
5034 else if (REG_OK_FOR_INDEX_P (op0))
5035 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5036 type, ind_levels, insn);
5039 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5040 type, ind_levels, insn);
5041 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5042 type, ind_levels, insn);
5046 else if (code0 == REG)
5048 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5049 type, ind_levels, insn);
5050 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5051 type, ind_levels, insn);
5054 else if (code1 == REG)
5056 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5057 type, ind_levels, insn);
5058 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5059 type, ind_levels, insn);
5069 if (GET_CODE (XEXP (x, 0)) == REG)
5071 register int regno = REGNO (XEXP (x, 0));
5075 /* A register that is incremented cannot be constant! */
5076 if (regno >= FIRST_PSEUDO_REGISTER
5077 && reg_equiv_constant[regno] != 0)
5080 /* Handle a register that is equivalent to a memory location
5081 which cannot be addressed directly. */
5082 if (reg_equiv_memory_loc[regno] != 0
5083 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5085 rtx tem = make_memloc (XEXP (x, 0), regno);
5086 if (reg_equiv_address[regno]
5087 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5089 /* First reload the memory location's address.
5090 We can't use ADDR_TYPE (type) here, because we need to
5091 write back the value after reading it, hence we actually
5092 need two registers. */
5093 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5094 &XEXP (tem, 0), opnum, type,
5096 /* Put this inside a new increment-expression. */
5097 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5098 /* Proceed to reload that, as if it contained a register. */
5102 /* If we have a hard register that is ok as an index,
5103 don't make a reload. If an autoincrement of a nice register
5104 isn't "valid", it must be that no autoincrement is "valid".
5105 If that is true and something made an autoincrement anyway,
5106 this must be a special context where one is allowed.
5107 (For example, a "push" instruction.)
5108 We can't improve this address, so leave it alone. */
5110 /* Otherwise, reload the autoincrement into a suitable hard reg
5111 and record how much to increment by. */
5113 if (reg_renumber[regno] >= 0)
5114 regno = reg_renumber[regno];
5115 if ((regno >= FIRST_PSEUDO_REGISTER
5116 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5117 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5124 /* If we can output the register afterwards, do so, this
5125 saves the extra update.
5126 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5127 CALL_INSN - and it does not set CC0.
5128 But don't do this if we cannot directly address the
5129 memory location, since this will make it harder to
5130 reuse address reloads, and increases register pressure.
5131 Also don't do this if we can probably update x directly. */
5132 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM
5134 : reg_equiv_mem[regno]);
5135 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5136 if (insn && GET_CODE (insn) == INSN && equiv
5137 && memory_operand (equiv, GET_MODE (equiv))
5139 && ! sets_cc0_p (PATTERN (insn))
5141 && ! (icode != CODE_FOR_nothing
5142 && ((*insn_data[icode].operand[0].predicate)
5144 && ((*insn_data[icode].operand[1].predicate)
5150 = push_reload (x, x, loc, loc,
5151 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5152 GET_MODE (x), GET_MODE (x), 0, 0,
5153 opnum, RELOAD_OTHER);
5155 /* If we created a new MEM based on reg_equiv_mem[REGNO], then
5156 LOC above is part of the new MEM, not the MEM in INSN.
5158 We must also replace the address of the MEM in INSN. */
5159 if (&XEXP (x_orig, 0) != loc)
5160 push_replacement (&XEXP (x_orig, 0), reloadnum, VOIDmode);
5166 = push_reload (x, NULL_RTX, loc, NULL_PTR,
5167 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5168 GET_MODE (x), GET_MODE (x), 0, 0,
5171 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5177 /* Update the REG_INC notes. */
5179 for (link = REG_NOTES (this_insn);
5180 link; link = XEXP (link, 1))
5181 if (REG_NOTE_KIND (link) == REG_INC
5182 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
5183 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5189 else if (GET_CODE (XEXP (x, 0)) == MEM)
5191 /* This is probably the result of a substitution, by eliminate_regs,
5192 of an equivalent address for a pseudo that was not allocated to a
5193 hard register. Verify that the specified address is valid and
5194 reload it into a register. */
5195 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5196 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5200 /* Since we know we are going to reload this item, don't decrement
5201 for the indirection level.
5203 Note that this is actually conservative: it would be slightly
5204 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5206 /* We can't use ADDR_TYPE (type) here, because we need to
5207 write back the value after reading it, hence we actually
5208 need two registers. */
5209 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5210 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5211 opnum, type, ind_levels, insn);
5213 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
5214 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5215 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5217 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5219 link = FIND_REG_INC_NOTE (this_insn, tem);
5221 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5228 /* This is probably the result of a substitution, by eliminate_regs, of
5229 an equivalent address for a pseudo that was not allocated to a hard
5230 register. Verify that the specified address is valid and reload it
5233 Since we know we are going to reload this item, don't decrement for
5234 the indirection level.
5236 Note that this is actually conservative: it would be slightly more
5237 efficient to use the value of SPILL_INDIRECT_LEVELS from
5240 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5241 opnum, ADDR_TYPE (type), ind_levels, insn);
5242 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
5243 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5244 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5249 register int regno = REGNO (x);
5251 if (reg_equiv_constant[regno] != 0)
5253 find_reloads_address_part (reg_equiv_constant[regno], loc,
5254 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5255 GET_MODE (x), opnum, type, ind_levels);
5259 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5260 that feeds this insn. */
5261 if (reg_equiv_mem[regno] != 0)
5263 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
5264 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5265 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5270 if (reg_equiv_memory_loc[regno]
5271 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5273 rtx tem = make_memloc (x, regno);
5274 if (reg_equiv_address[regno] != 0
5275 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5278 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5279 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5284 if (reg_renumber[regno] >= 0)
5285 regno = reg_renumber[regno];
5287 if ((regno >= FIRST_PSEUDO_REGISTER
5288 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5289 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5291 push_reload (x, NULL_RTX, loc, NULL_PTR,
5292 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5293 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5297 /* If a register appearing in an address is the subject of a CLOBBER
5298 in this insn, reload it into some other register to be safe.
5299 The CLOBBER is supposed to make the register unavailable
5300 from before this insn to after it. */
5301 if (regno_clobbered_p (regno, this_insn))
5303 push_reload (x, NULL_RTX, loc, NULL_PTR,
5304 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5305 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5312 if (GET_CODE (SUBREG_REG (x)) == REG)
5314 /* If this is a SUBREG of a hard register and the resulting register
5315 is of the wrong class, reload the whole SUBREG. This avoids
5316 needless copies if SUBREG_REG is multi-word. */
5317 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5319 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5321 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5322 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5324 push_reload (x, NULL_RTX, loc, NULL_PTR,
5325 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5326 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5330 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5331 is larger than the class size, then reload the whole SUBREG. */
5334 enum reg_class class = (context ? INDEX_REG_CLASS
5336 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5337 > reg_class_size[class])
5339 x = find_reloads_subreg_address (x, 0, opnum, type,
5341 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5342 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5354 register const char *fmt = GET_RTX_FORMAT (code);
5357 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5360 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5361 opnum, type, ind_levels, insn);
5368 /* X, which is found at *LOC, is a part of an address that needs to be
5369 reloaded into a register of class CLASS. If X is a constant, or if
5370 X is a PLUS that contains a constant, check that the constant is a
5371 legitimate operand and that we are supposed to be able to load
5372 it into the register.
5374 If not, force the constant into memory and reload the MEM instead.
5376 MODE is the mode to use, in case X is an integer constant.
5378 OPNUM and TYPE describe the purpose of any reloads made.
5380 IND_LEVELS says how many levels of indirect addressing this machine
5384 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
5387 enum reg_class class;
5388 enum machine_mode mode;
5390 enum reload_type type;
5394 && (! LEGITIMATE_CONSTANT_P (x)
5395 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5399 /* If this is a CONST_INT, it could have been created by a
5400 plus_constant call in eliminate_regs, which means it may be
5401 on the reload_obstack. reload_obstack will be freed later, so
5402 we can't allow such RTL to be put in the constant pool. There
5403 is code in force_const_mem to check for this case, but it doesn't
5404 work because we have already popped off the reload_obstack, so
5405 rtl_obstack == saveable_obstack is true at this point. */
5406 if (GET_CODE (x) == CONST_INT)
5407 tem = x = force_const_mem (mode, GEN_INT (INTVAL (x)));
5409 tem = x = force_const_mem (mode, x);
5411 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5412 opnum, type, ind_levels, 0);
5415 else if (GET_CODE (x) == PLUS
5416 && CONSTANT_P (XEXP (x, 1))
5417 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5418 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5422 /* See comment above. */
5423 if (GET_CODE (XEXP (x, 1)) == CONST_INT)
5424 tem = force_const_mem (GET_MODE (x), GEN_INT (INTVAL (XEXP (x, 1))));
5426 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5428 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5429 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5430 opnum, type, ind_levels, 0);
5433 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5434 mode, VOIDmode, 0, 0, opnum, type);
5437 /* X, a subreg of a pseudo, is a part of an address that needs to be
5440 If the pseudo is equivalent to a memory location that cannot be directly
5441 addressed, make the necessary address reloads.
5443 If address reloads have been necessary, or if the address is changed
5444 by register elimination, return the rtx of the memory location;
5445 otherwise, return X.
5447 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5450 OPNUM and TYPE identify the purpose of the reload.
5452 IND_LEVELS says how many levels of indirect addressing are
5453 supported at this point in the address.
5455 INSN, if nonzero, is the insn in which we do the reload. It is used
5456 to determine where to put USEs for pseudos that we have to replace with
5460 find_reloads_subreg_address (x, force_replace, opnum, type,
5465 enum reload_type type;
5469 int regno = REGNO (SUBREG_REG (x));
5471 if (reg_equiv_memory_loc[regno])
5473 /* If the address is not directly addressable, or if the address is not
5474 offsettable, then it must be replaced. */
5476 && (reg_equiv_address[regno]
5477 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5480 if (force_replace || num_not_at_initial_offset)
5482 rtx tem = make_memloc (SUBREG_REG (x), regno);
5484 /* If the address changes because of register elimination, then
5485 it must be replaced. */
5487 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5489 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
5491 if (BYTES_BIG_ENDIAN)
5495 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5496 offset += MIN (size, UNITS_PER_WORD);
5497 size = GET_MODE_SIZE (GET_MODE (x));
5498 offset -= MIN (size, UNITS_PER_WORD);
5500 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5501 PUT_MODE (tem, GET_MODE (x));
5502 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5503 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
5505 /* If this is not a toplevel operand, find_reloads doesn't see
5506 this substitution. We have to emit a USE of the pseudo so
5507 that delete_output_reload can see it. */
5508 if (replace_reloads && recog_data.operand[opnum] != x)
5509 emit_insn_before (gen_rtx_USE (VOIDmode, SUBREG_REG (x)), insn);
5517 /* Substitute into the current INSN the registers into which we have reloaded
5518 the things that need reloading. The array `replacements'
5519 says contains the locations of all pointers that must be changed
5520 and says what to replace them with.
5522 Return the rtx that X translates into; usually X, but modified. */
5529 for (i = 0; i < n_replacements; i++)
5531 register struct replacement *r = &replacements[i];
5532 register rtx reloadreg = rld[r->what].reg_rtx;
5535 /* Encapsulate RELOADREG so its machine mode matches what
5536 used to be there. Note that gen_lowpart_common will
5537 do the wrong thing if RELOADREG is multi-word. RELOADREG
5538 will always be a REG here. */
5539 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5540 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5542 /* If we are putting this into a SUBREG and RELOADREG is a
5543 SUBREG, we would be making nested SUBREGs, so we have to fix
5544 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5546 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5548 if (GET_MODE (*r->subreg_loc)
5549 == GET_MODE (SUBREG_REG (reloadreg)))
5550 *r->subreg_loc = SUBREG_REG (reloadreg);
5553 *r->where = SUBREG_REG (reloadreg);
5554 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
5558 *r->where = reloadreg;
5560 /* If reload got no reg and isn't optional, something's wrong. */
5561 else if (! rld[r->what].optional)
5566 /* Make a copy of any replacements being done into X and move those copies
5567 to locations in Y, a copy of X. We only look at the highest level of
5571 copy_replacements (x, y)
5576 enum rtx_code code = GET_CODE (x);
5577 const char *fmt = GET_RTX_FORMAT (code);
5578 struct replacement *r;
5580 /* We can't support X being a SUBREG because we might then need to know its
5581 location if something inside it was replaced. */
5585 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5587 for (j = 0; j < n_replacements; j++)
5589 if (replacements[j].subreg_loc == &XEXP (x, i))
5591 r = &replacements[n_replacements++];
5592 r->where = replacements[j].where;
5593 r->subreg_loc = &XEXP (y, i);
5594 r->what = replacements[j].what;
5595 r->mode = replacements[j].mode;
5597 else if (replacements[j].where == &XEXP (x, i))
5599 r = &replacements[n_replacements++];
5600 r->where = &XEXP (y, i);
5602 r->what = replacements[j].what;
5603 r->mode = replacements[j].mode;
5608 /* Change any replacements being done to *X to be done to *Y */
5611 move_replacements (x, y)
5617 for (i = 0; i < n_replacements; i++)
5618 if (replacements[i].subreg_loc == x)
5619 replacements[i].subreg_loc = y;
5620 else if (replacements[i].where == x)
5622 replacements[i].where = y;
5623 replacements[i].subreg_loc = 0;
5627 /* If LOC was scheduled to be replaced by something, return the replacement.
5628 Otherwise, return *LOC. */
5631 find_replacement (loc)
5634 struct replacement *r;
5636 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
5638 rtx reloadreg = rld[r->what].reg_rtx;
5640 if (reloadreg && r->where == loc)
5642 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
5643 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5647 else if (reloadreg && r->subreg_loc == loc)
5649 /* RELOADREG must be either a REG or a SUBREG.
5651 ??? Is it actually still ever a SUBREG? If so, why? */
5653 if (GET_CODE (reloadreg) == REG)
5654 return gen_rtx_REG (GET_MODE (*loc),
5655 REGNO (reloadreg) + SUBREG_WORD (*loc));
5656 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
5659 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
5660 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
5664 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5665 what's inside and make a new rtl if so. */
5666 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
5667 || GET_CODE (*loc) == MULT)
5669 rtx x = find_replacement (&XEXP (*loc, 0));
5670 rtx y = find_replacement (&XEXP (*loc, 1));
5672 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
5673 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
5679 /* Return nonzero if register in range [REGNO, ENDREGNO)
5680 appears either explicitly or implicitly in X
5681 other than being stored into (except for earlyclobber operands).
5683 References contained within the substructure at LOC do not count.
5684 LOC may be zero, meaning don't ignore anything.
5686 This is similar to refers_to_regno_p in rtlanal.c except that we
5687 look at equivalences for pseudos that didn't get hard registers. */
5690 refers_to_regno_for_reload_p (regno, endregno, x, loc)
5691 int regno, endregno;
5696 register RTX_CODE code;
5697 register const char *fmt;
5703 code = GET_CODE (x);
5710 /* If this is a pseudo, a hard register must not have been allocated.
5711 X must therefore either be a constant or be in memory. */
5712 if (i >= FIRST_PSEUDO_REGISTER)
5714 if (reg_equiv_memory_loc[i])
5715 return refers_to_regno_for_reload_p (regno, endregno,
5716 reg_equiv_memory_loc[i],
5719 if (reg_equiv_constant[i])
5725 return (endregno > i
5726 && regno < i + (i < FIRST_PSEUDO_REGISTER
5727 ? HARD_REGNO_NREGS (i, GET_MODE (x))
5731 /* If this is a SUBREG of a hard reg, we can see exactly which
5732 registers are being modified. Otherwise, handle normally. */
5733 if (GET_CODE (SUBREG_REG (x)) == REG
5734 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5736 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5738 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
5739 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5741 return endregno > inner_regno && regno < inner_endregno;
5747 if (&SET_DEST (x) != loc
5748 /* Note setting a SUBREG counts as referring to the REG it is in for
5749 a pseudo but not for hard registers since we can
5750 treat each word individually. */
5751 && ((GET_CODE (SET_DEST (x)) == SUBREG
5752 && loc != &SUBREG_REG (SET_DEST (x))
5753 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
5754 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
5755 && refers_to_regno_for_reload_p (regno, endregno,
5756 SUBREG_REG (SET_DEST (x)),
5758 /* If the output is an earlyclobber operand, this is
5760 || ((GET_CODE (SET_DEST (x)) != REG
5761 || earlyclobber_operand_p (SET_DEST (x)))
5762 && refers_to_regno_for_reload_p (regno, endregno,
5763 SET_DEST (x), loc))))
5766 if (code == CLOBBER || loc == &SET_SRC (x))
5775 /* X does not match, so try its subexpressions. */
5777 fmt = GET_RTX_FORMAT (code);
5778 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5780 if (fmt[i] == 'e' && loc != &XEXP (x, i))
5788 if (refers_to_regno_for_reload_p (regno, endregno,
5792 else if (fmt[i] == 'E')
5795 for (j = XVECLEN (x, i) - 1; j >=0; j--)
5796 if (loc != &XVECEXP (x, i, j)
5797 && refers_to_regno_for_reload_p (regno, endregno,
5798 XVECEXP (x, i, j), loc))
5805 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5806 we check if any register number in X conflicts with the relevant register
5807 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5808 contains a MEM (we don't bother checking for memory addresses that can't
5809 conflict because we expect this to be a rare case.
5811 This function is similar to reg_overlap_mention_p in rtlanal.c except
5812 that we look at equivalences for pseudos that didn't get hard registers. */
5815 reg_overlap_mentioned_for_reload_p (x, in)
5818 int regno, endregno;
5820 /* Overly conservative. */
5821 if (GET_CODE (x) == STRICT_LOW_PART)
5824 /* If either argument is a constant, then modifying X can not affect IN. */
5825 if (CONSTANT_P (x) || CONSTANT_P (in))
5827 else if (GET_CODE (x) == SUBREG)
5829 regno = REGNO (SUBREG_REG (x));
5830 if (regno < FIRST_PSEUDO_REGISTER)
5831 regno += SUBREG_WORD (x);
5833 else if (GET_CODE (x) == REG)
5837 /* If this is a pseudo, it must not have been assigned a hard register.
5838 Therefore, it must either be in memory or be a constant. */
5840 if (regno >= FIRST_PSEUDO_REGISTER)
5842 if (reg_equiv_memory_loc[regno])
5843 return refers_to_mem_for_reload_p (in);
5844 else if (reg_equiv_constant[regno])
5849 else if (GET_CODE (x) == MEM)
5850 return refers_to_mem_for_reload_p (in);
5851 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
5852 || GET_CODE (x) == CC0)
5853 return reg_mentioned_p (x, in);
5857 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
5858 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5860 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
5863 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5867 refers_to_mem_for_reload_p (x)
5873 if (GET_CODE (x) == MEM)
5876 if (GET_CODE (x) == REG)
5877 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
5878 && reg_equiv_memory_loc[REGNO (x)]);
5880 fmt = GET_RTX_FORMAT (GET_CODE (x));
5881 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
5883 && (GET_CODE (XEXP (x, i)) == MEM
5884 || refers_to_mem_for_reload_p (XEXP (x, i))))
5890 /* Check the insns before INSN to see if there is a suitable register
5891 containing the same value as GOAL.
5892 If OTHER is -1, look for a register in class CLASS.
5893 Otherwise, just see if register number OTHER shares GOAL's value.
5895 Return an rtx for the register found, or zero if none is found.
5897 If RELOAD_REG_P is (short *)1,
5898 we reject any hard reg that appears in reload_reg_rtx
5899 because such a hard reg is also needed coming into this insn.
5901 If RELOAD_REG_P is any other nonzero value,
5902 it is a vector indexed by hard reg number
5903 and we reject any hard reg whose element in the vector is nonnegative
5904 as well as any that appears in reload_reg_rtx.
5906 If GOAL is zero, then GOALREG is a register number; we look
5907 for an equivalent for that register.
5909 MODE is the machine mode of the value we want an equivalence for.
5910 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5912 This function is used by jump.c as well as in the reload pass.
5914 If GOAL is the sum of the stack pointer and a constant, we treat it
5915 as if it were a constant except that sp is required to be unchanging. */
5918 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
5921 enum reg_class class;
5923 short *reload_reg_p;
5925 enum machine_mode mode;
5927 register rtx p = insn;
5928 rtx goaltry, valtry, value, where;
5930 register int regno = -1;
5934 int goal_mem_addr_varies = 0;
5935 int need_stable_sp = 0;
5941 else if (GET_CODE (goal) == REG)
5942 regno = REGNO (goal);
5943 else if (GET_CODE (goal) == MEM)
5945 enum rtx_code code = GET_CODE (XEXP (goal, 0));
5946 if (MEM_VOLATILE_P (goal))
5948 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
5950 /* An address with side effects must be reexecuted. */
5963 else if (CONSTANT_P (goal))
5965 else if (GET_CODE (goal) == PLUS
5966 && XEXP (goal, 0) == stack_pointer_rtx
5967 && CONSTANT_P (XEXP (goal, 1)))
5968 goal_const = need_stable_sp = 1;
5969 else if (GET_CODE (goal) == PLUS
5970 && XEXP (goal, 0) == frame_pointer_rtx
5971 && CONSTANT_P (XEXP (goal, 1)))
5976 /* Scan insns back from INSN, looking for one that copies
5977 a value into or out of GOAL.
5978 Stop and give up if we reach a label. */
5983 if (p == 0 || GET_CODE (p) == CODE_LABEL)
5985 if (GET_CODE (p) == INSN
5986 /* If we don't want spill regs ... */
5987 && (! (reload_reg_p != 0
5988 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
5989 /* ... then ignore insns introduced by reload; they aren't useful
5990 and can cause results in reload_as_needed to be different
5991 from what they were when calculating the need for spills.
5992 If we notice an input-reload insn here, we will reject it below,
5993 but it might hide a usable equivalent. That makes bad code.
5994 It may even abort: perhaps no reg was spilled for this insn
5995 because it was assumed we would find that equivalent. */
5996 || INSN_UID (p) < reload_first_uid))
5999 pat = single_set (p);
6000 /* First check for something that sets some reg equal to GOAL. */
6003 && true_regnum (SET_SRC (pat)) == regno
6004 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6007 && true_regnum (SET_DEST (pat)) == regno
6008 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6010 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6011 /* When looking for stack pointer + const,
6012 make sure we don't use a stack adjust. */
6013 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6014 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6016 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6017 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6019 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6020 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6021 /* If we are looking for a constant,
6022 and something equivalent to that constant was copied
6023 into a reg, we can use that reg. */
6024 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6026 && rtx_equal_p (XEXP (tem, 0), goal)
6027 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6028 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6030 && GET_CODE (SET_DEST (pat)) == REG
6031 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6032 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
6033 && GET_CODE (goal) == CONST_INT
6034 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
6036 && rtx_equal_p (goal, goaltry)
6037 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
6039 && (valueno = true_regnum (valtry)) >= 0)
6040 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6042 && GET_CODE (SET_DEST (pat)) == REG
6043 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6044 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
6045 && GET_CODE (goal) == CONST_INT
6046 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6048 && rtx_equal_p (goal, goaltry)
6050 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6051 && (valueno = true_regnum (valtry)) >= 0)))
6054 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
6055 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6065 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6066 (or copying VALUE into GOAL, if GOAL is also a register).
6067 Now verify that VALUE is really valid. */
6069 /* VALUENO is the register number of VALUE; a hard register. */
6071 /* Don't try to re-use something that is killed in this insn. We want
6072 to be able to trust REG_UNUSED notes. */
6073 if (find_reg_note (where, REG_UNUSED, value))
6076 /* If we propose to get the value from the stack pointer or if GOAL is
6077 a MEM based on the stack pointer, we need a stable SP. */
6078 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6079 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6083 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6084 if (GET_MODE (value) != mode)
6087 /* Reject VALUE if it was loaded from GOAL
6088 and is also a register that appears in the address of GOAL. */
6090 if (goal_mem && value == SET_DEST (single_set (where))
6091 && refers_to_regno_for_reload_p (valueno,
6093 + HARD_REGNO_NREGS (valueno, mode)),
6097 /* Reject registers that overlap GOAL. */
6099 if (!goal_mem && !goal_const
6100 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
6101 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
6104 /* Reject VALUE if it is one of the regs reserved for reloads.
6105 Reload1 knows how to reuse them anyway, and it would get
6106 confused if we allocated one without its knowledge.
6107 (Now that insns introduced by reload are ignored above,
6108 this case shouldn't happen, but I'm not positive.) */
6110 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
6111 && reload_reg_p[valueno] >= 0)
6114 nregs = HARD_REGNO_NREGS (regno, mode);
6115 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6117 /* Reject VALUE if it is a register being used for an input reload
6118 even if it is not one of those reserved. */
6120 if (reload_reg_p != 0)
6123 for (i = 0; i < n_reloads; i++)
6124 if (rld[i].reg_rtx != 0 && rld[i].in)
6126 int regno1 = REGNO (rld[i].reg_rtx);
6127 int nregs1 = HARD_REGNO_NREGS (regno1,
6128 GET_MODE (rld[i].reg_rtx));
6129 if (regno1 < valueno + valuenregs
6130 && regno1 + nregs1 > valueno)
6136 /* We must treat frame pointer as varying here,
6137 since it can vary--in a nonlocal goto as generated by expand_goto. */
6138 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6140 /* Now verify that the values of GOAL and VALUE remain unaltered
6141 until INSN is reached. */
6150 /* Don't trust the conversion past a function call
6151 if either of the two is in a call-clobbered register, or memory. */
6152 if (GET_CODE (p) == CALL_INSN
6153 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6154 && call_used_regs[regno])
6156 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
6157 && call_used_regs[valueno])
6163 #ifdef NON_SAVING_SETJMP
6164 if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE
6165 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6169 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
6173 /* Watch out for unspec_volatile, and volatile asms. */
6174 if (volatile_insn_p (pat))
6177 /* If this insn P stores in either GOAL or VALUE, return 0.
6178 If GOAL is a memory ref and this insn writes memory, return 0.
6179 If GOAL is a memory ref and its address is not constant,
6180 and this insn P changes a register used in GOAL, return 0. */
6182 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6184 register rtx dest = SET_DEST (pat);
6185 while (GET_CODE (dest) == SUBREG
6186 || GET_CODE (dest) == ZERO_EXTRACT
6187 || GET_CODE (dest) == SIGN_EXTRACT
6188 || GET_CODE (dest) == STRICT_LOW_PART)
6189 dest = XEXP (dest, 0);
6190 if (GET_CODE (dest) == REG)
6192 register int xregno = REGNO (dest);
6194 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6195 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6198 if (xregno < regno + nregs && xregno + xnregs > regno)
6200 if (xregno < valueno + valuenregs
6201 && xregno + xnregs > valueno)
6203 if (goal_mem_addr_varies
6204 && reg_overlap_mentioned_for_reload_p (dest, goal))
6206 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6209 else if (goal_mem && GET_CODE (dest) == MEM
6210 && ! push_operand (dest, GET_MODE (dest)))
6212 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6213 && reg_equiv_memory_loc[regno] != 0)
6215 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6218 else if (GET_CODE (pat) == PARALLEL)
6221 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6223 register rtx v1 = XVECEXP (pat, 0, i);
6224 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6226 register rtx dest = SET_DEST (v1);
6227 while (GET_CODE (dest) == SUBREG
6228 || GET_CODE (dest) == ZERO_EXTRACT
6229 || GET_CODE (dest) == SIGN_EXTRACT
6230 || GET_CODE (dest) == STRICT_LOW_PART)
6231 dest = XEXP (dest, 0);
6232 if (GET_CODE (dest) == REG)
6234 register int xregno = REGNO (dest);
6236 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6237 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6240 if (xregno < regno + nregs
6241 && xregno + xnregs > regno)
6243 if (xregno < valueno + valuenregs
6244 && xregno + xnregs > valueno)
6246 if (goal_mem_addr_varies
6247 && reg_overlap_mentioned_for_reload_p (dest,
6250 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6253 else if (goal_mem && GET_CODE (dest) == MEM
6254 && ! push_operand (dest, GET_MODE (dest)))
6256 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6257 && reg_equiv_memory_loc[regno] != 0)
6259 else if (need_stable_sp
6260 && push_operand (dest, GET_MODE (dest)))
6266 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
6270 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6271 link = XEXP (link, 1))
6273 pat = XEXP (link, 0);
6274 if (GET_CODE (pat) == CLOBBER)
6276 register rtx dest = SET_DEST (pat);
6277 while (GET_CODE (dest) == SUBREG
6278 || GET_CODE (dest) == ZERO_EXTRACT
6279 || GET_CODE (dest) == SIGN_EXTRACT
6280 || GET_CODE (dest) == STRICT_LOW_PART)
6281 dest = XEXP (dest, 0);
6282 if (GET_CODE (dest) == REG)
6284 register int xregno = REGNO (dest);
6286 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6287 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6290 if (xregno < regno + nregs
6291 && xregno + xnregs > regno)
6293 if (xregno < valueno + valuenregs
6294 && xregno + xnregs > valueno)
6296 if (goal_mem_addr_varies
6297 && reg_overlap_mentioned_for_reload_p (dest,
6301 else if (goal_mem && GET_CODE (dest) == MEM
6302 && ! push_operand (dest, GET_MODE (dest)))
6304 else if (need_stable_sp
6305 && push_operand (dest, GET_MODE (dest)))
6312 /* If this insn auto-increments or auto-decrements
6313 either regno or valueno, return 0 now.
6314 If GOAL is a memory ref and its address is not constant,
6315 and this insn P increments a register used in GOAL, return 0. */
6319 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6320 if (REG_NOTE_KIND (link) == REG_INC
6321 && GET_CODE (XEXP (link, 0)) == REG)
6323 register int incno = REGNO (XEXP (link, 0));
6324 if (incno < regno + nregs && incno >= regno)
6326 if (incno < valueno + valuenregs && incno >= valueno)
6328 if (goal_mem_addr_varies
6329 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6339 /* Find a place where INCED appears in an increment or decrement operator
6340 within X, and return the amount INCED is incremented or decremented by.
6341 The value is always positive. */
6344 find_inc_amount (x, inced)
6347 register enum rtx_code code = GET_CODE (x);
6348 register const char *fmt;
6353 register rtx addr = XEXP (x, 0);
6354 if ((GET_CODE (addr) == PRE_DEC
6355 || GET_CODE (addr) == POST_DEC
6356 || GET_CODE (addr) == PRE_INC
6357 || GET_CODE (addr) == POST_INC)
6358 && XEXP (addr, 0) == inced)
6359 return GET_MODE_SIZE (GET_MODE (x));
6362 fmt = GET_RTX_FORMAT (code);
6363 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6367 register int tem = find_inc_amount (XEXP (x, i), inced);
6374 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6376 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6386 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6389 regno_clobbered_p (regno, insn)
6393 if (GET_CODE (PATTERN (insn)) == CLOBBER
6394 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6395 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
6397 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6399 int i = XVECLEN (PATTERN (insn), 0) - 1;
6403 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6404 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
6405 && REGNO (XEXP (elt, 0)) == regno)
6413 static const char *reload_when_needed_name[] =
6416 "RELOAD_FOR_OUTPUT",
6418 "RELOAD_FOR_INPUT_ADDRESS",
6419 "RELOAD_FOR_INPADDR_ADDRESS",
6420 "RELOAD_FOR_OUTPUT_ADDRESS",
6421 "RELOAD_FOR_OUTADDR_ADDRESS",
6422 "RELOAD_FOR_OPERAND_ADDRESS",
6423 "RELOAD_FOR_OPADDR_ADDR",
6425 "RELOAD_FOR_OTHER_ADDRESS"
6428 static const char * const reg_class_names[] = REG_CLASS_NAMES;
6430 /* These functions are used to print the variables set by 'find_reloads' */
6433 debug_reload_to_stream (f)
6441 for (r = 0; r < n_reloads; r++)
6443 fprintf (f, "Reload %d: ", r);
6447 fprintf (f, "reload_in (%s) = ",
6448 GET_MODE_NAME (rld[r].inmode));
6449 print_inline_rtx (f, rld[r].in, 24);
6450 fprintf (f, "\n\t");
6453 if (rld[r].out != 0)
6455 fprintf (f, "reload_out (%s) = ",
6456 GET_MODE_NAME (rld[r].outmode));
6457 print_inline_rtx (f, rld[r].out, 24);
6458 fprintf (f, "\n\t");
6461 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
6463 fprintf (f, "%s (opnum = %d)",
6464 reload_when_needed_name[(int) rld[r].when_needed],
6467 if (rld[r].optional)
6468 fprintf (f, ", optional");
6470 if (rld[r].nongroup)
6471 fprintf (stderr, ", nongroup");
6473 if (rld[r].inc != 0)
6474 fprintf (f, ", inc by %d", rld[r].inc);
6476 if (rld[r].nocombine)
6477 fprintf (f, ", can't combine");
6479 if (rld[r].secondary_p)
6480 fprintf (f, ", secondary_reload_p");
6482 if (rld[r].in_reg != 0)
6484 fprintf (f, "\n\treload_in_reg: ");
6485 print_inline_rtx (f, rld[r].in_reg, 24);
6488 if (rld[r].out_reg != 0)
6490 fprintf (f, "\n\treload_out_reg: ");
6491 print_inline_rtx (f, rld[r].out_reg, 24);
6494 if (rld[r].reg_rtx != 0)
6496 fprintf (f, "\n\treload_reg_rtx: ");
6497 print_inline_rtx (f, rld[r].reg_rtx, 24);
6501 if (rld[r].secondary_in_reload != -1)
6503 fprintf (f, "%ssecondary_in_reload = %d",
6504 prefix, rld[r].secondary_in_reload);
6508 if (rld[r].secondary_out_reload != -1)
6509 fprintf (f, "%ssecondary_out_reload = %d\n",
6510 prefix, rld[r].secondary_out_reload);
6513 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
6515 fprintf (stderr, "%ssecondary_in_icode = %s", prefix,
6516 insn_data[rld[r].secondary_in_icode].name);
6520 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
6521 fprintf (stderr, "%ssecondary_out_icode = %s", prefix,
6522 insn_data[rld[r].secondary_out_icode].name);
6531 debug_reload_to_stream (stderr);