1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92, 93, 94, 1995 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This file contains subroutines used only from the file reload1.c.
22 It knows how to scan one insn for operands and values
23 that need to be copied into registers to make valid code.
24 It also finds other operands and values which are valid
25 but for which equivalent values in registers exist and
26 ought to be used instead.
28 Before processing the first insn of the function, call `init_reload'.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
92 #include "insn-config.h"
93 #include "insn-codes.h"
97 #include "hard-reg-set.h"
101 #ifndef REGISTER_MOVE_COST
102 #define REGISTER_MOVE_COST(x, y) 2
105 /* The variables set up by `find_reloads' are:
107 n_reloads number of distinct reloads needed; max reload # + 1
108 tables indexed by reload number
109 reload_in rtx for value to reload from
110 reload_out rtx for where to store reload-reg afterward if nec
111 (often the same as reload_in)
112 reload_reg_class enum reg_class, saying what regs to reload into
113 reload_inmode enum machine_mode; mode this operand should have
114 when reloaded, on input.
115 reload_outmode enum machine_mode; mode this operand should have
116 when reloaded, on output.
117 reload_optional char, nonzero for an optional reload.
118 Optional reloads are ignored unless the
119 value is already sitting in a register.
120 reload_inc int, positive amount to increment or decrement by if
121 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
122 Ignored otherwise (don't assume it is zero).
123 reload_in_reg rtx. A reg for which reload_in is the equivalent.
124 If reload_in is a symbol_ref which came from
125 reg_equiv_constant, then this is the pseudo
126 which has that symbol_ref as equivalent.
127 reload_reg_rtx rtx. This is the register to reload into.
128 If it is zero when `find_reloads' returns,
129 you must find a suitable register in the class
130 specified by reload_reg_class, and store here
131 an rtx for that register with mode from
132 reload_inmode or reload_outmode.
133 reload_nocombine char, nonzero if this reload shouldn't be
134 combined with another reload.
135 reload_opnum int, operand number being reloaded. This is
136 used to group related reloads and need not always
137 be equal to the actual operand number in the insn,
138 though it current will be; for in-out operands, it
139 is one of the two operand numbers.
140 reload_when_needed enum, classifies reload as needed either for
141 addressing an input reload, addressing an output,
142 for addressing a non-reloaded mem ref,
143 or for unspecified purposes (i.e., more than one
145 reload_secondary_p int, 1 if this is a secondary register for one
147 reload_secondary_in_reload
148 reload_secondary_out_reload
149 int, gives the reload number of a secondary
150 reload, when needed; otherwise -1
151 reload_secondary_in_icode
152 reload_secondary_out_icode
153 enum insn_code, if a secondary reload is required,
154 gives the INSN_CODE that uses the secondary
155 reload as a scratch register, or CODE_FOR_nothing
156 if the secondary reload register is to be an
157 intermediate register. */
160 rtx reload_in[MAX_RELOADS];
161 rtx reload_out[MAX_RELOADS];
162 enum reg_class reload_reg_class[MAX_RELOADS];
163 enum machine_mode reload_inmode[MAX_RELOADS];
164 enum machine_mode reload_outmode[MAX_RELOADS];
165 rtx reload_reg_rtx[MAX_RELOADS];
166 char reload_optional[MAX_RELOADS];
167 int reload_inc[MAX_RELOADS];
168 rtx reload_in_reg[MAX_RELOADS];
169 char reload_nocombine[MAX_RELOADS];
170 int reload_opnum[MAX_RELOADS];
171 enum reload_type reload_when_needed[MAX_RELOADS];
172 int reload_secondary_p[MAX_RELOADS];
173 int reload_secondary_in_reload[MAX_RELOADS];
174 int reload_secondary_out_reload[MAX_RELOADS];
175 enum insn_code reload_secondary_in_icode[MAX_RELOADS];
176 enum insn_code reload_secondary_out_icode[MAX_RELOADS];
178 /* All the "earlyclobber" operands of the current insn
179 are recorded here. */
181 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
183 int reload_n_operands;
185 /* Replacing reloads.
187 If `replace_reloads' is nonzero, then as each reload is recorded
188 an entry is made for it in the table `replacements'.
189 Then later `subst_reloads' can look through that table and
190 perform all the replacements needed. */
192 /* Nonzero means record the places to replace. */
193 static int replace_reloads;
195 /* Each replacement is recorded with a structure like this. */
198 rtx *where; /* Location to store in */
199 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
200 a SUBREG; 0 otherwise. */
201 int what; /* which reload this is for */
202 enum machine_mode mode; /* mode it must have */
205 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
207 /* Number of replacements currently recorded. */
208 static int n_replacements;
210 /* Used to track what is modified by an operand. */
213 int reg_flag; /* Nonzero if referencing a register. */
214 int safe; /* Nonzero if this can't conflict with anything. */
215 rtx base; /* Base adddress for MEM. */
216 HOST_WIDE_INT start; /* Starting offset or register number. */
217 HOST_WIDE_INT end; /* Endinf offset or register number. */
220 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
221 (see reg_equiv_address). */
222 static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
223 static int n_memlocs;
225 #ifdef SECONDARY_MEMORY_NEEDED
227 /* Save MEMs needed to copy from one class of registers to another. One MEM
228 is used per mode, but normally only one or two modes are ever used.
230 We keep two versions, before and after register elimination. The one
231 after register elimination is record separately for each operand. This
232 is done in case the address is not valid to be sure that we separately
235 static rtx secondary_memlocs[NUM_MACHINE_MODES];
236 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
239 /* The instruction we are doing reloads for;
240 so we can test whether a register dies in it. */
241 static rtx this_insn;
243 /* Nonzero if this instruction is a user-specified asm with operands. */
244 static int this_insn_is_asm;
246 /* If hard_regs_live_known is nonzero,
247 we can tell which hard regs are currently live,
248 at least enough to succeed in choosing dummy reloads. */
249 static int hard_regs_live_known;
251 /* Indexed by hard reg number,
252 element is nonegative if hard reg has been spilled.
253 This vector is passed to `find_reloads' as an argument
254 and is not changed here. */
255 static short *static_reload_reg_p;
257 /* Set to 1 in subst_reg_equivs if it changes anything. */
258 static int subst_reg_equivs_changed;
260 /* On return from push_reload, holds the reload-number for the OUT
261 operand, which can be different for that from the input operand. */
262 static int output_reloadnum;
264 /* Compare two RTX's. */
265 #define MATCHES(x, y) \
266 (x == y || (x != 0 && (GET_CODE (x) == REG \
267 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
268 : rtx_equal_p (x, y) && ! side_effects_p (x))))
270 /* Indicates if two reloads purposes are for similar enough things that we
271 can merge their reloads. */
272 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
273 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
274 || ((when1) == (when2) && (op1) == (op2)) \
275 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
276 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
277 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
278 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
279 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
281 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
282 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
283 ((when1) != (when2) \
284 || ! ((op1) == (op2) \
285 || (when1) == RELOAD_FOR_INPUT \
286 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
287 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
289 static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class,
290 enum machine_mode, enum reload_type,
292 static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
293 enum machine_mode, enum machine_mode,
294 int, int, int, enum reload_type));
295 static void push_replacement PROTO((rtx *, int, enum machine_mode));
296 static void combine_reloads PROTO((void));
297 static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
298 enum machine_mode, enum machine_mode,
299 enum reg_class, int));
300 static int earlyclobber_operand_p PROTO((rtx));
301 static int hard_reg_set_here_p PROTO((int, int, rtx));
302 static struct decomposition decompose PROTO((rtx));
303 static int immune_p PROTO((rtx, rtx, struct decomposition));
304 static int alternative_allows_memconst PROTO((char *, int));
305 static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int));
306 static rtx make_memloc PROTO((rtx, int));
307 static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
308 int, enum reload_type, int));
309 static rtx subst_reg_equivs PROTO((rtx));
310 static rtx subst_indexed_address PROTO((rtx));
311 static int find_reloads_address_1 PROTO((rtx, int, rtx *, int,
312 enum reload_type,int));
313 static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
314 enum machine_mode, int,
315 enum reload_type, int));
316 static int find_inc_amount PROTO((rtx, rtx));
318 #ifdef HAVE_SECONDARY_RELOADS
320 /* Determine if any secondary reloads are needed for loading (if IN_P is
321 non-zero) or storing (if IN_P is zero) X to or from a reload register of
322 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
323 are needed, push them.
325 Return the reload number of the secondary reload we made, or -1 if
326 we didn't need one. *PICODE is set to the insn_code to use if we do
327 need a secondary reload. */
330 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
336 enum reg_class reload_class;
337 enum machine_mode reload_mode;
338 enum reload_type type;
339 enum insn_code *picode;
341 enum reg_class class = NO_REGS;
342 enum machine_mode mode = reload_mode;
343 enum insn_code icode = CODE_FOR_nothing;
344 enum reg_class t_class = NO_REGS;
345 enum machine_mode t_mode = VOIDmode;
346 enum insn_code t_icode = CODE_FOR_nothing;
347 enum reload_type secondary_type;
349 int s_reload, t_reload = -1;
351 if (type == RELOAD_FOR_INPUT_ADDRESS || type == RELOAD_FOR_OUTPUT_ADDRESS)
352 secondary_type = type;
354 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
356 *picode = CODE_FOR_nothing;
358 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
359 is still a pseudo-register by now, it *must* have an equivalent MEM
360 but we don't want to assume that), use that equivalent when seeing if
361 a secondary reload is needed since whether or not a reload is needed
362 might be sensitive to the form of the MEM. */
364 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
365 && reg_equiv_mem[REGNO (x)] != 0)
366 x = reg_equiv_mem[REGNO (x)];
368 #ifdef SECONDARY_INPUT_RELOAD_CLASS
370 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
373 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
375 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
378 /* If we don't need any secondary registers, done. */
379 if (class == NO_REGS)
382 /* Get a possible insn to use. If the predicate doesn't accept X, don't
385 icode = (in_p ? reload_in_optab[(int) reload_mode]
386 : reload_out_optab[(int) reload_mode]);
388 if (icode != CODE_FOR_nothing
389 && insn_operand_predicate[(int) icode][in_p]
390 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
391 icode = CODE_FOR_nothing;
393 /* If we will be using an insn, see if it can directly handle the reload
394 register we will be using. If it can, the secondary reload is for a
395 scratch register. If it can't, we will use the secondary reload for
396 an intermediate register and require a tertiary reload for the scratch
399 if (icode != CODE_FOR_nothing)
401 /* If IN_P is non-zero, the reload register will be the output in
402 operand 0. If IN_P is zero, the reload register will be the input
403 in operand 1. Outputs should have an initial "=", which we must
406 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
407 enum reg_class insn_class
408 = (insn_letter == 'r' ? GENERAL_REGS
409 : REG_CLASS_FROM_LETTER (insn_letter));
411 if (insn_class == NO_REGS
412 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
413 /* The scratch register's constraint must start with "=&". */
414 || insn_operand_constraint[(int) icode][2][0] != '='
415 || insn_operand_constraint[(int) icode][2][1] != '&')
418 if (reg_class_subset_p (reload_class, insn_class))
419 mode = insn_operand_mode[(int) icode][2];
422 char t_letter = insn_operand_constraint[(int) icode][2][2];
424 t_mode = insn_operand_mode[(int) icode][2];
425 t_class = (t_letter == 'r' ? GENERAL_REGS
426 : REG_CLASS_FROM_LETTER (t_letter));
428 icode = CODE_FOR_nothing;
432 /* This case isn't valid, so fail. Reload is allowed to use the same
433 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
434 in the case of a secondary register, we actually need two different
435 registers for correct code. We fail here to prevent the possibility of
436 silently generating incorrect code later.
438 The convention is that secondary input reloads are valid only if the
439 secondary_class is different from class. If you have such a case, you
440 can not use secondary reloads, you must work around the problem some
443 Allow this when MODE is not reload_mode and assume that the generated
444 code handles this case (it does on the Alpha, which is the only place
445 this currently happens). */
447 if (in_p && class == reload_class && mode == reload_mode)
450 /* If we need a tertiary reload, see if we have one we can reuse or else
453 if (t_class != NO_REGS)
455 for (t_reload = 0; t_reload < n_reloads; t_reload++)
456 if (reload_secondary_p[t_reload]
457 && (reg_class_subset_p (t_class, reload_reg_class[t_reload])
458 || reg_class_subset_p (reload_reg_class[t_reload], t_class))
459 && ((in_p && reload_inmode[t_reload] == t_mode)
460 || (! in_p && reload_outmode[t_reload] == t_mode))
461 && ((in_p && (reload_secondary_in_icode[t_reload]
462 == CODE_FOR_nothing))
463 || (! in_p &&(reload_secondary_out_icode[t_reload]
464 == CODE_FOR_nothing)))
465 && (reg_class_size[(int) t_class] == 1
466 #ifdef SMALL_REGISTER_CLASSES
470 && MERGABLE_RELOADS (secondary_type,
471 reload_when_needed[t_reload],
472 opnum, reload_opnum[t_reload]))
475 reload_inmode[t_reload] = t_mode;
477 reload_outmode[t_reload] = t_mode;
479 if (reg_class_subset_p (t_class, reload_reg_class[t_reload]))
480 reload_reg_class[t_reload] = t_class;
482 reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum);
483 reload_optional[t_reload] &= optional;
484 reload_secondary_p[t_reload] = 1;
485 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload],
486 opnum, reload_opnum[t_reload]))
487 reload_when_needed[t_reload] = RELOAD_OTHER;
490 if (t_reload == n_reloads)
492 /* We need to make a new tertiary reload for this register class. */
493 reload_in[t_reload] = reload_out[t_reload] = 0;
494 reload_reg_class[t_reload] = t_class;
495 reload_inmode[t_reload] = in_p ? t_mode : VOIDmode;
496 reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode;
497 reload_reg_rtx[t_reload] = 0;
498 reload_optional[t_reload] = optional;
499 reload_inc[t_reload] = 0;
500 /* Maybe we could combine these, but it seems too tricky. */
501 reload_nocombine[t_reload] = 1;
502 reload_in_reg[t_reload] = 0;
503 reload_opnum[t_reload] = opnum;
504 reload_when_needed[t_reload] = secondary_type;
505 reload_secondary_in_reload[t_reload] = -1;
506 reload_secondary_out_reload[t_reload] = -1;
507 reload_secondary_in_icode[t_reload] = CODE_FOR_nothing;
508 reload_secondary_out_icode[t_reload] = CODE_FOR_nothing;
509 reload_secondary_p[t_reload] = 1;
515 /* See if we can reuse an existing secondary reload. */
516 for (s_reload = 0; s_reload < n_reloads; s_reload++)
517 if (reload_secondary_p[s_reload]
518 && (reg_class_subset_p (class, reload_reg_class[s_reload])
519 || reg_class_subset_p (reload_reg_class[s_reload], class))
520 && ((in_p && reload_inmode[s_reload] == mode)
521 || (! in_p && reload_outmode[s_reload] == mode))
522 && ((in_p && reload_secondary_in_reload[s_reload] == t_reload)
523 || (! in_p && reload_secondary_out_reload[s_reload] == t_reload))
524 && ((in_p && reload_secondary_in_icode[s_reload] == t_icode)
525 || (! in_p && reload_secondary_out_icode[s_reload] == t_icode))
526 && (reg_class_size[(int) class] == 1
527 #ifdef SMALL_REGISTER_CLASSES
531 && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload],
532 opnum, reload_opnum[s_reload]))
535 reload_inmode[s_reload] = mode;
537 reload_outmode[s_reload] = mode;
539 if (reg_class_subset_p (class, reload_reg_class[s_reload]))
540 reload_reg_class[s_reload] = class;
542 reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum);
543 reload_optional[s_reload] &= optional;
544 reload_secondary_p[s_reload] = 1;
545 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload],
546 opnum, reload_opnum[s_reload]))
547 reload_when_needed[s_reload] = RELOAD_OTHER;
550 if (s_reload == n_reloads)
552 /* We need to make a new secondary reload for this register class. */
553 reload_in[s_reload] = reload_out[s_reload] = 0;
554 reload_reg_class[s_reload] = class;
556 reload_inmode[s_reload] = in_p ? mode : VOIDmode;
557 reload_outmode[s_reload] = ! in_p ? mode : VOIDmode;
558 reload_reg_rtx[s_reload] = 0;
559 reload_optional[s_reload] = optional;
560 reload_inc[s_reload] = 0;
561 /* Maybe we could combine these, but it seems too tricky. */
562 reload_nocombine[s_reload] = 1;
563 reload_in_reg[s_reload] = 0;
564 reload_opnum[s_reload] = opnum;
565 reload_when_needed[s_reload] = secondary_type;
566 reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1;
567 reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1;
568 reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing;
569 reload_secondary_out_icode[s_reload]
570 = ! in_p ? t_icode : CODE_FOR_nothing;
571 reload_secondary_p[s_reload] = 1;
575 #ifdef SECONDARY_MEMORY_NEEDED
576 /* If we need a memory location to copy between the two reload regs,
579 if (in_p && icode == CODE_FOR_nothing
580 && SECONDARY_MEMORY_NEEDED (class, reload_class, reload_mode))
581 get_secondary_mem (x, reload_mode, opnum, type);
583 if (! in_p && icode == CODE_FOR_nothing
584 && SECONDARY_MEMORY_NEEDED (reload_class, class, reload_mode))
585 get_secondary_mem (x, reload_mode, opnum, type);
592 #endif /* HAVE_SECONDARY_RELOADS */
594 #ifdef SECONDARY_MEMORY_NEEDED
596 /* Return a memory location that will be used to copy X in mode MODE.
597 If we haven't already made a location for this mode in this insn,
598 call find_reloads_address on the location being returned. */
601 get_secondary_mem (x, mode, opnum, type)
603 enum machine_mode mode;
605 enum reload_type type;
610 /* By default, if MODE is narrower than a word, widen it to a word.
611 This is required because most machines that require these memory
612 locations do not support short load and stores from all registers
613 (e.g., FP registers). */
615 #ifdef SECONDARY_MEMORY_NEEDED_MODE
616 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
618 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
619 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
622 /* If we already have made a MEM for this operand in MODE, return it. */
623 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
624 return secondary_memlocs_elim[(int) mode][opnum];
626 /* If this is the first time we've tried to get a MEM for this mode,
627 allocate a new one. `something_changed' in reload will get set
628 by noticing that the frame size has changed. */
630 if (secondary_memlocs[(int) mode] == 0)
632 #ifdef SECONDARY_MEMORY_NEEDED_RTX
633 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
635 secondary_memlocs[(int) mode]
636 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
640 /* Get a version of the address doing any eliminations needed. If that
641 didn't give us a new MEM, make a new one if it isn't valid. */
643 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
644 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
646 if (! mem_valid && loc == secondary_memlocs[(int) mode])
647 loc = copy_rtx (loc);
649 /* The only time the call below will do anything is if the stack
650 offset is too large. In that case IND_LEVELS doesn't matter, so we
651 can just pass a zero. Adjust the type to be the address of the
652 corresponding object. If the address was valid, save the eliminated
653 address. If it wasn't valid, we need to make a reload each time, so
658 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
659 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
662 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
666 secondary_memlocs_elim[(int) mode][opnum] = loc;
670 /* Clear any secondary memory locations we've made. */
673 clear_secondary_mem ()
675 bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);
677 #endif /* SECONDARY_MEMORY_NEEDED */
679 /* Record one reload that needs to be performed.
680 IN is an rtx saying where the data are to be found before this instruction.
681 OUT says where they must be stored after the instruction.
682 (IN is zero for data not read, and OUT is zero for data not written.)
683 INLOC and OUTLOC point to the places in the instructions where
684 IN and OUT were found.
685 If IN and OUT are both non-zero, it means the same register must be used
686 to reload both IN and OUT.
688 CLASS is a register class required for the reloaded data.
689 INMODE is the machine mode that the instruction requires
690 for the reg that replaces IN and OUTMODE is likewise for OUT.
692 If IN is zero, then OUT's location and mode should be passed as
695 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
697 OPTIONAL nonzero means this reload does not need to be performed:
698 it can be discarded if that is more convenient.
700 OPNUM and TYPE say what the purpose of this reload is.
702 The return value is the reload-number for this reload.
704 If both IN and OUT are nonzero, in some rare cases we might
705 want to make two separate reloads. (Actually we never do this now.)
706 Therefore, the reload-number for OUT is stored in
707 output_reloadnum when we return; the return value applies to IN.
708 Usually (presently always), when IN and OUT are nonzero,
709 the two reload-numbers are equal, but the caller should be careful to
713 push_reload (in, out, inloc, outloc, class,
714 inmode, outmode, strict_low, optional, opnum, type)
715 register rtx in, out;
717 enum reg_class class;
718 enum machine_mode inmode, outmode;
722 enum reload_type type;
726 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
727 int secondary_in_reload = -1, secondary_out_reload = -1;
728 enum insn_code secondary_in_icode = CODE_FOR_nothing;
729 enum insn_code secondary_out_icode = CODE_FOR_nothing;
731 /* INMODE and/or OUTMODE could be VOIDmode if no mode
732 has been specified for the operand. In that case,
733 use the operand's mode as the mode to reload. */
734 if (inmode == VOIDmode && in != 0)
735 inmode = GET_MODE (in);
736 if (outmode == VOIDmode && out != 0)
737 outmode = GET_MODE (out);
739 /* If IN is a pseudo register everywhere-equivalent to a constant, and
740 it is not in a hard register, reload straight from the constant,
741 since we want to get rid of such pseudo registers.
742 Often this is done earlier, but not always in find_reloads_address. */
743 if (in != 0 && GET_CODE (in) == REG)
745 register int regno = REGNO (in);
747 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
748 && reg_equiv_constant[regno] != 0)
749 in = reg_equiv_constant[regno];
752 /* Likewise for OUT. Of course, OUT will never be equivalent to
753 an actual constant, but it might be equivalent to a memory location
754 (in the case of a parameter). */
755 if (out != 0 && GET_CODE (out) == REG)
757 register int regno = REGNO (out);
759 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
760 && reg_equiv_constant[regno] != 0)
761 out = reg_equiv_constant[regno];
764 /* If we have a read-write operand with an address side-effect,
765 change either IN or OUT so the side-effect happens only once. */
766 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
768 if (GET_CODE (XEXP (in, 0)) == POST_INC
769 || GET_CODE (XEXP (in, 0)) == POST_DEC)
770 in = gen_rtx (MEM, GET_MODE (in), XEXP (XEXP (in, 0), 0));
771 if (GET_CODE (XEXP (in, 0)) == PRE_INC
772 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
773 out = gen_rtx (MEM, GET_MODE (out), XEXP (XEXP (out, 0), 0));
776 /* If we are reloading a (SUBREG constant ...), really reload just the
777 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
778 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
779 a pseudo and hence will become a MEM) with M1 wider than M2 and the
780 register is a pseudo, also reload the inside expression.
781 For machines that extend byte loads, do this for any SUBREG of a pseudo
782 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
783 M2 is an integral mode that gets extended when loaded.
784 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
785 either M1 is not valid for R or M2 is wider than a word but we only
786 need one word to store an M2-sized quantity in R.
787 (However, if OUT is nonzero, we need to reload the reg *and*
788 the subreg, so do nothing here, and let following statement handle it.)
790 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
791 we can't handle it here because CONST_INT does not indicate a mode.
793 Similarly, we must reload the inside expression if we have a
794 STRICT_LOW_PART (presumably, in == out in the cas).
796 Also reload the inner expression if it does not require a secondary
797 reload but the SUBREG does.
799 Finally, reload the inner expression if it is a register that is in
800 the class whose registers cannot be referenced in a different size
801 and M1 is not the same size as M2. */
803 if (in != 0 && GET_CODE (in) == SUBREG
804 #ifdef CLASS_CANNOT_CHANGE_SIZE
805 && class != CLASS_CANNOT_CHANGE_SIZE
807 && (CONSTANT_P (SUBREG_REG (in))
808 || GET_CODE (SUBREG_REG (in)) == PLUS
810 || (((GET_CODE (SUBREG_REG (in)) == REG
811 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
812 || GET_CODE (SUBREG_REG (in)) == MEM)
813 && ((GET_MODE_SIZE (inmode)
814 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
815 #ifdef LOAD_EXTEND_OP
816 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
817 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
819 && (GET_MODE_SIZE (inmode)
820 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
821 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
822 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
825 || (GET_CODE (SUBREG_REG (in)) == REG
826 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
827 /* The case where out is nonzero
828 is handled differently in the following statement. */
829 && (out == 0 || SUBREG_WORD (in) == 0)
830 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
831 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
833 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
835 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
836 GET_MODE (SUBREG_REG (in)))))
837 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
840 #ifdef SECONDARY_INPUT_RELOAD_CLASS
841 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
842 && (SECONDARY_INPUT_RELOAD_CLASS (class,
843 GET_MODE (SUBREG_REG (in)),
847 #ifdef CLASS_CANNOT_CHANGE_SIZE
848 || (GET_CODE (SUBREG_REG (in)) == REG
849 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
850 && (TEST_HARD_REG_BIT
851 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
852 REGNO (SUBREG_REG (in))))
853 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
854 != GET_MODE_SIZE (inmode)))
858 in_subreg_loc = inloc;
859 inloc = &SUBREG_REG (in);
861 #ifndef LOAD_EXTEND_OP
862 if (GET_CODE (in) == MEM)
863 /* This is supposed to happen only for paradoxical subregs made by
864 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
865 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
868 inmode = GET_MODE (in);
871 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
872 either M1 is not valid for R or M2 is wider than a word but we only
873 need one word to store an M2-sized quantity in R.
875 However, we must reload the inner reg *as well as* the subreg in
878 if (in != 0 && GET_CODE (in) == SUBREG
879 && GET_CODE (SUBREG_REG (in)) == REG
880 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
881 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in)), inmode)
882 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
883 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
885 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
887 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
888 GET_MODE (SUBREG_REG (in)))))))
890 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
891 GENERAL_REGS, VOIDmode, VOIDmode, 0, 0, opnum, type);
895 /* Similarly for paradoxical and problematical SUBREGs on the output.
896 Note that there is no reason we need worry about the previous value
897 of SUBREG_REG (out); even if wider than out,
898 storing in a subreg is entitled to clobber it all
899 (except in the case of STRICT_LOW_PART,
900 and in that case the constraint should label it input-output.) */
901 if (out != 0 && GET_CODE (out) == SUBREG
902 #ifdef CLASS_CANNOT_CHANGE_SIZE
903 && class != CLASS_CANNOT_CHANGE_SIZE
905 && (CONSTANT_P (SUBREG_REG (out))
907 || (((GET_CODE (SUBREG_REG (out)) == REG
908 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
909 || GET_CODE (SUBREG_REG (out)) == MEM)
910 && ((GET_MODE_SIZE (outmode)
911 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))))
912 || (GET_CODE (SUBREG_REG (out)) == REG
913 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
914 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
915 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
917 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
919 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
920 GET_MODE (SUBREG_REG (out)))))
921 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
922 + SUBREG_WORD (out)),
924 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
925 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
926 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
927 GET_MODE (SUBREG_REG (out)),
931 #ifdef CLASS_CANNOT_CHANGE_SIZE
932 || (GET_CODE (SUBREG_REG (out)) == REG
933 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
934 && (TEST_HARD_REG_BIT
935 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
936 REGNO (SUBREG_REG (out))))
937 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
938 != GET_MODE_SIZE (outmode)))
942 out_subreg_loc = outloc;
943 outloc = &SUBREG_REG (out);
945 #ifndef LOAD_EXTEND_OP
946 if (GET_CODE (out) == MEM
947 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
950 outmode = GET_MODE (out);
953 /* If IN appears in OUT, we can't share any input-only reload for IN. */
954 if (in != 0 && out != 0 && GET_CODE (out) == MEM
955 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
956 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
959 /* If IN is a SUBREG of a hard register, make a new REG. This
960 simplifies some of the cases below. */
962 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
963 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
964 in = gen_rtx (REG, GET_MODE (in),
965 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
967 /* Similarly for OUT. */
968 if (out != 0 && GET_CODE (out) == SUBREG
969 && GET_CODE (SUBREG_REG (out)) == REG
970 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
971 out = gen_rtx (REG, GET_MODE (out),
972 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
974 /* Narrow down the class of register wanted if that is
975 desirable on this machine for efficiency. */
977 class = PREFERRED_RELOAD_CLASS (in, class);
979 /* Output reloads may need analogous treatment, different in detail. */
980 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
982 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
985 /* Make sure we use a class that can handle the actual pseudo
986 inside any subreg. For example, on the 386, QImode regs
987 can appear within SImode subregs. Although GENERAL_REGS
988 can handle SImode, QImode needs a smaller class. */
989 #ifdef LIMIT_RELOAD_CLASS
991 class = LIMIT_RELOAD_CLASS (inmode, class);
992 else if (in != 0 && GET_CODE (in) == SUBREG)
993 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
996 class = LIMIT_RELOAD_CLASS (outmode, class);
997 if (out != 0 && GET_CODE (out) == SUBREG)
998 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1001 /* Verify that this class is at least possible for the mode that
1003 if (this_insn_is_asm)
1005 enum machine_mode mode;
1006 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1010 if (mode == VOIDmode)
1012 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1017 outmode = word_mode;
1019 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1020 if (HARD_REGNO_MODE_OK (i, mode)
1021 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1023 int nregs = HARD_REGNO_NREGS (i, mode);
1026 for (j = 1; j < nregs; j++)
1027 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1032 if (i == FIRST_PSEUDO_REGISTER)
1034 error_for_asm (this_insn, "impossible register constraint in `asm'");
1039 if (class == NO_REGS)
1042 /* We can use an existing reload if the class is right
1043 and at least one of IN and OUT is a match
1044 and the other is at worst neutral.
1045 (A zero compared against anything is neutral.)
1047 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
1048 for the same thing since that can cause us to need more reload registers
1049 than we otherwise would. */
1051 for (i = 0; i < n_reloads; i++)
1052 if ((reg_class_subset_p (class, reload_reg_class[i])
1053 || reg_class_subset_p (reload_reg_class[i], class))
1054 /* If the existing reload has a register, it must fit our class. */
1055 && (reload_reg_rtx[i] == 0
1056 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1057 true_regnum (reload_reg_rtx[i])))
1058 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
1059 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
1061 (out != 0 && MATCHES (reload_out[i], out)
1062 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
1063 && (reg_class_size[(int) class] == 1
1064 #ifdef SMALL_REGISTER_CLASSES
1068 && MERGABLE_RELOADS (type, reload_when_needed[i],
1069 opnum, reload_opnum[i]))
1072 /* Reloading a plain reg for input can match a reload to postincrement
1073 that reg, since the postincrement's value is the right value.
1074 Likewise, it can match a preincrement reload, since we regard
1075 the preincrementation as happening before any ref in this insn
1076 to that register. */
1078 for (i = 0; i < n_reloads; i++)
1079 if ((reg_class_subset_p (class, reload_reg_class[i])
1080 || reg_class_subset_p (reload_reg_class[i], class))
1081 /* If the existing reload has a register, it must fit our class. */
1082 && (reload_reg_rtx[i] == 0
1083 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1084 true_regnum (reload_reg_rtx[i])))
1085 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
1086 && ((GET_CODE (in) == REG
1087 && (GET_CODE (reload_in[i]) == POST_INC
1088 || GET_CODE (reload_in[i]) == POST_DEC
1089 || GET_CODE (reload_in[i]) == PRE_INC
1090 || GET_CODE (reload_in[i]) == PRE_DEC)
1091 && MATCHES (XEXP (reload_in[i], 0), in))
1093 (GET_CODE (reload_in[i]) == REG
1094 && (GET_CODE (in) == POST_INC
1095 || GET_CODE (in) == POST_DEC
1096 || GET_CODE (in) == PRE_INC
1097 || GET_CODE (in) == PRE_DEC)
1098 && MATCHES (XEXP (in, 0), reload_in[i])))
1099 && (reg_class_size[(int) class] == 1
1100 #ifdef SMALL_REGISTER_CLASSES
1104 && MERGABLE_RELOADS (type, reload_when_needed[i],
1105 opnum, reload_opnum[i]))
1107 /* Make sure reload_in ultimately has the increment,
1108 not the plain register. */
1109 if (GET_CODE (in) == REG)
1116 /* See if we need a secondary reload register to move between CLASS
1117 and IN or CLASS and OUT. Get the icode and push any required reloads
1118 needed for each of them if so. */
1120 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1123 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1124 &secondary_in_icode);
1127 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1128 if (out != 0 && GET_CODE (out) != SCRATCH)
1129 secondary_out_reload
1130 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1131 type, &secondary_out_icode);
1134 /* We found no existing reload suitable for re-use.
1135 So add an additional reload. */
1139 reload_out[i] = out;
1140 reload_reg_class[i] = class;
1141 reload_inmode[i] = inmode;
1142 reload_outmode[i] = outmode;
1143 reload_reg_rtx[i] = 0;
1144 reload_optional[i] = optional;
1146 reload_nocombine[i] = 0;
1147 reload_in_reg[i] = inloc ? *inloc : 0;
1148 reload_opnum[i] = opnum;
1149 reload_when_needed[i] = type;
1150 reload_secondary_in_reload[i] = secondary_in_reload;
1151 reload_secondary_out_reload[i] = secondary_out_reload;
1152 reload_secondary_in_icode[i] = secondary_in_icode;
1153 reload_secondary_out_icode[i] = secondary_out_icode;
1154 reload_secondary_p[i] = 0;
1158 #ifdef SECONDARY_MEMORY_NEEDED
1159 /* If a memory location is needed for the copy, make one. */
1160 if (in != 0 && GET_CODE (in) == REG
1161 && REGNO (in) < FIRST_PSEUDO_REGISTER
1162 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1164 get_secondary_mem (in, inmode, opnum, type);
1166 if (out != 0 && GET_CODE (out) == REG
1167 && REGNO (out) < FIRST_PSEUDO_REGISTER
1168 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1170 get_secondary_mem (out, outmode, opnum, type);
1175 /* We are reusing an existing reload,
1176 but we may have additional information for it.
1177 For example, we may now have both IN and OUT
1178 while the old one may have just one of them. */
1180 if (inmode != VOIDmode)
1181 reload_inmode[i] = inmode;
1182 if (outmode != VOIDmode)
1183 reload_outmode[i] = outmode;
1187 reload_out[i] = out;
1188 if (reg_class_subset_p (class, reload_reg_class[i]))
1189 reload_reg_class[i] = class;
1190 reload_optional[i] &= optional;
1191 if (MERGE_TO_OTHER (type, reload_when_needed[i],
1192 opnum, reload_opnum[i]))
1193 reload_when_needed[i] = RELOAD_OTHER;
1194 reload_opnum[i] = MIN (reload_opnum[i], opnum);
1197 /* If the ostensible rtx being reload differs from the rtx found
1198 in the location to substitute, this reload is not safe to combine
1199 because we cannot reliably tell whether it appears in the insn. */
1201 if (in != 0 && in != *inloc)
1202 reload_nocombine[i] = 1;
1205 /* This was replaced by changes in find_reloads_address_1 and the new
1206 function inc_for_reload, which go with a new meaning of reload_inc. */
1208 /* If this is an IN/OUT reload in an insn that sets the CC,
1209 it must be for an autoincrement. It doesn't work to store
1210 the incremented value after the insn because that would clobber the CC.
1211 So we must do the increment of the value reloaded from,
1212 increment it, store it back, then decrement again. */
1213 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1217 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1218 /* If we did not find a nonzero amount-to-increment-by,
1219 that contradicts the belief that IN is being incremented
1220 in an address in this insn. */
1221 if (reload_inc[i] == 0)
1226 /* If we will replace IN and OUT with the reload-reg,
1227 record where they are located so that substitution need
1228 not do a tree walk. */
1230 if (replace_reloads)
1234 register struct replacement *r = &replacements[n_replacements++];
1236 r->subreg_loc = in_subreg_loc;
1240 if (outloc != 0 && outloc != inloc)
1242 register struct replacement *r = &replacements[n_replacements++];
1245 r->subreg_loc = out_subreg_loc;
1250 /* If this reload is just being introduced and it has both
1251 an incoming quantity and an outgoing quantity that are
1252 supposed to be made to match, see if either one of the two
1253 can serve as the place to reload into.
1255 If one of them is acceptable, set reload_reg_rtx[i]
1258 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1260 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1262 reload_reg_class[i], i);
1264 /* If the outgoing register already contains the same value
1265 as the incoming one, we can dispense with loading it.
1266 The easiest way to tell the caller that is to give a phony
1267 value for the incoming operand (same as outgoing one). */
1268 if (reload_reg_rtx[i] == out
1269 && (GET_CODE (in) == REG || CONSTANT_P (in))
1270 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1271 static_reload_reg_p, i, inmode))
1275 /* If this is an input reload and the operand contains a register that
1276 dies in this insn and is used nowhere else, see if it is the right class
1277 to be used for this reload. Use it if so. (This occurs most commonly
1278 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1279 this if it is also an output reload that mentions the register unless
1280 the output is a SUBREG that clobbers an entire register.
1282 Note that the operand might be one of the spill regs, if it is a
1283 pseudo reg and we are in a block where spilling has not taken place.
1284 But if there is no spilling in this block, that is OK.
1285 An explicitly used hard reg cannot be a spill reg. */
1287 if (reload_reg_rtx[i] == 0 && in != 0)
1292 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1293 if (REG_NOTE_KIND (note) == REG_DEAD
1294 && GET_CODE (XEXP (note, 0)) == REG
1295 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1296 && reg_mentioned_p (XEXP (note, 0), in)
1297 && ! refers_to_regno_for_reload_p (regno,
1299 + HARD_REGNO_NREGS (regno,
1301 PATTERN (this_insn), inloc)
1302 /* If this is also an output reload, IN cannot be used as
1303 the reload register if it is set in this insn unless IN
1305 && (out == 0 || in == out
1306 || ! hard_reg_set_here_p (regno,
1308 + HARD_REGNO_NREGS (regno,
1310 PATTERN (this_insn)))
1311 /* ??? Why is this code so different from the previous?
1312 Is there any simple coherent way to describe the two together?
1313 What's going on here. */
1315 || (GET_CODE (in) == SUBREG
1316 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1318 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1319 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1320 /* Make sure the operand fits in the reg that dies. */
1321 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1322 && HARD_REGNO_MODE_OK (regno, inmode)
1323 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1324 && HARD_REGNO_MODE_OK (regno, outmode)
1325 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1326 && !fixed_regs[regno])
1328 reload_reg_rtx[i] = gen_rtx (REG, inmode, regno);
1334 output_reloadnum = i;
1339 /* Record an additional place we must replace a value
1340 for which we have already recorded a reload.
1341 RELOADNUM is the value returned by push_reload
1342 when the reload was recorded.
1343 This is used in insn patterns that use match_dup. */
1346 push_replacement (loc, reloadnum, mode)
1349 enum machine_mode mode;
1351 if (replace_reloads)
1353 register struct replacement *r = &replacements[n_replacements++];
1354 r->what = reloadnum;
1361 /* Transfer all replacements that used to be in reload FROM to be in
1365 transfer_replacements (to, from)
1370 for (i = 0; i < n_replacements; i++)
1371 if (replacements[i].what == from)
1372 replacements[i].what = to;
1375 /* If there is only one output reload, and it is not for an earlyclobber
1376 operand, try to combine it with a (logically unrelated) input reload
1377 to reduce the number of reload registers needed.
1379 This is safe if the input reload does not appear in
1380 the value being output-reloaded, because this implies
1381 it is not needed any more once the original insn completes.
1383 If that doesn't work, see we can use any of the registers that
1384 die in this insn as a reload register. We can if it is of the right
1385 class and does not appear in the value being output-reloaded. */
1391 int output_reload = -1;
1392 int secondary_out = -1;
1395 /* Find the output reload; return unless there is exactly one
1396 and that one is mandatory. */
1398 for (i = 0; i < n_reloads; i++)
1399 if (reload_out[i] != 0)
1401 if (output_reload >= 0)
1406 if (output_reload < 0 || reload_optional[output_reload])
1409 /* An input-output reload isn't combinable. */
1411 if (reload_in[output_reload] != 0)
1414 /* If this reload is for an earlyclobber operand, we can't do anything. */
1415 if (earlyclobber_operand_p (reload_out[output_reload]))
1418 /* Check each input reload; can we combine it? */
1420 for (i = 0; i < n_reloads; i++)
1421 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1422 /* Life span of this reload must not extend past main insn. */
1423 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
1424 && reload_when_needed[i] != RELOAD_OTHER
1425 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
1426 == CLASS_MAX_NREGS (reload_reg_class[output_reload],
1427 reload_outmode[output_reload]))
1428 && reload_inc[i] == 0
1429 && reload_reg_rtx[i] == 0
1430 #ifdef SECONDARY_MEMORY_NEEDED
1431 /* Don't combine two reloads with different secondary
1432 memory locations. */
1433 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
1434 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
1435 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
1436 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
1438 #ifdef SMALL_REGISTER_CLASSES
1439 && reload_reg_class[i] == reload_reg_class[output_reload]
1441 && (reg_class_subset_p (reload_reg_class[i],
1442 reload_reg_class[output_reload])
1443 || reg_class_subset_p (reload_reg_class[output_reload],
1444 reload_reg_class[i]))
1446 && (MATCHES (reload_in[i], reload_out[output_reload])
1447 /* Args reversed because the first arg seems to be
1448 the one that we imagine being modified
1449 while the second is the one that might be affected. */
1450 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1452 /* However, if the input is a register that appears inside
1453 the output, then we also can't share.
1454 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1455 If the same reload reg is used for both reg 69 and the
1456 result to be stored in memory, then that result
1457 will clobber the address of the memory ref. */
1458 && ! (GET_CODE (reload_in[i]) == REG
1459 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1460 reload_out[output_reload]))))
1461 && (reg_class_size[(int) reload_reg_class[i]]
1462 #ifdef SMALL_REGISTER_CLASSES
1466 /* We will allow making things slightly worse by combining an
1467 input and an output, but no worse than that. */
1468 && (reload_when_needed[i] == RELOAD_FOR_INPUT
1469 || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
1473 /* We have found a reload to combine with! */
1474 reload_out[i] = reload_out[output_reload];
1475 reload_outmode[i] = reload_outmode[output_reload];
1476 /* Mark the old output reload as inoperative. */
1477 reload_out[output_reload] = 0;
1478 /* The combined reload is needed for the entire insn. */
1479 reload_when_needed[i] = RELOAD_OTHER;
1480 /* If the output reload had a secondary reload, copy it. */
1481 if (reload_secondary_out_reload[output_reload] != -1)
1483 reload_secondary_out_reload[i]
1484 = reload_secondary_out_reload[output_reload];
1485 reload_secondary_out_icode[i]
1486 = reload_secondary_out_icode[output_reload];
1489 #ifdef SECONDARY_MEMORY_NEEDED
1490 /* Copy any secondary MEM. */
1491 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
1492 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
1493 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
1495 /* If required, minimize the register class. */
1496 if (reg_class_subset_p (reload_reg_class[output_reload],
1497 reload_reg_class[i]))
1498 reload_reg_class[i] = reload_reg_class[output_reload];
1500 /* Transfer all replacements from the old reload to the combined. */
1501 for (j = 0; j < n_replacements; j++)
1502 if (replacements[j].what == output_reload)
1503 replacements[j].what = i;
1508 /* If this insn has only one operand that is modified or written (assumed
1509 to be the first), it must be the one corresponding to this reload. It
1510 is safe to use anything that dies in this insn for that output provided
1511 that it does not occur in the output (we already know it isn't an
1512 earlyclobber. If this is an asm insn, give up. */
1514 if (INSN_CODE (this_insn) == -1)
1517 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1518 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1519 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1522 /* See if some hard register that dies in this insn and is not used in
1523 the output is the right class. Only works if the register we pick
1524 up can fully hold our output reload. */
1525 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1526 if (REG_NOTE_KIND (note) == REG_DEAD
1527 && GET_CODE (XEXP (note, 0)) == REG
1528 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1529 reload_out[output_reload])
1530 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1531 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1532 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1533 REGNO (XEXP (note, 0)))
1534 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1535 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1536 /* Ensure that a secondary or tertiary reload for this output
1537 won't want this register. */
1538 && ((secondary_out = reload_secondary_out_reload[output_reload]) == -1
1539 || (! (TEST_HARD_REG_BIT
1540 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1541 REGNO (XEXP (note, 0))))
1542 && ((secondary_out = reload_secondary_out_reload[secondary_out]) == -1
1543 || ! (TEST_HARD_REG_BIT
1544 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1545 REGNO (XEXP (note, 0)))))))
1546 && ! fixed_regs[REGNO (XEXP (note, 0))])
1548 reload_reg_rtx[output_reload] = gen_rtx (REG,
1549 reload_outmode[output_reload],
1550 REGNO (XEXP (note, 0)));
1555 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1556 See if one of IN and OUT is a register that may be used;
1557 this is desirable since a spill-register won't be needed.
1558 If so, return the register rtx that proves acceptable.
1560 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1561 CLASS is the register class required for the reload.
1563 If FOR_REAL is >= 0, it is the number of the reload,
1564 and in some cases when it can be discovered that OUT doesn't need
1565 to be computed, clear out reload_out[FOR_REAL].
1567 If FOR_REAL is -1, this should not be done, because this call
1568 is just to see if a register can be found, not to find and install it. */
1571 find_dummy_reload (real_in, real_out, inloc, outloc,
1572 inmode, outmode, class, for_real)
1573 rtx real_in, real_out;
1574 rtx *inloc, *outloc;
1575 enum machine_mode inmode, outmode;
1576 enum reg_class class;
1585 /* If operands exceed a word, we can't use either of them
1586 unless they have the same size. */
1587 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1588 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1589 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1592 /* Find the inside of any subregs. */
1593 while (GET_CODE (out) == SUBREG)
1595 out_offset = SUBREG_WORD (out);
1596 out = SUBREG_REG (out);
1598 while (GET_CODE (in) == SUBREG)
1600 in_offset = SUBREG_WORD (in);
1601 in = SUBREG_REG (in);
1604 /* Narrow down the reg class, the same way push_reload will;
1605 otherwise we might find a dummy now, but push_reload won't. */
1606 class = PREFERRED_RELOAD_CLASS (in, class);
1608 /* See if OUT will do. */
1609 if (GET_CODE (out) == REG
1610 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1612 register int regno = REGNO (out) + out_offset;
1613 int nwords = HARD_REGNO_NREGS (regno, outmode);
1616 /* When we consider whether the insn uses OUT,
1617 ignore references within IN. They don't prevent us
1618 from copying IN into OUT, because those refs would
1619 move into the insn that reloads IN.
1621 However, we only ignore IN in its role as this reload.
1622 If the insn uses IN elsewhere and it contains OUT,
1623 that counts. We can't be sure it's the "same" operand
1624 so it might not go through this reload. */
1626 *inloc = const0_rtx;
1628 if (regno < FIRST_PSEUDO_REGISTER
1629 /* A fixed reg that can overlap other regs better not be used
1630 for reloading in any way. */
1631 #ifdef OVERLAPPING_REGNO_P
1632 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1634 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1635 PATTERN (this_insn), outloc))
1638 for (i = 0; i < nwords; i++)
1639 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1645 if (GET_CODE (real_out) == REG)
1648 value = gen_rtx (REG, outmode, regno);
1655 /* Consider using IN if OUT was not acceptable
1656 or if OUT dies in this insn (like the quotient in a divmod insn).
1657 We can't use IN unless it is dies in this insn,
1658 which means we must know accurately which hard regs are live.
1659 Also, the result can't go in IN if IN is used within OUT. */
1660 if (hard_regs_live_known
1661 && GET_CODE (in) == REG
1662 && REGNO (in) < FIRST_PSEUDO_REGISTER
1664 || find_reg_note (this_insn, REG_UNUSED, real_out))
1665 && find_reg_note (this_insn, REG_DEAD, real_in)
1666 && !fixed_regs[REGNO (in)]
1667 && HARD_REGNO_MODE_OK (REGNO (in),
1668 /* The only case where out and real_out might
1669 have different modes is where real_out
1670 is a subreg, and in that case, out
1672 (GET_MODE (out) != VOIDmode
1673 ? GET_MODE (out) : outmode)))
1675 register int regno = REGNO (in) + in_offset;
1676 int nwords = HARD_REGNO_NREGS (regno, inmode);
1678 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1679 && ! hard_reg_set_here_p (regno, regno + nwords,
1680 PATTERN (this_insn)))
1683 for (i = 0; i < nwords; i++)
1684 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1690 /* If we were going to use OUT as the reload reg
1691 and changed our mind, it means OUT is a dummy that
1692 dies here. So don't bother copying value to it. */
1693 if (for_real >= 0 && value == real_out)
1694 reload_out[for_real] = 0;
1695 if (GET_CODE (real_in) == REG)
1698 value = gen_rtx (REG, inmode, regno);
1706 /* This page contains subroutines used mainly for determining
1707 whether the IN or an OUT of a reload can serve as the
1710 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1713 earlyclobber_operand_p (x)
1718 for (i = 0; i < n_earlyclobbers; i++)
1719 if (reload_earlyclobbers[i] == x)
1725 /* Return 1 if expression X alters a hard reg in the range
1726 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1727 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1728 X should be the body of an instruction. */
1731 hard_reg_set_here_p (beg_regno, end_regno, x)
1732 register int beg_regno, end_regno;
1735 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1737 register rtx op0 = SET_DEST (x);
1738 while (GET_CODE (op0) == SUBREG)
1739 op0 = SUBREG_REG (op0);
1740 if (GET_CODE (op0) == REG)
1742 register int r = REGNO (op0);
1743 /* See if this reg overlaps range under consideration. */
1745 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1749 else if (GET_CODE (x) == PARALLEL)
1751 register int i = XVECLEN (x, 0) - 1;
1753 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1760 /* Return 1 if ADDR is a valid memory address for mode MODE,
1761 and check that each pseudo reg has the proper kind of
1765 strict_memory_address_p (mode, addr)
1766 enum machine_mode mode;
1769 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
1776 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1777 if they are the same hard reg, and has special hacks for
1778 autoincrement and autodecrement.
1779 This is specifically intended for find_reloads to use
1780 in determining whether two operands match.
1781 X is the operand whose number is the lower of the two.
1783 The value is 2 if Y contains a pre-increment that matches
1784 a non-incrementing address in X. */
1786 /* ??? To be completely correct, we should arrange to pass
1787 for X the output operand and for Y the input operand.
1788 For now, we assume that the output operand has the lower number
1789 because that is natural in (SET output (... input ...)). */
1792 operands_match_p (x, y)
1796 register RTX_CODE code = GET_CODE (x);
1802 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
1803 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
1804 && GET_CODE (SUBREG_REG (y)) == REG)))
1810 i = REGNO (SUBREG_REG (x));
1811 if (i >= FIRST_PSEUDO_REGISTER)
1813 i += SUBREG_WORD (x);
1818 if (GET_CODE (y) == SUBREG)
1820 j = REGNO (SUBREG_REG (y));
1821 if (j >= FIRST_PSEUDO_REGISTER)
1823 j += SUBREG_WORD (y);
1828 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1829 multiple hard register group, so that for example (reg:DI 0) and
1830 (reg:SI 1) will be considered the same register. */
1831 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
1832 && i < FIRST_PSEUDO_REGISTER)
1833 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
1834 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
1835 && j < FIRST_PSEUDO_REGISTER)
1836 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
1840 /* If two operands must match, because they are really a single
1841 operand of an assembler insn, then two postincrements are invalid
1842 because the assembler insn would increment only once.
1843 On the other hand, an postincrement matches ordinary indexing
1844 if the postincrement is the output operand. */
1845 if (code == POST_DEC || code == POST_INC)
1846 return operands_match_p (XEXP (x, 0), y);
1847 /* Two preincrements are invalid
1848 because the assembler insn would increment only once.
1849 On the other hand, an preincrement matches ordinary indexing
1850 if the preincrement is the input operand.
1851 In this case, return 2, since some callers need to do special
1852 things when this happens. */
1853 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
1854 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
1858 /* Now we have disposed of all the cases
1859 in which different rtx codes can match. */
1860 if (code != GET_CODE (y))
1862 if (code == LABEL_REF)
1863 return XEXP (x, 0) == XEXP (y, 0);
1864 if (code == SYMBOL_REF)
1865 return XSTR (x, 0) == XSTR (y, 0);
1867 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1869 if (GET_MODE (x) != GET_MODE (y))
1872 /* Compare the elements. If any pair of corresponding elements
1873 fail to match, return 0 for the whole things. */
1876 fmt = GET_RTX_FORMAT (code);
1877 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1883 if (XWINT (x, i) != XWINT (y, i))
1888 if (XINT (x, i) != XINT (y, i))
1893 val = operands_match_p (XEXP (x, i), XEXP (y, i));
1896 /* If any subexpression returns 2,
1897 we should return 2 if we are successful. */
1905 /* It is believed that rtx's at this level will never
1906 contain anything but integers and other rtx's,
1907 except for within LABEL_REFs and SYMBOL_REFs. */
1912 return 1 + success_2;
1915 /* Return the number of times character C occurs in string S. */
1918 n_occurrences (c, s)
1928 /* Describe the range of registers or memory referenced by X.
1929 If X is a register, set REG_FLAG and put the first register
1930 number into START and the last plus one into END.
1931 If X is a memory reference, put a base address into BASE
1932 and a range of integer offsets into START and END.
1933 If X is pushing on the stack, we can assume it causes no trouble,
1934 so we set the SAFE field. */
1936 static struct decomposition
1940 struct decomposition val;
1945 if (GET_CODE (x) == MEM)
1947 rtx base, offset = 0;
1948 rtx addr = XEXP (x, 0);
1950 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
1951 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
1953 val.base = XEXP (addr, 0);
1954 val.start = - GET_MODE_SIZE (GET_MODE (x));
1955 val.end = GET_MODE_SIZE (GET_MODE (x));
1956 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
1960 if (GET_CODE (addr) == CONST)
1962 addr = XEXP (addr, 0);
1965 if (GET_CODE (addr) == PLUS)
1967 if (CONSTANT_P (XEXP (addr, 0)))
1969 base = XEXP (addr, 1);
1970 offset = XEXP (addr, 0);
1972 else if (CONSTANT_P (XEXP (addr, 1)))
1974 base = XEXP (addr, 0);
1975 offset = XEXP (addr, 1);
1982 offset = const0_rtx;
1984 if (GET_CODE (offset) == CONST)
1985 offset = XEXP (offset, 0);
1986 if (GET_CODE (offset) == PLUS)
1988 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
1990 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 1));
1991 offset = XEXP (offset, 0);
1993 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
1995 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 0));
1996 offset = XEXP (offset, 1);
2000 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
2001 offset = const0_rtx;
2004 else if (GET_CODE (offset) != CONST_INT)
2006 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
2007 offset = const0_rtx;
2010 if (all_const && GET_CODE (base) == PLUS)
2011 base = gen_rtx (CONST, GET_MODE (base), base);
2013 if (GET_CODE (offset) != CONST_INT)
2016 val.start = INTVAL (offset);
2017 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2021 else if (GET_CODE (x) == REG)
2024 val.start = true_regnum (x);
2027 /* A pseudo with no hard reg. */
2028 val.start = REGNO (x);
2029 val.end = val.start + 1;
2033 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2035 else if (GET_CODE (x) == SUBREG)
2037 if (GET_CODE (SUBREG_REG (x)) != REG)
2038 /* This could be more precise, but it's good enough. */
2039 return decompose (SUBREG_REG (x));
2041 val.start = true_regnum (x);
2043 return decompose (SUBREG_REG (x));
2046 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2048 else if (CONSTANT_P (x)
2049 /* This hasn't been assigned yet, so it can't conflict yet. */
2050 || GET_CODE (x) == SCRATCH)
2057 /* Return 1 if altering Y will not modify the value of X.
2058 Y is also described by YDATA, which should be decompose (Y). */
2061 immune_p (x, y, ydata)
2063 struct decomposition ydata;
2065 struct decomposition xdata;
2068 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2072 if (GET_CODE (y) != MEM)
2074 /* If Y is memory and X is not, Y can't affect X. */
2075 if (GET_CODE (x) != MEM)
2078 xdata = decompose (x);
2080 if (! rtx_equal_p (xdata.base, ydata.base))
2082 /* If bases are distinct symbolic constants, there is no overlap. */
2083 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2085 /* Constants and stack slots never overlap. */
2086 if (CONSTANT_P (xdata.base)
2087 && (ydata.base == frame_pointer_rtx
2088 || ydata.base == hard_frame_pointer_rtx
2089 || ydata.base == stack_pointer_rtx))
2091 if (CONSTANT_P (ydata.base)
2092 && (xdata.base == frame_pointer_rtx
2093 || xdata.base == hard_frame_pointer_rtx
2094 || xdata.base == stack_pointer_rtx))
2096 /* If either base is variable, we don't know anything. */
2101 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2104 /* Similar, but calls decompose. */
2107 safe_from_earlyclobber (op, clobber)
2110 struct decomposition early_data;
2112 early_data = decompose (clobber);
2113 return immune_p (op, clobber, early_data);
2116 /* Main entry point of this file: search the body of INSN
2117 for values that need reloading and record them with push_reload.
2118 REPLACE nonzero means record also where the values occur
2119 so that subst_reloads can be used.
2121 IND_LEVELS says how many levels of indirection are supported by this
2122 machine; a value of zero means that a memory reference is not a valid
2125 LIVE_KNOWN says we have valid information about which hard
2126 regs are live at each point in the program; this is true when
2127 we are called from global_alloc but false when stupid register
2128 allocation has been done.
2130 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2131 which is nonnegative if the reg has been commandeered for reloading into.
2132 It is copied into STATIC_RELOAD_REG_P and referenced from there
2133 by various subroutines. */
2136 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2138 int replace, ind_levels;
2140 short *reload_reg_p;
2142 #ifdef REGISTER_CONSTRAINTS
2144 register int insn_code_number;
2147 /* These are the constraints for the insn. We don't change them. */
2148 char *constraints1[MAX_RECOG_OPERANDS];
2149 /* These start out as the constraints for the insn
2150 and they are chewed up as we consider alternatives. */
2151 char *constraints[MAX_RECOG_OPERANDS];
2152 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2154 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2155 char pref_or_nothing[MAX_RECOG_OPERANDS];
2156 /* Nonzero for a MEM operand whose entire address needs a reload. */
2157 int address_reloaded[MAX_RECOG_OPERANDS];
2158 /* Value of enum reload_type to use for operand. */
2159 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2160 /* Value of enum reload_type to use within address of operand. */
2161 enum reload_type address_type[MAX_RECOG_OPERANDS];
2162 /* Save the usage of each operand. */
2163 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2164 int no_input_reloads = 0, no_output_reloads = 0;
2166 int this_alternative[MAX_RECOG_OPERANDS];
2167 char this_alternative_win[MAX_RECOG_OPERANDS];
2168 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2169 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2170 int this_alternative_matches[MAX_RECOG_OPERANDS];
2172 int goal_alternative[MAX_RECOG_OPERANDS];
2173 int this_alternative_number;
2174 int goal_alternative_number;
2175 int operand_reloadnum[MAX_RECOG_OPERANDS];
2176 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2177 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2178 char goal_alternative_win[MAX_RECOG_OPERANDS];
2179 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2180 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2181 int goal_alternative_swapped;
2184 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2185 rtx substed_operand[MAX_RECOG_OPERANDS];
2186 rtx body = PATTERN (insn);
2187 rtx set = single_set (insn);
2188 int goal_earlyclobber, this_earlyclobber;
2189 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2192 this_insn_is_asm = 0; /* Tentative. */
2196 n_earlyclobbers = 0;
2197 replace_reloads = replace;
2198 hard_regs_live_known = live_known;
2199 static_reload_reg_p = reload_reg_p;
2201 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2202 neither are insns that SET cc0. Insns that use CC0 are not allowed
2203 to have any input reloads. */
2204 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2205 no_output_reloads = 1;
2208 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2209 no_input_reloads = 1;
2210 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2211 no_output_reloads = 1;
2214 #ifdef SECONDARY_MEMORY_NEEDED
2215 /* The eliminated forms of any secondary memory locations are per-insn, so
2216 clear them out here. */
2218 bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2221 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2222 Make OPERANDS point to a vector of operand values.
2223 Make OPERAND_LOCS point to a vector of pointers to
2224 where the operands were found.
2225 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2226 constraint-strings for this insn.
2227 Return if the insn needs no reload processing. */
2229 switch (GET_CODE (body))
2239 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2240 is cheap to move between them. If it is not, there may not be an insn
2241 to do the copy, so we may need a reload. */
2242 if (GET_CODE (SET_DEST (body)) == REG
2243 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2244 && GET_CODE (SET_SRC (body)) == REG
2245 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2246 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2247 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2251 reload_n_operands = noperands = asm_noperands (body);
2254 /* This insn is an `asm' with operands. */
2256 insn_code_number = -1;
2257 this_insn_is_asm = 1;
2259 /* expand_asm_operands makes sure there aren't too many operands. */
2260 if (noperands > MAX_RECOG_OPERANDS)
2263 /* Now get the operand values and constraints out of the insn. */
2265 decode_asm_operands (body, recog_operand, recog_operand_loc,
2266 constraints, operand_mode);
2269 bcopy ((char *) constraints, (char *) constraints1,
2270 noperands * sizeof (char *));
2271 n_alternatives = n_occurrences (',', constraints[0]) + 1;
2272 for (i = 1; i < noperands; i++)
2273 if (n_alternatives != n_occurrences (',', constraints[i]) + 1)
2275 error_for_asm (insn, "operand constraints differ in number of alternatives");
2276 /* Avoid further trouble with this insn. */
2277 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
2286 /* Ordinary insn: recognize it, get the operands via insn_extract
2287 and get the constraints. */
2289 insn_code_number = recog_memoized (insn);
2290 if (insn_code_number < 0)
2291 fatal_insn_not_found (insn);
2293 reload_n_operands = noperands = insn_n_operands[insn_code_number];
2294 n_alternatives = insn_n_alternatives[insn_code_number];
2295 /* Just return "no reloads" if insn has no operands with constraints. */
2296 if (n_alternatives == 0)
2298 insn_extract (insn);
2299 for (i = 0; i < noperands; i++)
2301 constraints[i] = constraints1[i]
2302 = insn_operand_constraint[insn_code_number][i];
2303 operand_mode[i] = insn_operand_mode[insn_code_number][i];
2312 /* If we will need to know, later, whether some pair of operands
2313 are the same, we must compare them now and save the result.
2314 Reloading the base and index registers will clobber them
2315 and afterward they will fail to match. */
2317 for (i = 0; i < noperands; i++)
2322 substed_operand[i] = recog_operand[i];
2325 modified[i] = RELOAD_READ;
2327 /* Scan this operand's constraint to see if it is an output operand,
2328 an in-out operand, is commutative, or should match another. */
2333 modified[i] = RELOAD_WRITE;
2335 modified[i] = RELOAD_READ_WRITE;
2338 /* The last operand should not be marked commutative. */
2339 if (i == noperands - 1)
2341 if (this_insn_is_asm)
2342 warning_for_asm (this_insn,
2343 "`%%' constraint used with last operand");
2350 else if (c >= '0' && c <= '9')
2353 operands_match[c][i]
2354 = operands_match_p (recog_operand[c], recog_operand[i]);
2356 /* An operand may not match itself. */
2359 if (this_insn_is_asm)
2360 warning_for_asm (this_insn,
2361 "operand %d has constraint %d", i, c);
2366 /* If C can be commuted with C+1, and C might need to match I,
2367 then C+1 might also need to match I. */
2368 if (commutative >= 0)
2370 if (c == commutative || c == commutative + 1)
2372 int other = c + (c == commutative ? 1 : -1);
2373 operands_match[other][i]
2374 = operands_match_p (recog_operand[other], recog_operand[i]);
2376 if (i == commutative || i == commutative + 1)
2378 int other = i + (i == commutative ? 1 : -1);
2379 operands_match[c][other]
2380 = operands_match_p (recog_operand[c], recog_operand[other]);
2382 /* Note that C is supposed to be less than I.
2383 No need to consider altering both C and I because in
2384 that case we would alter one into the other. */
2390 /* Examine each operand that is a memory reference or memory address
2391 and reload parts of the addresses into index registers.
2392 Also here any references to pseudo regs that didn't get hard regs
2393 but are equivalent to constants get replaced in the insn itself
2394 with those constants. Nobody will ever see them again.
2396 Finally, set up the preferred classes of each operand. */
2398 for (i = 0; i < noperands; i++)
2400 register RTX_CODE code = GET_CODE (recog_operand[i]);
2402 address_reloaded[i] = 0;
2403 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2404 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2407 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2408 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2411 if (*constraints[i] == 0)
2412 /* Ignore things like match_operator operands. */
2414 else if (constraints[i][0] == 'p')
2416 find_reloads_address (VOIDmode, NULL_PTR,
2417 recog_operand[i], recog_operand_loc[i],
2418 i, operand_type[i], ind_levels);
2419 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2421 else if (code == MEM)
2423 if (find_reloads_address (GET_MODE (recog_operand[i]),
2424 recog_operand_loc[i],
2425 XEXP (recog_operand[i], 0),
2426 &XEXP (recog_operand[i], 0),
2427 i, address_type[i], ind_levels))
2428 address_reloaded[i] = 1;
2429 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2431 else if (code == SUBREG)
2432 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2433 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2436 && &SET_DEST (set) == recog_operand_loc[i]);
2437 else if (code == PLUS)
2438 /* We can get a PLUS as an "operand" as a result of
2439 register elimination. See eliminate_regs and gen_reload. */
2440 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2441 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2443 else if (code == REG)
2445 /* This is equivalent to calling find_reloads_toplev.
2446 The code is duplicated for speed.
2447 When we find a pseudo always equivalent to a constant,
2448 we replace it by the constant. We must be sure, however,
2449 that we don't try to replace it in the insn in which it
2451 register int regno = REGNO (recog_operand[i]);
2452 if (reg_equiv_constant[regno] != 0
2453 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2454 substed_operand[i] = recog_operand[i]
2455 = reg_equiv_constant[regno];
2456 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2457 that feeds this insn. */
2458 if (reg_equiv_mem[regno] != 0)
2459 substed_operand[i] = recog_operand[i]
2460 = reg_equiv_mem[regno];
2462 if (reg_equiv_address[regno] != 0)
2464 /* If reg_equiv_address is not a constant address, copy it,
2465 since it may be shared. */
2466 rtx address = reg_equiv_address[regno];
2468 if (rtx_varies_p (address))
2469 address = copy_rtx (address);
2471 /* If this is an output operand, we must output a CLOBBER
2472 after INSN so find_equiv_reg knows REGNO is being written.
2473 Mark this insn specially, do we can put our output reloads
2476 if (modified[i] != RELOAD_READ)
2477 PUT_MODE (emit_insn_after (gen_rtx (CLOBBER, VOIDmode,
2482 *recog_operand_loc[i] = recog_operand[i]
2483 = gen_rtx (MEM, GET_MODE (recog_operand[i]), address);
2484 RTX_UNCHANGING_P (recog_operand[i])
2485 = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
2486 find_reloads_address (GET_MODE (recog_operand[i]),
2487 recog_operand_loc[i],
2488 XEXP (recog_operand[i], 0),
2489 &XEXP (recog_operand[i], 0),
2490 i, address_type[i], ind_levels);
2491 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2494 /* If the operand is still a register (we didn't replace it with an
2495 equivalent), get the preferred class to reload it into. */
2496 code = GET_CODE (recog_operand[i]);
2498 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
2499 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2501 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
2502 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2505 /* If this is simply a copy from operand 1 to operand 0, merge the
2506 preferred classes for the operands. */
2507 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2508 && recog_operand[1] == SET_SRC (set))
2510 preferred_class[0] = preferred_class[1]
2511 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2512 pref_or_nothing[0] |= pref_or_nothing[1];
2513 pref_or_nothing[1] |= pref_or_nothing[0];
2516 /* Now see what we need for pseudo-regs that didn't get hard regs
2517 or got the wrong kind of hard reg. For this, we must consider
2518 all the operands together against the register constraints. */
2520 best = MAX_RECOG_OPERANDS + 300;
2523 goal_alternative_swapped = 0;
2526 /* The constraints are made of several alternatives.
2527 Each operand's constraint looks like foo,bar,... with commas
2528 separating the alternatives. The first alternatives for all
2529 operands go together, the second alternatives go together, etc.
2531 First loop over alternatives. */
2533 for (this_alternative_number = 0;
2534 this_alternative_number < n_alternatives;
2535 this_alternative_number++)
2537 /* Loop over operands for one constraint alternative. */
2538 /* LOSERS counts those that don't fit this alternative
2539 and would require loading. */
2541 /* BAD is set to 1 if it some operand can't fit this alternative
2542 even after reloading. */
2544 /* REJECT is a count of how undesirable this alternative says it is
2545 if any reloading is required. If the alternative matches exactly
2546 then REJECT is ignored, but otherwise it gets this much
2547 counted against it in addition to the reloading needed. Each
2548 ? counts three times here since we want the disparaging caused by
2549 a bad register class to only count 1/3 as much. */
2552 this_earlyclobber = 0;
2554 for (i = 0; i < noperands; i++)
2556 register char *p = constraints[i];
2557 register int win = 0;
2558 /* 0 => this operand can be reloaded somehow for this alternative */
2560 /* 0 => this operand can be reloaded if the alternative allows regs. */
2563 register rtx operand = recog_operand[i];
2565 /* Nonzero means this is a MEM that must be reloaded into a reg
2566 regardless of what the constraint says. */
2567 int force_reload = 0;
2569 /* Nonzero if a constant forced into memory would be OK for this
2572 int earlyclobber = 0;
2574 /* If the operand is a SUBREG, extract
2575 the REG or MEM (or maybe even a constant) within.
2576 (Constants can occur as a result of reg_equiv_constant.) */
2578 while (GET_CODE (operand) == SUBREG)
2580 offset += SUBREG_WORD (operand);
2581 operand = SUBREG_REG (operand);
2582 /* Force reload if this is a constant or PLUS or if there may may
2583 be a problem accessing OPERAND in the outer mode. */
2584 if (CONSTANT_P (operand)
2585 || GET_CODE (operand) == PLUS
2586 /* We must force a reload of paradoxical SUBREGs
2587 of a MEM because the alignment of the inner value
2588 may not be enough to do the outer reference. On
2589 big-endian machines, it may also reference outside
2592 On machines that extend byte operations and we have a
2593 SUBREG where both the inner and outer modes are no wider
2594 than a word and the inner mode is narrower, is integral,
2595 and gets extended when loaded from memory, combine.c has
2596 made assumptions about the behavior of the machine in such
2597 register access. If the data is, in fact, in memory we
2598 must always load using the size assumed to be in the
2599 register and let the insn do the different-sized
2601 || ((GET_CODE (operand) == MEM
2602 || (GET_CODE (operand)== REG
2603 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2604 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2605 < BIGGEST_ALIGNMENT)
2606 && (GET_MODE_SIZE (operand_mode[i])
2607 > GET_MODE_SIZE (GET_MODE (operand))))
2608 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2609 #ifdef LOAD_EXTEND_OP
2610 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2611 && (GET_MODE_SIZE (GET_MODE (operand))
2613 && (GET_MODE_SIZE (operand_mode[i])
2614 > GET_MODE_SIZE (GET_MODE (operand)))
2615 && INTEGRAL_MODE_P (GET_MODE (operand))
2616 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2619 /* Subreg of a hard reg which can't handle the subreg's mode
2620 or which would handle that mode in the wrong number of
2621 registers for subregging to work. */
2622 || (GET_CODE (operand) == REG
2623 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2624 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2625 && (GET_MODE_SIZE (GET_MODE (operand))
2627 && ((GET_MODE_SIZE (GET_MODE (operand))
2629 != HARD_REGNO_NREGS (REGNO (operand),
2630 GET_MODE (operand))))
2631 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2636 this_alternative[i] = (int) NO_REGS;
2637 this_alternative_win[i] = 0;
2638 this_alternative_offmemok[i] = 0;
2639 this_alternative_earlyclobber[i] = 0;
2640 this_alternative_matches[i] = -1;
2642 /* An empty constraint or empty alternative
2643 allows anything which matched the pattern. */
2644 if (*p == 0 || *p == ',')
2647 /* Scan this alternative's specs for this operand;
2648 set WIN if the operand fits any letter in this alternative.
2649 Otherwise, clear BADOP if this operand could
2650 fit some letter after reloads,
2651 or set WINREG if this operand could fit after reloads
2652 provided the constraint allows some registers. */
2654 while (*p && (c = *p++) != ',')
2663 /* The last operand should not be marked commutative. */
2664 if (i != noperands - 1)
2677 /* Ignore rest of this alternative as far as
2678 reloading is concerned. */
2679 while (*p && *p != ',') p++;
2688 this_alternative_matches[i] = c;
2689 /* We are supposed to match a previous operand.
2690 If we do, we win if that one did.
2691 If we do not, count both of the operands as losers.
2692 (This is too conservative, since most of the time
2693 only a single reload insn will be needed to make
2694 the two operands win. As a result, this alternative
2695 may be rejected when it is actually desirable.) */
2696 if ((swapped && (c != commutative || i != commutative + 1))
2697 /* If we are matching as if two operands were swapped,
2698 also pretend that operands_match had been computed
2700 But if I is the second of those and C is the first,
2701 don't exchange them, because operands_match is valid
2702 only on one side of its diagonal. */
2704 [(c == commutative || c == commutative + 1)
2705 ? 2*commutative + 1 - c : c]
2706 [(i == commutative || i == commutative + 1)
2707 ? 2*commutative + 1 - i : i])
2708 : operands_match[c][i])
2709 win = this_alternative_win[c];
2712 /* Operands don't match. */
2714 /* Retroactively mark the operand we had to match
2715 as a loser, if it wasn't already. */
2716 if (this_alternative_win[c])
2718 this_alternative_win[c] = 0;
2719 if (this_alternative[c] == (int) NO_REGS)
2721 /* But count the pair only once in the total badness of
2722 this alternative, if the pair can be a dummy reload. */
2724 = find_dummy_reload (recog_operand[i], recog_operand[c],
2725 recog_operand_loc[i], recog_operand_loc[c],
2726 operand_mode[i], operand_mode[c],
2727 this_alternative[c], -1);
2732 /* This can be fixed with reloads if the operand
2733 we are supposed to match can be fixed with reloads. */
2735 this_alternative[i] = this_alternative[c];
2737 /* If we have to reload this operand and some previous
2738 operand also had to match the same thing as this
2739 operand, we don't know how to do that. So reject this
2741 if (! win || force_reload)
2742 for (j = 0; j < i; j++)
2743 if (this_alternative_matches[j]
2744 == this_alternative_matches[i])
2750 /* All necessary reloads for an address_operand
2751 were handled in find_reloads_address. */
2752 this_alternative[i] = (int) BASE_REG_CLASS;
2759 if (GET_CODE (operand) == MEM
2760 || (GET_CODE (operand) == REG
2761 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2762 && reg_renumber[REGNO (operand)] < 0))
2764 if (CONSTANT_P (operand))
2770 if (GET_CODE (operand) == MEM
2771 && ! address_reloaded[i]
2772 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2773 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2778 if (GET_CODE (operand) == MEM
2779 && ! address_reloaded[i]
2780 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2781 || GET_CODE (XEXP (operand, 0)) == POST_INC))
2785 /* Memory operand whose address is not offsettable. */
2789 if (GET_CODE (operand) == MEM
2790 && ! (ind_levels ? offsettable_memref_p (operand)
2791 : offsettable_nonstrict_memref_p (operand))
2792 /* Certain mem addresses will become offsettable
2793 after they themselves are reloaded. This is important;
2794 we don't want our own handling of unoffsettables
2795 to override the handling of reg_equiv_address. */
2796 && !(GET_CODE (XEXP (operand, 0)) == REG
2798 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
2802 /* Memory operand whose address is offsettable. */
2806 if ((GET_CODE (operand) == MEM
2807 /* If IND_LEVELS, find_reloads_address won't reload a
2808 pseudo that didn't get a hard reg, so we have to
2809 reject that case. */
2810 && (ind_levels ? offsettable_memref_p (operand)
2811 : offsettable_nonstrict_memref_p (operand)))
2812 /* A reloaded auto-increment address is offsettable,
2813 because it is now just a simple register indirect. */
2814 || (GET_CODE (operand) == MEM
2815 && address_reloaded[i]
2816 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2817 || GET_CODE (XEXP (operand, 0)) == PRE_DEC
2818 || GET_CODE (XEXP (operand, 0)) == POST_INC
2819 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2820 /* Certain mem addresses will become offsettable
2821 after they themselves are reloaded. This is important;
2822 we don't want our own handling of unoffsettables
2823 to override the handling of reg_equiv_address. */
2824 || (GET_CODE (operand) == MEM
2825 && GET_CODE (XEXP (operand, 0)) == REG
2827 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))
2828 || (GET_CODE (operand) == REG
2829 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2830 && reg_renumber[REGNO (operand)] < 0
2831 /* If reg_equiv_address is nonzero, we will be
2832 loading it into a register; hence it will be
2833 offsettable, but we cannot say that reg_equiv_mem
2834 is offsettable without checking. */
2835 && ((reg_equiv_mem[REGNO (operand)] != 0
2836 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
2837 || (reg_equiv_address[REGNO (operand)] != 0))))
2839 if (CONSTANT_P (operand) || GET_CODE (operand) == MEM)
2846 /* Output operand that is stored before the need for the
2847 input operands (and their index registers) is over. */
2848 earlyclobber = 1, this_earlyclobber = 1;
2852 #ifndef REAL_ARITHMETIC
2853 /* Match any floating double constant, but only if
2854 we can examine the bits of it reliably. */
2855 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
2856 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
2857 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
2860 if (GET_CODE (operand) == CONST_DOUBLE)
2865 if (GET_CODE (operand) == CONST_DOUBLE)
2871 if (GET_CODE (operand) == CONST_DOUBLE
2872 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
2877 if (GET_CODE (operand) == CONST_INT
2878 || (GET_CODE (operand) == CONST_DOUBLE
2879 && GET_MODE (operand) == VOIDmode))
2882 if (CONSTANT_P (operand)
2883 #ifdef LEGITIMATE_PIC_OPERAND_P
2884 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
2891 if (GET_CODE (operand) == CONST_INT
2892 || (GET_CODE (operand) == CONST_DOUBLE
2893 && GET_MODE (operand) == VOIDmode))
2905 if (GET_CODE (operand) == CONST_INT
2906 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
2916 /* A PLUS is never a valid operand, but reload can make
2917 it from a register when eliminating registers. */
2918 && GET_CODE (operand) != PLUS
2919 /* A SCRATCH is not a valid operand. */
2920 && GET_CODE (operand) != SCRATCH
2921 #ifdef LEGITIMATE_PIC_OPERAND_P
2922 && (! CONSTANT_P (operand)
2924 || LEGITIMATE_PIC_OPERAND_P (operand))
2926 && (GENERAL_REGS == ALL_REGS
2927 || GET_CODE (operand) != REG
2928 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
2929 && reg_renumber[REGNO (operand)] < 0)))
2931 /* Drop through into 'r' case */
2935 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
2938 #ifdef EXTRA_CONSTRAINT
2944 if (EXTRA_CONSTRAINT (operand, c))
2951 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
2954 if (GET_MODE (operand) == BLKmode)
2957 if (GET_CODE (operand) == REG
2958 && reg_fits_class_p (operand, this_alternative[i],
2959 offset, GET_MODE (recog_operand[i])))
2966 /* If this operand could be handled with a reg,
2967 and some reg is allowed, then this operand can be handled. */
2968 if (winreg && this_alternative[i] != (int) NO_REGS)
2971 /* Record which operands fit this alternative. */
2972 this_alternative_earlyclobber[i] = earlyclobber;
2973 if (win && ! force_reload)
2974 this_alternative_win[i] = 1;
2977 int const_to_mem = 0;
2979 this_alternative_offmemok[i] = offmemok;
2983 /* Alternative loses if it has no regs for a reg operand. */
2984 if (GET_CODE (operand) == REG
2985 && this_alternative[i] == (int) NO_REGS
2986 && this_alternative_matches[i] < 0)
2989 /* Alternative loses if it requires a type of reload not
2990 permitted for this insn. We can always reload SCRATCH
2991 and objects with a REG_UNUSED note. */
2992 if (GET_CODE (operand) != SCRATCH
2993 && modified[i] != RELOAD_READ && no_output_reloads
2994 && ! find_reg_note (insn, REG_UNUSED, operand))
2996 else if (modified[i] != RELOAD_WRITE && no_input_reloads)
2999 /* If this is a constant that is reloaded into the desired
3000 class by copying it to memory first, count that as another
3001 reload. This is consistent with other code and is
3002 required to avoid choosing another alternative when
3003 the constant is moved into memory by this function on
3004 an early reload pass. Note that the test here is
3005 precisely the same as in the code below that calls
3007 if (CONSTANT_P (operand)
3008 /* force_const_mem does not accept HIGH. */
3009 && GET_CODE (operand) != HIGH
3010 && (PREFERRED_RELOAD_CLASS (operand,
3011 (enum reg_class) this_alternative[i])
3013 && operand_mode[i] != VOIDmode)
3016 if (this_alternative[i] != (int) NO_REGS)
3020 /* If we can't reload this value at all, reject this
3021 alternative. Note that we could also lose due to
3022 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3025 if (! CONSTANT_P (operand)
3026 && (enum reg_class) this_alternative[i] != NO_REGS
3027 && (PREFERRED_RELOAD_CLASS (operand,
3028 (enum reg_class) this_alternative[i])
3032 /* We prefer to reload pseudos over reloading other things,
3033 since such reloads may be able to be eliminated later.
3034 If we are reloading a SCRATCH, we won't be generating any
3035 insns, just using a register, so it is also preferred.
3036 So bump REJECT in other cases. Don't do this in the
3037 case where we are forcing a constant into memory and
3038 it will then win since we don't want to have a different
3039 alternative match then. */
3040 if (! (GET_CODE (operand) == REG
3041 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3042 && GET_CODE (operand) != SCRATCH
3043 && ! (const_to_mem && constmemok))
3047 /* If this operand is a pseudo register that didn't get a hard
3048 reg and this alternative accepts some register, see if the
3049 class that we want is a subset of the preferred class for this
3050 register. If not, but it intersects that class, use the
3051 preferred class instead. If it does not intersect the preferred
3052 class, show that usage of this alternative should be discouraged;
3053 it will be discouraged more still if the register is `preferred
3054 or nothing'. We do this because it increases the chance of
3055 reusing our spill register in a later insn and avoiding a pair
3056 of memory stores and loads.
3058 Don't bother with this if this alternative will accept this
3061 Don't do this for a multiword operand, since it is only a
3062 small win and has the risk of requiring more spill registers,
3063 which could cause a large loss.
3065 Don't do this if the preferred class has only one register
3066 because we might otherwise exhaust the class. */
3069 if (! win && this_alternative[i] != (int) NO_REGS
3070 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3071 && reg_class_size[(int) preferred_class[i]] > 1)
3073 if (! reg_class_subset_p (this_alternative[i],
3074 preferred_class[i]))
3076 /* Since we don't have a way of forming the intersection,
3077 we just do something special if the preferred class
3078 is a subset of the class we have; that's the most
3079 common case anyway. */
3080 if (reg_class_subset_p (preferred_class[i],
3081 this_alternative[i]))
3082 this_alternative[i] = (int) preferred_class[i];
3084 reject += (1 + pref_or_nothing[i]);
3089 /* Now see if any output operands that are marked "earlyclobber"
3090 in this alternative conflict with any input operands
3091 or any memory addresses. */
3093 for (i = 0; i < noperands; i++)
3094 if (this_alternative_earlyclobber[i]
3095 && this_alternative_win[i])
3097 struct decomposition early_data;
3099 early_data = decompose (recog_operand[i]);
3101 if (modified[i] == RELOAD_READ)
3103 if (this_insn_is_asm)
3104 warning_for_asm (this_insn,
3105 "`&' constraint used with input operand");
3111 if (this_alternative[i] == NO_REGS)
3113 this_alternative_earlyclobber[i] = 0;
3114 if (this_insn_is_asm)
3115 error_for_asm (this_insn,
3116 "`&' constraint used with no register class");
3121 for (j = 0; j < noperands; j++)
3122 /* Is this an input operand or a memory ref? */
3123 if ((GET_CODE (recog_operand[j]) == MEM
3124 || modified[j] != RELOAD_WRITE)
3126 /* Ignore things like match_operator operands. */
3127 && *constraints1[j] != 0
3128 /* Don't count an input operand that is constrained to match
3129 the early clobber operand. */
3130 && ! (this_alternative_matches[j] == i
3131 && rtx_equal_p (recog_operand[i], recog_operand[j]))
3132 /* Is it altered by storing the earlyclobber operand? */
3133 && !immune_p (recog_operand[j], recog_operand[i], early_data))
3135 /* If the output is in a single-reg class,
3136 it's costly to reload it, so reload the input instead. */
3137 if (reg_class_size[this_alternative[i]] == 1
3138 && (GET_CODE (recog_operand[j]) == REG
3139 || GET_CODE (recog_operand[j]) == SUBREG))
3142 this_alternative_win[j] = 0;
3147 /* If an earlyclobber operand conflicts with something,
3148 it must be reloaded, so request this and count the cost. */
3152 this_alternative_win[i] = 0;
3153 for (j = 0; j < noperands; j++)
3154 if (this_alternative_matches[j] == i
3155 && this_alternative_win[j])
3157 this_alternative_win[j] = 0;
3163 /* If one alternative accepts all the operands, no reload required,
3164 choose that alternative; don't consider the remaining ones. */
3167 /* Unswap these so that they are never swapped at `finish'. */
3168 if (commutative >= 0)
3170 recog_operand[commutative] = substed_operand[commutative];
3171 recog_operand[commutative + 1]
3172 = substed_operand[commutative + 1];
3174 for (i = 0; i < noperands; i++)
3176 goal_alternative_win[i] = 1;
3177 goal_alternative[i] = this_alternative[i];
3178 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3179 goal_alternative_matches[i] = this_alternative_matches[i];
3180 goal_alternative_earlyclobber[i]
3181 = this_alternative_earlyclobber[i];
3183 goal_alternative_number = this_alternative_number;
3184 goal_alternative_swapped = swapped;
3185 goal_earlyclobber = this_earlyclobber;
3189 /* REJECT, set by the ! and ? constraint characters and when a register
3190 would be reloaded into a non-preferred class, discourages the use of
3191 this alternative for a reload goal. REJECT is incremented by three
3192 for each ? and one for each non-preferred class. */
3193 losers = losers * 3 + reject;
3195 /* If this alternative can be made to work by reloading,
3196 and it needs less reloading than the others checked so far,
3197 record it as the chosen goal for reloading. */
3198 if (! bad && best > losers)
3200 for (i = 0; i < noperands; i++)
3202 goal_alternative[i] = this_alternative[i];
3203 goal_alternative_win[i] = this_alternative_win[i];
3204 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3205 goal_alternative_matches[i] = this_alternative_matches[i];
3206 goal_alternative_earlyclobber[i]
3207 = this_alternative_earlyclobber[i];
3209 goal_alternative_swapped = swapped;
3211 goal_alternative_number = this_alternative_number;
3212 goal_earlyclobber = this_earlyclobber;
3216 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3217 then we need to try each alternative twice,
3218 the second time matching those two operands
3219 as if we had exchanged them.
3220 To do this, really exchange them in operands.
3222 If we have just tried the alternatives the second time,
3223 return operands to normal and drop through. */
3225 if (commutative >= 0)
3230 register enum reg_class tclass;
3233 recog_operand[commutative] = substed_operand[commutative + 1];
3234 recog_operand[commutative + 1] = substed_operand[commutative];
3236 tclass = preferred_class[commutative];
3237 preferred_class[commutative] = preferred_class[commutative + 1];
3238 preferred_class[commutative + 1] = tclass;
3240 t = pref_or_nothing[commutative];
3241 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3242 pref_or_nothing[commutative + 1] = t;
3244 bcopy ((char *) constraints1, (char *) constraints,
3245 noperands * sizeof (char *));
3250 recog_operand[commutative] = substed_operand[commutative];
3251 recog_operand[commutative + 1] = substed_operand[commutative + 1];
3255 /* The operands don't meet the constraints.
3256 goal_alternative describes the alternative
3257 that we could reach by reloading the fewest operands.
3258 Reload so as to fit it. */
3260 if (best == MAX_RECOG_OPERANDS + 300)
3262 /* No alternative works with reloads?? */
3263 if (insn_code_number >= 0)
3265 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3266 /* Avoid further trouble with this insn. */
3267 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3272 /* Jump to `finish' from above if all operands are valid already.
3273 In that case, goal_alternative_win is all 1. */
3276 /* Right now, for any pair of operands I and J that are required to match,
3278 goal_alternative_matches[J] is I.
3279 Set up goal_alternative_matched as the inverse function:
3280 goal_alternative_matched[I] = J. */
3282 for (i = 0; i < noperands; i++)
3283 goal_alternative_matched[i] = -1;
3285 for (i = 0; i < noperands; i++)
3286 if (! goal_alternative_win[i]
3287 && goal_alternative_matches[i] >= 0)
3288 goal_alternative_matched[goal_alternative_matches[i]] = i;
3290 /* If the best alternative is with operands 1 and 2 swapped,
3291 consider them swapped before reporting the reloads. Update the
3292 operand numbers of any reloads already pushed. */
3294 if (goal_alternative_swapped)
3298 tem = substed_operand[commutative];
3299 substed_operand[commutative] = substed_operand[commutative + 1];
3300 substed_operand[commutative + 1] = tem;
3301 tem = recog_operand[commutative];
3302 recog_operand[commutative] = recog_operand[commutative + 1];
3303 recog_operand[commutative + 1] = tem;
3305 for (i = 0; i < n_reloads; i++)
3307 if (reload_opnum[i] == commutative)
3308 reload_opnum[i] = commutative + 1;
3309 else if (reload_opnum[i] == commutative + 1)
3310 reload_opnum[i] = commutative;
3314 /* Perform whatever substitutions on the operands we are supposed
3315 to make due to commutativity or replacement of registers
3316 with equivalent constants or memory slots. */
3318 for (i = 0; i < noperands; i++)
3320 *recog_operand_loc[i] = substed_operand[i];
3321 /* While we are looping on operands, initialize this. */
3322 operand_reloadnum[i] = -1;
3324 /* If this is an earlyclobber operand, we need to widen the scope.
3325 The reload must remain valid from the start of the insn being
3326 reloaded until after the operand is stored into its destination.
3327 We approximate this with RELOAD_OTHER even though we know that we
3328 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3330 One special case that is worth checking is when we have an
3331 output that is earlyclobber but isn't used past the insn (typically
3332 a SCRATCH). In this case, we only need have the reload live
3333 through the insn itself, but not for any of our input or output
3336 In any case, anything needed to address this operand can remain
3337 however they were previously categorized. */
3339 if (goal_alternative_earlyclobber[i])
3341 = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
3342 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3345 /* Any constants that aren't allowed and can't be reloaded
3346 into registers are here changed into memory references. */
3347 for (i = 0; i < noperands; i++)
3348 if (! goal_alternative_win[i]
3349 && CONSTANT_P (recog_operand[i])
3350 /* force_const_mem does not accept HIGH. */
3351 && GET_CODE (recog_operand[i]) != HIGH
3352 && (PREFERRED_RELOAD_CLASS (recog_operand[i],
3353 (enum reg_class) goal_alternative[i])
3355 && operand_mode[i] != VOIDmode)
3357 *recog_operand_loc[i] = recog_operand[i]
3358 = find_reloads_toplev (force_const_mem (operand_mode[i],
3360 i, address_type[i], ind_levels, 0);
3361 if (alternative_allows_memconst (constraints1[i],
3362 goal_alternative_number))
3363 goal_alternative_win[i] = 1;
3366 /* Record the values of the earlyclobber operands for the caller. */
3367 if (goal_earlyclobber)
3368 for (i = 0; i < noperands; i++)
3369 if (goal_alternative_earlyclobber[i])
3370 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3372 /* Now record reloads for all the operands that need them. */
3373 for (i = 0; i < noperands; i++)
3374 if (! goal_alternative_win[i])
3376 /* Operands that match previous ones have already been handled. */
3377 if (goal_alternative_matches[i] >= 0)
3379 /* Handle an operand with a nonoffsettable address
3380 appearing where an offsettable address will do
3381 by reloading the address into a base register.
3383 ??? We can also do this when the operand is a register and
3384 reg_equiv_mem is not offsettable, but this is a bit tricky,
3385 so we don't bother with it. It may not be worth doing. */
3386 else if (goal_alternative_matched[i] == -1
3387 && goal_alternative_offmemok[i]
3388 && GET_CODE (recog_operand[i]) == MEM)
3390 operand_reloadnum[i]
3391 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
3392 &XEXP (recog_operand[i], 0), NULL_PTR,
3393 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
3394 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3395 reload_inc[operand_reloadnum[i]]
3396 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
3398 /* If this operand is an output, we will have made any
3399 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3400 now we are treating part of the operand as an input, so
3401 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3403 if (modified[i] == RELOAD_WRITE)
3404 for (j = 0; j < n_reloads; j++)
3405 if (reload_opnum[j] == i
3406 && reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3407 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
3409 else if (goal_alternative_matched[i] == -1)
3410 operand_reloadnum[i] =
3411 push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3412 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3413 (modified[i] != RELOAD_WRITE ?
3414 recog_operand_loc[i] : 0),
3415 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
3416 (enum reg_class) goal_alternative[i],
3417 (modified[i] == RELOAD_WRITE
3418 ? VOIDmode : operand_mode[i]),
3419 (modified[i] == RELOAD_READ
3420 ? VOIDmode : operand_mode[i]),
3421 (insn_code_number < 0 ? 0
3422 : insn_operand_strict_low[insn_code_number][i]),
3423 0, i, operand_type[i]);
3424 /* In a matching pair of operands, one must be input only
3425 and the other must be output only.
3426 Pass the input operand as IN and the other as OUT. */
3427 else if (modified[i] == RELOAD_READ
3428 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3430 operand_reloadnum[i]
3431 = push_reload (recog_operand[i],
3432 recog_operand[goal_alternative_matched[i]],
3433 recog_operand_loc[i],
3434 recog_operand_loc[goal_alternative_matched[i]],
3435 (enum reg_class) goal_alternative[i],
3437 operand_mode[goal_alternative_matched[i]],
3438 0, 0, i, RELOAD_OTHER);
3439 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3441 else if (modified[i] == RELOAD_WRITE
3442 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3444 operand_reloadnum[goal_alternative_matched[i]]
3445 = push_reload (recog_operand[goal_alternative_matched[i]],
3447 recog_operand_loc[goal_alternative_matched[i]],
3448 recog_operand_loc[i],
3449 (enum reg_class) goal_alternative[i],
3450 operand_mode[goal_alternative_matched[i]],
3452 0, 0, i, RELOAD_OTHER);
3453 operand_reloadnum[i] = output_reloadnum;
3455 else if (insn_code_number >= 0)
3459 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3460 /* Avoid further trouble with this insn. */
3461 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3466 else if (goal_alternative_matched[i] < 0
3467 && goal_alternative_matches[i] < 0
3470 /* For each non-matching operand that's a MEM or a pseudo-register
3471 that didn't get a hard register, make an optional reload.
3472 This may get done even if the insn needs no reloads otherwise. */
3474 rtx operand = recog_operand[i];
3476 while (GET_CODE (operand) == SUBREG)
3477 operand = XEXP (operand, 0);
3478 if ((GET_CODE (operand) == MEM
3479 || (GET_CODE (operand) == REG
3480 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3481 && (enum reg_class) goal_alternative[i] != NO_REGS
3482 && ! no_input_reloads
3483 /* Optional output reloads don't do anything and we mustn't
3484 make in-out reloads on insns that are not permitted output
3486 && (modified[i] == RELOAD_READ
3487 || (modified[i] == RELOAD_READ_WRITE && ! no_output_reloads)))
3488 operand_reloadnum[i]
3489 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3490 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3491 (modified[i] != RELOAD_WRITE
3492 ? recog_operand_loc[i] : 0),
3493 (modified[i] != RELOAD_READ
3494 ? recog_operand_loc[i] : 0),
3495 (enum reg_class) goal_alternative[i],
3496 (modified[i] == RELOAD_WRITE
3497 ? VOIDmode : operand_mode[i]),
3498 (modified[i] == RELOAD_READ
3499 ? VOIDmode : operand_mode[i]),
3500 (insn_code_number < 0 ? 0
3501 : insn_operand_strict_low[insn_code_number][i]),
3502 1, i, operand_type[i]);
3504 else if (goal_alternative_matches[i] >= 0
3505 && goal_alternative_win[goal_alternative_matches[i]]
3506 && modified[i] == RELOAD_READ
3507 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3508 && ! no_input_reloads && ! no_output_reloads
3511 /* Similarly, make an optional reload for a pair of matching
3512 objects that are in MEM or a pseudo that didn't get a hard reg. */
3514 rtx operand = recog_operand[i];
3516 while (GET_CODE (operand) == SUBREG)
3517 operand = XEXP (operand, 0);
3518 if ((GET_CODE (operand) == MEM
3519 || (GET_CODE (operand) == REG
3520 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3521 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3523 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3524 = push_reload (recog_operand[goal_alternative_matches[i]],
3526 recog_operand_loc[goal_alternative_matches[i]],
3527 recog_operand_loc[i],
3528 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3529 operand_mode[goal_alternative_matches[i]],
3531 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3534 /* If this insn pattern contains any MATCH_DUP's, make sure that
3535 they will be substituted if the operands they match are substituted.
3536 Also do now any substitutions we already did on the operands.
3538 Don't do this if we aren't making replacements because we might be
3539 propagating things allocated by frame pointer elimination into places
3540 it doesn't expect. */
3542 if (insn_code_number >= 0 && replace)
3543 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3545 int opno = recog_dup_num[i];
3546 *recog_dup_loc[i] = *recog_operand_loc[opno];
3547 if (operand_reloadnum[opno] >= 0)
3548 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3549 insn_operand_mode[insn_code_number][opno]);
3553 /* This loses because reloading of prior insns can invalidate the equivalence
3554 (or at least find_equiv_reg isn't smart enough to find it any more),
3555 causing this insn to need more reload regs than it needed before.
3556 It may be too late to make the reload regs available.
3557 Now this optimization is done safely in choose_reload_regs. */
3559 /* For each reload of a reg into some other class of reg,
3560 search for an existing equivalent reg (same value now) in the right class.
3561 We can use it as long as we don't need to change its contents. */
3562 for (i = 0; i < n_reloads; i++)
3563 if (reload_reg_rtx[i] == 0
3564 && reload_in[i] != 0
3565 && GET_CODE (reload_in[i]) == REG
3566 && reload_out[i] == 0)
3569 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3570 static_reload_reg_p, 0, reload_inmode[i]);
3571 /* Prevent generation of insn to load the value
3572 because the one we found already has the value. */
3573 if (reload_reg_rtx[i])
3574 reload_in[i] = reload_reg_rtx[i];
3578 /* Perhaps an output reload can be combined with another
3579 to reduce needs by one. */
3580 if (!goal_earlyclobber)
3583 /* If we have a pair of reloads for parts of an address, they are reloading
3584 the same object, the operands themselves were not reloaded, and they
3585 are for two operands that are supposed to match, merge the reloads and
3586 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3588 for (i = 0; i < n_reloads; i++)
3592 for (j = i + 1; j < n_reloads; j++)
3593 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3594 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
3595 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
3596 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3597 && rtx_equal_p (reload_in[i], reload_in[j])
3598 && (operand_reloadnum[reload_opnum[i]] < 0
3599 || reload_optional[operand_reloadnum[reload_opnum[i]]])
3600 && (operand_reloadnum[reload_opnum[j]] < 0
3601 || reload_optional[operand_reloadnum[reload_opnum[j]]])
3602 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
3603 || (goal_alternative_matches[reload_opnum[j]]
3604 == reload_opnum[i])))
3606 for (k = 0; k < n_replacements; k++)
3607 if (replacements[k].what == j)
3608 replacements[k].what = i;
3610 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3615 /* Scan all the reloads and update their type.
3616 If a reload is for the address of an operand and we didn't reload
3617 that operand, change the type. Similarly, change the operand number
3618 of a reload when two operands match. If a reload is optional, treat it
3619 as though the operand isn't reloaded.
3621 ??? This latter case is somewhat odd because if we do the optional
3622 reload, it means the object is hanging around. Thus we need only
3623 do the address reload if the optional reload was NOT done.
3625 Change secondary reloads to be the address type of their operand, not
3628 If an operand's reload is now RELOAD_OTHER, change any
3629 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3630 RELOAD_FOR_OTHER_ADDRESS. */
3632 for (i = 0; i < n_reloads; i++)
3634 if (reload_secondary_p[i]
3635 && reload_when_needed[i] == operand_type[reload_opnum[i]])
3636 reload_when_needed[i] = address_type[reload_opnum[i]];
3638 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3639 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
3640 && (operand_reloadnum[reload_opnum[i]] < 0
3641 || reload_optional[operand_reloadnum[reload_opnum[i]]]))
3643 /* If we have a secondary reload to go along with this reload,
3644 change its type to RELOAD_FOR_OPADDR_ADDR. */
3646 if (reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3647 && reload_secondary_in_reload[i] != -1)
3649 int secondary_in_reload = reload_secondary_in_reload[i];
3651 reload_when_needed[secondary_in_reload] =
3652 RELOAD_FOR_OPADDR_ADDR;
3654 /* If there's a tertiary reload we have to change it also. */
3655 if (secondary_in_reload > 0
3656 && reload_secondary_in_reload[secondary_in_reload] != -1)
3657 reload_when_needed[reload_secondary_in_reload[secondary_in_reload]]
3658 = RELOAD_FOR_OPADDR_ADDR;
3661 if (reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3662 && reload_secondary_out_reload[i] != -1)
3664 int secondary_out_reload = reload_secondary_out_reload[i];
3666 reload_when_needed[secondary_out_reload] =
3667 RELOAD_FOR_OPADDR_ADDR;
3669 /* If there's a tertiary reload we have to change it also. */
3670 if (secondary_out_reload
3671 && reload_secondary_out_reload[secondary_out_reload] != -1)
3672 reload_when_needed[reload_secondary_out_reload[secondary_out_reload]]
3673 = RELOAD_FOR_OPADDR_ADDR;
3675 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3678 if (reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3679 && operand_reloadnum[reload_opnum[i]] >= 0
3680 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
3682 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
3684 if (goal_alternative_matches[reload_opnum[i]] >= 0)
3685 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
3688 /* See if we have any reloads that are now allowed to be merged
3689 because we've changed when the reload is needed to
3690 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3691 check for the most common cases. */
3693 for (i = 0; i < n_reloads; i++)
3694 if (reload_in[i] != 0 && reload_out[i] == 0
3695 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
3696 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
3697 for (j = 0; j < n_reloads; j++)
3698 if (i != j && reload_in[j] != 0 && reload_out[j] == 0
3699 && reload_when_needed[j] == reload_when_needed[i]
3700 && MATCHES (reload_in[i], reload_in[j])
3701 && reload_reg_class[i] == reload_reg_class[j]
3702 && !reload_nocombine[i] && !reload_nocombine[j]
3703 && reload_reg_rtx[i] == reload_reg_rtx[j])
3705 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
3706 transfer_replacements (i, j);
3710 #else /* no REGISTER_CONSTRAINTS */
3712 int insn_code_number;
3713 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
3715 rtx body = PATTERN (insn);
3719 n_earlyclobbers = 0;
3720 replace_reloads = replace;
3723 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3724 Store the operand values in RECOG_OPERAND and the locations
3725 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3726 Return if the insn needs no reload processing. */
3728 switch (GET_CODE (body))
3739 noperands = asm_noperands (body);
3742 /* This insn is an `asm' with operands.
3743 First, find out how many operands, and allocate space. */
3745 insn_code_number = -1;
3746 /* ??? This is a bug! ???
3747 Give up and delete this insn if it has too many operands. */
3748 if (noperands > MAX_RECOG_OPERANDS)
3751 /* Now get the operand values out of the insn. */
3753 decode_asm_operands (body, recog_operand, recog_operand_loc,
3754 NULL_PTR, NULL_PTR);
3759 /* Ordinary insn: recognize it, allocate space for operands and
3760 constraints, and get them out via insn_extract. */
3762 insn_code_number = recog_memoized (insn);
3763 noperands = insn_n_operands[insn_code_number];
3764 insn_extract (insn);
3770 for (i = 0; i < noperands; i++)
3772 register RTX_CODE code = GET_CODE (recog_operand[i]);
3773 int is_set_dest = GET_CODE (body) == SET && (i == 0);
3775 if (insn_code_number >= 0)
3776 if (insn_operand_address_p[insn_code_number][i])
3777 find_reloads_address (VOIDmode, NULL_PTR,
3778 recog_operand[i], recog_operand_loc[i],
3779 i, RELOAD_FOR_INPUT, ind_levels);
3781 /* In these cases, we can't tell if the operand is an input
3782 or an output, so be conservative. In practice it won't be
3786 find_reloads_address (GET_MODE (recog_operand[i]),
3787 recog_operand_loc[i],
3788 XEXP (recog_operand[i], 0),
3789 &XEXP (recog_operand[i], 0),
3790 i, RELOAD_OTHER, ind_levels);
3792 recog_operand[i] = *recog_operand_loc[i]
3793 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
3794 ind_levels, is_set_dest);
3797 register int regno = REGNO (recog_operand[i]);
3798 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3799 recog_operand[i] = *recog_operand_loc[i]
3800 = reg_equiv_constant[regno];
3801 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3802 that feeds this insn. */
3803 if (reg_equiv_mem[regno] != 0)
3804 recog_operand[i] = *recog_operand_loc[i]
3805 = reg_equiv_mem[regno];
3810 /* Perhaps an output reload can be combined with another
3811 to reduce needs by one. */
3812 if (!goal_earlyclobber)
3814 #endif /* no REGISTER_CONSTRAINTS */
3817 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3818 accepts a memory operand with constant address. */
3821 alternative_allows_memconst (constraint, altnum)
3826 /* Skip alternatives before the one requested. */
3829 while (*constraint++ != ',');
3832 /* Scan the requested alternative for 'm' or 'o'.
3833 If one of them is present, this alternative accepts memory constants. */
3834 while ((c = *constraint++) && c != ',' && c != '#')
3835 if (c == 'm' || c == 'o')
3840 /* Scan X for memory references and scan the addresses for reloading.
3841 Also checks for references to "constant" regs that we want to eliminate
3842 and replaces them with the values they stand for.
3843 We may alter X destructively if it contains a reference to such.
3844 If X is just a constant reg, we return the equivalent value
3847 IND_LEVELS says how many levels of indirect addressing this machine
3850 OPNUM and TYPE identify the purpose of the reload.
3852 IS_SET_DEST is true if X is the destination of a SET, which is not
3853 appropriate to be replaced by a constant. */
3856 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest)
3859 enum reload_type type;
3863 register RTX_CODE code = GET_CODE (x);
3865 register char *fmt = GET_RTX_FORMAT (code);
3870 /* This code is duplicated for speed in find_reloads. */
3871 register int regno = REGNO (x);
3872 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3873 x = reg_equiv_constant[regno];
3875 /* This creates (subreg (mem...)) which would cause an unnecessary
3876 reload of the mem. */
3877 else if (reg_equiv_mem[regno] != 0)
3878 x = reg_equiv_mem[regno];
3880 else if (reg_equiv_address[regno] != 0)
3882 /* If reg_equiv_address varies, it may be shared, so copy it. */
3883 rtx addr = reg_equiv_address[regno];
3885 if (rtx_varies_p (addr))
3886 addr = copy_rtx (addr);
3888 x = gen_rtx (MEM, GET_MODE (x), addr);
3889 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3890 find_reloads_address (GET_MODE (x), NULL_PTR,
3892 &XEXP (x, 0), opnum, type, ind_levels);
3899 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
3900 opnum, type, ind_levels);
3904 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
3906 /* Check for SUBREG containing a REG that's equivalent to a constant.
3907 If the constant has a known value, truncate it right now.
3908 Similarly if we are extracting a single-word of a multi-word
3909 constant. If the constant is symbolic, allow it to be substituted
3910 normally. push_reload will strip the subreg later. If the
3911 constant is VOIDmode, abort because we will lose the mode of
3912 the register (this should never happen because one of the cases
3913 above should handle it). */
3915 register int regno = REGNO (SUBREG_REG (x));
3918 if (subreg_lowpart_p (x)
3919 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3920 && reg_equiv_constant[regno] != 0
3921 && (tem = gen_lowpart_common (GET_MODE (x),
3922 reg_equiv_constant[regno])) != 0)
3925 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
3926 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3927 && reg_equiv_constant[regno] != 0
3928 && (tem = operand_subword (reg_equiv_constant[regno],
3930 GET_MODE (SUBREG_REG (x)))) != 0)
3933 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3934 && reg_equiv_constant[regno] != 0
3935 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
3938 /* If the subreg contains a reg that will be converted to a mem,
3939 convert the subreg to a narrower memref now.
3940 Otherwise, we would get (subreg (mem ...) ...),
3941 which would force reload of the mem.
3943 We also need to do this if there is an equivalent MEM that is
3944 not offsettable. In that case, alter_subreg would produce an
3945 invalid address on big-endian machines.
3947 For machines that extend byte loads, we must not reload using
3948 a wider mode if we have a paradoxical SUBREG. find_reloads will
3949 force a reload in that case. So we should not do anything here. */
3951 else if (regno >= FIRST_PSEUDO_REGISTER
3952 #ifdef LOAD_EXTEND_OP
3953 && (GET_MODE_SIZE (GET_MODE (x))
3954 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3956 && (reg_equiv_address[regno] != 0
3957 || (reg_equiv_mem[regno] != 0
3958 && (! strict_memory_address_p (GET_MODE (x),
3959 XEXP (reg_equiv_mem[regno], 0))
3960 || ! offsettable_memref_p (reg_equiv_mem[regno])))))
3962 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
3963 rtx addr = (reg_equiv_address[regno] ? reg_equiv_address[regno]
3964 : XEXP (reg_equiv_mem[regno], 0));
3965 if (BYTES_BIG_ENDIAN)
3968 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
3969 offset += MIN (size, UNITS_PER_WORD);
3970 size = GET_MODE_SIZE (GET_MODE (x));
3971 offset -= MIN (size, UNITS_PER_WORD);
3973 addr = plus_constant (addr, offset);
3974 x = gen_rtx (MEM, GET_MODE (x), addr);
3975 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3976 find_reloads_address (GET_MODE (x), NULL_PTR,
3978 &XEXP (x, 0), opnum, type, ind_levels);
3983 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3986 XEXP (x, i) = find_reloads_toplev (XEXP (x, i), opnum, type,
3987 ind_levels, is_set_dest);
3992 /* Return a mem ref for the memory equivalent of reg REGNO.
3993 This mem ref is not shared with anything. */
3996 make_memloc (ad, regno)
4001 rtx tem = reg_equiv_address[regno];
4003 #if 0 /* We cannot safely reuse a memloc made here;
4004 if the pseudo appears twice, and its mem needs a reload,
4005 it gets two separate reloads assigned, but it only
4006 gets substituted with the second of them;
4007 then it can get used before that reload reg gets loaded up. */
4008 for (i = 0; i < n_memlocs; i++)
4009 if (rtx_equal_p (tem, XEXP (memlocs[i], 0)))
4013 /* If TEM might contain a pseudo, we must copy it to avoid
4014 modifying it when we do the substitution for the reload. */
4015 if (rtx_varies_p (tem))
4016 tem = copy_rtx (tem);
4018 tem = gen_rtx (MEM, GET_MODE (ad), tem);
4019 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4020 memlocs[n_memlocs++] = tem;
4024 /* Record all reloads needed for handling memory address AD
4025 which appears in *LOC in a memory reference to mode MODE
4026 which itself is found in location *MEMREFLOC.
4027 Note that we take shortcuts assuming that no multi-reg machine mode
4028 occurs as part of an address.
4030 OPNUM and TYPE specify the purpose of this reload.
4032 IND_LEVELS says how many levels of indirect addressing this machine
4035 Value is nonzero if this address is reloaded or replaced as a whole.
4036 This is interesting to the caller if the address is an autoincrement.
4038 Note that there is no verification that the address will be valid after
4039 this routine does its work. Instead, we rely on the fact that the address
4040 was valid when reload started. So we need only undo things that reload
4041 could have broken. These are wrong register types, pseudos not allocated
4042 to a hard register, and frame pointer elimination. */
4045 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels)
4046 enum machine_mode mode;
4051 enum reload_type type;
4057 /* If the address is a register, see if it is a legitimate address and
4058 reload if not. We first handle the cases where we need not reload
4059 or where we must reload in a non-standard way. */
4061 if (GET_CODE (ad) == REG)
4065 if (reg_equiv_constant[regno] != 0
4066 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
4068 *loc = ad = reg_equiv_constant[regno];
4072 else if (reg_equiv_address[regno] != 0)
4074 tem = make_memloc (ad, regno);
4075 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
4076 &XEXP (tem, 0), opnum, type, ind_levels);
4077 push_reload (tem, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
4078 GET_MODE (ad), VOIDmode, 0, 0,
4083 /* We can avoid a reload if the register's equivalent memory expression
4084 is valid as an indirect memory address.
4085 But not all addresses are valid in a mem used as an indirect address:
4086 only reg or reg+constant. */
4088 else if (reg_equiv_mem[regno] != 0 && ind_levels > 0
4089 && strict_memory_address_p (mode, reg_equiv_mem[regno])
4090 && (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == REG
4091 || (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == PLUS
4092 && GET_CODE (XEXP (XEXP (reg_equiv_mem[regno], 0), 0)) == REG
4093 && CONSTANT_P (XEXP (XEXP (reg_equiv_mem[regno], 0), 1)))))
4096 /* The only remaining case where we can avoid a reload is if this is a
4097 hard register that is valid as a base register and which is not the
4098 subject of a CLOBBER in this insn. */
4100 else if (regno < FIRST_PSEUDO_REGISTER && REGNO_OK_FOR_BASE_P (regno)
4101 && ! regno_clobbered_p (regno, this_insn))
4104 /* If we do not have one of the cases above, we must do the reload. */
4105 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
4106 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4110 if (strict_memory_address_p (mode, ad))
4112 /* The address appears valid, so reloads are not needed.
4113 But the address may contain an eliminable register.
4114 This can happen because a machine with indirect addressing
4115 may consider a pseudo register by itself a valid address even when
4116 it has failed to get a hard reg.
4117 So do a tree-walk to find and eliminate all such regs. */
4119 /* But first quickly dispose of a common case. */
4120 if (GET_CODE (ad) == PLUS
4121 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4122 && GET_CODE (XEXP (ad, 0)) == REG
4123 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4126 subst_reg_equivs_changed = 0;
4127 *loc = subst_reg_equivs (ad);
4129 if (! subst_reg_equivs_changed)
4132 /* Check result for validity after substitution. */
4133 if (strict_memory_address_p (mode, ad))
4137 /* The address is not valid. We have to figure out why. One possibility
4138 is that it is itself a MEM. This can happen when the frame pointer is
4139 being eliminated, a pseudo is not allocated to a hard register, and the
4140 offset between the frame and stack pointers is not its initial value.
4141 In that case the pseudo will have been replaced by a MEM referring to
4142 the stack pointer. */
4143 if (GET_CODE (ad) == MEM)
4145 /* First ensure that the address in this MEM is valid. Then, unless
4146 indirect addresses are valid, reload the MEM into a register. */
4148 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4149 opnum, type, ind_levels == 0 ? 0 : ind_levels - 1);
4151 /* If tem was changed, then we must create a new memory reference to
4152 hold it and store it back into memrefloc. */
4153 if (tem != ad && memrefloc)
4155 *memrefloc = copy_rtx (*memrefloc);
4156 copy_replacements (tem, XEXP (*memrefloc, 0));
4157 loc = &XEXP (*memrefloc, 0);
4160 /* Check similar cases as for indirect addresses as above except
4161 that we can allow pseudos and a MEM since they should have been
4162 taken care of above. */
4165 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4166 || GET_CODE (XEXP (tem, 0)) == MEM
4167 || ! (GET_CODE (XEXP (tem, 0)) == REG
4168 || (GET_CODE (XEXP (tem, 0)) == PLUS
4169 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4170 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4172 /* Must use TEM here, not AD, since it is the one that will
4173 have any subexpressions reloaded, if needed. */
4174 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4175 BASE_REG_CLASS, GET_MODE (tem), VOIDmode, 0,
4183 /* If we have address of a stack slot but it's not valid
4184 (displacement is too large), compute the sum in a register. */
4185 else if (GET_CODE (ad) == PLUS
4186 && (XEXP (ad, 0) == frame_pointer_rtx
4187 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4188 || XEXP (ad, 0) == hard_frame_pointer_rtx
4190 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4191 || XEXP (ad, 0) == arg_pointer_rtx
4193 || XEXP (ad, 0) == stack_pointer_rtx)
4194 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4196 /* Unshare the MEM rtx so we can safely alter it. */
4199 *memrefloc = copy_rtx (*memrefloc);
4200 loc = &XEXP (*memrefloc, 0);
4202 if (double_reg_address_ok)
4204 /* Unshare the sum as well. */
4205 *loc = ad = copy_rtx (ad);
4206 /* Reload the displacement into an index reg.
4207 We assume the frame pointer or arg pointer is a base reg. */
4208 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4209 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4214 /* If the sum of two regs is not necessarily valid,
4215 reload the sum into a base reg.
4216 That will at least work. */
4217 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode,
4218 opnum, type, ind_levels);
4223 /* If we have an indexed stack slot, there are three possible reasons why
4224 it might be invalid: The index might need to be reloaded, the address
4225 might have been made by frame pointer elimination and hence have a
4226 constant out of range, or both reasons might apply.
4228 We can easily check for an index needing reload, but even if that is the
4229 case, we might also have an invalid constant. To avoid making the
4230 conservative assumption and requiring two reloads, we see if this address
4231 is valid when not interpreted strictly. If it is, the only problem is
4232 that the index needs a reload and find_reloads_address_1 will take care
4235 There is still a case when we might generate an extra reload,
4236 however. In certain cases eliminate_regs will return a MEM for a REG
4237 (see the code there for details). In those cases, memory_address_p
4238 applied to our address will return 0 so we will think that our offset
4239 must be too large. But it might indeed be valid and the only problem
4240 is that a MEM is present where a REG should be. This case should be
4241 very rare and there doesn't seem to be any way to avoid it.
4243 If we decide to do something here, it must be that
4244 `double_reg_address_ok' is true and that this address rtl was made by
4245 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4246 rework the sum so that the reload register will be added to the index.
4247 This is safe because we know the address isn't shared.
4249 We check for fp/ap/sp as both the first and second operand of the
4252 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4253 && GET_CODE (XEXP (ad, 0)) == PLUS
4254 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4255 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4256 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4258 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4259 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4261 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4262 && ! memory_address_p (mode, ad))
4264 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
4265 plus_constant (XEXP (XEXP (ad, 0), 0),
4266 INTVAL (XEXP (ad, 1))),
4267 XEXP (XEXP (ad, 0), 1));
4268 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4269 GET_MODE (ad), opnum, type, ind_levels);
4270 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, type, 0);
4275 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4276 && GET_CODE (XEXP (ad, 0)) == PLUS
4277 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4278 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4279 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4281 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4282 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4284 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4285 && ! memory_address_p (mode, ad))
4287 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
4288 XEXP (XEXP (ad, 0), 0),
4289 plus_constant (XEXP (XEXP (ad, 0), 1),
4290 INTVAL (XEXP (ad, 1))));
4291 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), BASE_REG_CLASS,
4292 GET_MODE (ad), opnum, type, ind_levels);
4293 find_reloads_address_1 (XEXP (ad, 0), 1, &XEXP (ad, 0), opnum, type, 0);
4298 /* See if address becomes valid when an eliminable register
4299 in a sum is replaced. */
4302 if (GET_CODE (ad) == PLUS)
4303 tem = subst_indexed_address (ad);
4304 if (tem != ad && strict_memory_address_p (mode, tem))
4306 /* Ok, we win that way. Replace any additional eliminable
4309 subst_reg_equivs_changed = 0;
4310 tem = subst_reg_equivs (tem);
4312 /* Make sure that didn't make the address invalid again. */
4314 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4321 /* If constants aren't valid addresses, reload the constant address
4323 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4325 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4326 Unshare it so we can safely alter it. */
4327 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4328 && CONSTANT_POOL_ADDRESS_P (ad))
4330 *memrefloc = copy_rtx (*memrefloc);
4331 loc = &XEXP (*memrefloc, 0);
4334 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
4339 return find_reloads_address_1 (ad, 0, loc, opnum, type, ind_levels);
4342 /* Find all pseudo regs appearing in AD
4343 that are eliminable in favor of equivalent values
4344 and do not have hard regs; replace them by their equivalents. */
4347 subst_reg_equivs (ad)
4350 register RTX_CODE code = GET_CODE (ad);
4368 register int regno = REGNO (ad);
4370 if (reg_equiv_constant[regno] != 0)
4372 subst_reg_equivs_changed = 1;
4373 return reg_equiv_constant[regno];
4379 /* Quickly dispose of a common case. */
4380 if (XEXP (ad, 0) == frame_pointer_rtx
4381 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4385 fmt = GET_RTX_FORMAT (code);
4386 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4388 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i));
4392 /* Compute the sum of X and Y, making canonicalizations assumed in an
4393 address, namely: sum constant integers, surround the sum of two
4394 constants with a CONST, put the constant as the second operand, and
4395 group the constant on the outermost sum.
4397 This routine assumes both inputs are already in canonical form. */
4404 enum machine_mode mode = GET_MODE (x);
4406 if (mode == VOIDmode)
4407 mode = GET_MODE (y);
4409 if (mode == VOIDmode)
4412 if (GET_CODE (x) == CONST_INT)
4413 return plus_constant (y, INTVAL (x));
4414 else if (GET_CODE (y) == CONST_INT)
4415 return plus_constant (x, INTVAL (y));
4416 else if (CONSTANT_P (x))
4417 tem = x, x = y, y = tem;
4419 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
4420 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
4422 /* Note that if the operands of Y are specified in the opposite
4423 order in the recursive calls below, infinite recursion will occur. */
4424 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
4425 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
4427 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4428 constant will have been placed second. */
4429 if (CONSTANT_P (x) && CONSTANT_P (y))
4431 if (GET_CODE (x) == CONST)
4433 if (GET_CODE (y) == CONST)
4436 return gen_rtx (CONST, VOIDmode, gen_rtx (PLUS, mode, x, y));
4439 return gen_rtx (PLUS, mode, x, y);
4442 /* If ADDR is a sum containing a pseudo register that should be
4443 replaced with a constant (from reg_equiv_constant),
4444 return the result of doing so, and also apply the associative
4445 law so that the result is more likely to be a valid address.
4446 (But it is not guaranteed to be one.)
4448 Note that at most one register is replaced, even if more are
4449 replaceable. Also, we try to put the result into a canonical form
4450 so it is more likely to be a valid address.
4452 In all other cases, return ADDR. */
4455 subst_indexed_address (addr)
4458 rtx op0 = 0, op1 = 0, op2 = 0;
4462 if (GET_CODE (addr) == PLUS)
4464 /* Try to find a register to replace. */
4465 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
4466 if (GET_CODE (op0) == REG
4467 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
4468 && reg_renumber[regno] < 0
4469 && reg_equiv_constant[regno] != 0)
4470 op0 = reg_equiv_constant[regno];
4471 else if (GET_CODE (op1) == REG
4472 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
4473 && reg_renumber[regno] < 0
4474 && reg_equiv_constant[regno] != 0)
4475 op1 = reg_equiv_constant[regno];
4476 else if (GET_CODE (op0) == PLUS
4477 && (tem = subst_indexed_address (op0)) != op0)
4479 else if (GET_CODE (op1) == PLUS
4480 && (tem = subst_indexed_address (op1)) != op1)
4485 /* Pick out up to three things to add. */
4486 if (GET_CODE (op1) == PLUS)
4487 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
4488 else if (GET_CODE (op0) == PLUS)
4489 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4491 /* Compute the sum. */
4493 op1 = form_sum (op1, op2);
4495 op0 = form_sum (op0, op1);
4502 /* Record the pseudo registers we must reload into hard registers
4503 in a subexpression of a would-be memory address, X.
4504 (This function is not called if the address we find is strictly valid.)
4505 CONTEXT = 1 means we are considering regs as index regs,
4506 = 0 means we are considering them as base regs.
4508 OPNUM and TYPE specify the purpose of any reloads made.
4510 IND_LEVELS says how many levels of indirect addressing are
4511 supported at this point in the address.
4513 We return nonzero if X, as a whole, is reloaded or replaced. */
4515 /* Note that we take shortcuts assuming that no multi-reg machine mode
4516 occurs as part of an address.
4517 Also, this is not fully machine-customizable; it works for machines
4518 such as vaxes and 68000's and 32000's, but other possible machines
4519 could have addressing modes that this does not handle right. */
4522 find_reloads_address_1 (x, context, loc, opnum, type, ind_levels)
4527 enum reload_type type;
4530 register RTX_CODE code = GET_CODE (x);
4536 register rtx orig_op0 = XEXP (x, 0);
4537 register rtx orig_op1 = XEXP (x, 1);
4538 register RTX_CODE code0 = GET_CODE (orig_op0);
4539 register RTX_CODE code1 = GET_CODE (orig_op1);
4540 register rtx op0 = orig_op0;
4541 register rtx op1 = orig_op1;
4543 if (GET_CODE (op0) == SUBREG)
4545 op0 = SUBREG_REG (op0);
4546 code0 = GET_CODE (op0);
4549 if (GET_CODE (op1) == SUBREG)
4551 op1 = SUBREG_REG (op1);
4552 code1 = GET_CODE (op1);
4555 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
4556 || code0 == ZERO_EXTEND || code1 == MEM)
4558 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4560 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4564 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
4565 || code1 == ZERO_EXTEND || code0 == MEM)
4567 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4569 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4573 else if (code0 == CONST_INT || code0 == CONST
4574 || code0 == SYMBOL_REF || code0 == LABEL_REF)
4575 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4578 else if (code1 == CONST_INT || code1 == CONST
4579 || code1 == SYMBOL_REF || code1 == LABEL_REF)
4580 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4583 else if (code0 == REG && code1 == REG)
4585 if (REG_OK_FOR_INDEX_P (op0)
4586 && REG_OK_FOR_BASE_P (op1))
4588 else if (REG_OK_FOR_INDEX_P (op1)
4589 && REG_OK_FOR_BASE_P (op0))
4591 else if (REG_OK_FOR_BASE_P (op1))
4592 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4594 else if (REG_OK_FOR_BASE_P (op0))
4595 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4597 else if (REG_OK_FOR_INDEX_P (op1))
4598 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4600 else if (REG_OK_FOR_INDEX_P (op0))
4601 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4605 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4607 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4612 else if (code0 == REG)
4614 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4616 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4620 else if (code1 == REG)
4622 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4624 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4635 if (GET_CODE (XEXP (x, 0)) == REG)
4637 register int regno = REGNO (XEXP (x, 0));
4641 /* A register that is incremented cannot be constant! */
4642 if (regno >= FIRST_PSEUDO_REGISTER
4643 && reg_equiv_constant[regno] != 0)
4646 /* Handle a register that is equivalent to a memory location
4647 which cannot be addressed directly. */
4648 if (reg_equiv_address[regno] != 0)
4650 rtx tem = make_memloc (XEXP (x, 0), regno);
4651 /* First reload the memory location's address. */
4652 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
4653 &XEXP (tem, 0), opnum, type, ind_levels);
4654 /* Put this inside a new increment-expression. */
4655 x = gen_rtx (GET_CODE (x), GET_MODE (x), tem);
4656 /* Proceed to reload that, as if it contained a register. */
4659 /* If we have a hard register that is ok as an index,
4660 don't make a reload. If an autoincrement of a nice register
4661 isn't "valid", it must be that no autoincrement is "valid".
4662 If that is true and something made an autoincrement anyway,
4663 this must be a special context where one is allowed.
4664 (For example, a "push" instruction.)
4665 We can't improve this address, so leave it alone. */
4667 /* Otherwise, reload the autoincrement into a suitable hard reg
4668 and record how much to increment by. */
4670 if (reg_renumber[regno] >= 0)
4671 regno = reg_renumber[regno];
4672 if ((regno >= FIRST_PSEUDO_REGISTER
4673 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4674 : REGNO_OK_FOR_BASE_P (regno))))
4679 = push_reload (x, NULL_RTX, loc, NULL_PTR,
4680 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4681 GET_MODE (x), GET_MODE (x), VOIDmode, 0,
4683 reload_inc[reloadnum]
4684 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
4689 /* Update the REG_INC notes. */
4691 for (link = REG_NOTES (this_insn);
4692 link; link = XEXP (link, 1))
4693 if (REG_NOTE_KIND (link) == REG_INC
4694 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
4695 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4701 else if (GET_CODE (XEXP (x, 0)) == MEM)
4703 /* This is probably the result of a substitution, by eliminate_regs,
4704 of an equivalent address for a pseudo that was not allocated to a
4705 hard register. Verify that the specified address is valid and
4706 reload it into a register. */
4707 rtx tem = XEXP (x, 0);
4711 /* Since we know we are going to reload this item, don't decrement
4712 for the indirection level.
4714 Note that this is actually conservative: it would be slightly
4715 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4717 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
4718 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
4719 opnum, type, ind_levels);
4721 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
4722 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4723 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4724 reload_inc[reloadnum]
4725 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
4727 link = FIND_REG_INC_NOTE (this_insn, tem);
4729 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4736 /* This is probably the result of a substitution, by eliminate_regs, of
4737 an equivalent address for a pseudo that was not allocated to a hard
4738 register. Verify that the specified address is valid and reload it
4741 Since we know we are going to reload this item, don't decrement for
4742 the indirection level.
4744 Note that this is actually conservative: it would be slightly more
4745 efficient to use the value of SPILL_INDIRECT_LEVELS from
4748 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
4749 opnum, type, ind_levels);
4750 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
4751 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4752 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4757 register int regno = REGNO (x);
4759 if (reg_equiv_constant[regno] != 0)
4761 find_reloads_address_part (reg_equiv_constant[regno], loc,
4762 (context ? INDEX_REG_CLASS
4764 GET_MODE (x), opnum, type, ind_levels);
4768 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4769 that feeds this insn. */
4770 if (reg_equiv_mem[regno] != 0)
4772 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
4773 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4774 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4779 if (reg_equiv_address[regno] != 0)
4781 x = make_memloc (x, regno);
4782 find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0),
4783 opnum, type, ind_levels);
4786 if (reg_renumber[regno] >= 0)
4787 regno = reg_renumber[regno];
4789 if ((regno >= FIRST_PSEUDO_REGISTER
4790 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4791 : REGNO_OK_FOR_BASE_P (regno))))
4793 push_reload (x, NULL_RTX, loc, NULL_PTR,
4794 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4795 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4799 /* If a register appearing in an address is the subject of a CLOBBER
4800 in this insn, reload it into some other register to be safe.
4801 The CLOBBER is supposed to make the register unavailable
4802 from before this insn to after it. */
4803 if (regno_clobbered_p (regno, this_insn))
4805 push_reload (x, NULL_RTX, loc, NULL_PTR,
4806 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4807 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4814 /* If this is a SUBREG of a hard register and the resulting register is
4815 of the wrong class, reload the whole SUBREG. This avoids needless
4816 copies if SUBREG_REG is multi-word. */
4817 if (GET_CODE (SUBREG_REG (x)) == REG
4818 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
4820 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
4822 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
4823 : REGNO_OK_FOR_BASE_P (regno)))
4825 push_reload (x, NULL_RTX, loc, NULL_PTR,
4826 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4827 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4835 register char *fmt = GET_RTX_FORMAT (code);
4838 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4841 find_reloads_address_1 (XEXP (x, i), context, &XEXP (x, i),
4842 opnum, type, ind_levels);
4849 /* X, which is found at *LOC, is a part of an address that needs to be
4850 reloaded into a register of class CLASS. If X is a constant, or if
4851 X is a PLUS that contains a constant, check that the constant is a
4852 legitimate operand and that we are supposed to be able to load
4853 it into the register.
4855 If not, force the constant into memory and reload the MEM instead.
4857 MODE is the mode to use, in case X is an integer constant.
4859 OPNUM and TYPE describe the purpose of any reloads made.
4861 IND_LEVELS says how many levels of indirect addressing this machine
4865 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
4868 enum reg_class class;
4869 enum machine_mode mode;
4871 enum reload_type type;
4875 && (! LEGITIMATE_CONSTANT_P (x)
4876 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
4878 rtx tem = x = force_const_mem (mode, x);
4879 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4880 opnum, type, ind_levels);
4883 else if (GET_CODE (x) == PLUS
4884 && CONSTANT_P (XEXP (x, 1))
4885 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
4886 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
4888 rtx tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
4890 x = gen_rtx (PLUS, GET_MODE (x), XEXP (x, 0), tem);
4891 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4892 opnum, type, ind_levels);
4895 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
4896 mode, VOIDmode, 0, 0, opnum, type);
4899 /* Substitute into the current INSN the registers into which we have reloaded
4900 the things that need reloading. The array `replacements'
4901 says contains the locations of all pointers that must be changed
4902 and says what to replace them with.
4904 Return the rtx that X translates into; usually X, but modified. */
4911 for (i = 0; i < n_replacements; i++)
4913 register struct replacement *r = &replacements[i];
4914 register rtx reloadreg = reload_reg_rtx[r->what];
4917 /* Encapsulate RELOADREG so its machine mode matches what
4918 used to be there. Note that gen_lowpart_common will
4919 do the wrong thing if RELOADREG is multi-word. RELOADREG
4920 will always be a REG here. */
4921 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
4922 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
4924 /* If we are putting this into a SUBREG and RELOADREG is a
4925 SUBREG, we would be making nested SUBREGs, so we have to fix
4926 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
4928 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
4930 if (GET_MODE (*r->subreg_loc)
4931 == GET_MODE (SUBREG_REG (reloadreg)))
4932 *r->subreg_loc = SUBREG_REG (reloadreg);
4935 *r->where = SUBREG_REG (reloadreg);
4936 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
4940 *r->where = reloadreg;
4942 /* If reload got no reg and isn't optional, something's wrong. */
4943 else if (! reload_optional[r->what])
4948 /* Make a copy of any replacements being done into X and move those copies
4949 to locations in Y, a copy of X. We only look at the highest level of
4953 copy_replacements (x, y)
4958 enum rtx_code code = GET_CODE (x);
4959 char *fmt = GET_RTX_FORMAT (code);
4960 struct replacement *r;
4962 /* We can't support X being a SUBREG because we might then need to know its
4963 location if something inside it was replaced. */
4967 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4969 for (j = 0; j < n_replacements; j++)
4971 if (replacements[j].subreg_loc == &XEXP (x, i))
4973 r = &replacements[n_replacements++];
4974 r->where = replacements[j].where;
4975 r->subreg_loc = &XEXP (y, i);
4976 r->what = replacements[j].what;
4977 r->mode = replacements[j].mode;
4979 else if (replacements[j].where == &XEXP (x, i))
4981 r = &replacements[n_replacements++];
4982 r->where = &XEXP (y, i);
4984 r->what = replacements[j].what;
4985 r->mode = replacements[j].mode;
4990 /* If LOC was scheduled to be replaced by something, return the replacement.
4991 Otherwise, return *LOC. */
4994 find_replacement (loc)
4997 struct replacement *r;
4999 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
5001 rtx reloadreg = reload_reg_rtx[r->what];
5003 if (reloadreg && r->where == loc)
5005 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
5006 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
5010 else if (reloadreg && r->subreg_loc == loc)
5012 /* RELOADREG must be either a REG or a SUBREG.
5014 ??? Is it actually still ever a SUBREG? If so, why? */
5016 if (GET_CODE (reloadreg) == REG)
5017 return gen_rtx (REG, GET_MODE (*loc),
5018 REGNO (reloadreg) + SUBREG_WORD (*loc));
5019 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
5022 return gen_rtx (SUBREG, GET_MODE (*loc), SUBREG_REG (reloadreg),
5023 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
5030 /* Return nonzero if register in range [REGNO, ENDREGNO)
5031 appears either explicitly or implicitly in X
5032 other than being stored into (except for earlyclobber operands).
5034 References contained within the substructure at LOC do not count.
5035 LOC may be zero, meaning don't ignore anything.
5037 This is similar to refers_to_regno_p in rtlanal.c except that we
5038 look at equivalences for pseudos that didn't get hard registers. */
5041 refers_to_regno_for_reload_p (regno, endregno, x, loc)
5042 int regno, endregno;
5047 register RTX_CODE code;
5054 code = GET_CODE (x);
5061 /* If this is a pseudo, a hard register must not have been allocated.
5062 X must therefore either be a constant or be in memory. */
5063 if (i >= FIRST_PSEUDO_REGISTER)
5065 if (reg_equiv_memory_loc[i])
5066 return refers_to_regno_for_reload_p (regno, endregno,
5067 reg_equiv_memory_loc[i],
5070 if (reg_equiv_constant[i])
5076 return (endregno > i
5077 && regno < i + (i < FIRST_PSEUDO_REGISTER
5078 ? HARD_REGNO_NREGS (i, GET_MODE (x))
5082 /* If this is a SUBREG of a hard reg, we can see exactly which
5083 registers are being modified. Otherwise, handle normally. */
5084 if (GET_CODE (SUBREG_REG (x)) == REG
5085 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5087 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5089 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
5090 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5092 return endregno > inner_regno && regno < inner_endregno;
5098 if (&SET_DEST (x) != loc
5099 /* Note setting a SUBREG counts as referring to the REG it is in for
5100 a pseudo but not for hard registers since we can
5101 treat each word individually. */
5102 && ((GET_CODE (SET_DEST (x)) == SUBREG
5103 && loc != &SUBREG_REG (SET_DEST (x))
5104 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
5105 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
5106 && refers_to_regno_for_reload_p (regno, endregno,
5107 SUBREG_REG (SET_DEST (x)),
5109 /* If the ouput is an earlyclobber operand, this is
5111 || ((GET_CODE (SET_DEST (x)) != REG
5112 || earlyclobber_operand_p (SET_DEST (x)))
5113 && refers_to_regno_for_reload_p (regno, endregno,
5114 SET_DEST (x), loc))))
5117 if (code == CLOBBER || loc == &SET_SRC (x))
5123 /* X does not match, so try its subexpressions. */
5125 fmt = GET_RTX_FORMAT (code);
5126 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5128 if (fmt[i] == 'e' && loc != &XEXP (x, i))
5136 if (refers_to_regno_for_reload_p (regno, endregno,
5140 else if (fmt[i] == 'E')
5143 for (j = XVECLEN (x, i) - 1; j >=0; j--)
5144 if (loc != &XVECEXP (x, i, j)
5145 && refers_to_regno_for_reload_p (regno, endregno,
5146 XVECEXP (x, i, j), loc))
5153 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5154 we check if any register number in X conflicts with the relevant register
5155 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5156 contains a MEM (we don't bother checking for memory addresses that can't
5157 conflict because we expect this to be a rare case.
5159 This function is similar to reg_overlap_mention_p in rtlanal.c except
5160 that we look at equivalences for pseudos that didn't get hard registers. */
5163 reg_overlap_mentioned_for_reload_p (x, in)
5166 int regno, endregno;
5168 if (GET_CODE (x) == SUBREG)
5170 regno = REGNO (SUBREG_REG (x));
5171 if (regno < FIRST_PSEUDO_REGISTER)
5172 regno += SUBREG_WORD (x);
5174 else if (GET_CODE (x) == REG)
5178 /* If this is a pseudo, it must not have been assigned a hard register.
5179 Therefore, it must either be in memory or be a constant. */
5181 if (regno >= FIRST_PSEUDO_REGISTER)
5183 if (reg_equiv_memory_loc[regno])
5184 return refers_to_mem_for_reload_p (in);
5185 else if (reg_equiv_constant[regno])
5190 else if (CONSTANT_P (x))
5192 else if (GET_CODE (x) == MEM)
5193 return refers_to_mem_for_reload_p (in);
5194 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
5195 || GET_CODE (x) == CC0)
5196 return reg_mentioned_p (x, in);
5200 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
5201 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5203 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
5206 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5210 refers_to_mem_for_reload_p (x)
5216 if (GET_CODE (x) == MEM)
5219 if (GET_CODE (x) == REG)
5220 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
5221 && reg_equiv_memory_loc[REGNO (x)]);
5223 fmt = GET_RTX_FORMAT (GET_CODE (x));
5224 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
5226 && (GET_CODE (XEXP (x, i)) == MEM
5227 || refers_to_mem_for_reload_p (XEXP (x, i))))
5233 /* Check the insns before INSN to see if there is a suitable register
5234 containing the same value as GOAL.
5235 If OTHER is -1, look for a register in class CLASS.
5236 Otherwise, just see if register number OTHER shares GOAL's value.
5238 Return an rtx for the register found, or zero if none is found.
5240 If RELOAD_REG_P is (short *)1,
5241 we reject any hard reg that appears in reload_reg_rtx
5242 because such a hard reg is also needed coming into this insn.
5244 If RELOAD_REG_P is any other nonzero value,
5245 it is a vector indexed by hard reg number
5246 and we reject any hard reg whose element in the vector is nonnegative
5247 as well as any that appears in reload_reg_rtx.
5249 If GOAL is zero, then GOALREG is a register number; we look
5250 for an equivalent for that register.
5252 MODE is the machine mode of the value we want an equivalence for.
5253 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5255 This function is used by jump.c as well as in the reload pass.
5257 If GOAL is the sum of the stack pointer and a constant, we treat it
5258 as if it were a constant except that sp is required to be unchanging. */
5261 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
5264 enum reg_class class;
5266 short *reload_reg_p;
5268 enum machine_mode mode;
5270 register rtx p = insn;
5271 rtx goaltry, valtry, value, where;
5273 register int regno = -1;
5277 int goal_mem_addr_varies = 0;
5278 int need_stable_sp = 0;
5284 else if (GET_CODE (goal) == REG)
5285 regno = REGNO (goal);
5286 else if (GET_CODE (goal) == MEM)
5288 enum rtx_code code = GET_CODE (XEXP (goal, 0));
5289 if (MEM_VOLATILE_P (goal))
5291 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
5293 /* An address with side effects must be reexecuted. */
5304 else if (CONSTANT_P (goal))
5306 else if (GET_CODE (goal) == PLUS
5307 && XEXP (goal, 0) == stack_pointer_rtx
5308 && CONSTANT_P (XEXP (goal, 1)))
5309 goal_const = need_stable_sp = 1;
5313 /* On some machines, certain regs must always be rejected
5314 because they don't behave the way ordinary registers do. */
5316 #ifdef OVERLAPPING_REGNO_P
5317 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5318 && OVERLAPPING_REGNO_P (regno))
5322 /* Scan insns back from INSN, looking for one that copies
5323 a value into or out of GOAL.
5324 Stop and give up if we reach a label. */
5329 if (p == 0 || GET_CODE (p) == CODE_LABEL)
5331 if (GET_CODE (p) == INSN
5332 /* If we don't want spill regs ... */
5333 && (! (reload_reg_p != 0
5334 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
5335 /* ... then ignore insns introduced by reload; they aren't useful
5336 and can cause results in reload_as_needed to be different
5337 from what they were when calculating the need for spills.
5338 If we notice an input-reload insn here, we will reject it below,
5339 but it might hide a usable equivalent. That makes bad code.
5340 It may even abort: perhaps no reg was spilled for this insn
5341 because it was assumed we would find that equivalent. */
5342 || INSN_UID (p) < reload_first_uid))
5345 pat = single_set (p);
5346 /* First check for something that sets some reg equal to GOAL. */
5349 && true_regnum (SET_SRC (pat)) == regno
5350 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5353 && true_regnum (SET_DEST (pat)) == regno
5354 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
5356 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
5357 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5359 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
5360 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
5362 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
5363 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
5364 /* If we are looking for a constant,
5365 and something equivalent to that constant was copied
5366 into a reg, we can use that reg. */
5367 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5369 && rtx_equal_p (XEXP (tem, 0), goal)
5370 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5371 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5373 && GET_CODE (SET_DEST (pat)) == REG
5374 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5375 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5376 && GET_CODE (goal) == CONST_INT
5377 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
5379 && rtx_equal_p (goal, goaltry)
5380 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
5382 && (valueno = true_regnum (valtry)) >= 0)
5383 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5385 && GET_CODE (SET_DEST (pat)) == REG
5386 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5387 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5388 && GET_CODE (goal) == CONST_INT
5389 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
5391 && rtx_equal_p (goal, goaltry)
5393 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
5394 && (valueno = true_regnum (valtry)) >= 0)))
5397 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
5398 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
5408 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5409 (or copying VALUE into GOAL, if GOAL is also a register).
5410 Now verify that VALUE is really valid. */
5412 /* VALUENO is the register number of VALUE; a hard register. */
5414 /* Don't try to re-use something that is killed in this insn. We want
5415 to be able to trust REG_UNUSED notes. */
5416 if (find_reg_note (where, REG_UNUSED, value))
5419 /* If we propose to get the value from the stack pointer or if GOAL is
5420 a MEM based on the stack pointer, we need a stable SP. */
5421 if (valueno == STACK_POINTER_REGNUM
5422 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
5426 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5427 if (GET_MODE (value) != mode)
5430 /* Reject VALUE if it was loaded from GOAL
5431 and is also a register that appears in the address of GOAL. */
5433 if (goal_mem && value == SET_DEST (PATTERN (where))
5434 && refers_to_regno_for_reload_p (valueno,
5436 + HARD_REGNO_NREGS (valueno, mode)),
5440 /* Reject registers that overlap GOAL. */
5442 if (!goal_mem && !goal_const
5443 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
5444 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
5447 /* Reject VALUE if it is one of the regs reserved for reloads.
5448 Reload1 knows how to reuse them anyway, and it would get
5449 confused if we allocated one without its knowledge.
5450 (Now that insns introduced by reload are ignored above,
5451 this case shouldn't happen, but I'm not positive.) */
5453 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
5454 && reload_reg_p[valueno] >= 0)
5457 /* On some machines, certain regs must always be rejected
5458 because they don't behave the way ordinary registers do. */
5460 #ifdef OVERLAPPING_REGNO_P
5461 if (OVERLAPPING_REGNO_P (valueno))
5465 nregs = HARD_REGNO_NREGS (regno, mode);
5466 valuenregs = HARD_REGNO_NREGS (valueno, mode);
5468 /* Reject VALUE if it is a register being used for an input reload
5469 even if it is not one of those reserved. */
5471 if (reload_reg_p != 0)
5474 for (i = 0; i < n_reloads; i++)
5475 if (reload_reg_rtx[i] != 0 && reload_in[i])
5477 int regno1 = REGNO (reload_reg_rtx[i]);
5478 int nregs1 = HARD_REGNO_NREGS (regno1,
5479 GET_MODE (reload_reg_rtx[i]));
5480 if (regno1 < valueno + valuenregs
5481 && regno1 + nregs1 > valueno)
5487 /* We must treat frame pointer as varying here,
5488 since it can vary--in a nonlocal goto as generated by expand_goto. */
5489 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
5491 /* Now verify that the values of GOAL and VALUE remain unaltered
5492 until INSN is reached. */
5501 /* Don't trust the conversion past a function call
5502 if either of the two is in a call-clobbered register, or memory. */
5503 if (GET_CODE (p) == CALL_INSN
5504 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5505 && call_used_regs[regno])
5507 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5508 && call_used_regs[valueno])
5514 #ifdef INSN_CLOBBERS_REGNO_P
5515 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5516 && INSN_CLOBBERS_REGNO_P (p, valueno))
5517 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5518 && INSN_CLOBBERS_REGNO_P (p, regno)))
5522 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
5524 /* If this insn P stores in either GOAL or VALUE, return 0.
5525 If GOAL is a memory ref and this insn writes memory, return 0.
5526 If GOAL is a memory ref and its address is not constant,
5527 and this insn P changes a register used in GOAL, return 0. */
5530 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
5532 register rtx dest = SET_DEST (pat);
5533 while (GET_CODE (dest) == SUBREG
5534 || GET_CODE (dest) == ZERO_EXTRACT
5535 || GET_CODE (dest) == SIGN_EXTRACT
5536 || GET_CODE (dest) == STRICT_LOW_PART)
5537 dest = XEXP (dest, 0);
5538 if (GET_CODE (dest) == REG)
5540 register int xregno = REGNO (dest);
5542 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5543 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5546 if (xregno < regno + nregs && xregno + xnregs > regno)
5548 if (xregno < valueno + valuenregs
5549 && xregno + xnregs > valueno)
5551 if (goal_mem_addr_varies
5552 && reg_overlap_mentioned_for_reload_p (dest, goal))
5555 else if (goal_mem && GET_CODE (dest) == MEM
5556 && ! push_operand (dest, GET_MODE (dest)))
5558 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
5559 && reg_equiv_memory_loc[regno] != 0)
5561 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
5564 else if (GET_CODE (pat) == PARALLEL)
5567 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
5569 register rtx v1 = XVECEXP (pat, 0, i);
5570 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
5572 register rtx dest = SET_DEST (v1);
5573 while (GET_CODE (dest) == SUBREG
5574 || GET_CODE (dest) == ZERO_EXTRACT
5575 || GET_CODE (dest) == SIGN_EXTRACT
5576 || GET_CODE (dest) == STRICT_LOW_PART)
5577 dest = XEXP (dest, 0);
5578 if (GET_CODE (dest) == REG)
5580 register int xregno = REGNO (dest);
5582 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5583 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5586 if (xregno < regno + nregs
5587 && xregno + xnregs > regno)
5589 if (xregno < valueno + valuenregs
5590 && xregno + xnregs > valueno)
5592 if (goal_mem_addr_varies
5593 && reg_overlap_mentioned_for_reload_p (dest,
5597 else if (goal_mem && GET_CODE (dest) == MEM
5598 && ! push_operand (dest, GET_MODE (dest)))
5600 else if (need_stable_sp
5601 && push_operand (dest, GET_MODE (dest)))
5607 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
5611 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
5612 link = XEXP (link, 1))
5614 pat = XEXP (link, 0);
5615 if (GET_CODE (pat) == CLOBBER)
5617 register rtx dest = SET_DEST (pat);
5618 while (GET_CODE (dest) == SUBREG
5619 || GET_CODE (dest) == ZERO_EXTRACT
5620 || GET_CODE (dest) == SIGN_EXTRACT
5621 || GET_CODE (dest) == STRICT_LOW_PART)
5622 dest = XEXP (dest, 0);
5623 if (GET_CODE (dest) == REG)
5625 register int xregno = REGNO (dest);
5627 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5628 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5631 if (xregno < regno + nregs
5632 && xregno + xnregs > regno)
5634 if (xregno < valueno + valuenregs
5635 && xregno + xnregs > valueno)
5637 if (goal_mem_addr_varies
5638 && reg_overlap_mentioned_for_reload_p (dest,
5642 else if (goal_mem && GET_CODE (dest) == MEM
5643 && ! push_operand (dest, GET_MODE (dest)))
5645 else if (need_stable_sp
5646 && push_operand (dest, GET_MODE (dest)))
5653 /* If this insn auto-increments or auto-decrements
5654 either regno or valueno, return 0 now.
5655 If GOAL is a memory ref and its address is not constant,
5656 and this insn P increments a register used in GOAL, return 0. */
5660 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
5661 if (REG_NOTE_KIND (link) == REG_INC
5662 && GET_CODE (XEXP (link, 0)) == REG)
5664 register int incno = REGNO (XEXP (link, 0));
5665 if (incno < regno + nregs && incno >= regno)
5667 if (incno < valueno + valuenregs && incno >= valueno)
5669 if (goal_mem_addr_varies
5670 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
5680 /* Find a place where INCED appears in an increment or decrement operator
5681 within X, and return the amount INCED is incremented or decremented by.
5682 The value is always positive. */
5685 find_inc_amount (x, inced)
5688 register enum rtx_code code = GET_CODE (x);
5694 register rtx addr = XEXP (x, 0);
5695 if ((GET_CODE (addr) == PRE_DEC
5696 || GET_CODE (addr) == POST_DEC
5697 || GET_CODE (addr) == PRE_INC
5698 || GET_CODE (addr) == POST_INC)
5699 && XEXP (addr, 0) == inced)
5700 return GET_MODE_SIZE (GET_MODE (x));
5703 fmt = GET_RTX_FORMAT (code);
5704 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5708 register int tem = find_inc_amount (XEXP (x, i), inced);
5715 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5717 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
5727 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5730 regno_clobbered_p (regno, insn)
5734 if (GET_CODE (PATTERN (insn)) == CLOBBER
5735 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
5736 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
5738 if (GET_CODE (PATTERN (insn)) == PARALLEL)
5740 int i = XVECLEN (PATTERN (insn), 0) - 1;
5744 rtx elt = XVECEXP (PATTERN (insn), 0, i);
5745 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
5746 && REGNO (XEXP (elt, 0)) == regno)
5754 static char *reload_when_needed_name[] =
5757 "RELOAD_FOR_OUTPUT",
5759 "RELOAD_FOR_INPUT_ADDRESS",
5760 "RELOAD_FOR_OUTPUT_ADDRESS",
5761 "RELOAD_FOR_OPERAND_ADDRESS",
5762 "RELOAD_FOR_OPADDR_ADDR",
5764 "RELOAD_FOR_OTHER_ADDRESS"
5767 static char *reg_class_names[] = REG_CLASS_NAMES;
5769 /* This function is used to print the variables set by 'find_reloads' */
5776 fprintf (stderr, "\nn_reloads = %d\n", n_reloads);
5778 for (r = 0; r < n_reloads; r++)
5780 fprintf (stderr, "\nRELOAD %d\n", r);
5784 fprintf (stderr, "\nreload_in (%s) = ",
5785 GET_MODE_NAME (reload_inmode[r]));
5786 debug_rtx (reload_in[r]);
5791 fprintf (stderr, "\nreload_out (%s) = ",
5792 GET_MODE_NAME (reload_outmode[r]));
5793 debug_rtx (reload_out[r]);
5796 fprintf (stderr, "%s, ", reg_class_names[(int) reload_reg_class[r]]);
5798 fprintf (stderr, "%s (opnum = %d)",
5799 reload_when_needed_name[(int)reload_when_needed[r]],
5802 if (reload_optional[r])
5803 fprintf (stderr, ", optional");
5806 fprintf (stderr, ", inc by %d\n", reload_inc[r]);
5808 if (reload_nocombine[r])
5809 fprintf (stderr, ", can combine", reload_nocombine[r]);
5811 if (reload_secondary_p[r])
5812 fprintf (stderr, ", secondary_reload_p");
5814 if (reload_in_reg[r])
5816 fprintf (stderr, "\nreload_in_reg:\t\t\t");
5817 debug_rtx (reload_in_reg[r]);
5820 if (reload_reg_rtx[r])
5822 fprintf (stderr, "\nreload_reg_rtx:\t\t\t");
5823 debug_rtx (reload_reg_rtx[r]);
5826 if (reload_secondary_in_reload[r] != -1)
5828 fprintf (stderr, "\nsecondary_in_reload = ");
5829 fprintf (stderr, "%d ", reload_secondary_in_reload[r]);
5832 if (reload_secondary_out_reload[r] != -1)
5834 if (reload_secondary_in_reload[r] != -1)
5835 fprintf (stderr, ", secondary_out_reload = ");
5837 fprintf (stderr, "\nsecondary_out_reload = ");
5839 fprintf (stderr, "%d", reload_secondary_out_reload[r]);
5843 if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
5845 fprintf (stderr, "\nsecondary_in_icode = ");
5846 fprintf (stderr, "%s", insn_name[r]);
5849 if (reload_secondary_out_icode[r] != CODE_FOR_nothing)
5851 if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
5852 fprintf (stderr, ", secondary_out_icode = ");
5854 fprintf (stderr, "\nsecondary_out_icode = ");
5856 fprintf (stderr, "%s ", insn_name[r]);
5858 fprintf (stderr, "\n");
5861 fprintf (stderr, "\n");