1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
93 #include "insn-config.h"
94 #include "insn-codes.h"
98 #include "hard-reg-set.h"
102 #include "function.h"
106 #ifndef REGISTER_MOVE_COST
107 #define REGISTER_MOVE_COST(x, y) 2
110 #ifndef REGNO_MODE_OK_FOR_BASE_P
111 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
114 #ifndef REG_MODE_OK_FOR_BASE_P
115 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
118 /* The variables set up by `find_reloads' are:
120 n_reloads number of distinct reloads needed; max reload # + 1
121 tables indexed by reload number
122 reload_in rtx for value to reload from
123 reload_out rtx for where to store reload-reg afterward if nec
124 (often the same as reload_in)
125 reload_reg_class enum reg_class, saying what regs to reload into
126 reload_inmode enum machine_mode; mode this operand should have
127 when reloaded, on input.
128 reload_outmode enum machine_mode; mode this operand should have
129 when reloaded, on output.
130 reload_optional char, nonzero for an optional reload.
131 Optional reloads are ignored unless the
132 value is already sitting in a register.
133 reload_nongroup char, nonzero when a reload must use a register
134 not already allocated to a group.
135 reload_inc int, positive amount to increment or decrement by if
136 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
137 Ignored otherwise (don't assume it is zero).
138 reload_in_reg rtx. A reg for which reload_in is the equivalent.
139 If reload_in is a symbol_ref which came from
140 reg_equiv_constant, then this is the pseudo
141 which has that symbol_ref as equivalent.
142 reload_reg_rtx rtx. This is the register to reload into.
143 If it is zero when `find_reloads' returns,
144 you must find a suitable register in the class
145 specified by reload_reg_class, and store here
146 an rtx for that register with mode from
147 reload_inmode or reload_outmode.
148 reload_nocombine char, nonzero if this reload shouldn't be
149 combined with another reload.
150 reload_opnum int, operand number being reloaded. This is
151 used to group related reloads and need not always
152 be equal to the actual operand number in the insn,
153 though it current will be; for in-out operands, it
154 is one of the two operand numbers.
155 reload_when_needed enum, classifies reload as needed either for
156 addressing an input reload, addressing an output,
157 for addressing a non-reloaded mem ref,
158 or for unspecified purposes (i.e., more than one
160 reload_secondary_p int, 1 if this is a secondary register for one
162 reload_secondary_in_reload
163 reload_secondary_out_reload
164 int, gives the reload number of a secondary
165 reload, when needed; otherwise -1
166 reload_secondary_in_icode
167 reload_secondary_out_icode
168 enum insn_code, if a secondary reload is required,
169 gives the INSN_CODE that uses the secondary
170 reload as a scratch register, or CODE_FOR_nothing
171 if the secondary reload register is to be an
172 intermediate register. */
175 rtx reload_in[MAX_RELOADS];
176 rtx reload_out[MAX_RELOADS];
177 enum reg_class reload_reg_class[MAX_RELOADS];
178 enum machine_mode reload_inmode[MAX_RELOADS];
179 enum machine_mode reload_outmode[MAX_RELOADS];
180 rtx reload_reg_rtx[MAX_RELOADS];
181 char reload_optional[MAX_RELOADS];
182 char reload_nongroup[MAX_RELOADS];
183 int reload_inc[MAX_RELOADS];
184 rtx reload_in_reg[MAX_RELOADS];
185 rtx reload_out_reg[MAX_RELOADS];
186 char reload_nocombine[MAX_RELOADS];
187 int reload_opnum[MAX_RELOADS];
188 enum reload_type reload_when_needed[MAX_RELOADS];
189 int reload_secondary_p[MAX_RELOADS];
190 int reload_secondary_in_reload[MAX_RELOADS];
191 int reload_secondary_out_reload[MAX_RELOADS];
192 enum insn_code reload_secondary_in_icode[MAX_RELOADS];
193 enum insn_code reload_secondary_out_icode[MAX_RELOADS];
195 /* All the "earlyclobber" operands of the current insn
196 are recorded here. */
198 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
200 int reload_n_operands;
202 /* Replacing reloads.
204 If `replace_reloads' is nonzero, then as each reload is recorded
205 an entry is made for it in the table `replacements'.
206 Then later `subst_reloads' can look through that table and
207 perform all the replacements needed. */
209 /* Nonzero means record the places to replace. */
210 static int replace_reloads;
212 /* Each replacement is recorded with a structure like this. */
215 rtx *where; /* Location to store in */
216 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
217 a SUBREG; 0 otherwise. */
218 int what; /* which reload this is for */
219 enum machine_mode mode; /* mode it must have */
222 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
224 /* Number of replacements currently recorded. */
225 static int n_replacements;
227 /* Used to track what is modified by an operand. */
230 int reg_flag; /* Nonzero if referencing a register. */
231 int safe; /* Nonzero if this can't conflict with anything. */
232 rtx base; /* Base address for MEM. */
233 HOST_WIDE_INT start; /* Starting offset or register number. */
234 HOST_WIDE_INT end; /* Ending offset or register number. */
237 #ifdef SECONDARY_MEMORY_NEEDED
239 /* Save MEMs needed to copy from one class of registers to another. One MEM
240 is used per mode, but normally only one or two modes are ever used.
242 We keep two versions, before and after register elimination. The one
243 after register elimination is record separately for each operand. This
244 is done in case the address is not valid to be sure that we separately
247 static rtx secondary_memlocs[NUM_MACHINE_MODES];
248 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
251 /* The instruction we are doing reloads for;
252 so we can test whether a register dies in it. */
253 static rtx this_insn;
255 /* Nonzero if this instruction is a user-specified asm with operands. */
256 static int this_insn_is_asm;
258 /* If hard_regs_live_known is nonzero,
259 we can tell which hard regs are currently live,
260 at least enough to succeed in choosing dummy reloads. */
261 static int hard_regs_live_known;
263 /* Indexed by hard reg number,
264 element is nonnegative if hard reg has been spilled.
265 This vector is passed to `find_reloads' as an argument
266 and is not changed here. */
267 static short *static_reload_reg_p;
269 /* Set to 1 in subst_reg_equivs if it changes anything. */
270 static int subst_reg_equivs_changed;
272 /* On return from push_reload, holds the reload-number for the OUT
273 operand, which can be different for that from the input operand. */
274 static int output_reloadnum;
276 /* Compare two RTX's. */
277 #define MATCHES(x, y) \
278 (x == y || (x != 0 && (GET_CODE (x) == REG \
279 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
280 : rtx_equal_p (x, y) && ! side_effects_p (x))))
282 /* Indicates if two reloads purposes are for similar enough things that we
283 can merge their reloads. */
284 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
285 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
286 || ((when1) == (when2) && (op1) == (op2)) \
287 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
288 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
289 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
290 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
291 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
293 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
294 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
295 ((when1) != (when2) \
296 || ! ((op1) == (op2) \
297 || (when1) == RELOAD_FOR_INPUT \
298 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
299 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
301 /* If we are going to reload an address, compute the reload type to
303 #define ADDR_TYPE(type) \
304 ((type) == RELOAD_FOR_INPUT_ADDRESS \
305 ? RELOAD_FOR_INPADDR_ADDRESS \
306 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
307 ? RELOAD_FOR_OUTADDR_ADDRESS \
310 #ifdef HAVE_SECONDARY_RELOADS
311 static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class,
312 enum machine_mode, enum reload_type,
315 static enum reg_class find_valid_class PROTO((enum machine_mode, int));
316 static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
317 enum machine_mode, enum machine_mode,
318 int, int, int, enum reload_type));
319 static void push_replacement PROTO((rtx *, int, enum machine_mode));
320 static void combine_reloads PROTO((void));
321 static int find_reusable_reload PROTO((rtx *, rtx, enum reg_class,
322 enum reload_type, int, int));
323 static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
324 enum machine_mode, enum machine_mode,
325 enum reg_class, int, int));
326 static int earlyclobber_operand_p PROTO((rtx));
327 static int hard_reg_set_here_p PROTO((int, int, rtx));
328 static struct decomposition decompose PROTO((rtx));
329 static int immune_p PROTO((rtx, rtx, struct decomposition));
330 static int alternative_allows_memconst PROTO((const char *, int));
331 static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int, rtx));
332 static rtx make_memloc PROTO((rtx, int));
333 static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
334 int, enum reload_type, int, rtx));
335 static rtx subst_reg_equivs PROTO((rtx, rtx));
336 static rtx subst_indexed_address PROTO((rtx));
337 static int find_reloads_address_1 PROTO((enum machine_mode, rtx, int, rtx *,
338 int, enum reload_type,int, rtx));
339 static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
340 enum machine_mode, int,
341 enum reload_type, int));
342 static rtx find_reloads_subreg_address PROTO((rtx, int, int, enum reload_type,
344 static int find_inc_amount PROTO((rtx, rtx));
345 static int loc_mentioned_in_p PROTO((rtx *, rtx));
347 #ifdef HAVE_SECONDARY_RELOADS
349 /* Determine if any secondary reloads are needed for loading (if IN_P is
350 non-zero) or storing (if IN_P is zero) X to or from a reload register of
351 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
352 are needed, push them.
354 Return the reload number of the secondary reload we made, or -1 if
355 we didn't need one. *PICODE is set to the insn_code to use if we do
356 need a secondary reload. */
359 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
365 enum reg_class reload_class;
366 enum machine_mode reload_mode;
367 enum reload_type type;
368 enum insn_code *picode;
370 enum reg_class class = NO_REGS;
371 enum machine_mode mode = reload_mode;
372 enum insn_code icode = CODE_FOR_nothing;
373 enum reg_class t_class = NO_REGS;
374 enum machine_mode t_mode = VOIDmode;
375 enum insn_code t_icode = CODE_FOR_nothing;
376 enum reload_type secondary_type;
377 int s_reload, t_reload = -1;
379 if (type == RELOAD_FOR_INPUT_ADDRESS
380 || type == RELOAD_FOR_OUTPUT_ADDRESS
381 || type == RELOAD_FOR_INPADDR_ADDRESS
382 || type == RELOAD_FOR_OUTADDR_ADDRESS)
383 secondary_type = type;
385 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
387 *picode = CODE_FOR_nothing;
389 /* If X is a paradoxical SUBREG, use the inner value to determine both the
390 mode and object being reloaded. */
391 if (GET_CODE (x) == SUBREG
392 && (GET_MODE_SIZE (GET_MODE (x))
393 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
396 reload_mode = GET_MODE (x);
399 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
400 is still a pseudo-register by now, it *must* have an equivalent MEM
401 but we don't want to assume that), use that equivalent when seeing if
402 a secondary reload is needed since whether or not a reload is needed
403 might be sensitive to the form of the MEM. */
405 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
406 && reg_equiv_mem[REGNO (x)] != 0)
407 x = reg_equiv_mem[REGNO (x)];
409 #ifdef SECONDARY_INPUT_RELOAD_CLASS
411 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
414 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
416 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
419 /* If we don't need any secondary registers, done. */
420 if (class == NO_REGS)
423 /* Get a possible insn to use. If the predicate doesn't accept X, don't
426 icode = (in_p ? reload_in_optab[(int) reload_mode]
427 : reload_out_optab[(int) reload_mode]);
429 if (icode != CODE_FOR_nothing
430 && insn_data[(int) icode].operand[in_p].predicate
431 && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode)))
432 icode = CODE_FOR_nothing;
434 /* If we will be using an insn, see if it can directly handle the reload
435 register we will be using. If it can, the secondary reload is for a
436 scratch register. If it can't, we will use the secondary reload for
437 an intermediate register and require a tertiary reload for the scratch
440 if (icode != CODE_FOR_nothing)
442 /* If IN_P is non-zero, the reload register will be the output in
443 operand 0. If IN_P is zero, the reload register will be the input
444 in operand 1. Outputs should have an initial "=", which we must
448 = insn_data[(int) icode].operand[!in_p].constraint[in_p];
449 enum reg_class insn_class
450 = (insn_letter == 'r' ? GENERAL_REGS
451 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter));
453 if (insn_class == NO_REGS
455 && insn_data[(int) icode].operand[!in_p].constraint[0] != '=')
456 /* The scratch register's constraint must start with "=&". */
457 || insn_data[(int) icode].operand[2].constraint[0] != '='
458 || insn_data[(int) icode].operand[2].constraint[1] != '&')
461 if (reg_class_subset_p (reload_class, insn_class))
462 mode = insn_data[(int) icode].operand[2].mode;
465 char t_letter = insn_data[(int) icode].operand[2].constraint[2];
467 t_mode = insn_data[(int) icode].operand[2].mode;
468 t_class = (t_letter == 'r' ? GENERAL_REGS
469 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter));
471 icode = CODE_FOR_nothing;
475 /* This case isn't valid, so fail. Reload is allowed to use the same
476 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
477 in the case of a secondary register, we actually need two different
478 registers for correct code. We fail here to prevent the possibility of
479 silently generating incorrect code later.
481 The convention is that secondary input reloads are valid only if the
482 secondary_class is different from class. If you have such a case, you
483 can not use secondary reloads, you must work around the problem some
486 Allow this when MODE is not reload_mode and assume that the generated
487 code handles this case (it does on the Alpha, which is the only place
488 this currently happens). */
490 if (in_p && class == reload_class && mode == reload_mode)
493 /* If we need a tertiary reload, see if we have one we can reuse or else
496 if (t_class != NO_REGS)
498 for (t_reload = 0; t_reload < n_reloads; t_reload++)
499 if (reload_secondary_p[t_reload]
500 && (reg_class_subset_p (t_class, reload_reg_class[t_reload])
501 || reg_class_subset_p (reload_reg_class[t_reload], t_class))
502 && ((in_p && reload_inmode[t_reload] == t_mode)
503 || (! in_p && reload_outmode[t_reload] == t_mode))
504 && ((in_p && (reload_secondary_in_icode[t_reload]
505 == CODE_FOR_nothing))
506 || (! in_p &&(reload_secondary_out_icode[t_reload]
507 == CODE_FOR_nothing)))
508 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
509 && MERGABLE_RELOADS (secondary_type,
510 reload_when_needed[t_reload],
511 opnum, reload_opnum[t_reload]))
514 reload_inmode[t_reload] = t_mode;
516 reload_outmode[t_reload] = t_mode;
518 if (reg_class_subset_p (t_class, reload_reg_class[t_reload]))
519 reload_reg_class[t_reload] = t_class;
521 reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum);
522 reload_optional[t_reload] &= optional;
523 reload_secondary_p[t_reload] = 1;
524 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload],
525 opnum, reload_opnum[t_reload]))
526 reload_when_needed[t_reload] = RELOAD_OTHER;
529 if (t_reload == n_reloads)
531 /* We need to make a new tertiary reload for this register class. */
532 reload_in[t_reload] = reload_out[t_reload] = 0;
533 reload_reg_class[t_reload] = t_class;
534 reload_inmode[t_reload] = in_p ? t_mode : VOIDmode;
535 reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode;
536 reload_reg_rtx[t_reload] = 0;
537 reload_optional[t_reload] = optional;
538 reload_nongroup[t_reload] = 0;
539 reload_inc[t_reload] = 0;
540 /* Maybe we could combine these, but it seems too tricky. */
541 reload_nocombine[t_reload] = 1;
542 reload_in_reg[t_reload] = 0;
543 reload_out_reg[t_reload] = 0;
544 reload_opnum[t_reload] = opnum;
545 reload_when_needed[t_reload] = secondary_type;
546 reload_secondary_in_reload[t_reload] = -1;
547 reload_secondary_out_reload[t_reload] = -1;
548 reload_secondary_in_icode[t_reload] = CODE_FOR_nothing;
549 reload_secondary_out_icode[t_reload] = CODE_FOR_nothing;
550 reload_secondary_p[t_reload] = 1;
556 /* See if we can reuse an existing secondary reload. */
557 for (s_reload = 0; s_reload < n_reloads; s_reload++)
558 if (reload_secondary_p[s_reload]
559 && (reg_class_subset_p (class, reload_reg_class[s_reload])
560 || reg_class_subset_p (reload_reg_class[s_reload], class))
561 && ((in_p && reload_inmode[s_reload] == mode)
562 || (! in_p && reload_outmode[s_reload] == mode))
563 && ((in_p && reload_secondary_in_reload[s_reload] == t_reload)
564 || (! in_p && reload_secondary_out_reload[s_reload] == t_reload))
565 && ((in_p && reload_secondary_in_icode[s_reload] == t_icode)
566 || (! in_p && reload_secondary_out_icode[s_reload] == t_icode))
567 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
568 && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload],
569 opnum, reload_opnum[s_reload]))
572 reload_inmode[s_reload] = mode;
574 reload_outmode[s_reload] = mode;
576 if (reg_class_subset_p (class, reload_reg_class[s_reload]))
577 reload_reg_class[s_reload] = class;
579 reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum);
580 reload_optional[s_reload] &= optional;
581 reload_secondary_p[s_reload] = 1;
582 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload],
583 opnum, reload_opnum[s_reload]))
584 reload_when_needed[s_reload] = RELOAD_OTHER;
587 if (s_reload == n_reloads)
589 #ifdef SECONDARY_MEMORY_NEEDED
590 /* If we need a memory location to copy between the two reload regs,
591 set it up now. Note that we do the input case before making
592 the reload and the output case after. This is due to the
593 way reloads are output. */
595 if (in_p && icode == CODE_FOR_nothing
596 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
597 get_secondary_mem (x, reload_mode, opnum, type);
600 /* We need to make a new secondary reload for this register class. */
601 reload_in[s_reload] = reload_out[s_reload] = 0;
602 reload_reg_class[s_reload] = class;
604 reload_inmode[s_reload] = in_p ? mode : VOIDmode;
605 reload_outmode[s_reload] = ! in_p ? mode : VOIDmode;
606 reload_reg_rtx[s_reload] = 0;
607 reload_optional[s_reload] = optional;
608 reload_nongroup[s_reload] = 0;
609 reload_inc[s_reload] = 0;
610 /* Maybe we could combine these, but it seems too tricky. */
611 reload_nocombine[s_reload] = 1;
612 reload_in_reg[s_reload] = 0;
613 reload_out_reg[s_reload] = 0;
614 reload_opnum[s_reload] = opnum;
615 reload_when_needed[s_reload] = secondary_type;
616 reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1;
617 reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1;
618 reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing;
619 reload_secondary_out_icode[s_reload]
620 = ! in_p ? t_icode : CODE_FOR_nothing;
621 reload_secondary_p[s_reload] = 1;
625 #ifdef SECONDARY_MEMORY_NEEDED
626 if (! in_p && icode == CODE_FOR_nothing
627 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
628 get_secondary_mem (x, mode, opnum, type);
635 #endif /* HAVE_SECONDARY_RELOADS */
637 #ifdef SECONDARY_MEMORY_NEEDED
639 /* Return a memory location that will be used to copy X in mode MODE.
640 If we haven't already made a location for this mode in this insn,
641 call find_reloads_address on the location being returned. */
644 get_secondary_mem (x, mode, opnum, type)
646 enum machine_mode mode;
648 enum reload_type type;
653 /* By default, if MODE is narrower than a word, widen it to a word.
654 This is required because most machines that require these memory
655 locations do not support short load and stores from all registers
656 (e.g., FP registers). */
658 #ifdef SECONDARY_MEMORY_NEEDED_MODE
659 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
661 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
662 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
665 /* If we already have made a MEM for this operand in MODE, return it. */
666 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
667 return secondary_memlocs_elim[(int) mode][opnum];
669 /* If this is the first time we've tried to get a MEM for this mode,
670 allocate a new one. `something_changed' in reload will get set
671 by noticing that the frame size has changed. */
673 if (secondary_memlocs[(int) mode] == 0)
675 #ifdef SECONDARY_MEMORY_NEEDED_RTX
676 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
678 secondary_memlocs[(int) mode]
679 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
683 /* Get a version of the address doing any eliminations needed. If that
684 didn't give us a new MEM, make a new one if it isn't valid. */
686 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
687 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
689 if (! mem_valid && loc == secondary_memlocs[(int) mode])
690 loc = copy_rtx (loc);
692 /* The only time the call below will do anything is if the stack
693 offset is too large. In that case IND_LEVELS doesn't matter, so we
694 can just pass a zero. Adjust the type to be the address of the
695 corresponding object. If the address was valid, save the eliminated
696 address. If it wasn't valid, we need to make a reload each time, so
701 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
702 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
705 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
709 secondary_memlocs_elim[(int) mode][opnum] = loc;
713 /* Clear any secondary memory locations we've made. */
716 clear_secondary_mem ()
718 bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);
720 #endif /* SECONDARY_MEMORY_NEEDED */
722 /* Find the largest class for which every register number plus N is valid in
723 M1 (if in range). Abort if no such class exists. */
725 static enum reg_class
726 find_valid_class (m1, n)
727 enum machine_mode m1;
732 enum reg_class best_class;
735 for (class = 1; class < N_REG_CLASSES; class++)
738 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
739 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
740 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
741 && ! HARD_REGNO_MODE_OK (regno + n, m1))
744 if (! bad && reg_class_size[class] > best_size)
745 best_class = class, best_size = reg_class_size[class];
754 /* Return the number of a previously made reload that can be combined with
755 a new one, or n_reloads if none of the existing reloads can be used.
756 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
757 push_reload, they determine the kind of the new reload that we try to
758 combine. P_IN points to the corresponding value of IN, which can be
759 modified by this function.
760 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
762 find_reusable_reload (p_in, out, class, type, opnum, dont_share)
764 enum reg_class class;
765 enum reload_type type;
766 int opnum, dont_share;
770 /* We can't merge two reloads if the output of either one is
773 if (earlyclobber_operand_p (out))
776 /* We can use an existing reload if the class is right
777 and at least one of IN and OUT is a match
778 and the other is at worst neutral.
779 (A zero compared against anything is neutral.)
781 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
782 for the same thing since that can cause us to need more reload registers
783 than we otherwise would. */
785 for (i = 0; i < n_reloads; i++)
786 if ((reg_class_subset_p (class, reload_reg_class[i])
787 || reg_class_subset_p (reload_reg_class[i], class))
788 /* If the existing reload has a register, it must fit our class. */
789 && (reload_reg_rtx[i] == 0
790 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
791 true_regnum (reload_reg_rtx[i])))
792 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
793 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
795 (out != 0 && MATCHES (reload_out[i], out)
796 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
797 && (reload_out[i] == 0 || ! earlyclobber_operand_p (reload_out[i]))
798 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
799 && MERGABLE_RELOADS (type, reload_when_needed[i],
800 opnum, reload_opnum[i]))
803 /* Reloading a plain reg for input can match a reload to postincrement
804 that reg, since the postincrement's value is the right value.
805 Likewise, it can match a preincrement reload, since we regard
806 the preincrementation as happening before any ref in this insn
808 for (i = 0; i < n_reloads; i++)
809 if ((reg_class_subset_p (class, reload_reg_class[i])
810 || reg_class_subset_p (reload_reg_class[i], class))
811 /* If the existing reload has a register, it must fit our
813 && (reload_reg_rtx[i] == 0
814 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
815 true_regnum (reload_reg_rtx[i])))
816 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
817 && ((GET_CODE (in) == REG
818 && (GET_CODE (reload_in[i]) == POST_INC
819 || GET_CODE (reload_in[i]) == POST_DEC
820 || GET_CODE (reload_in[i]) == PRE_INC
821 || GET_CODE (reload_in[i]) == PRE_DEC)
822 && MATCHES (XEXP (reload_in[i], 0), in))
824 (GET_CODE (reload_in[i]) == REG
825 && (GET_CODE (in) == POST_INC
826 || GET_CODE (in) == POST_DEC
827 || GET_CODE (in) == PRE_INC
828 || GET_CODE (in) == PRE_DEC)
829 && MATCHES (XEXP (in, 0), reload_in[i])))
830 && (reload_out[i] == 0 || ! earlyclobber_operand_p (reload_out[i]))
831 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
832 && MERGABLE_RELOADS (type, reload_when_needed[i],
833 opnum, reload_opnum[i]))
835 /* Make sure reload_in ultimately has the increment,
836 not the plain register. */
837 if (GET_CODE (in) == REG)
838 *p_in = reload_in[i];
844 /* Record one reload that needs to be performed.
845 IN is an rtx saying where the data are to be found before this instruction.
846 OUT says where they must be stored after the instruction.
847 (IN is zero for data not read, and OUT is zero for data not written.)
848 INLOC and OUTLOC point to the places in the instructions where
849 IN and OUT were found.
850 If IN and OUT are both non-zero, it means the same register must be used
851 to reload both IN and OUT.
853 CLASS is a register class required for the reloaded data.
854 INMODE is the machine mode that the instruction requires
855 for the reg that replaces IN and OUTMODE is likewise for OUT.
857 If IN is zero, then OUT's location and mode should be passed as
860 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
862 OPTIONAL nonzero means this reload does not need to be performed:
863 it can be discarded if that is more convenient.
865 OPNUM and TYPE say what the purpose of this reload is.
867 The return value is the reload-number for this reload.
869 If both IN and OUT are nonzero, in some rare cases we might
870 want to make two separate reloads. (Actually we never do this now.)
871 Therefore, the reload-number for OUT is stored in
872 output_reloadnum when we return; the return value applies to IN.
873 Usually (presently always), when IN and OUT are nonzero,
874 the two reload-numbers are equal, but the caller should be careful to
878 push_reload (in, out, inloc, outloc, class,
879 inmode, outmode, strict_low, optional, opnum, type)
882 enum reg_class class;
883 enum machine_mode inmode, outmode;
887 enum reload_type type;
891 int dont_remove_subreg = 0;
892 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
893 int secondary_in_reload = -1, secondary_out_reload = -1;
894 enum insn_code secondary_in_icode = CODE_FOR_nothing;
895 enum insn_code secondary_out_icode = CODE_FOR_nothing;
897 /* INMODE and/or OUTMODE could be VOIDmode if no mode
898 has been specified for the operand. In that case,
899 use the operand's mode as the mode to reload. */
900 if (inmode == VOIDmode && in != 0)
901 inmode = GET_MODE (in);
902 if (outmode == VOIDmode && out != 0)
903 outmode = GET_MODE (out);
905 /* If IN is a pseudo register everywhere-equivalent to a constant, and
906 it is not in a hard register, reload straight from the constant,
907 since we want to get rid of such pseudo registers.
908 Often this is done earlier, but not always in find_reloads_address. */
909 if (in != 0 && GET_CODE (in) == REG)
911 register int regno = REGNO (in);
913 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
914 && reg_equiv_constant[regno] != 0)
915 in = reg_equiv_constant[regno];
918 /* Likewise for OUT. Of course, OUT will never be equivalent to
919 an actual constant, but it might be equivalent to a memory location
920 (in the case of a parameter). */
921 if (out != 0 && GET_CODE (out) == REG)
923 register int regno = REGNO (out);
925 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
926 && reg_equiv_constant[regno] != 0)
927 out = reg_equiv_constant[regno];
930 /* If we have a read-write operand with an address side-effect,
931 change either IN or OUT so the side-effect happens only once. */
932 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
934 if (GET_CODE (XEXP (in, 0)) == POST_INC
935 || GET_CODE (XEXP (in, 0)) == POST_DEC)
936 in = gen_rtx_MEM (GET_MODE (in), XEXP (XEXP (in, 0), 0));
937 if (GET_CODE (XEXP (in, 0)) == PRE_INC
938 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
939 out = gen_rtx_MEM (GET_MODE (out), XEXP (XEXP (out, 0), 0));
942 /* If we are reloading a (SUBREG constant ...), really reload just the
943 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
944 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
945 a pseudo and hence will become a MEM) with M1 wider than M2 and the
946 register is a pseudo, also reload the inside expression.
947 For machines that extend byte loads, do this for any SUBREG of a pseudo
948 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
949 M2 is an integral mode that gets extended when loaded.
950 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
951 either M1 is not valid for R or M2 is wider than a word but we only
952 need one word to store an M2-sized quantity in R.
953 (However, if OUT is nonzero, we need to reload the reg *and*
954 the subreg, so do nothing here, and let following statement handle it.)
956 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
957 we can't handle it here because CONST_INT does not indicate a mode.
959 Similarly, we must reload the inside expression if we have a
960 STRICT_LOW_PART (presumably, in == out in the cas).
962 Also reload the inner expression if it does not require a secondary
963 reload but the SUBREG does.
965 Finally, reload the inner expression if it is a register that is in
966 the class whose registers cannot be referenced in a different size
967 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
968 cannot reload just the inside since we might end up with the wrong
969 register class. But if it is inside a STRICT_LOW_PART, we have
970 no choice, so we hope we do get the right register class there. */
972 if (in != 0 && GET_CODE (in) == SUBREG
973 && (SUBREG_WORD (in) == 0 || strict_low)
974 #ifdef CLASS_CANNOT_CHANGE_SIZE
975 && class != CLASS_CANNOT_CHANGE_SIZE
977 && (CONSTANT_P (SUBREG_REG (in))
978 || GET_CODE (SUBREG_REG (in)) == PLUS
980 || (((GET_CODE (SUBREG_REG (in)) == REG
981 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
982 || GET_CODE (SUBREG_REG (in)) == MEM)
983 && ((GET_MODE_SIZE (inmode)
984 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
985 #ifdef LOAD_EXTEND_OP
986 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
987 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
989 && (GET_MODE_SIZE (inmode)
990 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
991 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
992 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
994 #ifdef WORD_REGISTER_OPERATIONS
995 || ((GET_MODE_SIZE (inmode)
996 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
997 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
998 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1002 || (GET_CODE (SUBREG_REG (in)) == REG
1003 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1004 /* The case where out is nonzero
1005 is handled differently in the following statement. */
1006 && (out == 0 || SUBREG_WORD (in) == 0)
1007 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1008 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1010 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1012 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1013 GET_MODE (SUBREG_REG (in)))))
1014 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
1015 + SUBREG_WORD (in)),
1017 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1018 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
1019 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1020 GET_MODE (SUBREG_REG (in)),
1024 #ifdef CLASS_CANNOT_CHANGE_SIZE
1025 || (GET_CODE (SUBREG_REG (in)) == REG
1026 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1027 && (TEST_HARD_REG_BIT
1028 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
1029 REGNO (SUBREG_REG (in))))
1030 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1031 != GET_MODE_SIZE (inmode)))
1035 in_subreg_loc = inloc;
1036 inloc = &SUBREG_REG (in);
1038 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1039 if (GET_CODE (in) == MEM)
1040 /* This is supposed to happen only for paradoxical subregs made by
1041 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1042 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
1045 inmode = GET_MODE (in);
1048 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1049 either M1 is not valid for R or M2 is wider than a word but we only
1050 need one word to store an M2-sized quantity in R.
1052 However, we must reload the inner reg *as well as* the subreg in
1055 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1056 code above. This can happen if SUBREG_WORD != 0. */
1058 if (in != 0 && GET_CODE (in) == SUBREG
1059 && (CONSTANT_P (SUBREG_REG (in))
1060 || (GET_CODE (SUBREG_REG (in)) == REG
1061 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1062 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in))
1065 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1066 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1068 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1070 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1071 GET_MODE (SUBREG_REG (in)))))))))
1073 /* This relies on the fact that emit_reload_insns outputs the
1074 instructions for input reloads of type RELOAD_OTHER in the same
1075 order as the reloads. Thus if the outer reload is also of type
1076 RELOAD_OTHER, we are guaranteed that this inner reload will be
1077 output before the outer reload. */
1078 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
1079 find_valid_class (inmode, SUBREG_WORD (in)),
1080 VOIDmode, VOIDmode, 0, 0, opnum, type);
1081 dont_remove_subreg = 1;
1084 /* Similarly for paradoxical and problematical SUBREGs on the output.
1085 Note that there is no reason we need worry about the previous value
1086 of SUBREG_REG (out); even if wider than out,
1087 storing in a subreg is entitled to clobber it all
1088 (except in the case of STRICT_LOW_PART,
1089 and in that case the constraint should label it input-output.) */
1090 if (out != 0 && GET_CODE (out) == SUBREG
1091 && (SUBREG_WORD (out) == 0 || strict_low)
1092 #ifdef CLASS_CANNOT_CHANGE_SIZE
1093 && class != CLASS_CANNOT_CHANGE_SIZE
1095 && (CONSTANT_P (SUBREG_REG (out))
1097 || (((GET_CODE (SUBREG_REG (out)) == REG
1098 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1099 || GET_CODE (SUBREG_REG (out)) == MEM)
1100 && ((GET_MODE_SIZE (outmode)
1101 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1102 #ifdef WORD_REGISTER_OPERATIONS
1103 || ((GET_MODE_SIZE (outmode)
1104 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1105 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1106 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1110 || (GET_CODE (SUBREG_REG (out)) == REG
1111 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1112 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1113 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1115 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1117 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1118 GET_MODE (SUBREG_REG (out)))))
1119 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
1120 + SUBREG_WORD (out)),
1122 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1123 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1124 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1125 GET_MODE (SUBREG_REG (out)),
1129 #ifdef CLASS_CANNOT_CHANGE_SIZE
1130 || (GET_CODE (SUBREG_REG (out)) == REG
1131 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1132 && (TEST_HARD_REG_BIT
1133 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
1134 REGNO (SUBREG_REG (out))))
1135 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1136 != GET_MODE_SIZE (outmode)))
1140 out_subreg_loc = outloc;
1141 outloc = &SUBREG_REG (out);
1143 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1144 if (GET_CODE (out) == MEM
1145 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1148 outmode = GET_MODE (out);
1151 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1152 either M1 is not valid for R or M2 is wider than a word but we only
1153 need one word to store an M2-sized quantity in R.
1155 However, we must reload the inner reg *as well as* the subreg in
1156 that case. In this case, the inner reg is an in-out reload. */
1158 if (out != 0 && GET_CODE (out) == SUBREG
1159 && GET_CODE (SUBREG_REG (out)) == REG
1160 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1161 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)) + SUBREG_WORD (out),
1163 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1164 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1166 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1168 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1169 GET_MODE (SUBREG_REG (out)))))))
1171 /* This relies on the fact that emit_reload_insns outputs the
1172 instructions for output reloads of type RELOAD_OTHER in reverse
1173 order of the reloads. Thus if the outer reload is also of type
1174 RELOAD_OTHER, we are guaranteed that this inner reload will be
1175 output after the outer reload. */
1176 dont_remove_subreg = 1;
1177 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1179 find_valid_class (outmode, SUBREG_WORD (out)),
1180 VOIDmode, VOIDmode, 0, 0,
1181 opnum, RELOAD_OTHER);
1184 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1185 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1186 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1187 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1190 /* If IN is a SUBREG of a hard register, make a new REG. This
1191 simplifies some of the cases below. */
1193 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1194 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1195 && ! dont_remove_subreg)
1196 in = gen_rtx_REG (GET_MODE (in),
1197 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
1199 /* Similarly for OUT. */
1200 if (out != 0 && GET_CODE (out) == SUBREG
1201 && GET_CODE (SUBREG_REG (out)) == REG
1202 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1203 && ! dont_remove_subreg)
1204 out = gen_rtx_REG (GET_MODE (out),
1205 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
1207 /* Narrow down the class of register wanted if that is
1208 desirable on this machine for efficiency. */
1210 class = PREFERRED_RELOAD_CLASS (in, class);
1212 /* Output reloads may need analogous treatment, different in detail. */
1213 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1215 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1218 /* Make sure we use a class that can handle the actual pseudo
1219 inside any subreg. For example, on the 386, QImode regs
1220 can appear within SImode subregs. Although GENERAL_REGS
1221 can handle SImode, QImode needs a smaller class. */
1222 #ifdef LIMIT_RELOAD_CLASS
1224 class = LIMIT_RELOAD_CLASS (inmode, class);
1225 else if (in != 0 && GET_CODE (in) == SUBREG)
1226 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1229 class = LIMIT_RELOAD_CLASS (outmode, class);
1230 if (out != 0 && GET_CODE (out) == SUBREG)
1231 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1234 /* Verify that this class is at least possible for the mode that
1236 if (this_insn_is_asm)
1238 enum machine_mode mode;
1239 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1243 if (mode == VOIDmode)
1245 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1250 outmode = word_mode;
1252 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1253 if (HARD_REGNO_MODE_OK (i, mode)
1254 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1256 int nregs = HARD_REGNO_NREGS (i, mode);
1259 for (j = 1; j < nregs; j++)
1260 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1265 if (i == FIRST_PSEUDO_REGISTER)
1267 error_for_asm (this_insn, "impossible register constraint in `asm'");
1272 /* Optional output reloads are always OK even if we have no register class,
1273 since the function of these reloads is only to have spill_reg_store etc.
1274 set, so that the storing insn can be deleted later. */
1275 if (class == NO_REGS
1276 && (optional == 0 || type != RELOAD_FOR_OUTPUT))
1279 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1283 /* See if we need a secondary reload register to move between CLASS
1284 and IN or CLASS and OUT. Get the icode and push any required reloads
1285 needed for each of them if so. */
1287 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1290 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1291 &secondary_in_icode);
1294 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1295 if (out != 0 && GET_CODE (out) != SCRATCH)
1296 secondary_out_reload
1297 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1298 type, &secondary_out_icode);
1301 /* We found no existing reload suitable for re-use.
1302 So add an additional reload. */
1304 #ifdef SECONDARY_MEMORY_NEEDED
1305 /* If a memory location is needed for the copy, make one. */
1306 if (in != 0 && GET_CODE (in) == REG
1307 && REGNO (in) < FIRST_PSEUDO_REGISTER
1308 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1310 get_secondary_mem (in, inmode, opnum, type);
1315 reload_out[i] = out;
1316 reload_reg_class[i] = class;
1317 reload_inmode[i] = inmode;
1318 reload_outmode[i] = outmode;
1319 reload_reg_rtx[i] = 0;
1320 reload_optional[i] = optional;
1321 reload_nongroup[i] = 0;
1323 reload_nocombine[i] = 0;
1324 reload_in_reg[i] = inloc ? *inloc : 0;
1325 reload_out_reg[i] = outloc ? *outloc : 0;
1326 reload_opnum[i] = opnum;
1327 reload_when_needed[i] = type;
1328 reload_secondary_in_reload[i] = secondary_in_reload;
1329 reload_secondary_out_reload[i] = secondary_out_reload;
1330 reload_secondary_in_icode[i] = secondary_in_icode;
1331 reload_secondary_out_icode[i] = secondary_out_icode;
1332 reload_secondary_p[i] = 0;
1336 #ifdef SECONDARY_MEMORY_NEEDED
1337 if (out != 0 && GET_CODE (out) == REG
1338 && REGNO (out) < FIRST_PSEUDO_REGISTER
1339 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1341 get_secondary_mem (out, outmode, opnum, type);
1346 /* We are reusing an existing reload,
1347 but we may have additional information for it.
1348 For example, we may now have both IN and OUT
1349 while the old one may have just one of them. */
1351 /* The modes can be different. If they are, we want to reload in
1352 the larger mode, so that the value is valid for both modes. */
1353 if (inmode != VOIDmode
1354 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (reload_inmode[i]))
1355 reload_inmode[i] = inmode;
1356 if (outmode != VOIDmode
1357 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (reload_outmode[i]))
1358 reload_outmode[i] = outmode;
1361 rtx in_reg = inloc ? *inloc : 0;
1362 /* If we merge reloads for two distinct rtl expressions that
1363 are identical in content, there might be duplicate address
1364 reloads. Remove the extra set now, so that if we later find
1365 that we can inherit this reload, we can get rid of the
1366 address reloads altogether.
1368 Do not do this if both reloads are optional since the result
1369 would be an optional reload which could potentially leave
1370 unresolved address replacements.
1372 It is not sufficient to call transfer_replacements since
1373 choose_reload_regs will remove the replacements for address
1374 reloads of inherited reloads which results in the same
1376 if (reload_in[i] != in && rtx_equal_p (in, reload_in[i])
1377 && ! (reload_optional[i] && optional))
1379 /* We must keep the address reload with the lower operand
1381 if (opnum > reload_opnum[i])
1383 remove_address_replacements (in);
1385 in_reg = reload_in_reg[i];
1388 remove_address_replacements (reload_in[i]);
1391 reload_in_reg[i] = in_reg;
1395 reload_out[i] = out;
1396 reload_out_reg[i] = outloc ? *outloc : 0;
1398 if (reg_class_subset_p (class, reload_reg_class[i]))
1399 reload_reg_class[i] = class;
1400 reload_optional[i] &= optional;
1401 if (MERGE_TO_OTHER (type, reload_when_needed[i],
1402 opnum, reload_opnum[i]))
1403 reload_when_needed[i] = RELOAD_OTHER;
1404 reload_opnum[i] = MIN (reload_opnum[i], opnum);
1407 /* If the ostensible rtx being reload differs from the rtx found
1408 in the location to substitute, this reload is not safe to combine
1409 because we cannot reliably tell whether it appears in the insn. */
1411 if (in != 0 && in != *inloc)
1412 reload_nocombine[i] = 1;
1415 /* This was replaced by changes in find_reloads_address_1 and the new
1416 function inc_for_reload, which go with a new meaning of reload_inc. */
1418 /* If this is an IN/OUT reload in an insn that sets the CC,
1419 it must be for an autoincrement. It doesn't work to store
1420 the incremented value after the insn because that would clobber the CC.
1421 So we must do the increment of the value reloaded from,
1422 increment it, store it back, then decrement again. */
1423 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1427 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1428 /* If we did not find a nonzero amount-to-increment-by,
1429 that contradicts the belief that IN is being incremented
1430 in an address in this insn. */
1431 if (reload_inc[i] == 0)
1436 /* If we will replace IN and OUT with the reload-reg,
1437 record where they are located so that substitution need
1438 not do a tree walk. */
1440 if (replace_reloads)
1444 register struct replacement *r = &replacements[n_replacements++];
1446 r->subreg_loc = in_subreg_loc;
1450 if (outloc != 0 && outloc != inloc)
1452 register struct replacement *r = &replacements[n_replacements++];
1455 r->subreg_loc = out_subreg_loc;
1460 /* If this reload is just being introduced and it has both
1461 an incoming quantity and an outgoing quantity that are
1462 supposed to be made to match, see if either one of the two
1463 can serve as the place to reload into.
1465 If one of them is acceptable, set reload_reg_rtx[i]
1468 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1470 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1472 reload_reg_class[i], i,
1473 earlyclobber_operand_p (out));
1475 /* If the outgoing register already contains the same value
1476 as the incoming one, we can dispense with loading it.
1477 The easiest way to tell the caller that is to give a phony
1478 value for the incoming operand (same as outgoing one). */
1479 if (reload_reg_rtx[i] == out
1480 && (GET_CODE (in) == REG || CONSTANT_P (in))
1481 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1482 static_reload_reg_p, i, inmode))
1486 /* If this is an input reload and the operand contains a register that
1487 dies in this insn and is used nowhere else, see if it is the right class
1488 to be used for this reload. Use it if so. (This occurs most commonly
1489 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1490 this if it is also an output reload that mentions the register unless
1491 the output is a SUBREG that clobbers an entire register.
1493 Note that the operand might be one of the spill regs, if it is a
1494 pseudo reg and we are in a block where spilling has not taken place.
1495 But if there is no spilling in this block, that is OK.
1496 An explicitly used hard reg cannot be a spill reg. */
1498 if (reload_reg_rtx[i] == 0 && in != 0)
1503 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1504 if (REG_NOTE_KIND (note) == REG_DEAD
1505 && GET_CODE (XEXP (note, 0)) == REG
1506 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1507 && reg_mentioned_p (XEXP (note, 0), in)
1508 && ! refers_to_regno_for_reload_p (regno,
1510 + HARD_REGNO_NREGS (regno,
1512 PATTERN (this_insn), inloc)
1513 /* If this is also an output reload, IN cannot be used as
1514 the reload register if it is set in this insn unless IN
1516 && (out == 0 || in == out
1517 || ! hard_reg_set_here_p (regno,
1519 + HARD_REGNO_NREGS (regno,
1521 PATTERN (this_insn)))
1522 /* ??? Why is this code so different from the previous?
1523 Is there any simple coherent way to describe the two together?
1524 What's going on here. */
1526 || (GET_CODE (in) == SUBREG
1527 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1529 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1530 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1531 /* Make sure the operand fits in the reg that dies. */
1532 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1533 && HARD_REGNO_MODE_OK (regno, inmode)
1534 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1535 && HARD_REGNO_MODE_OK (regno, outmode)
1536 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1537 && !fixed_regs[regno])
1539 reload_reg_rtx[i] = gen_rtx_REG (inmode, regno);
1545 output_reloadnum = i;
1550 /* Record an additional place we must replace a value
1551 for which we have already recorded a reload.
1552 RELOADNUM is the value returned by push_reload
1553 when the reload was recorded.
1554 This is used in insn patterns that use match_dup. */
1557 push_replacement (loc, reloadnum, mode)
1560 enum machine_mode mode;
1562 if (replace_reloads)
1564 register struct replacement *r = &replacements[n_replacements++];
1565 r->what = reloadnum;
1572 /* Transfer all replacements that used to be in reload FROM to be in
1576 transfer_replacements (to, from)
1581 for (i = 0; i < n_replacements; i++)
1582 if (replacements[i].what == from)
1583 replacements[i].what = to;
1586 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1587 or a subpart of it. If we have any replacements registered for IN_RTX,
1588 cancel the reloads that were supposed to load them.
1589 Return non-zero if we canceled any reloads. */
1591 remove_address_replacements (in_rtx)
1595 char reload_flags[MAX_RELOADS];
1596 int something_changed = 0;
1598 bzero (reload_flags, sizeof reload_flags);
1599 for (i = 0, j = 0; i < n_replacements; i++)
1601 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1602 reload_flags[replacements[i].what] |= 1;
1605 replacements[j++] = replacements[i];
1606 reload_flags[replacements[i].what] |= 2;
1609 /* Note that the following store must be done before the recursive calls. */
1612 for (i = n_reloads - 1; i >= 0; i--)
1614 if (reload_flags[i] == 1)
1616 deallocate_reload_reg (i);
1617 remove_address_replacements (reload_in[i]);
1619 something_changed = 1;
1622 return something_changed;
1625 /* Return non-zero if IN contains a piece of rtl that has the address LOC */
1627 loc_mentioned_in_p (loc, in)
1630 enum rtx_code code = GET_CODE (in);
1631 const char *fmt = GET_RTX_FORMAT (code);
1634 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1636 if (loc == &in->fld[i].rtx)
1640 if (loc_mentioned_in_p (loc, XEXP (in, i)))
1643 else if (fmt[i] == 'E')
1644 for (j = XVECLEN (in, i) - 1; i >= 0; i--)
1645 if (loc_mentioned_in_p (loc, XVECEXP (in, i, j)))
1651 /* If there is only one output reload, and it is not for an earlyclobber
1652 operand, try to combine it with a (logically unrelated) input reload
1653 to reduce the number of reload registers needed.
1655 This is safe if the input reload does not appear in
1656 the value being output-reloaded, because this implies
1657 it is not needed any more once the original insn completes.
1659 If that doesn't work, see we can use any of the registers that
1660 die in this insn as a reload register. We can if it is of the right
1661 class and does not appear in the value being output-reloaded. */
1667 int output_reload = -1;
1668 int secondary_out = -1;
1671 /* Find the output reload; return unless there is exactly one
1672 and that one is mandatory. */
1674 for (i = 0; i < n_reloads; i++)
1675 if (reload_out[i] != 0)
1677 if (output_reload >= 0)
1682 if (output_reload < 0 || reload_optional[output_reload])
1685 /* An input-output reload isn't combinable. */
1687 if (reload_in[output_reload] != 0)
1690 /* If this reload is for an earlyclobber operand, we can't do anything. */
1691 if (earlyclobber_operand_p (reload_out[output_reload]))
1694 /* Check each input reload; can we combine it? */
1696 for (i = 0; i < n_reloads; i++)
1697 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1698 /* Life span of this reload must not extend past main insn. */
1699 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
1700 && reload_when_needed[i] != RELOAD_FOR_OUTADDR_ADDRESS
1701 && reload_when_needed[i] != RELOAD_OTHER
1702 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
1703 == CLASS_MAX_NREGS (reload_reg_class[output_reload],
1704 reload_outmode[output_reload]))
1705 && reload_inc[i] == 0
1706 && reload_reg_rtx[i] == 0
1707 #ifdef SECONDARY_MEMORY_NEEDED
1708 /* Don't combine two reloads with different secondary
1709 memory locations. */
1710 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
1711 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
1712 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
1713 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
1715 && (SMALL_REGISTER_CLASSES
1716 ? (reload_reg_class[i] == reload_reg_class[output_reload])
1717 : (reg_class_subset_p (reload_reg_class[i],
1718 reload_reg_class[output_reload])
1719 || reg_class_subset_p (reload_reg_class[output_reload],
1720 reload_reg_class[i])))
1721 && (MATCHES (reload_in[i], reload_out[output_reload])
1722 /* Args reversed because the first arg seems to be
1723 the one that we imagine being modified
1724 while the second is the one that might be affected. */
1725 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1727 /* However, if the input is a register that appears inside
1728 the output, then we also can't share.
1729 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1730 If the same reload reg is used for both reg 69 and the
1731 result to be stored in memory, then that result
1732 will clobber the address of the memory ref. */
1733 && ! (GET_CODE (reload_in[i]) == REG
1734 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1735 reload_out[output_reload]))))
1736 && (reg_class_size[(int) reload_reg_class[i]]
1737 || SMALL_REGISTER_CLASSES)
1738 /* We will allow making things slightly worse by combining an
1739 input and an output, but no worse than that. */
1740 && (reload_when_needed[i] == RELOAD_FOR_INPUT
1741 || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
1745 /* We have found a reload to combine with! */
1746 reload_out[i] = reload_out[output_reload];
1747 reload_out_reg[i] = reload_out_reg[output_reload];
1748 reload_outmode[i] = reload_outmode[output_reload];
1749 /* Mark the old output reload as inoperative. */
1750 reload_out[output_reload] = 0;
1751 /* The combined reload is needed for the entire insn. */
1752 reload_when_needed[i] = RELOAD_OTHER;
1753 /* If the output reload had a secondary reload, copy it. */
1754 if (reload_secondary_out_reload[output_reload] != -1)
1756 reload_secondary_out_reload[i]
1757 = reload_secondary_out_reload[output_reload];
1758 reload_secondary_out_icode[i]
1759 = reload_secondary_out_icode[output_reload];
1762 #ifdef SECONDARY_MEMORY_NEEDED
1763 /* Copy any secondary MEM. */
1764 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
1765 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
1766 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
1768 /* If required, minimize the register class. */
1769 if (reg_class_subset_p (reload_reg_class[output_reload],
1770 reload_reg_class[i]))
1771 reload_reg_class[i] = reload_reg_class[output_reload];
1773 /* Transfer all replacements from the old reload to the combined. */
1774 for (j = 0; j < n_replacements; j++)
1775 if (replacements[j].what == output_reload)
1776 replacements[j].what = i;
1781 /* If this insn has only one operand that is modified or written (assumed
1782 to be the first), it must be the one corresponding to this reload. It
1783 is safe to use anything that dies in this insn for that output provided
1784 that it does not occur in the output (we already know it isn't an
1785 earlyclobber. If this is an asm insn, give up. */
1787 if (INSN_CODE (this_insn) == -1)
1790 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1791 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1792 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1795 /* See if some hard register that dies in this insn and is not used in
1796 the output is the right class. Only works if the register we pick
1797 up can fully hold our output reload. */
1798 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1799 if (REG_NOTE_KIND (note) == REG_DEAD
1800 && GET_CODE (XEXP (note, 0)) == REG
1801 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1802 reload_out[output_reload])
1803 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1804 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1805 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1806 REGNO (XEXP (note, 0)))
1807 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1808 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1809 /* Ensure that a secondary or tertiary reload for this output
1810 won't want this register. */
1811 && ((secondary_out = reload_secondary_out_reload[output_reload]) == -1
1812 || (! (TEST_HARD_REG_BIT
1813 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1814 REGNO (XEXP (note, 0))))
1815 && ((secondary_out = reload_secondary_out_reload[secondary_out]) == -1
1816 || ! (TEST_HARD_REG_BIT
1817 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1818 REGNO (XEXP (note, 0)))))))
1819 && ! fixed_regs[REGNO (XEXP (note, 0))])
1821 reload_reg_rtx[output_reload]
1822 = gen_rtx_REG (reload_outmode[output_reload],
1823 REGNO (XEXP (note, 0)));
1828 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1829 See if one of IN and OUT is a register that may be used;
1830 this is desirable since a spill-register won't be needed.
1831 If so, return the register rtx that proves acceptable.
1833 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1834 CLASS is the register class required for the reload.
1836 If FOR_REAL is >= 0, it is the number of the reload,
1837 and in some cases when it can be discovered that OUT doesn't need
1838 to be computed, clear out reload_out[FOR_REAL].
1840 If FOR_REAL is -1, this should not be done, because this call
1841 is just to see if a register can be found, not to find and install it.
1843 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1844 puts an additional constraint on being able to use IN for OUT since
1845 IN must not appear elsewhere in the insn (it is assumed that IN itself
1846 is safe from the earlyclobber). */
1849 find_dummy_reload (real_in, real_out, inloc, outloc,
1850 inmode, outmode, class, for_real, earlyclobber)
1851 rtx real_in, real_out;
1852 rtx *inloc, *outloc;
1853 enum machine_mode inmode, outmode;
1854 enum reg_class class;
1864 /* If operands exceed a word, we can't use either of them
1865 unless they have the same size. */
1866 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1867 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1868 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1871 /* Find the inside of any subregs. */
1872 while (GET_CODE (out) == SUBREG)
1874 out_offset = SUBREG_WORD (out);
1875 out = SUBREG_REG (out);
1877 while (GET_CODE (in) == SUBREG)
1879 in_offset = SUBREG_WORD (in);
1880 in = SUBREG_REG (in);
1883 /* Narrow down the reg class, the same way push_reload will;
1884 otherwise we might find a dummy now, but push_reload won't. */
1885 class = PREFERRED_RELOAD_CLASS (in, class);
1887 /* See if OUT will do. */
1888 if (GET_CODE (out) == REG
1889 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1891 register int regno = REGNO (out) + out_offset;
1892 int nwords = HARD_REGNO_NREGS (regno, outmode);
1895 /* When we consider whether the insn uses OUT,
1896 ignore references within IN. They don't prevent us
1897 from copying IN into OUT, because those refs would
1898 move into the insn that reloads IN.
1900 However, we only ignore IN in its role as this reload.
1901 If the insn uses IN elsewhere and it contains OUT,
1902 that counts. We can't be sure it's the "same" operand
1903 so it might not go through this reload. */
1905 *inloc = const0_rtx;
1907 if (regno < FIRST_PSEUDO_REGISTER
1908 /* A fixed reg that can overlap other regs better not be used
1909 for reloading in any way. */
1910 #ifdef OVERLAPPING_REGNO_P
1911 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1913 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1914 PATTERN (this_insn), outloc))
1917 for (i = 0; i < nwords; i++)
1918 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1924 if (GET_CODE (real_out) == REG)
1927 value = gen_rtx_REG (outmode, regno);
1934 /* Consider using IN if OUT was not acceptable
1935 or if OUT dies in this insn (like the quotient in a divmod insn).
1936 We can't use IN unless it is dies in this insn,
1937 which means we must know accurately which hard regs are live.
1938 Also, the result can't go in IN if IN is used within OUT,
1939 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1940 if (hard_regs_live_known
1941 && GET_CODE (in) == REG
1942 && REGNO (in) < FIRST_PSEUDO_REGISTER
1944 || find_reg_note (this_insn, REG_UNUSED, real_out))
1945 && find_reg_note (this_insn, REG_DEAD, real_in)
1946 && !fixed_regs[REGNO (in)]
1947 && HARD_REGNO_MODE_OK (REGNO (in),
1948 /* The only case where out and real_out might
1949 have different modes is where real_out
1950 is a subreg, and in that case, out
1952 (GET_MODE (out) != VOIDmode
1953 ? GET_MODE (out) : outmode)))
1955 register int regno = REGNO (in) + in_offset;
1956 int nwords = HARD_REGNO_NREGS (regno, inmode);
1958 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1959 && ! hard_reg_set_here_p (regno, regno + nwords,
1960 PATTERN (this_insn))
1962 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1963 PATTERN (this_insn), inloc)))
1966 for (i = 0; i < nwords; i++)
1967 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1973 /* If we were going to use OUT as the reload reg
1974 and changed our mind, it means OUT is a dummy that
1975 dies here. So don't bother copying value to it. */
1976 if (for_real >= 0 && value == real_out)
1977 reload_out[for_real] = 0;
1978 if (GET_CODE (real_in) == REG)
1981 value = gen_rtx_REG (inmode, regno);
1989 /* This page contains subroutines used mainly for determining
1990 whether the IN or an OUT of a reload can serve as the
1993 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1996 earlyclobber_operand_p (x)
2001 for (i = 0; i < n_earlyclobbers; i++)
2002 if (reload_earlyclobbers[i] == x)
2008 /* Return 1 if expression X alters a hard reg in the range
2009 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2010 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2011 X should be the body of an instruction. */
2014 hard_reg_set_here_p (beg_regno, end_regno, x)
2015 register int beg_regno, end_regno;
2018 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2020 register rtx op0 = SET_DEST (x);
2021 while (GET_CODE (op0) == SUBREG)
2022 op0 = SUBREG_REG (op0);
2023 if (GET_CODE (op0) == REG)
2025 register int r = REGNO (op0);
2026 /* See if this reg overlaps range under consideration. */
2028 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
2032 else if (GET_CODE (x) == PARALLEL)
2034 register int i = XVECLEN (x, 0) - 1;
2036 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2043 /* Return 1 if ADDR is a valid memory address for mode MODE,
2044 and check that each pseudo reg has the proper kind of
2048 strict_memory_address_p (mode, addr)
2049 enum machine_mode mode;
2052 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2059 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2060 if they are the same hard reg, and has special hacks for
2061 autoincrement and autodecrement.
2062 This is specifically intended for find_reloads to use
2063 in determining whether two operands match.
2064 X is the operand whose number is the lower of the two.
2066 The value is 2 if Y contains a pre-increment that matches
2067 a non-incrementing address in X. */
2069 /* ??? To be completely correct, we should arrange to pass
2070 for X the output operand and for Y the input operand.
2071 For now, we assume that the output operand has the lower number
2072 because that is natural in (SET output (... input ...)). */
2075 operands_match_p (x, y)
2079 register RTX_CODE code = GET_CODE (x);
2080 register const char *fmt;
2085 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2086 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2087 && GET_CODE (SUBREG_REG (y)) == REG)))
2093 i = REGNO (SUBREG_REG (x));
2094 if (i >= FIRST_PSEUDO_REGISTER)
2096 i += SUBREG_WORD (x);
2101 if (GET_CODE (y) == SUBREG)
2103 j = REGNO (SUBREG_REG (y));
2104 if (j >= FIRST_PSEUDO_REGISTER)
2106 j += SUBREG_WORD (y);
2111 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2112 multiple hard register group, so that for example (reg:DI 0) and
2113 (reg:SI 1) will be considered the same register. */
2114 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2115 && i < FIRST_PSEUDO_REGISTER)
2116 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
2117 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2118 && j < FIRST_PSEUDO_REGISTER)
2119 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
2123 /* If two operands must match, because they are really a single
2124 operand of an assembler insn, then two postincrements are invalid
2125 because the assembler insn would increment only once.
2126 On the other hand, an postincrement matches ordinary indexing
2127 if the postincrement is the output operand. */
2128 if (code == POST_DEC || code == POST_INC)
2129 return operands_match_p (XEXP (x, 0), y);
2130 /* Two preincrements are invalid
2131 because the assembler insn would increment only once.
2132 On the other hand, an preincrement matches ordinary indexing
2133 if the preincrement is the input operand.
2134 In this case, return 2, since some callers need to do special
2135 things when this happens. */
2136 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
2137 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2141 /* Now we have disposed of all the cases
2142 in which different rtx codes can match. */
2143 if (code != GET_CODE (y))
2145 if (code == LABEL_REF)
2146 return XEXP (x, 0) == XEXP (y, 0);
2147 if (code == SYMBOL_REF)
2148 return XSTR (x, 0) == XSTR (y, 0);
2150 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2152 if (GET_MODE (x) != GET_MODE (y))
2155 /* Compare the elements. If any pair of corresponding elements
2156 fail to match, return 0 for the whole things. */
2159 fmt = GET_RTX_FORMAT (code);
2160 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2166 if (XWINT (x, i) != XWINT (y, i))
2171 if (XINT (x, i) != XINT (y, i))
2176 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2179 /* If any subexpression returns 2,
2180 we should return 2 if we are successful. */
2189 if (XVECLEN (x, i) != XVECLEN (y, i))
2191 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2193 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2201 /* It is believed that rtx's at this level will never
2202 contain anything but integers and other rtx's,
2203 except for within LABEL_REFs and SYMBOL_REFs. */
2208 return 1 + success_2;
2211 /* Describe the range of registers or memory referenced by X.
2212 If X is a register, set REG_FLAG and put the first register
2213 number into START and the last plus one into END.
2214 If X is a memory reference, put a base address into BASE
2215 and a range of integer offsets into START and END.
2216 If X is pushing on the stack, we can assume it causes no trouble,
2217 so we set the SAFE field. */
2219 static struct decomposition
2223 struct decomposition val;
2229 if (GET_CODE (x) == MEM)
2231 rtx base = NULL_RTX, offset = 0;
2232 rtx addr = XEXP (x, 0);
2234 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2235 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2237 val.base = XEXP (addr, 0);
2238 val.start = - GET_MODE_SIZE (GET_MODE (x));
2239 val.end = GET_MODE_SIZE (GET_MODE (x));
2240 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2244 if (GET_CODE (addr) == CONST)
2246 addr = XEXP (addr, 0);
2249 if (GET_CODE (addr) == PLUS)
2251 if (CONSTANT_P (XEXP (addr, 0)))
2253 base = XEXP (addr, 1);
2254 offset = XEXP (addr, 0);
2256 else if (CONSTANT_P (XEXP (addr, 1)))
2258 base = XEXP (addr, 0);
2259 offset = XEXP (addr, 1);
2266 offset = const0_rtx;
2268 if (GET_CODE (offset) == CONST)
2269 offset = XEXP (offset, 0);
2270 if (GET_CODE (offset) == PLUS)
2272 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2274 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2275 offset = XEXP (offset, 0);
2277 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2279 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2280 offset = XEXP (offset, 1);
2284 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2285 offset = const0_rtx;
2288 else if (GET_CODE (offset) != CONST_INT)
2290 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2291 offset = const0_rtx;
2294 if (all_const && GET_CODE (base) == PLUS)
2295 base = gen_rtx_CONST (GET_MODE (base), base);
2297 if (GET_CODE (offset) != CONST_INT)
2300 val.start = INTVAL (offset);
2301 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2305 else if (GET_CODE (x) == REG)
2308 val.start = true_regnum (x);
2311 /* A pseudo with no hard reg. */
2312 val.start = REGNO (x);
2313 val.end = val.start + 1;
2317 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2319 else if (GET_CODE (x) == SUBREG)
2321 if (GET_CODE (SUBREG_REG (x)) != REG)
2322 /* This could be more precise, but it's good enough. */
2323 return decompose (SUBREG_REG (x));
2325 val.start = true_regnum (x);
2327 return decompose (SUBREG_REG (x));
2330 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2332 else if (CONSTANT_P (x)
2333 /* This hasn't been assigned yet, so it can't conflict yet. */
2334 || GET_CODE (x) == SCRATCH)
2341 /* Return 1 if altering Y will not modify the value of X.
2342 Y is also described by YDATA, which should be decompose (Y). */
2345 immune_p (x, y, ydata)
2347 struct decomposition ydata;
2349 struct decomposition xdata;
2352 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2356 if (GET_CODE (y) != MEM)
2358 /* If Y is memory and X is not, Y can't affect X. */
2359 if (GET_CODE (x) != MEM)
2362 xdata = decompose (x);
2364 if (! rtx_equal_p (xdata.base, ydata.base))
2366 /* If bases are distinct symbolic constants, there is no overlap. */
2367 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2369 /* Constants and stack slots never overlap. */
2370 if (CONSTANT_P (xdata.base)
2371 && (ydata.base == frame_pointer_rtx
2372 || ydata.base == hard_frame_pointer_rtx
2373 || ydata.base == stack_pointer_rtx))
2375 if (CONSTANT_P (ydata.base)
2376 && (xdata.base == frame_pointer_rtx
2377 || xdata.base == hard_frame_pointer_rtx
2378 || xdata.base == stack_pointer_rtx))
2380 /* If either base is variable, we don't know anything. */
2385 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2388 /* Similar, but calls decompose. */
2391 safe_from_earlyclobber (op, clobber)
2394 struct decomposition early_data;
2396 early_data = decompose (clobber);
2397 return immune_p (op, clobber, early_data);
2400 /* Main entry point of this file: search the body of INSN
2401 for values that need reloading and record them with push_reload.
2402 REPLACE nonzero means record also where the values occur
2403 so that subst_reloads can be used.
2405 IND_LEVELS says how many levels of indirection are supported by this
2406 machine; a value of zero means that a memory reference is not a valid
2409 LIVE_KNOWN says we have valid information about which hard
2410 regs are live at each point in the program; this is true when
2411 we are called from global_alloc but false when stupid register
2412 allocation has been done.
2414 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2415 which is nonnegative if the reg has been commandeered for reloading into.
2416 It is copied into STATIC_RELOAD_REG_P and referenced from there
2417 by various subroutines.
2419 Return TRUE if some operands need to be changed, because of swapping
2420 commutative operands, reg_equiv_address substitution, or whatever. */
2423 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2425 int replace, ind_levels;
2427 short *reload_reg_p;
2429 #ifdef REGISTER_CONSTRAINTS
2431 register int insn_code_number;
2434 /* These start out as the constraints for the insn
2435 and they are chewed up as we consider alternatives. */
2436 char *constraints[MAX_RECOG_OPERANDS];
2437 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2439 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2440 char pref_or_nothing[MAX_RECOG_OPERANDS];
2441 /* Nonzero for a MEM operand whose entire address needs a reload. */
2442 int address_reloaded[MAX_RECOG_OPERANDS];
2443 /* Value of enum reload_type to use for operand. */
2444 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2445 /* Value of enum reload_type to use within address of operand. */
2446 enum reload_type address_type[MAX_RECOG_OPERANDS];
2447 /* Save the usage of each operand. */
2448 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2449 int no_input_reloads = 0, no_output_reloads = 0;
2451 int this_alternative[MAX_RECOG_OPERANDS];
2452 char this_alternative_win[MAX_RECOG_OPERANDS];
2453 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2454 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2455 int this_alternative_matches[MAX_RECOG_OPERANDS];
2457 int goal_alternative[MAX_RECOG_OPERANDS];
2458 int this_alternative_number;
2459 int goal_alternative_number;
2460 int operand_reloadnum[MAX_RECOG_OPERANDS];
2461 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2462 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2463 char goal_alternative_win[MAX_RECOG_OPERANDS];
2464 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2465 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2466 int goal_alternative_swapped;
2470 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2471 rtx substed_operand[MAX_RECOG_OPERANDS];
2472 rtx body = PATTERN (insn);
2473 rtx set = single_set (insn);
2474 int goal_earlyclobber, this_earlyclobber;
2475 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2481 n_earlyclobbers = 0;
2482 replace_reloads = replace;
2483 hard_regs_live_known = live_known;
2484 static_reload_reg_p = reload_reg_p;
2486 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2487 neither are insns that SET cc0. Insns that use CC0 are not allowed
2488 to have any input reloads. */
2489 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2490 no_output_reloads = 1;
2493 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2494 no_input_reloads = 1;
2495 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2496 no_output_reloads = 1;
2499 #ifdef SECONDARY_MEMORY_NEEDED
2500 /* The eliminated forms of any secondary memory locations are per-insn, so
2501 clear them out here. */
2503 bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2506 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2507 is cheap to move between them. If it is not, there may not be an insn
2508 to do the copy, so we may need a reload. */
2509 if (GET_CODE (body) == SET
2510 && GET_CODE (SET_DEST (body)) == REG
2511 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2512 && GET_CODE (SET_SRC (body)) == REG
2513 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2514 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2515 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2518 extract_insn (insn);
2520 noperands = reload_n_operands = recog_data.n_operands;
2521 n_alternatives = recog_data.n_alternatives;
2523 /* Just return "no reloads" if insn has no operands with constraints. */
2524 if (noperands == 0 || n_alternatives == 0)
2527 insn_code_number = INSN_CODE (insn);
2528 this_insn_is_asm = insn_code_number < 0;
2530 bcopy ((char *) recog_data.operand_mode, (char *) operand_mode,
2531 noperands * sizeof (enum machine_mode));
2532 bcopy ((char *) recog_data.constraints, (char *) constraints,
2533 noperands * sizeof (char *));
2537 /* If we will need to know, later, whether some pair of operands
2538 are the same, we must compare them now and save the result.
2539 Reloading the base and index registers will clobber them
2540 and afterward they will fail to match. */
2542 for (i = 0; i < noperands; i++)
2547 substed_operand[i] = recog_data.operand[i];
2550 modified[i] = RELOAD_READ;
2552 /* Scan this operand's constraint to see if it is an output operand,
2553 an in-out operand, is commutative, or should match another. */
2558 modified[i] = RELOAD_WRITE;
2560 modified[i] = RELOAD_READ_WRITE;
2563 /* The last operand should not be marked commutative. */
2564 if (i == noperands - 1)
2569 else if (c >= '0' && c <= '9')
2572 operands_match[c][i]
2573 = operands_match_p (recog_data.operand[c],
2574 recog_data.operand[i]);
2576 /* An operand may not match itself. */
2580 /* If C can be commuted with C+1, and C might need to match I,
2581 then C+1 might also need to match I. */
2582 if (commutative >= 0)
2584 if (c == commutative || c == commutative + 1)
2586 int other = c + (c == commutative ? 1 : -1);
2587 operands_match[other][i]
2588 = operands_match_p (recog_data.operand[other],
2589 recog_data.operand[i]);
2591 if (i == commutative || i == commutative + 1)
2593 int other = i + (i == commutative ? 1 : -1);
2594 operands_match[c][other]
2595 = operands_match_p (recog_data.operand[c],
2596 recog_data.operand[other]);
2598 /* Note that C is supposed to be less than I.
2599 No need to consider altering both C and I because in
2600 that case we would alter one into the other. */
2606 /* Examine each operand that is a memory reference or memory address
2607 and reload parts of the addresses into index registers.
2608 Also here any references to pseudo regs that didn't get hard regs
2609 but are equivalent to constants get replaced in the insn itself
2610 with those constants. Nobody will ever see them again.
2612 Finally, set up the preferred classes of each operand. */
2614 for (i = 0; i < noperands; i++)
2616 register RTX_CODE code = GET_CODE (recog_data.operand[i]);
2618 address_reloaded[i] = 0;
2619 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2620 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2623 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2624 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2627 if (*constraints[i] == 0)
2628 /* Ignore things like match_operator operands. */
2630 else if (constraints[i][0] == 'p')
2632 find_reloads_address (VOIDmode, NULL_PTR,
2633 recog_data.operand[i],
2634 recog_data.operand_loc[i],
2635 i, operand_type[i], ind_levels, insn);
2637 /* If we now have a simple operand where we used to have a
2638 PLUS or MULT, re-recognize and try again. */
2639 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
2640 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2641 && (GET_CODE (recog_data.operand[i]) == MULT
2642 || GET_CODE (recog_data.operand[i]) == PLUS))
2644 INSN_CODE (insn) = -1;
2645 retval = find_reloads (insn, replace, ind_levels, live_known,
2650 recog_data.operand[i] = *recog_data.operand_loc[i];
2651 substed_operand[i] = recog_data.operand[i];
2653 else if (code == MEM)
2656 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2657 recog_data.operand_loc[i],
2658 XEXP (recog_data.operand[i], 0),
2659 &XEXP (recog_data.operand[i], 0),
2660 i, address_type[i], ind_levels, insn);
2661 recog_data.operand[i] = *recog_data.operand_loc[i];
2662 substed_operand[i] = recog_data.operand[i];
2664 else if (code == SUBREG)
2666 rtx reg = SUBREG_REG (recog_data.operand[i]);
2668 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2671 && &SET_DEST (set) == recog_data.operand_loc[i],
2674 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2675 that didn't get a hard register, emit a USE with a REG_EQUAL
2676 note in front so that we might inherit a previous, possibly
2680 && GET_CODE (op) == MEM
2681 && GET_CODE (reg) == REG
2682 && (GET_MODE_SIZE (GET_MODE (reg))
2683 >= GET_MODE_SIZE (GET_MODE (op))))
2684 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode, reg), insn))
2685 = gen_rtx_EXPR_LIST (REG_EQUAL,
2686 reg_equiv_memory_loc[REGNO (reg)], NULL_RTX);
2688 substed_operand[i] = recog_data.operand[i] = op;
2690 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2691 /* We can get a PLUS as an "operand" as a result of register
2692 elimination. See eliminate_regs and gen_reload. We handle
2693 a unary operator by reloading the operand. */
2694 substed_operand[i] = recog_data.operand[i]
2695 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2696 ind_levels, 0, insn);
2697 else if (code == REG)
2699 /* This is equivalent to calling find_reloads_toplev.
2700 The code is duplicated for speed.
2701 When we find a pseudo always equivalent to a constant,
2702 we replace it by the constant. We must be sure, however,
2703 that we don't try to replace it in the insn in which it
2705 register int regno = REGNO (recog_data.operand[i]);
2706 if (reg_equiv_constant[regno] != 0
2707 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2709 /* Record the existing mode so that the check if constants are
2710 allowed will work when operand_mode isn't specified. */
2712 if (operand_mode[i] == VOIDmode)
2713 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2715 substed_operand[i] = recog_data.operand[i]
2716 = reg_equiv_constant[regno];
2718 if (reg_equiv_memory_loc[regno] != 0
2719 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2720 /* We need not give a valid is_set_dest argument since the case
2721 of a constant equivalence was checked above. */
2722 substed_operand[i] = recog_data.operand[i]
2723 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2724 ind_levels, 0, insn);
2726 /* If the operand is still a register (we didn't replace it with an
2727 equivalent), get the preferred class to reload it into. */
2728 code = GET_CODE (recog_data.operand[i]);
2730 = ((code == REG && REGNO (recog_data.operand[i])
2731 >= FIRST_PSEUDO_REGISTER)
2732 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2736 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2737 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2741 /* If we made any reloads for addresses, see if they violate a
2742 "no input reloads" requirement for this insn. */
2743 if (no_input_reloads)
2744 for (i = 0; i < n_reloads; i++)
2745 if (reload_in[i] != 0)
2749 /* If this is simply a copy from operand 1 to operand 0, merge the
2750 preferred classes for the operands. */
2751 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2752 && recog_data.operand[1] == SET_SRC (set))
2754 preferred_class[0] = preferred_class[1]
2755 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2756 pref_or_nothing[0] |= pref_or_nothing[1];
2757 pref_or_nothing[1] |= pref_or_nothing[0];
2760 /* Now see what we need for pseudo-regs that didn't get hard regs
2761 or got the wrong kind of hard reg. For this, we must consider
2762 all the operands together against the register constraints. */
2764 best = MAX_RECOG_OPERANDS * 2 + 600;
2767 goal_alternative_swapped = 0;
2770 /* The constraints are made of several alternatives.
2771 Each operand's constraint looks like foo,bar,... with commas
2772 separating the alternatives. The first alternatives for all
2773 operands go together, the second alternatives go together, etc.
2775 First loop over alternatives. */
2777 for (this_alternative_number = 0;
2778 this_alternative_number < n_alternatives;
2779 this_alternative_number++)
2781 /* Loop over operands for one constraint alternative. */
2782 /* LOSERS counts those that don't fit this alternative
2783 and would require loading. */
2785 /* BAD is set to 1 if it some operand can't fit this alternative
2786 even after reloading. */
2788 /* REJECT is a count of how undesirable this alternative says it is
2789 if any reloading is required. If the alternative matches exactly
2790 then REJECT is ignored, but otherwise it gets this much
2791 counted against it in addition to the reloading needed. Each
2792 ? counts three times here since we want the disparaging caused by
2793 a bad register class to only count 1/3 as much. */
2796 this_earlyclobber = 0;
2798 for (i = 0; i < noperands; i++)
2800 register char *p = constraints[i];
2801 register int win = 0;
2802 /* 0 => this operand can be reloaded somehow for this alternative */
2804 /* 0 => this operand can be reloaded if the alternative allows regs. */
2807 register rtx operand = recog_data.operand[i];
2809 /* Nonzero means this is a MEM that must be reloaded into a reg
2810 regardless of what the constraint says. */
2811 int force_reload = 0;
2813 /* Nonzero if a constant forced into memory would be OK for this
2816 int earlyclobber = 0;
2818 /* If the predicate accepts a unary operator, it means that
2819 we need to reload the operand, but do not do this for
2820 match_operator and friends. */
2821 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2822 operand = XEXP (operand, 0);
2824 /* If the operand is a SUBREG, extract
2825 the REG or MEM (or maybe even a constant) within.
2826 (Constants can occur as a result of reg_equiv_constant.) */
2828 while (GET_CODE (operand) == SUBREG)
2830 offset += SUBREG_WORD (operand);
2831 operand = SUBREG_REG (operand);
2832 /* Force reload if this is a constant or PLUS or if there may
2833 be a problem accessing OPERAND in the outer mode. */
2834 if (CONSTANT_P (operand)
2835 || GET_CODE (operand) == PLUS
2836 /* We must force a reload of paradoxical SUBREGs
2837 of a MEM because the alignment of the inner value
2838 may not be enough to do the outer reference. On
2839 big-endian machines, it may also reference outside
2842 On machines that extend byte operations and we have a
2843 SUBREG where both the inner and outer modes are no wider
2844 than a word and the inner mode is narrower, is integral,
2845 and gets extended when loaded from memory, combine.c has
2846 made assumptions about the behavior of the machine in such
2847 register access. If the data is, in fact, in memory we
2848 must always load using the size assumed to be in the
2849 register and let the insn do the different-sized
2852 This is doubly true if WORD_REGISTER_OPERATIONS. In
2853 this case eliminate_regs has left non-paradoxical
2854 subregs for push_reloads to see. Make sure it does
2855 by forcing the reload.
2857 ??? When is it right at this stage to have a subreg
2858 of a mem that is _not_ to be handled specialy? IMO
2859 those should have been reduced to just a mem. */
2860 || ((GET_CODE (operand) == MEM
2861 || (GET_CODE (operand)== REG
2862 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2863 #ifndef WORD_REGISTER_OPERATIONS
2864 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2865 < BIGGEST_ALIGNMENT)
2866 && (GET_MODE_SIZE (operand_mode[i])
2867 > GET_MODE_SIZE (GET_MODE (operand))))
2868 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2869 #ifdef LOAD_EXTEND_OP
2870 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2871 && (GET_MODE_SIZE (GET_MODE (operand))
2873 && (GET_MODE_SIZE (operand_mode[i])
2874 > GET_MODE_SIZE (GET_MODE (operand)))
2875 && INTEGRAL_MODE_P (GET_MODE (operand))
2876 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2881 /* Subreg of a hard reg which can't handle the subreg's mode
2882 or which would handle that mode in the wrong number of
2883 registers for subregging to work. */
2884 || (GET_CODE (operand) == REG
2885 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2886 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2887 && (GET_MODE_SIZE (GET_MODE (operand))
2889 && ((GET_MODE_SIZE (GET_MODE (operand))
2891 != HARD_REGNO_NREGS (REGNO (operand),
2892 GET_MODE (operand))))
2893 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2898 this_alternative[i] = (int) NO_REGS;
2899 this_alternative_win[i] = 0;
2900 this_alternative_offmemok[i] = 0;
2901 this_alternative_earlyclobber[i] = 0;
2902 this_alternative_matches[i] = -1;
2904 /* An empty constraint or empty alternative
2905 allows anything which matched the pattern. */
2906 if (*p == 0 || *p == ',')
2909 /* Scan this alternative's specs for this operand;
2910 set WIN if the operand fits any letter in this alternative.
2911 Otherwise, clear BADOP if this operand could
2912 fit some letter after reloads,
2913 or set WINREG if this operand could fit after reloads
2914 provided the constraint allows some registers. */
2916 while (*p && (c = *p++) != ',')
2919 case '=': case '+': case '*':
2923 /* The last operand should not be marked commutative. */
2924 if (i != noperands - 1)
2937 /* Ignore rest of this alternative as far as
2938 reloading is concerned. */
2939 while (*p && *p != ',') p++;
2942 case '0': case '1': case '2': case '3': case '4':
2943 case '5': case '6': case '7': case '8': case '9':
2946 this_alternative_matches[i] = c;
2947 /* We are supposed to match a previous operand.
2948 If we do, we win if that one did.
2949 If we do not, count both of the operands as losers.
2950 (This is too conservative, since most of the time
2951 only a single reload insn will be needed to make
2952 the two operands win. As a result, this alternative
2953 may be rejected when it is actually desirable.) */
2954 if ((swapped && (c != commutative || i != commutative + 1))
2955 /* If we are matching as if two operands were swapped,
2956 also pretend that operands_match had been computed
2958 But if I is the second of those and C is the first,
2959 don't exchange them, because operands_match is valid
2960 only on one side of its diagonal. */
2962 [(c == commutative || c == commutative + 1)
2963 ? 2*commutative + 1 - c : c]
2964 [(i == commutative || i == commutative + 1)
2965 ? 2*commutative + 1 - i : i])
2966 : operands_match[c][i])
2968 /* If we are matching a non-offsettable address where an
2969 offsettable address was expected, then we must reject
2970 this combination, because we can't reload it. */
2971 if (this_alternative_offmemok[c]
2972 && GET_CODE (recog_data.operand[c]) == MEM
2973 && this_alternative[c] == (int) NO_REGS
2974 && ! this_alternative_win[c])
2977 win = this_alternative_win[c];
2981 /* Operands don't match. */
2983 /* Retroactively mark the operand we had to match
2984 as a loser, if it wasn't already. */
2985 if (this_alternative_win[c])
2987 this_alternative_win[c] = 0;
2988 if (this_alternative[c] == (int) NO_REGS)
2990 /* But count the pair only once in the total badness of
2991 this alternative, if the pair can be a dummy reload. */
2993 = find_dummy_reload (recog_data.operand[i],
2994 recog_data.operand[c],
2995 recog_data.operand_loc[i],
2996 recog_data.operand_loc[c],
2997 operand_mode[i], operand_mode[c],
2998 this_alternative[c], -1,
2999 this_alternative_earlyclobber[c]);
3004 /* This can be fixed with reloads if the operand
3005 we are supposed to match can be fixed with reloads. */
3007 this_alternative[i] = this_alternative[c];
3009 /* If we have to reload this operand and some previous
3010 operand also had to match the same thing as this
3011 operand, we don't know how to do that. So reject this
3013 if (! win || force_reload)
3014 for (j = 0; j < i; j++)
3015 if (this_alternative_matches[j]
3016 == this_alternative_matches[i])
3022 /* All necessary reloads for an address_operand
3023 were handled in find_reloads_address. */
3024 this_alternative[i] = (int) BASE_REG_CLASS;
3031 if (GET_CODE (operand) == MEM
3032 || (GET_CODE (operand) == REG
3033 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3034 && reg_renumber[REGNO (operand)] < 0))
3036 if (CONSTANT_P (operand)
3037 /* force_const_mem does not accept HIGH. */
3038 && GET_CODE (operand) != HIGH)
3044 if (GET_CODE (operand) == MEM
3045 && ! address_reloaded[i]
3046 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3047 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3052 if (GET_CODE (operand) == MEM
3053 && ! address_reloaded[i]
3054 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3055 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3059 /* Memory operand whose address is not offsettable. */
3063 if (GET_CODE (operand) == MEM
3064 && ! (ind_levels ? offsettable_memref_p (operand)
3065 : offsettable_nonstrict_memref_p (operand))
3066 /* Certain mem addresses will become offsettable
3067 after they themselves are reloaded. This is important;
3068 we don't want our own handling of unoffsettables
3069 to override the handling of reg_equiv_address. */
3070 && !(GET_CODE (XEXP (operand, 0)) == REG
3072 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3076 /* Memory operand whose address is offsettable. */
3080 if ((GET_CODE (operand) == MEM
3081 /* If IND_LEVELS, find_reloads_address won't reload a
3082 pseudo that didn't get a hard reg, so we have to
3083 reject that case. */
3084 && ((ind_levels ? offsettable_memref_p (operand)
3085 : offsettable_nonstrict_memref_p (operand))
3086 /* A reloaded address is offsettable because it is now
3087 just a simple register indirect. */
3088 || address_reloaded[i]))
3089 || (GET_CODE (operand) == REG
3090 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3091 && reg_renumber[REGNO (operand)] < 0
3092 /* If reg_equiv_address is nonzero, we will be
3093 loading it into a register; hence it will be
3094 offsettable, but we cannot say that reg_equiv_mem
3095 is offsettable without checking. */
3096 && ((reg_equiv_mem[REGNO (operand)] != 0
3097 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3098 || (reg_equiv_address[REGNO (operand)] != 0))))
3100 /* force_const_mem does not accept HIGH. */
3101 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3102 || GET_CODE (operand) == MEM)
3109 /* Output operand that is stored before the need for the
3110 input operands (and their index registers) is over. */
3111 earlyclobber = 1, this_earlyclobber = 1;
3115 #ifndef REAL_ARITHMETIC
3116 /* Match any floating double constant, but only if
3117 we can examine the bits of it reliably. */
3118 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
3119 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
3120 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
3123 if (GET_CODE (operand) == CONST_DOUBLE)
3128 if (GET_CODE (operand) == CONST_DOUBLE)
3134 if (GET_CODE (operand) == CONST_DOUBLE
3135 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
3140 if (GET_CODE (operand) == CONST_INT
3141 || (GET_CODE (operand) == CONST_DOUBLE
3142 && GET_MODE (operand) == VOIDmode))
3145 if (CONSTANT_P (operand)
3146 #ifdef LEGITIMATE_PIC_OPERAND_P
3147 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3154 if (GET_CODE (operand) == CONST_INT
3155 || (GET_CODE (operand) == CONST_DOUBLE
3156 && GET_MODE (operand) == VOIDmode))
3168 if (GET_CODE (operand) == CONST_INT
3169 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
3179 /* A PLUS is never a valid operand, but reload can make
3180 it from a register when eliminating registers. */
3181 && GET_CODE (operand) != PLUS
3182 /* A SCRATCH is not a valid operand. */
3183 && GET_CODE (operand) != SCRATCH
3184 #ifdef LEGITIMATE_PIC_OPERAND_P
3185 && (! CONSTANT_P (operand)
3187 || LEGITIMATE_PIC_OPERAND_P (operand))
3189 && (GENERAL_REGS == ALL_REGS
3190 || GET_CODE (operand) != REG
3191 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3192 && reg_renumber[REGNO (operand)] < 0)))
3194 /* Drop through into 'r' case */
3198 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3201 #ifdef EXTRA_CONSTRAINT
3207 if (EXTRA_CONSTRAINT (operand, c))
3214 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3217 if (GET_MODE (operand) == BLKmode)
3220 if (GET_CODE (operand) == REG
3221 && reg_fits_class_p (operand, this_alternative[i],
3222 offset, GET_MODE (recog_data.operand[i])))
3229 /* If this operand could be handled with a reg,
3230 and some reg is allowed, then this operand can be handled. */
3231 if (winreg && this_alternative[i] != (int) NO_REGS)
3234 /* Record which operands fit this alternative. */
3235 this_alternative_earlyclobber[i] = earlyclobber;
3236 if (win && ! force_reload)
3237 this_alternative_win[i] = 1;
3240 int const_to_mem = 0;
3242 this_alternative_offmemok[i] = offmemok;
3246 /* Alternative loses if it has no regs for a reg operand. */
3247 if (GET_CODE (operand) == REG
3248 && this_alternative[i] == (int) NO_REGS
3249 && this_alternative_matches[i] < 0)
3252 /* If this is a constant that is reloaded into the desired
3253 class by copying it to memory first, count that as another
3254 reload. This is consistent with other code and is
3255 required to avoid choosing another alternative when
3256 the constant is moved into memory by this function on
3257 an early reload pass. Note that the test here is
3258 precisely the same as in the code below that calls
3260 if (CONSTANT_P (operand)
3261 /* force_const_mem does not accept HIGH. */
3262 && GET_CODE (operand) != HIGH
3263 && ((PREFERRED_RELOAD_CLASS (operand,
3264 (enum reg_class) this_alternative[i])
3266 || no_input_reloads)
3267 && operand_mode[i] != VOIDmode)
3270 if (this_alternative[i] != (int) NO_REGS)
3274 /* If we can't reload this value at all, reject this
3275 alternative. Note that we could also lose due to
3276 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3279 if (! CONSTANT_P (operand)
3280 && (enum reg_class) this_alternative[i] != NO_REGS
3281 && (PREFERRED_RELOAD_CLASS (operand,
3282 (enum reg_class) this_alternative[i])
3286 /* Alternative loses if it requires a type of reload not
3287 permitted for this insn. We can always reload SCRATCH
3288 and objects with a REG_UNUSED note. */
3289 else if (GET_CODE (operand) != SCRATCH
3290 && modified[i] != RELOAD_READ && no_output_reloads
3291 && ! find_reg_note (insn, REG_UNUSED, operand))
3293 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3298 /* We prefer to reload pseudos over reloading other things,
3299 since such reloads may be able to be eliminated later.
3300 If we are reloading a SCRATCH, we won't be generating any
3301 insns, just using a register, so it is also preferred.
3302 So bump REJECT in other cases. Don't do this in the
3303 case where we are forcing a constant into memory and
3304 it will then win since we don't want to have a different
3305 alternative match then. */
3306 if (! (GET_CODE (operand) == REG
3307 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3308 && GET_CODE (operand) != SCRATCH
3309 && ! (const_to_mem && constmemok))
3312 /* Input reloads can be inherited more often than output
3313 reloads can be removed, so penalize output reloads. */
3314 if (operand_type[i] != RELOAD_FOR_INPUT
3315 && GET_CODE (operand) != SCRATCH)
3319 /* If this operand is a pseudo register that didn't get a hard
3320 reg and this alternative accepts some register, see if the
3321 class that we want is a subset of the preferred class for this
3322 register. If not, but it intersects that class, use the
3323 preferred class instead. If it does not intersect the preferred
3324 class, show that usage of this alternative should be discouraged;
3325 it will be discouraged more still if the register is `preferred
3326 or nothing'. We do this because it increases the chance of
3327 reusing our spill register in a later insn and avoiding a pair
3328 of memory stores and loads.
3330 Don't bother with this if this alternative will accept this
3333 Don't do this for a multiword operand, since it is only a
3334 small win and has the risk of requiring more spill registers,
3335 which could cause a large loss.
3337 Don't do this if the preferred class has only one register
3338 because we might otherwise exhaust the class. */
3341 if (! win && this_alternative[i] != (int) NO_REGS
3342 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3343 && reg_class_size[(int) preferred_class[i]] > 1)
3345 if (! reg_class_subset_p (this_alternative[i],
3346 preferred_class[i]))
3348 /* Since we don't have a way of forming the intersection,
3349 we just do something special if the preferred class
3350 is a subset of the class we have; that's the most
3351 common case anyway. */
3352 if (reg_class_subset_p (preferred_class[i],
3353 this_alternative[i]))
3354 this_alternative[i] = (int) preferred_class[i];
3356 reject += (2 + 2 * pref_or_nothing[i]);
3361 /* Now see if any output operands that are marked "earlyclobber"
3362 in this alternative conflict with any input operands
3363 or any memory addresses. */
3365 for (i = 0; i < noperands; i++)
3366 if (this_alternative_earlyclobber[i]
3367 && this_alternative_win[i])
3369 struct decomposition early_data;
3371 early_data = decompose (recog_data.operand[i]);
3373 if (modified[i] == RELOAD_READ)
3376 if (this_alternative[i] == NO_REGS)
3378 this_alternative_earlyclobber[i] = 0;
3379 if (this_insn_is_asm)
3380 error_for_asm (this_insn,
3381 "`&' constraint used with no register class");
3386 for (j = 0; j < noperands; j++)
3387 /* Is this an input operand or a memory ref? */
3388 if ((GET_CODE (recog_data.operand[j]) == MEM
3389 || modified[j] != RELOAD_WRITE)
3391 /* Ignore things like match_operator operands. */
3392 && *recog_data.constraints[j] != 0
3393 /* Don't count an input operand that is constrained to match
3394 the early clobber operand. */
3395 && ! (this_alternative_matches[j] == i
3396 && rtx_equal_p (recog_data.operand[i],
3397 recog_data.operand[j]))
3398 /* Is it altered by storing the earlyclobber operand? */
3399 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3402 /* If the output is in a single-reg class,
3403 it's costly to reload it, so reload the input instead. */
3404 if (reg_class_size[this_alternative[i]] == 1
3405 && (GET_CODE (recog_data.operand[j]) == REG
3406 || GET_CODE (recog_data.operand[j]) == SUBREG))
3409 this_alternative_win[j] = 0;
3414 /* If an earlyclobber operand conflicts with something,
3415 it must be reloaded, so request this and count the cost. */
3419 this_alternative_win[i] = 0;
3420 for (j = 0; j < noperands; j++)
3421 if (this_alternative_matches[j] == i
3422 && this_alternative_win[j])
3424 this_alternative_win[j] = 0;
3430 /* If one alternative accepts all the operands, no reload required,
3431 choose that alternative; don't consider the remaining ones. */
3434 /* Unswap these so that they are never swapped at `finish'. */
3435 if (commutative >= 0)
3437 recog_data.operand[commutative] = substed_operand[commutative];
3438 recog_data.operand[commutative + 1]
3439 = substed_operand[commutative + 1];
3441 for (i = 0; i < noperands; i++)
3443 goal_alternative_win[i] = 1;
3444 goal_alternative[i] = this_alternative[i];
3445 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3446 goal_alternative_matches[i] = this_alternative_matches[i];
3447 goal_alternative_earlyclobber[i]
3448 = this_alternative_earlyclobber[i];
3450 goal_alternative_number = this_alternative_number;
3451 goal_alternative_swapped = swapped;
3452 goal_earlyclobber = this_earlyclobber;
3456 /* REJECT, set by the ! and ? constraint characters and when a register
3457 would be reloaded into a non-preferred class, discourages the use of
3458 this alternative for a reload goal. REJECT is incremented by six
3459 for each ? and two for each non-preferred class. */
3460 losers = losers * 6 + reject;
3462 /* If this alternative can be made to work by reloading,
3463 and it needs less reloading than the others checked so far,
3464 record it as the chosen goal for reloading. */
3465 if (! bad && best > losers)
3467 for (i = 0; i < noperands; i++)
3469 goal_alternative[i] = this_alternative[i];
3470 goal_alternative_win[i] = this_alternative_win[i];
3471 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3472 goal_alternative_matches[i] = this_alternative_matches[i];
3473 goal_alternative_earlyclobber[i]
3474 = this_alternative_earlyclobber[i];
3476 goal_alternative_swapped = swapped;
3478 goal_alternative_number = this_alternative_number;
3479 goal_earlyclobber = this_earlyclobber;
3483 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3484 then we need to try each alternative twice,
3485 the second time matching those two operands
3486 as if we had exchanged them.
3487 To do this, really exchange them in operands.
3489 If we have just tried the alternatives the second time,
3490 return operands to normal and drop through. */
3492 if (commutative >= 0)
3497 register enum reg_class tclass;
3500 recog_data.operand[commutative] = substed_operand[commutative + 1];
3501 recog_data.operand[commutative + 1] = substed_operand[commutative];
3503 tclass = preferred_class[commutative];
3504 preferred_class[commutative] = preferred_class[commutative + 1];
3505 preferred_class[commutative + 1] = tclass;
3507 t = pref_or_nothing[commutative];
3508 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3509 pref_or_nothing[commutative + 1] = t;
3511 bcopy ((char *) recog_data.constraints, (char *) constraints,
3512 noperands * sizeof (char *));
3517 recog_data.operand[commutative] = substed_operand[commutative];
3518 recog_data.operand[commutative + 1]
3519 = substed_operand[commutative + 1];
3523 /* The operands don't meet the constraints.
3524 goal_alternative describes the alternative
3525 that we could reach by reloading the fewest operands.
3526 Reload so as to fit it. */
3528 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3530 /* No alternative works with reloads?? */
3531 if (insn_code_number >= 0)
3532 fatal_insn ("Unable to generate reloads for:", insn);
3533 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3534 /* Avoid further trouble with this insn. */
3535 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3540 /* Jump to `finish' from above if all operands are valid already.
3541 In that case, goal_alternative_win is all 1. */
3544 /* Right now, for any pair of operands I and J that are required to match,
3546 goal_alternative_matches[J] is I.
3547 Set up goal_alternative_matched as the inverse function:
3548 goal_alternative_matched[I] = J. */
3550 for (i = 0; i < noperands; i++)
3551 goal_alternative_matched[i] = -1;
3553 for (i = 0; i < noperands; i++)
3554 if (! goal_alternative_win[i]
3555 && goal_alternative_matches[i] >= 0)
3556 goal_alternative_matched[goal_alternative_matches[i]] = i;
3558 /* If the best alternative is with operands 1 and 2 swapped,
3559 consider them swapped before reporting the reloads. Update the
3560 operand numbers of any reloads already pushed. */
3562 if (goal_alternative_swapped)
3566 tem = substed_operand[commutative];
3567 substed_operand[commutative] = substed_operand[commutative + 1];
3568 substed_operand[commutative + 1] = tem;
3569 tem = recog_data.operand[commutative];
3570 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3571 recog_data.operand[commutative + 1] = tem;
3572 tem = *recog_data.operand_loc[commutative];
3573 *recog_data.operand_loc[commutative]
3574 = *recog_data.operand_loc[commutative + 1];
3575 *recog_data.operand_loc[commutative+1] = tem;
3577 for (i = 0; i < n_reloads; i++)
3579 if (reload_opnum[i] == commutative)
3580 reload_opnum[i] = commutative + 1;
3581 else if (reload_opnum[i] == commutative + 1)
3582 reload_opnum[i] = commutative;
3586 for (i = 0; i < noperands; i++)
3588 operand_reloadnum[i] = -1;
3590 /* If this is an earlyclobber operand, we need to widen the scope.
3591 The reload must remain valid from the start of the insn being
3592 reloaded until after the operand is stored into its destination.
3593 We approximate this with RELOAD_OTHER even though we know that we
3594 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3596 One special case that is worth checking is when we have an
3597 output that is earlyclobber but isn't used past the insn (typically
3598 a SCRATCH). In this case, we only need have the reload live
3599 through the insn itself, but not for any of our input or output
3601 But we must not accidentally narrow the scope of an existing
3602 RELOAD_OTHER reload - leave these alone.
3604 In any case, anything needed to address this operand can remain
3605 however they were previously categorized. */
3607 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3609 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3610 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3613 /* Any constants that aren't allowed and can't be reloaded
3614 into registers are here changed into memory references. */
3615 for (i = 0; i < noperands; i++)
3616 if (! goal_alternative_win[i]
3617 && CONSTANT_P (recog_data.operand[i])
3618 /* force_const_mem does not accept HIGH. */
3619 && GET_CODE (recog_data.operand[i]) != HIGH
3620 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3621 (enum reg_class) goal_alternative[i])
3623 || no_input_reloads)
3624 && operand_mode[i] != VOIDmode)
3626 substed_operand[i] = recog_data.operand[i]
3627 = find_reloads_toplev (force_const_mem (operand_mode[i],
3628 recog_data.operand[i]),
3629 i, address_type[i], ind_levels, 0, insn);
3630 if (alternative_allows_memconst (recog_data.constraints[i],
3631 goal_alternative_number))
3632 goal_alternative_win[i] = 1;
3635 /* Record the values of the earlyclobber operands for the caller. */
3636 if (goal_earlyclobber)
3637 for (i = 0; i < noperands; i++)
3638 if (goal_alternative_earlyclobber[i])
3639 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3641 /* Now record reloads for all the operands that need them. */
3642 for (i = 0; i < noperands; i++)
3643 if (! goal_alternative_win[i])
3645 /* Operands that match previous ones have already been handled. */
3646 if (goal_alternative_matches[i] >= 0)
3648 /* Handle an operand with a nonoffsettable address
3649 appearing where an offsettable address will do
3650 by reloading the address into a base register.
3652 ??? We can also do this when the operand is a register and
3653 reg_equiv_mem is not offsettable, but this is a bit tricky,
3654 so we don't bother with it. It may not be worth doing. */
3655 else if (goal_alternative_matched[i] == -1
3656 && goal_alternative_offmemok[i]
3657 && GET_CODE (recog_data.operand[i]) == MEM)
3659 operand_reloadnum[i]
3660 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3661 &XEXP (recog_data.operand[i], 0), NULL_PTR,
3663 GET_MODE (XEXP (recog_data.operand[i], 0)),
3664 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3665 reload_inc[operand_reloadnum[i]]
3666 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3668 /* If this operand is an output, we will have made any
3669 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3670 now we are treating part of the operand as an input, so
3671 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3673 if (modified[i] == RELOAD_WRITE)
3675 for (j = 0; j < n_reloads; j++)
3677 if (reload_opnum[j] == i)
3679 if (reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3680 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
3681 else if (reload_when_needed[j]
3682 == RELOAD_FOR_OUTADDR_ADDRESS)
3683 reload_when_needed[j] = RELOAD_FOR_INPADDR_ADDRESS;
3688 else if (goal_alternative_matched[i] == -1)
3690 operand_reloadnum[i]
3691 = push_reload ((modified[i] != RELOAD_WRITE
3692 ? recog_data.operand[i] : 0),
3693 (modified[i] != RELOAD_READ
3694 ? recog_data.operand[i] : 0),
3695 (modified[i] != RELOAD_WRITE
3696 ? recog_data.operand_loc[i] : 0),
3697 (modified[i] != RELOAD_READ
3698 ? recog_data.operand_loc[i] : 0),
3699 (enum reg_class) goal_alternative[i],
3700 (modified[i] == RELOAD_WRITE
3701 ? VOIDmode : operand_mode[i]),
3702 (modified[i] == RELOAD_READ
3703 ? VOIDmode : operand_mode[i]),
3704 (insn_code_number < 0 ? 0
3705 : insn_data[insn_code_number].operand[i].strict_low),
3706 0, i, operand_type[i]);
3708 /* In a matching pair of operands, one must be input only
3709 and the other must be output only.
3710 Pass the input operand as IN and the other as OUT. */
3711 else if (modified[i] == RELOAD_READ
3712 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3714 operand_reloadnum[i]
3715 = push_reload (recog_data.operand[i],
3716 recog_data.operand[goal_alternative_matched[i]],
3717 recog_data.operand_loc[i],
3718 recog_data.operand_loc[goal_alternative_matched[i]],
3719 (enum reg_class) goal_alternative[i],
3721 operand_mode[goal_alternative_matched[i]],
3722 0, 0, i, RELOAD_OTHER);
3723 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3725 else if (modified[i] == RELOAD_WRITE
3726 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3728 operand_reloadnum[goal_alternative_matched[i]]
3729 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3730 recog_data.operand[i],
3731 recog_data.operand_loc[goal_alternative_matched[i]],
3732 recog_data.operand_loc[i],
3733 (enum reg_class) goal_alternative[i],
3734 operand_mode[goal_alternative_matched[i]],
3736 0, 0, i, RELOAD_OTHER);
3737 operand_reloadnum[i] = output_reloadnum;
3739 else if (insn_code_number >= 0)
3743 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3744 /* Avoid further trouble with this insn. */
3745 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3750 else if (goal_alternative_matched[i] < 0
3751 && goal_alternative_matches[i] < 0
3754 /* For each non-matching operand that's a MEM or a pseudo-register
3755 that didn't get a hard register, make an optional reload.
3756 This may get done even if the insn needs no reloads otherwise. */
3758 rtx operand = recog_data.operand[i];
3760 while (GET_CODE (operand) == SUBREG)
3761 operand = XEXP (operand, 0);
3762 if ((GET_CODE (operand) == MEM
3763 || (GET_CODE (operand) == REG
3764 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3765 /* If this is only for an output, the optional reload would not
3766 actually cause us to use a register now, just note that
3767 something is stored here. */
3768 && ((enum reg_class) goal_alternative[i] != NO_REGS
3769 || modified[i] == RELOAD_WRITE)
3770 && ! no_input_reloads
3771 /* An optional output reload might allow to delete INSN later.
3772 We mustn't make in-out reloads on insns that are not permitted
3774 If this is an asm, we can't delete it; we must not even call
3775 push_reload for an optional output reload in this case,
3776 because we can't be sure that the constraint allows a register,
3777 and push_reload verifies the constraints for asms. */
3778 && (modified[i] == RELOAD_READ
3779 || (! no_output_reloads && ! this_insn_is_asm)))
3780 operand_reloadnum[i]
3781 = push_reload ((modified[i] != RELOAD_WRITE
3782 ? recog_data.operand[i] : 0),
3783 (modified[i] != RELOAD_READ
3784 ? recog_data.operand[i] : 0),
3785 (modified[i] != RELOAD_WRITE
3786 ? recog_data.operand_loc[i] : 0),
3787 (modified[i] != RELOAD_READ
3788 ? recog_data.operand_loc[i] : 0),
3789 (enum reg_class) goal_alternative[i],
3790 (modified[i] == RELOAD_WRITE
3791 ? VOIDmode : operand_mode[i]),
3792 (modified[i] == RELOAD_READ
3793 ? VOIDmode : operand_mode[i]),
3794 (insn_code_number < 0 ? 0
3795 : insn_data[insn_code_number].operand[i].strict_low),
3796 1, i, operand_type[i]);
3797 /* If a memory reference remains (either as a MEM or a pseudo that
3798 did not get a hard register), yet we can't make an optional
3799 reload, check if this is actually a pseudo register reference;
3800 we then need to emit a USE and/or a CLOBBER so that reload
3801 inheritance will do the right thing. */
3803 && (GET_CODE (operand) == MEM
3804 || (GET_CODE (operand) == REG
3805 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3806 && reg_renumber [REGNO (operand)] < 0)))
3808 operand = *recog_data.operand_loc[i];
3810 while (GET_CODE (operand) == SUBREG)
3811 operand = XEXP (operand, 0);
3812 if (GET_CODE (operand) == REG)
3814 if (modified[i] != RELOAD_WRITE)
3815 emit_insn_before (gen_rtx_USE (VOIDmode, operand), insn);
3816 if (modified[i] != RELOAD_READ)
3817 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3821 else if (goal_alternative_matches[i] >= 0
3822 && goal_alternative_win[goal_alternative_matches[i]]
3823 && modified[i] == RELOAD_READ
3824 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3825 && ! no_input_reloads && ! no_output_reloads
3828 /* Similarly, make an optional reload for a pair of matching
3829 objects that are in MEM or a pseudo that didn't get a hard reg. */
3831 rtx operand = recog_data.operand[i];
3833 while (GET_CODE (operand) == SUBREG)
3834 operand = XEXP (operand, 0);
3835 if ((GET_CODE (operand) == MEM
3836 || (GET_CODE (operand) == REG
3837 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3838 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3840 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3841 = push_reload (recog_data.operand[goal_alternative_matches[i]],
3842 recog_data.operand[i],
3843 recog_data.operand_loc[goal_alternative_matches[i]],
3844 recog_data.operand_loc[i],
3845 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3846 operand_mode[goal_alternative_matches[i]],
3848 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3851 /* Perform whatever substitutions on the operands we are supposed
3852 to make due to commutativity or replacement of registers
3853 with equivalent constants or memory slots. */
3855 for (i = 0; i < noperands; i++)
3857 /* We only do this on the last pass through reload, because it is
3858 possible for some data (like reg_equiv_address) to be changed during
3859 later passes. Moreover, we loose the opportunity to get a useful
3860 reload_{in,out}_reg when we do these replacements. */
3864 rtx substitution = substed_operand[i];
3866 *recog_data.operand_loc[i] = substitution;
3868 /* If we're replacing an operand with a LABEL_REF, we need
3869 to make sure that there's a REG_LABEL note attached to
3870 this instruction. */
3871 if (GET_CODE (insn) != JUMP_INSN
3872 && GET_CODE (substitution) == LABEL_REF
3873 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
3874 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL,
3875 XEXP (substitution, 0),
3879 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
3882 /* If this insn pattern contains any MATCH_DUP's, make sure that
3883 they will be substituted if the operands they match are substituted.
3884 Also do now any substitutions we already did on the operands.
3886 Don't do this if we aren't making replacements because we might be
3887 propagating things allocated by frame pointer elimination into places
3888 it doesn't expect. */
3890 if (insn_code_number >= 0 && replace)
3891 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
3893 int opno = recog_data.dup_num[i];
3894 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
3895 if (operand_reloadnum[opno] >= 0)
3896 push_replacement (recog_data.dup_loc[i], operand_reloadnum[opno],
3897 insn_data[insn_code_number].operand[opno].mode);
3901 /* This loses because reloading of prior insns can invalidate the equivalence
3902 (or at least find_equiv_reg isn't smart enough to find it any more),
3903 causing this insn to need more reload regs than it needed before.
3904 It may be too late to make the reload regs available.
3905 Now this optimization is done safely in choose_reload_regs. */
3907 /* For each reload of a reg into some other class of reg,
3908 search for an existing equivalent reg (same value now) in the right class.
3909 We can use it as long as we don't need to change its contents. */
3910 for (i = 0; i < n_reloads; i++)
3911 if (reload_reg_rtx[i] == 0
3912 && reload_in[i] != 0
3913 && GET_CODE (reload_in[i]) == REG
3914 && reload_out[i] == 0)
3917 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3918 static_reload_reg_p, 0, reload_inmode[i]);
3919 /* Prevent generation of insn to load the value
3920 because the one we found already has the value. */
3921 if (reload_reg_rtx[i])
3922 reload_in[i] = reload_reg_rtx[i];
3926 /* Perhaps an output reload can be combined with another
3927 to reduce needs by one. */
3928 if (!goal_earlyclobber)
3931 /* If we have a pair of reloads for parts of an address, they are reloading
3932 the same object, the operands themselves were not reloaded, and they
3933 are for two operands that are supposed to match, merge the reloads and
3934 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3936 for (i = 0; i < n_reloads; i++)
3940 for (j = i + 1; j < n_reloads; j++)
3941 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3942 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3943 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3944 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3945 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
3946 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS
3947 || reload_when_needed[j] == RELOAD_FOR_INPADDR_ADDRESS
3948 || reload_when_needed[j] == RELOAD_FOR_OUTADDR_ADDRESS)
3949 && rtx_equal_p (reload_in[i], reload_in[j])
3950 && (operand_reloadnum[reload_opnum[i]] < 0
3951 || reload_optional[operand_reloadnum[reload_opnum[i]]])
3952 && (operand_reloadnum[reload_opnum[j]] < 0
3953 || reload_optional[operand_reloadnum[reload_opnum[j]]])
3954 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
3955 || (goal_alternative_matches[reload_opnum[j]]
3956 == reload_opnum[i])))
3958 for (k = 0; k < n_replacements; k++)
3959 if (replacements[k].what == j)
3960 replacements[k].what = i;
3962 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3963 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3964 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
3966 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3971 /* Scan all the reloads and update their type.
3972 If a reload is for the address of an operand and we didn't reload
3973 that operand, change the type. Similarly, change the operand number
3974 of a reload when two operands match. If a reload is optional, treat it
3975 as though the operand isn't reloaded.
3977 ??? This latter case is somewhat odd because if we do the optional
3978 reload, it means the object is hanging around. Thus we need only
3979 do the address reload if the optional reload was NOT done.
3981 Change secondary reloads to be the address type of their operand, not
3984 If an operand's reload is now RELOAD_OTHER, change any
3985 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3986 RELOAD_FOR_OTHER_ADDRESS. */
3988 for (i = 0; i < n_reloads; i++)
3990 if (reload_secondary_p[i]
3991 && reload_when_needed[i] == operand_type[reload_opnum[i]])
3992 reload_when_needed[i] = address_type[reload_opnum[i]];
3994 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3995 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3996 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3997 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3998 && (operand_reloadnum[reload_opnum[i]] < 0
3999 || reload_optional[operand_reloadnum[reload_opnum[i]]]))
4001 /* If we have a secondary reload to go along with this reload,
4002 change its type to RELOAD_FOR_OPADDR_ADDR. */
4004 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
4005 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
4006 && reload_secondary_in_reload[i] != -1)
4008 int secondary_in_reload = reload_secondary_in_reload[i];
4010 reload_when_needed[secondary_in_reload]
4011 = RELOAD_FOR_OPADDR_ADDR;
4013 /* If there's a tertiary reload we have to change it also. */
4014 if (secondary_in_reload > 0
4015 && reload_secondary_in_reload[secondary_in_reload] != -1)
4016 reload_when_needed[reload_secondary_in_reload[secondary_in_reload]]
4017 = RELOAD_FOR_OPADDR_ADDR;
4020 if ((reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
4021 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
4022 && reload_secondary_out_reload[i] != -1)
4024 int secondary_out_reload = reload_secondary_out_reload[i];
4026 reload_when_needed[secondary_out_reload]
4027 = RELOAD_FOR_OPADDR_ADDR;
4029 /* If there's a tertiary reload we have to change it also. */
4030 if (secondary_out_reload
4031 && reload_secondary_out_reload[secondary_out_reload] != -1)
4032 reload_when_needed[reload_secondary_out_reload[secondary_out_reload]]
4033 = RELOAD_FOR_OPADDR_ADDR;
4036 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
4037 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
4038 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
4040 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
4043 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
4044 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
4045 && operand_reloadnum[reload_opnum[i]] >= 0
4046 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
4048 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
4050 if (goal_alternative_matches[reload_opnum[i]] >= 0)
4051 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
4054 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4055 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4056 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4058 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4059 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4060 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4061 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4062 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4063 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4064 This is complicated by the fact that a single operand can have more
4065 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4066 choose_reload_regs without affecting code quality, and cases that
4067 actually fail are extremely rare, so it turns out to be better to fix
4068 the problem here by not generating cases that choose_reload_regs will
4070 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4071 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4073 We can reduce the register pressure by exploiting that a
4074 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4075 does not conflict with any of them, if it is only used for the first of
4076 the RELOAD_FOR_X_ADDRESS reloads. */
4078 int first_op_addr_num = -2;
4079 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4080 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4082 /* We use last_op_addr_reload and the contents of the above arrays
4083 first as flags - -2 means no instance encountered, -1 means exactly
4084 one instance encountered.
4085 If more than one instance has been encountered, we store the reload
4086 number of the first reload of the kind in question; reload numbers
4087 are known to be non-negative. */
4088 for (i = 0; i < noperands; i++)
4089 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4090 for (i = n_reloads - 1; i >= 0; i--)
4092 switch (reload_when_needed[i])
4094 case RELOAD_FOR_OPERAND_ADDRESS:
4095 if (++first_op_addr_num >= 0)
4097 first_op_addr_num = i;
4101 case RELOAD_FOR_INPUT_ADDRESS:
4102 if (++first_inpaddr_num[reload_opnum[i]] >= 0)
4104 first_inpaddr_num[reload_opnum[i]] = i;
4108 case RELOAD_FOR_OUTPUT_ADDRESS:
4109 if (++first_outpaddr_num[reload_opnum[i]] >= 0)
4111 first_outpaddr_num[reload_opnum[i]] = i;
4122 for (i = 0; i < n_reloads; i++)
4124 int first_num, type;
4126 switch (reload_when_needed[i])
4128 case RELOAD_FOR_OPADDR_ADDR:
4129 first_num = first_op_addr_num;
4130 type = RELOAD_FOR_OPERAND_ADDRESS;
4132 case RELOAD_FOR_INPADDR_ADDRESS:
4133 first_num = first_inpaddr_num[reload_opnum[i]];
4134 type = RELOAD_FOR_INPUT_ADDRESS;
4136 case RELOAD_FOR_OUTADDR_ADDRESS:
4137 first_num = first_outpaddr_num[reload_opnum[i]];
4138 type = RELOAD_FOR_OUTPUT_ADDRESS;
4145 else if (i > first_num)
4146 reload_when_needed[i] = type;
4149 /* Check if the only TYPE reload that uses reload I is
4150 reload FIRST_NUM. */
4151 for (j = n_reloads - 1; j > first_num; j--)
4153 if (reload_when_needed[j] == type
4154 && (reload_secondary_p[i]
4155 ? reload_secondary_in_reload[j] == i
4156 : reg_mentioned_p (reload_in[i], reload_in[j])))
4158 reload_when_needed[i] = type;
4167 /* See if we have any reloads that are now allowed to be merged
4168 because we've changed when the reload is needed to
4169 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4170 check for the most common cases. */
4172 for (i = 0; i < n_reloads; i++)
4173 if (reload_in[i] != 0 && reload_out[i] == 0
4174 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
4175 || reload_when_needed[i] == RELOAD_FOR_OPADDR_ADDR
4176 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
4177 for (j = 0; j < n_reloads; j++)
4178 if (i != j && reload_in[j] != 0 && reload_out[j] == 0
4179 && reload_when_needed[j] == reload_when_needed[i]
4180 && MATCHES (reload_in[i], reload_in[j])
4181 && reload_reg_class[i] == reload_reg_class[j]
4182 && !reload_nocombine[i] && !reload_nocombine[j]
4183 && reload_reg_rtx[i] == reload_reg_rtx[j])
4185 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
4186 transfer_replacements (i, j);
4190 /* Set which reloads must use registers not used in any group. Start
4191 with those that conflict with a group and then include ones that
4192 conflict with ones that are already known to conflict with a group. */
4195 for (i = 0; i < n_reloads; i++)
4197 enum machine_mode mode = reload_inmode[i];
4198 enum reg_class class = reload_reg_class[i];
4201 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode))
4202 mode = reload_outmode[i];
4203 size = CLASS_MAX_NREGS (class, mode);
4206 for (j = 0; j < n_reloads; j++)
4207 if ((CLASS_MAX_NREGS (reload_reg_class[j],
4208 (GET_MODE_SIZE (reload_outmode[j])
4209 > GET_MODE_SIZE (reload_inmode[j]))
4210 ? reload_outmode[j] : reload_inmode[j])
4212 && !reload_optional[j]
4213 && (reload_in[j] != 0 || reload_out[j] != 0
4214 || reload_secondary_p[j])
4215 && reloads_conflict (i, j)
4216 && reg_classes_intersect_p (class, reload_reg_class[j]))
4218 reload_nongroup[i] = 1;
4228 for (i = 0; i < n_reloads; i++)
4230 enum machine_mode mode = reload_inmode[i];
4231 enum reg_class class = reload_reg_class[i];
4234 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode))
4235 mode = reload_outmode[i];
4236 size = CLASS_MAX_NREGS (class, mode);
4238 if (! reload_nongroup[i] && size == 1)
4239 for (j = 0; j < n_reloads; j++)
4240 if (reload_nongroup[j]
4241 && reloads_conflict (i, j)
4242 && reg_classes_intersect_p (class, reload_reg_class[j]))
4244 reload_nongroup[i] = 1;
4251 #else /* no REGISTER_CONSTRAINTS */
4253 int insn_code_number;
4254 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
4256 rtx body = PATTERN (insn);
4261 n_earlyclobbers = 0;
4262 replace_reloads = replace;
4265 extract_insn (insn);
4267 noperands = reload_n_operands = recog_data.n_operands;
4269 /* Return if the insn needs no reload processing. */
4273 for (i = 0; i < noperands; i++)
4275 register RTX_CODE code = GET_CODE (recog_data.operand[i]);
4276 int is_set_dest = GET_CODE (body) == SET && (i == 0);
4278 if (insn_code_number >= 0)
4279 if (insn_data[insn_code_number].operand[i].address_p)
4280 find_reloads_address (VOIDmode, NULL_PTR,
4281 recog_data.operand[i],
4282 recog_data.operand_loc[i],
4283 i, RELOAD_FOR_INPUT, ind_levels, insn);
4285 /* In these cases, we can't tell if the operand is an input
4286 or an output, so be conservative. In practice it won't be
4290 find_reloads_address (GET_MODE (recog_data.operand[i]),
4291 recog_data.operand_loc[i],
4292 XEXP (recog_data.operand[i], 0),
4293 &XEXP (recog_data.operand[i], 0),
4294 i, RELOAD_OTHER, ind_levels, insn);
4296 recog_data.operand[i] = *recog_data.operand_loc[i]
4297 = find_reloads_toplev (recog_data.operand[i], i, RELOAD_OTHER,
4298 ind_levels, is_set_dest);
4301 register int regno = REGNO (recog_data.operand[i]);
4302 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4303 recog_data.operand[i] = *recog_data.operand_loc[i]
4304 = reg_equiv_constant[regno];
4305 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4306 that feeds this insn. */
4307 if (reg_equiv_mem[regno] != 0)
4308 recog_data.operand[i] = *recog_data.operand_loc[i]
4309 = reg_equiv_mem[regno];
4314 /* Perhaps an output reload can be combined with another
4315 to reduce needs by one. */
4316 if (!goal_earlyclobber)
4318 #endif /* no REGISTER_CONSTRAINTS */
4322 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4323 accepts a memory operand with constant address. */
4326 alternative_allows_memconst (constraint, altnum)
4327 const char *constraint;
4331 /* Skip alternatives before the one requested. */
4334 while (*constraint++ != ',');
4337 /* Scan the requested alternative for 'm' or 'o'.
4338 If one of them is present, this alternative accepts memory constants. */
4339 while ((c = *constraint++) && c != ',' && c != '#')
4340 if (c == 'm' || c == 'o')
4345 /* Scan X for memory references and scan the addresses for reloading.
4346 Also checks for references to "constant" regs that we want to eliminate
4347 and replaces them with the values they stand for.
4348 We may alter X destructively if it contains a reference to such.
4349 If X is just a constant reg, we return the equivalent value
4352 IND_LEVELS says how many levels of indirect addressing this machine
4355 OPNUM and TYPE identify the purpose of the reload.
4357 IS_SET_DEST is true if X is the destination of a SET, which is not
4358 appropriate to be replaced by a constant.
4360 INSN, if nonzero, is the insn in which we do the reload. It is used
4361 to determine if we may generate output reloads, and where to put USEs
4362 for pseudos that we have to replace with stack slots. */
4365 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn)
4368 enum reload_type type;
4373 register RTX_CODE code = GET_CODE (x);
4375 register const char *fmt = GET_RTX_FORMAT (code);
4381 /* This code is duplicated for speed in find_reloads. */
4382 register int regno = REGNO (x);
4383 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4384 x = reg_equiv_constant[regno];
4386 /* This creates (subreg (mem...)) which would cause an unnecessary
4387 reload of the mem. */
4388 else if (reg_equiv_mem[regno] != 0)
4389 x = reg_equiv_mem[regno];
4391 else if (reg_equiv_memory_loc[regno]
4392 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4394 rtx mem = make_memloc (x, regno);
4395 if (reg_equiv_address[regno]
4396 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4398 /* If this is not a toplevel operand, find_reloads doesn't see
4399 this substitution. We have to emit a USE of the pseudo so
4400 that delete_output_reload can see it. */
4401 if (replace_reloads && recog_data.operand[opnum] != x)
4402 emit_insn_before (gen_rtx_USE (VOIDmode, x), insn);
4404 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4405 opnum, type, ind_levels, insn);
4413 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4414 opnum, type, ind_levels, insn);
4418 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4420 /* Check for SUBREG containing a REG that's equivalent to a constant.
4421 If the constant has a known value, truncate it right now.
4422 Similarly if we are extracting a single-word of a multi-word
4423 constant. If the constant is symbolic, allow it to be substituted
4424 normally. push_reload will strip the subreg later. If the
4425 constant is VOIDmode, abort because we will lose the mode of
4426 the register (this should never happen because one of the cases
4427 above should handle it). */
4429 register int regno = REGNO (SUBREG_REG (x));
4432 if (subreg_lowpart_p (x)
4433 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4434 && reg_equiv_constant[regno] != 0
4435 && (tem = gen_lowpart_common (GET_MODE (x),
4436 reg_equiv_constant[regno])) != 0)
4439 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
4440 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4441 && reg_equiv_constant[regno] != 0
4442 && (tem = operand_subword (reg_equiv_constant[regno],
4444 GET_MODE (SUBREG_REG (x)))) != 0)
4446 /* TEM is now a word sized constant for the bits from X that
4447 we wanted. However, TEM may be the wrong representation.
4449 Use gen_lowpart_common to convert a CONST_INT into a
4450 CONST_DOUBLE and vice versa as needed according to by the mode
4452 tem = gen_lowpart_common (GET_MODE (x), tem);
4458 /* If the SUBREG is wider than a word, the above test will fail.
4459 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4460 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4461 a 32 bit target. We still can - and have to - handle this
4462 for non-paradoxical subregs of CONST_INTs. */
4463 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4464 && reg_equiv_constant[regno] != 0
4465 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT
4466 && (GET_MODE_SIZE (GET_MODE (x))
4467 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
4469 int shift = SUBREG_WORD (x) * BITS_PER_WORD;
4470 if (WORDS_BIG_ENDIAN)
4471 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
4472 - GET_MODE_BITSIZE (GET_MODE (x))
4474 /* Here we use the knowledge that CONST_INTs have a
4475 HOST_WIDE_INT field. */
4476 if (shift >= HOST_BITS_PER_WIDE_INT)
4477 shift = HOST_BITS_PER_WIDE_INT - 1;
4478 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift);
4481 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4482 && reg_equiv_constant[regno] != 0
4483 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
4486 /* If the subreg contains a reg that will be converted to a mem,
4487 convert the subreg to a narrower memref now.
4488 Otherwise, we would get (subreg (mem ...) ...),
4489 which would force reload of the mem.
4491 We also need to do this if there is an equivalent MEM that is
4492 not offsettable. In that case, alter_subreg would produce an
4493 invalid address on big-endian machines.
4495 For machines that extend byte loads, we must not reload using
4496 a wider mode if we have a paradoxical SUBREG. find_reloads will
4497 force a reload in that case. So we should not do anything here. */
4499 else if (regno >= FIRST_PSEUDO_REGISTER
4500 #ifdef LOAD_EXTEND_OP
4501 && (GET_MODE_SIZE (GET_MODE (x))
4502 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4504 && (reg_equiv_address[regno] != 0
4505 || (reg_equiv_mem[regno] != 0
4506 && (! strict_memory_address_p (GET_MODE (x),
4507 XEXP (reg_equiv_mem[regno], 0))
4508 || ! offsettable_memref_p (reg_equiv_mem[regno])
4509 || num_not_at_initial_offset))))
4510 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4514 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4518 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4519 ind_levels, is_set_dest, insn);
4520 /* If we have replaced a reg with it's equivalent memory loc -
4521 that can still be handled here e.g. if it's in a paradoxical
4522 subreg - we must make the change in a copy, rather than using
4523 a destructive change. This way, find_reloads can still elect
4524 not to do the change. */
4525 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4527 x = shallow_copy_rtx (x);
4530 XEXP (x, i) = new_part;
4536 /* Return a mem ref for the memory equivalent of reg REGNO.
4537 This mem ref is not shared with anything. */
4540 make_memloc (ad, regno)
4544 /* We must rerun eliminate_regs, in case the elimination
4545 offsets have changed. */
4547 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4549 /* If TEM might contain a pseudo, we must copy it to avoid
4550 modifying it when we do the substitution for the reload. */
4551 if (rtx_varies_p (tem))
4552 tem = copy_rtx (tem);
4554 tem = gen_rtx_MEM (GET_MODE (ad), tem);
4555 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4559 /* Record all reloads needed for handling memory address AD
4560 which appears in *LOC in a memory reference to mode MODE
4561 which itself is found in location *MEMREFLOC.
4562 Note that we take shortcuts assuming that no multi-reg machine mode
4563 occurs as part of an address.
4565 OPNUM and TYPE specify the purpose of this reload.
4567 IND_LEVELS says how many levels of indirect addressing this machine
4570 INSN, if nonzero, is the insn in which we do the reload. It is used
4571 to determine if we may generate output reloads, and where to put USEs
4572 for pseudos that we have to replace with stack slots.
4574 Value is nonzero if this address is reloaded or replaced as a whole.
4575 This is interesting to the caller if the address is an autoincrement.
4577 Note that there is no verification that the address will be valid after
4578 this routine does its work. Instead, we rely on the fact that the address
4579 was valid when reload started. So we need only undo things that reload
4580 could have broken. These are wrong register types, pseudos not allocated
4581 to a hard register, and frame pointer elimination. */
4584 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn)
4585 enum machine_mode mode;
4590 enum reload_type type;
4595 int removed_and = 0;
4598 /* If the address is a register, see if it is a legitimate address and
4599 reload if not. We first handle the cases where we need not reload
4600 or where we must reload in a non-standard way. */
4602 if (GET_CODE (ad) == REG)
4606 if (reg_equiv_constant[regno] != 0
4607 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
4609 *loc = ad = reg_equiv_constant[regno];
4613 tem = reg_equiv_memory_loc[regno];
4616 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4618 tem = make_memloc (ad, regno);
4619 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4621 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
4622 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
4625 /* We can avoid a reload if the register's equivalent memory
4626 expression is valid as an indirect memory address.
4627 But not all addresses are valid in a mem used as an indirect
4628 address: only reg or reg+constant. */
4631 && strict_memory_address_p (mode, tem)
4632 && (GET_CODE (XEXP (tem, 0)) == REG
4633 || (GET_CODE (XEXP (tem, 0)) == PLUS
4634 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4635 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4637 /* TEM is not the same as what we'll be replacing the
4638 pseudo with after reload, put a USE in front of INSN
4639 in the final reload pass. */
4641 && num_not_at_initial_offset
4642 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4645 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
4646 /* This doesn't really count as replacing the address
4647 as a whole, since it is still a memory access. */
4655 /* The only remaining case where we can avoid a reload is if this is a
4656 hard register that is valid as a base register and which is not the
4657 subject of a CLOBBER in this insn. */
4659 else if (regno < FIRST_PSEUDO_REGISTER
4660 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4661 && ! regno_clobbered_p (regno, this_insn))
4664 /* If we do not have one of the cases above, we must do the reload. */
4665 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
4666 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4670 if (strict_memory_address_p (mode, ad))
4672 /* The address appears valid, so reloads are not needed.
4673 But the address may contain an eliminable register.
4674 This can happen because a machine with indirect addressing
4675 may consider a pseudo register by itself a valid address even when
4676 it has failed to get a hard reg.
4677 So do a tree-walk to find and eliminate all such regs. */
4679 /* But first quickly dispose of a common case. */
4680 if (GET_CODE (ad) == PLUS
4681 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4682 && GET_CODE (XEXP (ad, 0)) == REG
4683 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4686 subst_reg_equivs_changed = 0;
4687 *loc = subst_reg_equivs (ad, insn);
4689 if (! subst_reg_equivs_changed)
4692 /* Check result for validity after substitution. */
4693 if (strict_memory_address_p (mode, ad))
4697 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4702 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4707 *memrefloc = copy_rtx (*memrefloc);
4708 XEXP (*memrefloc, 0) = ad;
4709 move_replacements (&ad, &XEXP (*memrefloc, 0));
4715 /* The address is not valid. We have to figure out why. First see if
4716 we have an outer AND and remove it if so. Then analyze what's inside. */
4718 if (GET_CODE (ad) == AND)
4721 loc = &XEXP (ad, 0);
4725 /* One possibility for why the address is invalid is that it is itself
4726 a MEM. This can happen when the frame pointer is being eliminated, a
4727 pseudo is not allocated to a hard register, and the offset between the
4728 frame and stack pointers is not its initial value. In that case the
4729 pseudo will have been replaced by a MEM referring to the
4731 if (GET_CODE (ad) == MEM)
4733 /* First ensure that the address in this MEM is valid. Then, unless
4734 indirect addresses are valid, reload the MEM into a register. */
4736 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4737 opnum, ADDR_TYPE (type),
4738 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4740 /* If tem was changed, then we must create a new memory reference to
4741 hold it and store it back into memrefloc. */
4742 if (tem != ad && memrefloc)
4744 *memrefloc = copy_rtx (*memrefloc);
4745 copy_replacements (tem, XEXP (*memrefloc, 0));
4746 loc = &XEXP (*memrefloc, 0);
4748 loc = &XEXP (*loc, 0);
4751 /* Check similar cases as for indirect addresses as above except
4752 that we can allow pseudos and a MEM since they should have been
4753 taken care of above. */
4756 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4757 || GET_CODE (XEXP (tem, 0)) == MEM
4758 || ! (GET_CODE (XEXP (tem, 0)) == REG
4759 || (GET_CODE (XEXP (tem, 0)) == PLUS
4760 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4761 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4763 /* Must use TEM here, not AD, since it is the one that will
4764 have any subexpressions reloaded, if needed. */
4765 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4766 BASE_REG_CLASS, GET_MODE (tem),
4769 return ! removed_and;
4775 /* If we have address of a stack slot but it's not valid because the
4776 displacement is too large, compute the sum in a register.
4777 Handle all base registers here, not just fp/ap/sp, because on some
4778 targets (namely SH) we can also get too large displacements from
4779 big-endian corrections. */
4780 else if (GET_CODE (ad) == PLUS
4781 && GET_CODE (XEXP (ad, 0)) == REG
4782 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4783 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4784 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4786 /* Unshare the MEM rtx so we can safely alter it. */
4789 *memrefloc = copy_rtx (*memrefloc);
4790 loc = &XEXP (*memrefloc, 0);
4792 loc = &XEXP (*loc, 0);
4795 if (double_reg_address_ok)
4797 /* Unshare the sum as well. */
4798 *loc = ad = copy_rtx (ad);
4800 /* Reload the displacement into an index reg.
4801 We assume the frame pointer or arg pointer is a base reg. */
4802 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4803 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4809 /* If the sum of two regs is not necessarily valid,
4810 reload the sum into a base reg.
4811 That will at least work. */
4812 find_reloads_address_part (ad, loc, BASE_REG_CLASS,
4813 Pmode, opnum, type, ind_levels);
4815 return ! removed_and;
4818 /* If we have an indexed stack slot, there are three possible reasons why
4819 it might be invalid: The index might need to be reloaded, the address
4820 might have been made by frame pointer elimination and hence have a
4821 constant out of range, or both reasons might apply.
4823 We can easily check for an index needing reload, but even if that is the
4824 case, we might also have an invalid constant. To avoid making the
4825 conservative assumption and requiring two reloads, we see if this address
4826 is valid when not interpreted strictly. If it is, the only problem is
4827 that the index needs a reload and find_reloads_address_1 will take care
4830 There is still a case when we might generate an extra reload,
4831 however. In certain cases eliminate_regs will return a MEM for a REG
4832 (see the code there for details). In those cases, memory_address_p
4833 applied to our address will return 0 so we will think that our offset
4834 must be too large. But it might indeed be valid and the only problem
4835 is that a MEM is present where a REG should be. This case should be
4836 very rare and there doesn't seem to be any way to avoid it.
4838 If we decide to do something here, it must be that
4839 `double_reg_address_ok' is true and that this address rtl was made by
4840 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4841 rework the sum so that the reload register will be added to the index.
4842 This is safe because we know the address isn't shared.
4844 We check for fp/ap/sp as both the first and second operand of the
4847 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4848 && GET_CODE (XEXP (ad, 0)) == PLUS
4849 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4850 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4851 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4853 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4854 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4856 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4857 && ! memory_address_p (mode, ad))
4859 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4860 plus_constant (XEXP (XEXP (ad, 0), 0),
4861 INTVAL (XEXP (ad, 1))),
4862 XEXP (XEXP (ad, 0), 1));
4863 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4864 GET_MODE (ad), opnum, type, ind_levels);
4865 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4871 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4872 && GET_CODE (XEXP (ad, 0)) == PLUS
4873 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4874 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4875 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4877 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4878 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4880 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4881 && ! memory_address_p (mode, ad))
4883 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4884 XEXP (XEXP (ad, 0), 0),
4885 plus_constant (XEXP (XEXP (ad, 0), 1),
4886 INTVAL (XEXP (ad, 1))));
4887 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), BASE_REG_CLASS,
4888 GET_MODE (ad), opnum, type, ind_levels);
4889 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4895 /* See if address becomes valid when an eliminable register
4896 in a sum is replaced. */
4899 if (GET_CODE (ad) == PLUS)
4900 tem = subst_indexed_address (ad);
4901 if (tem != ad && strict_memory_address_p (mode, tem))
4903 /* Ok, we win that way. Replace any additional eliminable
4906 subst_reg_equivs_changed = 0;
4907 tem = subst_reg_equivs (tem, insn);
4909 /* Make sure that didn't make the address invalid again. */
4911 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4918 /* If constants aren't valid addresses, reload the constant address
4920 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4922 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4923 Unshare it so we can safely alter it. */
4924 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4925 && CONSTANT_POOL_ADDRESS_P (ad))
4927 *memrefloc = copy_rtx (*memrefloc);
4928 loc = &XEXP (*memrefloc, 0);
4930 loc = &XEXP (*loc, 0);
4933 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
4935 return ! removed_and;
4938 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
4942 /* Find all pseudo regs appearing in AD
4943 that are eliminable in favor of equivalent values
4944 and do not have hard regs; replace them by their equivalents.
4945 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4946 front of it for pseudos that we have to replace with stack slots. */
4949 subst_reg_equivs (ad, insn)
4953 register RTX_CODE code = GET_CODE (ad);
4955 register const char *fmt;
4971 register int regno = REGNO (ad);
4973 if (reg_equiv_constant[regno] != 0)
4975 subst_reg_equivs_changed = 1;
4976 return reg_equiv_constant[regno];
4978 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
4980 rtx mem = make_memloc (ad, regno);
4981 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
4983 subst_reg_equivs_changed = 1;
4984 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
4992 /* Quickly dispose of a common case. */
4993 if (XEXP (ad, 0) == frame_pointer_rtx
4994 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
5002 fmt = GET_RTX_FORMAT (code);
5003 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5005 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5009 /* Compute the sum of X and Y, making canonicalizations assumed in an
5010 address, namely: sum constant integers, surround the sum of two
5011 constants with a CONST, put the constant as the second operand, and
5012 group the constant on the outermost sum.
5014 This routine assumes both inputs are already in canonical form. */
5021 enum machine_mode mode = GET_MODE (x);
5023 if (mode == VOIDmode)
5024 mode = GET_MODE (y);
5026 if (mode == VOIDmode)
5029 if (GET_CODE (x) == CONST_INT)
5030 return plus_constant (y, INTVAL (x));
5031 else if (GET_CODE (y) == CONST_INT)
5032 return plus_constant (x, INTVAL (y));
5033 else if (CONSTANT_P (x))
5034 tem = x, x = y, y = tem;
5036 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5037 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5039 /* Note that if the operands of Y are specified in the opposite
5040 order in the recursive calls below, infinite recursion will occur. */
5041 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5042 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5044 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5045 constant will have been placed second. */
5046 if (CONSTANT_P (x) && CONSTANT_P (y))
5048 if (GET_CODE (x) == CONST)
5050 if (GET_CODE (y) == CONST)
5053 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5056 return gen_rtx_PLUS (mode, x, y);
5059 /* If ADDR is a sum containing a pseudo register that should be
5060 replaced with a constant (from reg_equiv_constant),
5061 return the result of doing so, and also apply the associative
5062 law so that the result is more likely to be a valid address.
5063 (But it is not guaranteed to be one.)
5065 Note that at most one register is replaced, even if more are
5066 replaceable. Also, we try to put the result into a canonical form
5067 so it is more likely to be a valid address.
5069 In all other cases, return ADDR. */
5072 subst_indexed_address (addr)
5075 rtx op0 = 0, op1 = 0, op2 = 0;
5079 if (GET_CODE (addr) == PLUS)
5081 /* Try to find a register to replace. */
5082 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5083 if (GET_CODE (op0) == REG
5084 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5085 && reg_renumber[regno] < 0
5086 && reg_equiv_constant[regno] != 0)
5087 op0 = reg_equiv_constant[regno];
5088 else if (GET_CODE (op1) == REG
5089 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5090 && reg_renumber[regno] < 0
5091 && reg_equiv_constant[regno] != 0)
5092 op1 = reg_equiv_constant[regno];
5093 else if (GET_CODE (op0) == PLUS
5094 && (tem = subst_indexed_address (op0)) != op0)
5096 else if (GET_CODE (op1) == PLUS
5097 && (tem = subst_indexed_address (op1)) != op1)
5102 /* Pick out up to three things to add. */
5103 if (GET_CODE (op1) == PLUS)
5104 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5105 else if (GET_CODE (op0) == PLUS)
5106 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5108 /* Compute the sum. */
5110 op1 = form_sum (op1, op2);
5112 op0 = form_sum (op0, op1);
5119 /* Record the pseudo registers we must reload into hard registers in a
5120 subexpression of a would-be memory address, X referring to a value
5121 in mode MODE. (This function is not called if the address we find
5124 CONTEXT = 1 means we are considering regs as index regs,
5125 = 0 means we are considering them as base regs.
5127 OPNUM and TYPE specify the purpose of any reloads made.
5129 IND_LEVELS says how many levels of indirect addressing are
5130 supported at this point in the address.
5132 INSN, if nonzero, is the insn in which we do the reload. It is used
5133 to determine if we may generate output reloads.
5135 We return nonzero if X, as a whole, is reloaded or replaced. */
5137 /* Note that we take shortcuts assuming that no multi-reg machine mode
5138 occurs as part of an address.
5139 Also, this is not fully machine-customizable; it works for machines
5140 such as vaxes and 68000's and 32000's, but other possible machines
5141 could have addressing modes that this does not handle right. */
5144 find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
5145 enum machine_mode mode;
5150 enum reload_type type;
5154 register RTX_CODE code = GET_CODE (x);
5160 register rtx orig_op0 = XEXP (x, 0);
5161 register rtx orig_op1 = XEXP (x, 1);
5162 register RTX_CODE code0 = GET_CODE (orig_op0);
5163 register RTX_CODE code1 = GET_CODE (orig_op1);
5164 register rtx op0 = orig_op0;
5165 register rtx op1 = orig_op1;
5167 if (GET_CODE (op0) == SUBREG)
5169 op0 = SUBREG_REG (op0);
5170 code0 = GET_CODE (op0);
5171 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5172 op0 = gen_rtx_REG (word_mode,
5173 REGNO (op0) + SUBREG_WORD (orig_op0));
5176 if (GET_CODE (op1) == SUBREG)
5178 op1 = SUBREG_REG (op1);
5179 code1 = GET_CODE (op1);
5180 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5181 op1 = gen_rtx_REG (GET_MODE (op1),
5182 REGNO (op1) + SUBREG_WORD (orig_op1));
5185 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5186 || code0 == ZERO_EXTEND || code1 == MEM)
5188 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5189 type, ind_levels, insn);
5190 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5191 type, ind_levels, insn);
5194 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5195 || code1 == ZERO_EXTEND || code0 == MEM)
5197 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5198 type, ind_levels, insn);
5199 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5200 type, ind_levels, insn);
5203 else if (code0 == CONST_INT || code0 == CONST
5204 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5205 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5206 type, ind_levels, insn);
5208 else if (code1 == CONST_INT || code1 == CONST
5209 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5210 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5211 type, ind_levels, insn);
5213 else if (code0 == REG && code1 == REG)
5215 if (REG_OK_FOR_INDEX_P (op0)
5216 && REG_MODE_OK_FOR_BASE_P (op1, mode))
5218 else if (REG_OK_FOR_INDEX_P (op1)
5219 && REG_MODE_OK_FOR_BASE_P (op0, mode))
5221 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5222 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5223 type, ind_levels, insn);
5224 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5225 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5226 type, ind_levels, insn);
5227 else if (REG_OK_FOR_INDEX_P (op1))
5228 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5229 type, ind_levels, insn);
5230 else if (REG_OK_FOR_INDEX_P (op0))
5231 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5232 type, ind_levels, insn);
5235 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5236 type, ind_levels, insn);
5237 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5238 type, ind_levels, insn);
5242 else if (code0 == REG)
5244 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5245 type, ind_levels, insn);
5246 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5247 type, ind_levels, insn);
5250 else if (code1 == REG)
5252 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5253 type, ind_levels, insn);
5254 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5255 type, ind_levels, insn);
5265 if (GET_CODE (XEXP (x, 0)) == REG)
5267 register int regno = REGNO (XEXP (x, 0));
5271 /* A register that is incremented cannot be constant! */
5272 if (regno >= FIRST_PSEUDO_REGISTER
5273 && reg_equiv_constant[regno] != 0)
5276 /* Handle a register that is equivalent to a memory location
5277 which cannot be addressed directly. */
5278 if (reg_equiv_memory_loc[regno] != 0
5279 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5281 rtx tem = make_memloc (XEXP (x, 0), regno);
5282 if (reg_equiv_address[regno]
5283 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5285 /* First reload the memory location's address.
5286 We can't use ADDR_TYPE (type) here, because we need to
5287 write back the value after reading it, hence we actually
5288 need two registers. */
5289 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5290 &XEXP (tem, 0), opnum, type,
5292 /* Put this inside a new increment-expression. */
5293 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5294 /* Proceed to reload that, as if it contained a register. */
5298 /* If we have a hard register that is ok as an index,
5299 don't make a reload. If an autoincrement of a nice register
5300 isn't "valid", it must be that no autoincrement is "valid".
5301 If that is true and something made an autoincrement anyway,
5302 this must be a special context where one is allowed.
5303 (For example, a "push" instruction.)
5304 We can't improve this address, so leave it alone. */
5306 /* Otherwise, reload the autoincrement into a suitable hard reg
5307 and record how much to increment by. */
5309 if (reg_renumber[regno] >= 0)
5310 regno = reg_renumber[regno];
5311 if ((regno >= FIRST_PSEUDO_REGISTER
5312 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5313 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5320 /* If we can output the register afterwards, do so, this
5321 saves the extra update.
5322 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5323 CALL_INSN - and it does not set CC0.
5324 But don't do this if we cannot directly address the
5325 memory location, since this will make it harder to
5326 reuse address reloads, and increases register pressure.
5327 Also don't do this if we can probably update x directly. */
5328 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM
5330 : reg_equiv_mem[regno]);
5331 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5332 if (insn && GET_CODE (insn) == INSN && equiv
5333 && memory_operand (equiv, GET_MODE (equiv))
5335 && ! sets_cc0_p (PATTERN (insn))
5337 && ! (icode != CODE_FOR_nothing
5338 && ((*insn_data[icode].operand[0].predicate)
5340 && ((*insn_data[icode].operand[1].predicate)
5346 = push_reload (x, x, loc, loc,
5347 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5348 GET_MODE (x), GET_MODE (x), 0, 0,
5349 opnum, RELOAD_OTHER);
5351 /* If we created a new MEM based on reg_equiv_mem[REGNO], then
5352 LOC above is part of the new MEM, not the MEM in INSN.
5354 We must also replace the address of the MEM in INSN. */
5355 if (&XEXP (x_orig, 0) != loc)
5356 push_replacement (&XEXP (x_orig, 0), reloadnum, VOIDmode);
5362 = push_reload (x, NULL_RTX, loc, NULL_PTR,
5363 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5364 GET_MODE (x), GET_MODE (x), 0, 0,
5366 reload_inc[reloadnum]
5367 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5373 /* Update the REG_INC notes. */
5375 for (link = REG_NOTES (this_insn);
5376 link; link = XEXP (link, 1))
5377 if (REG_NOTE_KIND (link) == REG_INC
5378 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
5379 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5385 else if (GET_CODE (XEXP (x, 0)) == MEM)
5387 /* This is probably the result of a substitution, by eliminate_regs,
5388 of an equivalent address for a pseudo that was not allocated to a
5389 hard register. Verify that the specified address is valid and
5390 reload it into a register. */
5391 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5392 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5396 /* Since we know we are going to reload this item, don't decrement
5397 for the indirection level.
5399 Note that this is actually conservative: it would be slightly
5400 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5402 /* We can't use ADDR_TYPE (type) here, because we need to
5403 write back the value after reading it, hence we actually
5404 need two registers. */
5405 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5406 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5407 opnum, type, ind_levels, insn);
5409 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
5410 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5411 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5412 reload_inc[reloadnum]
5413 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5415 link = FIND_REG_INC_NOTE (this_insn, tem);
5417 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5424 /* This is probably the result of a substitution, by eliminate_regs, of
5425 an equivalent address for a pseudo that was not allocated to a hard
5426 register. Verify that the specified address is valid and reload it
5429 Since we know we are going to reload this item, don't decrement for
5430 the indirection level.
5432 Note that this is actually conservative: it would be slightly more
5433 efficient to use the value of SPILL_INDIRECT_LEVELS from
5436 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5437 opnum, ADDR_TYPE (type), ind_levels, insn);
5438 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
5439 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5440 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5445 register int regno = REGNO (x);
5447 if (reg_equiv_constant[regno] != 0)
5449 find_reloads_address_part (reg_equiv_constant[regno], loc,
5450 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5451 GET_MODE (x), opnum, type, ind_levels);
5455 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5456 that feeds this insn. */
5457 if (reg_equiv_mem[regno] != 0)
5459 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
5460 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5461 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5466 if (reg_equiv_memory_loc[regno]
5467 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5469 rtx tem = make_memloc (x, regno);
5470 if (reg_equiv_address[regno] != 0
5471 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5474 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5475 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5480 if (reg_renumber[regno] >= 0)
5481 regno = reg_renumber[regno];
5483 if ((regno >= FIRST_PSEUDO_REGISTER
5484 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5485 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5487 push_reload (x, NULL_RTX, loc, NULL_PTR,
5488 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5489 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5493 /* If a register appearing in an address is the subject of a CLOBBER
5494 in this insn, reload it into some other register to be safe.
5495 The CLOBBER is supposed to make the register unavailable
5496 from before this insn to after it. */
5497 if (regno_clobbered_p (regno, this_insn))
5499 push_reload (x, NULL_RTX, loc, NULL_PTR,
5500 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5501 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5508 if (GET_CODE (SUBREG_REG (x)) == REG)
5510 /* If this is a SUBREG of a hard register and the resulting register
5511 is of the wrong class, reload the whole SUBREG. This avoids
5512 needless copies if SUBREG_REG is multi-word. */
5513 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5515 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5517 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5518 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5520 push_reload (x, NULL_RTX, loc, NULL_PTR,
5521 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5522 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5526 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5527 is larger than the class size, then reload the whole SUBREG. */
5530 enum reg_class class = (context ? INDEX_REG_CLASS
5532 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5533 > reg_class_size[class])
5535 x = find_reloads_subreg_address (x, 0, opnum, type,
5537 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5538 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5550 register const char *fmt = GET_RTX_FORMAT (code);
5553 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5556 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5557 opnum, type, ind_levels, insn);
5564 /* X, which is found at *LOC, is a part of an address that needs to be
5565 reloaded into a register of class CLASS. If X is a constant, or if
5566 X is a PLUS that contains a constant, check that the constant is a
5567 legitimate operand and that we are supposed to be able to load
5568 it into the register.
5570 If not, force the constant into memory and reload the MEM instead.
5572 MODE is the mode to use, in case X is an integer constant.
5574 OPNUM and TYPE describe the purpose of any reloads made.
5576 IND_LEVELS says how many levels of indirect addressing this machine
5580 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
5583 enum reg_class class;
5584 enum machine_mode mode;
5586 enum reload_type type;
5590 && (! LEGITIMATE_CONSTANT_P (x)
5591 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5595 /* If this is a CONST_INT, it could have been created by a
5596 plus_constant call in eliminate_regs, which means it may be
5597 on the reload_obstack. reload_obstack will be freed later, so
5598 we can't allow such RTL to be put in the constant pool. There
5599 is code in force_const_mem to check for this case, but it doesn't
5600 work because we have already popped off the reload_obstack, so
5601 rtl_obstack == saveable_obstack is true at this point. */
5602 if (GET_CODE (x) == CONST_INT)
5603 tem = x = force_const_mem (mode, GEN_INT (INTVAL (x)));
5605 tem = x = force_const_mem (mode, x);
5607 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5608 opnum, type, ind_levels, 0);
5611 else if (GET_CODE (x) == PLUS
5612 && CONSTANT_P (XEXP (x, 1))
5613 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5614 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5618 /* See comment above. */
5619 if (GET_CODE (XEXP (x, 1)) == CONST_INT)
5620 tem = force_const_mem (GET_MODE (x), GEN_INT (INTVAL (XEXP (x, 1))));
5622 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5624 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5625 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5626 opnum, type, ind_levels, 0);
5629 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5630 mode, VOIDmode, 0, 0, opnum, type);
5633 /* X, a subreg of a pseudo, is a part of an address that needs to be
5636 If the pseudo is equivalent to a memory location that cannot be directly
5637 addressed, make the necessary address reloads.
5639 If address reloads have been necessary, or if the address is changed
5640 by register elimination, return the rtx of the memory location;
5641 otherwise, return X.
5643 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5646 OPNUM and TYPE identify the purpose of the reload.
5648 IND_LEVELS says how many levels of indirect addressing are
5649 supported at this point in the address.
5651 INSN, if nonzero, is the insn in which we do the reload. It is used
5652 to determine where to put USEs for pseudos that we have to replace with
5656 find_reloads_subreg_address (x, force_replace, opnum, type,
5661 enum reload_type type;
5665 int regno = REGNO (SUBREG_REG (x));
5667 if (reg_equiv_memory_loc[regno])
5669 /* If the address is not directly addressable, or if the address is not
5670 offsettable, then it must be replaced. */
5672 && (reg_equiv_address[regno]
5673 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5676 if (force_replace || num_not_at_initial_offset)
5678 rtx tem = make_memloc (SUBREG_REG (x), regno);
5680 /* If the address changes because of register elimination, then
5681 it must be replaced. */
5683 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5685 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
5687 if (BYTES_BIG_ENDIAN)
5691 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5692 offset += MIN (size, UNITS_PER_WORD);
5693 size = GET_MODE_SIZE (GET_MODE (x));
5694 offset -= MIN (size, UNITS_PER_WORD);
5696 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5697 PUT_MODE (tem, GET_MODE (x));
5698 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5699 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
5701 /* If this is not a toplevel operand, find_reloads doesn't see
5702 this substitution. We have to emit a USE of the pseudo so
5703 that delete_output_reload can see it. */
5704 if (replace_reloads && recog_data.operand[opnum] != x)
5705 emit_insn_before (gen_rtx_USE (VOIDmode, SUBREG_REG (x)), insn);
5713 /* Substitute into the current INSN the registers into which we have reloaded
5714 the things that need reloading. The array `replacements'
5715 says contains the locations of all pointers that must be changed
5716 and says what to replace them with.
5718 Return the rtx that X translates into; usually X, but modified. */
5725 for (i = 0; i < n_replacements; i++)
5727 register struct replacement *r = &replacements[i];
5728 register rtx reloadreg = reload_reg_rtx[r->what];
5731 /* Encapsulate RELOADREG so its machine mode matches what
5732 used to be there. Note that gen_lowpart_common will
5733 do the wrong thing if RELOADREG is multi-word. RELOADREG
5734 will always be a REG here. */
5735 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5736 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5738 /* If we are putting this into a SUBREG and RELOADREG is a
5739 SUBREG, we would be making nested SUBREGs, so we have to fix
5740 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5742 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5744 if (GET_MODE (*r->subreg_loc)
5745 == GET_MODE (SUBREG_REG (reloadreg)))
5746 *r->subreg_loc = SUBREG_REG (reloadreg);
5749 *r->where = SUBREG_REG (reloadreg);
5750 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
5754 *r->where = reloadreg;
5756 /* If reload got no reg and isn't optional, something's wrong. */
5757 else if (! reload_optional[r->what])
5762 /* Make a copy of any replacements being done into X and move those copies
5763 to locations in Y, a copy of X. We only look at the highest level of
5767 copy_replacements (x, y)
5772 enum rtx_code code = GET_CODE (x);
5773 const char *fmt = GET_RTX_FORMAT (code);
5774 struct replacement *r;
5776 /* We can't support X being a SUBREG because we might then need to know its
5777 location if something inside it was replaced. */
5781 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5783 for (j = 0; j < n_replacements; j++)
5785 if (replacements[j].subreg_loc == &XEXP (x, i))
5787 r = &replacements[n_replacements++];
5788 r->where = replacements[j].where;
5789 r->subreg_loc = &XEXP (y, i);
5790 r->what = replacements[j].what;
5791 r->mode = replacements[j].mode;
5793 else if (replacements[j].where == &XEXP (x, i))
5795 r = &replacements[n_replacements++];
5796 r->where = &XEXP (y, i);
5798 r->what = replacements[j].what;
5799 r->mode = replacements[j].mode;
5804 /* Change any replacements being done to *X to be done to *Y */
5807 move_replacements (x, y)
5813 for (i = 0; i < n_replacements; i++)
5814 if (replacements[i].subreg_loc == x)
5815 replacements[i].subreg_loc = y;
5816 else if (replacements[i].where == x)
5818 replacements[i].where = y;
5819 replacements[i].subreg_loc = 0;
5823 /* If LOC was scheduled to be replaced by something, return the replacement.
5824 Otherwise, return *LOC. */
5827 find_replacement (loc)
5830 struct replacement *r;
5832 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
5834 rtx reloadreg = reload_reg_rtx[r->what];
5836 if (reloadreg && r->where == loc)
5838 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
5839 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5843 else if (reloadreg && r->subreg_loc == loc)
5845 /* RELOADREG must be either a REG or a SUBREG.
5847 ??? Is it actually still ever a SUBREG? If so, why? */
5849 if (GET_CODE (reloadreg) == REG)
5850 return gen_rtx_REG (GET_MODE (*loc),
5851 REGNO (reloadreg) + SUBREG_WORD (*loc));
5852 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
5855 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
5856 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
5860 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5861 what's inside and make a new rtl if so. */
5862 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
5863 || GET_CODE (*loc) == MULT)
5865 rtx x = find_replacement (&XEXP (*loc, 0));
5866 rtx y = find_replacement (&XEXP (*loc, 1));
5868 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
5869 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
5875 /* Return nonzero if register in range [REGNO, ENDREGNO)
5876 appears either explicitly or implicitly in X
5877 other than being stored into (except for earlyclobber operands).
5879 References contained within the substructure at LOC do not count.
5880 LOC may be zero, meaning don't ignore anything.
5882 This is similar to refers_to_regno_p in rtlanal.c except that we
5883 look at equivalences for pseudos that didn't get hard registers. */
5886 refers_to_regno_for_reload_p (regno, endregno, x, loc)
5887 int regno, endregno;
5892 register RTX_CODE code;
5893 register const char *fmt;
5899 code = GET_CODE (x);
5906 /* If this is a pseudo, a hard register must not have been allocated.
5907 X must therefore either be a constant or be in memory. */
5908 if (i >= FIRST_PSEUDO_REGISTER)
5910 if (reg_equiv_memory_loc[i])
5911 return refers_to_regno_for_reload_p (regno, endregno,
5912 reg_equiv_memory_loc[i],
5915 if (reg_equiv_constant[i])
5921 return (endregno > i
5922 && regno < i + (i < FIRST_PSEUDO_REGISTER
5923 ? HARD_REGNO_NREGS (i, GET_MODE (x))
5927 /* If this is a SUBREG of a hard reg, we can see exactly which
5928 registers are being modified. Otherwise, handle normally. */
5929 if (GET_CODE (SUBREG_REG (x)) == REG
5930 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5932 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5934 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
5935 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5937 return endregno > inner_regno && regno < inner_endregno;
5943 if (&SET_DEST (x) != loc
5944 /* Note setting a SUBREG counts as referring to the REG it is in for
5945 a pseudo but not for hard registers since we can
5946 treat each word individually. */
5947 && ((GET_CODE (SET_DEST (x)) == SUBREG
5948 && loc != &SUBREG_REG (SET_DEST (x))
5949 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
5950 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
5951 && refers_to_regno_for_reload_p (regno, endregno,
5952 SUBREG_REG (SET_DEST (x)),
5954 /* If the output is an earlyclobber operand, this is
5956 || ((GET_CODE (SET_DEST (x)) != REG
5957 || earlyclobber_operand_p (SET_DEST (x)))
5958 && refers_to_regno_for_reload_p (regno, endregno,
5959 SET_DEST (x), loc))))
5962 if (code == CLOBBER || loc == &SET_SRC (x))
5971 /* X does not match, so try its subexpressions. */
5973 fmt = GET_RTX_FORMAT (code);
5974 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5976 if (fmt[i] == 'e' && loc != &XEXP (x, i))
5984 if (refers_to_regno_for_reload_p (regno, endregno,
5988 else if (fmt[i] == 'E')
5991 for (j = XVECLEN (x, i) - 1; j >=0; j--)
5992 if (loc != &XVECEXP (x, i, j)
5993 && refers_to_regno_for_reload_p (regno, endregno,
5994 XVECEXP (x, i, j), loc))
6001 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6002 we check if any register number in X conflicts with the relevant register
6003 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6004 contains a MEM (we don't bother checking for memory addresses that can't
6005 conflict because we expect this to be a rare case.
6007 This function is similar to reg_overlap_mention_p in rtlanal.c except
6008 that we look at equivalences for pseudos that didn't get hard registers. */
6011 reg_overlap_mentioned_for_reload_p (x, in)
6014 int regno, endregno;
6016 /* Overly conservative. */
6017 if (GET_CODE (x) == STRICT_LOW_PART)
6020 /* If either argument is a constant, then modifying X can not affect IN. */
6021 if (CONSTANT_P (x) || CONSTANT_P (in))
6023 else if (GET_CODE (x) == SUBREG)
6025 regno = REGNO (SUBREG_REG (x));
6026 if (regno < FIRST_PSEUDO_REGISTER)
6027 regno += SUBREG_WORD (x);
6029 else if (GET_CODE (x) == REG)
6033 /* If this is a pseudo, it must not have been assigned a hard register.
6034 Therefore, it must either be in memory or be a constant. */
6036 if (regno >= FIRST_PSEUDO_REGISTER)
6038 if (reg_equiv_memory_loc[regno])
6039 return refers_to_mem_for_reload_p (in);
6040 else if (reg_equiv_constant[regno])
6045 else if (GET_CODE (x) == MEM)
6046 return refers_to_mem_for_reload_p (in);
6047 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6048 || GET_CODE (x) == CC0)
6049 return reg_mentioned_p (x, in);
6053 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6054 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6056 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
6059 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6063 refers_to_mem_for_reload_p (x)
6069 if (GET_CODE (x) == MEM)
6072 if (GET_CODE (x) == REG)
6073 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6074 && reg_equiv_memory_loc[REGNO (x)]);
6076 fmt = GET_RTX_FORMAT (GET_CODE (x));
6077 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6079 && (GET_CODE (XEXP (x, i)) == MEM
6080 || refers_to_mem_for_reload_p (XEXP (x, i))))
6086 /* Check the insns before INSN to see if there is a suitable register
6087 containing the same value as GOAL.
6088 If OTHER is -1, look for a register in class CLASS.
6089 Otherwise, just see if register number OTHER shares GOAL's value.
6091 Return an rtx for the register found, or zero if none is found.
6093 If RELOAD_REG_P is (short *)1,
6094 we reject any hard reg that appears in reload_reg_rtx
6095 because such a hard reg is also needed coming into this insn.
6097 If RELOAD_REG_P is any other nonzero value,
6098 it is a vector indexed by hard reg number
6099 and we reject any hard reg whose element in the vector is nonnegative
6100 as well as any that appears in reload_reg_rtx.
6102 If GOAL is zero, then GOALREG is a register number; we look
6103 for an equivalent for that register.
6105 MODE is the machine mode of the value we want an equivalence for.
6106 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6108 This function is used by jump.c as well as in the reload pass.
6110 If GOAL is the sum of the stack pointer and a constant, we treat it
6111 as if it were a constant except that sp is required to be unchanging. */
6114 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
6117 enum reg_class class;
6119 short *reload_reg_p;
6121 enum machine_mode mode;
6123 register rtx p = insn;
6124 rtx goaltry, valtry, value, where;
6126 register int regno = -1;
6130 int goal_mem_addr_varies = 0;
6131 int need_stable_sp = 0;
6137 else if (GET_CODE (goal) == REG)
6138 regno = REGNO (goal);
6139 else if (GET_CODE (goal) == MEM)
6141 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6142 if (MEM_VOLATILE_P (goal))
6144 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
6146 /* An address with side effects must be reexecuted. */
6159 else if (CONSTANT_P (goal))
6161 else if (GET_CODE (goal) == PLUS
6162 && XEXP (goal, 0) == stack_pointer_rtx
6163 && CONSTANT_P (XEXP (goal, 1)))
6164 goal_const = need_stable_sp = 1;
6165 else if (GET_CODE (goal) == PLUS
6166 && XEXP (goal, 0) == frame_pointer_rtx
6167 && CONSTANT_P (XEXP (goal, 1)))
6172 /* On some machines, certain regs must always be rejected
6173 because they don't behave the way ordinary registers do. */
6175 #ifdef OVERLAPPING_REGNO_P
6176 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6177 && OVERLAPPING_REGNO_P (regno))
6181 /* Scan insns back from INSN, looking for one that copies
6182 a value into or out of GOAL.
6183 Stop and give up if we reach a label. */
6188 if (p == 0 || GET_CODE (p) == CODE_LABEL)
6190 if (GET_CODE (p) == INSN
6191 /* If we don't want spill regs ... */
6192 && (! (reload_reg_p != 0
6193 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6194 /* ... then ignore insns introduced by reload; they aren't useful
6195 and can cause results in reload_as_needed to be different
6196 from what they were when calculating the need for spills.
6197 If we notice an input-reload insn here, we will reject it below,
6198 but it might hide a usable equivalent. That makes bad code.
6199 It may even abort: perhaps no reg was spilled for this insn
6200 because it was assumed we would find that equivalent. */
6201 || INSN_UID (p) < reload_first_uid))
6204 pat = single_set (p);
6205 /* First check for something that sets some reg equal to GOAL. */
6208 && true_regnum (SET_SRC (pat)) == regno
6209 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6212 && true_regnum (SET_DEST (pat)) == regno
6213 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6215 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6216 /* When looking for stack pointer + const,
6217 make sure we don't use a stack adjust. */
6218 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6219 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6221 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6222 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6224 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6225 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6226 /* If we are looking for a constant,
6227 and something equivalent to that constant was copied
6228 into a reg, we can use that reg. */
6229 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6231 && rtx_equal_p (XEXP (tem, 0), goal)
6232 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6233 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6235 && GET_CODE (SET_DEST (pat)) == REG
6236 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6237 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
6238 && GET_CODE (goal) == CONST_INT
6239 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
6241 && rtx_equal_p (goal, goaltry)
6242 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
6244 && (valueno = true_regnum (valtry)) >= 0)
6245 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6247 && GET_CODE (SET_DEST (pat)) == REG
6248 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6249 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
6250 && GET_CODE (goal) == CONST_INT
6251 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6253 && rtx_equal_p (goal, goaltry)
6255 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6256 && (valueno = true_regnum (valtry)) >= 0)))
6259 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
6260 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6270 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6271 (or copying VALUE into GOAL, if GOAL is also a register).
6272 Now verify that VALUE is really valid. */
6274 /* VALUENO is the register number of VALUE; a hard register. */
6276 /* Don't try to re-use something that is killed in this insn. We want
6277 to be able to trust REG_UNUSED notes. */
6278 if (find_reg_note (where, REG_UNUSED, value))
6281 /* If we propose to get the value from the stack pointer or if GOAL is
6282 a MEM based on the stack pointer, we need a stable SP. */
6283 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6284 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6288 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6289 if (GET_MODE (value) != mode)
6292 /* Reject VALUE if it was loaded from GOAL
6293 and is also a register that appears in the address of GOAL. */
6295 if (goal_mem && value == SET_DEST (single_set (where))
6296 && refers_to_regno_for_reload_p (valueno,
6298 + HARD_REGNO_NREGS (valueno, mode)),
6302 /* Reject registers that overlap GOAL. */
6304 if (!goal_mem && !goal_const
6305 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
6306 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
6309 /* Reject VALUE if it is one of the regs reserved for reloads.
6310 Reload1 knows how to reuse them anyway, and it would get
6311 confused if we allocated one without its knowledge.
6312 (Now that insns introduced by reload are ignored above,
6313 this case shouldn't happen, but I'm not positive.) */
6315 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
6316 && reload_reg_p[valueno] >= 0)
6319 /* On some machines, certain regs must always be rejected
6320 because they don't behave the way ordinary registers do. */
6322 #ifdef OVERLAPPING_REGNO_P
6323 if (OVERLAPPING_REGNO_P (valueno))
6327 nregs = HARD_REGNO_NREGS (regno, mode);
6328 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6330 /* Reject VALUE if it is a register being used for an input reload
6331 even if it is not one of those reserved. */
6333 if (reload_reg_p != 0)
6336 for (i = 0; i < n_reloads; i++)
6337 if (reload_reg_rtx[i] != 0 && reload_in[i])
6339 int regno1 = REGNO (reload_reg_rtx[i]);
6340 int nregs1 = HARD_REGNO_NREGS (regno1,
6341 GET_MODE (reload_reg_rtx[i]));
6342 if (regno1 < valueno + valuenregs
6343 && regno1 + nregs1 > valueno)
6349 /* We must treat frame pointer as varying here,
6350 since it can vary--in a nonlocal goto as generated by expand_goto. */
6351 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6353 /* Now verify that the values of GOAL and VALUE remain unaltered
6354 until INSN is reached. */
6363 /* Don't trust the conversion past a function call
6364 if either of the two is in a call-clobbered register, or memory. */
6365 if (GET_CODE (p) == CALL_INSN
6366 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6367 && call_used_regs[regno])
6369 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
6370 && call_used_regs[valueno])
6376 #ifdef NON_SAVING_SETJMP
6377 if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE
6378 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6382 #ifdef INSN_CLOBBERS_REGNO_P
6383 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
6384 && INSN_CLOBBERS_REGNO_P (p, valueno))
6385 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6386 && INSN_CLOBBERS_REGNO_P (p, regno)))
6390 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
6394 /* Watch out for unspec_volatile, and volatile asms. */
6395 if (volatile_insn_p (pat))
6398 /* If this insn P stores in either GOAL or VALUE, return 0.
6399 If GOAL is a memory ref and this insn writes memory, return 0.
6400 If GOAL is a memory ref and its address is not constant,
6401 and this insn P changes a register used in GOAL, return 0. */
6403 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6405 register rtx dest = SET_DEST (pat);
6406 while (GET_CODE (dest) == SUBREG
6407 || GET_CODE (dest) == ZERO_EXTRACT
6408 || GET_CODE (dest) == SIGN_EXTRACT
6409 || GET_CODE (dest) == STRICT_LOW_PART)
6410 dest = XEXP (dest, 0);
6411 if (GET_CODE (dest) == REG)
6413 register int xregno = REGNO (dest);
6415 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6416 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6419 if (xregno < regno + nregs && xregno + xnregs > regno)
6421 if (xregno < valueno + valuenregs
6422 && xregno + xnregs > valueno)
6424 if (goal_mem_addr_varies
6425 && reg_overlap_mentioned_for_reload_p (dest, goal))
6427 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6430 else if (goal_mem && GET_CODE (dest) == MEM
6431 && ! push_operand (dest, GET_MODE (dest)))
6433 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6434 && reg_equiv_memory_loc[regno] != 0)
6436 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6439 else if (GET_CODE (pat) == PARALLEL)
6442 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6444 register rtx v1 = XVECEXP (pat, 0, i);
6445 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6447 register rtx dest = SET_DEST (v1);
6448 while (GET_CODE (dest) == SUBREG
6449 || GET_CODE (dest) == ZERO_EXTRACT
6450 || GET_CODE (dest) == SIGN_EXTRACT
6451 || GET_CODE (dest) == STRICT_LOW_PART)
6452 dest = XEXP (dest, 0);
6453 if (GET_CODE (dest) == REG)
6455 register int xregno = REGNO (dest);
6457 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6458 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6461 if (xregno < regno + nregs
6462 && xregno + xnregs > regno)
6464 if (xregno < valueno + valuenregs
6465 && xregno + xnregs > valueno)
6467 if (goal_mem_addr_varies
6468 && reg_overlap_mentioned_for_reload_p (dest,
6471 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6474 else if (goal_mem && GET_CODE (dest) == MEM
6475 && ! push_operand (dest, GET_MODE (dest)))
6477 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6478 && reg_equiv_memory_loc[regno] != 0)
6480 else if (need_stable_sp
6481 && push_operand (dest, GET_MODE (dest)))
6487 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
6491 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6492 link = XEXP (link, 1))
6494 pat = XEXP (link, 0);
6495 if (GET_CODE (pat) == CLOBBER)
6497 register rtx dest = SET_DEST (pat);
6498 while (GET_CODE (dest) == SUBREG
6499 || GET_CODE (dest) == ZERO_EXTRACT
6500 || GET_CODE (dest) == SIGN_EXTRACT
6501 || GET_CODE (dest) == STRICT_LOW_PART)
6502 dest = XEXP (dest, 0);
6503 if (GET_CODE (dest) == REG)
6505 register int xregno = REGNO (dest);
6507 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6508 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6511 if (xregno < regno + nregs
6512 && xregno + xnregs > regno)
6514 if (xregno < valueno + valuenregs
6515 && xregno + xnregs > valueno)
6517 if (goal_mem_addr_varies
6518 && reg_overlap_mentioned_for_reload_p (dest,
6522 else if (goal_mem && GET_CODE (dest) == MEM
6523 && ! push_operand (dest, GET_MODE (dest)))
6525 else if (need_stable_sp
6526 && push_operand (dest, GET_MODE (dest)))
6533 /* If this insn auto-increments or auto-decrements
6534 either regno or valueno, return 0 now.
6535 If GOAL is a memory ref and its address is not constant,
6536 and this insn P increments a register used in GOAL, return 0. */
6540 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6541 if (REG_NOTE_KIND (link) == REG_INC
6542 && GET_CODE (XEXP (link, 0)) == REG)
6544 register int incno = REGNO (XEXP (link, 0));
6545 if (incno < regno + nregs && incno >= regno)
6547 if (incno < valueno + valuenregs && incno >= valueno)
6549 if (goal_mem_addr_varies
6550 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6560 /* Find a place where INCED appears in an increment or decrement operator
6561 within X, and return the amount INCED is incremented or decremented by.
6562 The value is always positive. */
6565 find_inc_amount (x, inced)
6568 register enum rtx_code code = GET_CODE (x);
6569 register const char *fmt;
6574 register rtx addr = XEXP (x, 0);
6575 if ((GET_CODE (addr) == PRE_DEC
6576 || GET_CODE (addr) == POST_DEC
6577 || GET_CODE (addr) == PRE_INC
6578 || GET_CODE (addr) == POST_INC)
6579 && XEXP (addr, 0) == inced)
6580 return GET_MODE_SIZE (GET_MODE (x));
6583 fmt = GET_RTX_FORMAT (code);
6584 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6588 register int tem = find_inc_amount (XEXP (x, i), inced);
6595 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6597 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6607 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6610 regno_clobbered_p (regno, insn)
6614 if (GET_CODE (PATTERN (insn)) == CLOBBER
6615 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6616 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
6618 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6620 int i = XVECLEN (PATTERN (insn), 0) - 1;
6624 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6625 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
6626 && REGNO (XEXP (elt, 0)) == regno)
6634 static const char *reload_when_needed_name[] =
6637 "RELOAD_FOR_OUTPUT",
6639 "RELOAD_FOR_INPUT_ADDRESS",
6640 "RELOAD_FOR_INPADDR_ADDRESS",
6641 "RELOAD_FOR_OUTPUT_ADDRESS",
6642 "RELOAD_FOR_OUTADDR_ADDRESS",
6643 "RELOAD_FOR_OPERAND_ADDRESS",
6644 "RELOAD_FOR_OPADDR_ADDR",
6646 "RELOAD_FOR_OTHER_ADDRESS"
6649 static const char * const reg_class_names[] = REG_CLASS_NAMES;
6651 /* These functions are used to print the variables set by 'find_reloads' */
6654 debug_reload_to_stream (f)
6662 for (r = 0; r < n_reloads; r++)
6664 fprintf (f, "Reload %d: ", r);
6666 if (reload_in[r] != 0)
6668 fprintf (f, "reload_in (%s) = ",
6669 GET_MODE_NAME (reload_inmode[r]));
6670 print_inline_rtx (f, reload_in[r], 24);
6671 fprintf (f, "\n\t");
6674 if (reload_out[r] != 0)
6676 fprintf (f, "reload_out (%s) = ",
6677 GET_MODE_NAME (reload_outmode[r]));
6678 print_inline_rtx (f, reload_out[r], 24);
6679 fprintf (f, "\n\t");
6682 fprintf (f, "%s, ", reg_class_names[(int) reload_reg_class[r]]);
6684 fprintf (f, "%s (opnum = %d)",
6685 reload_when_needed_name[(int) reload_when_needed[r]],
6688 if (reload_optional[r])
6689 fprintf (f, ", optional");
6691 if (reload_nongroup[r])
6692 fprintf (stderr, ", nongroup");
6694 if (reload_inc[r] != 0)
6695 fprintf (f, ", inc by %d", reload_inc[r]);
6697 if (reload_nocombine[r])
6698 fprintf (f, ", can't combine");
6700 if (reload_secondary_p[r])
6701 fprintf (f, ", secondary_reload_p");
6703 if (reload_in_reg[r] != 0)
6705 fprintf (f, "\n\treload_in_reg: ");
6706 print_inline_rtx (f, reload_in_reg[r], 24);
6709 if (reload_out_reg[r] != 0)
6711 fprintf (f, "\n\treload_out_reg: ");
6712 print_inline_rtx (f, reload_out_reg[r], 24);
6715 if (reload_reg_rtx[r] != 0)
6717 fprintf (f, "\n\treload_reg_rtx: ");
6718 print_inline_rtx (f, reload_reg_rtx[r], 24);
6722 if (reload_secondary_in_reload[r] != -1)
6724 fprintf (f, "%ssecondary_in_reload = %d",
6725 prefix, reload_secondary_in_reload[r]);
6729 if (reload_secondary_out_reload[r] != -1)
6730 fprintf (f, "%ssecondary_out_reload = %d\n",
6731 prefix, reload_secondary_out_reload[r]);
6734 if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
6736 fprintf (stderr, "%ssecondary_in_icode = %s", prefix,
6737 insn_data[reload_secondary_in_icode[r]].name);
6741 if (reload_secondary_out_icode[r] != CODE_FOR_nothing)
6742 fprintf (stderr, "%ssecondary_out_icode = %s", prefix,
6743 insn_data[reload_secondary_out_icode[r]].name);
6752 debug_reload_to_stream (stderr);
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