1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
93 #include "insn-config.h"
94 #include "insn-codes.h"
98 #include "hard-reg-set.h"
105 #ifndef REGISTER_MOVE_COST
106 #define REGISTER_MOVE_COST(x, y) 2
109 #ifndef REGNO_MODE_OK_FOR_BASE_P
110 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
113 #ifndef REG_MODE_OK_FOR_BASE_P
114 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
117 /* The variables set up by `find_reloads' are:
119 n_reloads number of distinct reloads needed; max reload # + 1
120 tables indexed by reload number
121 reload_in rtx for value to reload from
122 reload_out rtx for where to store reload-reg afterward if nec
123 (often the same as reload_in)
124 reload_reg_class enum reg_class, saying what regs to reload into
125 reload_inmode enum machine_mode; mode this operand should have
126 when reloaded, on input.
127 reload_outmode enum machine_mode; mode this operand should have
128 when reloaded, on output.
129 reload_optional char, nonzero for an optional reload.
130 Optional reloads are ignored unless the
131 value is already sitting in a register.
132 reload_nongroup char, nonzero when a reload must use a register
133 not already allocated to a group.
134 reload_inc int, positive amount to increment or decrement by if
135 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
136 Ignored otherwise (don't assume it is zero).
137 reload_in_reg rtx. A reg for which reload_in is the equivalent.
138 If reload_in is a symbol_ref which came from
139 reg_equiv_constant, then this is the pseudo
140 which has that symbol_ref as equivalent.
141 reload_reg_rtx rtx. This is the register to reload into.
142 If it is zero when `find_reloads' returns,
143 you must find a suitable register in the class
144 specified by reload_reg_class, and store here
145 an rtx for that register with mode from
146 reload_inmode or reload_outmode.
147 reload_nocombine char, nonzero if this reload shouldn't be
148 combined with another reload.
149 reload_opnum int, operand number being reloaded. This is
150 used to group related reloads and need not always
151 be equal to the actual operand number in the insn,
152 though it current will be; for in-out operands, it
153 is one of the two operand numbers.
154 reload_when_needed enum, classifies reload as needed either for
155 addressing an input reload, addressing an output,
156 for addressing a non-reloaded mem ref,
157 or for unspecified purposes (i.e., more than one
159 reload_secondary_p int, 1 if this is a secondary register for one
161 reload_secondary_in_reload
162 reload_secondary_out_reload
163 int, gives the reload number of a secondary
164 reload, when needed; otherwise -1
165 reload_secondary_in_icode
166 reload_secondary_out_icode
167 enum insn_code, if a secondary reload is required,
168 gives the INSN_CODE that uses the secondary
169 reload as a scratch register, or CODE_FOR_nothing
170 if the secondary reload register is to be an
171 intermediate register. */
174 rtx reload_in[MAX_RELOADS];
175 rtx reload_out[MAX_RELOADS];
176 enum reg_class reload_reg_class[MAX_RELOADS];
177 enum machine_mode reload_inmode[MAX_RELOADS];
178 enum machine_mode reload_outmode[MAX_RELOADS];
179 rtx reload_reg_rtx[MAX_RELOADS];
180 char reload_optional[MAX_RELOADS];
181 char reload_nongroup[MAX_RELOADS];
182 int reload_inc[MAX_RELOADS];
183 rtx reload_in_reg[MAX_RELOADS];
184 rtx reload_out_reg[MAX_RELOADS];
185 char reload_nocombine[MAX_RELOADS];
186 int reload_opnum[MAX_RELOADS];
187 enum reload_type reload_when_needed[MAX_RELOADS];
188 int reload_secondary_p[MAX_RELOADS];
189 int reload_secondary_in_reload[MAX_RELOADS];
190 int reload_secondary_out_reload[MAX_RELOADS];
191 enum insn_code reload_secondary_in_icode[MAX_RELOADS];
192 enum insn_code reload_secondary_out_icode[MAX_RELOADS];
194 /* All the "earlyclobber" operands of the current insn
195 are recorded here. */
197 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
199 int reload_n_operands;
201 /* Replacing reloads.
203 If `replace_reloads' is nonzero, then as each reload is recorded
204 an entry is made for it in the table `replacements'.
205 Then later `subst_reloads' can look through that table and
206 perform all the replacements needed. */
208 /* Nonzero means record the places to replace. */
209 static int replace_reloads;
211 /* Each replacement is recorded with a structure like this. */
214 rtx *where; /* Location to store in */
215 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
216 a SUBREG; 0 otherwise. */
217 int what; /* which reload this is for */
218 enum machine_mode mode; /* mode it must have */
221 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
223 /* Number of replacements currently recorded. */
224 static int n_replacements;
226 /* Used to track what is modified by an operand. */
229 int reg_flag; /* Nonzero if referencing a register. */
230 int safe; /* Nonzero if this can't conflict with anything. */
231 rtx base; /* Base address for MEM. */
232 HOST_WIDE_INT start; /* Starting offset or register number. */
233 HOST_WIDE_INT end; /* Ending offset or register number. */
236 #ifdef SECONDARY_MEMORY_NEEDED
238 /* Save MEMs needed to copy from one class of registers to another. One MEM
239 is used per mode, but normally only one or two modes are ever used.
241 We keep two versions, before and after register elimination. The one
242 after register elimination is record separately for each operand. This
243 is done in case the address is not valid to be sure that we separately
246 static rtx secondary_memlocs[NUM_MACHINE_MODES];
247 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
250 /* The instruction we are doing reloads for;
251 so we can test whether a register dies in it. */
252 static rtx this_insn;
254 /* Nonzero if this instruction is a user-specified asm with operands. */
255 static int this_insn_is_asm;
257 /* If hard_regs_live_known is nonzero,
258 we can tell which hard regs are currently live,
259 at least enough to succeed in choosing dummy reloads. */
260 static int hard_regs_live_known;
262 /* Indexed by hard reg number,
263 element is nonnegative if hard reg has been spilled.
264 This vector is passed to `find_reloads' as an argument
265 and is not changed here. */
266 static short *static_reload_reg_p;
268 /* Set to 1 in subst_reg_equivs if it changes anything. */
269 static int subst_reg_equivs_changed;
271 /* On return from push_reload, holds the reload-number for the OUT
272 operand, which can be different for that from the input operand. */
273 static int output_reloadnum;
275 /* Compare two RTX's. */
276 #define MATCHES(x, y) \
277 (x == y || (x != 0 && (GET_CODE (x) == REG \
278 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
279 : rtx_equal_p (x, y) && ! side_effects_p (x))))
281 /* Indicates if two reloads purposes are for similar enough things that we
282 can merge their reloads. */
283 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
284 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
285 || ((when1) == (when2) && (op1) == (op2)) \
286 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
287 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
288 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
289 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
290 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
292 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
293 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
294 ((when1) != (when2) \
295 || ! ((op1) == (op2) \
296 || (when1) == RELOAD_FOR_INPUT \
297 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
298 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
300 /* If we are going to reload an address, compute the reload type to
302 #define ADDR_TYPE(type) \
303 ((type) == RELOAD_FOR_INPUT_ADDRESS \
304 ? RELOAD_FOR_INPADDR_ADDRESS \
305 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
306 ? RELOAD_FOR_OUTADDR_ADDRESS \
309 #ifdef HAVE_SECONDARY_RELOADS
310 static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class,
311 enum machine_mode, enum reload_type,
314 static enum reg_class find_valid_class PROTO((enum machine_mode, int));
315 static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
316 enum machine_mode, enum machine_mode,
317 int, int, int, enum reload_type));
318 static void push_replacement PROTO((rtx *, int, enum machine_mode));
319 static void combine_reloads PROTO((void));
320 static int find_reusable_reload PROTO((rtx *, rtx, enum reg_class,
321 enum reload_type, int, int));
322 static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
323 enum machine_mode, enum machine_mode,
324 enum reg_class, int, int));
325 static int earlyclobber_operand_p PROTO((rtx));
326 static int hard_reg_set_here_p PROTO((int, int, rtx));
327 static struct decomposition decompose PROTO((rtx));
328 static int immune_p PROTO((rtx, rtx, struct decomposition));
329 static int alternative_allows_memconst PROTO((const char *, int));
330 static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int, rtx));
331 static rtx make_memloc PROTO((rtx, int));
332 static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
333 int, enum reload_type, int, rtx));
334 static rtx subst_reg_equivs PROTO((rtx, rtx));
335 static rtx subst_indexed_address PROTO((rtx));
336 static int find_reloads_address_1 PROTO((enum machine_mode, rtx, int, rtx *,
337 int, enum reload_type,int, rtx));
338 static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
339 enum machine_mode, int,
340 enum reload_type, int));
341 static rtx find_reloads_subreg_address PROTO((rtx, int, int, enum reload_type,
343 static int find_inc_amount PROTO((rtx, rtx));
344 static int loc_mentioned_in_p PROTO((rtx *, rtx));
346 #ifdef HAVE_SECONDARY_RELOADS
348 /* Determine if any secondary reloads are needed for loading (if IN_P is
349 non-zero) or storing (if IN_P is zero) X to or from a reload register of
350 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
351 are needed, push them.
353 Return the reload number of the secondary reload we made, or -1 if
354 we didn't need one. *PICODE is set to the insn_code to use if we do
355 need a secondary reload. */
358 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
364 enum reg_class reload_class;
365 enum machine_mode reload_mode;
366 enum reload_type type;
367 enum insn_code *picode;
369 enum reg_class class = NO_REGS;
370 enum machine_mode mode = reload_mode;
371 enum insn_code icode = CODE_FOR_nothing;
372 enum reg_class t_class = NO_REGS;
373 enum machine_mode t_mode = VOIDmode;
374 enum insn_code t_icode = CODE_FOR_nothing;
375 enum reload_type secondary_type;
376 int s_reload, t_reload = -1;
378 if (type == RELOAD_FOR_INPUT_ADDRESS
379 || type == RELOAD_FOR_OUTPUT_ADDRESS
380 || type == RELOAD_FOR_INPADDR_ADDRESS
381 || type == RELOAD_FOR_OUTADDR_ADDRESS)
382 secondary_type = type;
384 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
386 *picode = CODE_FOR_nothing;
388 /* If X is a paradoxical SUBREG, use the inner value to determine both the
389 mode and object being reloaded. */
390 if (GET_CODE (x) == SUBREG
391 && (GET_MODE_SIZE (GET_MODE (x))
392 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
395 reload_mode = GET_MODE (x);
398 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
399 is still a pseudo-register by now, it *must* have an equivalent MEM
400 but we don't want to assume that), use that equivalent when seeing if
401 a secondary reload is needed since whether or not a reload is needed
402 might be sensitive to the form of the MEM. */
404 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
405 && reg_equiv_mem[REGNO (x)] != 0)
406 x = reg_equiv_mem[REGNO (x)];
408 #ifdef SECONDARY_INPUT_RELOAD_CLASS
410 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
413 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
415 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
418 /* If we don't need any secondary registers, done. */
419 if (class == NO_REGS)
422 /* Get a possible insn to use. If the predicate doesn't accept X, don't
425 icode = (in_p ? reload_in_optab[(int) reload_mode]
426 : reload_out_optab[(int) reload_mode]);
428 if (icode != CODE_FOR_nothing
429 && insn_operand_predicate[(int) icode][in_p]
430 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
431 icode = CODE_FOR_nothing;
433 /* If we will be using an insn, see if it can directly handle the reload
434 register we will be using. If it can, the secondary reload is for a
435 scratch register. If it can't, we will use the secondary reload for
436 an intermediate register and require a tertiary reload for the scratch
439 if (icode != CODE_FOR_nothing)
441 /* If IN_P is non-zero, the reload register will be the output in
442 operand 0. If IN_P is zero, the reload register will be the input
443 in operand 1. Outputs should have an initial "=", which we must
446 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
447 enum reg_class insn_class
448 = (insn_letter == 'r' ? GENERAL_REGS
449 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter));
451 if (insn_class == NO_REGS
452 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
453 /* The scratch register's constraint must start with "=&". */
454 || insn_operand_constraint[(int) icode][2][0] != '='
455 || insn_operand_constraint[(int) icode][2][1] != '&')
458 if (reg_class_subset_p (reload_class, insn_class))
459 mode = insn_operand_mode[(int) icode][2];
462 char t_letter = insn_operand_constraint[(int) icode][2][2];
464 t_mode = insn_operand_mode[(int) icode][2];
465 t_class = (t_letter == 'r' ? GENERAL_REGS
466 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter));
468 icode = CODE_FOR_nothing;
472 /* This case isn't valid, so fail. Reload is allowed to use the same
473 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
474 in the case of a secondary register, we actually need two different
475 registers for correct code. We fail here to prevent the possibility of
476 silently generating incorrect code later.
478 The convention is that secondary input reloads are valid only if the
479 secondary_class is different from class. If you have such a case, you
480 can not use secondary reloads, you must work around the problem some
483 Allow this when MODE is not reload_mode and assume that the generated
484 code handles this case (it does on the Alpha, which is the only place
485 this currently happens). */
487 if (in_p && class == reload_class && mode == reload_mode)
490 /* If we need a tertiary reload, see if we have one we can reuse or else
493 if (t_class != NO_REGS)
495 for (t_reload = 0; t_reload < n_reloads; t_reload++)
496 if (reload_secondary_p[t_reload]
497 && (reg_class_subset_p (t_class, reload_reg_class[t_reload])
498 || reg_class_subset_p (reload_reg_class[t_reload], t_class))
499 && ((in_p && reload_inmode[t_reload] == t_mode)
500 || (! in_p && reload_outmode[t_reload] == t_mode))
501 && ((in_p && (reload_secondary_in_icode[t_reload]
502 == CODE_FOR_nothing))
503 || (! in_p &&(reload_secondary_out_icode[t_reload]
504 == CODE_FOR_nothing)))
505 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
506 && MERGABLE_RELOADS (secondary_type,
507 reload_when_needed[t_reload],
508 opnum, reload_opnum[t_reload]))
511 reload_inmode[t_reload] = t_mode;
513 reload_outmode[t_reload] = t_mode;
515 if (reg_class_subset_p (t_class, reload_reg_class[t_reload]))
516 reload_reg_class[t_reload] = t_class;
518 reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum);
519 reload_optional[t_reload] &= optional;
520 reload_secondary_p[t_reload] = 1;
521 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload],
522 opnum, reload_opnum[t_reload]))
523 reload_when_needed[t_reload] = RELOAD_OTHER;
526 if (t_reload == n_reloads)
528 /* We need to make a new tertiary reload for this register class. */
529 reload_in[t_reload] = reload_out[t_reload] = 0;
530 reload_reg_class[t_reload] = t_class;
531 reload_inmode[t_reload] = in_p ? t_mode : VOIDmode;
532 reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode;
533 reload_reg_rtx[t_reload] = 0;
534 reload_optional[t_reload] = optional;
535 reload_nongroup[t_reload] = 0;
536 reload_inc[t_reload] = 0;
537 /* Maybe we could combine these, but it seems too tricky. */
538 reload_nocombine[t_reload] = 1;
539 reload_in_reg[t_reload] = 0;
540 reload_out_reg[t_reload] = 0;
541 reload_opnum[t_reload] = opnum;
542 reload_when_needed[t_reload] = secondary_type;
543 reload_secondary_in_reload[t_reload] = -1;
544 reload_secondary_out_reload[t_reload] = -1;
545 reload_secondary_in_icode[t_reload] = CODE_FOR_nothing;
546 reload_secondary_out_icode[t_reload] = CODE_FOR_nothing;
547 reload_secondary_p[t_reload] = 1;
553 /* See if we can reuse an existing secondary reload. */
554 for (s_reload = 0; s_reload < n_reloads; s_reload++)
555 if (reload_secondary_p[s_reload]
556 && (reg_class_subset_p (class, reload_reg_class[s_reload])
557 || reg_class_subset_p (reload_reg_class[s_reload], class))
558 && ((in_p && reload_inmode[s_reload] == mode)
559 || (! in_p && reload_outmode[s_reload] == mode))
560 && ((in_p && reload_secondary_in_reload[s_reload] == t_reload)
561 || (! in_p && reload_secondary_out_reload[s_reload] == t_reload))
562 && ((in_p && reload_secondary_in_icode[s_reload] == t_icode)
563 || (! in_p && reload_secondary_out_icode[s_reload] == t_icode))
564 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
565 && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload],
566 opnum, reload_opnum[s_reload]))
569 reload_inmode[s_reload] = mode;
571 reload_outmode[s_reload] = mode;
573 if (reg_class_subset_p (class, reload_reg_class[s_reload]))
574 reload_reg_class[s_reload] = class;
576 reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum);
577 reload_optional[s_reload] &= optional;
578 reload_secondary_p[s_reload] = 1;
579 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload],
580 opnum, reload_opnum[s_reload]))
581 reload_when_needed[s_reload] = RELOAD_OTHER;
584 if (s_reload == n_reloads)
586 #ifdef SECONDARY_MEMORY_NEEDED
587 /* If we need a memory location to copy between the two reload regs,
588 set it up now. Note that we do the input case before making
589 the reload and the output case after. This is due to the
590 way reloads are output. */
592 if (in_p && icode == CODE_FOR_nothing
593 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
594 get_secondary_mem (x, reload_mode, opnum, type);
597 /* We need to make a new secondary reload for this register class. */
598 reload_in[s_reload] = reload_out[s_reload] = 0;
599 reload_reg_class[s_reload] = class;
601 reload_inmode[s_reload] = in_p ? mode : VOIDmode;
602 reload_outmode[s_reload] = ! in_p ? mode : VOIDmode;
603 reload_reg_rtx[s_reload] = 0;
604 reload_optional[s_reload] = optional;
605 reload_nongroup[s_reload] = 0;
606 reload_inc[s_reload] = 0;
607 /* Maybe we could combine these, but it seems too tricky. */
608 reload_nocombine[s_reload] = 1;
609 reload_in_reg[s_reload] = 0;
610 reload_out_reg[s_reload] = 0;
611 reload_opnum[s_reload] = opnum;
612 reload_when_needed[s_reload] = secondary_type;
613 reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1;
614 reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1;
615 reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing;
616 reload_secondary_out_icode[s_reload]
617 = ! in_p ? t_icode : CODE_FOR_nothing;
618 reload_secondary_p[s_reload] = 1;
622 #ifdef SECONDARY_MEMORY_NEEDED
623 if (! in_p && icode == CODE_FOR_nothing
624 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
625 get_secondary_mem (x, mode, opnum, type);
632 #endif /* HAVE_SECONDARY_RELOADS */
634 #ifdef SECONDARY_MEMORY_NEEDED
636 /* Return a memory location that will be used to copy X in mode MODE.
637 If we haven't already made a location for this mode in this insn,
638 call find_reloads_address on the location being returned. */
641 get_secondary_mem (x, mode, opnum, type)
643 enum machine_mode mode;
645 enum reload_type type;
650 /* By default, if MODE is narrower than a word, widen it to a word.
651 This is required because most machines that require these memory
652 locations do not support short load and stores from all registers
653 (e.g., FP registers). */
655 #ifdef SECONDARY_MEMORY_NEEDED_MODE
656 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
658 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
659 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
662 /* If we already have made a MEM for this operand in MODE, return it. */
663 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
664 return secondary_memlocs_elim[(int) mode][opnum];
666 /* If this is the first time we've tried to get a MEM for this mode,
667 allocate a new one. `something_changed' in reload will get set
668 by noticing that the frame size has changed. */
670 if (secondary_memlocs[(int) mode] == 0)
672 #ifdef SECONDARY_MEMORY_NEEDED_RTX
673 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
675 secondary_memlocs[(int) mode]
676 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
680 /* Get a version of the address doing any eliminations needed. If that
681 didn't give us a new MEM, make a new one if it isn't valid. */
683 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
684 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
686 if (! mem_valid && loc == secondary_memlocs[(int) mode])
687 loc = copy_rtx (loc);
689 /* The only time the call below will do anything is if the stack
690 offset is too large. In that case IND_LEVELS doesn't matter, so we
691 can just pass a zero. Adjust the type to be the address of the
692 corresponding object. If the address was valid, save the eliminated
693 address. If it wasn't valid, we need to make a reload each time, so
698 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
699 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
702 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
706 secondary_memlocs_elim[(int) mode][opnum] = loc;
710 /* Clear any secondary memory locations we've made. */
713 clear_secondary_mem ()
715 bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);
717 #endif /* SECONDARY_MEMORY_NEEDED */
719 /* Find the largest class for which every register number plus N is valid in
720 M1 (if in range). Abort if no such class exists. */
722 static enum reg_class
723 find_valid_class (m1, n)
724 enum machine_mode m1;
729 enum reg_class best_class;
732 for (class = 1; class < N_REG_CLASSES; class++)
735 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
736 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
737 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
738 && ! HARD_REGNO_MODE_OK (regno + n, m1))
741 if (! bad && reg_class_size[class] > best_size)
742 best_class = class, best_size = reg_class_size[class];
751 /* Return the number of a previously made reload that can be combined with
752 a new one, or n_reloads if none of the existing reloads can be used.
753 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
754 push_reload, they determine the kind of the new reload that we try to
755 combine. P_IN points to the corresponding value of IN, which can be
756 modified by this function.
757 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
759 find_reusable_reload (p_in, out, class, type, opnum, dont_share)
761 enum reg_class class;
762 enum reload_type type;
763 int opnum, dont_share;
767 /* We can't merge two reloads if the output of either one is
770 if (earlyclobber_operand_p (out))
773 /* We can use an existing reload if the class is right
774 and at least one of IN and OUT is a match
775 and the other is at worst neutral.
776 (A zero compared against anything is neutral.)
778 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
779 for the same thing since that can cause us to need more reload registers
780 than we otherwise would. */
782 for (i = 0; i < n_reloads; i++)
783 if ((reg_class_subset_p (class, reload_reg_class[i])
784 || reg_class_subset_p (reload_reg_class[i], class))
785 /* If the existing reload has a register, it must fit our class. */
786 && (reload_reg_rtx[i] == 0
787 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
788 true_regnum (reload_reg_rtx[i])))
789 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
790 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
792 (out != 0 && MATCHES (reload_out[i], out)
793 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
794 && (reload_out[i] == 0 || ! earlyclobber_operand_p (reload_out[i]))
795 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
796 && MERGABLE_RELOADS (type, reload_when_needed[i],
797 opnum, reload_opnum[i]))
800 /* Reloading a plain reg for input can match a reload to postincrement
801 that reg, since the postincrement's value is the right value.
802 Likewise, it can match a preincrement reload, since we regard
803 the preincrementation as happening before any ref in this insn
805 for (i = 0; i < n_reloads; i++)
806 if ((reg_class_subset_p (class, reload_reg_class[i])
807 || reg_class_subset_p (reload_reg_class[i], class))
808 /* If the existing reload has a register, it must fit our
810 && (reload_reg_rtx[i] == 0
811 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
812 true_regnum (reload_reg_rtx[i])))
813 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
814 && ((GET_CODE (in) == REG
815 && (GET_CODE (reload_in[i]) == POST_INC
816 || GET_CODE (reload_in[i]) == POST_DEC
817 || GET_CODE (reload_in[i]) == PRE_INC
818 || GET_CODE (reload_in[i]) == PRE_DEC)
819 && MATCHES (XEXP (reload_in[i], 0), in))
821 (GET_CODE (reload_in[i]) == REG
822 && (GET_CODE (in) == POST_INC
823 || GET_CODE (in) == POST_DEC
824 || GET_CODE (in) == PRE_INC
825 || GET_CODE (in) == PRE_DEC)
826 && MATCHES (XEXP (in, 0), reload_in[i])))
827 && (reload_out[i] == 0 || ! earlyclobber_operand_p (reload_out[i]))
828 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
829 && MERGABLE_RELOADS (type, reload_when_needed[i],
830 opnum, reload_opnum[i]))
832 /* Make sure reload_in ultimately has the increment,
833 not the plain register. */
834 if (GET_CODE (in) == REG)
835 *p_in = reload_in[i];
841 /* Record one reload that needs to be performed.
842 IN is an rtx saying where the data are to be found before this instruction.
843 OUT says where they must be stored after the instruction.
844 (IN is zero for data not read, and OUT is zero for data not written.)
845 INLOC and OUTLOC point to the places in the instructions where
846 IN and OUT were found.
847 If IN and OUT are both non-zero, it means the same register must be used
848 to reload both IN and OUT.
850 CLASS is a register class required for the reloaded data.
851 INMODE is the machine mode that the instruction requires
852 for the reg that replaces IN and OUTMODE is likewise for OUT.
854 If IN is zero, then OUT's location and mode should be passed as
857 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
859 OPTIONAL nonzero means this reload does not need to be performed:
860 it can be discarded if that is more convenient.
862 OPNUM and TYPE say what the purpose of this reload is.
864 The return value is the reload-number for this reload.
866 If both IN and OUT are nonzero, in some rare cases we might
867 want to make two separate reloads. (Actually we never do this now.)
868 Therefore, the reload-number for OUT is stored in
869 output_reloadnum when we return; the return value applies to IN.
870 Usually (presently always), when IN and OUT are nonzero,
871 the two reload-numbers are equal, but the caller should be careful to
875 push_reload (in, out, inloc, outloc, class,
876 inmode, outmode, strict_low, optional, opnum, type)
879 enum reg_class class;
880 enum machine_mode inmode, outmode;
884 enum reload_type type;
888 int dont_remove_subreg = 0;
889 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
890 int secondary_in_reload = -1, secondary_out_reload = -1;
891 enum insn_code secondary_in_icode = CODE_FOR_nothing;
892 enum insn_code secondary_out_icode = CODE_FOR_nothing;
894 /* INMODE and/or OUTMODE could be VOIDmode if no mode
895 has been specified for the operand. In that case,
896 use the operand's mode as the mode to reload. */
897 if (inmode == VOIDmode && in != 0)
898 inmode = GET_MODE (in);
899 if (outmode == VOIDmode && out != 0)
900 outmode = GET_MODE (out);
902 /* If IN is a pseudo register everywhere-equivalent to a constant, and
903 it is not in a hard register, reload straight from the constant,
904 since we want to get rid of such pseudo registers.
905 Often this is done earlier, but not always in find_reloads_address. */
906 if (in != 0 && GET_CODE (in) == REG)
908 register int regno = REGNO (in);
910 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
911 && reg_equiv_constant[regno] != 0)
912 in = reg_equiv_constant[regno];
915 /* Likewise for OUT. Of course, OUT will never be equivalent to
916 an actual constant, but it might be equivalent to a memory location
917 (in the case of a parameter). */
918 if (out != 0 && GET_CODE (out) == REG)
920 register int regno = REGNO (out);
922 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
923 && reg_equiv_constant[regno] != 0)
924 out = reg_equiv_constant[regno];
927 /* If we have a read-write operand with an address side-effect,
928 change either IN or OUT so the side-effect happens only once. */
929 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
931 if (GET_CODE (XEXP (in, 0)) == POST_INC
932 || GET_CODE (XEXP (in, 0)) == POST_DEC)
933 in = gen_rtx_MEM (GET_MODE (in), XEXP (XEXP (in, 0), 0));
934 if (GET_CODE (XEXP (in, 0)) == PRE_INC
935 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
936 out = gen_rtx_MEM (GET_MODE (out), XEXP (XEXP (out, 0), 0));
939 /* If we are reloading a (SUBREG constant ...), really reload just the
940 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
941 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
942 a pseudo and hence will become a MEM) with M1 wider than M2 and the
943 register is a pseudo, also reload the inside expression.
944 For machines that extend byte loads, do this for any SUBREG of a pseudo
945 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
946 M2 is an integral mode that gets extended when loaded.
947 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
948 either M1 is not valid for R or M2 is wider than a word but we only
949 need one word to store an M2-sized quantity in R.
950 (However, if OUT is nonzero, we need to reload the reg *and*
951 the subreg, so do nothing here, and let following statement handle it.)
953 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
954 we can't handle it here because CONST_INT does not indicate a mode.
956 Similarly, we must reload the inside expression if we have a
957 STRICT_LOW_PART (presumably, in == out in the cas).
959 Also reload the inner expression if it does not require a secondary
960 reload but the SUBREG does.
962 Finally, reload the inner expression if it is a register that is in
963 the class whose registers cannot be referenced in a different size
964 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
965 cannot reload just the inside since we might end up with the wrong
966 register class. But if it is inside a STRICT_LOW_PART, we have
967 no choice, so we hope we do get the right register class there. */
969 if (in != 0 && GET_CODE (in) == SUBREG
970 && (SUBREG_WORD (in) == 0 || strict_low)
971 #ifdef CLASS_CANNOT_CHANGE_SIZE
972 && class != CLASS_CANNOT_CHANGE_SIZE
974 && (CONSTANT_P (SUBREG_REG (in))
975 || GET_CODE (SUBREG_REG (in)) == PLUS
977 || (((GET_CODE (SUBREG_REG (in)) == REG
978 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
979 || GET_CODE (SUBREG_REG (in)) == MEM)
980 && ((GET_MODE_SIZE (inmode)
981 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
982 #ifdef LOAD_EXTEND_OP
983 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
984 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
986 && (GET_MODE_SIZE (inmode)
987 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
988 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
989 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
991 #ifdef WORD_REGISTER_OPERATIONS
992 || ((GET_MODE_SIZE (inmode)
993 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
994 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
995 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
999 || (GET_CODE (SUBREG_REG (in)) == REG
1000 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1001 /* The case where out is nonzero
1002 is handled differently in the following statement. */
1003 && (out == 0 || SUBREG_WORD (in) == 0)
1004 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1005 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1007 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1009 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1010 GET_MODE (SUBREG_REG (in)))))
1011 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
1012 + SUBREG_WORD (in)),
1014 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1015 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
1016 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1017 GET_MODE (SUBREG_REG (in)),
1021 #ifdef CLASS_CANNOT_CHANGE_SIZE
1022 || (GET_CODE (SUBREG_REG (in)) == REG
1023 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1024 && (TEST_HARD_REG_BIT
1025 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
1026 REGNO (SUBREG_REG (in))))
1027 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1028 != GET_MODE_SIZE (inmode)))
1032 in_subreg_loc = inloc;
1033 inloc = &SUBREG_REG (in);
1035 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1036 if (GET_CODE (in) == MEM)
1037 /* This is supposed to happen only for paradoxical subregs made by
1038 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1039 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
1042 inmode = GET_MODE (in);
1045 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1046 either M1 is not valid for R or M2 is wider than a word but we only
1047 need one word to store an M2-sized quantity in R.
1049 However, we must reload the inner reg *as well as* the subreg in
1052 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1053 code above. This can happen if SUBREG_WORD != 0. */
1055 if (in != 0 && GET_CODE (in) == SUBREG
1056 && (CONSTANT_P (SUBREG_REG (in))
1057 || (GET_CODE (SUBREG_REG (in)) == REG
1058 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1059 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in))
1062 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1063 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1065 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1067 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1068 GET_MODE (SUBREG_REG (in)))))))))
1070 /* This relies on the fact that emit_reload_insns outputs the
1071 instructions for input reloads of type RELOAD_OTHER in the same
1072 order as the reloads. Thus if the outer reload is also of type
1073 RELOAD_OTHER, we are guaranteed that this inner reload will be
1074 output before the outer reload. */
1075 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
1076 find_valid_class (inmode, SUBREG_WORD (in)),
1077 VOIDmode, VOIDmode, 0, 0, opnum, type);
1078 dont_remove_subreg = 1;
1081 /* Similarly for paradoxical and problematical SUBREGs on the output.
1082 Note that there is no reason we need worry about the previous value
1083 of SUBREG_REG (out); even if wider than out,
1084 storing in a subreg is entitled to clobber it all
1085 (except in the case of STRICT_LOW_PART,
1086 and in that case the constraint should label it input-output.) */
1087 if (out != 0 && GET_CODE (out) == SUBREG
1088 && (SUBREG_WORD (out) == 0 || strict_low)
1089 #ifdef CLASS_CANNOT_CHANGE_SIZE
1090 && class != CLASS_CANNOT_CHANGE_SIZE
1092 && (CONSTANT_P (SUBREG_REG (out))
1094 || (((GET_CODE (SUBREG_REG (out)) == REG
1095 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1096 || GET_CODE (SUBREG_REG (out)) == MEM)
1097 && ((GET_MODE_SIZE (outmode)
1098 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1099 #ifdef WORD_REGISTER_OPERATIONS
1100 || ((GET_MODE_SIZE (outmode)
1101 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1102 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1103 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1107 || (GET_CODE (SUBREG_REG (out)) == REG
1108 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1109 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1110 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1112 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1114 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1115 GET_MODE (SUBREG_REG (out)))))
1116 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
1117 + SUBREG_WORD (out)),
1119 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1120 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1121 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1122 GET_MODE (SUBREG_REG (out)),
1126 #ifdef CLASS_CANNOT_CHANGE_SIZE
1127 || (GET_CODE (SUBREG_REG (out)) == REG
1128 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1129 && (TEST_HARD_REG_BIT
1130 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
1131 REGNO (SUBREG_REG (out))))
1132 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1133 != GET_MODE_SIZE (outmode)))
1137 out_subreg_loc = outloc;
1138 outloc = &SUBREG_REG (out);
1140 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1141 if (GET_CODE (out) == MEM
1142 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1145 outmode = GET_MODE (out);
1148 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1149 either M1 is not valid for R or M2 is wider than a word but we only
1150 need one word to store an M2-sized quantity in R.
1152 However, we must reload the inner reg *as well as* the subreg in
1153 that case. In this case, the inner reg is an in-out reload. */
1155 if (out != 0 && GET_CODE (out) == SUBREG
1156 && GET_CODE (SUBREG_REG (out)) == REG
1157 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1158 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)) + SUBREG_WORD (out),
1160 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1161 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1163 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1165 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1166 GET_MODE (SUBREG_REG (out)))))))
1168 /* This relies on the fact that emit_reload_insns outputs the
1169 instructions for output reloads of type RELOAD_OTHER in reverse
1170 order of the reloads. Thus if the outer reload is also of type
1171 RELOAD_OTHER, we are guaranteed that this inner reload will be
1172 output after the outer reload. */
1173 dont_remove_subreg = 1;
1174 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1176 find_valid_class (outmode, SUBREG_WORD (out)),
1177 VOIDmode, VOIDmode, 0, 0,
1178 opnum, RELOAD_OTHER);
1181 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1182 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1183 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1184 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1187 /* If IN is a SUBREG of a hard register, make a new REG. This
1188 simplifies some of the cases below. */
1190 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1191 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1192 && ! dont_remove_subreg)
1193 in = gen_rtx_REG (GET_MODE (in),
1194 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
1196 /* Similarly for OUT. */
1197 if (out != 0 && GET_CODE (out) == SUBREG
1198 && GET_CODE (SUBREG_REG (out)) == REG
1199 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1200 && ! dont_remove_subreg)
1201 out = gen_rtx_REG (GET_MODE (out),
1202 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
1204 /* Narrow down the class of register wanted if that is
1205 desirable on this machine for efficiency. */
1207 class = PREFERRED_RELOAD_CLASS (in, class);
1209 /* Output reloads may need analogous treatment, different in detail. */
1210 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1212 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1215 /* Make sure we use a class that can handle the actual pseudo
1216 inside any subreg. For example, on the 386, QImode regs
1217 can appear within SImode subregs. Although GENERAL_REGS
1218 can handle SImode, QImode needs a smaller class. */
1219 #ifdef LIMIT_RELOAD_CLASS
1221 class = LIMIT_RELOAD_CLASS (inmode, class);
1222 else if (in != 0 && GET_CODE (in) == SUBREG)
1223 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1226 class = LIMIT_RELOAD_CLASS (outmode, class);
1227 if (out != 0 && GET_CODE (out) == SUBREG)
1228 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1231 /* Verify that this class is at least possible for the mode that
1233 if (this_insn_is_asm)
1235 enum machine_mode mode;
1236 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1240 if (mode == VOIDmode)
1242 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1247 outmode = word_mode;
1249 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1250 if (HARD_REGNO_MODE_OK (i, mode)
1251 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1253 int nregs = HARD_REGNO_NREGS (i, mode);
1256 for (j = 1; j < nregs; j++)
1257 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1262 if (i == FIRST_PSEUDO_REGISTER)
1264 error_for_asm (this_insn, "impossible register constraint in `asm'");
1269 /* Optional output reloads are always OK even if we have no register class,
1270 since the function of these reloads is only to have spill_reg_store etc.
1271 set, so that the storing insn can be deleted later. */
1272 if (class == NO_REGS
1273 && (optional == 0 || type != RELOAD_FOR_OUTPUT))
1276 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1280 /* See if we need a secondary reload register to move between CLASS
1281 and IN or CLASS and OUT. Get the icode and push any required reloads
1282 needed for each of them if so. */
1284 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1287 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1288 &secondary_in_icode);
1291 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1292 if (out != 0 && GET_CODE (out) != SCRATCH)
1293 secondary_out_reload
1294 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1295 type, &secondary_out_icode);
1298 /* We found no existing reload suitable for re-use.
1299 So add an additional reload. */
1301 #ifdef SECONDARY_MEMORY_NEEDED
1302 /* If a memory location is needed for the copy, make one. */
1303 if (in != 0 && GET_CODE (in) == REG
1304 && REGNO (in) < FIRST_PSEUDO_REGISTER
1305 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1307 get_secondary_mem (in, inmode, opnum, type);
1312 reload_out[i] = out;
1313 reload_reg_class[i] = class;
1314 reload_inmode[i] = inmode;
1315 reload_outmode[i] = outmode;
1316 reload_reg_rtx[i] = 0;
1317 reload_optional[i] = optional;
1318 reload_nongroup[i] = 0;
1320 reload_nocombine[i] = 0;
1321 reload_in_reg[i] = inloc ? *inloc : 0;
1322 reload_out_reg[i] = outloc ? *outloc : 0;
1323 reload_opnum[i] = opnum;
1324 reload_when_needed[i] = type;
1325 reload_secondary_in_reload[i] = secondary_in_reload;
1326 reload_secondary_out_reload[i] = secondary_out_reload;
1327 reload_secondary_in_icode[i] = secondary_in_icode;
1328 reload_secondary_out_icode[i] = secondary_out_icode;
1329 reload_secondary_p[i] = 0;
1333 #ifdef SECONDARY_MEMORY_NEEDED
1334 if (out != 0 && GET_CODE (out) == REG
1335 && REGNO (out) < FIRST_PSEUDO_REGISTER
1336 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1338 get_secondary_mem (out, outmode, opnum, type);
1343 /* We are reusing an existing reload,
1344 but we may have additional information for it.
1345 For example, we may now have both IN and OUT
1346 while the old one may have just one of them. */
1348 /* The modes can be different. If they are, we want to reload in
1349 the larger mode, so that the value is valid for both modes. */
1350 if (inmode != VOIDmode
1351 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (reload_inmode[i]))
1352 reload_inmode[i] = inmode;
1353 if (outmode != VOIDmode
1354 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (reload_outmode[i]))
1355 reload_outmode[i] = outmode;
1358 rtx in_reg = inloc ? *inloc : 0;
1359 /* If we merge reloads for two distinct rtl expressions that
1360 are identical in content, there might be duplicate address
1361 reloads. Remove the extra set now, so that if we later find
1362 that we can inherit this reload, we can get rid of the
1363 address reloads altogether. */
1364 if (reload_in[i] != in && rtx_equal_p (in, reload_in[i]))
1366 /* We must keep the address reload with the lower operand
1368 if (opnum > reload_opnum[i])
1370 remove_address_replacements (in);
1372 in_reg = reload_in_reg[i];
1375 remove_address_replacements (reload_in[i]);
1378 reload_in_reg[i] = in_reg;
1382 reload_out[i] = out;
1383 reload_out_reg[i] = outloc ? *outloc : 0;
1385 if (reg_class_subset_p (class, reload_reg_class[i]))
1386 reload_reg_class[i] = class;
1387 reload_optional[i] &= optional;
1388 if (MERGE_TO_OTHER (type, reload_when_needed[i],
1389 opnum, reload_opnum[i]))
1390 reload_when_needed[i] = RELOAD_OTHER;
1391 reload_opnum[i] = MIN (reload_opnum[i], opnum);
1394 /* If the ostensible rtx being reload differs from the rtx found
1395 in the location to substitute, this reload is not safe to combine
1396 because we cannot reliably tell whether it appears in the insn. */
1398 if (in != 0 && in != *inloc)
1399 reload_nocombine[i] = 1;
1402 /* This was replaced by changes in find_reloads_address_1 and the new
1403 function inc_for_reload, which go with a new meaning of reload_inc. */
1405 /* If this is an IN/OUT reload in an insn that sets the CC,
1406 it must be for an autoincrement. It doesn't work to store
1407 the incremented value after the insn because that would clobber the CC.
1408 So we must do the increment of the value reloaded from,
1409 increment it, store it back, then decrement again. */
1410 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1414 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1415 /* If we did not find a nonzero amount-to-increment-by,
1416 that contradicts the belief that IN is being incremented
1417 in an address in this insn. */
1418 if (reload_inc[i] == 0)
1423 /* If we will replace IN and OUT with the reload-reg,
1424 record where they are located so that substitution need
1425 not do a tree walk. */
1427 if (replace_reloads)
1431 register struct replacement *r = &replacements[n_replacements++];
1433 r->subreg_loc = in_subreg_loc;
1437 if (outloc != 0 && outloc != inloc)
1439 register struct replacement *r = &replacements[n_replacements++];
1442 r->subreg_loc = out_subreg_loc;
1447 /* If this reload is just being introduced and it has both
1448 an incoming quantity and an outgoing quantity that are
1449 supposed to be made to match, see if either one of the two
1450 can serve as the place to reload into.
1452 If one of them is acceptable, set reload_reg_rtx[i]
1455 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1457 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1459 reload_reg_class[i], i,
1460 earlyclobber_operand_p (out));
1462 /* If the outgoing register already contains the same value
1463 as the incoming one, we can dispense with loading it.
1464 The easiest way to tell the caller that is to give a phony
1465 value for the incoming operand (same as outgoing one). */
1466 if (reload_reg_rtx[i] == out
1467 && (GET_CODE (in) == REG || CONSTANT_P (in))
1468 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1469 static_reload_reg_p, i, inmode))
1473 /* If this is an input reload and the operand contains a register that
1474 dies in this insn and is used nowhere else, see if it is the right class
1475 to be used for this reload. Use it if so. (This occurs most commonly
1476 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1477 this if it is also an output reload that mentions the register unless
1478 the output is a SUBREG that clobbers an entire register.
1480 Note that the operand might be one of the spill regs, if it is a
1481 pseudo reg and we are in a block where spilling has not taken place.
1482 But if there is no spilling in this block, that is OK.
1483 An explicitly used hard reg cannot be a spill reg. */
1485 if (reload_reg_rtx[i] == 0 && in != 0)
1490 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1491 if (REG_NOTE_KIND (note) == REG_DEAD
1492 && GET_CODE (XEXP (note, 0)) == REG
1493 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1494 && reg_mentioned_p (XEXP (note, 0), in)
1495 && ! refers_to_regno_for_reload_p (regno,
1497 + HARD_REGNO_NREGS (regno,
1499 PATTERN (this_insn), inloc)
1500 /* If this is also an output reload, IN cannot be used as
1501 the reload register if it is set in this insn unless IN
1503 && (out == 0 || in == out
1504 || ! hard_reg_set_here_p (regno,
1506 + HARD_REGNO_NREGS (regno,
1508 PATTERN (this_insn)))
1509 /* ??? Why is this code so different from the previous?
1510 Is there any simple coherent way to describe the two together?
1511 What's going on here. */
1513 || (GET_CODE (in) == SUBREG
1514 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1516 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1517 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1518 /* Make sure the operand fits in the reg that dies. */
1519 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1520 && HARD_REGNO_MODE_OK (regno, inmode)
1521 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1522 && HARD_REGNO_MODE_OK (regno, outmode)
1523 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1524 && !fixed_regs[regno])
1526 reload_reg_rtx[i] = gen_rtx_REG (inmode, regno);
1532 output_reloadnum = i;
1537 /* Record an additional place we must replace a value
1538 for which we have already recorded a reload.
1539 RELOADNUM is the value returned by push_reload
1540 when the reload was recorded.
1541 This is used in insn patterns that use match_dup. */
1544 push_replacement (loc, reloadnum, mode)
1547 enum machine_mode mode;
1549 if (replace_reloads)
1551 register struct replacement *r = &replacements[n_replacements++];
1552 r->what = reloadnum;
1559 /* Transfer all replacements that used to be in reload FROM to be in
1563 transfer_replacements (to, from)
1568 for (i = 0; i < n_replacements; i++)
1569 if (replacements[i].what == from)
1570 replacements[i].what = to;
1573 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1574 or a subpart of it. If we have any replacements registered for IN_RTX,
1575 cancel the reloads that were supposed to load them.
1576 Return non-zero if we canceled any reloads. */
1578 remove_address_replacements (in_rtx)
1582 char reload_flags[MAX_RELOADS];
1583 int something_changed = 0;
1585 bzero (reload_flags, sizeof reload_flags);
1586 for (i = 0, j = 0; i < n_replacements; i++)
1588 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1589 reload_flags[replacements[i].what] |= 1;
1592 replacements[j++] = replacements[i];
1593 reload_flags[replacements[i].what] |= 2;
1596 /* Note that the following store must be done before the recursive calls. */
1599 for (i = n_reloads - 1; i >= 0; i--)
1601 if (reload_flags[i] == 1)
1603 deallocate_reload_reg (i);
1604 remove_address_replacements (reload_in[i]);
1606 something_changed = 1;
1609 return something_changed;
1612 /* Return non-zero if IN contains a piece of rtl that has the address LOC */
1614 loc_mentioned_in_p (loc, in)
1617 enum rtx_code code = GET_CODE (in);
1618 char *fmt = GET_RTX_FORMAT (code);
1621 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1623 if (loc == &XEXP (in, i))
1627 if (loc_mentioned_in_p (loc, XEXP (in, i)))
1630 else if (fmt[i] == 'E')
1631 for (j = XVECLEN (in, i) - 1; i >= 0; i--)
1632 if (loc_mentioned_in_p (loc, XVECEXP (in, i, j)))
1638 /* If there is only one output reload, and it is not for an earlyclobber
1639 operand, try to combine it with a (logically unrelated) input reload
1640 to reduce the number of reload registers needed.
1642 This is safe if the input reload does not appear in
1643 the value being output-reloaded, because this implies
1644 it is not needed any more once the original insn completes.
1646 If that doesn't work, see we can use any of the registers that
1647 die in this insn as a reload register. We can if it is of the right
1648 class and does not appear in the value being output-reloaded. */
1654 int output_reload = -1;
1655 int secondary_out = -1;
1658 /* Find the output reload; return unless there is exactly one
1659 and that one is mandatory. */
1661 for (i = 0; i < n_reloads; i++)
1662 if (reload_out[i] != 0)
1664 if (output_reload >= 0)
1669 if (output_reload < 0 || reload_optional[output_reload])
1672 /* An input-output reload isn't combinable. */
1674 if (reload_in[output_reload] != 0)
1677 /* If this reload is for an earlyclobber operand, we can't do anything. */
1678 if (earlyclobber_operand_p (reload_out[output_reload]))
1681 /* Check each input reload; can we combine it? */
1683 for (i = 0; i < n_reloads; i++)
1684 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1685 /* Life span of this reload must not extend past main insn. */
1686 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
1687 && reload_when_needed[i] != RELOAD_FOR_OUTADDR_ADDRESS
1688 && reload_when_needed[i] != RELOAD_OTHER
1689 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
1690 == CLASS_MAX_NREGS (reload_reg_class[output_reload],
1691 reload_outmode[output_reload]))
1692 && reload_inc[i] == 0
1693 && reload_reg_rtx[i] == 0
1694 #ifdef SECONDARY_MEMORY_NEEDED
1695 /* Don't combine two reloads with different secondary
1696 memory locations. */
1697 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
1698 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
1699 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
1700 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
1702 && (SMALL_REGISTER_CLASSES
1703 ? (reload_reg_class[i] == reload_reg_class[output_reload])
1704 : (reg_class_subset_p (reload_reg_class[i],
1705 reload_reg_class[output_reload])
1706 || reg_class_subset_p (reload_reg_class[output_reload],
1707 reload_reg_class[i])))
1708 && (MATCHES (reload_in[i], reload_out[output_reload])
1709 /* Args reversed because the first arg seems to be
1710 the one that we imagine being modified
1711 while the second is the one that might be affected. */
1712 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1714 /* However, if the input is a register that appears inside
1715 the output, then we also can't share.
1716 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1717 If the same reload reg is used for both reg 69 and the
1718 result to be stored in memory, then that result
1719 will clobber the address of the memory ref. */
1720 && ! (GET_CODE (reload_in[i]) == REG
1721 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1722 reload_out[output_reload]))))
1723 && (reg_class_size[(int) reload_reg_class[i]]
1724 || SMALL_REGISTER_CLASSES)
1725 /* We will allow making things slightly worse by combining an
1726 input and an output, but no worse than that. */
1727 && (reload_when_needed[i] == RELOAD_FOR_INPUT
1728 || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
1732 /* We have found a reload to combine with! */
1733 reload_out[i] = reload_out[output_reload];
1734 reload_out_reg[i] = reload_out_reg[output_reload];
1735 reload_outmode[i] = reload_outmode[output_reload];
1736 /* Mark the old output reload as inoperative. */
1737 reload_out[output_reload] = 0;
1738 /* The combined reload is needed for the entire insn. */
1739 reload_when_needed[i] = RELOAD_OTHER;
1740 /* If the output reload had a secondary reload, copy it. */
1741 if (reload_secondary_out_reload[output_reload] != -1)
1743 reload_secondary_out_reload[i]
1744 = reload_secondary_out_reload[output_reload];
1745 reload_secondary_out_icode[i]
1746 = reload_secondary_out_icode[output_reload];
1749 #ifdef SECONDARY_MEMORY_NEEDED
1750 /* Copy any secondary MEM. */
1751 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
1752 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
1753 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
1755 /* If required, minimize the register class. */
1756 if (reg_class_subset_p (reload_reg_class[output_reload],
1757 reload_reg_class[i]))
1758 reload_reg_class[i] = reload_reg_class[output_reload];
1760 /* Transfer all replacements from the old reload to the combined. */
1761 for (j = 0; j < n_replacements; j++)
1762 if (replacements[j].what == output_reload)
1763 replacements[j].what = i;
1768 /* If this insn has only one operand that is modified or written (assumed
1769 to be the first), it must be the one corresponding to this reload. It
1770 is safe to use anything that dies in this insn for that output provided
1771 that it does not occur in the output (we already know it isn't an
1772 earlyclobber. If this is an asm insn, give up. */
1774 if (INSN_CODE (this_insn) == -1)
1777 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1778 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1779 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1782 /* See if some hard register that dies in this insn and is not used in
1783 the output is the right class. Only works if the register we pick
1784 up can fully hold our output reload. */
1785 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1786 if (REG_NOTE_KIND (note) == REG_DEAD
1787 && GET_CODE (XEXP (note, 0)) == REG
1788 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1789 reload_out[output_reload])
1790 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1791 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1792 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1793 REGNO (XEXP (note, 0)))
1794 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1795 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1796 /* Ensure that a secondary or tertiary reload for this output
1797 won't want this register. */
1798 && ((secondary_out = reload_secondary_out_reload[output_reload]) == -1
1799 || (! (TEST_HARD_REG_BIT
1800 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1801 REGNO (XEXP (note, 0))))
1802 && ((secondary_out = reload_secondary_out_reload[secondary_out]) == -1
1803 || ! (TEST_HARD_REG_BIT
1804 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1805 REGNO (XEXP (note, 0)))))))
1806 && ! fixed_regs[REGNO (XEXP (note, 0))])
1808 reload_reg_rtx[output_reload]
1809 = gen_rtx_REG (reload_outmode[output_reload],
1810 REGNO (XEXP (note, 0)));
1815 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1816 See if one of IN and OUT is a register that may be used;
1817 this is desirable since a spill-register won't be needed.
1818 If so, return the register rtx that proves acceptable.
1820 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1821 CLASS is the register class required for the reload.
1823 If FOR_REAL is >= 0, it is the number of the reload,
1824 and in some cases when it can be discovered that OUT doesn't need
1825 to be computed, clear out reload_out[FOR_REAL].
1827 If FOR_REAL is -1, this should not be done, because this call
1828 is just to see if a register can be found, not to find and install it.
1830 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1831 puts an additional constraint on being able to use IN for OUT since
1832 IN must not appear elsewhere in the insn (it is assumed that IN itself
1833 is safe from the earlyclobber). */
1836 find_dummy_reload (real_in, real_out, inloc, outloc,
1837 inmode, outmode, class, for_real, earlyclobber)
1838 rtx real_in, real_out;
1839 rtx *inloc, *outloc;
1840 enum machine_mode inmode, outmode;
1841 enum reg_class class;
1851 /* If operands exceed a word, we can't use either of them
1852 unless they have the same size. */
1853 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1854 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1855 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1858 /* Find the inside of any subregs. */
1859 while (GET_CODE (out) == SUBREG)
1861 out_offset = SUBREG_WORD (out);
1862 out = SUBREG_REG (out);
1864 while (GET_CODE (in) == SUBREG)
1866 in_offset = SUBREG_WORD (in);
1867 in = SUBREG_REG (in);
1870 /* Narrow down the reg class, the same way push_reload will;
1871 otherwise we might find a dummy now, but push_reload won't. */
1872 class = PREFERRED_RELOAD_CLASS (in, class);
1874 /* See if OUT will do. */
1875 if (GET_CODE (out) == REG
1876 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1878 register int regno = REGNO (out) + out_offset;
1879 int nwords = HARD_REGNO_NREGS (regno, outmode);
1882 /* When we consider whether the insn uses OUT,
1883 ignore references within IN. They don't prevent us
1884 from copying IN into OUT, because those refs would
1885 move into the insn that reloads IN.
1887 However, we only ignore IN in its role as this reload.
1888 If the insn uses IN elsewhere and it contains OUT,
1889 that counts. We can't be sure it's the "same" operand
1890 so it might not go through this reload. */
1892 *inloc = const0_rtx;
1894 if (regno < FIRST_PSEUDO_REGISTER
1895 /* A fixed reg that can overlap other regs better not be used
1896 for reloading in any way. */
1897 #ifdef OVERLAPPING_REGNO_P
1898 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1900 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1901 PATTERN (this_insn), outloc))
1904 for (i = 0; i < nwords; i++)
1905 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1911 if (GET_CODE (real_out) == REG)
1914 value = gen_rtx_REG (outmode, regno);
1921 /* Consider using IN if OUT was not acceptable
1922 or if OUT dies in this insn (like the quotient in a divmod insn).
1923 We can't use IN unless it is dies in this insn,
1924 which means we must know accurately which hard regs are live.
1925 Also, the result can't go in IN if IN is used within OUT,
1926 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1927 if (hard_regs_live_known
1928 && GET_CODE (in) == REG
1929 && REGNO (in) < FIRST_PSEUDO_REGISTER
1931 || find_reg_note (this_insn, REG_UNUSED, real_out))
1932 && find_reg_note (this_insn, REG_DEAD, real_in)
1933 && !fixed_regs[REGNO (in)]
1934 && HARD_REGNO_MODE_OK (REGNO (in),
1935 /* The only case where out and real_out might
1936 have different modes is where real_out
1937 is a subreg, and in that case, out
1939 (GET_MODE (out) != VOIDmode
1940 ? GET_MODE (out) : outmode)))
1942 register int regno = REGNO (in) + in_offset;
1943 int nwords = HARD_REGNO_NREGS (regno, inmode);
1945 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1946 && ! hard_reg_set_here_p (regno, regno + nwords,
1947 PATTERN (this_insn))
1949 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1950 PATTERN (this_insn), inloc)))
1953 for (i = 0; i < nwords; i++)
1954 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1960 /* If we were going to use OUT as the reload reg
1961 and changed our mind, it means OUT is a dummy that
1962 dies here. So don't bother copying value to it. */
1963 if (for_real >= 0 && value == real_out)
1964 reload_out[for_real] = 0;
1965 if (GET_CODE (real_in) == REG)
1968 value = gen_rtx_REG (inmode, regno);
1976 /* This page contains subroutines used mainly for determining
1977 whether the IN or an OUT of a reload can serve as the
1980 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1983 earlyclobber_operand_p (x)
1988 for (i = 0; i < n_earlyclobbers; i++)
1989 if (reload_earlyclobbers[i] == x)
1995 /* Return 1 if expression X alters a hard reg in the range
1996 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1997 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1998 X should be the body of an instruction. */
2001 hard_reg_set_here_p (beg_regno, end_regno, x)
2002 register int beg_regno, end_regno;
2005 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2007 register rtx op0 = SET_DEST (x);
2008 while (GET_CODE (op0) == SUBREG)
2009 op0 = SUBREG_REG (op0);
2010 if (GET_CODE (op0) == REG)
2012 register int r = REGNO (op0);
2013 /* See if this reg overlaps range under consideration. */
2015 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
2019 else if (GET_CODE (x) == PARALLEL)
2021 register int i = XVECLEN (x, 0) - 1;
2023 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2030 /* Return 1 if ADDR is a valid memory address for mode MODE,
2031 and check that each pseudo reg has the proper kind of
2035 strict_memory_address_p (mode, addr)
2036 enum machine_mode mode;
2039 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2046 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2047 if they are the same hard reg, and has special hacks for
2048 autoincrement and autodecrement.
2049 This is specifically intended for find_reloads to use
2050 in determining whether two operands match.
2051 X is the operand whose number is the lower of the two.
2053 The value is 2 if Y contains a pre-increment that matches
2054 a non-incrementing address in X. */
2056 /* ??? To be completely correct, we should arrange to pass
2057 for X the output operand and for Y the input operand.
2058 For now, we assume that the output operand has the lower number
2059 because that is natural in (SET output (... input ...)). */
2062 operands_match_p (x, y)
2066 register RTX_CODE code = GET_CODE (x);
2072 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2073 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2074 && GET_CODE (SUBREG_REG (y)) == REG)))
2080 i = REGNO (SUBREG_REG (x));
2081 if (i >= FIRST_PSEUDO_REGISTER)
2083 i += SUBREG_WORD (x);
2088 if (GET_CODE (y) == SUBREG)
2090 j = REGNO (SUBREG_REG (y));
2091 if (j >= FIRST_PSEUDO_REGISTER)
2093 j += SUBREG_WORD (y);
2098 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2099 multiple hard register group, so that for example (reg:DI 0) and
2100 (reg:SI 1) will be considered the same register. */
2101 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2102 && i < FIRST_PSEUDO_REGISTER)
2103 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
2104 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2105 && j < FIRST_PSEUDO_REGISTER)
2106 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
2110 /* If two operands must match, because they are really a single
2111 operand of an assembler insn, then two postincrements are invalid
2112 because the assembler insn would increment only once.
2113 On the other hand, an postincrement matches ordinary indexing
2114 if the postincrement is the output operand. */
2115 if (code == POST_DEC || code == POST_INC)
2116 return operands_match_p (XEXP (x, 0), y);
2117 /* Two preincrements are invalid
2118 because the assembler insn would increment only once.
2119 On the other hand, an preincrement matches ordinary indexing
2120 if the preincrement is the input operand.
2121 In this case, return 2, since some callers need to do special
2122 things when this happens. */
2123 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
2124 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2128 /* Now we have disposed of all the cases
2129 in which different rtx codes can match. */
2130 if (code != GET_CODE (y))
2132 if (code == LABEL_REF)
2133 return XEXP (x, 0) == XEXP (y, 0);
2134 if (code == SYMBOL_REF)
2135 return XSTR (x, 0) == XSTR (y, 0);
2137 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2139 if (GET_MODE (x) != GET_MODE (y))
2142 /* Compare the elements. If any pair of corresponding elements
2143 fail to match, return 0 for the whole things. */
2146 fmt = GET_RTX_FORMAT (code);
2147 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2153 if (XWINT (x, i) != XWINT (y, i))
2158 if (XINT (x, i) != XINT (y, i))
2163 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2166 /* If any subexpression returns 2,
2167 we should return 2 if we are successful. */
2176 if (XVECLEN (x, i) != XVECLEN (y, i))
2178 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2180 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2188 /* It is believed that rtx's at this level will never
2189 contain anything but integers and other rtx's,
2190 except for within LABEL_REFs and SYMBOL_REFs. */
2195 return 1 + success_2;
2198 /* Describe the range of registers or memory referenced by X.
2199 If X is a register, set REG_FLAG and put the first register
2200 number into START and the last plus one into END.
2201 If X is a memory reference, put a base address into BASE
2202 and a range of integer offsets into START and END.
2203 If X is pushing on the stack, we can assume it causes no trouble,
2204 so we set the SAFE field. */
2206 static struct decomposition
2210 struct decomposition val;
2216 if (GET_CODE (x) == MEM)
2218 rtx base, offset = 0;
2219 rtx addr = XEXP (x, 0);
2221 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2222 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2224 val.base = XEXP (addr, 0);
2225 val.start = - GET_MODE_SIZE (GET_MODE (x));
2226 val.end = GET_MODE_SIZE (GET_MODE (x));
2227 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2231 if (GET_CODE (addr) == CONST)
2233 addr = XEXP (addr, 0);
2236 if (GET_CODE (addr) == PLUS)
2238 if (CONSTANT_P (XEXP (addr, 0)))
2240 base = XEXP (addr, 1);
2241 offset = XEXP (addr, 0);
2243 else if (CONSTANT_P (XEXP (addr, 1)))
2245 base = XEXP (addr, 0);
2246 offset = XEXP (addr, 1);
2253 offset = const0_rtx;
2255 if (GET_CODE (offset) == CONST)
2256 offset = XEXP (offset, 0);
2257 if (GET_CODE (offset) == PLUS)
2259 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2261 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2262 offset = XEXP (offset, 0);
2264 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2266 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2267 offset = XEXP (offset, 1);
2271 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2272 offset = const0_rtx;
2275 else if (GET_CODE (offset) != CONST_INT)
2277 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2278 offset = const0_rtx;
2281 if (all_const && GET_CODE (base) == PLUS)
2282 base = gen_rtx_CONST (GET_MODE (base), base);
2284 if (GET_CODE (offset) != CONST_INT)
2287 val.start = INTVAL (offset);
2288 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2292 else if (GET_CODE (x) == REG)
2295 val.start = true_regnum (x);
2298 /* A pseudo with no hard reg. */
2299 val.start = REGNO (x);
2300 val.end = val.start + 1;
2304 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2306 else if (GET_CODE (x) == SUBREG)
2308 if (GET_CODE (SUBREG_REG (x)) != REG)
2309 /* This could be more precise, but it's good enough. */
2310 return decompose (SUBREG_REG (x));
2312 val.start = true_regnum (x);
2314 return decompose (SUBREG_REG (x));
2317 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2319 else if (CONSTANT_P (x)
2320 /* This hasn't been assigned yet, so it can't conflict yet. */
2321 || GET_CODE (x) == SCRATCH)
2328 /* Return 1 if altering Y will not modify the value of X.
2329 Y is also described by YDATA, which should be decompose (Y). */
2332 immune_p (x, y, ydata)
2334 struct decomposition ydata;
2336 struct decomposition xdata;
2339 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2343 if (GET_CODE (y) != MEM)
2345 /* If Y is memory and X is not, Y can't affect X. */
2346 if (GET_CODE (x) != MEM)
2349 xdata = decompose (x);
2351 if (! rtx_equal_p (xdata.base, ydata.base))
2353 /* If bases are distinct symbolic constants, there is no overlap. */
2354 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2356 /* Constants and stack slots never overlap. */
2357 if (CONSTANT_P (xdata.base)
2358 && (ydata.base == frame_pointer_rtx
2359 || ydata.base == hard_frame_pointer_rtx
2360 || ydata.base == stack_pointer_rtx))
2362 if (CONSTANT_P (ydata.base)
2363 && (xdata.base == frame_pointer_rtx
2364 || xdata.base == hard_frame_pointer_rtx
2365 || xdata.base == stack_pointer_rtx))
2367 /* If either base is variable, we don't know anything. */
2372 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2375 /* Similar, but calls decompose. */
2378 safe_from_earlyclobber (op, clobber)
2381 struct decomposition early_data;
2383 early_data = decompose (clobber);
2384 return immune_p (op, clobber, early_data);
2387 /* Main entry point of this file: search the body of INSN
2388 for values that need reloading and record them with push_reload.
2389 REPLACE nonzero means record also where the values occur
2390 so that subst_reloads can be used.
2392 IND_LEVELS says how many levels of indirection are supported by this
2393 machine; a value of zero means that a memory reference is not a valid
2396 LIVE_KNOWN says we have valid information about which hard
2397 regs are live at each point in the program; this is true when
2398 we are called from global_alloc but false when stupid register
2399 allocation has been done.
2401 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2402 which is nonnegative if the reg has been commandeered for reloading into.
2403 It is copied into STATIC_RELOAD_REG_P and referenced from there
2404 by various subroutines.
2406 Return TRUE if some operands need to be changed, because of swapping
2407 commutative operands, reg_equiv_address substitution, or whatever. */
2410 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2412 int replace, ind_levels;
2414 short *reload_reg_p;
2416 #ifdef REGISTER_CONSTRAINTS
2418 register int insn_code_number;
2421 /* These start out as the constraints for the insn
2422 and they are chewed up as we consider alternatives. */
2423 char *constraints[MAX_RECOG_OPERANDS];
2424 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2426 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2427 char pref_or_nothing[MAX_RECOG_OPERANDS];
2428 /* Nonzero for a MEM operand whose entire address needs a reload. */
2429 int address_reloaded[MAX_RECOG_OPERANDS];
2430 /* Value of enum reload_type to use for operand. */
2431 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2432 /* Value of enum reload_type to use within address of operand. */
2433 enum reload_type address_type[MAX_RECOG_OPERANDS];
2434 /* Save the usage of each operand. */
2435 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2436 int no_input_reloads = 0, no_output_reloads = 0;
2438 int this_alternative[MAX_RECOG_OPERANDS];
2439 char this_alternative_win[MAX_RECOG_OPERANDS];
2440 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2441 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2442 int this_alternative_matches[MAX_RECOG_OPERANDS];
2444 int goal_alternative[MAX_RECOG_OPERANDS];
2445 int this_alternative_number;
2446 int goal_alternative_number;
2447 int operand_reloadnum[MAX_RECOG_OPERANDS];
2448 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2449 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2450 char goal_alternative_win[MAX_RECOG_OPERANDS];
2451 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2452 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2453 int goal_alternative_swapped;
2457 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2458 rtx substed_operand[MAX_RECOG_OPERANDS];
2459 rtx body = PATTERN (insn);
2460 rtx set = single_set (insn);
2461 int goal_earlyclobber, this_earlyclobber;
2462 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2464 /* Cache the last regno for the last pseudo we did an output reload
2465 for in case the next insn uses it. */
2466 static int last_output_reload_regno = -1;
2471 n_earlyclobbers = 0;
2472 replace_reloads = replace;
2473 hard_regs_live_known = live_known;
2474 static_reload_reg_p = reload_reg_p;
2476 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2477 neither are insns that SET cc0. Insns that use CC0 are not allowed
2478 to have any input reloads. */
2479 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2480 no_output_reloads = 1;
2483 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2484 no_input_reloads = 1;
2485 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2486 no_output_reloads = 1;
2489 #ifdef SECONDARY_MEMORY_NEEDED
2490 /* The eliminated forms of any secondary memory locations are per-insn, so
2491 clear them out here. */
2493 bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2496 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2497 is cheap to move between them. If it is not, there may not be an insn
2498 to do the copy, so we may need a reload. */
2499 if (GET_CODE (body) == SET
2500 && GET_CODE (SET_DEST (body)) == REG
2501 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2502 && GET_CODE (SET_SRC (body)) == REG
2503 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2504 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2505 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2508 extract_insn (insn);
2510 noperands = reload_n_operands = recog_n_operands;
2511 n_alternatives = recog_n_alternatives;
2513 /* Just return "no reloads" if insn has no operands with constraints. */
2514 if (noperands == 0 || n_alternatives == 0)
2517 insn_code_number = INSN_CODE (insn);
2518 this_insn_is_asm = insn_code_number < 0;
2520 bcopy ((char *) recog_operand_mode, (char *) operand_mode,
2521 noperands * sizeof (enum machine_mode));
2522 bcopy ((char *) recog_constraints, (char *) constraints,
2523 noperands * sizeof (char *));
2527 /* If we will need to know, later, whether some pair of operands
2528 are the same, we must compare them now and save the result.
2529 Reloading the base and index registers will clobber them
2530 and afterward they will fail to match. */
2532 for (i = 0; i < noperands; i++)
2537 substed_operand[i] = recog_operand[i];
2540 modified[i] = RELOAD_READ;
2542 /* Scan this operand's constraint to see if it is an output operand,
2543 an in-out operand, is commutative, or should match another. */
2548 modified[i] = RELOAD_WRITE;
2550 modified[i] = RELOAD_READ_WRITE;
2553 /* The last operand should not be marked commutative. */
2554 if (i == noperands - 1)
2559 else if (c >= '0' && c <= '9')
2562 operands_match[c][i]
2563 = operands_match_p (recog_operand[c], recog_operand[i]);
2565 /* An operand may not match itself. */
2569 /* If C can be commuted with C+1, and C might need to match I,
2570 then C+1 might also need to match I. */
2571 if (commutative >= 0)
2573 if (c == commutative || c == commutative + 1)
2575 int other = c + (c == commutative ? 1 : -1);
2576 operands_match[other][i]
2577 = operands_match_p (recog_operand[other], recog_operand[i]);
2579 if (i == commutative || i == commutative + 1)
2581 int other = i + (i == commutative ? 1 : -1);
2582 operands_match[c][other]
2583 = operands_match_p (recog_operand[c], recog_operand[other]);
2585 /* Note that C is supposed to be less than I.
2586 No need to consider altering both C and I because in
2587 that case we would alter one into the other. */
2593 /* Examine each operand that is a memory reference or memory address
2594 and reload parts of the addresses into index registers.
2595 Also here any references to pseudo regs that didn't get hard regs
2596 but are equivalent to constants get replaced in the insn itself
2597 with those constants. Nobody will ever see them again.
2599 Finally, set up the preferred classes of each operand. */
2601 for (i = 0; i < noperands; i++)
2603 register RTX_CODE code = GET_CODE (recog_operand[i]);
2605 address_reloaded[i] = 0;
2606 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2607 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2610 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2611 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2614 if (*constraints[i] == 0)
2615 /* Ignore things like match_operator operands. */
2617 else if (constraints[i][0] == 'p')
2619 find_reloads_address (VOIDmode, NULL_PTR,
2620 recog_operand[i], recog_operand_loc[i],
2621 i, operand_type[i], ind_levels, insn);
2623 /* If we now have a simple operand where we used to have a
2624 PLUS or MULT, re-recognize and try again. */
2625 if ((GET_RTX_CLASS (GET_CODE (*recog_operand_loc[i])) == 'o'
2626 || GET_CODE (*recog_operand_loc[i]) == SUBREG)
2627 && (GET_CODE (recog_operand[i]) == MULT
2628 || GET_CODE (recog_operand[i]) == PLUS))
2630 INSN_CODE (insn) = -1;
2631 retval = find_reloads (insn, replace, ind_levels, live_known,
2636 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2638 else if (code == MEM)
2641 = find_reloads_address (GET_MODE (recog_operand[i]),
2642 recog_operand_loc[i],
2643 XEXP (recog_operand[i], 0),
2644 &XEXP (recog_operand[i], 0),
2645 i, address_type[i], ind_levels, insn);
2646 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2648 else if (code == SUBREG)
2650 rtx reg = SUBREG_REG (recog_operand[i]);
2652 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2655 && &SET_DEST (set) == recog_operand_loc[i],
2658 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2659 that didn't get a hard register, emit a USE with a REG_EQUAL
2660 note in front so that we might inherit a previous, possibly
2664 && GET_CODE (op) == MEM
2665 && GET_CODE (reg) == REG
2666 && (GET_MODE_SIZE (GET_MODE (reg))
2667 >= GET_MODE_SIZE (GET_MODE (op))))
2668 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode, reg), insn))
2669 = gen_rtx_EXPR_LIST (REG_EQUAL,
2670 reg_equiv_memory_loc[REGNO (reg)], NULL_RTX);
2672 substed_operand[i] = recog_operand[i] = op;
2674 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2675 /* We can get a PLUS as an "operand" as a result of register
2676 elimination. See eliminate_regs and gen_reload. We handle
2677 a unary operator by reloading the operand. */
2678 substed_operand[i] = recog_operand[i]
2679 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2680 ind_levels, 0, insn);
2681 else if (code == REG)
2683 /* This is equivalent to calling find_reloads_toplev.
2684 The code is duplicated for speed.
2685 When we find a pseudo always equivalent to a constant,
2686 we replace it by the constant. We must be sure, however,
2687 that we don't try to replace it in the insn in which it
2689 register int regno = REGNO (recog_operand[i]);
2690 if (reg_equiv_constant[regno] != 0
2691 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2693 /* Record the existing mode so that the check if constants are
2694 allowed will work when operand_mode isn't specified. */
2696 if (operand_mode[i] == VOIDmode)
2697 operand_mode[i] = GET_MODE (recog_operand[i]);
2699 substed_operand[i] = recog_operand[i]
2700 = reg_equiv_constant[regno];
2702 if (reg_equiv_memory_loc[regno] != 0
2703 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2704 /* We need not give a valid is_set_dest argument since the case
2705 of a constant equivalence was checked above. */
2706 substed_operand[i] = recog_operand[i]
2707 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2708 ind_levels, 0, insn);
2710 /* If the operand is still a register (we didn't replace it with an
2711 equivalent), get the preferred class to reload it into. */
2712 code = GET_CODE (recog_operand[i]);
2714 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
2715 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2717 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
2718 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2722 /* If we made any reloads for addresses, see if they violate a
2723 "no input reloads" requirement for this insn. */
2724 if (no_input_reloads)
2725 for (i = 0; i < n_reloads; i++)
2726 if (reload_in[i] != 0)
2730 /* If this is simply a copy from operand 1 to operand 0, merge the
2731 preferred classes for the operands. */
2732 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2733 && recog_operand[1] == SET_SRC (set))
2735 preferred_class[0] = preferred_class[1]
2736 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2737 pref_or_nothing[0] |= pref_or_nothing[1];
2738 pref_or_nothing[1] |= pref_or_nothing[0];
2741 /* Now see what we need for pseudo-regs that didn't get hard regs
2742 or got the wrong kind of hard reg. For this, we must consider
2743 all the operands together against the register constraints. */
2745 best = MAX_RECOG_OPERANDS * 2 + 600;
2748 goal_alternative_swapped = 0;
2751 /* The constraints are made of several alternatives.
2752 Each operand's constraint looks like foo,bar,... with commas
2753 separating the alternatives. The first alternatives for all
2754 operands go together, the second alternatives go together, etc.
2756 First loop over alternatives. */
2758 for (this_alternative_number = 0;
2759 this_alternative_number < n_alternatives;
2760 this_alternative_number++)
2762 /* Loop over operands for one constraint alternative. */
2763 /* LOSERS counts those that don't fit this alternative
2764 and would require loading. */
2766 /* BAD is set to 1 if it some operand can't fit this alternative
2767 even after reloading. */
2769 /* REJECT is a count of how undesirable this alternative says it is
2770 if any reloading is required. If the alternative matches exactly
2771 then REJECT is ignored, but otherwise it gets this much
2772 counted against it in addition to the reloading needed. Each
2773 ? counts three times here since we want the disparaging caused by
2774 a bad register class to only count 1/3 as much. */
2777 this_earlyclobber = 0;
2779 for (i = 0; i < noperands; i++)
2781 register char *p = constraints[i];
2782 register int win = 0;
2783 /* 0 => this operand can be reloaded somehow for this alternative */
2785 /* 0 => this operand can be reloaded if the alternative allows regs. */
2788 register rtx operand = recog_operand[i];
2790 /* Nonzero means this is a MEM that must be reloaded into a reg
2791 regardless of what the constraint says. */
2792 int force_reload = 0;
2794 /* Nonzero if a constant forced into memory would be OK for this
2797 int earlyclobber = 0;
2799 /* If the predicate accepts a unary operator, it means that
2800 we need to reload the operand, but do not do this for
2801 match_operator and friends. */
2802 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2803 operand = XEXP (operand, 0);
2805 /* If the operand is a SUBREG, extract
2806 the REG or MEM (or maybe even a constant) within.
2807 (Constants can occur as a result of reg_equiv_constant.) */
2809 while (GET_CODE (operand) == SUBREG)
2811 offset += SUBREG_WORD (operand);
2812 operand = SUBREG_REG (operand);
2813 /* Force reload if this is a constant or PLUS or if there may
2814 be a problem accessing OPERAND in the outer mode. */
2815 if (CONSTANT_P (operand)
2816 || GET_CODE (operand) == PLUS
2817 /* We must force a reload of paradoxical SUBREGs
2818 of a MEM because the alignment of the inner value
2819 may not be enough to do the outer reference. On
2820 big-endian machines, it may also reference outside
2823 On machines that extend byte operations and we have a
2824 SUBREG where both the inner and outer modes are no wider
2825 than a word and the inner mode is narrower, is integral,
2826 and gets extended when loaded from memory, combine.c has
2827 made assumptions about the behavior of the machine in such
2828 register access. If the data is, in fact, in memory we
2829 must always load using the size assumed to be in the
2830 register and let the insn do the different-sized
2833 This is doubly true if WORD_REGISTER_OPERATIONS. In
2834 this case eliminate_regs has left non-paradoxical
2835 subregs for push_reloads to see. Make sure it does
2836 by forcing the reload.
2838 ??? When is it right at this stage to have a subreg
2839 of a mem that is _not_ to be handled specialy? IMO
2840 those should have been reduced to just a mem. */
2841 || ((GET_CODE (operand) == MEM
2842 || (GET_CODE (operand)== REG
2843 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2844 #ifndef WORD_REGISTER_OPERATIONS
2845 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2846 < BIGGEST_ALIGNMENT)
2847 && (GET_MODE_SIZE (operand_mode[i])
2848 > GET_MODE_SIZE (GET_MODE (operand))))
2849 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2850 #ifdef LOAD_EXTEND_OP
2851 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2852 && (GET_MODE_SIZE (GET_MODE (operand))
2854 && (GET_MODE_SIZE (operand_mode[i])
2855 > GET_MODE_SIZE (GET_MODE (operand)))
2856 && INTEGRAL_MODE_P (GET_MODE (operand))
2857 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2862 /* Subreg of a hard reg which can't handle the subreg's mode
2863 or which would handle that mode in the wrong number of
2864 registers for subregging to work. */
2865 || (GET_CODE (operand) == REG
2866 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2867 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2868 && (GET_MODE_SIZE (GET_MODE (operand))
2870 && ((GET_MODE_SIZE (GET_MODE (operand))
2872 != HARD_REGNO_NREGS (REGNO (operand),
2873 GET_MODE (operand))))
2874 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2879 this_alternative[i] = (int) NO_REGS;
2880 this_alternative_win[i] = 0;
2881 this_alternative_offmemok[i] = 0;
2882 this_alternative_earlyclobber[i] = 0;
2883 this_alternative_matches[i] = -1;
2885 /* An empty constraint or empty alternative
2886 allows anything which matched the pattern. */
2887 if (*p == 0 || *p == ',')
2890 /* Scan this alternative's specs for this operand;
2891 set WIN if the operand fits any letter in this alternative.
2892 Otherwise, clear BADOP if this operand could
2893 fit some letter after reloads,
2894 or set WINREG if this operand could fit after reloads
2895 provided the constraint allows some registers. */
2897 while (*p && (c = *p++) != ',')
2906 /* The last operand should not be marked commutative. */
2907 if (i != noperands - 1)
2920 /* Ignore rest of this alternative as far as
2921 reloading is concerned. */
2922 while (*p && *p != ',') p++;
2931 this_alternative_matches[i] = c;
2932 /* We are supposed to match a previous operand.
2933 If we do, we win if that one did.
2934 If we do not, count both of the operands as losers.
2935 (This is too conservative, since most of the time
2936 only a single reload insn will be needed to make
2937 the two operands win. As a result, this alternative
2938 may be rejected when it is actually desirable.) */
2939 if ((swapped && (c != commutative || i != commutative + 1))
2940 /* If we are matching as if two operands were swapped,
2941 also pretend that operands_match had been computed
2943 But if I is the second of those and C is the first,
2944 don't exchange them, because operands_match is valid
2945 only on one side of its diagonal. */
2947 [(c == commutative || c == commutative + 1)
2948 ? 2*commutative + 1 - c : c]
2949 [(i == commutative || i == commutative + 1)
2950 ? 2*commutative + 1 - i : i])
2951 : operands_match[c][i])
2953 /* If we are matching a non-offsettable address where an
2954 offsettable address was expected, then we must reject
2955 this combination, because we can't reload it. */
2956 if (this_alternative_offmemok[c]
2957 && GET_CODE (recog_operand[c]) == MEM
2958 && this_alternative[c] == (int) NO_REGS
2959 && ! this_alternative_win[c])
2962 win = this_alternative_win[c];
2966 /* Operands don't match. */
2968 /* Retroactively mark the operand we had to match
2969 as a loser, if it wasn't already. */
2970 if (this_alternative_win[c])
2972 this_alternative_win[c] = 0;
2973 if (this_alternative[c] == (int) NO_REGS)
2975 /* But count the pair only once in the total badness of
2976 this alternative, if the pair can be a dummy reload. */
2978 = find_dummy_reload (recog_operand[i], recog_operand[c],
2979 recog_operand_loc[i], recog_operand_loc[c],
2980 operand_mode[i], operand_mode[c],
2981 this_alternative[c], -1,
2982 this_alternative_earlyclobber[c]);
2987 /* This can be fixed with reloads if the operand
2988 we are supposed to match can be fixed with reloads. */
2990 this_alternative[i] = this_alternative[c];
2992 /* If we have to reload this operand and some previous
2993 operand also had to match the same thing as this
2994 operand, we don't know how to do that. So reject this
2996 if (! win || force_reload)
2997 for (j = 0; j < i; j++)
2998 if (this_alternative_matches[j]
2999 == this_alternative_matches[i])
3005 /* All necessary reloads for an address_operand
3006 were handled in find_reloads_address. */
3007 this_alternative[i] = (int) BASE_REG_CLASS;
3014 if (GET_CODE (operand) == MEM
3015 || (GET_CODE (operand) == REG
3016 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3017 && reg_renumber[REGNO (operand)] < 0))
3019 if (CONSTANT_P (operand)
3020 /* force_const_mem does not accept HIGH. */
3021 && GET_CODE (operand) != HIGH)
3027 if (GET_CODE (operand) == MEM
3028 && ! address_reloaded[i]
3029 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3030 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3035 if (GET_CODE (operand) == MEM
3036 && ! address_reloaded[i]
3037 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3038 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3042 /* Memory operand whose address is not offsettable. */
3046 if (GET_CODE (operand) == MEM
3047 && ! (ind_levels ? offsettable_memref_p (operand)
3048 : offsettable_nonstrict_memref_p (operand))
3049 /* Certain mem addresses will become offsettable
3050 after they themselves are reloaded. This is important;
3051 we don't want our own handling of unoffsettables
3052 to override the handling of reg_equiv_address. */
3053 && !(GET_CODE (XEXP (operand, 0)) == REG
3055 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3059 /* Memory operand whose address is offsettable. */
3063 if ((GET_CODE (operand) == MEM
3064 /* If IND_LEVELS, find_reloads_address won't reload a
3065 pseudo that didn't get a hard reg, so we have to
3066 reject that case. */
3067 && ((ind_levels ? offsettable_memref_p (operand)
3068 : offsettable_nonstrict_memref_p (operand))
3069 /* A reloaded address is offsettable because it is now
3070 just a simple register indirect. */
3071 || address_reloaded[i]))
3072 || (GET_CODE (operand) == REG
3073 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3074 && reg_renumber[REGNO (operand)] < 0
3075 /* If reg_equiv_address is nonzero, we will be
3076 loading it into a register; hence it will be
3077 offsettable, but we cannot say that reg_equiv_mem
3078 is offsettable without checking. */
3079 && ((reg_equiv_mem[REGNO (operand)] != 0
3080 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3081 || (reg_equiv_address[REGNO (operand)] != 0))))
3083 /* force_const_mem does not accept HIGH. */
3084 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3085 || GET_CODE (operand) == MEM)
3092 /* Output operand that is stored before the need for the
3093 input operands (and their index registers) is over. */
3094 earlyclobber = 1, this_earlyclobber = 1;
3098 #ifndef REAL_ARITHMETIC
3099 /* Match any floating double constant, but only if
3100 we can examine the bits of it reliably. */
3101 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
3102 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
3103 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
3106 if (GET_CODE (operand) == CONST_DOUBLE)
3111 if (GET_CODE (operand) == CONST_DOUBLE)
3117 if (GET_CODE (operand) == CONST_DOUBLE
3118 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
3123 if (GET_CODE (operand) == CONST_INT
3124 || (GET_CODE (operand) == CONST_DOUBLE
3125 && GET_MODE (operand) == VOIDmode))
3128 if (CONSTANT_P (operand)
3129 #ifdef LEGITIMATE_PIC_OPERAND_P
3130 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3137 if (GET_CODE (operand) == CONST_INT
3138 || (GET_CODE (operand) == CONST_DOUBLE
3139 && GET_MODE (operand) == VOIDmode))
3151 if (GET_CODE (operand) == CONST_INT
3152 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
3162 /* A PLUS is never a valid operand, but reload can make
3163 it from a register when eliminating registers. */
3164 && GET_CODE (operand) != PLUS
3165 /* A SCRATCH is not a valid operand. */
3166 && GET_CODE (operand) != SCRATCH
3167 #ifdef LEGITIMATE_PIC_OPERAND_P
3168 && (! CONSTANT_P (operand)
3170 || LEGITIMATE_PIC_OPERAND_P (operand))
3172 && (GENERAL_REGS == ALL_REGS
3173 || GET_CODE (operand) != REG
3174 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3175 && reg_renumber[REGNO (operand)] < 0)))
3177 /* Drop through into 'r' case */
3181 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3184 #ifdef EXTRA_CONSTRAINT
3190 if (EXTRA_CONSTRAINT (operand, c))
3197 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3200 if (GET_MODE (operand) == BLKmode)
3203 if (GET_CODE (operand) == REG
3204 && reg_fits_class_p (operand, this_alternative[i],
3205 offset, GET_MODE (recog_operand[i])))
3212 /* If this operand could be handled with a reg,
3213 and some reg is allowed, then this operand can be handled. */
3214 if (winreg && this_alternative[i] != (int) NO_REGS)
3217 /* Record which operands fit this alternative. */
3218 this_alternative_earlyclobber[i] = earlyclobber;
3219 if (win && ! force_reload)
3220 this_alternative_win[i] = 1;
3223 int const_to_mem = 0;
3225 this_alternative_offmemok[i] = offmemok;
3229 /* Alternative loses if it has no regs for a reg operand. */
3230 if (GET_CODE (operand) == REG
3231 && this_alternative[i] == (int) NO_REGS
3232 && this_alternative_matches[i] < 0)
3236 /* If this is a pseudo-register that is set in the previous
3237 insns, there's a good chance that it will already be in a
3238 spill register and we can use that spill register. So
3239 make this case cheaper.
3241 Disabled for egcs. egcs has better inheritance code and
3242 this change causes problems with the improved reload
3243 inheritance code. */
3244 if (GET_CODE (operand) == REG
3245 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3246 && REGNO (operand) == last_output_reload_regno)
3250 /* If this is a constant that is reloaded into the desired
3251 class by copying it to memory first, count that as another
3252 reload. This is consistent with other code and is
3253 required to avoid choosing another alternative when
3254 the constant is moved into memory by this function on
3255 an early reload pass. Note that the test here is
3256 precisely the same as in the code below that calls
3258 if (CONSTANT_P (operand)
3259 /* force_const_mem does not accept HIGH. */
3260 && GET_CODE (operand) != HIGH
3261 && ((PREFERRED_RELOAD_CLASS (operand,
3262 (enum reg_class) this_alternative[i])
3264 || no_input_reloads)
3265 && operand_mode[i] != VOIDmode)
3268 if (this_alternative[i] != (int) NO_REGS)
3272 /* If we can't reload this value at all, reject this
3273 alternative. Note that we could also lose due to
3274 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3277 if (! CONSTANT_P (operand)
3278 && (enum reg_class) this_alternative[i] != NO_REGS
3279 && (PREFERRED_RELOAD_CLASS (operand,
3280 (enum reg_class) this_alternative[i])
3284 /* Alternative loses if it requires a type of reload not
3285 permitted for this insn. We can always reload SCRATCH
3286 and objects with a REG_UNUSED note. */
3287 else if (GET_CODE (operand) != SCRATCH
3288 && modified[i] != RELOAD_READ && no_output_reloads
3289 && ! find_reg_note (insn, REG_UNUSED, operand))
3291 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3296 /* We prefer to reload pseudos over reloading other things,
3297 since such reloads may be able to be eliminated later.
3298 If we are reloading a SCRATCH, we won't be generating any
3299 insns, just using a register, so it is also preferred.
3300 So bump REJECT in other cases. Don't do this in the
3301 case where we are forcing a constant into memory and
3302 it will then win since we don't want to have a different
3303 alternative match then. */
3304 if (! (GET_CODE (operand) == REG
3305 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3306 && GET_CODE (operand) != SCRATCH
3307 && ! (const_to_mem && constmemok))
3310 /* Input reloads can be inherited more often than output
3311 reloads can be removed, so penalize output reloads. */
3312 if (operand_type[i] != RELOAD_FOR_INPUT
3313 && GET_CODE (operand) != SCRATCH)
3317 /* If this operand is a pseudo register that didn't get a hard
3318 reg and this alternative accepts some register, see if the
3319 class that we want is a subset of the preferred class for this
3320 register. If not, but it intersects that class, use the
3321 preferred class instead. If it does not intersect the preferred
3322 class, show that usage of this alternative should be discouraged;
3323 it will be discouraged more still if the register is `preferred
3324 or nothing'. We do this because it increases the chance of
3325 reusing our spill register in a later insn and avoiding a pair
3326 of memory stores and loads.
3328 Don't bother with this if this alternative will accept this
3331 Don't do this for a multiword operand, since it is only a
3332 small win and has the risk of requiring more spill registers,
3333 which could cause a large loss.
3335 Don't do this if the preferred class has only one register
3336 because we might otherwise exhaust the class. */
3339 if (! win && this_alternative[i] != (int) NO_REGS
3340 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3341 && reg_class_size[(int) preferred_class[i]] > 1)
3343 if (! reg_class_subset_p (this_alternative[i],
3344 preferred_class[i]))
3346 /* Since we don't have a way of forming the intersection,
3347 we just do something special if the preferred class
3348 is a subset of the class we have; that's the most
3349 common case anyway. */
3350 if (reg_class_subset_p (preferred_class[i],
3351 this_alternative[i]))
3352 this_alternative[i] = (int) preferred_class[i];
3354 reject += (2 + 2 * pref_or_nothing[i]);
3359 /* Now see if any output operands that are marked "earlyclobber"
3360 in this alternative conflict with any input operands
3361 or any memory addresses. */
3363 for (i = 0; i < noperands; i++)
3364 if (this_alternative_earlyclobber[i]
3365 && this_alternative_win[i])
3367 struct decomposition early_data;
3369 early_data = decompose (recog_operand[i]);
3371 if (modified[i] == RELOAD_READ)
3374 if (this_alternative[i] == NO_REGS)
3376 this_alternative_earlyclobber[i] = 0;
3377 if (this_insn_is_asm)
3378 error_for_asm (this_insn,
3379 "`&' constraint used with no register class");
3384 for (j = 0; j < noperands; j++)
3385 /* Is this an input operand or a memory ref? */
3386 if ((GET_CODE (recog_operand[j]) == MEM
3387 || modified[j] != RELOAD_WRITE)
3389 /* Ignore things like match_operator operands. */
3390 && *recog_constraints[j] != 0
3391 /* Don't count an input operand that is constrained to match
3392 the early clobber operand. */
3393 && ! (this_alternative_matches[j] == i
3394 && rtx_equal_p (recog_operand[i], recog_operand[j]))
3395 /* Is it altered by storing the earlyclobber operand? */
3396 && !immune_p (recog_operand[j], recog_operand[i], early_data))
3398 /* If the output is in a single-reg class,
3399 it's costly to reload it, so reload the input instead. */
3400 if (reg_class_size[this_alternative[i]] == 1
3401 && (GET_CODE (recog_operand[j]) == REG
3402 || GET_CODE (recog_operand[j]) == SUBREG))
3405 this_alternative_win[j] = 0;
3410 /* If an earlyclobber operand conflicts with something,
3411 it must be reloaded, so request this and count the cost. */
3415 this_alternative_win[i] = 0;
3416 for (j = 0; j < noperands; j++)
3417 if (this_alternative_matches[j] == i
3418 && this_alternative_win[j])
3420 this_alternative_win[j] = 0;
3426 /* If one alternative accepts all the operands, no reload required,
3427 choose that alternative; don't consider the remaining ones. */
3430 /* Unswap these so that they are never swapped at `finish'. */
3431 if (commutative >= 0)
3433 recog_operand[commutative] = substed_operand[commutative];
3434 recog_operand[commutative + 1]
3435 = substed_operand[commutative + 1];
3437 for (i = 0; i < noperands; i++)
3439 goal_alternative_win[i] = 1;
3440 goal_alternative[i] = this_alternative[i];
3441 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3442 goal_alternative_matches[i] = this_alternative_matches[i];
3443 goal_alternative_earlyclobber[i]
3444 = this_alternative_earlyclobber[i];
3446 goal_alternative_number = this_alternative_number;
3447 goal_alternative_swapped = swapped;
3448 goal_earlyclobber = this_earlyclobber;
3452 /* REJECT, set by the ! and ? constraint characters and when a register
3453 would be reloaded into a non-preferred class, discourages the use of
3454 this alternative for a reload goal. REJECT is incremented by six
3455 for each ? and two for each non-preferred class. */
3456 losers = losers * 6 + reject;
3458 /* If this alternative can be made to work by reloading,
3459 and it needs less reloading than the others checked so far,
3460 record it as the chosen goal for reloading. */
3461 if (! bad && best > losers)
3463 for (i = 0; i < noperands; i++)
3465 goal_alternative[i] = this_alternative[i];
3466 goal_alternative_win[i] = this_alternative_win[i];
3467 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3468 goal_alternative_matches[i] = this_alternative_matches[i];
3469 goal_alternative_earlyclobber[i]
3470 = this_alternative_earlyclobber[i];
3472 goal_alternative_swapped = swapped;
3474 goal_alternative_number = this_alternative_number;
3475 goal_earlyclobber = this_earlyclobber;
3479 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3480 then we need to try each alternative twice,
3481 the second time matching those two operands
3482 as if we had exchanged them.
3483 To do this, really exchange them in operands.
3485 If we have just tried the alternatives the second time,
3486 return operands to normal and drop through. */
3488 if (commutative >= 0)
3493 register enum reg_class tclass;
3496 recog_operand[commutative] = substed_operand[commutative + 1];
3497 recog_operand[commutative + 1] = substed_operand[commutative];
3499 tclass = preferred_class[commutative];
3500 preferred_class[commutative] = preferred_class[commutative + 1];
3501 preferred_class[commutative + 1] = tclass;
3503 t = pref_or_nothing[commutative];
3504 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3505 pref_or_nothing[commutative + 1] = t;
3507 bcopy ((char *) recog_constraints, (char *) constraints,
3508 noperands * sizeof (char *));
3513 recog_operand[commutative] = substed_operand[commutative];
3514 recog_operand[commutative + 1] = substed_operand[commutative + 1];
3518 /* The operands don't meet the constraints.
3519 goal_alternative describes the alternative
3520 that we could reach by reloading the fewest operands.
3521 Reload so as to fit it. */
3523 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3525 /* No alternative works with reloads?? */
3526 if (insn_code_number >= 0)
3527 fatal_insn ("Unable to generate reloads for:", insn);
3528 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3529 /* Avoid further trouble with this insn. */
3530 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3535 /* Jump to `finish' from above if all operands are valid already.
3536 In that case, goal_alternative_win is all 1. */
3539 /* Right now, for any pair of operands I and J that are required to match,
3541 goal_alternative_matches[J] is I.
3542 Set up goal_alternative_matched as the inverse function:
3543 goal_alternative_matched[I] = J. */
3545 for (i = 0; i < noperands; i++)
3546 goal_alternative_matched[i] = -1;
3548 for (i = 0; i < noperands; i++)
3549 if (! goal_alternative_win[i]
3550 && goal_alternative_matches[i] >= 0)
3551 goal_alternative_matched[goal_alternative_matches[i]] = i;
3553 /* If the best alternative is with operands 1 and 2 swapped,
3554 consider them swapped before reporting the reloads. Update the
3555 operand numbers of any reloads already pushed. */
3557 if (goal_alternative_swapped)
3561 tem = substed_operand[commutative];
3562 substed_operand[commutative] = substed_operand[commutative + 1];
3563 substed_operand[commutative + 1] = tem;
3564 tem = recog_operand[commutative];
3565 recog_operand[commutative] = recog_operand[commutative + 1];
3566 recog_operand[commutative + 1] = tem;
3567 tem = *recog_operand_loc[commutative];
3568 *recog_operand_loc[commutative] = *recog_operand_loc[commutative+1];
3569 *recog_operand_loc[commutative+1] = tem;
3571 for (i = 0; i < n_reloads; i++)
3573 if (reload_opnum[i] == commutative)
3574 reload_opnum[i] = commutative + 1;
3575 else if (reload_opnum[i] == commutative + 1)
3576 reload_opnum[i] = commutative;
3580 for (i = 0; i < noperands; i++)
3582 operand_reloadnum[i] = -1;
3584 /* If this is an earlyclobber operand, we need to widen the scope.
3585 The reload must remain valid from the start of the insn being
3586 reloaded until after the operand is stored into its destination.
3587 We approximate this with RELOAD_OTHER even though we know that we
3588 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3590 One special case that is worth checking is when we have an
3591 output that is earlyclobber but isn't used past the insn (typically
3592 a SCRATCH). In this case, we only need have the reload live
3593 through the insn itself, but not for any of our input or output
3595 But we must not accidentally narrow the scope of an existing
3596 RELOAD_OTHER reload - leave these alone.
3598 In any case, anything needed to address this operand can remain
3599 however they were previously categorized. */
3601 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3603 = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
3604 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3607 /* Any constants that aren't allowed and can't be reloaded
3608 into registers are here changed into memory references. */
3609 for (i = 0; i < noperands; i++)
3610 if (! goal_alternative_win[i]
3611 && CONSTANT_P (recog_operand[i])
3612 /* force_const_mem does not accept HIGH. */
3613 && GET_CODE (recog_operand[i]) != HIGH
3614 && ((PREFERRED_RELOAD_CLASS (recog_operand[i],
3615 (enum reg_class) goal_alternative[i])
3617 || no_input_reloads)
3618 && operand_mode[i] != VOIDmode)
3620 substed_operand[i] = recog_operand[i]
3621 = find_reloads_toplev (force_const_mem (operand_mode[i],
3623 i, address_type[i], ind_levels, 0, insn);
3624 if (alternative_allows_memconst (recog_constraints[i],
3625 goal_alternative_number))
3626 goal_alternative_win[i] = 1;
3629 /* Record the values of the earlyclobber operands for the caller. */
3630 if (goal_earlyclobber)
3631 for (i = 0; i < noperands; i++)
3632 if (goal_alternative_earlyclobber[i])
3633 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3635 /* Now record reloads for all the operands that need them. */
3636 last_output_reload_regno = -1;
3637 for (i = 0; i < noperands; i++)
3638 if (! goal_alternative_win[i])
3640 /* Operands that match previous ones have already been handled. */
3641 if (goal_alternative_matches[i] >= 0)
3643 /* Handle an operand with a nonoffsettable address
3644 appearing where an offsettable address will do
3645 by reloading the address into a base register.
3647 ??? We can also do this when the operand is a register and
3648 reg_equiv_mem is not offsettable, but this is a bit tricky,
3649 so we don't bother with it. It may not be worth doing. */
3650 else if (goal_alternative_matched[i] == -1
3651 && goal_alternative_offmemok[i]
3652 && GET_CODE (recog_operand[i]) == MEM)
3654 operand_reloadnum[i]
3655 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
3656 &XEXP (recog_operand[i], 0), NULL_PTR,
3657 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
3658 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3659 reload_inc[operand_reloadnum[i]]
3660 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
3662 /* If this operand is an output, we will have made any
3663 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3664 now we are treating part of the operand as an input, so
3665 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3667 if (modified[i] == RELOAD_WRITE)
3669 for (j = 0; j < n_reloads; j++)
3671 if (reload_opnum[j] == i)
3673 if (reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3674 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
3675 else if (reload_when_needed[j]
3676 == RELOAD_FOR_OUTADDR_ADDRESS)
3677 reload_when_needed[j] = RELOAD_FOR_INPADDR_ADDRESS;
3682 else if (goal_alternative_matched[i] == -1)
3684 operand_reloadnum[i]
3685 = push_reload ((modified[i] != RELOAD_WRITE
3686 ? recog_operand[i] : 0),
3687 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3688 (modified[i] != RELOAD_WRITE
3689 ? recog_operand_loc[i] : 0),
3690 (modified[i] != RELOAD_READ
3691 ? recog_operand_loc[i] : 0),
3692 (enum reg_class) goal_alternative[i],
3693 (modified[i] == RELOAD_WRITE
3694 ? VOIDmode : operand_mode[i]),
3695 (modified[i] == RELOAD_READ
3696 ? VOIDmode : operand_mode[i]),
3697 (insn_code_number < 0 ? 0
3698 : insn_operand_strict_low[insn_code_number][i]),
3699 0, i, operand_type[i]);
3700 if (modified[i] != RELOAD_READ
3701 && GET_CODE (recog_operand[i]) == REG)
3702 last_output_reload_regno = REGNO (recog_operand[i]);
3704 /* In a matching pair of operands, one must be input only
3705 and the other must be output only.
3706 Pass the input operand as IN and the other as OUT. */
3707 else if (modified[i] == RELOAD_READ
3708 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3710 operand_reloadnum[i]
3711 = push_reload (recog_operand[i],
3712 recog_operand[goal_alternative_matched[i]],
3713 recog_operand_loc[i],
3714 recog_operand_loc[goal_alternative_matched[i]],
3715 (enum reg_class) goal_alternative[i],
3717 operand_mode[goal_alternative_matched[i]],
3718 0, 0, i, RELOAD_OTHER);
3719 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3720 if (GET_CODE (recog_operand[goal_alternative_matched[i]]) == REG)
3721 last_output_reload_regno
3722 = REGNO (recog_operand[goal_alternative_matched[i]]);
3724 else if (modified[i] == RELOAD_WRITE
3725 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3727 operand_reloadnum[goal_alternative_matched[i]]
3728 = push_reload (recog_operand[goal_alternative_matched[i]],
3730 recog_operand_loc[goal_alternative_matched[i]],
3731 recog_operand_loc[i],
3732 (enum reg_class) goal_alternative[i],
3733 operand_mode[goal_alternative_matched[i]],
3735 0, 0, i, RELOAD_OTHER);
3736 operand_reloadnum[i] = output_reloadnum;
3737 if (GET_CODE (recog_operand[i]) == REG)
3738 last_output_reload_regno = REGNO (recog_operand[i]);
3740 else if (insn_code_number >= 0)
3744 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3745 /* Avoid further trouble with this insn. */
3746 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3751 else if (goal_alternative_matched[i] < 0
3752 && goal_alternative_matches[i] < 0
3755 /* For each non-matching operand that's a MEM or a pseudo-register
3756 that didn't get a hard register, make an optional reload.
3757 This may get done even if the insn needs no reloads otherwise. */
3759 rtx operand = recog_operand[i];
3761 while (GET_CODE (operand) == SUBREG)
3762 operand = XEXP (operand, 0);
3763 if ((GET_CODE (operand) == MEM
3764 || (GET_CODE (operand) == REG
3765 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3766 /* If this is only for an output, the optional reload would not
3767 actually cause us to use a register now, just note that
3768 something is stored here. */
3769 && ((enum reg_class) goal_alternative[i] != NO_REGS
3770 || modified[i] == RELOAD_WRITE)
3771 && ! no_input_reloads
3772 /* An optional output reload might allow to delete INSN later.
3773 We mustn't make in-out reloads on insns that are not permitted
3775 If this is an asm, we can't delete it; we must not even call
3776 push_reload for an optional output reload in this case,
3777 because we can't be sure that the constraint allows a register,
3778 and push_reload verifies the constraints for asms. */
3779 && (modified[i] == RELOAD_READ
3780 || (! no_output_reloads && ! this_insn_is_asm)))
3781 operand_reloadnum[i]
3782 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3783 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3784 (modified[i] != RELOAD_WRITE
3785 ? recog_operand_loc[i] : 0),
3786 (modified[i] != RELOAD_READ
3787 ? recog_operand_loc[i] : 0),
3788 (enum reg_class) goal_alternative[i],
3789 (modified[i] == RELOAD_WRITE
3790 ? VOIDmode : operand_mode[i]),
3791 (modified[i] == RELOAD_READ
3792 ? VOIDmode : operand_mode[i]),
3793 (insn_code_number < 0 ? 0
3794 : insn_operand_strict_low[insn_code_number][i]),
3795 1, i, operand_type[i]);
3796 /* If a memory reference remains, yet we can't make an optional
3797 reload, check if this is actually a pseudo register reference;
3798 we then need to emit a USE and/or a CLOBBER so that reload
3799 inheritance will do the right thing. */
3800 else if (replace && GET_CODE (operand) == MEM)
3802 operand = *recog_operand_loc[i];
3804 while (GET_CODE (operand) == SUBREG)
3805 operand = XEXP (operand, 0);
3806 if (GET_CODE (operand) == REG)
3808 if (modified[i] != RELOAD_WRITE)
3809 emit_insn_before (gen_rtx_USE (VOIDmode, operand), insn);
3810 if (modified[i] != RELOAD_READ)
3811 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3815 else if (goal_alternative_matches[i] >= 0
3816 && goal_alternative_win[goal_alternative_matches[i]]
3817 && modified[i] == RELOAD_READ
3818 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3819 && ! no_input_reloads && ! no_output_reloads
3822 /* Similarly, make an optional reload for a pair of matching
3823 objects that are in MEM or a pseudo that didn't get a hard reg. */
3825 rtx operand = recog_operand[i];
3827 while (GET_CODE (operand) == SUBREG)
3828 operand = XEXP (operand, 0);
3829 if ((GET_CODE (operand) == MEM
3830 || (GET_CODE (operand) == REG
3831 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3832 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3834 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3835 = push_reload (recog_operand[goal_alternative_matches[i]],
3837 recog_operand_loc[goal_alternative_matches[i]],
3838 recog_operand_loc[i],
3839 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3840 operand_mode[goal_alternative_matches[i]],
3842 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3845 /* Perform whatever substitutions on the operands we are supposed
3846 to make due to commutativity or replacement of registers
3847 with equivalent constants or memory slots. */
3849 for (i = 0; i < noperands; i++)
3851 /* We only do this on the last pass through reload, because it is
3852 possible for some data (like reg_equiv_address) to be changed during
3853 later passes. Moreover, we loose the opportunity to get a useful
3854 reload_{in,out}_reg when we do these replacements. */
3858 rtx substitution = substed_operand[i];
3860 *recog_operand_loc[i] = substitution;
3862 /* If we're replacing an operand with a LABEL_REF, we need
3863 to make sure that there's a REG_LABEL note attached to
3864 this instruction. */
3865 if (GET_CODE (insn) != JUMP_INSN
3866 && GET_CODE (substitution) == LABEL_REF
3867 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
3868 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL,
3869 XEXP (substitution, 0),
3873 retval |= (substed_operand[i] != *recog_operand_loc[i]);
3876 /* If this insn pattern contains any MATCH_DUP's, make sure that
3877 they will be substituted if the operands they match are substituted.
3878 Also do now any substitutions we already did on the operands.
3880 Don't do this if we aren't making replacements because we might be
3881 propagating things allocated by frame pointer elimination into places
3882 it doesn't expect. */
3884 if (insn_code_number >= 0 && replace)
3885 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3887 int opno = recog_dup_num[i];
3888 *recog_dup_loc[i] = *recog_operand_loc[opno];
3889 if (operand_reloadnum[opno] >= 0)
3890 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3891 insn_operand_mode[insn_code_number][opno]);
3895 /* This loses because reloading of prior insns can invalidate the equivalence
3896 (or at least find_equiv_reg isn't smart enough to find it any more),
3897 causing this insn to need more reload regs than it needed before.
3898 It may be too late to make the reload regs available.
3899 Now this optimization is done safely in choose_reload_regs. */
3901 /* For each reload of a reg into some other class of reg,
3902 search for an existing equivalent reg (same value now) in the right class.
3903 We can use it as long as we don't need to change its contents. */
3904 for (i = 0; i < n_reloads; i++)
3905 if (reload_reg_rtx[i] == 0
3906 && reload_in[i] != 0
3907 && GET_CODE (reload_in[i]) == REG
3908 && reload_out[i] == 0)
3911 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3912 static_reload_reg_p, 0, reload_inmode[i]);
3913 /* Prevent generation of insn to load the value
3914 because the one we found already has the value. */
3915 if (reload_reg_rtx[i])
3916 reload_in[i] = reload_reg_rtx[i];
3920 /* Perhaps an output reload can be combined with another
3921 to reduce needs by one. */
3922 if (!goal_earlyclobber)
3925 /* If we have a pair of reloads for parts of an address, they are reloading
3926 the same object, the operands themselves were not reloaded, and they
3927 are for two operands that are supposed to match, merge the reloads and
3928 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3930 for (i = 0; i < n_reloads; i++)
3934 for (j = i + 1; j < n_reloads; j++)
3935 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3936 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3937 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3938 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3939 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
3940 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS
3941 || reload_when_needed[j] == RELOAD_FOR_INPADDR_ADDRESS
3942 || reload_when_needed[j] == RELOAD_FOR_OUTADDR_ADDRESS)
3943 && rtx_equal_p (reload_in[i], reload_in[j])
3944 && (operand_reloadnum[reload_opnum[i]] < 0
3945 || reload_optional[operand_reloadnum[reload_opnum[i]]])
3946 && (operand_reloadnum[reload_opnum[j]] < 0
3947 || reload_optional[operand_reloadnum[reload_opnum[j]]])
3948 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
3949 || (goal_alternative_matches[reload_opnum[j]]
3950 == reload_opnum[i])))
3952 for (k = 0; k < n_replacements; k++)
3953 if (replacements[k].what == j)
3954 replacements[k].what = i;
3956 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3957 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3958 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
3960 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3965 /* Scan all the reloads and update their type.
3966 If a reload is for the address of an operand and we didn't reload
3967 that operand, change the type. Similarly, change the operand number
3968 of a reload when two operands match. If a reload is optional, treat it
3969 as though the operand isn't reloaded.
3971 ??? This latter case is somewhat odd because if we do the optional
3972 reload, it means the object is hanging around. Thus we need only
3973 do the address reload if the optional reload was NOT done.
3975 Change secondary reloads to be the address type of their operand, not
3978 If an operand's reload is now RELOAD_OTHER, change any
3979 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3980 RELOAD_FOR_OTHER_ADDRESS. */
3982 for (i = 0; i < n_reloads; i++)
3984 if (reload_secondary_p[i]
3985 && reload_when_needed[i] == operand_type[reload_opnum[i]])
3986 reload_when_needed[i] = address_type[reload_opnum[i]];
3988 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3989 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3990 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
3991 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
3992 && (operand_reloadnum[reload_opnum[i]] < 0
3993 || reload_optional[operand_reloadnum[reload_opnum[i]]]))
3995 /* If we have a secondary reload to go along with this reload,
3996 change its type to RELOAD_FOR_OPADDR_ADDR. */
3998 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3999 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
4000 && reload_secondary_in_reload[i] != -1)
4002 int secondary_in_reload = reload_secondary_in_reload[i];
4004 reload_when_needed[secondary_in_reload]
4005 = RELOAD_FOR_OPADDR_ADDR;
4007 /* If there's a tertiary reload we have to change it also. */
4008 if (secondary_in_reload > 0
4009 && reload_secondary_in_reload[secondary_in_reload] != -1)
4010 reload_when_needed[reload_secondary_in_reload[secondary_in_reload]]
4011 = RELOAD_FOR_OPADDR_ADDR;
4014 if ((reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
4015 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
4016 && reload_secondary_out_reload[i] != -1)
4018 int secondary_out_reload = reload_secondary_out_reload[i];
4020 reload_when_needed[secondary_out_reload]
4021 = RELOAD_FOR_OPADDR_ADDR;
4023 /* If there's a tertiary reload we have to change it also. */
4024 if (secondary_out_reload
4025 && reload_secondary_out_reload[secondary_out_reload] != -1)
4026 reload_when_needed[reload_secondary_out_reload[secondary_out_reload]]
4027 = RELOAD_FOR_OPADDR_ADDR;
4030 if (reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS
4031 || reload_when_needed[i] == RELOAD_FOR_OUTADDR_ADDRESS)
4032 reload_when_needed[i] = RELOAD_FOR_OPADDR_ADDR;
4034 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
4037 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
4038 || reload_when_needed[i] == RELOAD_FOR_INPADDR_ADDRESS)
4039 && operand_reloadnum[reload_opnum[i]] >= 0
4040 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
4042 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
4044 if (goal_alternative_matches[reload_opnum[i]] >= 0)
4045 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
4048 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4049 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4050 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4052 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4053 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4054 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4055 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4056 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4057 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4058 This is complicated by the fact that a single operand can have more
4059 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4060 choose_reload_regs without affecting code quality, and cases that
4061 actually fail are extremely rare, so it turns out to be better to fix
4062 the problem here by not generating cases that choose_reload_regs will
4064 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4065 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4067 We can reduce the register pressure by exploiting that a
4068 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4069 does not conflict with any of them, if it is only used for the first of
4070 the RELOAD_FOR_X_ADDRESS reloads. */
4072 int first_op_addr_num = -2;
4073 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4074 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4076 /* We use last_op_addr_reload and the contents of the above arrays
4077 first as flags - -2 means no instance encountered, -1 means exactly
4078 one instance encountered.
4079 If more than one instance has been encountered, we store the reload
4080 number of the first reload of the kind in question; reload numbers
4081 are known to be non-negative. */
4082 for (i = 0; i < noperands; i++)
4083 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4084 for (i = n_reloads - 1; i >= 0; i--)
4086 switch (reload_when_needed[i])
4088 case RELOAD_FOR_OPERAND_ADDRESS:
4089 if (++first_op_addr_num >= 0)
4091 first_op_addr_num = i;
4095 case RELOAD_FOR_INPUT_ADDRESS:
4096 if (++first_inpaddr_num[reload_opnum[i]] >= 0)
4098 first_inpaddr_num[reload_opnum[i]] = i;
4102 case RELOAD_FOR_OUTPUT_ADDRESS:
4103 if (++first_outpaddr_num[reload_opnum[i]] >= 0)
4105 first_outpaddr_num[reload_opnum[i]] = i;
4116 for (i = 0; i < n_reloads; i++)
4118 int first_num, type;
4120 switch (reload_when_needed[i])
4122 case RELOAD_FOR_OPADDR_ADDR:
4123 first_num = first_op_addr_num;
4124 type = RELOAD_FOR_OPERAND_ADDRESS;
4126 case RELOAD_FOR_INPADDR_ADDRESS:
4127 first_num = first_inpaddr_num[reload_opnum[i]];
4128 type = RELOAD_FOR_INPUT_ADDRESS;
4130 case RELOAD_FOR_OUTADDR_ADDRESS:
4131 first_num = first_outpaddr_num[reload_opnum[i]];
4132 type = RELOAD_FOR_OUTPUT_ADDRESS;
4139 else if (i > first_num)
4140 reload_when_needed[i] = type;
4143 /* Check if the only TYPE reload that uses reload I is
4144 reload FIRST_NUM. */
4145 for (j = n_reloads - 1; j > first_num; j--)
4147 if (reload_when_needed[j] == type
4148 && (reload_secondary_p[i]
4149 ? reload_secondary_in_reload[j] == i
4150 : reg_mentioned_p (reload_in[i], reload_in[j])))
4152 reload_when_needed[i] = type;
4161 /* See if we have any reloads that are now allowed to be merged
4162 because we've changed when the reload is needed to
4163 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4164 check for the most common cases. */
4166 for (i = 0; i < n_reloads; i++)
4167 if (reload_in[i] != 0 && reload_out[i] == 0
4168 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
4169 || reload_when_needed[i] == RELOAD_FOR_OPADDR_ADDR
4170 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
4171 for (j = 0; j < n_reloads; j++)
4172 if (i != j && reload_in[j] != 0 && reload_out[j] == 0
4173 && reload_when_needed[j] == reload_when_needed[i]
4174 && MATCHES (reload_in[i], reload_in[j])
4175 && reload_reg_class[i] == reload_reg_class[j]
4176 && !reload_nocombine[i] && !reload_nocombine[j]
4177 && reload_reg_rtx[i] == reload_reg_rtx[j])
4179 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
4180 transfer_replacements (i, j);
4184 /* Set which reloads must use registers not used in any group. Start
4185 with those that conflict with a group and then include ones that
4186 conflict with ones that are already known to conflict with a group. */
4189 for (i = 0; i < n_reloads; i++)
4191 enum machine_mode mode = reload_inmode[i];
4192 enum reg_class class = reload_reg_class[i];
4195 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode))
4196 mode = reload_outmode[i];
4197 size = CLASS_MAX_NREGS (class, mode);
4200 for (j = 0; j < n_reloads; j++)
4201 if ((CLASS_MAX_NREGS (reload_reg_class[j],
4202 (GET_MODE_SIZE (reload_outmode[j])
4203 > GET_MODE_SIZE (reload_inmode[j]))
4204 ? reload_outmode[j] : reload_inmode[j])
4206 && !reload_optional[j]
4207 && (reload_in[j] != 0 || reload_out[j] != 0
4208 || reload_secondary_p[j])
4209 && reloads_conflict (i, j)
4210 && reg_classes_intersect_p (class, reload_reg_class[j]))
4212 reload_nongroup[i] = 1;
4222 for (i = 0; i < n_reloads; i++)
4224 enum machine_mode mode = reload_inmode[i];
4225 enum reg_class class = reload_reg_class[i];
4228 if (GET_MODE_SIZE (reload_outmode[i]) > GET_MODE_SIZE (mode))
4229 mode = reload_outmode[i];
4230 size = CLASS_MAX_NREGS (class, mode);
4232 if (! reload_nongroup[i] && size == 1)
4233 for (j = 0; j < n_reloads; j++)
4234 if (reload_nongroup[j]
4235 && reloads_conflict (i, j)
4236 && reg_classes_intersect_p (class, reload_reg_class[j]))
4238 reload_nongroup[i] = 1;
4245 #else /* no REGISTER_CONSTRAINTS */
4247 int insn_code_number;
4248 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
4250 rtx body = PATTERN (insn);
4255 n_earlyclobbers = 0;
4256 replace_reloads = replace;
4259 extract_insn (insn);
4261 noperands = reload_n_operands = recog_n_operands;
4263 /* Return if the insn needs no reload processing. */
4267 for (i = 0; i < noperands; i++)
4269 register RTX_CODE code = GET_CODE (recog_operand[i]);
4270 int is_set_dest = GET_CODE (body) == SET && (i == 0);
4272 if (insn_code_number >= 0)
4273 if (insn_operand_address_p[insn_code_number][i])
4274 find_reloads_address (VOIDmode, NULL_PTR,
4275 recog_operand[i], recog_operand_loc[i],
4276 i, RELOAD_FOR_INPUT, ind_levels, insn);
4278 /* In these cases, we can't tell if the operand is an input
4279 or an output, so be conservative. In practice it won't be
4283 find_reloads_address (GET_MODE (recog_operand[i]),
4284 recog_operand_loc[i],
4285 XEXP (recog_operand[i], 0),
4286 &XEXP (recog_operand[i], 0),
4287 i, RELOAD_OTHER, ind_levels, insn);
4289 recog_operand[i] = *recog_operand_loc[i]
4290 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
4291 ind_levels, is_set_dest);
4294 register int regno = REGNO (recog_operand[i]);
4295 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4296 recog_operand[i] = *recog_operand_loc[i]
4297 = reg_equiv_constant[regno];
4298 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4299 that feeds this insn. */
4300 if (reg_equiv_mem[regno] != 0)
4301 recog_operand[i] = *recog_operand_loc[i]
4302 = reg_equiv_mem[regno];
4307 /* Perhaps an output reload can be combined with another
4308 to reduce needs by one. */
4309 if (!goal_earlyclobber)
4311 #endif /* no REGISTER_CONSTRAINTS */
4315 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4316 accepts a memory operand with constant address. */
4319 alternative_allows_memconst (constraint, altnum)
4320 const char *constraint;
4324 /* Skip alternatives before the one requested. */
4327 while (*constraint++ != ',');
4330 /* Scan the requested alternative for 'm' or 'o'.
4331 If one of them is present, this alternative accepts memory constants. */
4332 while ((c = *constraint++) && c != ',' && c != '#')
4333 if (c == 'm' || c == 'o')
4338 /* Scan X for memory references and scan the addresses for reloading.
4339 Also checks for references to "constant" regs that we want to eliminate
4340 and replaces them with the values they stand for.
4341 We may alter X destructively if it contains a reference to such.
4342 If X is just a constant reg, we return the equivalent value
4345 IND_LEVELS says how many levels of indirect addressing this machine
4348 OPNUM and TYPE identify the purpose of the reload.
4350 IS_SET_DEST is true if X is the destination of a SET, which is not
4351 appropriate to be replaced by a constant.
4353 INSN, if nonzero, is the insn in which we do the reload. It is used
4354 to determine if we may generate output reloads, and where to put USEs
4355 for pseudos that we have to replace with stack slots. */
4358 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn)
4361 enum reload_type type;
4366 register RTX_CODE code = GET_CODE (x);
4368 register char *fmt = GET_RTX_FORMAT (code);
4374 /* This code is duplicated for speed in find_reloads. */
4375 register int regno = REGNO (x);
4376 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4377 x = reg_equiv_constant[regno];
4379 /* This creates (subreg (mem...)) which would cause an unnecessary
4380 reload of the mem. */
4381 else if (reg_equiv_mem[regno] != 0)
4382 x = reg_equiv_mem[regno];
4384 else if (reg_equiv_memory_loc[regno]
4385 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4387 rtx mem = make_memloc (x, regno);
4388 if (reg_equiv_address[regno]
4389 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4391 /* If this is not a toplevel operand, find_reloads doesn't see
4392 this substitution. We have to emit a USE of the pseudo so
4393 that delete_output_reload can see it. */
4394 if (replace_reloads && recog_operand[opnum] != x)
4395 emit_insn_before (gen_rtx_USE (VOIDmode, x), insn);
4397 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4398 opnum, type, ind_levels, insn);
4406 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4407 opnum, type, ind_levels, insn);
4411 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4413 /* Check for SUBREG containing a REG that's equivalent to a constant.
4414 If the constant has a known value, truncate it right now.
4415 Similarly if we are extracting a single-word of a multi-word
4416 constant. If the constant is symbolic, allow it to be substituted
4417 normally. push_reload will strip the subreg later. If the
4418 constant is VOIDmode, abort because we will lose the mode of
4419 the register (this should never happen because one of the cases
4420 above should handle it). */
4422 register int regno = REGNO (SUBREG_REG (x));
4425 if (subreg_lowpart_p (x)
4426 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4427 && reg_equiv_constant[regno] != 0
4428 && (tem = gen_lowpart_common (GET_MODE (x),
4429 reg_equiv_constant[regno])) != 0)
4432 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
4433 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4434 && reg_equiv_constant[regno] != 0
4435 && (tem = operand_subword (reg_equiv_constant[regno],
4437 GET_MODE (SUBREG_REG (x)))) != 0)
4439 /* TEM is now a word sized constant for the bits from X that
4440 we wanted. However, TEM may be the wrong representation.
4442 Use gen_lowpart_common to convert a CONST_INT into a
4443 CONST_DOUBLE and vice versa as needed according to by the mode
4445 tem = gen_lowpart_common (GET_MODE (x), tem);
4451 /* If the SUBREG is wider than a word, the above test will fail.
4452 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4453 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4454 a 32 bit target. We still can - and have to - handle this
4455 for non-paradoxical subregs of CONST_INTs. */
4456 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4457 && reg_equiv_constant[regno] != 0
4458 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT
4459 && (GET_MODE_SIZE (GET_MODE (x))
4460 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
4462 int shift = SUBREG_WORD (x) * BITS_PER_WORD;
4463 if (WORDS_BIG_ENDIAN)
4464 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
4465 - GET_MODE_BITSIZE (GET_MODE (x))
4467 /* Here we use the knowledge that CONST_INTs have a
4468 HOST_WIDE_INT field. */
4469 if (shift >= HOST_BITS_PER_WIDE_INT)
4470 shift = HOST_BITS_PER_WIDE_INT - 1;
4471 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift);
4474 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4475 && reg_equiv_constant[regno] != 0
4476 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
4479 /* If the subreg contains a reg that will be converted to a mem,
4480 convert the subreg to a narrower memref now.
4481 Otherwise, we would get (subreg (mem ...) ...),
4482 which would force reload of the mem.
4484 We also need to do this if there is an equivalent MEM that is
4485 not offsettable. In that case, alter_subreg would produce an
4486 invalid address on big-endian machines.
4488 For machines that extend byte loads, we must not reload using
4489 a wider mode if we have a paradoxical SUBREG. find_reloads will
4490 force a reload in that case. So we should not do anything here. */
4492 else if (regno >= FIRST_PSEUDO_REGISTER
4493 #ifdef LOAD_EXTEND_OP
4494 && (GET_MODE_SIZE (GET_MODE (x))
4495 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4497 && (reg_equiv_address[regno] != 0
4498 || (reg_equiv_mem[regno] != 0
4499 && (! strict_memory_address_p (GET_MODE (x),
4500 XEXP (reg_equiv_mem[regno], 0))
4501 || ! offsettable_memref_p (reg_equiv_mem[regno])
4502 || num_not_at_initial_offset))))
4503 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4507 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4511 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4512 ind_levels, is_set_dest, insn);
4513 /* If we have replaced a reg with it's equivalent memory loc -
4514 that can still be handled here e.g. if it's in a paradoxical
4515 subreg - we must make the change in a copy, rather than using
4516 a destructive change. This way, find_reloads can still elect
4517 not to do the change. */
4518 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4520 x = shallow_copy_rtx (x);
4523 XEXP (x, i) = new_part;
4529 /* Return a mem ref for the memory equivalent of reg REGNO.
4530 This mem ref is not shared with anything. */
4533 make_memloc (ad, regno)
4537 /* We must rerun eliminate_regs, in case the elimination
4538 offsets have changed. */
4540 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4542 /* If TEM might contain a pseudo, we must copy it to avoid
4543 modifying it when we do the substitution for the reload. */
4544 if (rtx_varies_p (tem))
4545 tem = copy_rtx (tem);
4547 tem = gen_rtx_MEM (GET_MODE (ad), tem);
4548 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4552 /* Record all reloads needed for handling memory address AD
4553 which appears in *LOC in a memory reference to mode MODE
4554 which itself is found in location *MEMREFLOC.
4555 Note that we take shortcuts assuming that no multi-reg machine mode
4556 occurs as part of an address.
4558 OPNUM and TYPE specify the purpose of this reload.
4560 IND_LEVELS says how many levels of indirect addressing this machine
4563 INSN, if nonzero, is the insn in which we do the reload. It is used
4564 to determine if we may generate output reloads, and where to put USEs
4565 for pseudos that we have to replace with stack slots.
4567 Value is nonzero if this address is reloaded or replaced as a whole.
4568 This is interesting to the caller if the address is an autoincrement.
4570 Note that there is no verification that the address will be valid after
4571 this routine does its work. Instead, we rely on the fact that the address
4572 was valid when reload started. So we need only undo things that reload
4573 could have broken. These are wrong register types, pseudos not allocated
4574 to a hard register, and frame pointer elimination. */
4577 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn)
4578 enum machine_mode mode;
4583 enum reload_type type;
4588 int removed_and = 0;
4591 /* If the address is a register, see if it is a legitimate address and
4592 reload if not. We first handle the cases where we need not reload
4593 or where we must reload in a non-standard way. */
4595 if (GET_CODE (ad) == REG)
4599 if (reg_equiv_constant[regno] != 0
4600 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
4602 *loc = ad = reg_equiv_constant[regno];
4606 tem = reg_equiv_memory_loc[regno];
4609 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4611 tem = make_memloc (ad, regno);
4612 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4614 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
4615 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
4618 /* We can avoid a reload if the register's equivalent memory
4619 expression is valid as an indirect memory address.
4620 But not all addresses are valid in a mem used as an indirect
4621 address: only reg or reg+constant. */
4624 && strict_memory_address_p (mode, tem)
4625 && (GET_CODE (XEXP (tem, 0)) == REG
4626 || (GET_CODE (XEXP (tem, 0)) == PLUS
4627 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4628 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4630 /* TEM is not the same as what we'll be replacing the
4631 pseudo with after reload, put a USE in front of INSN
4632 in the final reload pass. */
4634 && num_not_at_initial_offset
4635 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4638 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
4639 /* This doesn't really count as replacing the address
4640 as a whole, since it is still a memory access. */
4648 /* The only remaining case where we can avoid a reload is if this is a
4649 hard register that is valid as a base register and which is not the
4650 subject of a CLOBBER in this insn. */
4652 else if (regno < FIRST_PSEUDO_REGISTER
4653 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4654 && ! regno_clobbered_p (regno, this_insn))
4657 /* If we do not have one of the cases above, we must do the reload. */
4658 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
4659 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4663 if (strict_memory_address_p (mode, ad))
4665 /* The address appears valid, so reloads are not needed.
4666 But the address may contain an eliminable register.
4667 This can happen because a machine with indirect addressing
4668 may consider a pseudo register by itself a valid address even when
4669 it has failed to get a hard reg.
4670 So do a tree-walk to find and eliminate all such regs. */
4672 /* But first quickly dispose of a common case. */
4673 if (GET_CODE (ad) == PLUS
4674 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4675 && GET_CODE (XEXP (ad, 0)) == REG
4676 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4679 subst_reg_equivs_changed = 0;
4680 *loc = subst_reg_equivs (ad, insn);
4682 if (! subst_reg_equivs_changed)
4685 /* Check result for validity after substitution. */
4686 if (strict_memory_address_p (mode, ad))
4690 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4695 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4700 *memrefloc = copy_rtx (*memrefloc);
4701 XEXP (*memrefloc, 0) = ad;
4702 move_replacements (&ad, &XEXP (*memrefloc, 0));
4708 /* The address is not valid. We have to figure out why. First see if
4709 we have an outer AND and remove it if so. Then analyze what's inside. */
4711 if (GET_CODE (ad) == AND)
4714 loc = &XEXP (ad, 0);
4718 /* One possibility for why the address is invalid is that it is itself
4719 a MEM. This can happen when the frame pointer is being eliminated, a
4720 pseudo is not allocated to a hard register, and the offset between the
4721 frame and stack pointers is not its initial value. In that case the
4722 pseudo will have been replaced by a MEM referring to the
4724 if (GET_CODE (ad) == MEM)
4726 /* First ensure that the address in this MEM is valid. Then, unless
4727 indirect addresses are valid, reload the MEM into a register. */
4729 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4730 opnum, ADDR_TYPE (type),
4731 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4733 /* If tem was changed, then we must create a new memory reference to
4734 hold it and store it back into memrefloc. */
4735 if (tem != ad && memrefloc)
4737 *memrefloc = copy_rtx (*memrefloc);
4738 copy_replacements (tem, XEXP (*memrefloc, 0));
4739 loc = &XEXP (*memrefloc, 0);
4741 loc = &XEXP (*loc, 0);
4744 /* Check similar cases as for indirect addresses as above except
4745 that we can allow pseudos and a MEM since they should have been
4746 taken care of above. */
4749 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4750 || GET_CODE (XEXP (tem, 0)) == MEM
4751 || ! (GET_CODE (XEXP (tem, 0)) == REG
4752 || (GET_CODE (XEXP (tem, 0)) == PLUS
4753 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4754 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4756 /* Must use TEM here, not AD, since it is the one that will
4757 have any subexpressions reloaded, if needed. */
4758 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4759 BASE_REG_CLASS, GET_MODE (tem),
4762 return ! removed_and;
4768 /* If we have address of a stack slot but it's not valid because the
4769 displacement is too large, compute the sum in a register.
4770 Handle all base registers here, not just fp/ap/sp, because on some
4771 targets (namely SH) we can also get too large displacements from
4772 big-endian corrections. */
4773 else if (GET_CODE (ad) == PLUS
4774 && GET_CODE (XEXP (ad, 0)) == REG
4775 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4776 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4777 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4779 /* Unshare the MEM rtx so we can safely alter it. */
4782 *memrefloc = copy_rtx (*memrefloc);
4783 loc = &XEXP (*memrefloc, 0);
4785 loc = &XEXP (*loc, 0);
4788 if (double_reg_address_ok)
4790 /* Unshare the sum as well. */
4791 *loc = ad = copy_rtx (ad);
4793 /* Reload the displacement into an index reg.
4794 We assume the frame pointer or arg pointer is a base reg. */
4795 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4796 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4802 /* If the sum of two regs is not necessarily valid,
4803 reload the sum into a base reg.
4804 That will at least work. */
4805 find_reloads_address_part (ad, loc, BASE_REG_CLASS,
4806 Pmode, opnum, type, ind_levels);
4808 return ! removed_and;
4811 /* If we have an indexed stack slot, there are three possible reasons why
4812 it might be invalid: The index might need to be reloaded, the address
4813 might have been made by frame pointer elimination and hence have a
4814 constant out of range, or both reasons might apply.
4816 We can easily check for an index needing reload, but even if that is the
4817 case, we might also have an invalid constant. To avoid making the
4818 conservative assumption and requiring two reloads, we see if this address
4819 is valid when not interpreted strictly. If it is, the only problem is
4820 that the index needs a reload and find_reloads_address_1 will take care
4823 There is still a case when we might generate an extra reload,
4824 however. In certain cases eliminate_regs will return a MEM for a REG
4825 (see the code there for details). In those cases, memory_address_p
4826 applied to our address will return 0 so we will think that our offset
4827 must be too large. But it might indeed be valid and the only problem
4828 is that a MEM is present where a REG should be. This case should be
4829 very rare and there doesn't seem to be any way to avoid it.
4831 If we decide to do something here, it must be that
4832 `double_reg_address_ok' is true and that this address rtl was made by
4833 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4834 rework the sum so that the reload register will be added to the index.
4835 This is safe because we know the address isn't shared.
4837 We check for fp/ap/sp as both the first and second operand of the
4840 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4841 && GET_CODE (XEXP (ad, 0)) == PLUS
4842 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4843 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4844 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4846 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4847 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4849 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4850 && ! memory_address_p (mode, ad))
4852 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4853 plus_constant (XEXP (XEXP (ad, 0), 0),
4854 INTVAL (XEXP (ad, 1))),
4855 XEXP (XEXP (ad, 0), 1));
4856 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4857 GET_MODE (ad), opnum, type, ind_levels);
4858 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4864 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4865 && GET_CODE (XEXP (ad, 0)) == PLUS
4866 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4867 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4868 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4870 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4871 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4873 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4874 && ! memory_address_p (mode, ad))
4876 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4877 XEXP (XEXP (ad, 0), 0),
4878 plus_constant (XEXP (XEXP (ad, 0), 1),
4879 INTVAL (XEXP (ad, 1))));
4880 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), BASE_REG_CLASS,
4881 GET_MODE (ad), opnum, type, ind_levels);
4882 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4888 /* See if address becomes valid when an eliminable register
4889 in a sum is replaced. */
4892 if (GET_CODE (ad) == PLUS)
4893 tem = subst_indexed_address (ad);
4894 if (tem != ad && strict_memory_address_p (mode, tem))
4896 /* Ok, we win that way. Replace any additional eliminable
4899 subst_reg_equivs_changed = 0;
4900 tem = subst_reg_equivs (tem, insn);
4902 /* Make sure that didn't make the address invalid again. */
4904 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4911 /* If constants aren't valid addresses, reload the constant address
4913 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4915 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4916 Unshare it so we can safely alter it. */
4917 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4918 && CONSTANT_POOL_ADDRESS_P (ad))
4920 *memrefloc = copy_rtx (*memrefloc);
4921 loc = &XEXP (*memrefloc, 0);
4923 loc = &XEXP (*loc, 0);
4926 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
4928 return ! removed_and;
4931 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
4935 /* Find all pseudo regs appearing in AD
4936 that are eliminable in favor of equivalent values
4937 and do not have hard regs; replace them by their equivalents.
4938 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4939 front of it for pseudos that we have to replace with stack slots. */
4942 subst_reg_equivs (ad, insn)
4946 register RTX_CODE code = GET_CODE (ad);
4964 register int regno = REGNO (ad);
4966 if (reg_equiv_constant[regno] != 0)
4968 subst_reg_equivs_changed = 1;
4969 return reg_equiv_constant[regno];
4971 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
4973 rtx mem = make_memloc (ad, regno);
4974 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
4976 subst_reg_equivs_changed = 1;
4977 emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn);
4985 /* Quickly dispose of a common case. */
4986 if (XEXP (ad, 0) == frame_pointer_rtx
4987 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4995 fmt = GET_RTX_FORMAT (code);
4996 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4998 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5002 /* Compute the sum of X and Y, making canonicalizations assumed in an
5003 address, namely: sum constant integers, surround the sum of two
5004 constants with a CONST, put the constant as the second operand, and
5005 group the constant on the outermost sum.
5007 This routine assumes both inputs are already in canonical form. */
5014 enum machine_mode mode = GET_MODE (x);
5016 if (mode == VOIDmode)
5017 mode = GET_MODE (y);
5019 if (mode == VOIDmode)
5022 if (GET_CODE (x) == CONST_INT)
5023 return plus_constant (y, INTVAL (x));
5024 else if (GET_CODE (y) == CONST_INT)
5025 return plus_constant (x, INTVAL (y));
5026 else if (CONSTANT_P (x))
5027 tem = x, x = y, y = tem;
5029 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5030 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5032 /* Note that if the operands of Y are specified in the opposite
5033 order in the recursive calls below, infinite recursion will occur. */
5034 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5035 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5037 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5038 constant will have been placed second. */
5039 if (CONSTANT_P (x) && CONSTANT_P (y))
5041 if (GET_CODE (x) == CONST)
5043 if (GET_CODE (y) == CONST)
5046 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5049 return gen_rtx_PLUS (mode, x, y);
5052 /* If ADDR is a sum containing a pseudo register that should be
5053 replaced with a constant (from reg_equiv_constant),
5054 return the result of doing so, and also apply the associative
5055 law so that the result is more likely to be a valid address.
5056 (But it is not guaranteed to be one.)
5058 Note that at most one register is replaced, even if more are
5059 replaceable. Also, we try to put the result into a canonical form
5060 so it is more likely to be a valid address.
5062 In all other cases, return ADDR. */
5065 subst_indexed_address (addr)
5068 rtx op0 = 0, op1 = 0, op2 = 0;
5072 if (GET_CODE (addr) == PLUS)
5074 /* Try to find a register to replace. */
5075 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5076 if (GET_CODE (op0) == REG
5077 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5078 && reg_renumber[regno] < 0
5079 && reg_equiv_constant[regno] != 0)
5080 op0 = reg_equiv_constant[regno];
5081 else if (GET_CODE (op1) == REG
5082 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5083 && reg_renumber[regno] < 0
5084 && reg_equiv_constant[regno] != 0)
5085 op1 = reg_equiv_constant[regno];
5086 else if (GET_CODE (op0) == PLUS
5087 && (tem = subst_indexed_address (op0)) != op0)
5089 else if (GET_CODE (op1) == PLUS
5090 && (tem = subst_indexed_address (op1)) != op1)
5095 /* Pick out up to three things to add. */
5096 if (GET_CODE (op1) == PLUS)
5097 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5098 else if (GET_CODE (op0) == PLUS)
5099 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5101 /* Compute the sum. */
5103 op1 = form_sum (op1, op2);
5105 op0 = form_sum (op0, op1);
5112 /* Record the pseudo registers we must reload into hard registers in a
5113 subexpression of a would-be memory address, X referring to a value
5114 in mode MODE. (This function is not called if the address we find
5117 CONTEXT = 1 means we are considering regs as index regs,
5118 = 0 means we are considering them as base regs.
5120 OPNUM and TYPE specify the purpose of any reloads made.
5122 IND_LEVELS says how many levels of indirect addressing are
5123 supported at this point in the address.
5125 INSN, if nonzero, is the insn in which we do the reload. It is used
5126 to determine if we may generate output reloads.
5128 We return nonzero if X, as a whole, is reloaded or replaced. */
5130 /* Note that we take shortcuts assuming that no multi-reg machine mode
5131 occurs as part of an address.
5132 Also, this is not fully machine-customizable; it works for machines
5133 such as vaxes and 68000's and 32000's, but other possible machines
5134 could have addressing modes that this does not handle right. */
5137 find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
5138 enum machine_mode mode;
5143 enum reload_type type;
5147 register RTX_CODE code = GET_CODE (x);
5153 register rtx orig_op0 = XEXP (x, 0);
5154 register rtx orig_op1 = XEXP (x, 1);
5155 register RTX_CODE code0 = GET_CODE (orig_op0);
5156 register RTX_CODE code1 = GET_CODE (orig_op1);
5157 register rtx op0 = orig_op0;
5158 register rtx op1 = orig_op1;
5160 if (GET_CODE (op0) == SUBREG)
5162 op0 = SUBREG_REG (op0);
5163 code0 = GET_CODE (op0);
5164 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5165 op0 = gen_rtx_REG (word_mode,
5166 REGNO (op0) + SUBREG_WORD (orig_op0));
5169 if (GET_CODE (op1) == SUBREG)
5171 op1 = SUBREG_REG (op1);
5172 code1 = GET_CODE (op1);
5173 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5174 op1 = gen_rtx_REG (GET_MODE (op1),
5175 REGNO (op1) + SUBREG_WORD (orig_op1));
5178 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5179 || code0 == ZERO_EXTEND || code1 == MEM)
5181 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5182 type, ind_levels, insn);
5183 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5184 type, ind_levels, insn);
5187 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5188 || code1 == ZERO_EXTEND || code0 == MEM)
5190 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5191 type, ind_levels, insn);
5192 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5193 type, ind_levels, insn);
5196 else if (code0 == CONST_INT || code0 == CONST
5197 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5198 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5199 type, ind_levels, insn);
5201 else if (code1 == CONST_INT || code1 == CONST
5202 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5203 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5204 type, ind_levels, insn);
5206 else if (code0 == REG && code1 == REG)
5208 if (REG_OK_FOR_INDEX_P (op0)
5209 && REG_MODE_OK_FOR_BASE_P (op1, mode))
5211 else if (REG_OK_FOR_INDEX_P (op1)
5212 && REG_MODE_OK_FOR_BASE_P (op0, mode))
5214 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5215 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5216 type, ind_levels, insn);
5217 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5218 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5219 type, ind_levels, insn);
5220 else if (REG_OK_FOR_INDEX_P (op1))
5221 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5222 type, ind_levels, insn);
5223 else if (REG_OK_FOR_INDEX_P (op0))
5224 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5225 type, ind_levels, insn);
5228 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5229 type, ind_levels, insn);
5230 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5231 type, ind_levels, insn);
5235 else if (code0 == REG)
5237 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5238 type, ind_levels, insn);
5239 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5240 type, ind_levels, insn);
5243 else if (code1 == REG)
5245 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5246 type, ind_levels, insn);
5247 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5248 type, ind_levels, insn);
5258 if (GET_CODE (XEXP (x, 0)) == REG)
5260 register int regno = REGNO (XEXP (x, 0));
5264 /* A register that is incremented cannot be constant! */
5265 if (regno >= FIRST_PSEUDO_REGISTER
5266 && reg_equiv_constant[regno] != 0)
5269 /* Handle a register that is equivalent to a memory location
5270 which cannot be addressed directly. */
5271 if (reg_equiv_memory_loc[regno] != 0
5272 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5274 rtx tem = make_memloc (XEXP (x, 0), regno);
5275 if (reg_equiv_address[regno]
5276 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5278 /* First reload the memory location's address.
5279 We can't use ADDR_TYPE (type) here, because we need to
5280 write back the value after reading it, hence we actually
5281 need two registers. */
5282 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5283 &XEXP (tem, 0), opnum, type,
5285 /* Put this inside a new increment-expression. */
5286 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5287 /* Proceed to reload that, as if it contained a register. */
5291 /* If we have a hard register that is ok as an index,
5292 don't make a reload. If an autoincrement of a nice register
5293 isn't "valid", it must be that no autoincrement is "valid".
5294 If that is true and something made an autoincrement anyway,
5295 this must be a special context where one is allowed.
5296 (For example, a "push" instruction.)
5297 We can't improve this address, so leave it alone. */
5299 /* Otherwise, reload the autoincrement into a suitable hard reg
5300 and record how much to increment by. */
5302 if (reg_renumber[regno] >= 0)
5303 regno = reg_renumber[regno];
5304 if ((regno >= FIRST_PSEUDO_REGISTER
5305 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5306 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5313 /* If we can output the register afterwards, do so, this
5314 saves the extra update.
5315 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5316 CALL_INSN - and it does not set CC0.
5317 But don't do this if we cannot directly address the
5318 memory location, since this will make it harder to
5319 reuse address reloads, and increases register pressure.
5320 Also don't do this if we can probably update x directly. */
5321 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM
5323 : reg_equiv_mem[regno]);
5324 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5325 if (insn && GET_CODE (insn) == INSN && equiv
5326 && memory_operand (equiv, GET_MODE (equiv))
5328 && ! sets_cc0_p (PATTERN (insn))
5330 && ! (icode != CODE_FOR_nothing
5331 && (*insn_operand_predicate[icode][0]) (equiv, Pmode)
5332 && (*insn_operand_predicate[icode][1]) (equiv, Pmode)))
5337 = push_reload (x, x, loc, loc,
5338 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5339 GET_MODE (x), GET_MODE (x), 0, 0,
5340 opnum, RELOAD_OTHER);
5342 /* If we created a new MEM based on reg_equiv_mem[REGNO], then
5343 LOC above is part of the new MEM, not the MEM in INSN.
5345 We must also replace the address of the MEM in INSN. */
5346 if (&XEXP (x_orig, 0) != loc)
5347 push_replacement (&XEXP (x_orig, 0), reloadnum, VOIDmode);
5353 = push_reload (x, NULL_RTX, loc, NULL_PTR,
5354 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5355 GET_MODE (x), GET_MODE (x), 0, 0,
5357 reload_inc[reloadnum]
5358 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5364 /* Update the REG_INC notes. */
5366 for (link = REG_NOTES (this_insn);
5367 link; link = XEXP (link, 1))
5368 if (REG_NOTE_KIND (link) == REG_INC
5369 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
5370 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5376 else if (GET_CODE (XEXP (x, 0)) == MEM)
5378 /* This is probably the result of a substitution, by eliminate_regs,
5379 of an equivalent address for a pseudo that was not allocated to a
5380 hard register. Verify that the specified address is valid and
5381 reload it into a register. */
5382 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5383 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5387 /* Since we know we are going to reload this item, don't decrement
5388 for the indirection level.
5390 Note that this is actually conservative: it would be slightly
5391 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5393 /* We can't use ADDR_TYPE (type) here, because we need to
5394 write back the value after reading it, hence we actually
5395 need two registers. */
5396 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5397 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5398 opnum, type, ind_levels, insn);
5400 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
5401 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5402 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5403 reload_inc[reloadnum]
5404 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5406 link = FIND_REG_INC_NOTE (this_insn, tem);
5408 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5415 /* This is probably the result of a substitution, by eliminate_regs, of
5416 an equivalent address for a pseudo that was not allocated to a hard
5417 register. Verify that the specified address is valid and reload it
5420 Since we know we are going to reload this item, don't decrement for
5421 the indirection level.
5423 Note that this is actually conservative: it would be slightly more
5424 efficient to use the value of SPILL_INDIRECT_LEVELS from
5427 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5428 opnum, ADDR_TYPE (type), ind_levels, insn);
5429 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
5430 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5431 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5436 register int regno = REGNO (x);
5438 if (reg_equiv_constant[regno] != 0)
5440 find_reloads_address_part (reg_equiv_constant[regno], loc,
5441 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5442 GET_MODE (x), opnum, type, ind_levels);
5446 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5447 that feeds this insn. */
5448 if (reg_equiv_mem[regno] != 0)
5450 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
5451 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5452 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5457 if (reg_equiv_memory_loc[regno]
5458 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5460 rtx tem = make_memloc (x, regno);
5461 if (reg_equiv_address[regno] != 0
5462 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5465 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5466 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5471 if (reg_renumber[regno] >= 0)
5472 regno = reg_renumber[regno];
5474 if ((regno >= FIRST_PSEUDO_REGISTER
5475 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5476 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5478 push_reload (x, NULL_RTX, loc, NULL_PTR,
5479 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5480 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5484 /* If a register appearing in an address is the subject of a CLOBBER
5485 in this insn, reload it into some other register to be safe.
5486 The CLOBBER is supposed to make the register unavailable
5487 from before this insn to after it. */
5488 if (regno_clobbered_p (regno, this_insn))
5490 push_reload (x, NULL_RTX, loc, NULL_PTR,
5491 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5492 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5499 if (GET_CODE (SUBREG_REG (x)) == REG)
5501 /* If this is a SUBREG of a hard register and the resulting register
5502 is of the wrong class, reload the whole SUBREG. This avoids
5503 needless copies if SUBREG_REG is multi-word. */
5504 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5506 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5508 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5509 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5511 push_reload (x, NULL_RTX, loc, NULL_PTR,
5512 (context ? INDEX_REG_CLASS : BASE_REG_CLASS),
5513 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5517 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5518 is larger than the class size, then reload the whole SUBREG. */
5521 enum reg_class class = (context ? INDEX_REG_CLASS
5523 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5524 > reg_class_size[class])
5526 x = find_reloads_subreg_address (x, 0, opnum, type,
5528 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5529 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5541 register char *fmt = GET_RTX_FORMAT (code);
5544 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5547 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5548 opnum, type, ind_levels, insn);
5555 /* X, which is found at *LOC, is a part of an address that needs to be
5556 reloaded into a register of class CLASS. If X is a constant, or if
5557 X is a PLUS that contains a constant, check that the constant is a
5558 legitimate operand and that we are supposed to be able to load
5559 it into the register.
5561 If not, force the constant into memory and reload the MEM instead.
5563 MODE is the mode to use, in case X is an integer constant.
5565 OPNUM and TYPE describe the purpose of any reloads made.
5567 IND_LEVELS says how many levels of indirect addressing this machine
5571 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
5574 enum reg_class class;
5575 enum machine_mode mode;
5577 enum reload_type type;
5581 && (! LEGITIMATE_CONSTANT_P (x)
5582 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5586 /* If this is a CONST_INT, it could have been created by a
5587 plus_constant call in eliminate_regs, which means it may be
5588 on the reload_obstack. reload_obstack will be freed later, so
5589 we can't allow such RTL to be put in the constant pool. There
5590 is code in force_const_mem to check for this case, but it doesn't
5591 work because we have already popped off the reload_obstack, so
5592 rtl_obstack == saveable_obstack is true at this point. */
5593 if (GET_CODE (x) == CONST_INT)
5594 tem = x = force_const_mem (mode, GEN_INT (INTVAL (x)));
5596 tem = x = force_const_mem (mode, x);
5598 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5599 opnum, type, ind_levels, 0);
5602 else if (GET_CODE (x) == PLUS
5603 && CONSTANT_P (XEXP (x, 1))
5604 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5605 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5609 /* See comment above. */
5610 if (GET_CODE (XEXP (x, 1)) == CONST_INT)
5611 tem = force_const_mem (GET_MODE (x), GEN_INT (INTVAL (XEXP (x, 1))));
5613 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5615 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5616 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5617 opnum, type, ind_levels, 0);
5620 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5621 mode, VOIDmode, 0, 0, opnum, type);
5624 /* X, a subreg of a pseudo, is a part of an address that needs to be
5627 If the pseudo is equivalent to a memory location that cannot be directly
5628 addressed, make the necessary address reloads.
5630 If address reloads have been necessary, or if the address is changed
5631 by register elimination, return the rtx of the memory location;
5632 otherwise, return X.
5634 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5637 OPNUM and TYPE identify the purpose of the reload.
5639 IND_LEVELS says how many levels of indirect addressing are
5640 supported at this point in the address.
5642 INSN, if nonzero, is the insn in which we do the reload. It is used
5643 to determine where to put USEs for pseudos that we have to replace with
5647 find_reloads_subreg_address (x, force_replace, opnum, type,
5652 enum reload_type type;
5656 int regno = REGNO (SUBREG_REG (x));
5658 if (reg_equiv_memory_loc[regno])
5660 /* If the address is not directly addressable, or if the address is not
5661 offsettable, then it must be replaced. */
5663 && (reg_equiv_address[regno]
5664 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5667 if (force_replace || num_not_at_initial_offset)
5669 rtx tem = make_memloc (SUBREG_REG (x), regno);
5671 /* If the address changes because of register elimination, then
5672 it must be replaced. */
5674 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5676 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
5678 if (BYTES_BIG_ENDIAN)
5682 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5683 offset += MIN (size, UNITS_PER_WORD);
5684 size = GET_MODE_SIZE (GET_MODE (x));
5685 offset -= MIN (size, UNITS_PER_WORD);
5687 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5688 PUT_MODE (tem, GET_MODE (x));
5689 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5690 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
5692 /* If this is not a toplevel operand, find_reloads doesn't see
5693 this substitution. We have to emit a USE of the pseudo so
5694 that delete_output_reload can see it. */
5695 if (replace_reloads && recog_operand[opnum] != x)
5696 emit_insn_before (gen_rtx_USE (VOIDmode, SUBREG_REG (x)), insn);
5704 /* Substitute into the current INSN the registers into which we have reloaded
5705 the things that need reloading. The array `replacements'
5706 says contains the locations of all pointers that must be changed
5707 and says what to replace them with.
5709 Return the rtx that X translates into; usually X, but modified. */
5716 for (i = 0; i < n_replacements; i++)
5718 register struct replacement *r = &replacements[i];
5719 register rtx reloadreg = reload_reg_rtx[r->what];
5722 /* Encapsulate RELOADREG so its machine mode matches what
5723 used to be there. Note that gen_lowpart_common will
5724 do the wrong thing if RELOADREG is multi-word. RELOADREG
5725 will always be a REG here. */
5726 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5727 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5729 /* If we are putting this into a SUBREG and RELOADREG is a
5730 SUBREG, we would be making nested SUBREGs, so we have to fix
5731 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5733 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5735 if (GET_MODE (*r->subreg_loc)
5736 == GET_MODE (SUBREG_REG (reloadreg)))
5737 *r->subreg_loc = SUBREG_REG (reloadreg);
5740 *r->where = SUBREG_REG (reloadreg);
5741 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
5745 *r->where = reloadreg;
5747 /* If reload got no reg and isn't optional, something's wrong. */
5748 else if (! reload_optional[r->what])
5753 /* Make a copy of any replacements being done into X and move those copies
5754 to locations in Y, a copy of X. We only look at the highest level of
5758 copy_replacements (x, y)
5763 enum rtx_code code = GET_CODE (x);
5764 char *fmt = GET_RTX_FORMAT (code);
5765 struct replacement *r;
5767 /* We can't support X being a SUBREG because we might then need to know its
5768 location if something inside it was replaced. */
5772 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5774 for (j = 0; j < n_replacements; j++)
5776 if (replacements[j].subreg_loc == &XEXP (x, i))
5778 r = &replacements[n_replacements++];
5779 r->where = replacements[j].where;
5780 r->subreg_loc = &XEXP (y, i);
5781 r->what = replacements[j].what;
5782 r->mode = replacements[j].mode;
5784 else if (replacements[j].where == &XEXP (x, i))
5786 r = &replacements[n_replacements++];
5787 r->where = &XEXP (y, i);
5789 r->what = replacements[j].what;
5790 r->mode = replacements[j].mode;
5795 /* Change any replacements being done to *X to be done to *Y */
5798 move_replacements (x, y)
5804 for (i = 0; i < n_replacements; i++)
5805 if (replacements[i].subreg_loc == x)
5806 replacements[i].subreg_loc = y;
5807 else if (replacements[i].where == x)
5809 replacements[i].where = y;
5810 replacements[i].subreg_loc = 0;
5814 /* If LOC was scheduled to be replaced by something, return the replacement.
5815 Otherwise, return *LOC. */
5818 find_replacement (loc)
5821 struct replacement *r;
5823 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
5825 rtx reloadreg = reload_reg_rtx[r->what];
5827 if (reloadreg && r->where == loc)
5829 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
5830 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5834 else if (reloadreg && r->subreg_loc == loc)
5836 /* RELOADREG must be either a REG or a SUBREG.
5838 ??? Is it actually still ever a SUBREG? If so, why? */
5840 if (GET_CODE (reloadreg) == REG)
5841 return gen_rtx_REG (GET_MODE (*loc),
5842 REGNO (reloadreg) + SUBREG_WORD (*loc));
5843 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
5846 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
5847 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
5851 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5852 what's inside and make a new rtl if so. */
5853 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
5854 || GET_CODE (*loc) == MULT)
5856 rtx x = find_replacement (&XEXP (*loc, 0));
5857 rtx y = find_replacement (&XEXP (*loc, 1));
5859 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
5860 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
5866 /* Return nonzero if register in range [REGNO, ENDREGNO)
5867 appears either explicitly or implicitly in X
5868 other than being stored into (except for earlyclobber operands).
5870 References contained within the substructure at LOC do not count.
5871 LOC may be zero, meaning don't ignore anything.
5873 This is similar to refers_to_regno_p in rtlanal.c except that we
5874 look at equivalences for pseudos that didn't get hard registers. */
5877 refers_to_regno_for_reload_p (regno, endregno, x, loc)
5878 int regno, endregno;
5883 register RTX_CODE code;
5890 code = GET_CODE (x);
5897 /* If this is a pseudo, a hard register must not have been allocated.
5898 X must therefore either be a constant or be in memory. */
5899 if (i >= FIRST_PSEUDO_REGISTER)
5901 if (reg_equiv_memory_loc[i])
5902 return refers_to_regno_for_reload_p (regno, endregno,
5903 reg_equiv_memory_loc[i],
5906 if (reg_equiv_constant[i])
5912 return (endregno > i
5913 && regno < i + (i < FIRST_PSEUDO_REGISTER
5914 ? HARD_REGNO_NREGS (i, GET_MODE (x))
5918 /* If this is a SUBREG of a hard reg, we can see exactly which
5919 registers are being modified. Otherwise, handle normally. */
5920 if (GET_CODE (SUBREG_REG (x)) == REG
5921 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5923 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5925 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
5926 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5928 return endregno > inner_regno && regno < inner_endregno;
5934 if (&SET_DEST (x) != loc
5935 /* Note setting a SUBREG counts as referring to the REG it is in for
5936 a pseudo but not for hard registers since we can
5937 treat each word individually. */
5938 && ((GET_CODE (SET_DEST (x)) == SUBREG
5939 && loc != &SUBREG_REG (SET_DEST (x))
5940 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
5941 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
5942 && refers_to_regno_for_reload_p (regno, endregno,
5943 SUBREG_REG (SET_DEST (x)),
5945 /* If the output is an earlyclobber operand, this is
5947 || ((GET_CODE (SET_DEST (x)) != REG
5948 || earlyclobber_operand_p (SET_DEST (x)))
5949 && refers_to_regno_for_reload_p (regno, endregno,
5950 SET_DEST (x), loc))))
5953 if (code == CLOBBER || loc == &SET_SRC (x))
5962 /* X does not match, so try its subexpressions. */
5964 fmt = GET_RTX_FORMAT (code);
5965 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5967 if (fmt[i] == 'e' && loc != &XEXP (x, i))
5975 if (refers_to_regno_for_reload_p (regno, endregno,
5979 else if (fmt[i] == 'E')
5982 for (j = XVECLEN (x, i) - 1; j >=0; j--)
5983 if (loc != &XVECEXP (x, i, j)
5984 && refers_to_regno_for_reload_p (regno, endregno,
5985 XVECEXP (x, i, j), loc))
5992 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5993 we check if any register number in X conflicts with the relevant register
5994 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5995 contains a MEM (we don't bother checking for memory addresses that can't
5996 conflict because we expect this to be a rare case.
5998 This function is similar to reg_overlap_mention_p in rtlanal.c except
5999 that we look at equivalences for pseudos that didn't get hard registers. */
6002 reg_overlap_mentioned_for_reload_p (x, in)
6005 int regno, endregno;
6007 /* Overly conservative. */
6008 if (GET_CODE (x) == STRICT_LOW_PART)
6011 /* If either argument is a constant, then modifying X can not affect IN. */
6012 if (CONSTANT_P (x) || CONSTANT_P (in))
6014 else if (GET_CODE (x) == SUBREG)
6016 regno = REGNO (SUBREG_REG (x));
6017 if (regno < FIRST_PSEUDO_REGISTER)
6018 regno += SUBREG_WORD (x);
6020 else if (GET_CODE (x) == REG)
6024 /* If this is a pseudo, it must not have been assigned a hard register.
6025 Therefore, it must either be in memory or be a constant. */
6027 if (regno >= FIRST_PSEUDO_REGISTER)
6029 if (reg_equiv_memory_loc[regno])
6030 return refers_to_mem_for_reload_p (in);
6031 else if (reg_equiv_constant[regno])
6036 else if (GET_CODE (x) == MEM)
6037 return refers_to_mem_for_reload_p (in);
6038 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6039 || GET_CODE (x) == CC0)
6040 return reg_mentioned_p (x, in);
6044 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6045 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6047 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
6050 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6054 refers_to_mem_for_reload_p (x)
6060 if (GET_CODE (x) == MEM)
6063 if (GET_CODE (x) == REG)
6064 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6065 && reg_equiv_memory_loc[REGNO (x)]);
6067 fmt = GET_RTX_FORMAT (GET_CODE (x));
6068 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6070 && (GET_CODE (XEXP (x, i)) == MEM
6071 || refers_to_mem_for_reload_p (XEXP (x, i))))
6077 /* Check the insns before INSN to see if there is a suitable register
6078 containing the same value as GOAL.
6079 If OTHER is -1, look for a register in class CLASS.
6080 Otherwise, just see if register number OTHER shares GOAL's value.
6082 Return an rtx for the register found, or zero if none is found.
6084 If RELOAD_REG_P is (short *)1,
6085 we reject any hard reg that appears in reload_reg_rtx
6086 because such a hard reg is also needed coming into this insn.
6088 If RELOAD_REG_P is any other nonzero value,
6089 it is a vector indexed by hard reg number
6090 and we reject any hard reg whose element in the vector is nonnegative
6091 as well as any that appears in reload_reg_rtx.
6093 If GOAL is zero, then GOALREG is a register number; we look
6094 for an equivalent for that register.
6096 MODE is the machine mode of the value we want an equivalence for.
6097 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6099 This function is used by jump.c as well as in the reload pass.
6101 If GOAL is the sum of the stack pointer and a constant, we treat it
6102 as if it were a constant except that sp is required to be unchanging. */
6105 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
6108 enum reg_class class;
6110 short *reload_reg_p;
6112 enum machine_mode mode;
6114 register rtx p = insn;
6115 rtx goaltry, valtry, value, where;
6117 register int regno = -1;
6121 int goal_mem_addr_varies = 0;
6122 int need_stable_sp = 0;
6128 else if (GET_CODE (goal) == REG)
6129 regno = REGNO (goal);
6130 else if (GET_CODE (goal) == MEM)
6132 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6133 if (MEM_VOLATILE_P (goal))
6135 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
6137 /* An address with side effects must be reexecuted. */
6150 else if (CONSTANT_P (goal))
6152 else if (GET_CODE (goal) == PLUS
6153 && XEXP (goal, 0) == stack_pointer_rtx
6154 && CONSTANT_P (XEXP (goal, 1)))
6155 goal_const = need_stable_sp = 1;
6156 else if (GET_CODE (goal) == PLUS
6157 && XEXP (goal, 0) == frame_pointer_rtx
6158 && CONSTANT_P (XEXP (goal, 1)))
6163 /* On some machines, certain regs must always be rejected
6164 because they don't behave the way ordinary registers do. */
6166 #ifdef OVERLAPPING_REGNO_P
6167 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6168 && OVERLAPPING_REGNO_P (regno))
6172 /* Scan insns back from INSN, looking for one that copies
6173 a value into or out of GOAL.
6174 Stop and give up if we reach a label. */
6179 if (p == 0 || GET_CODE (p) == CODE_LABEL)
6181 if (GET_CODE (p) == INSN
6182 /* If we don't want spill regs ... */
6183 && (! (reload_reg_p != 0
6184 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6185 /* ... then ignore insns introduced by reload; they aren't useful
6186 and can cause results in reload_as_needed to be different
6187 from what they were when calculating the need for spills.
6188 If we notice an input-reload insn here, we will reject it below,
6189 but it might hide a usable equivalent. That makes bad code.
6190 It may even abort: perhaps no reg was spilled for this insn
6191 because it was assumed we would find that equivalent. */
6192 || INSN_UID (p) < reload_first_uid))
6195 pat = single_set (p);
6196 /* First check for something that sets some reg equal to GOAL. */
6199 && true_regnum (SET_SRC (pat)) == regno
6200 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6203 && true_regnum (SET_DEST (pat)) == regno
6204 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6206 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6207 /* When looking for stack pointer + const,
6208 make sure we don't use a stack adjust. */
6209 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6210 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6212 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6213 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6215 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6216 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6217 /* If we are looking for a constant,
6218 and something equivalent to that constant was copied
6219 into a reg, we can use that reg. */
6220 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6222 && rtx_equal_p (XEXP (tem, 0), goal)
6223 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6224 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6226 && GET_CODE (SET_DEST (pat)) == REG
6227 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6228 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
6229 && GET_CODE (goal) == CONST_INT
6230 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
6232 && rtx_equal_p (goal, goaltry)
6233 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
6235 && (valueno = true_regnum (valtry)) >= 0)
6236 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6238 && GET_CODE (SET_DEST (pat)) == REG
6239 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6240 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
6241 && GET_CODE (goal) == CONST_INT
6242 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6244 && rtx_equal_p (goal, goaltry)
6246 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6247 && (valueno = true_regnum (valtry)) >= 0)))
6250 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
6251 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6261 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6262 (or copying VALUE into GOAL, if GOAL is also a register).
6263 Now verify that VALUE is really valid. */
6265 /* VALUENO is the register number of VALUE; a hard register. */
6267 /* Don't try to re-use something that is killed in this insn. We want
6268 to be able to trust REG_UNUSED notes. */
6269 if (find_reg_note (where, REG_UNUSED, value))
6272 /* If we propose to get the value from the stack pointer or if GOAL is
6273 a MEM based on the stack pointer, we need a stable SP. */
6274 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6275 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6279 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6280 if (GET_MODE (value) != mode)
6283 /* Reject VALUE if it was loaded from GOAL
6284 and is also a register that appears in the address of GOAL. */
6286 if (goal_mem && value == SET_DEST (single_set (where))
6287 && refers_to_regno_for_reload_p (valueno,
6289 + HARD_REGNO_NREGS (valueno, mode)),
6293 /* Reject registers that overlap GOAL. */
6295 if (!goal_mem && !goal_const
6296 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
6297 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
6300 /* Reject VALUE if it is one of the regs reserved for reloads.
6301 Reload1 knows how to reuse them anyway, and it would get
6302 confused if we allocated one without its knowledge.
6303 (Now that insns introduced by reload are ignored above,
6304 this case shouldn't happen, but I'm not positive.) */
6306 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
6307 && reload_reg_p[valueno] >= 0)
6310 /* On some machines, certain regs must always be rejected
6311 because they don't behave the way ordinary registers do. */
6313 #ifdef OVERLAPPING_REGNO_P
6314 if (OVERLAPPING_REGNO_P (valueno))
6318 nregs = HARD_REGNO_NREGS (regno, mode);
6319 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6321 /* Reject VALUE if it is a register being used for an input reload
6322 even if it is not one of those reserved. */
6324 if (reload_reg_p != 0)
6327 for (i = 0; i < n_reloads; i++)
6328 if (reload_reg_rtx[i] != 0 && reload_in[i])
6330 int regno1 = REGNO (reload_reg_rtx[i]);
6331 int nregs1 = HARD_REGNO_NREGS (regno1,
6332 GET_MODE (reload_reg_rtx[i]));
6333 if (regno1 < valueno + valuenregs
6334 && regno1 + nregs1 > valueno)
6340 /* We must treat frame pointer as varying here,
6341 since it can vary--in a nonlocal goto as generated by expand_goto. */
6342 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6344 /* Now verify that the values of GOAL and VALUE remain unaltered
6345 until INSN is reached. */
6354 /* Don't trust the conversion past a function call
6355 if either of the two is in a call-clobbered register, or memory. */
6356 if (GET_CODE (p) == CALL_INSN
6357 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6358 && call_used_regs[regno])
6360 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
6361 && call_used_regs[valueno])
6367 #ifdef NON_SAVING_SETJMP
6368 if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE
6369 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6373 #ifdef INSN_CLOBBERS_REGNO_P
6374 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
6375 && INSN_CLOBBERS_REGNO_P (p, valueno))
6376 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
6377 && INSN_CLOBBERS_REGNO_P (p, regno)))
6381 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
6385 /* Watch out for unspec_volatile, and volatile asms. */
6386 if (volatile_insn_p (pat))
6389 /* If this insn P stores in either GOAL or VALUE, return 0.
6390 If GOAL is a memory ref and this insn writes memory, return 0.
6391 If GOAL is a memory ref and its address is not constant,
6392 and this insn P changes a register used in GOAL, return 0. */
6394 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6396 register rtx dest = SET_DEST (pat);
6397 while (GET_CODE (dest) == SUBREG
6398 || GET_CODE (dest) == ZERO_EXTRACT
6399 || GET_CODE (dest) == SIGN_EXTRACT
6400 || GET_CODE (dest) == STRICT_LOW_PART)
6401 dest = XEXP (dest, 0);
6402 if (GET_CODE (dest) == REG)
6404 register int xregno = REGNO (dest);
6406 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6407 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6410 if (xregno < regno + nregs && xregno + xnregs > regno)
6412 if (xregno < valueno + valuenregs
6413 && xregno + xnregs > valueno)
6415 if (goal_mem_addr_varies
6416 && reg_overlap_mentioned_for_reload_p (dest, goal))
6418 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6421 else if (goal_mem && GET_CODE (dest) == MEM
6422 && ! push_operand (dest, GET_MODE (dest)))
6424 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6425 && reg_equiv_memory_loc[regno] != 0)
6427 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6430 else if (GET_CODE (pat) == PARALLEL)
6433 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6435 register rtx v1 = XVECEXP (pat, 0, i);
6436 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6438 register rtx dest = SET_DEST (v1);
6439 while (GET_CODE (dest) == SUBREG
6440 || GET_CODE (dest) == ZERO_EXTRACT
6441 || GET_CODE (dest) == SIGN_EXTRACT
6442 || GET_CODE (dest) == STRICT_LOW_PART)
6443 dest = XEXP (dest, 0);
6444 if (GET_CODE (dest) == REG)
6446 register int xregno = REGNO (dest);
6448 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6449 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6452 if (xregno < regno + nregs
6453 && xregno + xnregs > regno)
6455 if (xregno < valueno + valuenregs
6456 && xregno + xnregs > valueno)
6458 if (goal_mem_addr_varies
6459 && reg_overlap_mentioned_for_reload_p (dest,
6462 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6465 else if (goal_mem && GET_CODE (dest) == MEM
6466 && ! push_operand (dest, GET_MODE (dest)))
6468 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6469 && reg_equiv_memory_loc[regno] != 0)
6471 else if (need_stable_sp
6472 && push_operand (dest, GET_MODE (dest)))
6478 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
6482 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6483 link = XEXP (link, 1))
6485 pat = XEXP (link, 0);
6486 if (GET_CODE (pat) == CLOBBER)
6488 register rtx dest = SET_DEST (pat);
6489 while (GET_CODE (dest) == SUBREG
6490 || GET_CODE (dest) == ZERO_EXTRACT
6491 || GET_CODE (dest) == SIGN_EXTRACT
6492 || GET_CODE (dest) == STRICT_LOW_PART)
6493 dest = XEXP (dest, 0);
6494 if (GET_CODE (dest) == REG)
6496 register int xregno = REGNO (dest);
6498 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6499 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6502 if (xregno < regno + nregs
6503 && xregno + xnregs > regno)
6505 if (xregno < valueno + valuenregs
6506 && xregno + xnregs > valueno)
6508 if (goal_mem_addr_varies
6509 && reg_overlap_mentioned_for_reload_p (dest,
6513 else if (goal_mem && GET_CODE (dest) == MEM
6514 && ! push_operand (dest, GET_MODE (dest)))
6516 else if (need_stable_sp
6517 && push_operand (dest, GET_MODE (dest)))
6524 /* If this insn auto-increments or auto-decrements
6525 either regno or valueno, return 0 now.
6526 If GOAL is a memory ref and its address is not constant,
6527 and this insn P increments a register used in GOAL, return 0. */
6531 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6532 if (REG_NOTE_KIND (link) == REG_INC
6533 && GET_CODE (XEXP (link, 0)) == REG)
6535 register int incno = REGNO (XEXP (link, 0));
6536 if (incno < regno + nregs && incno >= regno)
6538 if (incno < valueno + valuenregs && incno >= valueno)
6540 if (goal_mem_addr_varies
6541 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6551 /* Find a place where INCED appears in an increment or decrement operator
6552 within X, and return the amount INCED is incremented or decremented by.
6553 The value is always positive. */
6556 find_inc_amount (x, inced)
6559 register enum rtx_code code = GET_CODE (x);
6565 register rtx addr = XEXP (x, 0);
6566 if ((GET_CODE (addr) == PRE_DEC
6567 || GET_CODE (addr) == POST_DEC
6568 || GET_CODE (addr) == PRE_INC
6569 || GET_CODE (addr) == POST_INC)
6570 && XEXP (addr, 0) == inced)
6571 return GET_MODE_SIZE (GET_MODE (x));
6574 fmt = GET_RTX_FORMAT (code);
6575 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6579 register int tem = find_inc_amount (XEXP (x, i), inced);
6586 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6588 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6598 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6601 regno_clobbered_p (regno, insn)
6605 if (GET_CODE (PATTERN (insn)) == CLOBBER
6606 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6607 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
6609 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6611 int i = XVECLEN (PATTERN (insn), 0) - 1;
6615 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6616 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
6617 && REGNO (XEXP (elt, 0)) == regno)
6625 static char *reload_when_needed_name[] =
6628 "RELOAD_FOR_OUTPUT",
6630 "RELOAD_FOR_INPUT_ADDRESS",
6631 "RELOAD_FOR_INPADDR_ADDRESS",
6632 "RELOAD_FOR_OUTPUT_ADDRESS",
6633 "RELOAD_FOR_OUTADDR_ADDRESS",
6634 "RELOAD_FOR_OPERAND_ADDRESS",
6635 "RELOAD_FOR_OPADDR_ADDR",
6637 "RELOAD_FOR_OTHER_ADDRESS"
6640 static char *reg_class_names[] = REG_CLASS_NAMES;
6642 /* These functions are used to print the variables set by 'find_reloads' */
6645 debug_reload_to_stream (f)
6653 for (r = 0; r < n_reloads; r++)
6655 fprintf (f, "Reload %d: ", r);
6657 if (reload_in[r] != 0)
6659 fprintf (f, "reload_in (%s) = ",
6660 GET_MODE_NAME (reload_inmode[r]));
6661 print_inline_rtx (f, reload_in[r], 24);
6662 fprintf (f, "\n\t");
6665 if (reload_out[r] != 0)
6667 fprintf (f, "reload_out (%s) = ",
6668 GET_MODE_NAME (reload_outmode[r]));
6669 print_inline_rtx (f, reload_out[r], 24);
6670 fprintf (f, "\n\t");
6673 fprintf (f, "%s, ", reg_class_names[(int) reload_reg_class[r]]);
6675 fprintf (f, "%s (opnum = %d)",
6676 reload_when_needed_name[(int) reload_when_needed[r]],
6679 if (reload_optional[r])
6680 fprintf (f, ", optional");
6682 if (reload_nongroup[r])
6683 fprintf (stderr, ", nongroup");
6685 if (reload_inc[r] != 0)
6686 fprintf (f, ", inc by %d", reload_inc[r]);
6688 if (reload_nocombine[r])
6689 fprintf (f, ", can't combine");
6691 if (reload_secondary_p[r])
6692 fprintf (f, ", secondary_reload_p");
6694 if (reload_in_reg[r] != 0)
6696 fprintf (f, "\n\treload_in_reg: ");
6697 print_inline_rtx (f, reload_in_reg[r], 24);
6700 if (reload_out_reg[r] != 0)
6702 fprintf (f, "\n\treload_out_reg: ");
6703 print_inline_rtx (f, reload_out_reg[r], 24);
6706 if (reload_reg_rtx[r] != 0)
6708 fprintf (f, "\n\treload_reg_rtx: ");
6709 print_inline_rtx (f, reload_reg_rtx[r], 24);
6713 if (reload_secondary_in_reload[r] != -1)
6715 fprintf (f, "%ssecondary_in_reload = %d",
6716 prefix, reload_secondary_in_reload[r]);
6720 if (reload_secondary_out_reload[r] != -1)
6721 fprintf (f, "%ssecondary_out_reload = %d\n",
6722 prefix, reload_secondary_out_reload[r]);
6725 if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
6727 fprintf (stderr, "%ssecondary_in_icode = %s", prefix,
6728 insn_name[reload_secondary_in_icode[r]]);
6732 if (reload_secondary_out_icode[r] != CODE_FOR_nothing)
6733 fprintf (stderr, "%ssecondary_out_icode = %s", prefix,
6734 insn_name[reload_secondary_out_icode[r]]);
6743 debug_reload_to_stream (stderr);