1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92-5, 1996 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
93 #include "insn-config.h"
94 #include "insn-codes.h"
98 #include "hard-reg-set.h"
103 #ifndef REGISTER_MOVE_COST
104 #define REGISTER_MOVE_COST(x, y) 2
107 /* The variables set up by `find_reloads' are:
109 n_reloads number of distinct reloads needed; max reload # + 1
110 tables indexed by reload number
111 reload_in rtx for value to reload from
112 reload_out rtx for where to store reload-reg afterward if nec
113 (often the same as reload_in)
114 reload_reg_class enum reg_class, saying what regs to reload into
115 reload_inmode enum machine_mode; mode this operand should have
116 when reloaded, on input.
117 reload_outmode enum machine_mode; mode this operand should have
118 when reloaded, on output.
119 reload_optional char, nonzero for an optional reload.
120 Optional reloads are ignored unless the
121 value is already sitting in a register.
122 reload_inc int, positive amount to increment or decrement by if
123 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
124 Ignored otherwise (don't assume it is zero).
125 reload_in_reg rtx. A reg for which reload_in is the equivalent.
126 If reload_in is a symbol_ref which came from
127 reg_equiv_constant, then this is the pseudo
128 which has that symbol_ref as equivalent.
129 reload_reg_rtx rtx. This is the register to reload into.
130 If it is zero when `find_reloads' returns,
131 you must find a suitable register in the class
132 specified by reload_reg_class, and store here
133 an rtx for that register with mode from
134 reload_inmode or reload_outmode.
135 reload_nocombine char, nonzero if this reload shouldn't be
136 combined with another reload.
137 reload_opnum int, operand number being reloaded. This is
138 used to group related reloads and need not always
139 be equal to the actual operand number in the insn,
140 though it current will be; for in-out operands, it
141 is one of the two operand numbers.
142 reload_when_needed enum, classifies reload as needed either for
143 addressing an input reload, addressing an output,
144 for addressing a non-reloaded mem ref,
145 or for unspecified purposes (i.e., more than one
147 reload_secondary_p int, 1 if this is a secondary register for one
149 reload_secondary_in_reload
150 reload_secondary_out_reload
151 int, gives the reload number of a secondary
152 reload, when needed; otherwise -1
153 reload_secondary_in_icode
154 reload_secondary_out_icode
155 enum insn_code, if a secondary reload is required,
156 gives the INSN_CODE that uses the secondary
157 reload as a scratch register, or CODE_FOR_nothing
158 if the secondary reload register is to be an
159 intermediate register. */
162 rtx reload_in[MAX_RELOADS];
163 rtx reload_out[MAX_RELOADS];
164 enum reg_class reload_reg_class[MAX_RELOADS];
165 enum machine_mode reload_inmode[MAX_RELOADS];
166 enum machine_mode reload_outmode[MAX_RELOADS];
167 rtx reload_reg_rtx[MAX_RELOADS];
168 char reload_optional[MAX_RELOADS];
169 int reload_inc[MAX_RELOADS];
170 rtx reload_in_reg[MAX_RELOADS];
171 char reload_nocombine[MAX_RELOADS];
172 int reload_opnum[MAX_RELOADS];
173 enum reload_type reload_when_needed[MAX_RELOADS];
174 int reload_secondary_p[MAX_RELOADS];
175 int reload_secondary_in_reload[MAX_RELOADS];
176 int reload_secondary_out_reload[MAX_RELOADS];
177 enum insn_code reload_secondary_in_icode[MAX_RELOADS];
178 enum insn_code reload_secondary_out_icode[MAX_RELOADS];
180 /* All the "earlyclobber" operands of the current insn
181 are recorded here. */
183 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
185 int reload_n_operands;
187 /* Replacing reloads.
189 If `replace_reloads' is nonzero, then as each reload is recorded
190 an entry is made for it in the table `replacements'.
191 Then later `subst_reloads' can look through that table and
192 perform all the replacements needed. */
194 /* Nonzero means record the places to replace. */
195 static int replace_reloads;
197 /* Each replacement is recorded with a structure like this. */
200 rtx *where; /* Location to store in */
201 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
202 a SUBREG; 0 otherwise. */
203 int what; /* which reload this is for */
204 enum machine_mode mode; /* mode it must have */
207 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
209 /* Number of replacements currently recorded. */
210 static int n_replacements;
212 /* Used to track what is modified by an operand. */
215 int reg_flag; /* Nonzero if referencing a register. */
216 int safe; /* Nonzero if this can't conflict with anything. */
217 rtx base; /* Base address for MEM. */
218 HOST_WIDE_INT start; /* Starting offset or register number. */
219 HOST_WIDE_INT end; /* Ending offset or register number. */
222 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
223 (see reg_equiv_address). */
224 static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
225 static int n_memlocs;
227 #ifdef SECONDARY_MEMORY_NEEDED
229 /* Save MEMs needed to copy from one class of registers to another. One MEM
230 is used per mode, but normally only one or two modes are ever used.
232 We keep two versions, before and after register elimination. The one
233 after register elimination is record separately for each operand. This
234 is done in case the address is not valid to be sure that we separately
237 static rtx secondary_memlocs[NUM_MACHINE_MODES];
238 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
241 /* The instruction we are doing reloads for;
242 so we can test whether a register dies in it. */
243 static rtx this_insn;
245 /* Nonzero if this instruction is a user-specified asm with operands. */
246 static int this_insn_is_asm;
248 /* If hard_regs_live_known is nonzero,
249 we can tell which hard regs are currently live,
250 at least enough to succeed in choosing dummy reloads. */
251 static int hard_regs_live_known;
253 /* Indexed by hard reg number,
254 element is nonegative if hard reg has been spilled.
255 This vector is passed to `find_reloads' as an argument
256 and is not changed here. */
257 static short *static_reload_reg_p;
259 /* Set to 1 in subst_reg_equivs if it changes anything. */
260 static int subst_reg_equivs_changed;
262 /* On return from push_reload, holds the reload-number for the OUT
263 operand, which can be different for that from the input operand. */
264 static int output_reloadnum;
266 /* Compare two RTX's. */
267 #define MATCHES(x, y) \
268 (x == y || (x != 0 && (GET_CODE (x) == REG \
269 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
270 : rtx_equal_p (x, y) && ! side_effects_p (x))))
272 /* Indicates if two reloads purposes are for similar enough things that we
273 can merge their reloads. */
274 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
275 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
276 || ((when1) == (when2) && (op1) == (op2)) \
277 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
278 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
279 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
280 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
281 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
283 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
284 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
285 ((when1) != (when2) \
286 || ! ((op1) == (op2) \
287 || (when1) == RELOAD_FOR_INPUT \
288 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
289 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
291 static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class,
292 enum machine_mode, enum reload_type,
294 static enum reg_class find_valid_class PROTO((enum machine_mode, int));
295 static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
296 enum machine_mode, enum machine_mode,
297 int, int, int, enum reload_type));
298 static void push_replacement PROTO((rtx *, int, enum machine_mode));
299 static void combine_reloads PROTO((void));
300 static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
301 enum machine_mode, enum machine_mode,
302 enum reg_class, int));
303 static int earlyclobber_operand_p PROTO((rtx));
304 static int hard_reg_set_here_p PROTO((int, int, rtx));
305 static struct decomposition decompose PROTO((rtx));
306 static int immune_p PROTO((rtx, rtx, struct decomposition));
307 static int alternative_allows_memconst PROTO((char *, int));
308 static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int));
309 static rtx make_memloc PROTO((rtx, int));
310 static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
311 int, enum reload_type, int));
312 static rtx subst_reg_equivs PROTO((rtx));
313 static rtx subst_indexed_address PROTO((rtx));
314 static int find_reloads_address_1 PROTO((rtx, int, rtx *, int,
315 enum reload_type,int));
316 static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
317 enum machine_mode, int,
318 enum reload_type, int));
319 static int find_inc_amount PROTO((rtx, rtx));
321 #ifdef HAVE_SECONDARY_RELOADS
323 /* Determine if any secondary reloads are needed for loading (if IN_P is
324 non-zero) or storing (if IN_P is zero) X to or from a reload register of
325 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
326 are needed, push them.
328 Return the reload number of the secondary reload we made, or -1 if
329 we didn't need one. *PICODE is set to the insn_code to use if we do
330 need a secondary reload. */
333 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
339 enum reg_class reload_class;
340 enum machine_mode reload_mode;
341 enum reload_type type;
342 enum insn_code *picode;
344 enum reg_class class = NO_REGS;
345 enum machine_mode mode = reload_mode;
346 enum insn_code icode = CODE_FOR_nothing;
347 enum reg_class t_class = NO_REGS;
348 enum machine_mode t_mode = VOIDmode;
349 enum insn_code t_icode = CODE_FOR_nothing;
350 enum reload_type secondary_type;
352 int s_reload, t_reload = -1;
354 if (type == RELOAD_FOR_INPUT_ADDRESS || type == RELOAD_FOR_OUTPUT_ADDRESS)
355 secondary_type = type;
357 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
359 *picode = CODE_FOR_nothing;
361 /* If X is a paradoxical SUBREG, use the inner value to determine both the
362 mode and object being reloaded. */
363 if (GET_CODE (x) == SUBREG
364 #ifdef CLASS_CANNOT_CHANGE_SIZE
365 && reload_class != CLASS_CANNOT_CHANGE_SIZE
367 && (GET_MODE_SIZE (GET_MODE (x))
368 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
371 reload_mode = GET_MODE (x);
374 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
375 is still a pseudo-register by now, it *must* have an equivalent MEM
376 but we don't want to assume that), use that equivalent when seeing if
377 a secondary reload is needed since whether or not a reload is needed
378 might be sensitive to the form of the MEM. */
380 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
381 && reg_equiv_mem[REGNO (x)] != 0)
382 x = reg_equiv_mem[REGNO (x)];
384 #ifdef SECONDARY_INPUT_RELOAD_CLASS
386 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
389 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
391 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
394 /* If we don't need any secondary registers, done. */
395 if (class == NO_REGS)
398 /* Get a possible insn to use. If the predicate doesn't accept X, don't
401 icode = (in_p ? reload_in_optab[(int) reload_mode]
402 : reload_out_optab[(int) reload_mode]);
404 if (icode != CODE_FOR_nothing
405 && insn_operand_predicate[(int) icode][in_p]
406 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
407 icode = CODE_FOR_nothing;
409 /* If we will be using an insn, see if it can directly handle the reload
410 register we will be using. If it can, the secondary reload is for a
411 scratch register. If it can't, we will use the secondary reload for
412 an intermediate register and require a tertiary reload for the scratch
415 if (icode != CODE_FOR_nothing)
417 /* If IN_P is non-zero, the reload register will be the output in
418 operand 0. If IN_P is zero, the reload register will be the input
419 in operand 1. Outputs should have an initial "=", which we must
422 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
423 enum reg_class insn_class
424 = (insn_letter == 'r' ? GENERAL_REGS
425 : REG_CLASS_FROM_LETTER (insn_letter));
427 if (insn_class == NO_REGS
428 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
429 /* The scratch register's constraint must start with "=&". */
430 || insn_operand_constraint[(int) icode][2][0] != '='
431 || insn_operand_constraint[(int) icode][2][1] != '&')
434 if (reg_class_subset_p (reload_class, insn_class))
435 mode = insn_operand_mode[(int) icode][2];
438 char t_letter = insn_operand_constraint[(int) icode][2][2];
440 t_mode = insn_operand_mode[(int) icode][2];
441 t_class = (t_letter == 'r' ? GENERAL_REGS
442 : REG_CLASS_FROM_LETTER (t_letter));
444 icode = CODE_FOR_nothing;
448 /* This case isn't valid, so fail. Reload is allowed to use the same
449 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
450 in the case of a secondary register, we actually need two different
451 registers for correct code. We fail here to prevent the possibility of
452 silently generating incorrect code later.
454 The convention is that secondary input reloads are valid only if the
455 secondary_class is different from class. If you have such a case, you
456 can not use secondary reloads, you must work around the problem some
459 Allow this when MODE is not reload_mode and assume that the generated
460 code handles this case (it does on the Alpha, which is the only place
461 this currently happens). */
463 if (in_p && class == reload_class && mode == reload_mode)
466 /* If we need a tertiary reload, see if we have one we can reuse or else
469 if (t_class != NO_REGS)
471 for (t_reload = 0; t_reload < n_reloads; t_reload++)
472 if (reload_secondary_p[t_reload]
473 && (reg_class_subset_p (t_class, reload_reg_class[t_reload])
474 || reg_class_subset_p (reload_reg_class[t_reload], t_class))
475 && ((in_p && reload_inmode[t_reload] == t_mode)
476 || (! in_p && reload_outmode[t_reload] == t_mode))
477 && ((in_p && (reload_secondary_in_icode[t_reload]
478 == CODE_FOR_nothing))
479 || (! in_p &&(reload_secondary_out_icode[t_reload]
480 == CODE_FOR_nothing)))
481 && (reg_class_size[(int) t_class] == 1
482 #ifdef SMALL_REGISTER_CLASSES
486 && MERGABLE_RELOADS (secondary_type,
487 reload_when_needed[t_reload],
488 opnum, reload_opnum[t_reload]))
491 reload_inmode[t_reload] = t_mode;
493 reload_outmode[t_reload] = t_mode;
495 if (reg_class_subset_p (t_class, reload_reg_class[t_reload]))
496 reload_reg_class[t_reload] = t_class;
498 reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum);
499 reload_optional[t_reload] &= optional;
500 reload_secondary_p[t_reload] = 1;
501 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload],
502 opnum, reload_opnum[t_reload]))
503 reload_when_needed[t_reload] = RELOAD_OTHER;
506 if (t_reload == n_reloads)
508 /* We need to make a new tertiary reload for this register class. */
509 reload_in[t_reload] = reload_out[t_reload] = 0;
510 reload_reg_class[t_reload] = t_class;
511 reload_inmode[t_reload] = in_p ? t_mode : VOIDmode;
512 reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode;
513 reload_reg_rtx[t_reload] = 0;
514 reload_optional[t_reload] = optional;
515 reload_inc[t_reload] = 0;
516 /* Maybe we could combine these, but it seems too tricky. */
517 reload_nocombine[t_reload] = 1;
518 reload_in_reg[t_reload] = 0;
519 reload_opnum[t_reload] = opnum;
520 reload_when_needed[t_reload] = secondary_type;
521 reload_secondary_in_reload[t_reload] = -1;
522 reload_secondary_out_reload[t_reload] = -1;
523 reload_secondary_in_icode[t_reload] = CODE_FOR_nothing;
524 reload_secondary_out_icode[t_reload] = CODE_FOR_nothing;
525 reload_secondary_p[t_reload] = 1;
531 /* See if we can reuse an existing secondary reload. */
532 for (s_reload = 0; s_reload < n_reloads; s_reload++)
533 if (reload_secondary_p[s_reload]
534 && (reg_class_subset_p (class, reload_reg_class[s_reload])
535 || reg_class_subset_p (reload_reg_class[s_reload], class))
536 && ((in_p && reload_inmode[s_reload] == mode)
537 || (! in_p && reload_outmode[s_reload] == mode))
538 && ((in_p && reload_secondary_in_reload[s_reload] == t_reload)
539 || (! in_p && reload_secondary_out_reload[s_reload] == t_reload))
540 && ((in_p && reload_secondary_in_icode[s_reload] == t_icode)
541 || (! in_p && reload_secondary_out_icode[s_reload] == t_icode))
542 && (reg_class_size[(int) class] == 1
543 #ifdef SMALL_REGISTER_CLASSES
547 && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload],
548 opnum, reload_opnum[s_reload]))
551 reload_inmode[s_reload] = mode;
553 reload_outmode[s_reload] = mode;
555 if (reg_class_subset_p (class, reload_reg_class[s_reload]))
556 reload_reg_class[s_reload] = class;
558 reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum);
559 reload_optional[s_reload] &= optional;
560 reload_secondary_p[s_reload] = 1;
561 if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload],
562 opnum, reload_opnum[s_reload]))
563 reload_when_needed[s_reload] = RELOAD_OTHER;
566 if (s_reload == n_reloads)
568 /* We need to make a new secondary reload for this register class. */
569 reload_in[s_reload] = reload_out[s_reload] = 0;
570 reload_reg_class[s_reload] = class;
572 reload_inmode[s_reload] = in_p ? mode : VOIDmode;
573 reload_outmode[s_reload] = ! in_p ? mode : VOIDmode;
574 reload_reg_rtx[s_reload] = 0;
575 reload_optional[s_reload] = optional;
576 reload_inc[s_reload] = 0;
577 /* Maybe we could combine these, but it seems too tricky. */
578 reload_nocombine[s_reload] = 1;
579 reload_in_reg[s_reload] = 0;
580 reload_opnum[s_reload] = opnum;
581 reload_when_needed[s_reload] = secondary_type;
582 reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1;
583 reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1;
584 reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing;
585 reload_secondary_out_icode[s_reload]
586 = ! in_p ? t_icode : CODE_FOR_nothing;
587 reload_secondary_p[s_reload] = 1;
591 #ifdef SECONDARY_MEMORY_NEEDED
592 /* If we need a memory location to copy between the two reload regs,
595 if (in_p && icode == CODE_FOR_nothing
596 && SECONDARY_MEMORY_NEEDED (class, reload_class, reload_mode))
597 get_secondary_mem (x, reload_mode, opnum, type);
599 if (! in_p && icode == CODE_FOR_nothing
600 && SECONDARY_MEMORY_NEEDED (reload_class, class, reload_mode))
601 get_secondary_mem (x, reload_mode, opnum, type);
608 #endif /* HAVE_SECONDARY_RELOADS */
610 #ifdef SECONDARY_MEMORY_NEEDED
612 /* Return a memory location that will be used to copy X in mode MODE.
613 If we haven't already made a location for this mode in this insn,
614 call find_reloads_address on the location being returned. */
617 get_secondary_mem (x, mode, opnum, type)
619 enum machine_mode mode;
621 enum reload_type type;
626 /* By default, if MODE is narrower than a word, widen it to a word.
627 This is required because most machines that require these memory
628 locations do not support short load and stores from all registers
629 (e.g., FP registers). */
631 #ifdef SECONDARY_MEMORY_NEEDED_MODE
632 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
634 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
635 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
638 /* If we already have made a MEM for this operand in MODE, return it. */
639 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
640 return secondary_memlocs_elim[(int) mode][opnum];
642 /* If this is the first time we've tried to get a MEM for this mode,
643 allocate a new one. `something_changed' in reload will get set
644 by noticing that the frame size has changed. */
646 if (secondary_memlocs[(int) mode] == 0)
648 #ifdef SECONDARY_MEMORY_NEEDED_RTX
649 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
651 secondary_memlocs[(int) mode]
652 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
656 /* Get a version of the address doing any eliminations needed. If that
657 didn't give us a new MEM, make a new one if it isn't valid. */
659 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
660 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
662 if (! mem_valid && loc == secondary_memlocs[(int) mode])
663 loc = copy_rtx (loc);
665 /* The only time the call below will do anything is if the stack
666 offset is too large. In that case IND_LEVELS doesn't matter, so we
667 can just pass a zero. Adjust the type to be the address of the
668 corresponding object. If the address was valid, save the eliminated
669 address. If it wasn't valid, we need to make a reload each time, so
674 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
675 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
678 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
682 secondary_memlocs_elim[(int) mode][opnum] = loc;
686 /* Clear any secondary memory locations we've made. */
689 clear_secondary_mem ()
691 bzero ((char *) secondary_memlocs, sizeof secondary_memlocs);
693 #endif /* SECONDARY_MEMORY_NEEDED */
695 /* Find the largest class for which every register number plus N is valid in
696 M1 (if in range). Abort if no such class exists. */
698 static enum reg_class
699 find_valid_class (m1, n)
700 enum machine_mode m1;
705 enum reg_class best_class;
708 for (class = 1; class < N_REG_CLASSES; class++)
711 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
712 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
713 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
714 && ! HARD_REGNO_MODE_OK (regno + n, m1))
717 if (! bad && reg_class_size[class] > best_size)
718 best_class = class, best_size = reg_class_size[class];
727 /* Record one reload that needs to be performed.
728 IN is an rtx saying where the data are to be found before this instruction.
729 OUT says where they must be stored after the instruction.
730 (IN is zero for data not read, and OUT is zero for data not written.)
731 INLOC and OUTLOC point to the places in the instructions where
732 IN and OUT were found.
733 If IN and OUT are both non-zero, it means the same register must be used
734 to reload both IN and OUT.
736 CLASS is a register class required for the reloaded data.
737 INMODE is the machine mode that the instruction requires
738 for the reg that replaces IN and OUTMODE is likewise for OUT.
740 If IN is zero, then OUT's location and mode should be passed as
743 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
745 OPTIONAL nonzero means this reload does not need to be performed:
746 it can be discarded if that is more convenient.
748 OPNUM and TYPE say what the purpose of this reload is.
750 The return value is the reload-number for this reload.
752 If both IN and OUT are nonzero, in some rare cases we might
753 want to make two separate reloads. (Actually we never do this now.)
754 Therefore, the reload-number for OUT is stored in
755 output_reloadnum when we return; the return value applies to IN.
756 Usually (presently always), when IN and OUT are nonzero,
757 the two reload-numbers are equal, but the caller should be careful to
761 push_reload (in, out, inloc, outloc, class,
762 inmode, outmode, strict_low, optional, opnum, type)
763 register rtx in, out;
765 enum reg_class class;
766 enum machine_mode inmode, outmode;
770 enum reload_type type;
774 int dont_remove_subreg = 0;
775 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
776 int secondary_in_reload = -1, secondary_out_reload = -1;
777 enum insn_code secondary_in_icode = CODE_FOR_nothing;
778 enum insn_code secondary_out_icode = CODE_FOR_nothing;
780 /* INMODE and/or OUTMODE could be VOIDmode if no mode
781 has been specified for the operand. In that case,
782 use the operand's mode as the mode to reload. */
783 if (inmode == VOIDmode && in != 0)
784 inmode = GET_MODE (in);
785 if (outmode == VOIDmode && out != 0)
786 outmode = GET_MODE (out);
788 /* If IN is a pseudo register everywhere-equivalent to a constant, and
789 it is not in a hard register, reload straight from the constant,
790 since we want to get rid of such pseudo registers.
791 Often this is done earlier, but not always in find_reloads_address. */
792 if (in != 0 && GET_CODE (in) == REG)
794 register int regno = REGNO (in);
796 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
797 && reg_equiv_constant[regno] != 0)
798 in = reg_equiv_constant[regno];
801 /* Likewise for OUT. Of course, OUT will never be equivalent to
802 an actual constant, but it might be equivalent to a memory location
803 (in the case of a parameter). */
804 if (out != 0 && GET_CODE (out) == REG)
806 register int regno = REGNO (out);
808 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
809 && reg_equiv_constant[regno] != 0)
810 out = reg_equiv_constant[regno];
813 /* If we have a read-write operand with an address side-effect,
814 change either IN or OUT so the side-effect happens only once. */
815 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
817 if (GET_CODE (XEXP (in, 0)) == POST_INC
818 || GET_CODE (XEXP (in, 0)) == POST_DEC)
819 in = gen_rtx (MEM, GET_MODE (in), XEXP (XEXP (in, 0), 0));
820 if (GET_CODE (XEXP (in, 0)) == PRE_INC
821 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
822 out = gen_rtx (MEM, GET_MODE (out), XEXP (XEXP (out, 0), 0));
825 /* If we are reloading a (SUBREG constant ...), really reload just the
826 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
827 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
828 a pseudo and hence will become a MEM) with M1 wider than M2 and the
829 register is a pseudo, also reload the inside expression.
830 For machines that extend byte loads, do this for any SUBREG of a pseudo
831 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
832 M2 is an integral mode that gets extended when loaded.
833 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
834 either M1 is not valid for R or M2 is wider than a word but we only
835 need one word to store an M2-sized quantity in R.
836 (However, if OUT is nonzero, we need to reload the reg *and*
837 the subreg, so do nothing here, and let following statement handle it.)
839 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
840 we can't handle it here because CONST_INT does not indicate a mode.
842 Similarly, we must reload the inside expression if we have a
843 STRICT_LOW_PART (presumably, in == out in the cas).
845 Also reload the inner expression if it does not require a secondary
846 reload but the SUBREG does.
848 Finally, reload the inner expression if it is a register that is in
849 the class whose registers cannot be referenced in a different size
850 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
851 cannot reload just the inside since we might end up with the wrong
854 if (in != 0 && GET_CODE (in) == SUBREG && SUBREG_WORD (in) == 0
855 #ifdef CLASS_CANNOT_CHANGE_SIZE
856 && class != CLASS_CANNOT_CHANGE_SIZE
858 && (CONSTANT_P (SUBREG_REG (in))
859 || GET_CODE (SUBREG_REG (in)) == PLUS
861 || (((GET_CODE (SUBREG_REG (in)) == REG
862 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
863 || GET_CODE (SUBREG_REG (in)) == MEM)
864 && ((GET_MODE_SIZE (inmode)
865 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
866 #ifdef LOAD_EXTEND_OP
867 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
868 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
870 && (GET_MODE_SIZE (inmode)
871 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
872 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
873 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
876 || (GET_CODE (SUBREG_REG (in)) == REG
877 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
878 /* The case where out is nonzero
879 is handled differently in the following statement. */
880 && (out == 0 || SUBREG_WORD (in) == 0)
881 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
882 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
884 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
886 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
887 GET_MODE (SUBREG_REG (in)))))
888 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
891 #ifdef SECONDARY_INPUT_RELOAD_CLASS
892 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
893 && (SECONDARY_INPUT_RELOAD_CLASS (class,
894 GET_MODE (SUBREG_REG (in)),
898 #ifdef CLASS_CANNOT_CHANGE_SIZE
899 || (GET_CODE (SUBREG_REG (in)) == REG
900 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
901 && (TEST_HARD_REG_BIT
902 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
903 REGNO (SUBREG_REG (in))))
904 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
905 != GET_MODE_SIZE (inmode)))
909 in_subreg_loc = inloc;
910 inloc = &SUBREG_REG (in);
912 #ifndef LOAD_EXTEND_OP
913 if (GET_CODE (in) == MEM)
914 /* This is supposed to happen only for paradoxical subregs made by
915 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
916 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
919 inmode = GET_MODE (in);
922 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
923 either M1 is not valid for R or M2 is wider than a word but we only
924 need one word to store an M2-sized quantity in R.
926 However, we must reload the inner reg *as well as* the subreg in
929 /* Similar issue for (SUBREG constant ...) if it was not handled by the
930 code above. This can happen if SUBREG_WORD != 0. */
932 if (in != 0 && GET_CODE (in) == SUBREG
933 && (CONSTANT_P (SUBREG_REG (in))
934 || (GET_CODE (SUBREG_REG (in)) == REG
935 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
936 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in))
939 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
940 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
942 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
944 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
945 GET_MODE (SUBREG_REG (in)))))))))
947 /* This relies on the fact that emit_reload_insns outputs the
948 instructions for input reloads of type RELOAD_OTHER in the same
949 order as the reloads. Thus if the outer reload is also of type
950 RELOAD_OTHER, we are guaranteed that this inner reload will be
951 output before the outer reload. */
952 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
953 find_valid_class (inmode, SUBREG_WORD (in)),
954 VOIDmode, VOIDmode, 0, 0, opnum, type);
955 dont_remove_subreg = 1;
958 /* Similarly for paradoxical and problematical SUBREGs on the output.
959 Note that there is no reason we need worry about the previous value
960 of SUBREG_REG (out); even if wider than out,
961 storing in a subreg is entitled to clobber it all
962 (except in the case of STRICT_LOW_PART,
963 and in that case the constraint should label it input-output.) */
964 if (out != 0 && GET_CODE (out) == SUBREG && SUBREG_WORD (out) == 0
965 #ifdef CLASS_CANNOT_CHANGE_SIZE
966 && class != CLASS_CANNOT_CHANGE_SIZE
968 && (CONSTANT_P (SUBREG_REG (out))
970 || (((GET_CODE (SUBREG_REG (out)) == REG
971 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
972 || GET_CODE (SUBREG_REG (out)) == MEM)
973 && ((GET_MODE_SIZE (outmode)
974 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))))
975 || (GET_CODE (SUBREG_REG (out)) == REG
976 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
977 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
978 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
980 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
982 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
983 GET_MODE (SUBREG_REG (out)))))
984 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
985 + SUBREG_WORD (out)),
987 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
988 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
989 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
990 GET_MODE (SUBREG_REG (out)),
994 #ifdef CLASS_CANNOT_CHANGE_SIZE
995 || (GET_CODE (SUBREG_REG (out)) == REG
996 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
997 && (TEST_HARD_REG_BIT
998 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
999 REGNO (SUBREG_REG (out))))
1000 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1001 != GET_MODE_SIZE (outmode)))
1005 out_subreg_loc = outloc;
1006 outloc = &SUBREG_REG (out);
1008 #ifndef LOAD_EXTEND_OP
1009 if (GET_CODE (out) == MEM
1010 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1013 outmode = GET_MODE (out);
1016 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1017 either M1 is not valid for R or M2 is wider than a word but we only
1018 need one word to store an M2-sized quantity in R.
1020 However, we must reload the inner reg *as well as* the subreg in
1021 that case. In this case, the inner reg is an in-out reload. */
1023 if (out != 0 && GET_CODE (out) == SUBREG
1024 && GET_CODE (SUBREG_REG (out)) == REG
1025 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1026 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)) + SUBREG_WORD (out),
1028 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1029 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1031 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1033 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1034 GET_MODE (SUBREG_REG (out)))))))
1036 /* This relies on the fact that emit_reload_insns outputs the
1037 instructions for output reloads of type RELOAD_OTHER in reverse
1038 order of the reloads. Thus if the outer reload is also of type
1039 RELOAD_OTHER, we are guaranteed that this inner reload will be
1040 output after the outer reload. */
1041 dont_remove_subreg = 1;
1042 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1044 find_valid_class (outmode, SUBREG_WORD (out)),
1045 VOIDmode, VOIDmode, 0, 0,
1046 opnum, RELOAD_OTHER);
1049 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1050 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1051 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1052 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1055 /* If IN is a SUBREG of a hard register, make a new REG. This
1056 simplifies some of the cases below. */
1058 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1059 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1060 && ! dont_remove_subreg)
1061 in = gen_rtx (REG, GET_MODE (in),
1062 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
1064 /* Similarly for OUT. */
1065 if (out != 0 && GET_CODE (out) == SUBREG
1066 && GET_CODE (SUBREG_REG (out)) == REG
1067 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1068 && ! dont_remove_subreg)
1069 out = gen_rtx (REG, GET_MODE (out),
1070 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
1072 /* Narrow down the class of register wanted if that is
1073 desirable on this machine for efficiency. */
1075 class = PREFERRED_RELOAD_CLASS (in, class);
1077 /* Output reloads may need analogous treatment, different in detail. */
1078 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1080 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1083 /* Make sure we use a class that can handle the actual pseudo
1084 inside any subreg. For example, on the 386, QImode regs
1085 can appear within SImode subregs. Although GENERAL_REGS
1086 can handle SImode, QImode needs a smaller class. */
1087 #ifdef LIMIT_RELOAD_CLASS
1089 class = LIMIT_RELOAD_CLASS (inmode, class);
1090 else if (in != 0 && GET_CODE (in) == SUBREG)
1091 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1094 class = LIMIT_RELOAD_CLASS (outmode, class);
1095 if (out != 0 && GET_CODE (out) == SUBREG)
1096 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1099 /* Verify that this class is at least possible for the mode that
1101 if (this_insn_is_asm)
1103 enum machine_mode mode;
1104 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1108 if (mode == VOIDmode)
1110 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1115 outmode = word_mode;
1117 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1118 if (HARD_REGNO_MODE_OK (i, mode)
1119 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1121 int nregs = HARD_REGNO_NREGS (i, mode);
1124 for (j = 1; j < nregs; j++)
1125 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1130 if (i == FIRST_PSEUDO_REGISTER)
1132 error_for_asm (this_insn, "impossible register constraint in `asm'");
1137 if (class == NO_REGS)
1140 /* We can use an existing reload if the class is right
1141 and at least one of IN and OUT is a match
1142 and the other is at worst neutral.
1143 (A zero compared against anything is neutral.)
1145 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
1146 for the same thing since that can cause us to need more reload registers
1147 than we otherwise would. */
1149 for (i = 0; i < n_reloads; i++)
1150 if ((reg_class_subset_p (class, reload_reg_class[i])
1151 || reg_class_subset_p (reload_reg_class[i], class))
1152 /* If the existing reload has a register, it must fit our class. */
1153 && (reload_reg_rtx[i] == 0
1154 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1155 true_regnum (reload_reg_rtx[i])))
1156 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
1157 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
1159 (out != 0 && MATCHES (reload_out[i], out)
1160 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
1161 && (reg_class_size[(int) class] == 1
1162 #ifdef SMALL_REGISTER_CLASSES
1166 && MERGABLE_RELOADS (type, reload_when_needed[i],
1167 opnum, reload_opnum[i]))
1170 /* Reloading a plain reg for input can match a reload to postincrement
1171 that reg, since the postincrement's value is the right value.
1172 Likewise, it can match a preincrement reload, since we regard
1173 the preincrementation as happening before any ref in this insn
1174 to that register. */
1176 for (i = 0; i < n_reloads; i++)
1177 if ((reg_class_subset_p (class, reload_reg_class[i])
1178 || reg_class_subset_p (reload_reg_class[i], class))
1179 /* If the existing reload has a register, it must fit our class. */
1180 && (reload_reg_rtx[i] == 0
1181 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1182 true_regnum (reload_reg_rtx[i])))
1183 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
1184 && ((GET_CODE (in) == REG
1185 && (GET_CODE (reload_in[i]) == POST_INC
1186 || GET_CODE (reload_in[i]) == POST_DEC
1187 || GET_CODE (reload_in[i]) == PRE_INC
1188 || GET_CODE (reload_in[i]) == PRE_DEC)
1189 && MATCHES (XEXP (reload_in[i], 0), in))
1191 (GET_CODE (reload_in[i]) == REG
1192 && (GET_CODE (in) == POST_INC
1193 || GET_CODE (in) == POST_DEC
1194 || GET_CODE (in) == PRE_INC
1195 || GET_CODE (in) == PRE_DEC)
1196 && MATCHES (XEXP (in, 0), reload_in[i])))
1197 && (reg_class_size[(int) class] == 1
1198 #ifdef SMALL_REGISTER_CLASSES
1202 && MERGABLE_RELOADS (type, reload_when_needed[i],
1203 opnum, reload_opnum[i]))
1205 /* Make sure reload_in ultimately has the increment,
1206 not the plain register. */
1207 if (GET_CODE (in) == REG)
1214 /* See if we need a secondary reload register to move between CLASS
1215 and IN or CLASS and OUT. Get the icode and push any required reloads
1216 needed for each of them if so. */
1218 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1221 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1222 &secondary_in_icode);
1225 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1226 if (out != 0 && GET_CODE (out) != SCRATCH)
1227 secondary_out_reload
1228 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1229 type, &secondary_out_icode);
1232 /* We found no existing reload suitable for re-use.
1233 So add an additional reload. */
1237 reload_out[i] = out;
1238 reload_reg_class[i] = class;
1239 reload_inmode[i] = inmode;
1240 reload_outmode[i] = outmode;
1241 reload_reg_rtx[i] = 0;
1242 reload_optional[i] = optional;
1244 reload_nocombine[i] = 0;
1245 reload_in_reg[i] = inloc ? *inloc : 0;
1246 reload_opnum[i] = opnum;
1247 reload_when_needed[i] = type;
1248 reload_secondary_in_reload[i] = secondary_in_reload;
1249 reload_secondary_out_reload[i] = secondary_out_reload;
1250 reload_secondary_in_icode[i] = secondary_in_icode;
1251 reload_secondary_out_icode[i] = secondary_out_icode;
1252 reload_secondary_p[i] = 0;
1256 #ifdef SECONDARY_MEMORY_NEEDED
1257 /* If a memory location is needed for the copy, make one. */
1258 if (in != 0 && GET_CODE (in) == REG
1259 && REGNO (in) < FIRST_PSEUDO_REGISTER
1260 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1262 get_secondary_mem (in, inmode, opnum, type);
1264 if (out != 0 && GET_CODE (out) == REG
1265 && REGNO (out) < FIRST_PSEUDO_REGISTER
1266 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1268 get_secondary_mem (out, outmode, opnum, type);
1273 /* We are reusing an existing reload,
1274 but we may have additional information for it.
1275 For example, we may now have both IN and OUT
1276 while the old one may have just one of them. */
1278 /* The modes can be different. If they are, we want to reload in
1279 the larger mode, so that the value is valid for both modes. */
1280 if (inmode != VOIDmode
1281 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (reload_inmode[i]))
1282 reload_inmode[i] = inmode;
1283 if (outmode != VOIDmode
1284 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (reload_outmode[i]))
1285 reload_outmode[i] = outmode;
1289 reload_out[i] = out;
1290 if (reg_class_subset_p (class, reload_reg_class[i]))
1291 reload_reg_class[i] = class;
1292 reload_optional[i] &= optional;
1293 if (MERGE_TO_OTHER (type, reload_when_needed[i],
1294 opnum, reload_opnum[i]))
1295 reload_when_needed[i] = RELOAD_OTHER;
1296 reload_opnum[i] = MIN (reload_opnum[i], opnum);
1299 /* If the ostensible rtx being reload differs from the rtx found
1300 in the location to substitute, this reload is not safe to combine
1301 because we cannot reliably tell whether it appears in the insn. */
1303 if (in != 0 && in != *inloc)
1304 reload_nocombine[i] = 1;
1307 /* This was replaced by changes in find_reloads_address_1 and the new
1308 function inc_for_reload, which go with a new meaning of reload_inc. */
1310 /* If this is an IN/OUT reload in an insn that sets the CC,
1311 it must be for an autoincrement. It doesn't work to store
1312 the incremented value after the insn because that would clobber the CC.
1313 So we must do the increment of the value reloaded from,
1314 increment it, store it back, then decrement again. */
1315 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1319 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1320 /* If we did not find a nonzero amount-to-increment-by,
1321 that contradicts the belief that IN is being incremented
1322 in an address in this insn. */
1323 if (reload_inc[i] == 0)
1328 /* If we will replace IN and OUT with the reload-reg,
1329 record where they are located so that substitution need
1330 not do a tree walk. */
1332 if (replace_reloads)
1336 register struct replacement *r = &replacements[n_replacements++];
1338 r->subreg_loc = in_subreg_loc;
1342 if (outloc != 0 && outloc != inloc)
1344 register struct replacement *r = &replacements[n_replacements++];
1347 r->subreg_loc = out_subreg_loc;
1352 /* If this reload is just being introduced and it has both
1353 an incoming quantity and an outgoing quantity that are
1354 supposed to be made to match, see if either one of the two
1355 can serve as the place to reload into.
1357 If one of them is acceptable, set reload_reg_rtx[i]
1360 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1362 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1364 reload_reg_class[i], i);
1366 /* If the outgoing register already contains the same value
1367 as the incoming one, we can dispense with loading it.
1368 The easiest way to tell the caller that is to give a phony
1369 value for the incoming operand (same as outgoing one). */
1370 if (reload_reg_rtx[i] == out
1371 && (GET_CODE (in) == REG || CONSTANT_P (in))
1372 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1373 static_reload_reg_p, i, inmode))
1377 /* If this is an input reload and the operand contains a register that
1378 dies in this insn and is used nowhere else, see if it is the right class
1379 to be used for this reload. Use it if so. (This occurs most commonly
1380 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1381 this if it is also an output reload that mentions the register unless
1382 the output is a SUBREG that clobbers an entire register.
1384 Note that the operand might be one of the spill regs, if it is a
1385 pseudo reg and we are in a block where spilling has not taken place.
1386 But if there is no spilling in this block, that is OK.
1387 An explicitly used hard reg cannot be a spill reg. */
1389 if (reload_reg_rtx[i] == 0 && in != 0)
1394 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1395 if (REG_NOTE_KIND (note) == REG_DEAD
1396 && GET_CODE (XEXP (note, 0)) == REG
1397 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1398 && reg_mentioned_p (XEXP (note, 0), in)
1399 && ! refers_to_regno_for_reload_p (regno,
1401 + HARD_REGNO_NREGS (regno,
1403 PATTERN (this_insn), inloc)
1404 /* If this is also an output reload, IN cannot be used as
1405 the reload register if it is set in this insn unless IN
1407 && (out == 0 || in == out
1408 || ! hard_reg_set_here_p (regno,
1410 + HARD_REGNO_NREGS (regno,
1412 PATTERN (this_insn)))
1413 /* ??? Why is this code so different from the previous?
1414 Is there any simple coherent way to describe the two together?
1415 What's going on here. */
1417 || (GET_CODE (in) == SUBREG
1418 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1420 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1421 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1422 /* Make sure the operand fits in the reg that dies. */
1423 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1424 && HARD_REGNO_MODE_OK (regno, inmode)
1425 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1426 && HARD_REGNO_MODE_OK (regno, outmode)
1427 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1428 && !fixed_regs[regno])
1430 reload_reg_rtx[i] = gen_rtx (REG, inmode, regno);
1436 output_reloadnum = i;
1441 /* Record an additional place we must replace a value
1442 for which we have already recorded a reload.
1443 RELOADNUM is the value returned by push_reload
1444 when the reload was recorded.
1445 This is used in insn patterns that use match_dup. */
1448 push_replacement (loc, reloadnum, mode)
1451 enum machine_mode mode;
1453 if (replace_reloads)
1455 register struct replacement *r = &replacements[n_replacements++];
1456 r->what = reloadnum;
1463 /* Transfer all replacements that used to be in reload FROM to be in
1467 transfer_replacements (to, from)
1472 for (i = 0; i < n_replacements; i++)
1473 if (replacements[i].what == from)
1474 replacements[i].what = to;
1477 /* If there is only one output reload, and it is not for an earlyclobber
1478 operand, try to combine it with a (logically unrelated) input reload
1479 to reduce the number of reload registers needed.
1481 This is safe if the input reload does not appear in
1482 the value being output-reloaded, because this implies
1483 it is not needed any more once the original insn completes.
1485 If that doesn't work, see we can use any of the registers that
1486 die in this insn as a reload register. We can if it is of the right
1487 class and does not appear in the value being output-reloaded. */
1493 int output_reload = -1;
1494 int secondary_out = -1;
1497 /* Find the output reload; return unless there is exactly one
1498 and that one is mandatory. */
1500 for (i = 0; i < n_reloads; i++)
1501 if (reload_out[i] != 0)
1503 if (output_reload >= 0)
1508 if (output_reload < 0 || reload_optional[output_reload])
1511 /* An input-output reload isn't combinable. */
1513 if (reload_in[output_reload] != 0)
1516 /* If this reload is for an earlyclobber operand, we can't do anything. */
1517 if (earlyclobber_operand_p (reload_out[output_reload]))
1520 /* Check each input reload; can we combine it? */
1522 for (i = 0; i < n_reloads; i++)
1523 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1524 /* Life span of this reload must not extend past main insn. */
1525 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
1526 && reload_when_needed[i] != RELOAD_OTHER
1527 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
1528 == CLASS_MAX_NREGS (reload_reg_class[output_reload],
1529 reload_outmode[output_reload]))
1530 && reload_inc[i] == 0
1531 && reload_reg_rtx[i] == 0
1532 #ifdef SECONDARY_MEMORY_NEEDED
1533 /* Don't combine two reloads with different secondary
1534 memory locations. */
1535 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
1536 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
1537 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
1538 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
1540 #ifdef SMALL_REGISTER_CLASSES
1541 && reload_reg_class[i] == reload_reg_class[output_reload]
1543 && (reg_class_subset_p (reload_reg_class[i],
1544 reload_reg_class[output_reload])
1545 || reg_class_subset_p (reload_reg_class[output_reload],
1546 reload_reg_class[i]))
1548 && (MATCHES (reload_in[i], reload_out[output_reload])
1549 /* Args reversed because the first arg seems to be
1550 the one that we imagine being modified
1551 while the second is the one that might be affected. */
1552 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1554 /* However, if the input is a register that appears inside
1555 the output, then we also can't share.
1556 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1557 If the same reload reg is used for both reg 69 and the
1558 result to be stored in memory, then that result
1559 will clobber the address of the memory ref. */
1560 && ! (GET_CODE (reload_in[i]) == REG
1561 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1562 reload_out[output_reload]))))
1563 && (reg_class_size[(int) reload_reg_class[i]]
1564 #ifdef SMALL_REGISTER_CLASSES
1568 /* We will allow making things slightly worse by combining an
1569 input and an output, but no worse than that. */
1570 && (reload_when_needed[i] == RELOAD_FOR_INPUT
1571 || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
1575 /* We have found a reload to combine with! */
1576 reload_out[i] = reload_out[output_reload];
1577 reload_outmode[i] = reload_outmode[output_reload];
1578 /* Mark the old output reload as inoperative. */
1579 reload_out[output_reload] = 0;
1580 /* The combined reload is needed for the entire insn. */
1581 reload_when_needed[i] = RELOAD_OTHER;
1582 /* If the output reload had a secondary reload, copy it. */
1583 if (reload_secondary_out_reload[output_reload] != -1)
1585 reload_secondary_out_reload[i]
1586 = reload_secondary_out_reload[output_reload];
1587 reload_secondary_out_icode[i]
1588 = reload_secondary_out_icode[output_reload];
1591 #ifdef SECONDARY_MEMORY_NEEDED
1592 /* Copy any secondary MEM. */
1593 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
1594 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
1595 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
1597 /* If required, minimize the register class. */
1598 if (reg_class_subset_p (reload_reg_class[output_reload],
1599 reload_reg_class[i]))
1600 reload_reg_class[i] = reload_reg_class[output_reload];
1602 /* Transfer all replacements from the old reload to the combined. */
1603 for (j = 0; j < n_replacements; j++)
1604 if (replacements[j].what == output_reload)
1605 replacements[j].what = i;
1610 /* If this insn has only one operand that is modified or written (assumed
1611 to be the first), it must be the one corresponding to this reload. It
1612 is safe to use anything that dies in this insn for that output provided
1613 that it does not occur in the output (we already know it isn't an
1614 earlyclobber. If this is an asm insn, give up. */
1616 if (INSN_CODE (this_insn) == -1)
1619 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1620 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1621 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1624 /* See if some hard register that dies in this insn and is not used in
1625 the output is the right class. Only works if the register we pick
1626 up can fully hold our output reload. */
1627 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1628 if (REG_NOTE_KIND (note) == REG_DEAD
1629 && GET_CODE (XEXP (note, 0)) == REG
1630 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1631 reload_out[output_reload])
1632 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1633 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1634 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1635 REGNO (XEXP (note, 0)))
1636 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1637 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1638 /* Ensure that a secondary or tertiary reload for this output
1639 won't want this register. */
1640 && ((secondary_out = reload_secondary_out_reload[output_reload]) == -1
1641 || (! (TEST_HARD_REG_BIT
1642 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1643 REGNO (XEXP (note, 0))))
1644 && ((secondary_out = reload_secondary_out_reload[secondary_out]) == -1
1645 || ! (TEST_HARD_REG_BIT
1646 (reg_class_contents[(int) reload_reg_class[secondary_out]],
1647 REGNO (XEXP (note, 0)))))))
1648 && ! fixed_regs[REGNO (XEXP (note, 0))])
1650 reload_reg_rtx[output_reload] = gen_rtx (REG,
1651 reload_outmode[output_reload],
1652 REGNO (XEXP (note, 0)));
1657 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1658 See if one of IN and OUT is a register that may be used;
1659 this is desirable since a spill-register won't be needed.
1660 If so, return the register rtx that proves acceptable.
1662 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1663 CLASS is the register class required for the reload.
1665 If FOR_REAL is >= 0, it is the number of the reload,
1666 and in some cases when it can be discovered that OUT doesn't need
1667 to be computed, clear out reload_out[FOR_REAL].
1669 If FOR_REAL is -1, this should not be done, because this call
1670 is just to see if a register can be found, not to find and install it. */
1673 find_dummy_reload (real_in, real_out, inloc, outloc,
1674 inmode, outmode, class, for_real)
1675 rtx real_in, real_out;
1676 rtx *inloc, *outloc;
1677 enum machine_mode inmode, outmode;
1678 enum reg_class class;
1687 /* If operands exceed a word, we can't use either of them
1688 unless they have the same size. */
1689 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1690 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1691 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1694 /* Find the inside of any subregs. */
1695 while (GET_CODE (out) == SUBREG)
1697 out_offset = SUBREG_WORD (out);
1698 out = SUBREG_REG (out);
1700 while (GET_CODE (in) == SUBREG)
1702 in_offset = SUBREG_WORD (in);
1703 in = SUBREG_REG (in);
1706 /* Narrow down the reg class, the same way push_reload will;
1707 otherwise we might find a dummy now, but push_reload won't. */
1708 class = PREFERRED_RELOAD_CLASS (in, class);
1710 /* See if OUT will do. */
1711 if (GET_CODE (out) == REG
1712 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1714 register int regno = REGNO (out) + out_offset;
1715 int nwords = HARD_REGNO_NREGS (regno, outmode);
1718 /* When we consider whether the insn uses OUT,
1719 ignore references within IN. They don't prevent us
1720 from copying IN into OUT, because those refs would
1721 move into the insn that reloads IN.
1723 However, we only ignore IN in its role as this reload.
1724 If the insn uses IN elsewhere and it contains OUT,
1725 that counts. We can't be sure it's the "same" operand
1726 so it might not go through this reload. */
1728 *inloc = const0_rtx;
1730 if (regno < FIRST_PSEUDO_REGISTER
1731 /* A fixed reg that can overlap other regs better not be used
1732 for reloading in any way. */
1733 #ifdef OVERLAPPING_REGNO_P
1734 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1736 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1737 PATTERN (this_insn), outloc))
1740 for (i = 0; i < nwords; i++)
1741 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1747 if (GET_CODE (real_out) == REG)
1750 value = gen_rtx (REG, outmode, regno);
1757 /* Consider using IN if OUT was not acceptable
1758 or if OUT dies in this insn (like the quotient in a divmod insn).
1759 We can't use IN unless it is dies in this insn,
1760 which means we must know accurately which hard regs are live.
1761 Also, the result can't go in IN if IN is used within OUT. */
1762 if (hard_regs_live_known
1763 && GET_CODE (in) == REG
1764 && REGNO (in) < FIRST_PSEUDO_REGISTER
1766 || find_reg_note (this_insn, REG_UNUSED, real_out))
1767 && find_reg_note (this_insn, REG_DEAD, real_in)
1768 && !fixed_regs[REGNO (in)]
1769 && HARD_REGNO_MODE_OK (REGNO (in),
1770 /* The only case where out and real_out might
1771 have different modes is where real_out
1772 is a subreg, and in that case, out
1774 (GET_MODE (out) != VOIDmode
1775 ? GET_MODE (out) : outmode)))
1777 register int regno = REGNO (in) + in_offset;
1778 int nwords = HARD_REGNO_NREGS (regno, inmode);
1780 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1781 && ! hard_reg_set_here_p (regno, regno + nwords,
1782 PATTERN (this_insn)))
1785 for (i = 0; i < nwords; i++)
1786 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1792 /* If we were going to use OUT as the reload reg
1793 and changed our mind, it means OUT is a dummy that
1794 dies here. So don't bother copying value to it. */
1795 if (for_real >= 0 && value == real_out)
1796 reload_out[for_real] = 0;
1797 if (GET_CODE (real_in) == REG)
1800 value = gen_rtx (REG, inmode, regno);
1808 /* This page contains subroutines used mainly for determining
1809 whether the IN or an OUT of a reload can serve as the
1812 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1815 earlyclobber_operand_p (x)
1820 for (i = 0; i < n_earlyclobbers; i++)
1821 if (reload_earlyclobbers[i] == x)
1827 /* Return 1 if expression X alters a hard reg in the range
1828 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1829 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1830 X should be the body of an instruction. */
1833 hard_reg_set_here_p (beg_regno, end_regno, x)
1834 register int beg_regno, end_regno;
1837 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1839 register rtx op0 = SET_DEST (x);
1840 while (GET_CODE (op0) == SUBREG)
1841 op0 = SUBREG_REG (op0);
1842 if (GET_CODE (op0) == REG)
1844 register int r = REGNO (op0);
1845 /* See if this reg overlaps range under consideration. */
1847 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1851 else if (GET_CODE (x) == PARALLEL)
1853 register int i = XVECLEN (x, 0) - 1;
1855 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1862 /* Return 1 if ADDR is a valid memory address for mode MODE,
1863 and check that each pseudo reg has the proper kind of
1867 strict_memory_address_p (mode, addr)
1868 enum machine_mode mode;
1871 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
1878 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1879 if they are the same hard reg, and has special hacks for
1880 autoincrement and autodecrement.
1881 This is specifically intended for find_reloads to use
1882 in determining whether two operands match.
1883 X is the operand whose number is the lower of the two.
1885 The value is 2 if Y contains a pre-increment that matches
1886 a non-incrementing address in X. */
1888 /* ??? To be completely correct, we should arrange to pass
1889 for X the output operand and for Y the input operand.
1890 For now, we assume that the output operand has the lower number
1891 because that is natural in (SET output (... input ...)). */
1894 operands_match_p (x, y)
1898 register RTX_CODE code = GET_CODE (x);
1904 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
1905 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
1906 && GET_CODE (SUBREG_REG (y)) == REG)))
1912 i = REGNO (SUBREG_REG (x));
1913 if (i >= FIRST_PSEUDO_REGISTER)
1915 i += SUBREG_WORD (x);
1920 if (GET_CODE (y) == SUBREG)
1922 j = REGNO (SUBREG_REG (y));
1923 if (j >= FIRST_PSEUDO_REGISTER)
1925 j += SUBREG_WORD (y);
1930 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1931 multiple hard register group, so that for example (reg:DI 0) and
1932 (reg:SI 1) will be considered the same register. */
1933 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
1934 && i < FIRST_PSEUDO_REGISTER)
1935 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
1936 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
1937 && j < FIRST_PSEUDO_REGISTER)
1938 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
1942 /* If two operands must match, because they are really a single
1943 operand of an assembler insn, then two postincrements are invalid
1944 because the assembler insn would increment only once.
1945 On the other hand, an postincrement matches ordinary indexing
1946 if the postincrement is the output operand. */
1947 if (code == POST_DEC || code == POST_INC)
1948 return operands_match_p (XEXP (x, 0), y);
1949 /* Two preincrements are invalid
1950 because the assembler insn would increment only once.
1951 On the other hand, an preincrement matches ordinary indexing
1952 if the preincrement is the input operand.
1953 In this case, return 2, since some callers need to do special
1954 things when this happens. */
1955 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
1956 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
1960 /* Now we have disposed of all the cases
1961 in which different rtx codes can match. */
1962 if (code != GET_CODE (y))
1964 if (code == LABEL_REF)
1965 return XEXP (x, 0) == XEXP (y, 0);
1966 if (code == SYMBOL_REF)
1967 return XSTR (x, 0) == XSTR (y, 0);
1969 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1971 if (GET_MODE (x) != GET_MODE (y))
1974 /* Compare the elements. If any pair of corresponding elements
1975 fail to match, return 0 for the whole things. */
1978 fmt = GET_RTX_FORMAT (code);
1979 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1985 if (XWINT (x, i) != XWINT (y, i))
1990 if (XINT (x, i) != XINT (y, i))
1995 val = operands_match_p (XEXP (x, i), XEXP (y, i));
1998 /* If any subexpression returns 2,
1999 we should return 2 if we are successful. */
2007 /* It is believed that rtx's at this level will never
2008 contain anything but integers and other rtx's,
2009 except for within LABEL_REFs and SYMBOL_REFs. */
2014 return 1 + success_2;
2017 /* Return the number of times character C occurs in string S. */
2020 n_occurrences (c, s)
2030 /* Describe the range of registers or memory referenced by X.
2031 If X is a register, set REG_FLAG and put the first register
2032 number into START and the last plus one into END.
2033 If X is a memory reference, put a base address into BASE
2034 and a range of integer offsets into START and END.
2035 If X is pushing on the stack, we can assume it causes no trouble,
2036 so we set the SAFE field. */
2038 static struct decomposition
2042 struct decomposition val;
2047 if (GET_CODE (x) == MEM)
2049 rtx base, offset = 0;
2050 rtx addr = XEXP (x, 0);
2052 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2053 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2055 val.base = XEXP (addr, 0);
2056 val.start = - GET_MODE_SIZE (GET_MODE (x));
2057 val.end = GET_MODE_SIZE (GET_MODE (x));
2058 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2062 if (GET_CODE (addr) == CONST)
2064 addr = XEXP (addr, 0);
2067 if (GET_CODE (addr) == PLUS)
2069 if (CONSTANT_P (XEXP (addr, 0)))
2071 base = XEXP (addr, 1);
2072 offset = XEXP (addr, 0);
2074 else if (CONSTANT_P (XEXP (addr, 1)))
2076 base = XEXP (addr, 0);
2077 offset = XEXP (addr, 1);
2084 offset = const0_rtx;
2086 if (GET_CODE (offset) == CONST)
2087 offset = XEXP (offset, 0);
2088 if (GET_CODE (offset) == PLUS)
2090 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2092 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 1));
2093 offset = XEXP (offset, 0);
2095 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2097 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 0));
2098 offset = XEXP (offset, 1);
2102 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
2103 offset = const0_rtx;
2106 else if (GET_CODE (offset) != CONST_INT)
2108 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
2109 offset = const0_rtx;
2112 if (all_const && GET_CODE (base) == PLUS)
2113 base = gen_rtx (CONST, GET_MODE (base), base);
2115 if (GET_CODE (offset) != CONST_INT)
2118 val.start = INTVAL (offset);
2119 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2123 else if (GET_CODE (x) == REG)
2126 val.start = true_regnum (x);
2129 /* A pseudo with no hard reg. */
2130 val.start = REGNO (x);
2131 val.end = val.start + 1;
2135 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2137 else if (GET_CODE (x) == SUBREG)
2139 if (GET_CODE (SUBREG_REG (x)) != REG)
2140 /* This could be more precise, but it's good enough. */
2141 return decompose (SUBREG_REG (x));
2143 val.start = true_regnum (x);
2145 return decompose (SUBREG_REG (x));
2148 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2150 else if (CONSTANT_P (x)
2151 /* This hasn't been assigned yet, so it can't conflict yet. */
2152 || GET_CODE (x) == SCRATCH)
2159 /* Return 1 if altering Y will not modify the value of X.
2160 Y is also described by YDATA, which should be decompose (Y). */
2163 immune_p (x, y, ydata)
2165 struct decomposition ydata;
2167 struct decomposition xdata;
2170 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2174 if (GET_CODE (y) != MEM)
2176 /* If Y is memory and X is not, Y can't affect X. */
2177 if (GET_CODE (x) != MEM)
2180 xdata = decompose (x);
2182 if (! rtx_equal_p (xdata.base, ydata.base))
2184 /* If bases are distinct symbolic constants, there is no overlap. */
2185 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2187 /* Constants and stack slots never overlap. */
2188 if (CONSTANT_P (xdata.base)
2189 && (ydata.base == frame_pointer_rtx
2190 || ydata.base == hard_frame_pointer_rtx
2191 || ydata.base == stack_pointer_rtx))
2193 if (CONSTANT_P (ydata.base)
2194 && (xdata.base == frame_pointer_rtx
2195 || xdata.base == hard_frame_pointer_rtx
2196 || xdata.base == stack_pointer_rtx))
2198 /* If either base is variable, we don't know anything. */
2203 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2206 /* Similar, but calls decompose. */
2209 safe_from_earlyclobber (op, clobber)
2212 struct decomposition early_data;
2214 early_data = decompose (clobber);
2215 return immune_p (op, clobber, early_data);
2218 /* Main entry point of this file: search the body of INSN
2219 for values that need reloading and record them with push_reload.
2220 REPLACE nonzero means record also where the values occur
2221 so that subst_reloads can be used.
2223 IND_LEVELS says how many levels of indirection are supported by this
2224 machine; a value of zero means that a memory reference is not a valid
2227 LIVE_KNOWN says we have valid information about which hard
2228 regs are live at each point in the program; this is true when
2229 we are called from global_alloc but false when stupid register
2230 allocation has been done.
2232 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2233 which is nonnegative if the reg has been commandeered for reloading into.
2234 It is copied into STATIC_RELOAD_REG_P and referenced from there
2235 by various subroutines. */
2238 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2240 int replace, ind_levels;
2242 short *reload_reg_p;
2244 #ifdef REGISTER_CONSTRAINTS
2246 register int insn_code_number;
2249 /* These are the constraints for the insn. We don't change them. */
2250 char *constraints1[MAX_RECOG_OPERANDS];
2251 /* These start out as the constraints for the insn
2252 and they are chewed up as we consider alternatives. */
2253 char *constraints[MAX_RECOG_OPERANDS];
2254 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2256 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2257 char pref_or_nothing[MAX_RECOG_OPERANDS];
2258 /* Nonzero for a MEM operand whose entire address needs a reload. */
2259 int address_reloaded[MAX_RECOG_OPERANDS];
2260 /* Value of enum reload_type to use for operand. */
2261 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2262 /* Value of enum reload_type to use within address of operand. */
2263 enum reload_type address_type[MAX_RECOG_OPERANDS];
2264 /* Save the usage of each operand. */
2265 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2266 int no_input_reloads = 0, no_output_reloads = 0;
2268 int this_alternative[MAX_RECOG_OPERANDS];
2269 char this_alternative_win[MAX_RECOG_OPERANDS];
2270 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2271 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2272 int this_alternative_matches[MAX_RECOG_OPERANDS];
2274 int goal_alternative[MAX_RECOG_OPERANDS];
2275 int this_alternative_number;
2276 int goal_alternative_number;
2277 int operand_reloadnum[MAX_RECOG_OPERANDS];
2278 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2279 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2280 char goal_alternative_win[MAX_RECOG_OPERANDS];
2281 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2282 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2283 int goal_alternative_swapped;
2286 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2287 rtx substed_operand[MAX_RECOG_OPERANDS];
2288 rtx body = PATTERN (insn);
2289 rtx set = single_set (insn);
2290 int goal_earlyclobber, this_earlyclobber;
2291 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2294 this_insn_is_asm = 0; /* Tentative. */
2298 n_earlyclobbers = 0;
2299 replace_reloads = replace;
2300 hard_regs_live_known = live_known;
2301 static_reload_reg_p = reload_reg_p;
2303 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2304 neither are insns that SET cc0. Insns that use CC0 are not allowed
2305 to have any input reloads. */
2306 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2307 no_output_reloads = 1;
2310 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2311 no_input_reloads = 1;
2312 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2313 no_output_reloads = 1;
2316 #ifdef SECONDARY_MEMORY_NEEDED
2317 /* The eliminated forms of any secondary memory locations are per-insn, so
2318 clear them out here. */
2320 bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2323 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2324 Make OPERANDS point to a vector of operand values.
2325 Make OPERAND_LOCS point to a vector of pointers to
2326 where the operands were found.
2327 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2328 constraint-strings for this insn.
2329 Return if the insn needs no reload processing. */
2331 switch (GET_CODE (body))
2341 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2342 is cheap to move between them. If it is not, there may not be an insn
2343 to do the copy, so we may need a reload. */
2344 if (GET_CODE (SET_DEST (body)) == REG
2345 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2346 && GET_CODE (SET_SRC (body)) == REG
2347 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2348 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2349 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2353 reload_n_operands = noperands = asm_noperands (body);
2356 /* This insn is an `asm' with operands. */
2358 insn_code_number = -1;
2359 this_insn_is_asm = 1;
2361 /* expand_asm_operands makes sure there aren't too many operands. */
2362 if (noperands > MAX_RECOG_OPERANDS)
2365 /* Now get the operand values and constraints out of the insn. */
2367 decode_asm_operands (body, recog_operand, recog_operand_loc,
2368 constraints, operand_mode);
2371 bcopy ((char *) constraints, (char *) constraints1,
2372 noperands * sizeof (char *));
2373 n_alternatives = n_occurrences (',', constraints[0]) + 1;
2374 for (i = 1; i < noperands; i++)
2375 if (n_alternatives != n_occurrences (',', constraints[i]) + 1)
2377 error_for_asm (insn, "operand constraints differ in number of alternatives");
2378 /* Avoid further trouble with this insn. */
2379 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
2388 /* Ordinary insn: recognize it, get the operands via insn_extract
2389 and get the constraints. */
2391 insn_code_number = recog_memoized (insn);
2392 if (insn_code_number < 0)
2393 fatal_insn_not_found (insn);
2395 reload_n_operands = noperands = insn_n_operands[insn_code_number];
2396 n_alternatives = insn_n_alternatives[insn_code_number];
2397 /* Just return "no reloads" if insn has no operands with constraints. */
2398 if (n_alternatives == 0)
2400 insn_extract (insn);
2401 for (i = 0; i < noperands; i++)
2403 constraints[i] = constraints1[i]
2404 = insn_operand_constraint[insn_code_number][i];
2405 operand_mode[i] = insn_operand_mode[insn_code_number][i];
2414 /* If we will need to know, later, whether some pair of operands
2415 are the same, we must compare them now and save the result.
2416 Reloading the base and index registers will clobber them
2417 and afterward they will fail to match. */
2419 for (i = 0; i < noperands; i++)
2424 substed_operand[i] = recog_operand[i];
2427 modified[i] = RELOAD_READ;
2429 /* Scan this operand's constraint to see if it is an output operand,
2430 an in-out operand, is commutative, or should match another. */
2435 modified[i] = RELOAD_WRITE;
2437 modified[i] = RELOAD_READ_WRITE;
2440 /* The last operand should not be marked commutative. */
2441 if (i == noperands - 1)
2443 if (this_insn_is_asm)
2444 warning_for_asm (this_insn,
2445 "`%%' constraint used with last operand");
2452 else if (c >= '0' && c <= '9')
2455 operands_match[c][i]
2456 = operands_match_p (recog_operand[c], recog_operand[i]);
2458 /* An operand may not match itself. */
2461 if (this_insn_is_asm)
2462 warning_for_asm (this_insn,
2463 "operand %d has constraint %d", i, c);
2468 /* If C can be commuted with C+1, and C might need to match I,
2469 then C+1 might also need to match I. */
2470 if (commutative >= 0)
2472 if (c == commutative || c == commutative + 1)
2474 int other = c + (c == commutative ? 1 : -1);
2475 operands_match[other][i]
2476 = operands_match_p (recog_operand[other], recog_operand[i]);
2478 if (i == commutative || i == commutative + 1)
2480 int other = i + (i == commutative ? 1 : -1);
2481 operands_match[c][other]
2482 = operands_match_p (recog_operand[c], recog_operand[other]);
2484 /* Note that C is supposed to be less than I.
2485 No need to consider altering both C and I because in
2486 that case we would alter one into the other. */
2492 /* Examine each operand that is a memory reference or memory address
2493 and reload parts of the addresses into index registers.
2494 Also here any references to pseudo regs that didn't get hard regs
2495 but are equivalent to constants get replaced in the insn itself
2496 with those constants. Nobody will ever see them again.
2498 Finally, set up the preferred classes of each operand. */
2500 for (i = 0; i < noperands; i++)
2502 register RTX_CODE code = GET_CODE (recog_operand[i]);
2504 address_reloaded[i] = 0;
2505 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2506 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2509 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2510 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2513 if (*constraints[i] == 0)
2514 /* Ignore things like match_operator operands. */
2516 else if (constraints[i][0] == 'p')
2518 find_reloads_address (VOIDmode, NULL_PTR,
2519 recog_operand[i], recog_operand_loc[i],
2520 i, operand_type[i], ind_levels);
2521 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2523 else if (code == MEM)
2525 if (find_reloads_address (GET_MODE (recog_operand[i]),
2526 recog_operand_loc[i],
2527 XEXP (recog_operand[i], 0),
2528 &XEXP (recog_operand[i], 0),
2529 i, address_type[i], ind_levels))
2530 address_reloaded[i] = 1;
2531 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2533 else if (code == SUBREG)
2534 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2535 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2538 && &SET_DEST (set) == recog_operand_loc[i]);
2539 else if (code == PLUS)
2540 /* We can get a PLUS as an "operand" as a result of
2541 register elimination. See eliminate_regs and gen_reload. */
2542 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2543 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2545 else if (code == REG)
2547 /* This is equivalent to calling find_reloads_toplev.
2548 The code is duplicated for speed.
2549 When we find a pseudo always equivalent to a constant,
2550 we replace it by the constant. We must be sure, however,
2551 that we don't try to replace it in the insn in which it
2553 register int regno = REGNO (recog_operand[i]);
2554 if (reg_equiv_constant[regno] != 0
2555 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2556 substed_operand[i] = recog_operand[i]
2557 = reg_equiv_constant[regno];
2558 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2559 that feeds this insn. */
2560 if (reg_equiv_mem[regno] != 0)
2561 substed_operand[i] = recog_operand[i]
2562 = reg_equiv_mem[regno];
2564 if (reg_equiv_address[regno] != 0)
2566 /* If reg_equiv_address is not a constant address, copy it,
2567 since it may be shared. */
2568 /* We must rerun eliminate_regs, in case the elimination
2569 offsets have changed. */
2570 rtx address = XEXP (eliminate_regs (reg_equiv_memory_loc[regno],
2574 if (rtx_varies_p (address))
2575 address = copy_rtx (address);
2577 /* If this is an output operand, we must output a CLOBBER
2578 after INSN so find_equiv_reg knows REGNO is being written.
2579 Mark this insn specially, do we can put our output reloads
2582 if (modified[i] != RELOAD_READ)
2583 PUT_MODE (emit_insn_after (gen_rtx (CLOBBER, VOIDmode,
2588 *recog_operand_loc[i] = recog_operand[i]
2589 = gen_rtx (MEM, GET_MODE (recog_operand[i]), address);
2590 RTX_UNCHANGING_P (recog_operand[i])
2591 = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
2592 find_reloads_address (GET_MODE (recog_operand[i]),
2593 recog_operand_loc[i],
2594 XEXP (recog_operand[i], 0),
2595 &XEXP (recog_operand[i], 0),
2596 i, address_type[i], ind_levels);
2597 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2600 /* If the operand is still a register (we didn't replace it with an
2601 equivalent), get the preferred class to reload it into. */
2602 code = GET_CODE (recog_operand[i]);
2604 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
2605 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2607 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
2608 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2611 /* If this is simply a copy from operand 1 to operand 0, merge the
2612 preferred classes for the operands. */
2613 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2614 && recog_operand[1] == SET_SRC (set))
2616 preferred_class[0] = preferred_class[1]
2617 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2618 pref_or_nothing[0] |= pref_or_nothing[1];
2619 pref_or_nothing[1] |= pref_or_nothing[0];
2622 /* Now see what we need for pseudo-regs that didn't get hard regs
2623 or got the wrong kind of hard reg. For this, we must consider
2624 all the operands together against the register constraints. */
2626 best = MAX_RECOG_OPERANDS + 300;
2629 goal_alternative_swapped = 0;
2632 /* The constraints are made of several alternatives.
2633 Each operand's constraint looks like foo,bar,... with commas
2634 separating the alternatives. The first alternatives for all
2635 operands go together, the second alternatives go together, etc.
2637 First loop over alternatives. */
2639 for (this_alternative_number = 0;
2640 this_alternative_number < n_alternatives;
2641 this_alternative_number++)
2643 /* Loop over operands for one constraint alternative. */
2644 /* LOSERS counts those that don't fit this alternative
2645 and would require loading. */
2647 /* BAD is set to 1 if it some operand can't fit this alternative
2648 even after reloading. */
2650 /* REJECT is a count of how undesirable this alternative says it is
2651 if any reloading is required. If the alternative matches exactly
2652 then REJECT is ignored, but otherwise it gets this much
2653 counted against it in addition to the reloading needed. Each
2654 ? counts three times here since we want the disparaging caused by
2655 a bad register class to only count 1/3 as much. */
2658 this_earlyclobber = 0;
2660 for (i = 0; i < noperands; i++)
2662 register char *p = constraints[i];
2663 register int win = 0;
2664 /* 0 => this operand can be reloaded somehow for this alternative */
2666 /* 0 => this operand can be reloaded if the alternative allows regs. */
2669 register rtx operand = recog_operand[i];
2671 /* Nonzero means this is a MEM that must be reloaded into a reg
2672 regardless of what the constraint says. */
2673 int force_reload = 0;
2675 /* Nonzero if a constant forced into memory would be OK for this
2678 int earlyclobber = 0;
2680 /* If the operand is a SUBREG, extract
2681 the REG or MEM (or maybe even a constant) within.
2682 (Constants can occur as a result of reg_equiv_constant.) */
2684 while (GET_CODE (operand) == SUBREG)
2686 offset += SUBREG_WORD (operand);
2687 operand = SUBREG_REG (operand);
2688 /* Force reload if this is a constant or PLUS or if there may may
2689 be a problem accessing OPERAND in the outer mode. */
2690 if (CONSTANT_P (operand)
2691 || GET_CODE (operand) == PLUS
2692 /* We must force a reload of paradoxical SUBREGs
2693 of a MEM because the alignment of the inner value
2694 may not be enough to do the outer reference. On
2695 big-endian machines, it may also reference outside
2698 On machines that extend byte operations and we have a
2699 SUBREG where both the inner and outer modes are no wider
2700 than a word and the inner mode is narrower, is integral,
2701 and gets extended when loaded from memory, combine.c has
2702 made assumptions about the behavior of the machine in such
2703 register access. If the data is, in fact, in memory we
2704 must always load using the size assumed to be in the
2705 register and let the insn do the different-sized
2707 || ((GET_CODE (operand) == MEM
2708 || (GET_CODE (operand)== REG
2709 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2710 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2711 < BIGGEST_ALIGNMENT)
2712 && (GET_MODE_SIZE (operand_mode[i])
2713 > GET_MODE_SIZE (GET_MODE (operand))))
2714 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2715 #ifdef LOAD_EXTEND_OP
2716 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2717 && (GET_MODE_SIZE (GET_MODE (operand))
2719 && (GET_MODE_SIZE (operand_mode[i])
2720 > GET_MODE_SIZE (GET_MODE (operand)))
2721 && INTEGRAL_MODE_P (GET_MODE (operand))
2722 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2725 /* Subreg of a hard reg which can't handle the subreg's mode
2726 or which would handle that mode in the wrong number of
2727 registers for subregging to work. */
2728 || (GET_CODE (operand) == REG
2729 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2730 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2731 && (GET_MODE_SIZE (GET_MODE (operand))
2733 && ((GET_MODE_SIZE (GET_MODE (operand))
2735 != HARD_REGNO_NREGS (REGNO (operand),
2736 GET_MODE (operand))))
2737 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2742 this_alternative[i] = (int) NO_REGS;
2743 this_alternative_win[i] = 0;
2744 this_alternative_offmemok[i] = 0;
2745 this_alternative_earlyclobber[i] = 0;
2746 this_alternative_matches[i] = -1;
2748 /* An empty constraint or empty alternative
2749 allows anything which matched the pattern. */
2750 if (*p == 0 || *p == ',')
2753 /* Scan this alternative's specs for this operand;
2754 set WIN if the operand fits any letter in this alternative.
2755 Otherwise, clear BADOP if this operand could
2756 fit some letter after reloads,
2757 or set WINREG if this operand could fit after reloads
2758 provided the constraint allows some registers. */
2760 while (*p && (c = *p++) != ',')
2769 /* The last operand should not be marked commutative. */
2770 if (i != noperands - 1)
2783 /* Ignore rest of this alternative as far as
2784 reloading is concerned. */
2785 while (*p && *p != ',') p++;
2794 this_alternative_matches[i] = c;
2795 /* We are supposed to match a previous operand.
2796 If we do, we win if that one did.
2797 If we do not, count both of the operands as losers.
2798 (This is too conservative, since most of the time
2799 only a single reload insn will be needed to make
2800 the two operands win. As a result, this alternative
2801 may be rejected when it is actually desirable.) */
2802 if ((swapped && (c != commutative || i != commutative + 1))
2803 /* If we are matching as if two operands were swapped,
2804 also pretend that operands_match had been computed
2806 But if I is the second of those and C is the first,
2807 don't exchange them, because operands_match is valid
2808 only on one side of its diagonal. */
2810 [(c == commutative || c == commutative + 1)
2811 ? 2*commutative + 1 - c : c]
2812 [(i == commutative || i == commutative + 1)
2813 ? 2*commutative + 1 - i : i])
2814 : operands_match[c][i])
2815 win = this_alternative_win[c];
2818 /* Operands don't match. */
2820 /* Retroactively mark the operand we had to match
2821 as a loser, if it wasn't already. */
2822 if (this_alternative_win[c])
2824 this_alternative_win[c] = 0;
2825 if (this_alternative[c] == (int) NO_REGS)
2827 /* But count the pair only once in the total badness of
2828 this alternative, if the pair can be a dummy reload. */
2830 = find_dummy_reload (recog_operand[i], recog_operand[c],
2831 recog_operand_loc[i], recog_operand_loc[c],
2832 operand_mode[i], operand_mode[c],
2833 this_alternative[c], -1);
2838 /* This can be fixed with reloads if the operand
2839 we are supposed to match can be fixed with reloads. */
2841 this_alternative[i] = this_alternative[c];
2843 /* If we have to reload this operand and some previous
2844 operand also had to match the same thing as this
2845 operand, we don't know how to do that. So reject this
2847 if (! win || force_reload)
2848 for (j = 0; j < i; j++)
2849 if (this_alternative_matches[j]
2850 == this_alternative_matches[i])
2856 /* All necessary reloads for an address_operand
2857 were handled in find_reloads_address. */
2858 this_alternative[i] = (int) BASE_REG_CLASS;
2865 if (GET_CODE (operand) == MEM
2866 || (GET_CODE (operand) == REG
2867 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2868 && reg_renumber[REGNO (operand)] < 0))
2870 if (CONSTANT_P (operand))
2876 if (GET_CODE (operand) == MEM
2877 && ! address_reloaded[i]
2878 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2879 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2884 if (GET_CODE (operand) == MEM
2885 && ! address_reloaded[i]
2886 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2887 || GET_CODE (XEXP (operand, 0)) == POST_INC))
2891 /* Memory operand whose address is not offsettable. */
2895 if (GET_CODE (operand) == MEM
2896 && ! (ind_levels ? offsettable_memref_p (operand)
2897 : offsettable_nonstrict_memref_p (operand))
2898 /* Certain mem addresses will become offsettable
2899 after they themselves are reloaded. This is important;
2900 we don't want our own handling of unoffsettables
2901 to override the handling of reg_equiv_address. */
2902 && !(GET_CODE (XEXP (operand, 0)) == REG
2904 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
2908 /* Memory operand whose address is offsettable. */
2912 if ((GET_CODE (operand) == MEM
2913 /* If IND_LEVELS, find_reloads_address won't reload a
2914 pseudo that didn't get a hard reg, so we have to
2915 reject that case. */
2916 && (ind_levels ? offsettable_memref_p (operand)
2917 : offsettable_nonstrict_memref_p (operand)))
2918 /* A reloaded auto-increment address is offsettable,
2919 because it is now just a simple register indirect. */
2920 || (GET_CODE (operand) == MEM
2921 && address_reloaded[i]
2922 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2923 || GET_CODE (XEXP (operand, 0)) == PRE_DEC
2924 || GET_CODE (XEXP (operand, 0)) == POST_INC
2925 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2926 /* Certain mem addresses will become offsettable
2927 after they themselves are reloaded. This is important;
2928 we don't want our own handling of unoffsettables
2929 to override the handling of reg_equiv_address. */
2930 || (GET_CODE (operand) == MEM
2931 && GET_CODE (XEXP (operand, 0)) == REG
2933 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))
2934 || (GET_CODE (operand) == REG
2935 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2936 && reg_renumber[REGNO (operand)] < 0
2937 /* If reg_equiv_address is nonzero, we will be
2938 loading it into a register; hence it will be
2939 offsettable, but we cannot say that reg_equiv_mem
2940 is offsettable without checking. */
2941 && ((reg_equiv_mem[REGNO (operand)] != 0
2942 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
2943 || (reg_equiv_address[REGNO (operand)] != 0))))
2945 if (CONSTANT_P (operand) || GET_CODE (operand) == MEM)
2952 /* Output operand that is stored before the need for the
2953 input operands (and their index registers) is over. */
2954 earlyclobber = 1, this_earlyclobber = 1;
2958 #ifndef REAL_ARITHMETIC
2959 /* Match any floating double constant, but only if
2960 we can examine the bits of it reliably. */
2961 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
2962 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
2963 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
2966 if (GET_CODE (operand) == CONST_DOUBLE)
2971 if (GET_CODE (operand) == CONST_DOUBLE)
2977 if (GET_CODE (operand) == CONST_DOUBLE
2978 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
2983 if (GET_CODE (operand) == CONST_INT
2984 || (GET_CODE (operand) == CONST_DOUBLE
2985 && GET_MODE (operand) == VOIDmode))
2988 if (CONSTANT_P (operand)
2989 #ifdef LEGITIMATE_PIC_OPERAND_P
2990 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
2997 if (GET_CODE (operand) == CONST_INT
2998 || (GET_CODE (operand) == CONST_DOUBLE
2999 && GET_MODE (operand) == VOIDmode))
3011 if (GET_CODE (operand) == CONST_INT
3012 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
3022 /* A PLUS is never a valid operand, but reload can make
3023 it from a register when eliminating registers. */
3024 && GET_CODE (operand) != PLUS
3025 /* A SCRATCH is not a valid operand. */
3026 && GET_CODE (operand) != SCRATCH
3027 #ifdef LEGITIMATE_PIC_OPERAND_P
3028 && (! CONSTANT_P (operand)
3030 || LEGITIMATE_PIC_OPERAND_P (operand))
3032 && (GENERAL_REGS == ALL_REGS
3033 || GET_CODE (operand) != REG
3034 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3035 && reg_renumber[REGNO (operand)] < 0)))
3037 /* Drop through into 'r' case */
3041 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3044 #ifdef EXTRA_CONSTRAINT
3050 if (EXTRA_CONSTRAINT (operand, c))
3057 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3060 if (GET_MODE (operand) == BLKmode)
3063 if (GET_CODE (operand) == REG
3064 && reg_fits_class_p (operand, this_alternative[i],
3065 offset, GET_MODE (recog_operand[i])))
3072 /* If this operand could be handled with a reg,
3073 and some reg is allowed, then this operand can be handled. */
3074 if (winreg && this_alternative[i] != (int) NO_REGS)
3077 /* Record which operands fit this alternative. */
3078 this_alternative_earlyclobber[i] = earlyclobber;
3079 if (win && ! force_reload)
3080 this_alternative_win[i] = 1;
3083 int const_to_mem = 0;
3085 this_alternative_offmemok[i] = offmemok;
3089 /* Alternative loses if it has no regs for a reg operand. */
3090 if (GET_CODE (operand) == REG
3091 && this_alternative[i] == (int) NO_REGS
3092 && this_alternative_matches[i] < 0)
3095 /* Alternative loses if it requires a type of reload not
3096 permitted for this insn. We can always reload SCRATCH
3097 and objects with a REG_UNUSED note. */
3098 if (GET_CODE (operand) != SCRATCH
3099 && modified[i] != RELOAD_READ && no_output_reloads
3100 && ! find_reg_note (insn, REG_UNUSED, operand))
3102 else if (modified[i] != RELOAD_WRITE && no_input_reloads)
3105 /* If this is a constant that is reloaded into the desired
3106 class by copying it to memory first, count that as another
3107 reload. This is consistent with other code and is
3108 required to avoid choosing another alternative when
3109 the constant is moved into memory by this function on
3110 an early reload pass. Note that the test here is
3111 precisely the same as in the code below that calls
3113 if (CONSTANT_P (operand)
3114 /* force_const_mem does not accept HIGH. */
3115 && GET_CODE (operand) != HIGH
3116 && (PREFERRED_RELOAD_CLASS (operand,
3117 (enum reg_class) this_alternative[i])
3119 && operand_mode[i] != VOIDmode)
3122 if (this_alternative[i] != (int) NO_REGS)
3126 /* If we can't reload this value at all, reject this
3127 alternative. Note that we could also lose due to
3128 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3131 if (! CONSTANT_P (operand)
3132 && (enum reg_class) this_alternative[i] != NO_REGS
3133 && (PREFERRED_RELOAD_CLASS (operand,
3134 (enum reg_class) this_alternative[i])
3138 /* We prefer to reload pseudos over reloading other things,
3139 since such reloads may be able to be eliminated later.
3140 If we are reloading a SCRATCH, we won't be generating any
3141 insns, just using a register, so it is also preferred.
3142 So bump REJECT in other cases. Don't do this in the
3143 case where we are forcing a constant into memory and
3144 it will then win since we don't want to have a different
3145 alternative match then. */
3146 if (! (GET_CODE (operand) == REG
3147 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3148 && GET_CODE (operand) != SCRATCH
3149 && ! (const_to_mem && constmemok))
3153 /* If this operand is a pseudo register that didn't get a hard
3154 reg and this alternative accepts some register, see if the
3155 class that we want is a subset of the preferred class for this
3156 register. If not, but it intersects that class, use the
3157 preferred class instead. If it does not intersect the preferred
3158 class, show that usage of this alternative should be discouraged;
3159 it will be discouraged more still if the register is `preferred
3160 or nothing'. We do this because it increases the chance of
3161 reusing our spill register in a later insn and avoiding a pair
3162 of memory stores and loads.
3164 Don't bother with this if this alternative will accept this
3167 Don't do this for a multiword operand, since it is only a
3168 small win and has the risk of requiring more spill registers,
3169 which could cause a large loss.
3171 Don't do this if the preferred class has only one register
3172 because we might otherwise exhaust the class. */
3175 if (! win && this_alternative[i] != (int) NO_REGS
3176 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3177 && reg_class_size[(int) preferred_class[i]] > 1)
3179 if (! reg_class_subset_p (this_alternative[i],
3180 preferred_class[i]))
3182 /* Since we don't have a way of forming the intersection,
3183 we just do something special if the preferred class
3184 is a subset of the class we have; that's the most
3185 common case anyway. */
3186 if (reg_class_subset_p (preferred_class[i],
3187 this_alternative[i]))
3188 this_alternative[i] = (int) preferred_class[i];
3190 reject += (1 + pref_or_nothing[i]);
3195 /* Now see if any output operands that are marked "earlyclobber"
3196 in this alternative conflict with any input operands
3197 or any memory addresses. */
3199 for (i = 0; i < noperands; i++)
3200 if (this_alternative_earlyclobber[i]
3201 && this_alternative_win[i])
3203 struct decomposition early_data;
3205 early_data = decompose (recog_operand[i]);
3207 if (modified[i] == RELOAD_READ)
3209 if (this_insn_is_asm)
3210 warning_for_asm (this_insn,
3211 "`&' constraint used with input operand");
3217 if (this_alternative[i] == NO_REGS)
3219 this_alternative_earlyclobber[i] = 0;
3220 if (this_insn_is_asm)
3221 error_for_asm (this_insn,
3222 "`&' constraint used with no register class");
3227 for (j = 0; j < noperands; j++)
3228 /* Is this an input operand or a memory ref? */
3229 if ((GET_CODE (recog_operand[j]) == MEM
3230 || modified[j] != RELOAD_WRITE)
3232 /* Ignore things like match_operator operands. */
3233 && *constraints1[j] != 0
3234 /* Don't count an input operand that is constrained to match
3235 the early clobber operand. */
3236 && ! (this_alternative_matches[j] == i
3237 && rtx_equal_p (recog_operand[i], recog_operand[j]))
3238 /* Is it altered by storing the earlyclobber operand? */
3239 && !immune_p (recog_operand[j], recog_operand[i], early_data))
3241 /* If the output is in a single-reg class,
3242 it's costly to reload it, so reload the input instead. */
3243 if (reg_class_size[this_alternative[i]] == 1
3244 && (GET_CODE (recog_operand[j]) == REG
3245 || GET_CODE (recog_operand[j]) == SUBREG))
3248 this_alternative_win[j] = 0;
3253 /* If an earlyclobber operand conflicts with something,
3254 it must be reloaded, so request this and count the cost. */
3258 this_alternative_win[i] = 0;
3259 for (j = 0; j < noperands; j++)
3260 if (this_alternative_matches[j] == i
3261 && this_alternative_win[j])
3263 this_alternative_win[j] = 0;
3269 /* If one alternative accepts all the operands, no reload required,
3270 choose that alternative; don't consider the remaining ones. */
3273 /* Unswap these so that they are never swapped at `finish'. */
3274 if (commutative >= 0)
3276 recog_operand[commutative] = substed_operand[commutative];
3277 recog_operand[commutative + 1]
3278 = substed_operand[commutative + 1];
3280 for (i = 0; i < noperands; i++)
3282 goal_alternative_win[i] = 1;
3283 goal_alternative[i] = this_alternative[i];
3284 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3285 goal_alternative_matches[i] = this_alternative_matches[i];
3286 goal_alternative_earlyclobber[i]
3287 = this_alternative_earlyclobber[i];
3289 goal_alternative_number = this_alternative_number;
3290 goal_alternative_swapped = swapped;
3291 goal_earlyclobber = this_earlyclobber;
3295 /* REJECT, set by the ! and ? constraint characters and when a register
3296 would be reloaded into a non-preferred class, discourages the use of
3297 this alternative for a reload goal. REJECT is incremented by three
3298 for each ? and one for each non-preferred class. */
3299 losers = losers * 3 + reject;
3301 /* If this alternative can be made to work by reloading,
3302 and it needs less reloading than the others checked so far,
3303 record it as the chosen goal for reloading. */
3304 if (! bad && best > losers)
3306 for (i = 0; i < noperands; i++)
3308 goal_alternative[i] = this_alternative[i];
3309 goal_alternative_win[i] = this_alternative_win[i];
3310 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3311 goal_alternative_matches[i] = this_alternative_matches[i];
3312 goal_alternative_earlyclobber[i]
3313 = this_alternative_earlyclobber[i];
3315 goal_alternative_swapped = swapped;
3317 goal_alternative_number = this_alternative_number;
3318 goal_earlyclobber = this_earlyclobber;
3322 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3323 then we need to try each alternative twice,
3324 the second time matching those two operands
3325 as if we had exchanged them.
3326 To do this, really exchange them in operands.
3328 If we have just tried the alternatives the second time,
3329 return operands to normal and drop through. */
3331 if (commutative >= 0)
3336 register enum reg_class tclass;
3339 recog_operand[commutative] = substed_operand[commutative + 1];
3340 recog_operand[commutative + 1] = substed_operand[commutative];
3342 tclass = preferred_class[commutative];
3343 preferred_class[commutative] = preferred_class[commutative + 1];
3344 preferred_class[commutative + 1] = tclass;
3346 t = pref_or_nothing[commutative];
3347 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3348 pref_or_nothing[commutative + 1] = t;
3350 bcopy ((char *) constraints1, (char *) constraints,
3351 noperands * sizeof (char *));
3356 recog_operand[commutative] = substed_operand[commutative];
3357 recog_operand[commutative + 1] = substed_operand[commutative + 1];
3361 /* The operands don't meet the constraints.
3362 goal_alternative describes the alternative
3363 that we could reach by reloading the fewest operands.
3364 Reload so as to fit it. */
3366 if (best == MAX_RECOG_OPERANDS + 300)
3368 /* No alternative works with reloads?? */
3369 if (insn_code_number >= 0)
3371 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3372 /* Avoid further trouble with this insn. */
3373 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3378 /* Jump to `finish' from above if all operands are valid already.
3379 In that case, goal_alternative_win is all 1. */
3382 /* Right now, for any pair of operands I and J that are required to match,
3384 goal_alternative_matches[J] is I.
3385 Set up goal_alternative_matched as the inverse function:
3386 goal_alternative_matched[I] = J. */
3388 for (i = 0; i < noperands; i++)
3389 goal_alternative_matched[i] = -1;
3391 for (i = 0; i < noperands; i++)
3392 if (! goal_alternative_win[i]
3393 && goal_alternative_matches[i] >= 0)
3394 goal_alternative_matched[goal_alternative_matches[i]] = i;
3396 /* If the best alternative is with operands 1 and 2 swapped,
3397 consider them swapped before reporting the reloads. Update the
3398 operand numbers of any reloads already pushed. */
3400 if (goal_alternative_swapped)
3404 tem = substed_operand[commutative];
3405 substed_operand[commutative] = substed_operand[commutative + 1];
3406 substed_operand[commutative + 1] = tem;
3407 tem = recog_operand[commutative];
3408 recog_operand[commutative] = recog_operand[commutative + 1];
3409 recog_operand[commutative + 1] = tem;
3411 for (i = 0; i < n_reloads; i++)
3413 if (reload_opnum[i] == commutative)
3414 reload_opnum[i] = commutative + 1;
3415 else if (reload_opnum[i] == commutative + 1)
3416 reload_opnum[i] = commutative;
3420 /* Perform whatever substitutions on the operands we are supposed
3421 to make due to commutativity or replacement of registers
3422 with equivalent constants or memory slots. */
3424 for (i = 0; i < noperands; i++)
3426 *recog_operand_loc[i] = substed_operand[i];
3427 /* While we are looping on operands, initialize this. */
3428 operand_reloadnum[i] = -1;
3430 /* If this is an earlyclobber operand, we need to widen the scope.
3431 The reload must remain valid from the start of the insn being
3432 reloaded until after the operand is stored into its destination.
3433 We approximate this with RELOAD_OTHER even though we know that we
3434 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3436 One special case that is worth checking is when we have an
3437 output that is earlyclobber but isn't used past the insn (typically
3438 a SCRATCH). In this case, we only need have the reload live
3439 through the insn itself, but not for any of our input or output
3442 In any case, anything needed to address this operand can remain
3443 however they were previously categorized. */
3445 if (goal_alternative_earlyclobber[i])
3447 = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
3448 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3451 /* Any constants that aren't allowed and can't be reloaded
3452 into registers are here changed into memory references. */
3453 for (i = 0; i < noperands; i++)
3454 if (! goal_alternative_win[i]
3455 && CONSTANT_P (recog_operand[i])
3456 /* force_const_mem does not accept HIGH. */
3457 && GET_CODE (recog_operand[i]) != HIGH
3458 && (PREFERRED_RELOAD_CLASS (recog_operand[i],
3459 (enum reg_class) goal_alternative[i])
3461 && operand_mode[i] != VOIDmode)
3463 *recog_operand_loc[i] = recog_operand[i]
3464 = find_reloads_toplev (force_const_mem (operand_mode[i],
3466 i, address_type[i], ind_levels, 0);
3467 if (alternative_allows_memconst (constraints1[i],
3468 goal_alternative_number))
3469 goal_alternative_win[i] = 1;
3472 /* Record the values of the earlyclobber operands for the caller. */
3473 if (goal_earlyclobber)
3474 for (i = 0; i < noperands; i++)
3475 if (goal_alternative_earlyclobber[i])
3476 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3478 /* Now record reloads for all the operands that need them. */
3479 for (i = 0; i < noperands; i++)
3480 if (! goal_alternative_win[i])
3482 /* Operands that match previous ones have already been handled. */
3483 if (goal_alternative_matches[i] >= 0)
3485 /* Handle an operand with a nonoffsettable address
3486 appearing where an offsettable address will do
3487 by reloading the address into a base register.
3489 ??? We can also do this when the operand is a register and
3490 reg_equiv_mem is not offsettable, but this is a bit tricky,
3491 so we don't bother with it. It may not be worth doing. */
3492 else if (goal_alternative_matched[i] == -1
3493 && goal_alternative_offmemok[i]
3494 && GET_CODE (recog_operand[i]) == MEM)
3496 operand_reloadnum[i]
3497 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
3498 &XEXP (recog_operand[i], 0), NULL_PTR,
3499 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
3500 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3501 reload_inc[operand_reloadnum[i]]
3502 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
3504 /* If this operand is an output, we will have made any
3505 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3506 now we are treating part of the operand as an input, so
3507 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3509 if (modified[i] == RELOAD_WRITE)
3510 for (j = 0; j < n_reloads; j++)
3511 if (reload_opnum[j] == i
3512 && reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3513 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
3515 else if (goal_alternative_matched[i] == -1)
3516 operand_reloadnum[i] =
3517 push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3518 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3519 (modified[i] != RELOAD_WRITE ?
3520 recog_operand_loc[i] : 0),
3521 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
3522 (enum reg_class) goal_alternative[i],
3523 (modified[i] == RELOAD_WRITE
3524 ? VOIDmode : operand_mode[i]),
3525 (modified[i] == RELOAD_READ
3526 ? VOIDmode : operand_mode[i]),
3527 (insn_code_number < 0 ? 0
3528 : insn_operand_strict_low[insn_code_number][i]),
3529 0, i, operand_type[i]);
3530 /* In a matching pair of operands, one must be input only
3531 and the other must be output only.
3532 Pass the input operand as IN and the other as OUT. */
3533 else if (modified[i] == RELOAD_READ
3534 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3536 operand_reloadnum[i]
3537 = push_reload (recog_operand[i],
3538 recog_operand[goal_alternative_matched[i]],
3539 recog_operand_loc[i],
3540 recog_operand_loc[goal_alternative_matched[i]],
3541 (enum reg_class) goal_alternative[i],
3543 operand_mode[goal_alternative_matched[i]],
3544 0, 0, i, RELOAD_OTHER);
3545 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3547 else if (modified[i] == RELOAD_WRITE
3548 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3550 operand_reloadnum[goal_alternative_matched[i]]
3551 = push_reload (recog_operand[goal_alternative_matched[i]],
3553 recog_operand_loc[goal_alternative_matched[i]],
3554 recog_operand_loc[i],
3555 (enum reg_class) goal_alternative[i],
3556 operand_mode[goal_alternative_matched[i]],
3558 0, 0, i, RELOAD_OTHER);
3559 operand_reloadnum[i] = output_reloadnum;
3561 else if (insn_code_number >= 0)
3565 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3566 /* Avoid further trouble with this insn. */
3567 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3572 else if (goal_alternative_matched[i] < 0
3573 && goal_alternative_matches[i] < 0
3576 /* For each non-matching operand that's a MEM or a pseudo-register
3577 that didn't get a hard register, make an optional reload.
3578 This may get done even if the insn needs no reloads otherwise. */
3580 rtx operand = recog_operand[i];
3582 while (GET_CODE (operand) == SUBREG)
3583 operand = XEXP (operand, 0);
3584 if ((GET_CODE (operand) == MEM
3585 || (GET_CODE (operand) == REG
3586 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3587 && (enum reg_class) goal_alternative[i] != NO_REGS
3588 && ! no_input_reloads
3589 /* Optional output reloads don't do anything and we mustn't
3590 make in-out reloads on insns that are not permitted output
3592 && (modified[i] == RELOAD_READ
3593 || (modified[i] == RELOAD_READ_WRITE && ! no_output_reloads)))
3594 operand_reloadnum[i]
3595 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3596 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3597 (modified[i] != RELOAD_WRITE
3598 ? recog_operand_loc[i] : 0),
3599 (modified[i] != RELOAD_READ
3600 ? recog_operand_loc[i] : 0),
3601 (enum reg_class) goal_alternative[i],
3602 (modified[i] == RELOAD_WRITE
3603 ? VOIDmode : operand_mode[i]),
3604 (modified[i] == RELOAD_READ
3605 ? VOIDmode : operand_mode[i]),
3606 (insn_code_number < 0 ? 0
3607 : insn_operand_strict_low[insn_code_number][i]),
3608 1, i, operand_type[i]);
3610 else if (goal_alternative_matches[i] >= 0
3611 && goal_alternative_win[goal_alternative_matches[i]]
3612 && modified[i] == RELOAD_READ
3613 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3614 && ! no_input_reloads && ! no_output_reloads
3617 /* Similarly, make an optional reload for a pair of matching
3618 objects that are in MEM or a pseudo that didn't get a hard reg. */
3620 rtx operand = recog_operand[i];
3622 while (GET_CODE (operand) == SUBREG)
3623 operand = XEXP (operand, 0);
3624 if ((GET_CODE (operand) == MEM
3625 || (GET_CODE (operand) == REG
3626 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3627 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3629 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3630 = push_reload (recog_operand[goal_alternative_matches[i]],
3632 recog_operand_loc[goal_alternative_matches[i]],
3633 recog_operand_loc[i],
3634 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3635 operand_mode[goal_alternative_matches[i]],
3637 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3640 /* If this insn pattern contains any MATCH_DUP's, make sure that
3641 they will be substituted if the operands they match are substituted.
3642 Also do now any substitutions we already did on the operands.
3644 Don't do this if we aren't making replacements because we might be
3645 propagating things allocated by frame pointer elimination into places
3646 it doesn't expect. */
3648 if (insn_code_number >= 0 && replace)
3649 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3651 int opno = recog_dup_num[i];
3652 *recog_dup_loc[i] = *recog_operand_loc[opno];
3653 if (operand_reloadnum[opno] >= 0)
3654 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3655 insn_operand_mode[insn_code_number][opno]);
3659 /* This loses because reloading of prior insns can invalidate the equivalence
3660 (or at least find_equiv_reg isn't smart enough to find it any more),
3661 causing this insn to need more reload regs than it needed before.
3662 It may be too late to make the reload regs available.
3663 Now this optimization is done safely in choose_reload_regs. */
3665 /* For each reload of a reg into some other class of reg,
3666 search for an existing equivalent reg (same value now) in the right class.
3667 We can use it as long as we don't need to change its contents. */
3668 for (i = 0; i < n_reloads; i++)
3669 if (reload_reg_rtx[i] == 0
3670 && reload_in[i] != 0
3671 && GET_CODE (reload_in[i]) == REG
3672 && reload_out[i] == 0)
3675 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3676 static_reload_reg_p, 0, reload_inmode[i]);
3677 /* Prevent generation of insn to load the value
3678 because the one we found already has the value. */
3679 if (reload_reg_rtx[i])
3680 reload_in[i] = reload_reg_rtx[i];
3684 /* Perhaps an output reload can be combined with another
3685 to reduce needs by one. */
3686 if (!goal_earlyclobber)
3689 /* If we have a pair of reloads for parts of an address, they are reloading
3690 the same object, the operands themselves were not reloaded, and they
3691 are for two operands that are supposed to match, merge the reloads and
3692 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3694 for (i = 0; i < n_reloads; i++)
3698 for (j = i + 1; j < n_reloads; j++)
3699 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3700 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
3701 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
3702 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3703 && rtx_equal_p (reload_in[i], reload_in[j])
3704 && (operand_reloadnum[reload_opnum[i]] < 0
3705 || reload_optional[operand_reloadnum[reload_opnum[i]]])
3706 && (operand_reloadnum[reload_opnum[j]] < 0
3707 || reload_optional[operand_reloadnum[reload_opnum[j]]])
3708 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
3709 || (goal_alternative_matches[reload_opnum[j]]
3710 == reload_opnum[i])))
3712 for (k = 0; k < n_replacements; k++)
3713 if (replacements[k].what == j)
3714 replacements[k].what = i;
3716 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3721 /* Scan all the reloads and update their type.
3722 If a reload is for the address of an operand and we didn't reload
3723 that operand, change the type. Similarly, change the operand number
3724 of a reload when two operands match. If a reload is optional, treat it
3725 as though the operand isn't reloaded.
3727 ??? This latter case is somewhat odd because if we do the optional
3728 reload, it means the object is hanging around. Thus we need only
3729 do the address reload if the optional reload was NOT done.
3731 Change secondary reloads to be the address type of their operand, not
3734 If an operand's reload is now RELOAD_OTHER, change any
3735 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3736 RELOAD_FOR_OTHER_ADDRESS. */
3738 for (i = 0; i < n_reloads; i++)
3740 if (reload_secondary_p[i]
3741 && reload_when_needed[i] == operand_type[reload_opnum[i]])
3742 reload_when_needed[i] = address_type[reload_opnum[i]];
3744 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3745 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
3746 && (operand_reloadnum[reload_opnum[i]] < 0
3747 || reload_optional[operand_reloadnum[reload_opnum[i]]]))
3749 /* If we have a secondary reload to go along with this reload,
3750 change its type to RELOAD_FOR_OPADDR_ADDR. */
3752 if (reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3753 && reload_secondary_in_reload[i] != -1)
3755 int secondary_in_reload = reload_secondary_in_reload[i];
3757 reload_when_needed[secondary_in_reload] =
3758 RELOAD_FOR_OPADDR_ADDR;
3760 /* If there's a tertiary reload we have to change it also. */
3761 if (secondary_in_reload > 0
3762 && reload_secondary_in_reload[secondary_in_reload] != -1)
3763 reload_when_needed[reload_secondary_in_reload[secondary_in_reload]]
3764 = RELOAD_FOR_OPADDR_ADDR;
3767 if (reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS
3768 && reload_secondary_out_reload[i] != -1)
3770 int secondary_out_reload = reload_secondary_out_reload[i];
3772 reload_when_needed[secondary_out_reload] =
3773 RELOAD_FOR_OPADDR_ADDR;
3775 /* If there's a tertiary reload we have to change it also. */
3776 if (secondary_out_reload
3777 && reload_secondary_out_reload[secondary_out_reload] != -1)
3778 reload_when_needed[reload_secondary_out_reload[secondary_out_reload]]
3779 = RELOAD_FOR_OPADDR_ADDR;
3781 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3784 if (reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3785 && operand_reloadnum[reload_opnum[i]] >= 0
3786 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
3788 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
3790 if (goal_alternative_matches[reload_opnum[i]] >= 0)
3791 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
3794 /* See if we have any reloads that are now allowed to be merged
3795 because we've changed when the reload is needed to
3796 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3797 check for the most common cases. */
3799 for (i = 0; i < n_reloads; i++)
3800 if (reload_in[i] != 0 && reload_out[i] == 0
3801 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
3802 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
3803 for (j = 0; j < n_reloads; j++)
3804 if (i != j && reload_in[j] != 0 && reload_out[j] == 0
3805 && reload_when_needed[j] == reload_when_needed[i]
3806 && MATCHES (reload_in[i], reload_in[j])
3807 && reload_reg_class[i] == reload_reg_class[j]
3808 && !reload_nocombine[i] && !reload_nocombine[j]
3809 && reload_reg_rtx[i] == reload_reg_rtx[j])
3811 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
3812 transfer_replacements (i, j);
3816 #else /* no REGISTER_CONSTRAINTS */
3818 int insn_code_number;
3819 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
3821 rtx body = PATTERN (insn);
3825 n_earlyclobbers = 0;
3826 replace_reloads = replace;
3829 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3830 Store the operand values in RECOG_OPERAND and the locations
3831 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3832 Return if the insn needs no reload processing. */
3834 switch (GET_CODE (body))
3845 noperands = asm_noperands (body);
3848 /* This insn is an `asm' with operands.
3849 First, find out how many operands, and allocate space. */
3851 insn_code_number = -1;
3852 /* ??? This is a bug! ???
3853 Give up and delete this insn if it has too many operands. */
3854 if (noperands > MAX_RECOG_OPERANDS)
3857 /* Now get the operand values out of the insn. */
3859 decode_asm_operands (body, recog_operand, recog_operand_loc,
3860 NULL_PTR, NULL_PTR);
3865 /* Ordinary insn: recognize it, allocate space for operands and
3866 constraints, and get them out via insn_extract. */
3868 insn_code_number = recog_memoized (insn);
3869 noperands = insn_n_operands[insn_code_number];
3870 insn_extract (insn);
3876 for (i = 0; i < noperands; i++)
3878 register RTX_CODE code = GET_CODE (recog_operand[i]);
3879 int is_set_dest = GET_CODE (body) == SET && (i == 0);
3881 if (insn_code_number >= 0)
3882 if (insn_operand_address_p[insn_code_number][i])
3883 find_reloads_address (VOIDmode, NULL_PTR,
3884 recog_operand[i], recog_operand_loc[i],
3885 i, RELOAD_FOR_INPUT, ind_levels);
3887 /* In these cases, we can't tell if the operand is an input
3888 or an output, so be conservative. In practice it won't be
3892 find_reloads_address (GET_MODE (recog_operand[i]),
3893 recog_operand_loc[i],
3894 XEXP (recog_operand[i], 0),
3895 &XEXP (recog_operand[i], 0),
3896 i, RELOAD_OTHER, ind_levels);
3898 recog_operand[i] = *recog_operand_loc[i]
3899 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
3900 ind_levels, is_set_dest);
3903 register int regno = REGNO (recog_operand[i]);
3904 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3905 recog_operand[i] = *recog_operand_loc[i]
3906 = reg_equiv_constant[regno];
3907 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3908 that feeds this insn. */
3909 if (reg_equiv_mem[regno] != 0)
3910 recog_operand[i] = *recog_operand_loc[i]
3911 = reg_equiv_mem[regno];
3916 /* Perhaps an output reload can be combined with another
3917 to reduce needs by one. */
3918 if (!goal_earlyclobber)
3920 #endif /* no REGISTER_CONSTRAINTS */
3923 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3924 accepts a memory operand with constant address. */
3927 alternative_allows_memconst (constraint, altnum)
3932 /* Skip alternatives before the one requested. */
3935 while (*constraint++ != ',');
3938 /* Scan the requested alternative for 'm' or 'o'.
3939 If one of them is present, this alternative accepts memory constants. */
3940 while ((c = *constraint++) && c != ',' && c != '#')
3941 if (c == 'm' || c == 'o')
3946 /* Scan X for memory references and scan the addresses for reloading.
3947 Also checks for references to "constant" regs that we want to eliminate
3948 and replaces them with the values they stand for.
3949 We may alter X destructively if it contains a reference to such.
3950 If X is just a constant reg, we return the equivalent value
3953 IND_LEVELS says how many levels of indirect addressing this machine
3956 OPNUM and TYPE identify the purpose of the reload.
3958 IS_SET_DEST is true if X is the destination of a SET, which is not
3959 appropriate to be replaced by a constant. */
3962 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest)
3965 enum reload_type type;
3969 register RTX_CODE code = GET_CODE (x);
3971 register char *fmt = GET_RTX_FORMAT (code);
3976 /* This code is duplicated for speed in find_reloads. */
3977 register int regno = REGNO (x);
3978 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3979 x = reg_equiv_constant[regno];
3981 /* This creates (subreg (mem...)) which would cause an unnecessary
3982 reload of the mem. */
3983 else if (reg_equiv_mem[regno] != 0)
3984 x = reg_equiv_mem[regno];
3986 else if (reg_equiv_address[regno] != 0)
3988 /* If reg_equiv_address varies, it may be shared, so copy it. */
3989 /* We must rerun eliminate_regs, in case the elimination
3990 offsets have changed. */
3991 rtx addr = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0,
3995 if (rtx_varies_p (addr))
3996 addr = copy_rtx (addr);
3998 x = gen_rtx (MEM, GET_MODE (x), addr);
3999 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4000 find_reloads_address (GET_MODE (x), NULL_PTR,
4002 &XEXP (x, 0), opnum, type, ind_levels);
4009 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4010 opnum, type, ind_levels);
4014 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4016 /* Check for SUBREG containing a REG that's equivalent to a constant.
4017 If the constant has a known value, truncate it right now.
4018 Similarly if we are extracting a single-word of a multi-word
4019 constant. If the constant is symbolic, allow it to be substituted
4020 normally. push_reload will strip the subreg later. If the
4021 constant is VOIDmode, abort because we will lose the mode of
4022 the register (this should never happen because one of the cases
4023 above should handle it). */
4025 register int regno = REGNO (SUBREG_REG (x));
4028 if (subreg_lowpart_p (x)
4029 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4030 && reg_equiv_constant[regno] != 0
4031 && (tem = gen_lowpart_common (GET_MODE (x),
4032 reg_equiv_constant[regno])) != 0)
4035 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
4036 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4037 && reg_equiv_constant[regno] != 0
4038 && (tem = operand_subword (reg_equiv_constant[regno],
4040 GET_MODE (SUBREG_REG (x)))) != 0)
4043 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4044 && reg_equiv_constant[regno] != 0
4045 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
4048 /* If the subreg contains a reg that will be converted to a mem,
4049 convert the subreg to a narrower memref now.
4050 Otherwise, we would get (subreg (mem ...) ...),
4051 which would force reload of the mem.
4053 We also need to do this if there is an equivalent MEM that is
4054 not offsettable. In that case, alter_subreg would produce an
4055 invalid address on big-endian machines.
4057 For machines that extend byte loads, we must not reload using
4058 a wider mode if we have a paradoxical SUBREG. find_reloads will
4059 force a reload in that case. So we should not do anything here. */
4061 else if (regno >= FIRST_PSEUDO_REGISTER
4062 #ifdef LOAD_EXTEND_OP
4063 && (GET_MODE_SIZE (GET_MODE (x))
4064 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4066 && (reg_equiv_address[regno] != 0
4067 || (reg_equiv_mem[regno] != 0
4068 && (! strict_memory_address_p (GET_MODE (x),
4069 XEXP (reg_equiv_mem[regno], 0))
4070 || ! offsettable_memref_p (reg_equiv_mem[regno])))))
4072 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
4073 /* We must rerun eliminate_regs, in case the elimination
4074 offsets have changed. */
4075 rtx addr = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0,
4078 if (BYTES_BIG_ENDIAN)
4081 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
4082 offset += MIN (size, UNITS_PER_WORD);
4083 size = GET_MODE_SIZE (GET_MODE (x));
4084 offset -= MIN (size, UNITS_PER_WORD);
4086 addr = plus_constant (addr, offset);
4087 x = gen_rtx (MEM, GET_MODE (x), addr);
4088 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4089 find_reloads_address (GET_MODE (x), NULL_PTR,
4091 &XEXP (x, 0), opnum, type, ind_levels);
4096 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4099 XEXP (x, i) = find_reloads_toplev (XEXP (x, i), opnum, type,
4100 ind_levels, is_set_dest);
4105 /* Return a mem ref for the memory equivalent of reg REGNO.
4106 This mem ref is not shared with anything. */
4109 make_memloc (ad, regno)
4114 /* We must rerun eliminate_regs, in case the elimination
4115 offsets have changed. */
4116 rtx tem = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX),
4119 #if 0 /* We cannot safely reuse a memloc made here;
4120 if the pseudo appears twice, and its mem needs a reload,
4121 it gets two separate reloads assigned, but it only
4122 gets substituted with the second of them;
4123 then it can get used before that reload reg gets loaded up. */
4124 for (i = 0; i < n_memlocs; i++)
4125 if (rtx_equal_p (tem, XEXP (memlocs[i], 0)))
4129 /* If TEM might contain a pseudo, we must copy it to avoid
4130 modifying it when we do the substitution for the reload. */
4131 if (rtx_varies_p (tem))
4132 tem = copy_rtx (tem);
4134 tem = gen_rtx (MEM, GET_MODE (ad), tem);
4135 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
4136 memlocs[n_memlocs++] = tem;
4140 /* Record all reloads needed for handling memory address AD
4141 which appears in *LOC in a memory reference to mode MODE
4142 which itself is found in location *MEMREFLOC.
4143 Note that we take shortcuts assuming that no multi-reg machine mode
4144 occurs as part of an address.
4146 OPNUM and TYPE specify the purpose of this reload.
4148 IND_LEVELS says how many levels of indirect addressing this machine
4151 Value is nonzero if this address is reloaded or replaced as a whole.
4152 This is interesting to the caller if the address is an autoincrement.
4154 Note that there is no verification that the address will be valid after
4155 this routine does its work. Instead, we rely on the fact that the address
4156 was valid when reload started. So we need only undo things that reload
4157 could have broken. These are wrong register types, pseudos not allocated
4158 to a hard register, and frame pointer elimination. */
4161 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels)
4162 enum machine_mode mode;
4167 enum reload_type type;
4173 /* If the address is a register, see if it is a legitimate address and
4174 reload if not. We first handle the cases where we need not reload
4175 or where we must reload in a non-standard way. */
4177 if (GET_CODE (ad) == REG)
4181 if (reg_equiv_constant[regno] != 0
4182 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
4184 *loc = ad = reg_equiv_constant[regno];
4188 else if (reg_equiv_address[regno] != 0)
4190 tem = make_memloc (ad, regno);
4191 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
4192 &XEXP (tem, 0), opnum, type, ind_levels);
4193 push_reload (tem, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
4194 GET_MODE (ad), VOIDmode, 0, 0,
4199 /* We can avoid a reload if the register's equivalent memory expression
4200 is valid as an indirect memory address.
4201 But not all addresses are valid in a mem used as an indirect address:
4202 only reg or reg+constant. */
4204 else if (reg_equiv_mem[regno] != 0 && ind_levels > 0
4205 && strict_memory_address_p (mode, reg_equiv_mem[regno])
4206 && (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == REG
4207 || (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == PLUS
4208 && GET_CODE (XEXP (XEXP (reg_equiv_mem[regno], 0), 0)) == REG
4209 && CONSTANT_P (XEXP (XEXP (reg_equiv_mem[regno], 0), 1)))))
4212 /* The only remaining case where we can avoid a reload is if this is a
4213 hard register that is valid as a base register and which is not the
4214 subject of a CLOBBER in this insn. */
4216 else if (regno < FIRST_PSEUDO_REGISTER && REGNO_OK_FOR_BASE_P (regno)
4217 && ! regno_clobbered_p (regno, this_insn))
4220 /* If we do not have one of the cases above, we must do the reload. */
4221 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
4222 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4226 if (strict_memory_address_p (mode, ad))
4228 /* The address appears valid, so reloads are not needed.
4229 But the address may contain an eliminable register.
4230 This can happen because a machine with indirect addressing
4231 may consider a pseudo register by itself a valid address even when
4232 it has failed to get a hard reg.
4233 So do a tree-walk to find and eliminate all such regs. */
4235 /* But first quickly dispose of a common case. */
4236 if (GET_CODE (ad) == PLUS
4237 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4238 && GET_CODE (XEXP (ad, 0)) == REG
4239 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4242 subst_reg_equivs_changed = 0;
4243 *loc = subst_reg_equivs (ad);
4245 if (! subst_reg_equivs_changed)
4248 /* Check result for validity after substitution. */
4249 if (strict_memory_address_p (mode, ad))
4253 /* The address is not valid. We have to figure out why. One possibility
4254 is that it is itself a MEM. This can happen when the frame pointer is
4255 being eliminated, a pseudo is not allocated to a hard register, and the
4256 offset between the frame and stack pointers is not its initial value.
4257 In that case the pseudo will have been replaced by a MEM referring to
4258 the stack pointer. */
4259 if (GET_CODE (ad) == MEM)
4261 /* First ensure that the address in this MEM is valid. Then, unless
4262 indirect addresses are valid, reload the MEM into a register. */
4264 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4265 opnum, type, ind_levels == 0 ? 0 : ind_levels - 1);
4267 /* If tem was changed, then we must create a new memory reference to
4268 hold it and store it back into memrefloc. */
4269 if (tem != ad && memrefloc)
4271 *memrefloc = copy_rtx (*memrefloc);
4272 copy_replacements (tem, XEXP (*memrefloc, 0));
4273 loc = &XEXP (*memrefloc, 0);
4276 /* Check similar cases as for indirect addresses as above except
4277 that we can allow pseudos and a MEM since they should have been
4278 taken care of above. */
4281 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4282 || GET_CODE (XEXP (tem, 0)) == MEM
4283 || ! (GET_CODE (XEXP (tem, 0)) == REG
4284 || (GET_CODE (XEXP (tem, 0)) == PLUS
4285 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4286 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4288 /* Must use TEM here, not AD, since it is the one that will
4289 have any subexpressions reloaded, if needed. */
4290 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4291 BASE_REG_CLASS, GET_MODE (tem), VOIDmode, 0,
4299 /* If we have address of a stack slot but it's not valid because the
4300 displacement is too large, compute the sum in a register.
4301 Handle all base registers here, not just fp/ap/sp, because on some
4302 targets (namely SH) we can also get too large displacements from
4303 big-endian corrections. */
4304 else if (GET_CODE (ad) == PLUS
4305 && GET_CODE (XEXP (ad, 0)) == REG
4306 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4307 && REG_OK_FOR_BASE_P (XEXP (ad, 0))
4308 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4310 /* Unshare the MEM rtx so we can safely alter it. */
4313 *memrefloc = copy_rtx (*memrefloc);
4314 loc = &XEXP (*memrefloc, 0);
4316 if (double_reg_address_ok)
4318 /* Unshare the sum as well. */
4319 *loc = ad = copy_rtx (ad);
4320 /* Reload the displacement into an index reg.
4321 We assume the frame pointer or arg pointer is a base reg. */
4322 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4323 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4328 /* If the sum of two regs is not necessarily valid,
4329 reload the sum into a base reg.
4330 That will at least work. */
4331 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode,
4332 opnum, type, ind_levels);
4337 /* If we have an indexed stack slot, there are three possible reasons why
4338 it might be invalid: The index might need to be reloaded, the address
4339 might have been made by frame pointer elimination and hence have a
4340 constant out of range, or both reasons might apply.
4342 We can easily check for an index needing reload, but even if that is the
4343 case, we might also have an invalid constant. To avoid making the
4344 conservative assumption and requiring two reloads, we see if this address
4345 is valid when not interpreted strictly. If it is, the only problem is
4346 that the index needs a reload and find_reloads_address_1 will take care
4349 There is still a case when we might generate an extra reload,
4350 however. In certain cases eliminate_regs will return a MEM for a REG
4351 (see the code there for details). In those cases, memory_address_p
4352 applied to our address will return 0 so we will think that our offset
4353 must be too large. But it might indeed be valid and the only problem
4354 is that a MEM is present where a REG should be. This case should be
4355 very rare and there doesn't seem to be any way to avoid it.
4357 If we decide to do something here, it must be that
4358 `double_reg_address_ok' is true and that this address rtl was made by
4359 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4360 rework the sum so that the reload register will be added to the index.
4361 This is safe because we know the address isn't shared.
4363 We check for fp/ap/sp as both the first and second operand of the
4366 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4367 && GET_CODE (XEXP (ad, 0)) == PLUS
4368 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4369 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4370 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4372 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4373 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4375 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4376 && ! memory_address_p (mode, ad))
4378 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
4379 plus_constant (XEXP (XEXP (ad, 0), 0),
4380 INTVAL (XEXP (ad, 1))),
4381 XEXP (XEXP (ad, 0), 1));
4382 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4383 GET_MODE (ad), opnum, type, ind_levels);
4384 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, type, 0);
4389 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4390 && GET_CODE (XEXP (ad, 0)) == PLUS
4391 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4392 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4393 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4395 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4396 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4398 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4399 && ! memory_address_p (mode, ad))
4401 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
4402 XEXP (XEXP (ad, 0), 0),
4403 plus_constant (XEXP (XEXP (ad, 0), 1),
4404 INTVAL (XEXP (ad, 1))));
4405 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), BASE_REG_CLASS,
4406 GET_MODE (ad), opnum, type, ind_levels);
4407 find_reloads_address_1 (XEXP (ad, 0), 1, &XEXP (ad, 0), opnum, type, 0);
4412 /* See if address becomes valid when an eliminable register
4413 in a sum is replaced. */
4416 if (GET_CODE (ad) == PLUS)
4417 tem = subst_indexed_address (ad);
4418 if (tem != ad && strict_memory_address_p (mode, tem))
4420 /* Ok, we win that way. Replace any additional eliminable
4423 subst_reg_equivs_changed = 0;
4424 tem = subst_reg_equivs (tem);
4426 /* Make sure that didn't make the address invalid again. */
4428 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4435 /* If constants aren't valid addresses, reload the constant address
4437 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4439 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4440 Unshare it so we can safely alter it. */
4441 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4442 && CONSTANT_POOL_ADDRESS_P (ad))
4444 *memrefloc = copy_rtx (*memrefloc);
4445 loc = &XEXP (*memrefloc, 0);
4448 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
4453 return find_reloads_address_1 (ad, 0, loc, opnum, type, ind_levels);
4456 /* Find all pseudo regs appearing in AD
4457 that are eliminable in favor of equivalent values
4458 and do not have hard regs; replace them by their equivalents. */
4461 subst_reg_equivs (ad)
4464 register RTX_CODE code = GET_CODE (ad);
4482 register int regno = REGNO (ad);
4484 if (reg_equiv_constant[regno] != 0)
4486 subst_reg_equivs_changed = 1;
4487 return reg_equiv_constant[regno];
4493 /* Quickly dispose of a common case. */
4494 if (XEXP (ad, 0) == frame_pointer_rtx
4495 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4499 fmt = GET_RTX_FORMAT (code);
4500 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4502 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i));
4506 /* Compute the sum of X and Y, making canonicalizations assumed in an
4507 address, namely: sum constant integers, surround the sum of two
4508 constants with a CONST, put the constant as the second operand, and
4509 group the constant on the outermost sum.
4511 This routine assumes both inputs are already in canonical form. */
4518 enum machine_mode mode = GET_MODE (x);
4520 if (mode == VOIDmode)
4521 mode = GET_MODE (y);
4523 if (mode == VOIDmode)
4526 if (GET_CODE (x) == CONST_INT)
4527 return plus_constant (y, INTVAL (x));
4528 else if (GET_CODE (y) == CONST_INT)
4529 return plus_constant (x, INTVAL (y));
4530 else if (CONSTANT_P (x))
4531 tem = x, x = y, y = tem;
4533 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
4534 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
4536 /* Note that if the operands of Y are specified in the opposite
4537 order in the recursive calls below, infinite recursion will occur. */
4538 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
4539 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
4541 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4542 constant will have been placed second. */
4543 if (CONSTANT_P (x) && CONSTANT_P (y))
4545 if (GET_CODE (x) == CONST)
4547 if (GET_CODE (y) == CONST)
4550 return gen_rtx (CONST, VOIDmode, gen_rtx (PLUS, mode, x, y));
4553 return gen_rtx (PLUS, mode, x, y);
4556 /* If ADDR is a sum containing a pseudo register that should be
4557 replaced with a constant (from reg_equiv_constant),
4558 return the result of doing so, and also apply the associative
4559 law so that the result is more likely to be a valid address.
4560 (But it is not guaranteed to be one.)
4562 Note that at most one register is replaced, even if more are
4563 replaceable. Also, we try to put the result into a canonical form
4564 so it is more likely to be a valid address.
4566 In all other cases, return ADDR. */
4569 subst_indexed_address (addr)
4572 rtx op0 = 0, op1 = 0, op2 = 0;
4576 if (GET_CODE (addr) == PLUS)
4578 /* Try to find a register to replace. */
4579 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
4580 if (GET_CODE (op0) == REG
4581 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
4582 && reg_renumber[regno] < 0
4583 && reg_equiv_constant[regno] != 0)
4584 op0 = reg_equiv_constant[regno];
4585 else if (GET_CODE (op1) == REG
4586 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
4587 && reg_renumber[regno] < 0
4588 && reg_equiv_constant[regno] != 0)
4589 op1 = reg_equiv_constant[regno];
4590 else if (GET_CODE (op0) == PLUS
4591 && (tem = subst_indexed_address (op0)) != op0)
4593 else if (GET_CODE (op1) == PLUS
4594 && (tem = subst_indexed_address (op1)) != op1)
4599 /* Pick out up to three things to add. */
4600 if (GET_CODE (op1) == PLUS)
4601 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
4602 else if (GET_CODE (op0) == PLUS)
4603 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4605 /* Compute the sum. */
4607 op1 = form_sum (op1, op2);
4609 op0 = form_sum (op0, op1);
4616 /* Record the pseudo registers we must reload into hard registers
4617 in a subexpression of a would-be memory address, X.
4618 (This function is not called if the address we find is strictly valid.)
4619 CONTEXT = 1 means we are considering regs as index regs,
4620 = 0 means we are considering them as base regs.
4622 OPNUM and TYPE specify the purpose of any reloads made.
4624 IND_LEVELS says how many levels of indirect addressing are
4625 supported at this point in the address.
4627 We return nonzero if X, as a whole, is reloaded or replaced. */
4629 /* Note that we take shortcuts assuming that no multi-reg machine mode
4630 occurs as part of an address.
4631 Also, this is not fully machine-customizable; it works for machines
4632 such as vaxes and 68000's and 32000's, but other possible machines
4633 could have addressing modes that this does not handle right. */
4636 find_reloads_address_1 (x, context, loc, opnum, type, ind_levels)
4641 enum reload_type type;
4644 register RTX_CODE code = GET_CODE (x);
4650 register rtx orig_op0 = XEXP (x, 0);
4651 register rtx orig_op1 = XEXP (x, 1);
4652 register RTX_CODE code0 = GET_CODE (orig_op0);
4653 register RTX_CODE code1 = GET_CODE (orig_op1);
4654 register rtx op0 = orig_op0;
4655 register rtx op1 = orig_op1;
4657 if (GET_CODE (op0) == SUBREG)
4659 op0 = SUBREG_REG (op0);
4660 code0 = GET_CODE (op0);
4661 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
4662 op0 = gen_rtx (REG, word_mode,
4663 REGNO (op0) + SUBREG_WORD (orig_op0));
4666 if (GET_CODE (op1) == SUBREG)
4668 op1 = SUBREG_REG (op1);
4669 code1 = GET_CODE (op1);
4670 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
4671 op1 = gen_rtx (REG, GET_MODE (op1),
4672 REGNO (op1) + SUBREG_WORD (orig_op1));
4675 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
4676 || code0 == ZERO_EXTEND || code1 == MEM)
4678 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4680 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4684 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
4685 || code1 == ZERO_EXTEND || code0 == MEM)
4687 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4689 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4693 else if (code0 == CONST_INT || code0 == CONST
4694 || code0 == SYMBOL_REF || code0 == LABEL_REF)
4695 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4698 else if (code1 == CONST_INT || code1 == CONST
4699 || code1 == SYMBOL_REF || code1 == LABEL_REF)
4700 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4703 else if (code0 == REG && code1 == REG)
4705 if (REG_OK_FOR_INDEX_P (op0)
4706 && REG_OK_FOR_BASE_P (op1))
4708 else if (REG_OK_FOR_INDEX_P (op1)
4709 && REG_OK_FOR_BASE_P (op0))
4711 else if (REG_OK_FOR_BASE_P (op1))
4712 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4714 else if (REG_OK_FOR_BASE_P (op0))
4715 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4717 else if (REG_OK_FOR_INDEX_P (op1))
4718 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4720 else if (REG_OK_FOR_INDEX_P (op0))
4721 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4725 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4727 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4732 else if (code0 == REG)
4734 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4736 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4740 else if (code1 == REG)
4742 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4744 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4755 if (GET_CODE (XEXP (x, 0)) == REG)
4757 register int regno = REGNO (XEXP (x, 0));
4761 /* A register that is incremented cannot be constant! */
4762 if (regno >= FIRST_PSEUDO_REGISTER
4763 && reg_equiv_constant[regno] != 0)
4766 /* Handle a register that is equivalent to a memory location
4767 which cannot be addressed directly. */
4768 if (reg_equiv_address[regno] != 0)
4770 rtx tem = make_memloc (XEXP (x, 0), regno);
4771 /* First reload the memory location's address. */
4772 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
4773 &XEXP (tem, 0), opnum, type, ind_levels);
4774 /* Put this inside a new increment-expression. */
4775 x = gen_rtx (GET_CODE (x), GET_MODE (x), tem);
4776 /* Proceed to reload that, as if it contained a register. */
4779 /* If we have a hard register that is ok as an index,
4780 don't make a reload. If an autoincrement of a nice register
4781 isn't "valid", it must be that no autoincrement is "valid".
4782 If that is true and something made an autoincrement anyway,
4783 this must be a special context where one is allowed.
4784 (For example, a "push" instruction.)
4785 We can't improve this address, so leave it alone. */
4787 /* Otherwise, reload the autoincrement into a suitable hard reg
4788 and record how much to increment by. */
4790 if (reg_renumber[regno] >= 0)
4791 regno = reg_renumber[regno];
4792 if ((regno >= FIRST_PSEUDO_REGISTER
4793 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4794 : REGNO_OK_FOR_BASE_P (regno))))
4799 = push_reload (x, NULL_RTX, loc, NULL_PTR,
4800 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4801 GET_MODE (x), GET_MODE (x), VOIDmode, 0,
4803 reload_inc[reloadnum]
4804 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
4809 /* Update the REG_INC notes. */
4811 for (link = REG_NOTES (this_insn);
4812 link; link = XEXP (link, 1))
4813 if (REG_NOTE_KIND (link) == REG_INC
4814 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
4815 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4821 else if (GET_CODE (XEXP (x, 0)) == MEM)
4823 /* This is probably the result of a substitution, by eliminate_regs,
4824 of an equivalent address for a pseudo that was not allocated to a
4825 hard register. Verify that the specified address is valid and
4826 reload it into a register. */
4827 rtx tem = XEXP (x, 0);
4831 /* Since we know we are going to reload this item, don't decrement
4832 for the indirection level.
4834 Note that this is actually conservative: it would be slightly
4835 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4837 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
4838 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
4839 opnum, type, ind_levels);
4841 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
4842 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4843 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4844 reload_inc[reloadnum]
4845 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
4847 link = FIND_REG_INC_NOTE (this_insn, tem);
4849 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4856 /* This is probably the result of a substitution, by eliminate_regs, of
4857 an equivalent address for a pseudo that was not allocated to a hard
4858 register. Verify that the specified address is valid and reload it
4861 Since we know we are going to reload this item, don't decrement for
4862 the indirection level.
4864 Note that this is actually conservative: it would be slightly more
4865 efficient to use the value of SPILL_INDIRECT_LEVELS from
4868 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
4869 opnum, type, ind_levels);
4870 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
4871 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4872 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4877 register int regno = REGNO (x);
4879 if (reg_equiv_constant[regno] != 0)
4881 find_reloads_address_part (reg_equiv_constant[regno], loc,
4882 (context ? INDEX_REG_CLASS
4884 GET_MODE (x), opnum, type, ind_levels);
4888 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4889 that feeds this insn. */
4890 if (reg_equiv_mem[regno] != 0)
4892 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
4893 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4894 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4899 if (reg_equiv_address[regno] != 0)
4901 x = make_memloc (x, regno);
4902 find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0),
4903 opnum, type, ind_levels);
4906 if (reg_renumber[regno] >= 0)
4907 regno = reg_renumber[regno];
4909 if ((regno >= FIRST_PSEUDO_REGISTER
4910 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4911 : REGNO_OK_FOR_BASE_P (regno))))
4913 push_reload (x, NULL_RTX, loc, NULL_PTR,
4914 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4915 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4919 /* If a register appearing in an address is the subject of a CLOBBER
4920 in this insn, reload it into some other register to be safe.
4921 The CLOBBER is supposed to make the register unavailable
4922 from before this insn to after it. */
4923 if (regno_clobbered_p (regno, this_insn))
4925 push_reload (x, NULL_RTX, loc, NULL_PTR,
4926 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4927 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4934 if (GET_CODE (SUBREG_REG (x)) == REG)
4936 /* If this is a SUBREG of a hard register and the resulting register
4937 is of the wrong class, reload the whole SUBREG. This avoids
4938 needless copies if SUBREG_REG is multi-word. */
4939 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
4941 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
4943 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
4944 : REGNO_OK_FOR_BASE_P (regno)))
4946 push_reload (x, NULL_RTX, loc, NULL_PTR,
4947 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4948 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4952 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
4953 is larger than the class size, then reload the whole SUBREG. */
4956 enum reg_class class = (context
4957 ? INDEX_REG_CLASS : BASE_REG_CLASS);
4958 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
4959 > reg_class_size[class])
4961 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
4962 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4971 register char *fmt = GET_RTX_FORMAT (code);
4974 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4977 find_reloads_address_1 (XEXP (x, i), context, &XEXP (x, i),
4978 opnum, type, ind_levels);
4985 /* X, which is found at *LOC, is a part of an address that needs to be
4986 reloaded into a register of class CLASS. If X is a constant, or if
4987 X is a PLUS that contains a constant, check that the constant is a
4988 legitimate operand and that we are supposed to be able to load
4989 it into the register.
4991 If not, force the constant into memory and reload the MEM instead.
4993 MODE is the mode to use, in case X is an integer constant.
4995 OPNUM and TYPE describe the purpose of any reloads made.
4997 IND_LEVELS says how many levels of indirect addressing this machine
5001 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
5004 enum reg_class class;
5005 enum machine_mode mode;
5007 enum reload_type type;
5011 && (! LEGITIMATE_CONSTANT_P (x)
5012 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5014 rtx tem = x = force_const_mem (mode, x);
5015 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5016 opnum, type, ind_levels);
5019 else if (GET_CODE (x) == PLUS
5020 && CONSTANT_P (XEXP (x, 1))
5021 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5022 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5024 rtx tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5026 x = gen_rtx (PLUS, GET_MODE (x), XEXP (x, 0), tem);
5027 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5028 opnum, type, ind_levels);
5031 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
5032 mode, VOIDmode, 0, 0, opnum, type);
5035 /* Substitute into the current INSN the registers into which we have reloaded
5036 the things that need reloading. The array `replacements'
5037 says contains the locations of all pointers that must be changed
5038 and says what to replace them with.
5040 Return the rtx that X translates into; usually X, but modified. */
5047 for (i = 0; i < n_replacements; i++)
5049 register struct replacement *r = &replacements[i];
5050 register rtx reloadreg = reload_reg_rtx[r->what];
5053 /* Encapsulate RELOADREG so its machine mode matches what
5054 used to be there. Note that gen_lowpart_common will
5055 do the wrong thing if RELOADREG is multi-word. RELOADREG
5056 will always be a REG here. */
5057 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5058 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
5060 /* If we are putting this into a SUBREG and RELOADREG is a
5061 SUBREG, we would be making nested SUBREGs, so we have to fix
5062 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5064 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5066 if (GET_MODE (*r->subreg_loc)
5067 == GET_MODE (SUBREG_REG (reloadreg)))
5068 *r->subreg_loc = SUBREG_REG (reloadreg);
5071 *r->where = SUBREG_REG (reloadreg);
5072 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
5076 *r->where = reloadreg;
5078 /* If reload got no reg and isn't optional, something's wrong. */
5079 else if (! reload_optional[r->what])
5084 /* Make a copy of any replacements being done into X and move those copies
5085 to locations in Y, a copy of X. We only look at the highest level of
5089 copy_replacements (x, y)
5094 enum rtx_code code = GET_CODE (x);
5095 char *fmt = GET_RTX_FORMAT (code);
5096 struct replacement *r;
5098 /* We can't support X being a SUBREG because we might then need to know its
5099 location if something inside it was replaced. */
5103 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5105 for (j = 0; j < n_replacements; j++)
5107 if (replacements[j].subreg_loc == &XEXP (x, i))
5109 r = &replacements[n_replacements++];
5110 r->where = replacements[j].where;
5111 r->subreg_loc = &XEXP (y, i);
5112 r->what = replacements[j].what;
5113 r->mode = replacements[j].mode;
5115 else if (replacements[j].where == &XEXP (x, i))
5117 r = &replacements[n_replacements++];
5118 r->where = &XEXP (y, i);
5120 r->what = replacements[j].what;
5121 r->mode = replacements[j].mode;
5126 /* If LOC was scheduled to be replaced by something, return the replacement.
5127 Otherwise, return *LOC. */
5130 find_replacement (loc)
5133 struct replacement *r;
5135 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
5137 rtx reloadreg = reload_reg_rtx[r->what];
5139 if (reloadreg && r->where == loc)
5141 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
5142 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
5146 else if (reloadreg && r->subreg_loc == loc)
5148 /* RELOADREG must be either a REG or a SUBREG.
5150 ??? Is it actually still ever a SUBREG? If so, why? */
5152 if (GET_CODE (reloadreg) == REG)
5153 return gen_rtx (REG, GET_MODE (*loc),
5154 REGNO (reloadreg) + SUBREG_WORD (*loc));
5155 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
5158 return gen_rtx (SUBREG, GET_MODE (*loc), SUBREG_REG (reloadreg),
5159 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
5166 /* Return nonzero if register in range [REGNO, ENDREGNO)
5167 appears either explicitly or implicitly in X
5168 other than being stored into (except for earlyclobber operands).
5170 References contained within the substructure at LOC do not count.
5171 LOC may be zero, meaning don't ignore anything.
5173 This is similar to refers_to_regno_p in rtlanal.c except that we
5174 look at equivalences for pseudos that didn't get hard registers. */
5177 refers_to_regno_for_reload_p (regno, endregno, x, loc)
5178 int regno, endregno;
5183 register RTX_CODE code;
5190 code = GET_CODE (x);
5197 /* If this is a pseudo, a hard register must not have been allocated.
5198 X must therefore either be a constant or be in memory. */
5199 if (i >= FIRST_PSEUDO_REGISTER)
5201 if (reg_equiv_memory_loc[i])
5202 return refers_to_regno_for_reload_p (regno, endregno,
5203 reg_equiv_memory_loc[i],
5206 if (reg_equiv_constant[i])
5212 return (endregno > i
5213 && regno < i + (i < FIRST_PSEUDO_REGISTER
5214 ? HARD_REGNO_NREGS (i, GET_MODE (x))
5218 /* If this is a SUBREG of a hard reg, we can see exactly which
5219 registers are being modified. Otherwise, handle normally. */
5220 if (GET_CODE (SUBREG_REG (x)) == REG
5221 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5223 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
5225 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
5226 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5228 return endregno > inner_regno && regno < inner_endregno;
5234 if (&SET_DEST (x) != loc
5235 /* Note setting a SUBREG counts as referring to the REG it is in for
5236 a pseudo but not for hard registers since we can
5237 treat each word individually. */
5238 && ((GET_CODE (SET_DEST (x)) == SUBREG
5239 && loc != &SUBREG_REG (SET_DEST (x))
5240 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
5241 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
5242 && refers_to_regno_for_reload_p (regno, endregno,
5243 SUBREG_REG (SET_DEST (x)),
5245 /* If the output is an earlyclobber operand, this is
5247 || ((GET_CODE (SET_DEST (x)) != REG
5248 || earlyclobber_operand_p (SET_DEST (x)))
5249 && refers_to_regno_for_reload_p (regno, endregno,
5250 SET_DEST (x), loc))))
5253 if (code == CLOBBER || loc == &SET_SRC (x))
5259 /* X does not match, so try its subexpressions. */
5261 fmt = GET_RTX_FORMAT (code);
5262 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5264 if (fmt[i] == 'e' && loc != &XEXP (x, i))
5272 if (refers_to_regno_for_reload_p (regno, endregno,
5276 else if (fmt[i] == 'E')
5279 for (j = XVECLEN (x, i) - 1; j >=0; j--)
5280 if (loc != &XVECEXP (x, i, j)
5281 && refers_to_regno_for_reload_p (regno, endregno,
5282 XVECEXP (x, i, j), loc))
5289 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5290 we check if any register number in X conflicts with the relevant register
5291 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5292 contains a MEM (we don't bother checking for memory addresses that can't
5293 conflict because we expect this to be a rare case.
5295 This function is similar to reg_overlap_mention_p in rtlanal.c except
5296 that we look at equivalences for pseudos that didn't get hard registers. */
5299 reg_overlap_mentioned_for_reload_p (x, in)
5302 int regno, endregno;
5304 if (GET_CODE (x) == SUBREG)
5306 regno = REGNO (SUBREG_REG (x));
5307 if (regno < FIRST_PSEUDO_REGISTER)
5308 regno += SUBREG_WORD (x);
5310 else if (GET_CODE (x) == REG)
5314 /* If this is a pseudo, it must not have been assigned a hard register.
5315 Therefore, it must either be in memory or be a constant. */
5317 if (regno >= FIRST_PSEUDO_REGISTER)
5319 if (reg_equiv_memory_loc[regno])
5320 return refers_to_mem_for_reload_p (in);
5321 else if (reg_equiv_constant[regno])
5326 else if (CONSTANT_P (x))
5328 else if (GET_CODE (x) == MEM)
5329 return refers_to_mem_for_reload_p (in);
5330 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
5331 || GET_CODE (x) == CC0)
5332 return reg_mentioned_p (x, in);
5336 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
5337 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5339 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
5342 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5346 refers_to_mem_for_reload_p (x)
5352 if (GET_CODE (x) == MEM)
5355 if (GET_CODE (x) == REG)
5356 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
5357 && reg_equiv_memory_loc[REGNO (x)]);
5359 fmt = GET_RTX_FORMAT (GET_CODE (x));
5360 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
5362 && (GET_CODE (XEXP (x, i)) == MEM
5363 || refers_to_mem_for_reload_p (XEXP (x, i))))
5369 /* Check the insns before INSN to see if there is a suitable register
5370 containing the same value as GOAL.
5371 If OTHER is -1, look for a register in class CLASS.
5372 Otherwise, just see if register number OTHER shares GOAL's value.
5374 Return an rtx for the register found, or zero if none is found.
5376 If RELOAD_REG_P is (short *)1,
5377 we reject any hard reg that appears in reload_reg_rtx
5378 because such a hard reg is also needed coming into this insn.
5380 If RELOAD_REG_P is any other nonzero value,
5381 it is a vector indexed by hard reg number
5382 and we reject any hard reg whose element in the vector is nonnegative
5383 as well as any that appears in reload_reg_rtx.
5385 If GOAL is zero, then GOALREG is a register number; we look
5386 for an equivalent for that register.
5388 MODE is the machine mode of the value we want an equivalence for.
5389 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5391 This function is used by jump.c as well as in the reload pass.
5393 If GOAL is the sum of the stack pointer and a constant, we treat it
5394 as if it were a constant except that sp is required to be unchanging. */
5397 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
5400 enum reg_class class;
5402 short *reload_reg_p;
5404 enum machine_mode mode;
5406 register rtx p = insn;
5407 rtx goaltry, valtry, value, where;
5409 register int regno = -1;
5413 int goal_mem_addr_varies = 0;
5414 int need_stable_sp = 0;
5420 else if (GET_CODE (goal) == REG)
5421 regno = REGNO (goal);
5422 else if (GET_CODE (goal) == MEM)
5424 enum rtx_code code = GET_CODE (XEXP (goal, 0));
5425 if (MEM_VOLATILE_P (goal))
5427 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
5429 /* An address with side effects must be reexecuted. */
5440 else if (CONSTANT_P (goal))
5442 else if (GET_CODE (goal) == PLUS
5443 && XEXP (goal, 0) == stack_pointer_rtx
5444 && CONSTANT_P (XEXP (goal, 1)))
5445 goal_const = need_stable_sp = 1;
5449 /* On some machines, certain regs must always be rejected
5450 because they don't behave the way ordinary registers do. */
5452 #ifdef OVERLAPPING_REGNO_P
5453 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5454 && OVERLAPPING_REGNO_P (regno))
5458 /* Scan insns back from INSN, looking for one that copies
5459 a value into or out of GOAL.
5460 Stop and give up if we reach a label. */
5465 if (p == 0 || GET_CODE (p) == CODE_LABEL)
5467 if (GET_CODE (p) == INSN
5468 /* If we don't want spill regs ... */
5469 && (! (reload_reg_p != 0
5470 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
5471 /* ... then ignore insns introduced by reload; they aren't useful
5472 and can cause results in reload_as_needed to be different
5473 from what they were when calculating the need for spills.
5474 If we notice an input-reload insn here, we will reject it below,
5475 but it might hide a usable equivalent. That makes bad code.
5476 It may even abort: perhaps no reg was spilled for this insn
5477 because it was assumed we would find that equivalent. */
5478 || INSN_UID (p) < reload_first_uid))
5481 pat = single_set (p);
5482 /* First check for something that sets some reg equal to GOAL. */
5485 && true_regnum (SET_SRC (pat)) == regno
5486 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5489 && true_regnum (SET_DEST (pat)) == regno
5490 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
5492 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
5493 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5495 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
5496 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
5498 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
5499 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
5500 /* If we are looking for a constant,
5501 and something equivalent to that constant was copied
5502 into a reg, we can use that reg. */
5503 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5505 && rtx_equal_p (XEXP (tem, 0), goal)
5506 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5507 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5509 && GET_CODE (SET_DEST (pat)) == REG
5510 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5511 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5512 && GET_CODE (goal) == CONST_INT
5513 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
5515 && rtx_equal_p (goal, goaltry)
5516 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
5518 && (valueno = true_regnum (valtry)) >= 0)
5519 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5521 && GET_CODE (SET_DEST (pat)) == REG
5522 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5523 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5524 && GET_CODE (goal) == CONST_INT
5525 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
5527 && rtx_equal_p (goal, goaltry)
5529 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
5530 && (valueno = true_regnum (valtry)) >= 0)))
5533 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
5534 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
5544 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5545 (or copying VALUE into GOAL, if GOAL is also a register).
5546 Now verify that VALUE is really valid. */
5548 /* VALUENO is the register number of VALUE; a hard register. */
5550 /* Don't try to re-use something that is killed in this insn. We want
5551 to be able to trust REG_UNUSED notes. */
5552 if (find_reg_note (where, REG_UNUSED, value))
5555 /* If we propose to get the value from the stack pointer or if GOAL is
5556 a MEM based on the stack pointer, we need a stable SP. */
5557 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
5558 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
5562 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5563 if (GET_MODE (value) != mode)
5566 /* Reject VALUE if it was loaded from GOAL
5567 and is also a register that appears in the address of GOAL. */
5569 if (goal_mem && value == SET_DEST (single_set (where))
5570 && refers_to_regno_for_reload_p (valueno,
5572 + HARD_REGNO_NREGS (valueno, mode)),
5576 /* Reject registers that overlap GOAL. */
5578 if (!goal_mem && !goal_const
5579 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
5580 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
5583 /* Reject VALUE if it is one of the regs reserved for reloads.
5584 Reload1 knows how to reuse them anyway, and it would get
5585 confused if we allocated one without its knowledge.
5586 (Now that insns introduced by reload are ignored above,
5587 this case shouldn't happen, but I'm not positive.) */
5589 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
5590 && reload_reg_p[valueno] >= 0)
5593 /* On some machines, certain regs must always be rejected
5594 because they don't behave the way ordinary registers do. */
5596 #ifdef OVERLAPPING_REGNO_P
5597 if (OVERLAPPING_REGNO_P (valueno))
5601 nregs = HARD_REGNO_NREGS (regno, mode);
5602 valuenregs = HARD_REGNO_NREGS (valueno, mode);
5604 /* Reject VALUE if it is a register being used for an input reload
5605 even if it is not one of those reserved. */
5607 if (reload_reg_p != 0)
5610 for (i = 0; i < n_reloads; i++)
5611 if (reload_reg_rtx[i] != 0 && reload_in[i])
5613 int regno1 = REGNO (reload_reg_rtx[i]);
5614 int nregs1 = HARD_REGNO_NREGS (regno1,
5615 GET_MODE (reload_reg_rtx[i]));
5616 if (regno1 < valueno + valuenregs
5617 && regno1 + nregs1 > valueno)
5623 /* We must treat frame pointer as varying here,
5624 since it can vary--in a nonlocal goto as generated by expand_goto. */
5625 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
5627 /* Now verify that the values of GOAL and VALUE remain unaltered
5628 until INSN is reached. */
5637 /* Don't trust the conversion past a function call
5638 if either of the two is in a call-clobbered register, or memory. */
5639 if (GET_CODE (p) == CALL_INSN
5640 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5641 && call_used_regs[regno])
5643 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5644 && call_used_regs[valueno])
5650 #ifdef NON_SAVING_SETJMP
5651 if (NON_SAVING_SETJMP && GET_CODE (p) == NOTE
5652 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
5656 #ifdef INSN_CLOBBERS_REGNO_P
5657 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5658 && INSN_CLOBBERS_REGNO_P (p, valueno))
5659 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5660 && INSN_CLOBBERS_REGNO_P (p, regno)))
5664 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
5666 /* If this insn P stores in either GOAL or VALUE, return 0.
5667 If GOAL is a memory ref and this insn writes memory, return 0.
5668 If GOAL is a memory ref and its address is not constant,
5669 and this insn P changes a register used in GOAL, return 0. */
5672 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
5674 register rtx dest = SET_DEST (pat);
5675 while (GET_CODE (dest) == SUBREG
5676 || GET_CODE (dest) == ZERO_EXTRACT
5677 || GET_CODE (dest) == SIGN_EXTRACT
5678 || GET_CODE (dest) == STRICT_LOW_PART)
5679 dest = XEXP (dest, 0);
5680 if (GET_CODE (dest) == REG)
5682 register int xregno = REGNO (dest);
5684 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5685 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5688 if (xregno < regno + nregs && xregno + xnregs > regno)
5690 if (xregno < valueno + valuenregs
5691 && xregno + xnregs > valueno)
5693 if (goal_mem_addr_varies
5694 && reg_overlap_mentioned_for_reload_p (dest, goal))
5697 else if (goal_mem && GET_CODE (dest) == MEM
5698 && ! push_operand (dest, GET_MODE (dest)))
5700 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
5701 && reg_equiv_memory_loc[regno] != 0)
5703 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
5706 else if (GET_CODE (pat) == PARALLEL)
5709 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
5711 register rtx v1 = XVECEXP (pat, 0, i);
5712 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
5714 register rtx dest = SET_DEST (v1);
5715 while (GET_CODE (dest) == SUBREG
5716 || GET_CODE (dest) == ZERO_EXTRACT
5717 || GET_CODE (dest) == SIGN_EXTRACT
5718 || GET_CODE (dest) == STRICT_LOW_PART)
5719 dest = XEXP (dest, 0);
5720 if (GET_CODE (dest) == REG)
5722 register int xregno = REGNO (dest);
5724 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5725 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5728 if (xregno < regno + nregs
5729 && xregno + xnregs > regno)
5731 if (xregno < valueno + valuenregs
5732 && xregno + xnregs > valueno)
5734 if (goal_mem_addr_varies
5735 && reg_overlap_mentioned_for_reload_p (dest,
5739 else if (goal_mem && GET_CODE (dest) == MEM
5740 && ! push_operand (dest, GET_MODE (dest)))
5742 else if (need_stable_sp
5743 && push_operand (dest, GET_MODE (dest)))
5749 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
5753 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
5754 link = XEXP (link, 1))
5756 pat = XEXP (link, 0);
5757 if (GET_CODE (pat) == CLOBBER)
5759 register rtx dest = SET_DEST (pat);
5760 while (GET_CODE (dest) == SUBREG
5761 || GET_CODE (dest) == ZERO_EXTRACT
5762 || GET_CODE (dest) == SIGN_EXTRACT
5763 || GET_CODE (dest) == STRICT_LOW_PART)
5764 dest = XEXP (dest, 0);
5765 if (GET_CODE (dest) == REG)
5767 register int xregno = REGNO (dest);
5769 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5770 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5773 if (xregno < regno + nregs
5774 && xregno + xnregs > regno)
5776 if (xregno < valueno + valuenregs
5777 && xregno + xnregs > valueno)
5779 if (goal_mem_addr_varies
5780 && reg_overlap_mentioned_for_reload_p (dest,
5784 else if (goal_mem && GET_CODE (dest) == MEM
5785 && ! push_operand (dest, GET_MODE (dest)))
5787 else if (need_stable_sp
5788 && push_operand (dest, GET_MODE (dest)))
5795 /* If this insn auto-increments or auto-decrements
5796 either regno or valueno, return 0 now.
5797 If GOAL is a memory ref and its address is not constant,
5798 and this insn P increments a register used in GOAL, return 0. */
5802 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
5803 if (REG_NOTE_KIND (link) == REG_INC
5804 && GET_CODE (XEXP (link, 0)) == REG)
5806 register int incno = REGNO (XEXP (link, 0));
5807 if (incno < regno + nregs && incno >= regno)
5809 if (incno < valueno + valuenregs && incno >= valueno)
5811 if (goal_mem_addr_varies
5812 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
5822 /* Find a place where INCED appears in an increment or decrement operator
5823 within X, and return the amount INCED is incremented or decremented by.
5824 The value is always positive. */
5827 find_inc_amount (x, inced)
5830 register enum rtx_code code = GET_CODE (x);
5836 register rtx addr = XEXP (x, 0);
5837 if ((GET_CODE (addr) == PRE_DEC
5838 || GET_CODE (addr) == POST_DEC
5839 || GET_CODE (addr) == PRE_INC
5840 || GET_CODE (addr) == POST_INC)
5841 && XEXP (addr, 0) == inced)
5842 return GET_MODE_SIZE (GET_MODE (x));
5845 fmt = GET_RTX_FORMAT (code);
5846 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5850 register int tem = find_inc_amount (XEXP (x, i), inced);
5857 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5859 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
5869 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5872 regno_clobbered_p (regno, insn)
5876 if (GET_CODE (PATTERN (insn)) == CLOBBER
5877 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
5878 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
5880 if (GET_CODE (PATTERN (insn)) == PARALLEL)
5882 int i = XVECLEN (PATTERN (insn), 0) - 1;
5886 rtx elt = XVECEXP (PATTERN (insn), 0, i);
5887 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
5888 && REGNO (XEXP (elt, 0)) == regno)
5896 static char *reload_when_needed_name[] =
5899 "RELOAD_FOR_OUTPUT",
5901 "RELOAD_FOR_INPUT_ADDRESS",
5902 "RELOAD_FOR_OUTPUT_ADDRESS",
5903 "RELOAD_FOR_OPERAND_ADDRESS",
5904 "RELOAD_FOR_OPADDR_ADDR",
5906 "RELOAD_FOR_OTHER_ADDRESS"
5909 static char *reg_class_names[] = REG_CLASS_NAMES;
5911 /* This function is used to print the variables set by 'find_reloads' */
5918 fprintf (stderr, "\nn_reloads = %d\n", n_reloads);
5920 for (r = 0; r < n_reloads; r++)
5922 fprintf (stderr, "\nRELOAD %d\n", r);
5926 fprintf (stderr, "\nreload_in (%s) = ",
5927 GET_MODE_NAME (reload_inmode[r]));
5928 debug_rtx (reload_in[r]);
5933 fprintf (stderr, "\nreload_out (%s) = ",
5934 GET_MODE_NAME (reload_outmode[r]));
5935 debug_rtx (reload_out[r]);
5938 fprintf (stderr, "%s, ", reg_class_names[(int) reload_reg_class[r]]);
5940 fprintf (stderr, "%s (opnum = %d)",
5941 reload_when_needed_name[(int)reload_when_needed[r]],
5944 if (reload_optional[r])
5945 fprintf (stderr, ", optional");
5948 fprintf (stderr, ", inc by %d\n", reload_inc[r]);
5950 if (reload_nocombine[r])
5951 fprintf (stderr, ", can't combine", reload_nocombine[r]);
5953 if (reload_secondary_p[r])
5954 fprintf (stderr, ", secondary_reload_p");
5956 if (reload_in_reg[r])
5958 fprintf (stderr, "\nreload_in_reg:\t\t\t");
5959 debug_rtx (reload_in_reg[r]);
5962 if (reload_reg_rtx[r])
5964 fprintf (stderr, "\nreload_reg_rtx:\t\t\t");
5965 debug_rtx (reload_reg_rtx[r]);
5968 if (reload_secondary_in_reload[r] != -1)
5970 fprintf (stderr, "\nsecondary_in_reload = ");
5971 fprintf (stderr, "%d ", reload_secondary_in_reload[r]);
5974 if (reload_secondary_out_reload[r] != -1)
5976 if (reload_secondary_in_reload[r] != -1)
5977 fprintf (stderr, ", secondary_out_reload = ");
5979 fprintf (stderr, "\nsecondary_out_reload = ");
5981 fprintf (stderr, "%d", reload_secondary_out_reload[r]);
5985 if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
5987 fprintf (stderr, "\nsecondary_in_icode = ");
5988 fprintf (stderr, "%s", insn_name[r]);
5991 if (reload_secondary_out_icode[r] != CODE_FOR_nothing)
5993 if (reload_secondary_in_icode[r] != CODE_FOR_nothing)
5994 fprintf (stderr, ", secondary_out_icode = ");
5996 fprintf (stderr, "\nsecondary_out_icode = ");
5998 fprintf (stderr, "%s ", insn_name[r]);
6000 fprintf (stderr, "\n");
6003 fprintf (stderr, "\n");
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