1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
91 #include "coretypes.h"
95 #include "insn-config.h"
101 #include "hard-reg-set.h"
105 #include "function.h"
110 #ifndef REGNO_MODE_OK_FOR_BASE_P
111 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
114 #ifndef REG_MODE_OK_FOR_BASE_P
115 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
118 /* True if X is a constant that can be forced into the constant pool. */
119 #define CONST_POOL_OK_P(X) \
121 && GET_CODE (X) != HIGH \
122 && !targetm.cannot_force_const_mem (X))
124 /* All reloads of the current insn are recorded here. See reload.h for
127 struct reload rld[MAX_RELOADS];
129 /* All the "earlyclobber" operands of the current insn
130 are recorded here. */
132 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
134 int reload_n_operands;
136 /* Replacing reloads.
138 If `replace_reloads' is nonzero, then as each reload is recorded
139 an entry is made for it in the table `replacements'.
140 Then later `subst_reloads' can look through that table and
141 perform all the replacements needed. */
143 /* Nonzero means record the places to replace. */
144 static int replace_reloads;
146 /* Each replacement is recorded with a structure like this. */
149 rtx *where; /* Location to store in */
150 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
151 a SUBREG; 0 otherwise. */
152 int what; /* which reload this is for */
153 enum machine_mode mode; /* mode it must have */
156 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
158 /* Number of replacements currently recorded. */
159 static int n_replacements;
161 /* Used to track what is modified by an operand. */
164 int reg_flag; /* Nonzero if referencing a register. */
165 int safe; /* Nonzero if this can't conflict with anything. */
166 rtx base; /* Base address for MEM. */
167 HOST_WIDE_INT start; /* Starting offset or register number. */
168 HOST_WIDE_INT end; /* Ending offset or register number. */
171 #ifdef SECONDARY_MEMORY_NEEDED
173 /* Save MEMs needed to copy from one class of registers to another. One MEM
174 is used per mode, but normally only one or two modes are ever used.
176 We keep two versions, before and after register elimination. The one
177 after register elimination is record separately for each operand. This
178 is done in case the address is not valid to be sure that we separately
181 static rtx secondary_memlocs[NUM_MACHINE_MODES];
182 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
183 static int secondary_memlocs_elim_used = 0;
186 /* The instruction we are doing reloads for;
187 so we can test whether a register dies in it. */
188 static rtx this_insn;
190 /* Nonzero if this instruction is a user-specified asm with operands. */
191 static int this_insn_is_asm;
193 /* If hard_regs_live_known is nonzero,
194 we can tell which hard regs are currently live,
195 at least enough to succeed in choosing dummy reloads. */
196 static int hard_regs_live_known;
198 /* Indexed by hard reg number,
199 element is nonnegative if hard reg has been spilled.
200 This vector is passed to `find_reloads' as an argument
201 and is not changed here. */
202 static short *static_reload_reg_p;
204 /* Set to 1 in subst_reg_equivs if it changes anything. */
205 static int subst_reg_equivs_changed;
207 /* On return from push_reload, holds the reload-number for the OUT
208 operand, which can be different for that from the input operand. */
209 static int output_reloadnum;
211 /* Compare two RTX's. */
212 #define MATCHES(x, y) \
213 (x == y || (x != 0 && (GET_CODE (x) == REG \
214 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
215 : rtx_equal_p (x, y) && ! side_effects_p (x))))
217 /* Indicates if two reloads purposes are for similar enough things that we
218 can merge their reloads. */
219 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
220 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
221 || ((when1) == (when2) && (op1) == (op2)) \
222 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
223 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
224 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
225 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
226 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
228 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
229 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
230 ((when1) != (when2) \
231 || ! ((op1) == (op2) \
232 || (when1) == RELOAD_FOR_INPUT \
233 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
234 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
236 /* If we are going to reload an address, compute the reload type to
238 #define ADDR_TYPE(type) \
239 ((type) == RELOAD_FOR_INPUT_ADDRESS \
240 ? RELOAD_FOR_INPADDR_ADDRESS \
241 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
242 ? RELOAD_FOR_OUTADDR_ADDRESS \
245 #ifdef HAVE_SECONDARY_RELOADS
246 static int push_secondary_reload (int, rtx, int, int, enum reg_class,
247 enum machine_mode, enum reload_type,
250 static enum reg_class find_valid_class (enum machine_mode, int, unsigned int);
251 static int reload_inner_reg_of_subreg (rtx, enum machine_mode, int);
252 static void push_replacement (rtx *, int, enum machine_mode);
253 static void dup_replacements (rtx *, rtx *);
254 static void combine_reloads (void);
255 static int find_reusable_reload (rtx *, rtx, enum reg_class,
256 enum reload_type, int, int);
257 static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, enum machine_mode,
258 enum machine_mode, enum reg_class, int, int);
259 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
260 static struct decomposition decompose (rtx);
261 static int immune_p (rtx, rtx, struct decomposition);
262 static int alternative_allows_memconst (const char *, int);
263 static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx,
265 static rtx make_memloc (rtx, int);
266 static int maybe_memory_address_p (enum machine_mode, rtx, rtx *);
267 static int find_reloads_address (enum machine_mode, rtx *, rtx, rtx *,
268 int, enum reload_type, int, rtx);
269 static rtx subst_reg_equivs (rtx, rtx);
270 static rtx subst_indexed_address (rtx);
271 static void update_auto_inc_notes (rtx, int, int);
272 static int find_reloads_address_1 (enum machine_mode, rtx, int, rtx *,
273 int, enum reload_type,int, rtx);
274 static void find_reloads_address_part (rtx, rtx *, enum reg_class,
275 enum machine_mode, int,
276 enum reload_type, int);
277 static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type,
279 static void copy_replacements_1 (rtx *, rtx *, int);
280 static int find_inc_amount (rtx, rtx);
282 #ifdef HAVE_SECONDARY_RELOADS
284 /* Determine if any secondary reloads are needed for loading (if IN_P is
285 nonzero) or storing (if IN_P is zero) X to or from a reload register of
286 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
287 are needed, push them.
289 Return the reload number of the secondary reload we made, or -1 if
290 we didn't need one. *PICODE is set to the insn_code to use if we do
291 need a secondary reload. */
294 push_secondary_reload (int in_p, rtx x, int opnum, int optional,
295 enum reg_class reload_class,
296 enum machine_mode reload_mode, enum reload_type type,
297 enum insn_code *picode)
299 enum reg_class class = NO_REGS;
300 enum machine_mode mode = reload_mode;
301 enum insn_code icode = CODE_FOR_nothing;
302 enum reg_class t_class = NO_REGS;
303 enum machine_mode t_mode = VOIDmode;
304 enum insn_code t_icode = CODE_FOR_nothing;
305 enum reload_type secondary_type;
306 int s_reload, t_reload = -1;
308 if (type == RELOAD_FOR_INPUT_ADDRESS
309 || type == RELOAD_FOR_OUTPUT_ADDRESS
310 || type == RELOAD_FOR_INPADDR_ADDRESS
311 || type == RELOAD_FOR_OUTADDR_ADDRESS)
312 secondary_type = type;
314 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
316 *picode = CODE_FOR_nothing;
318 /* If X is a paradoxical SUBREG, use the inner value to determine both the
319 mode and object being reloaded. */
320 if (GET_CODE (x) == SUBREG
321 && (GET_MODE_SIZE (GET_MODE (x))
322 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
325 reload_mode = GET_MODE (x);
328 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
329 is still a pseudo-register by now, it *must* have an equivalent MEM
330 but we don't want to assume that), use that equivalent when seeing if
331 a secondary reload is needed since whether or not a reload is needed
332 might be sensitive to the form of the MEM. */
334 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
335 && reg_equiv_mem[REGNO (x)] != 0)
336 x = reg_equiv_mem[REGNO (x)];
338 #ifdef SECONDARY_INPUT_RELOAD_CLASS
340 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
343 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
345 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
348 /* If we don't need any secondary registers, done. */
349 if (class == NO_REGS)
352 /* Get a possible insn to use. If the predicate doesn't accept X, don't
355 icode = (in_p ? reload_in_optab[(int) reload_mode]
356 : reload_out_optab[(int) reload_mode]);
358 if (icode != CODE_FOR_nothing
359 && insn_data[(int) icode].operand[in_p].predicate
360 && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode)))
361 icode = CODE_FOR_nothing;
363 /* If we will be using an insn, see if it can directly handle the reload
364 register we will be using. If it can, the secondary reload is for a
365 scratch register. If it can't, we will use the secondary reload for
366 an intermediate register and require a tertiary reload for the scratch
369 if (icode != CODE_FOR_nothing)
371 /* If IN_P is nonzero, the reload register will be the output in
372 operand 0. If IN_P is zero, the reload register will be the input
373 in operand 1. Outputs should have an initial "=", which we must
376 enum reg_class insn_class;
378 if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0)
379 insn_class = ALL_REGS;
382 const char *insn_constraint
383 = &insn_data[(int) icode].operand[!in_p].constraint[in_p];
384 char insn_letter = *insn_constraint;
386 = (insn_letter == 'r' ? GENERAL_REGS
387 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) insn_letter,
390 if (insn_class == NO_REGS)
393 && insn_data[(int) icode].operand[!in_p].constraint[0] != '=')
397 /* The scratch register's constraint must start with "=&". */
398 if (insn_data[(int) icode].operand[2].constraint[0] != '='
399 || insn_data[(int) icode].operand[2].constraint[1] != '&')
402 if (reg_class_subset_p (reload_class, insn_class))
403 mode = insn_data[(int) icode].operand[2].mode;
406 const char *t_constraint
407 = &insn_data[(int) icode].operand[2].constraint[2];
408 char t_letter = *t_constraint;
410 t_mode = insn_data[(int) icode].operand[2].mode;
411 t_class = (t_letter == 'r' ? GENERAL_REGS
412 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) t_letter,
415 icode = CODE_FOR_nothing;
419 /* This case isn't valid, so fail. Reload is allowed to use the same
420 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
421 in the case of a secondary register, we actually need two different
422 registers for correct code. We fail here to prevent the possibility of
423 silently generating incorrect code later.
425 The convention is that secondary input reloads are valid only if the
426 secondary_class is different from class. If you have such a case, you
427 can not use secondary reloads, you must work around the problem some
430 Allow this when a reload_in/out pattern is being used. I.e. assume
431 that the generated code handles this case. */
433 if (in_p && class == reload_class && icode == CODE_FOR_nothing
434 && t_icode == CODE_FOR_nothing)
437 /* If we need a tertiary reload, see if we have one we can reuse or else
440 if (t_class != NO_REGS)
442 for (t_reload = 0; t_reload < n_reloads; t_reload++)
443 if (rld[t_reload].secondary_p
444 && (reg_class_subset_p (t_class, rld[t_reload].class)
445 || reg_class_subset_p (rld[t_reload].class, t_class))
446 && ((in_p && rld[t_reload].inmode == t_mode)
447 || (! in_p && rld[t_reload].outmode == t_mode))
448 && ((in_p && (rld[t_reload].secondary_in_icode
449 == CODE_FOR_nothing))
450 || (! in_p &&(rld[t_reload].secondary_out_icode
451 == CODE_FOR_nothing)))
452 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
453 && MERGABLE_RELOADS (secondary_type,
454 rld[t_reload].when_needed,
455 opnum, rld[t_reload].opnum))
458 rld[t_reload].inmode = t_mode;
460 rld[t_reload].outmode = t_mode;
462 if (reg_class_subset_p (t_class, rld[t_reload].class))
463 rld[t_reload].class = t_class;
465 rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum);
466 rld[t_reload].optional &= optional;
467 rld[t_reload].secondary_p = 1;
468 if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed,
469 opnum, rld[t_reload].opnum))
470 rld[t_reload].when_needed = RELOAD_OTHER;
473 if (t_reload == n_reloads)
475 /* We need to make a new tertiary reload for this register class. */
476 rld[t_reload].in = rld[t_reload].out = 0;
477 rld[t_reload].class = t_class;
478 rld[t_reload].inmode = in_p ? t_mode : VOIDmode;
479 rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode;
480 rld[t_reload].reg_rtx = 0;
481 rld[t_reload].optional = optional;
482 rld[t_reload].inc = 0;
483 /* Maybe we could combine these, but it seems too tricky. */
484 rld[t_reload].nocombine = 1;
485 rld[t_reload].in_reg = 0;
486 rld[t_reload].out_reg = 0;
487 rld[t_reload].opnum = opnum;
488 rld[t_reload].when_needed = secondary_type;
489 rld[t_reload].secondary_in_reload = -1;
490 rld[t_reload].secondary_out_reload = -1;
491 rld[t_reload].secondary_in_icode = CODE_FOR_nothing;
492 rld[t_reload].secondary_out_icode = CODE_FOR_nothing;
493 rld[t_reload].secondary_p = 1;
499 /* See if we can reuse an existing secondary reload. */
500 for (s_reload = 0; s_reload < n_reloads; s_reload++)
501 if (rld[s_reload].secondary_p
502 && (reg_class_subset_p (class, rld[s_reload].class)
503 || reg_class_subset_p (rld[s_reload].class, class))
504 && ((in_p && rld[s_reload].inmode == mode)
505 || (! in_p && rld[s_reload].outmode == mode))
506 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
507 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
508 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
509 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
510 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
511 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
512 opnum, rld[s_reload].opnum))
515 rld[s_reload].inmode = mode;
517 rld[s_reload].outmode = mode;
519 if (reg_class_subset_p (class, rld[s_reload].class))
520 rld[s_reload].class = class;
522 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
523 rld[s_reload].optional &= optional;
524 rld[s_reload].secondary_p = 1;
525 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
526 opnum, rld[s_reload].opnum))
527 rld[s_reload].when_needed = RELOAD_OTHER;
530 if (s_reload == n_reloads)
532 #ifdef SECONDARY_MEMORY_NEEDED
533 /* If we need a memory location to copy between the two reload regs,
534 set it up now. Note that we do the input case before making
535 the reload and the output case after. This is due to the
536 way reloads are output. */
538 if (in_p && icode == CODE_FOR_nothing
539 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
541 get_secondary_mem (x, reload_mode, opnum, type);
543 /* We may have just added new reloads. Make sure we add
544 the new reload at the end. */
545 s_reload = n_reloads;
549 /* We need to make a new secondary reload for this register class. */
550 rld[s_reload].in = rld[s_reload].out = 0;
551 rld[s_reload].class = class;
553 rld[s_reload].inmode = in_p ? mode : VOIDmode;
554 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
555 rld[s_reload].reg_rtx = 0;
556 rld[s_reload].optional = optional;
557 rld[s_reload].inc = 0;
558 /* Maybe we could combine these, but it seems too tricky. */
559 rld[s_reload].nocombine = 1;
560 rld[s_reload].in_reg = 0;
561 rld[s_reload].out_reg = 0;
562 rld[s_reload].opnum = opnum;
563 rld[s_reload].when_needed = secondary_type;
564 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
565 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
566 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
567 rld[s_reload].secondary_out_icode
568 = ! in_p ? t_icode : CODE_FOR_nothing;
569 rld[s_reload].secondary_p = 1;
573 #ifdef SECONDARY_MEMORY_NEEDED
574 if (! in_p && icode == CODE_FOR_nothing
575 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
576 get_secondary_mem (x, mode, opnum, type);
583 #endif /* HAVE_SECONDARY_RELOADS */
585 #ifdef SECONDARY_MEMORY_NEEDED
587 /* Return a memory location that will be used to copy X in mode MODE.
588 If we haven't already made a location for this mode in this insn,
589 call find_reloads_address on the location being returned. */
592 get_secondary_mem (rtx x ATTRIBUTE_UNUSED, enum machine_mode mode,
593 int opnum, enum reload_type type)
598 /* By default, if MODE is narrower than a word, widen it to a word.
599 This is required because most machines that require these memory
600 locations do not support short load and stores from all registers
601 (e.g., FP registers). */
603 #ifdef SECONDARY_MEMORY_NEEDED_MODE
604 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
606 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
607 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
610 /* If we already have made a MEM for this operand in MODE, return it. */
611 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
612 return secondary_memlocs_elim[(int) mode][opnum];
614 /* If this is the first time we've tried to get a MEM for this mode,
615 allocate a new one. `something_changed' in reload will get set
616 by noticing that the frame size has changed. */
618 if (secondary_memlocs[(int) mode] == 0)
620 #ifdef SECONDARY_MEMORY_NEEDED_RTX
621 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
623 secondary_memlocs[(int) mode]
624 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
628 /* Get a version of the address doing any eliminations needed. If that
629 didn't give us a new MEM, make a new one if it isn't valid. */
631 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
632 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
634 if (! mem_valid && loc == secondary_memlocs[(int) mode])
635 loc = copy_rtx (loc);
637 /* The only time the call below will do anything is if the stack
638 offset is too large. In that case IND_LEVELS doesn't matter, so we
639 can just pass a zero. Adjust the type to be the address of the
640 corresponding object. If the address was valid, save the eliminated
641 address. If it wasn't valid, we need to make a reload each time, so
646 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
647 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
650 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
654 secondary_memlocs_elim[(int) mode][opnum] = loc;
655 if (secondary_memlocs_elim_used <= (int)mode)
656 secondary_memlocs_elim_used = (int)mode + 1;
660 /* Clear any secondary memory locations we've made. */
663 clear_secondary_mem (void)
665 memset (secondary_memlocs, 0, sizeof secondary_memlocs);
667 #endif /* SECONDARY_MEMORY_NEEDED */
669 /* Find the largest class for which every register number plus N is valid in
670 M1 (if in range) and is cheap to move into REGNO.
671 Abort if no such class exists. */
673 static enum reg_class
674 find_valid_class (enum machine_mode m1 ATTRIBUTE_UNUSED, int n,
675 unsigned int dest_regno ATTRIBUTE_UNUSED)
680 enum reg_class best_class = NO_REGS;
681 enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
682 unsigned int best_size = 0;
685 for (class = 1; class < N_REG_CLASSES; class++)
688 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
689 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
690 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
691 && ! HARD_REGNO_MODE_OK (regno + n, m1))
696 cost = REGISTER_MOVE_COST (m1, class, dest_class);
698 if ((reg_class_size[class] > best_size
699 && (best_cost < 0 || best_cost >= cost))
703 best_size = reg_class_size[class];
704 best_cost = REGISTER_MOVE_COST (m1, class, dest_class);
714 /* Return the number of a previously made reload that can be combined with
715 a new one, or n_reloads if none of the existing reloads can be used.
716 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
717 push_reload, they determine the kind of the new reload that we try to
718 combine. P_IN points to the corresponding value of IN, which can be
719 modified by this function.
720 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
723 find_reusable_reload (rtx *p_in, rtx out, enum reg_class class,
724 enum reload_type type, int opnum, int dont_share)
728 /* We can't merge two reloads if the output of either one is
731 if (earlyclobber_operand_p (out))
734 /* We can use an existing reload if the class is right
735 and at least one of IN and OUT is a match
736 and the other is at worst neutral.
737 (A zero compared against anything is neutral.)
739 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
740 for the same thing since that can cause us to need more reload registers
741 than we otherwise would. */
743 for (i = 0; i < n_reloads; i++)
744 if ((reg_class_subset_p (class, rld[i].class)
745 || reg_class_subset_p (rld[i].class, class))
746 /* If the existing reload has a register, it must fit our class. */
747 && (rld[i].reg_rtx == 0
748 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
749 true_regnum (rld[i].reg_rtx)))
750 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
751 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
752 || (out != 0 && MATCHES (rld[i].out, out)
753 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
754 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
755 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
756 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
759 /* Reloading a plain reg for input can match a reload to postincrement
760 that reg, since the postincrement's value is the right value.
761 Likewise, it can match a preincrement reload, since we regard
762 the preincrementation as happening before any ref in this insn
764 for (i = 0; i < n_reloads; i++)
765 if ((reg_class_subset_p (class, rld[i].class)
766 || reg_class_subset_p (rld[i].class, class))
767 /* If the existing reload has a register, it must fit our
769 && (rld[i].reg_rtx == 0
770 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
771 true_regnum (rld[i].reg_rtx)))
772 && out == 0 && rld[i].out == 0 && rld[i].in != 0
773 && ((GET_CODE (in) == REG
774 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == 'a'
775 && MATCHES (XEXP (rld[i].in, 0), in))
776 || (GET_CODE (rld[i].in) == REG
777 && GET_RTX_CLASS (GET_CODE (in)) == 'a'
778 && MATCHES (XEXP (in, 0), rld[i].in)))
779 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
780 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
781 && MERGABLE_RELOADS (type, rld[i].when_needed,
782 opnum, rld[i].opnum))
784 /* Make sure reload_in ultimately has the increment,
785 not the plain register. */
786 if (GET_CODE (in) == REG)
793 /* Return nonzero if X is a SUBREG which will require reloading of its
794 SUBREG_REG expression. */
797 reload_inner_reg_of_subreg (rtx x, enum machine_mode mode, int output)
801 /* Only SUBREGs are problematical. */
802 if (GET_CODE (x) != SUBREG)
805 inner = SUBREG_REG (x);
807 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
808 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
811 /* If INNER is not a hard register, then INNER will not need to
813 if (GET_CODE (inner) != REG
814 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
817 /* If INNER is not ok for MODE, then INNER will need reloading. */
818 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
821 /* If the outer part is a word or smaller, INNER larger than a
822 word and the number of regs for INNER is not the same as the
823 number of words in INNER, then INNER will need reloading. */
824 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
826 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
827 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
828 != (int) hard_regno_nregs[REGNO (inner)][GET_MODE (inner)]));
831 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
832 requiring an extra reload register. The caller has already found that
833 IN contains some reference to REGNO, so check that we can produce the
834 new value in a single step. E.g. if we have
835 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
836 instruction that adds one to a register, this should succeed.
837 However, if we have something like
838 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
839 needs to be loaded into a register first, we need a separate reload
841 Such PLUS reloads are generated by find_reload_address_part.
842 The out-of-range PLUS expressions are usually introduced in the instruction
843 patterns by register elimination and substituting pseudos without a home
844 by their function-invariant equivalences. */
846 can_reload_into (rtx in, int regno, enum machine_mode mode)
850 struct recog_data save_recog_data;
852 /* For matching constraints, we often get notional input reloads where
853 we want to use the original register as the reload register. I.e.
854 technically this is a non-optional input-output reload, but IN is
855 already a valid register, and has been chosen as the reload register.
856 Speed this up, since it trivially works. */
857 if (GET_CODE (in) == REG)
860 /* To test MEMs properly, we'd have to take into account all the reloads
861 that are already scheduled, which can become quite complicated.
862 And since we've already handled address reloads for this MEM, it
863 should always succeed anyway. */
864 if (GET_CODE (in) == MEM)
867 /* If we can make a simple SET insn that does the job, everything should
869 dst = gen_rtx_REG (mode, regno);
870 test_insn = make_insn_raw (gen_rtx_SET (VOIDmode, dst, in));
871 save_recog_data = recog_data;
872 if (recog_memoized (test_insn) >= 0)
874 extract_insn (test_insn);
875 r = constrain_operands (1);
877 recog_data = save_recog_data;
881 /* Record one reload that needs to be performed.
882 IN is an rtx saying where the data are to be found before this instruction.
883 OUT says where they must be stored after the instruction.
884 (IN is zero for data not read, and OUT is zero for data not written.)
885 INLOC and OUTLOC point to the places in the instructions where
886 IN and OUT were found.
887 If IN and OUT are both nonzero, it means the same register must be used
888 to reload both IN and OUT.
890 CLASS is a register class required for the reloaded data.
891 INMODE is the machine mode that the instruction requires
892 for the reg that replaces IN and OUTMODE is likewise for OUT.
894 If IN is zero, then OUT's location and mode should be passed as
897 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
899 OPTIONAL nonzero means this reload does not need to be performed:
900 it can be discarded if that is more convenient.
902 OPNUM and TYPE say what the purpose of this reload is.
904 The return value is the reload-number for this reload.
906 If both IN and OUT are nonzero, in some rare cases we might
907 want to make two separate reloads. (Actually we never do this now.)
908 Therefore, the reload-number for OUT is stored in
909 output_reloadnum when we return; the return value applies to IN.
910 Usually (presently always), when IN and OUT are nonzero,
911 the two reload-numbers are equal, but the caller should be careful to
915 push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
916 enum reg_class class, enum machine_mode inmode,
917 enum machine_mode outmode, int strict_low, int optional,
918 int opnum, enum reload_type type)
922 int dont_remove_subreg = 0;
923 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
924 int secondary_in_reload = -1, secondary_out_reload = -1;
925 enum insn_code secondary_in_icode = CODE_FOR_nothing;
926 enum insn_code secondary_out_icode = CODE_FOR_nothing;
928 /* INMODE and/or OUTMODE could be VOIDmode if no mode
929 has been specified for the operand. In that case,
930 use the operand's mode as the mode to reload. */
931 if (inmode == VOIDmode && in != 0)
932 inmode = GET_MODE (in);
933 if (outmode == VOIDmode && out != 0)
934 outmode = GET_MODE (out);
936 /* If IN is a pseudo register everywhere-equivalent to a constant, and
937 it is not in a hard register, reload straight from the constant,
938 since we want to get rid of such pseudo registers.
939 Often this is done earlier, but not always in find_reloads_address. */
940 if (in != 0 && GET_CODE (in) == REG)
942 int regno = REGNO (in);
944 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
945 && reg_equiv_constant[regno] != 0)
946 in = reg_equiv_constant[regno];
949 /* Likewise for OUT. Of course, OUT will never be equivalent to
950 an actual constant, but it might be equivalent to a memory location
951 (in the case of a parameter). */
952 if (out != 0 && GET_CODE (out) == REG)
954 int regno = REGNO (out);
956 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
957 && reg_equiv_constant[regno] != 0)
958 out = reg_equiv_constant[regno];
961 /* If we have a read-write operand with an address side-effect,
962 change either IN or OUT so the side-effect happens only once. */
963 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
964 switch (GET_CODE (XEXP (in, 0)))
966 case POST_INC: case POST_DEC: case POST_MODIFY:
967 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
970 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
971 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
978 /* If we are reloading a (SUBREG constant ...), really reload just the
979 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
980 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
981 a pseudo and hence will become a MEM) with M1 wider than M2 and the
982 register is a pseudo, also reload the inside expression.
983 For machines that extend byte loads, do this for any SUBREG of a pseudo
984 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
985 M2 is an integral mode that gets extended when loaded.
986 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
987 either M1 is not valid for R or M2 is wider than a word but we only
988 need one word to store an M2-sized quantity in R.
989 (However, if OUT is nonzero, we need to reload the reg *and*
990 the subreg, so do nothing here, and let following statement handle it.)
992 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
993 we can't handle it here because CONST_INT does not indicate a mode.
995 Similarly, we must reload the inside expression if we have a
996 STRICT_LOW_PART (presumably, in == out in the cas).
998 Also reload the inner expression if it does not require a secondary
999 reload but the SUBREG does.
1001 Finally, reload the inner expression if it is a register that is in
1002 the class whose registers cannot be referenced in a different size
1003 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
1004 cannot reload just the inside since we might end up with the wrong
1005 register class. But if it is inside a STRICT_LOW_PART, we have
1006 no choice, so we hope we do get the right register class there. */
1008 if (in != 0 && GET_CODE (in) == SUBREG
1009 && (subreg_lowpart_p (in) || strict_low)
1010 #ifdef CANNOT_CHANGE_MODE_CLASS
1011 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, class)
1013 && (CONSTANT_P (SUBREG_REG (in))
1014 || GET_CODE (SUBREG_REG (in)) == PLUS
1016 || (((GET_CODE (SUBREG_REG (in)) == REG
1017 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
1018 || GET_CODE (SUBREG_REG (in)) == MEM)
1019 && ((GET_MODE_SIZE (inmode)
1020 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1021 #ifdef LOAD_EXTEND_OP
1022 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1023 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1025 && (GET_MODE_SIZE (inmode)
1026 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1027 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
1028 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
1030 #ifdef WORD_REGISTER_OPERATIONS
1031 || ((GET_MODE_SIZE (inmode)
1032 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1033 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1034 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1038 || (GET_CODE (SUBREG_REG (in)) == REG
1039 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1040 /* The case where out is nonzero
1041 is handled differently in the following statement. */
1042 && (out == 0 || subreg_lowpart_p (in))
1043 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1044 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1046 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1048 != (int) hard_regno_nregs[REGNO (SUBREG_REG (in))]
1049 [GET_MODE (SUBREG_REG (in))]))
1050 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1051 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1052 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
1053 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1054 GET_MODE (SUBREG_REG (in)),
1058 #ifdef CANNOT_CHANGE_MODE_CLASS
1059 || (GET_CODE (SUBREG_REG (in)) == REG
1060 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1061 && REG_CANNOT_CHANGE_MODE_P
1062 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1066 in_subreg_loc = inloc;
1067 inloc = &SUBREG_REG (in);
1069 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1070 if (GET_CODE (in) == MEM)
1071 /* This is supposed to happen only for paradoxical subregs made by
1072 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1073 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
1076 inmode = GET_MODE (in);
1079 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1080 either M1 is not valid for R or M2 is wider than a word but we only
1081 need one word to store an M2-sized quantity in R.
1083 However, we must reload the inner reg *as well as* the subreg in
1086 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1087 code above. This can happen if SUBREG_BYTE != 0. */
1089 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1091 enum reg_class in_class = class;
1093 if (GET_CODE (SUBREG_REG (in)) == REG)
1095 = find_valid_class (inmode,
1096 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1097 GET_MODE (SUBREG_REG (in)),
1100 REGNO (SUBREG_REG (in)));
1102 /* This relies on the fact that emit_reload_insns outputs the
1103 instructions for input reloads of type RELOAD_OTHER in the same
1104 order as the reloads. Thus if the outer reload is also of type
1105 RELOAD_OTHER, we are guaranteed that this inner reload will be
1106 output before the outer reload. */
1107 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1108 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1109 dont_remove_subreg = 1;
1112 /* Similarly for paradoxical and problematical SUBREGs on the output.
1113 Note that there is no reason we need worry about the previous value
1114 of SUBREG_REG (out); even if wider than out,
1115 storing in a subreg is entitled to clobber it all
1116 (except in the case of STRICT_LOW_PART,
1117 and in that case the constraint should label it input-output.) */
1118 if (out != 0 && GET_CODE (out) == SUBREG
1119 && (subreg_lowpart_p (out) || strict_low)
1120 #ifdef CANNOT_CHANGE_MODE_CLASS
1121 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, class)
1123 && (CONSTANT_P (SUBREG_REG (out))
1125 || (((GET_CODE (SUBREG_REG (out)) == REG
1126 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1127 || GET_CODE (SUBREG_REG (out)) == MEM)
1128 && ((GET_MODE_SIZE (outmode)
1129 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1130 #ifdef WORD_REGISTER_OPERATIONS
1131 || ((GET_MODE_SIZE (outmode)
1132 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1133 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1134 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1138 || (GET_CODE (SUBREG_REG (out)) == REG
1139 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1140 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1141 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1143 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1145 != (int) hard_regno_nregs[REGNO (SUBREG_REG (out))]
1146 [GET_MODE (SUBREG_REG (out))]))
1147 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1148 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1149 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1150 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1151 GET_MODE (SUBREG_REG (out)),
1155 #ifdef CANNOT_CHANGE_MODE_CLASS
1156 || (GET_CODE (SUBREG_REG (out)) == REG
1157 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1158 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1159 GET_MODE (SUBREG_REG (out)),
1164 out_subreg_loc = outloc;
1165 outloc = &SUBREG_REG (out);
1167 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1168 if (GET_CODE (out) == MEM
1169 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1172 outmode = GET_MODE (out);
1175 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1176 either M1 is not valid for R or M2 is wider than a word but we only
1177 need one word to store an M2-sized quantity in R.
1179 However, we must reload the inner reg *as well as* the subreg in
1180 that case. In this case, the inner reg is an in-out reload. */
1182 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1184 /* This relies on the fact that emit_reload_insns outputs the
1185 instructions for output reloads of type RELOAD_OTHER in reverse
1186 order of the reloads. Thus if the outer reload is also of type
1187 RELOAD_OTHER, we are guaranteed that this inner reload will be
1188 output after the outer reload. */
1189 dont_remove_subreg = 1;
1190 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1192 find_valid_class (outmode,
1193 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1194 GET_MODE (SUBREG_REG (out)),
1197 REGNO (SUBREG_REG (out))),
1198 VOIDmode, VOIDmode, 0, 0,
1199 opnum, RELOAD_OTHER);
1202 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1203 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1204 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1205 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1208 /* If IN is a SUBREG of a hard register, make a new REG. This
1209 simplifies some of the cases below. */
1211 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1212 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1213 && ! dont_remove_subreg)
1214 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1216 /* Similarly for OUT. */
1217 if (out != 0 && GET_CODE (out) == SUBREG
1218 && GET_CODE (SUBREG_REG (out)) == REG
1219 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1220 && ! dont_remove_subreg)
1221 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1223 /* Narrow down the class of register wanted if that is
1224 desirable on this machine for efficiency. */
1226 class = PREFERRED_RELOAD_CLASS (in, class);
1228 /* Output reloads may need analogous treatment, different in detail. */
1229 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1231 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1234 /* Make sure we use a class that can handle the actual pseudo
1235 inside any subreg. For example, on the 386, QImode regs
1236 can appear within SImode subregs. Although GENERAL_REGS
1237 can handle SImode, QImode needs a smaller class. */
1238 #ifdef LIMIT_RELOAD_CLASS
1240 class = LIMIT_RELOAD_CLASS (inmode, class);
1241 else if (in != 0 && GET_CODE (in) == SUBREG)
1242 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1245 class = LIMIT_RELOAD_CLASS (outmode, class);
1246 if (out != 0 && GET_CODE (out) == SUBREG)
1247 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1250 /* Verify that this class is at least possible for the mode that
1252 if (this_insn_is_asm)
1254 enum machine_mode mode;
1255 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1259 if (mode == VOIDmode)
1261 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1266 outmode = word_mode;
1268 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1269 if (HARD_REGNO_MODE_OK (i, mode)
1270 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1272 int nregs = hard_regno_nregs[i][mode];
1275 for (j = 1; j < nregs; j++)
1276 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1281 if (i == FIRST_PSEUDO_REGISTER)
1283 error_for_asm (this_insn, "impossible register constraint in `asm'");
1288 /* Optional output reloads are always OK even if we have no register class,
1289 since the function of these reloads is only to have spill_reg_store etc.
1290 set, so that the storing insn can be deleted later. */
1291 if (class == NO_REGS
1292 && (optional == 0 || type != RELOAD_FOR_OUTPUT))
1295 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1299 /* See if we need a secondary reload register to move between CLASS
1300 and IN or CLASS and OUT. Get the icode and push any required reloads
1301 needed for each of them if so. */
1303 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1306 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1307 &secondary_in_icode);
1310 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1311 if (out != 0 && GET_CODE (out) != SCRATCH)
1312 secondary_out_reload
1313 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1314 type, &secondary_out_icode);
1317 /* We found no existing reload suitable for re-use.
1318 So add an additional reload. */
1320 #ifdef SECONDARY_MEMORY_NEEDED
1321 /* If a memory location is needed for the copy, make one. */
1322 if (in != 0 && (GET_CODE (in) == REG || GET_CODE (in) == SUBREG)
1323 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1324 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1326 get_secondary_mem (in, inmode, opnum, type);
1332 rld[i].class = class;
1333 rld[i].inmode = inmode;
1334 rld[i].outmode = outmode;
1336 rld[i].optional = optional;
1338 rld[i].nocombine = 0;
1339 rld[i].in_reg = inloc ? *inloc : 0;
1340 rld[i].out_reg = outloc ? *outloc : 0;
1341 rld[i].opnum = opnum;
1342 rld[i].when_needed = type;
1343 rld[i].secondary_in_reload = secondary_in_reload;
1344 rld[i].secondary_out_reload = secondary_out_reload;
1345 rld[i].secondary_in_icode = secondary_in_icode;
1346 rld[i].secondary_out_icode = secondary_out_icode;
1347 rld[i].secondary_p = 0;
1351 #ifdef SECONDARY_MEMORY_NEEDED
1352 if (out != 0 && (GET_CODE (out) == REG || GET_CODE (out) == SUBREG)
1353 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1354 && SECONDARY_MEMORY_NEEDED (class,
1355 REGNO_REG_CLASS (reg_or_subregno (out)),
1357 get_secondary_mem (out, outmode, opnum, type);
1362 /* We are reusing an existing reload,
1363 but we may have additional information for it.
1364 For example, we may now have both IN and OUT
1365 while the old one may have just one of them. */
1367 /* The modes can be different. If they are, we want to reload in
1368 the larger mode, so that the value is valid for both modes. */
1369 if (inmode != VOIDmode
1370 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1371 rld[i].inmode = inmode;
1372 if (outmode != VOIDmode
1373 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1374 rld[i].outmode = outmode;
1377 rtx in_reg = inloc ? *inloc : 0;
1378 /* If we merge reloads for two distinct rtl expressions that
1379 are identical in content, there might be duplicate address
1380 reloads. Remove the extra set now, so that if we later find
1381 that we can inherit this reload, we can get rid of the
1382 address reloads altogether.
1384 Do not do this if both reloads are optional since the result
1385 would be an optional reload which could potentially leave
1386 unresolved address replacements.
1388 It is not sufficient to call transfer_replacements since
1389 choose_reload_regs will remove the replacements for address
1390 reloads of inherited reloads which results in the same
1392 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1393 && ! (rld[i].optional && optional))
1395 /* We must keep the address reload with the lower operand
1397 if (opnum > rld[i].opnum)
1399 remove_address_replacements (in);
1401 in_reg = rld[i].in_reg;
1404 remove_address_replacements (rld[i].in);
1407 rld[i].in_reg = in_reg;
1412 rld[i].out_reg = outloc ? *outloc : 0;
1414 if (reg_class_subset_p (class, rld[i].class))
1415 rld[i].class = class;
1416 rld[i].optional &= optional;
1417 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1418 opnum, rld[i].opnum))
1419 rld[i].when_needed = RELOAD_OTHER;
1420 rld[i].opnum = MIN (rld[i].opnum, opnum);
1423 /* If the ostensible rtx being reloaded differs from the rtx found
1424 in the location to substitute, this reload is not safe to combine
1425 because we cannot reliably tell whether it appears in the insn. */
1427 if (in != 0 && in != *inloc)
1428 rld[i].nocombine = 1;
1431 /* This was replaced by changes in find_reloads_address_1 and the new
1432 function inc_for_reload, which go with a new meaning of reload_inc. */
1434 /* If this is an IN/OUT reload in an insn that sets the CC,
1435 it must be for an autoincrement. It doesn't work to store
1436 the incremented value after the insn because that would clobber the CC.
1437 So we must do the increment of the value reloaded from,
1438 increment it, store it back, then decrement again. */
1439 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1443 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1444 /* If we did not find a nonzero amount-to-increment-by,
1445 that contradicts the belief that IN is being incremented
1446 in an address in this insn. */
1447 if (rld[i].inc == 0)
1452 /* If we will replace IN and OUT with the reload-reg,
1453 record where they are located so that substitution need
1454 not do a tree walk. */
1456 if (replace_reloads)
1460 struct replacement *r = &replacements[n_replacements++];
1462 r->subreg_loc = in_subreg_loc;
1466 if (outloc != 0 && outloc != inloc)
1468 struct replacement *r = &replacements[n_replacements++];
1471 r->subreg_loc = out_subreg_loc;
1476 /* If this reload is just being introduced and it has both
1477 an incoming quantity and an outgoing quantity that are
1478 supposed to be made to match, see if either one of the two
1479 can serve as the place to reload into.
1481 If one of them is acceptable, set rld[i].reg_rtx
1484 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1486 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1489 earlyclobber_operand_p (out));
1491 /* If the outgoing register already contains the same value
1492 as the incoming one, we can dispense with loading it.
1493 The easiest way to tell the caller that is to give a phony
1494 value for the incoming operand (same as outgoing one). */
1495 if (rld[i].reg_rtx == out
1496 && (GET_CODE (in) == REG || CONSTANT_P (in))
1497 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1498 static_reload_reg_p, i, inmode))
1502 /* If this is an input reload and the operand contains a register that
1503 dies in this insn and is used nowhere else, see if it is the right class
1504 to be used for this reload. Use it if so. (This occurs most commonly
1505 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1506 this if it is also an output reload that mentions the register unless
1507 the output is a SUBREG that clobbers an entire register.
1509 Note that the operand might be one of the spill regs, if it is a
1510 pseudo reg and we are in a block where spilling has not taken place.
1511 But if there is no spilling in this block, that is OK.
1512 An explicitly used hard reg cannot be a spill reg. */
1514 if (rld[i].reg_rtx == 0 && in != 0)
1518 enum machine_mode rel_mode = inmode;
1520 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1523 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1524 if (REG_NOTE_KIND (note) == REG_DEAD
1525 && GET_CODE (XEXP (note, 0)) == REG
1526 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1527 && reg_mentioned_p (XEXP (note, 0), in)
1528 && ! refers_to_regno_for_reload_p (regno,
1530 + hard_regno_nregs[regno]
1532 PATTERN (this_insn), inloc)
1533 /* If this is also an output reload, IN cannot be used as
1534 the reload register if it is set in this insn unless IN
1536 && (out == 0 || in == out
1537 || ! hard_reg_set_here_p (regno,
1539 + hard_regno_nregs[regno]
1541 PATTERN (this_insn)))
1542 /* ??? Why is this code so different from the previous?
1543 Is there any simple coherent way to describe the two together?
1544 What's going on here. */
1546 || (GET_CODE (in) == SUBREG
1547 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1549 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1550 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1551 /* Make sure the operand fits in the reg that dies. */
1552 && (GET_MODE_SIZE (rel_mode)
1553 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1554 && HARD_REGNO_MODE_OK (regno, inmode)
1555 && HARD_REGNO_MODE_OK (regno, outmode))
1558 unsigned int nregs = MAX (hard_regno_nregs[regno][inmode],
1559 hard_regno_nregs[regno][outmode]);
1561 for (offs = 0; offs < nregs; offs++)
1562 if (fixed_regs[regno + offs]
1563 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1568 && (! (refers_to_regno_for_reload_p
1569 (regno, (regno + hard_regno_nregs[regno][inmode]),
1571 || can_reload_into (in, regno, inmode)))
1573 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1580 output_reloadnum = i;
1585 /* Record an additional place we must replace a value
1586 for which we have already recorded a reload.
1587 RELOADNUM is the value returned by push_reload
1588 when the reload was recorded.
1589 This is used in insn patterns that use match_dup. */
1592 push_replacement (rtx *loc, int reloadnum, enum machine_mode mode)
1594 if (replace_reloads)
1596 struct replacement *r = &replacements[n_replacements++];
1597 r->what = reloadnum;
1604 /* Duplicate any replacement we have recorded to apply at
1605 location ORIG_LOC to also be performed at DUP_LOC.
1606 This is used in insn patterns that use match_dup. */
1609 dup_replacements (rtx *dup_loc, rtx *orig_loc)
1611 int i, n = n_replacements;
1613 for (i = 0; i < n; i++)
1615 struct replacement *r = &replacements[i];
1616 if (r->where == orig_loc)
1617 push_replacement (dup_loc, r->what, r->mode);
1621 /* Transfer all replacements that used to be in reload FROM to be in
1625 transfer_replacements (int to, int from)
1629 for (i = 0; i < n_replacements; i++)
1630 if (replacements[i].what == from)
1631 replacements[i].what = to;
1634 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1635 or a subpart of it. If we have any replacements registered for IN_RTX,
1636 cancel the reloads that were supposed to load them.
1637 Return nonzero if we canceled any reloads. */
1639 remove_address_replacements (rtx in_rtx)
1642 char reload_flags[MAX_RELOADS];
1643 int something_changed = 0;
1645 memset (reload_flags, 0, sizeof reload_flags);
1646 for (i = 0, j = 0; i < n_replacements; i++)
1648 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1649 reload_flags[replacements[i].what] |= 1;
1652 replacements[j++] = replacements[i];
1653 reload_flags[replacements[i].what] |= 2;
1656 /* Note that the following store must be done before the recursive calls. */
1659 for (i = n_reloads - 1; i >= 0; i--)
1661 if (reload_flags[i] == 1)
1663 deallocate_reload_reg (i);
1664 remove_address_replacements (rld[i].in);
1666 something_changed = 1;
1669 return something_changed;
1672 /* If there is only one output reload, and it is not for an earlyclobber
1673 operand, try to combine it with a (logically unrelated) input reload
1674 to reduce the number of reload registers needed.
1676 This is safe if the input reload does not appear in
1677 the value being output-reloaded, because this implies
1678 it is not needed any more once the original insn completes.
1680 If that doesn't work, see we can use any of the registers that
1681 die in this insn as a reload register. We can if it is of the right
1682 class and does not appear in the value being output-reloaded. */
1685 combine_reloads (void)
1688 int output_reload = -1;
1689 int secondary_out = -1;
1692 /* Find the output reload; return unless there is exactly one
1693 and that one is mandatory. */
1695 for (i = 0; i < n_reloads; i++)
1696 if (rld[i].out != 0)
1698 if (output_reload >= 0)
1703 if (output_reload < 0 || rld[output_reload].optional)
1706 /* An input-output reload isn't combinable. */
1708 if (rld[output_reload].in != 0)
1711 /* If this reload is for an earlyclobber operand, we can't do anything. */
1712 if (earlyclobber_operand_p (rld[output_reload].out))
1715 /* If there is a reload for part of the address of this operand, we would
1716 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1717 its life to the point where doing this combine would not lower the
1718 number of spill registers needed. */
1719 for (i = 0; i < n_reloads; i++)
1720 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1721 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1722 && rld[i].opnum == rld[output_reload].opnum)
1725 /* Check each input reload; can we combine it? */
1727 for (i = 0; i < n_reloads; i++)
1728 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1729 /* Life span of this reload must not extend past main insn. */
1730 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1731 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1732 && rld[i].when_needed != RELOAD_OTHER
1733 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1734 == CLASS_MAX_NREGS (rld[output_reload].class,
1735 rld[output_reload].outmode))
1737 && rld[i].reg_rtx == 0
1738 #ifdef SECONDARY_MEMORY_NEEDED
1739 /* Don't combine two reloads with different secondary
1740 memory locations. */
1741 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1742 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1743 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1744 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1746 && (SMALL_REGISTER_CLASSES
1747 ? (rld[i].class == rld[output_reload].class)
1748 : (reg_class_subset_p (rld[i].class,
1749 rld[output_reload].class)
1750 || reg_class_subset_p (rld[output_reload].class,
1752 && (MATCHES (rld[i].in, rld[output_reload].out)
1753 /* Args reversed because the first arg seems to be
1754 the one that we imagine being modified
1755 while the second is the one that might be affected. */
1756 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1758 /* However, if the input is a register that appears inside
1759 the output, then we also can't share.
1760 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1761 If the same reload reg is used for both reg 69 and the
1762 result to be stored in memory, then that result
1763 will clobber the address of the memory ref. */
1764 && ! (GET_CODE (rld[i].in) == REG
1765 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1766 rld[output_reload].out))))
1767 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1768 rld[i].when_needed != RELOAD_FOR_INPUT)
1769 && (reg_class_size[(int) rld[i].class]
1770 || SMALL_REGISTER_CLASSES)
1771 /* We will allow making things slightly worse by combining an
1772 input and an output, but no worse than that. */
1773 && (rld[i].when_needed == RELOAD_FOR_INPUT
1774 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1778 /* We have found a reload to combine with! */
1779 rld[i].out = rld[output_reload].out;
1780 rld[i].out_reg = rld[output_reload].out_reg;
1781 rld[i].outmode = rld[output_reload].outmode;
1782 /* Mark the old output reload as inoperative. */
1783 rld[output_reload].out = 0;
1784 /* The combined reload is needed for the entire insn. */
1785 rld[i].when_needed = RELOAD_OTHER;
1786 /* If the output reload had a secondary reload, copy it. */
1787 if (rld[output_reload].secondary_out_reload != -1)
1789 rld[i].secondary_out_reload
1790 = rld[output_reload].secondary_out_reload;
1791 rld[i].secondary_out_icode
1792 = rld[output_reload].secondary_out_icode;
1795 #ifdef SECONDARY_MEMORY_NEEDED
1796 /* Copy any secondary MEM. */
1797 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1798 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1799 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1801 /* If required, minimize the register class. */
1802 if (reg_class_subset_p (rld[output_reload].class,
1804 rld[i].class = rld[output_reload].class;
1806 /* Transfer all replacements from the old reload to the combined. */
1807 for (j = 0; j < n_replacements; j++)
1808 if (replacements[j].what == output_reload)
1809 replacements[j].what = i;
1814 /* If this insn has only one operand that is modified or written (assumed
1815 to be the first), it must be the one corresponding to this reload. It
1816 is safe to use anything that dies in this insn for that output provided
1817 that it does not occur in the output (we already know it isn't an
1818 earlyclobber. If this is an asm insn, give up. */
1820 if (INSN_CODE (this_insn) == -1)
1823 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1824 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1825 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1828 /* See if some hard register that dies in this insn and is not used in
1829 the output is the right class. Only works if the register we pick
1830 up can fully hold our output reload. */
1831 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1832 if (REG_NOTE_KIND (note) == REG_DEAD
1833 && GET_CODE (XEXP (note, 0)) == REG
1834 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1835 rld[output_reload].out)
1836 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1837 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1838 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1839 REGNO (XEXP (note, 0)))
1840 && (hard_regno_nregs[REGNO (XEXP (note, 0))][rld[output_reload].outmode]
1841 <= hard_regno_nregs[REGNO (XEXP (note, 0))][GET_MODE (XEXP (note, 0))])
1842 /* Ensure that a secondary or tertiary reload for this output
1843 won't want this register. */
1844 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1845 || (! (TEST_HARD_REG_BIT
1846 (reg_class_contents[(int) rld[secondary_out].class],
1847 REGNO (XEXP (note, 0))))
1848 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1849 || ! (TEST_HARD_REG_BIT
1850 (reg_class_contents[(int) rld[secondary_out].class],
1851 REGNO (XEXP (note, 0)))))))
1852 && ! fixed_regs[REGNO (XEXP (note, 0))])
1854 rld[output_reload].reg_rtx
1855 = gen_rtx_REG (rld[output_reload].outmode,
1856 REGNO (XEXP (note, 0)));
1861 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1862 See if one of IN and OUT is a register that may be used;
1863 this is desirable since a spill-register won't be needed.
1864 If so, return the register rtx that proves acceptable.
1866 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1867 CLASS is the register class required for the reload.
1869 If FOR_REAL is >= 0, it is the number of the reload,
1870 and in some cases when it can be discovered that OUT doesn't need
1871 to be computed, clear out rld[FOR_REAL].out.
1873 If FOR_REAL is -1, this should not be done, because this call
1874 is just to see if a register can be found, not to find and install it.
1876 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1877 puts an additional constraint on being able to use IN for OUT since
1878 IN must not appear elsewhere in the insn (it is assumed that IN itself
1879 is safe from the earlyclobber). */
1882 find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
1883 enum machine_mode inmode, enum machine_mode outmode,
1884 enum reg_class class, int for_real, int earlyclobber)
1892 /* If operands exceed a word, we can't use either of them
1893 unless they have the same size. */
1894 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1895 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1896 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1899 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1900 respectively refers to a hard register. */
1902 /* Find the inside of any subregs. */
1903 while (GET_CODE (out) == SUBREG)
1905 if (GET_CODE (SUBREG_REG (out)) == REG
1906 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1907 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1908 GET_MODE (SUBREG_REG (out)),
1911 out = SUBREG_REG (out);
1913 while (GET_CODE (in) == SUBREG)
1915 if (GET_CODE (SUBREG_REG (in)) == REG
1916 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1917 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1918 GET_MODE (SUBREG_REG (in)),
1921 in = SUBREG_REG (in);
1924 /* Narrow down the reg class, the same way push_reload will;
1925 otherwise we might find a dummy now, but push_reload won't. */
1926 class = PREFERRED_RELOAD_CLASS (in, class);
1928 /* See if OUT will do. */
1929 if (GET_CODE (out) == REG
1930 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1932 unsigned int regno = REGNO (out) + out_offset;
1933 unsigned int nwords = hard_regno_nregs[regno][outmode];
1936 /* When we consider whether the insn uses OUT,
1937 ignore references within IN. They don't prevent us
1938 from copying IN into OUT, because those refs would
1939 move into the insn that reloads IN.
1941 However, we only ignore IN in its role as this reload.
1942 If the insn uses IN elsewhere and it contains OUT,
1943 that counts. We can't be sure it's the "same" operand
1944 so it might not go through this reload. */
1946 *inloc = const0_rtx;
1948 if (regno < FIRST_PSEUDO_REGISTER
1949 && HARD_REGNO_MODE_OK (regno, outmode)
1950 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1951 PATTERN (this_insn), outloc))
1955 for (i = 0; i < nwords; i++)
1956 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1962 if (GET_CODE (real_out) == REG)
1965 value = gen_rtx_REG (outmode, regno);
1972 /* Consider using IN if OUT was not acceptable
1973 or if OUT dies in this insn (like the quotient in a divmod insn).
1974 We can't use IN unless it is dies in this insn,
1975 which means we must know accurately which hard regs are live.
1976 Also, the result can't go in IN if IN is used within OUT,
1977 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1978 if (hard_regs_live_known
1979 && GET_CODE (in) == REG
1980 && REGNO (in) < FIRST_PSEUDO_REGISTER
1982 || find_reg_note (this_insn, REG_UNUSED, real_out))
1983 && find_reg_note (this_insn, REG_DEAD, real_in)
1984 && !fixed_regs[REGNO (in)]
1985 && HARD_REGNO_MODE_OK (REGNO (in),
1986 /* The only case where out and real_out might
1987 have different modes is where real_out
1988 is a subreg, and in that case, out
1990 (GET_MODE (out) != VOIDmode
1991 ? GET_MODE (out) : outmode)))
1993 unsigned int regno = REGNO (in) + in_offset;
1994 unsigned int nwords = hard_regno_nregs[regno][inmode];
1996 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
1997 && ! hard_reg_set_here_p (regno, regno + nwords,
1998 PATTERN (this_insn))
2000 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
2001 PATTERN (this_insn), inloc)))
2005 for (i = 0; i < nwords; i++)
2006 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
2012 /* If we were going to use OUT as the reload reg
2013 and changed our mind, it means OUT is a dummy that
2014 dies here. So don't bother copying value to it. */
2015 if (for_real >= 0 && value == real_out)
2016 rld[for_real].out = 0;
2017 if (GET_CODE (real_in) == REG)
2020 value = gen_rtx_REG (inmode, regno);
2028 /* This page contains subroutines used mainly for determining
2029 whether the IN or an OUT of a reload can serve as the
2032 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2035 earlyclobber_operand_p (rtx x)
2039 for (i = 0; i < n_earlyclobbers; i++)
2040 if (reload_earlyclobbers[i] == x)
2046 /* Return 1 if expression X alters a hard reg in the range
2047 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2048 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2049 X should be the body of an instruction. */
2052 hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x)
2054 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2056 rtx op0 = SET_DEST (x);
2058 while (GET_CODE (op0) == SUBREG)
2059 op0 = SUBREG_REG (op0);
2060 if (GET_CODE (op0) == REG)
2062 unsigned int r = REGNO (op0);
2064 /* See if this reg overlaps range under consideration. */
2066 && r + hard_regno_nregs[r][GET_MODE (op0)] > beg_regno)
2070 else if (GET_CODE (x) == PARALLEL)
2072 int i = XVECLEN (x, 0) - 1;
2075 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2082 /* Return 1 if ADDR is a valid memory address for mode MODE,
2083 and check that each pseudo reg has the proper kind of
2087 strict_memory_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx addr)
2089 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2096 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2097 if they are the same hard reg, and has special hacks for
2098 autoincrement and autodecrement.
2099 This is specifically intended for find_reloads to use
2100 in determining whether two operands match.
2101 X is the operand whose number is the lower of the two.
2103 The value is 2 if Y contains a pre-increment that matches
2104 a non-incrementing address in X. */
2106 /* ??? To be completely correct, we should arrange to pass
2107 for X the output operand and for Y the input operand.
2108 For now, we assume that the output operand has the lower number
2109 because that is natural in (SET output (... input ...)). */
2112 operands_match_p (rtx x, rtx y)
2115 RTX_CODE code = GET_CODE (x);
2121 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2122 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2123 && GET_CODE (SUBREG_REG (y)) == REG)))
2129 i = REGNO (SUBREG_REG (x));
2130 if (i >= FIRST_PSEUDO_REGISTER)
2132 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2133 GET_MODE (SUBREG_REG (x)),
2140 if (GET_CODE (y) == SUBREG)
2142 j = REGNO (SUBREG_REG (y));
2143 if (j >= FIRST_PSEUDO_REGISTER)
2145 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2146 GET_MODE (SUBREG_REG (y)),
2153 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2154 multiple hard register group, so that for example (reg:DI 0) and
2155 (reg:SI 1) will be considered the same register. */
2156 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2157 && i < FIRST_PSEUDO_REGISTER)
2158 i += hard_regno_nregs[i][GET_MODE (x)] - 1;
2159 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2160 && j < FIRST_PSEUDO_REGISTER)
2161 j += hard_regno_nregs[j][GET_MODE (y)] - 1;
2165 /* If two operands must match, because they are really a single
2166 operand of an assembler insn, then two postincrements are invalid
2167 because the assembler insn would increment only once.
2168 On the other hand, a postincrement matches ordinary indexing
2169 if the postincrement is the output operand. */
2170 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2171 return operands_match_p (XEXP (x, 0), y);
2172 /* Two preincrements are invalid
2173 because the assembler insn would increment only once.
2174 On the other hand, a preincrement matches ordinary indexing
2175 if the preincrement is the input operand.
2176 In this case, return 2, since some callers need to do special
2177 things when this happens. */
2178 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2179 || GET_CODE (y) == PRE_MODIFY)
2180 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2184 /* Now we have disposed of all the cases
2185 in which different rtx codes can match. */
2186 if (code != GET_CODE (y))
2188 if (code == LABEL_REF)
2189 return XEXP (x, 0) == XEXP (y, 0);
2190 if (code == SYMBOL_REF)
2191 return XSTR (x, 0) == XSTR (y, 0);
2193 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2195 if (GET_MODE (x) != GET_MODE (y))
2198 /* Compare the elements. If any pair of corresponding elements
2199 fail to match, return 0 for the whole things. */
2202 fmt = GET_RTX_FORMAT (code);
2203 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2209 if (XWINT (x, i) != XWINT (y, i))
2214 if (XINT (x, i) != XINT (y, i))
2219 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2222 /* If any subexpression returns 2,
2223 we should return 2 if we are successful. */
2232 if (XVECLEN (x, i) != XVECLEN (y, i))
2234 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2236 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2244 /* It is believed that rtx's at this level will never
2245 contain anything but integers and other rtx's,
2246 except for within LABEL_REFs and SYMBOL_REFs. */
2251 return 1 + success_2;
2254 /* Describe the range of registers or memory referenced by X.
2255 If X is a register, set REG_FLAG and put the first register
2256 number into START and the last plus one into END.
2257 If X is a memory reference, put a base address into BASE
2258 and a range of integer offsets into START and END.
2259 If X is pushing on the stack, we can assume it causes no trouble,
2260 so we set the SAFE field. */
2262 static struct decomposition
2265 struct decomposition val;
2271 if (GET_CODE (x) == MEM)
2273 rtx base = NULL_RTX, offset = 0;
2274 rtx addr = XEXP (x, 0);
2276 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2277 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2279 val.base = XEXP (addr, 0);
2280 val.start = -GET_MODE_SIZE (GET_MODE (x));
2281 val.end = GET_MODE_SIZE (GET_MODE (x));
2282 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2286 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2288 if (GET_CODE (XEXP (addr, 1)) == PLUS
2289 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2290 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2292 val.base = XEXP (addr, 0);
2293 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2294 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2295 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2300 if (GET_CODE (addr) == CONST)
2302 addr = XEXP (addr, 0);
2305 if (GET_CODE (addr) == PLUS)
2307 if (CONSTANT_P (XEXP (addr, 0)))
2309 base = XEXP (addr, 1);
2310 offset = XEXP (addr, 0);
2312 else if (CONSTANT_P (XEXP (addr, 1)))
2314 base = XEXP (addr, 0);
2315 offset = XEXP (addr, 1);
2322 offset = const0_rtx;
2324 if (GET_CODE (offset) == CONST)
2325 offset = XEXP (offset, 0);
2326 if (GET_CODE (offset) == PLUS)
2328 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2330 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2331 offset = XEXP (offset, 0);
2333 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2335 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2336 offset = XEXP (offset, 1);
2340 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2341 offset = const0_rtx;
2344 else if (GET_CODE (offset) != CONST_INT)
2346 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2347 offset = const0_rtx;
2350 if (all_const && GET_CODE (base) == PLUS)
2351 base = gen_rtx_CONST (GET_MODE (base), base);
2353 if (GET_CODE (offset) != CONST_INT)
2356 val.start = INTVAL (offset);
2357 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2361 else if (GET_CODE (x) == REG)
2364 val.start = true_regnum (x);
2367 /* A pseudo with no hard reg. */
2368 val.start = REGNO (x);
2369 val.end = val.start + 1;
2373 val.end = val.start + hard_regno_nregs[val.start][GET_MODE (x)];
2375 else if (GET_CODE (x) == SUBREG)
2377 if (GET_CODE (SUBREG_REG (x)) != REG)
2378 /* This could be more precise, but it's good enough. */
2379 return decompose (SUBREG_REG (x));
2381 val.start = true_regnum (x);
2383 return decompose (SUBREG_REG (x));
2386 val.end = val.start + hard_regno_nregs[val.start][GET_MODE (x)];
2388 else if (CONSTANT_P (x)
2389 /* This hasn't been assigned yet, so it can't conflict yet. */
2390 || GET_CODE (x) == SCRATCH)
2397 /* Return 1 if altering Y will not modify the value of X.
2398 Y is also described by YDATA, which should be decompose (Y). */
2401 immune_p (rtx x, rtx y, struct decomposition ydata)
2403 struct decomposition xdata;
2406 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2410 if (GET_CODE (y) != MEM)
2412 /* If Y is memory and X is not, Y can't affect X. */
2413 if (GET_CODE (x) != MEM)
2416 xdata = decompose (x);
2418 if (! rtx_equal_p (xdata.base, ydata.base))
2420 /* If bases are distinct symbolic constants, there is no overlap. */
2421 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2423 /* Constants and stack slots never overlap. */
2424 if (CONSTANT_P (xdata.base)
2425 && (ydata.base == frame_pointer_rtx
2426 || ydata.base == hard_frame_pointer_rtx
2427 || ydata.base == stack_pointer_rtx))
2429 if (CONSTANT_P (ydata.base)
2430 && (xdata.base == frame_pointer_rtx
2431 || xdata.base == hard_frame_pointer_rtx
2432 || xdata.base == stack_pointer_rtx))
2434 /* If either base is variable, we don't know anything. */
2438 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2441 /* Similar, but calls decompose. */
2444 safe_from_earlyclobber (rtx op, rtx clobber)
2446 struct decomposition early_data;
2448 early_data = decompose (clobber);
2449 return immune_p (op, clobber, early_data);
2452 /* Main entry point of this file: search the body of INSN
2453 for values that need reloading and record them with push_reload.
2454 REPLACE nonzero means record also where the values occur
2455 so that subst_reloads can be used.
2457 IND_LEVELS says how many levels of indirection are supported by this
2458 machine; a value of zero means that a memory reference is not a valid
2461 LIVE_KNOWN says we have valid information about which hard
2462 regs are live at each point in the program; this is true when
2463 we are called from global_alloc but false when stupid register
2464 allocation has been done.
2466 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2467 which is nonnegative if the reg has been commandeered for reloading into.
2468 It is copied into STATIC_RELOAD_REG_P and referenced from there
2469 by various subroutines.
2471 Return TRUE if some operands need to be changed, because of swapping
2472 commutative operands, reg_equiv_address substitution, or whatever. */
2475 find_reloads (rtx insn, int replace, int ind_levels, int live_known,
2476 short *reload_reg_p)
2478 int insn_code_number;
2481 /* These start out as the constraints for the insn
2482 and they are chewed up as we consider alternatives. */
2483 char *constraints[MAX_RECOG_OPERANDS];
2484 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2486 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2487 char pref_or_nothing[MAX_RECOG_OPERANDS];
2488 /* Nonzero for a MEM operand whose entire address needs a reload. */
2489 int address_reloaded[MAX_RECOG_OPERANDS];
2490 /* Nonzero for an address operand that needs to be completely reloaded. */
2491 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2492 /* Value of enum reload_type to use for operand. */
2493 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2494 /* Value of enum reload_type to use within address of operand. */
2495 enum reload_type address_type[MAX_RECOG_OPERANDS];
2496 /* Save the usage of each operand. */
2497 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2498 int no_input_reloads = 0, no_output_reloads = 0;
2500 int this_alternative[MAX_RECOG_OPERANDS];
2501 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2502 char this_alternative_win[MAX_RECOG_OPERANDS];
2503 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2504 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2505 int this_alternative_matches[MAX_RECOG_OPERANDS];
2507 int goal_alternative[MAX_RECOG_OPERANDS];
2508 int this_alternative_number;
2509 int goal_alternative_number = 0;
2510 int operand_reloadnum[MAX_RECOG_OPERANDS];
2511 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2512 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2513 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2514 char goal_alternative_win[MAX_RECOG_OPERANDS];
2515 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2516 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2517 int goal_alternative_swapped;
2520 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2521 rtx substed_operand[MAX_RECOG_OPERANDS];
2522 rtx body = PATTERN (insn);
2523 rtx set = single_set (insn);
2524 int goal_earlyclobber = 0, this_earlyclobber;
2525 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2531 n_earlyclobbers = 0;
2532 replace_reloads = replace;
2533 hard_regs_live_known = live_known;
2534 static_reload_reg_p = reload_reg_p;
2536 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2537 neither are insns that SET cc0. Insns that use CC0 are not allowed
2538 to have any input reloads. */
2539 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2540 no_output_reloads = 1;
2543 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2544 no_input_reloads = 1;
2545 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2546 no_output_reloads = 1;
2549 #ifdef SECONDARY_MEMORY_NEEDED
2550 /* The eliminated forms of any secondary memory locations are per-insn, so
2551 clear them out here. */
2553 if (secondary_memlocs_elim_used)
2555 memset (secondary_memlocs_elim, 0,
2556 sizeof (secondary_memlocs_elim[0]) * secondary_memlocs_elim_used);
2557 secondary_memlocs_elim_used = 0;
2561 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2562 is cheap to move between them. If it is not, there may not be an insn
2563 to do the copy, so we may need a reload. */
2564 if (GET_CODE (body) == SET
2565 && GET_CODE (SET_DEST (body)) == REG
2566 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2567 && GET_CODE (SET_SRC (body)) == REG
2568 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2569 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2570 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2571 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2574 extract_insn (insn);
2576 noperands = reload_n_operands = recog_data.n_operands;
2577 n_alternatives = recog_data.n_alternatives;
2579 /* Just return "no reloads" if insn has no operands with constraints. */
2580 if (noperands == 0 || n_alternatives == 0)
2583 insn_code_number = INSN_CODE (insn);
2584 this_insn_is_asm = insn_code_number < 0;
2586 memcpy (operand_mode, recog_data.operand_mode,
2587 noperands * sizeof (enum machine_mode));
2588 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2592 /* If we will need to know, later, whether some pair of operands
2593 are the same, we must compare them now and save the result.
2594 Reloading the base and index registers will clobber them
2595 and afterward they will fail to match. */
2597 for (i = 0; i < noperands; i++)
2602 substed_operand[i] = recog_data.operand[i];
2605 modified[i] = RELOAD_READ;
2607 /* Scan this operand's constraint to see if it is an output operand,
2608 an in-out operand, is commutative, or should match another. */
2612 p += CONSTRAINT_LEN (c, p);
2614 modified[i] = RELOAD_WRITE;
2616 modified[i] = RELOAD_READ_WRITE;
2619 /* The last operand should not be marked commutative. */
2620 if (i == noperands - 1)
2623 /* We currently only support one commutative pair of
2624 operands. Some existing asm code currently uses more
2625 than one pair. Previously, that would usually work,
2626 but sometimes it would crash the compiler. We
2627 continue supporting that case as well as we can by
2628 silently ignoring all but the first pair. In the
2629 future we may handle it correctly. */
2630 if (commutative < 0)
2632 else if (!this_insn_is_asm)
2635 else if (ISDIGIT (c))
2637 c = strtoul (p - 1, &p, 10);
2639 operands_match[c][i]
2640 = operands_match_p (recog_data.operand[c],
2641 recog_data.operand[i]);
2643 /* An operand may not match itself. */
2647 /* If C can be commuted with C+1, and C might need to match I,
2648 then C+1 might also need to match I. */
2649 if (commutative >= 0)
2651 if (c == commutative || c == commutative + 1)
2653 int other = c + (c == commutative ? 1 : -1);
2654 operands_match[other][i]
2655 = operands_match_p (recog_data.operand[other],
2656 recog_data.operand[i]);
2658 if (i == commutative || i == commutative + 1)
2660 int other = i + (i == commutative ? 1 : -1);
2661 operands_match[c][other]
2662 = operands_match_p (recog_data.operand[c],
2663 recog_data.operand[other]);
2665 /* Note that C is supposed to be less than I.
2666 No need to consider altering both C and I because in
2667 that case we would alter one into the other. */
2673 /* Examine each operand that is a memory reference or memory address
2674 and reload parts of the addresses into index registers.
2675 Also here any references to pseudo regs that didn't get hard regs
2676 but are equivalent to constants get replaced in the insn itself
2677 with those constants. Nobody will ever see them again.
2679 Finally, set up the preferred classes of each operand. */
2681 for (i = 0; i < noperands; i++)
2683 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2685 address_reloaded[i] = 0;
2686 address_operand_reloaded[i] = 0;
2687 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2688 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2691 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2692 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2695 if (*constraints[i] == 0)
2696 /* Ignore things like match_operator operands. */
2698 else if (constraints[i][0] == 'p'
2699 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
2701 address_operand_reloaded[i]
2702 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2703 recog_data.operand[i],
2704 recog_data.operand_loc[i],
2705 i, operand_type[i], ind_levels, insn);
2707 /* If we now have a simple operand where we used to have a
2708 PLUS or MULT, re-recognize and try again. */
2709 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
2710 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2711 && (GET_CODE (recog_data.operand[i]) == MULT
2712 || GET_CODE (recog_data.operand[i]) == PLUS))
2714 INSN_CODE (insn) = -1;
2715 retval = find_reloads (insn, replace, ind_levels, live_known,
2720 recog_data.operand[i] = *recog_data.operand_loc[i];
2721 substed_operand[i] = recog_data.operand[i];
2723 /* Address operands are reloaded in their existing mode,
2724 no matter what is specified in the machine description. */
2725 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2727 else if (code == MEM)
2730 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2731 recog_data.operand_loc[i],
2732 XEXP (recog_data.operand[i], 0),
2733 &XEXP (recog_data.operand[i], 0),
2734 i, address_type[i], ind_levels, insn);
2735 recog_data.operand[i] = *recog_data.operand_loc[i];
2736 substed_operand[i] = recog_data.operand[i];
2738 else if (code == SUBREG)
2740 rtx reg = SUBREG_REG (recog_data.operand[i]);
2742 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2745 && &SET_DEST (set) == recog_data.operand_loc[i],
2747 &address_reloaded[i]);
2749 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2750 that didn't get a hard register, emit a USE with a REG_EQUAL
2751 note in front so that we might inherit a previous, possibly
2755 && GET_CODE (op) == MEM
2756 && GET_CODE (reg) == REG
2757 && (GET_MODE_SIZE (GET_MODE (reg))
2758 >= GET_MODE_SIZE (GET_MODE (op))))
2759 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2761 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2763 substed_operand[i] = recog_data.operand[i] = op;
2765 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2766 /* We can get a PLUS as an "operand" as a result of register
2767 elimination. See eliminate_regs and gen_reload. We handle
2768 a unary operator by reloading the operand. */
2769 substed_operand[i] = recog_data.operand[i]
2770 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2771 ind_levels, 0, insn,
2772 &address_reloaded[i]);
2773 else if (code == REG)
2775 /* This is equivalent to calling find_reloads_toplev.
2776 The code is duplicated for speed.
2777 When we find a pseudo always equivalent to a constant,
2778 we replace it by the constant. We must be sure, however,
2779 that we don't try to replace it in the insn in which it
2781 int regno = REGNO (recog_data.operand[i]);
2782 if (reg_equiv_constant[regno] != 0
2783 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2785 /* Record the existing mode so that the check if constants are
2786 allowed will work when operand_mode isn't specified. */
2788 if (operand_mode[i] == VOIDmode)
2789 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2791 substed_operand[i] = recog_data.operand[i]
2792 = reg_equiv_constant[regno];
2794 if (reg_equiv_memory_loc[regno] != 0
2795 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2796 /* We need not give a valid is_set_dest argument since the case
2797 of a constant equivalence was checked above. */
2798 substed_operand[i] = recog_data.operand[i]
2799 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2800 ind_levels, 0, insn,
2801 &address_reloaded[i]);
2803 /* If the operand is still a register (we didn't replace it with an
2804 equivalent), get the preferred class to reload it into. */
2805 code = GET_CODE (recog_data.operand[i]);
2807 = ((code == REG && REGNO (recog_data.operand[i])
2808 >= FIRST_PSEUDO_REGISTER)
2809 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2813 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2814 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2817 /* If this is simply a copy from operand 1 to operand 0, merge the
2818 preferred classes for the operands. */
2819 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2820 && recog_data.operand[1] == SET_SRC (set))
2822 preferred_class[0] = preferred_class[1]
2823 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2824 pref_or_nothing[0] |= pref_or_nothing[1];
2825 pref_or_nothing[1] |= pref_or_nothing[0];
2828 /* Now see what we need for pseudo-regs that didn't get hard regs
2829 or got the wrong kind of hard reg. For this, we must consider
2830 all the operands together against the register constraints. */
2832 best = MAX_RECOG_OPERANDS * 2 + 600;
2835 goal_alternative_swapped = 0;
2838 /* The constraints are made of several alternatives.
2839 Each operand's constraint looks like foo,bar,... with commas
2840 separating the alternatives. The first alternatives for all
2841 operands go together, the second alternatives go together, etc.
2843 First loop over alternatives. */
2845 for (this_alternative_number = 0;
2846 this_alternative_number < n_alternatives;
2847 this_alternative_number++)
2849 /* Loop over operands for one constraint alternative. */
2850 /* LOSERS counts those that don't fit this alternative
2851 and would require loading. */
2853 /* BAD is set to 1 if it some operand can't fit this alternative
2854 even after reloading. */
2856 /* REJECT is a count of how undesirable this alternative says it is
2857 if any reloading is required. If the alternative matches exactly
2858 then REJECT is ignored, but otherwise it gets this much
2859 counted against it in addition to the reloading needed. Each
2860 ? counts three times here since we want the disparaging caused by
2861 a bad register class to only count 1/3 as much. */
2864 this_earlyclobber = 0;
2866 for (i = 0; i < noperands; i++)
2868 char *p = constraints[i];
2873 /* 0 => this operand can be reloaded somehow for this alternative. */
2875 /* 0 => this operand can be reloaded if the alternative allows regs. */
2879 rtx operand = recog_data.operand[i];
2881 /* Nonzero means this is a MEM that must be reloaded into a reg
2882 regardless of what the constraint says. */
2883 int force_reload = 0;
2885 /* Nonzero if a constant forced into memory would be OK for this
2888 int earlyclobber = 0;
2890 /* If the predicate accepts a unary operator, it means that
2891 we need to reload the operand, but do not do this for
2892 match_operator and friends. */
2893 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2894 operand = XEXP (operand, 0);
2896 /* If the operand is a SUBREG, extract
2897 the REG or MEM (or maybe even a constant) within.
2898 (Constants can occur as a result of reg_equiv_constant.) */
2900 while (GET_CODE (operand) == SUBREG)
2902 /* Offset only matters when operand is a REG and
2903 it is a hard reg. This is because it is passed
2904 to reg_fits_class_p if it is a REG and all pseudos
2905 return 0 from that function. */
2906 if (GET_CODE (SUBREG_REG (operand)) == REG
2907 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2909 if (!subreg_offset_representable_p
2910 (REGNO (SUBREG_REG (operand)),
2911 GET_MODE (SUBREG_REG (operand)),
2912 SUBREG_BYTE (operand),
2913 GET_MODE (operand)))
2915 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2916 GET_MODE (SUBREG_REG (operand)),
2917 SUBREG_BYTE (operand),
2918 GET_MODE (operand));
2920 operand = SUBREG_REG (operand);
2921 /* Force reload if this is a constant or PLUS or if there may
2922 be a problem accessing OPERAND in the outer mode. */
2923 if (CONSTANT_P (operand)
2924 || GET_CODE (operand) == PLUS
2925 /* We must force a reload of paradoxical SUBREGs
2926 of a MEM because the alignment of the inner value
2927 may not be enough to do the outer reference. On
2928 big-endian machines, it may also reference outside
2931 On machines that extend byte operations and we have a
2932 SUBREG where both the inner and outer modes are no wider
2933 than a word and the inner mode is narrower, is integral,
2934 and gets extended when loaded from memory, combine.c has
2935 made assumptions about the behavior of the machine in such
2936 register access. If the data is, in fact, in memory we
2937 must always load using the size assumed to be in the
2938 register and let the insn do the different-sized
2941 This is doubly true if WORD_REGISTER_OPERATIONS. In
2942 this case eliminate_regs has left non-paradoxical
2943 subregs for push_reload to see. Make sure it does
2944 by forcing the reload.
2946 ??? When is it right at this stage to have a subreg
2947 of a mem that is _not_ to be handled specially? IMO
2948 those should have been reduced to just a mem. */
2949 || ((GET_CODE (operand) == MEM
2950 || (GET_CODE (operand)== REG
2951 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2952 #ifndef WORD_REGISTER_OPERATIONS
2953 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2954 < BIGGEST_ALIGNMENT)
2955 && (GET_MODE_SIZE (operand_mode[i])
2956 > GET_MODE_SIZE (GET_MODE (operand))))
2957 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2958 #ifdef LOAD_EXTEND_OP
2959 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2960 && (GET_MODE_SIZE (GET_MODE (operand))
2962 && (GET_MODE_SIZE (operand_mode[i])
2963 > GET_MODE_SIZE (GET_MODE (operand)))
2964 && INTEGRAL_MODE_P (GET_MODE (operand))
2965 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2974 this_alternative[i] = (int) NO_REGS;
2975 this_alternative_win[i] = 0;
2976 this_alternative_match_win[i] = 0;
2977 this_alternative_offmemok[i] = 0;
2978 this_alternative_earlyclobber[i] = 0;
2979 this_alternative_matches[i] = -1;
2981 /* An empty constraint or empty alternative
2982 allows anything which matched the pattern. */
2983 if (*p == 0 || *p == ',')
2986 /* Scan this alternative's specs for this operand;
2987 set WIN if the operand fits any letter in this alternative.
2988 Otherwise, clear BADOP if this operand could
2989 fit some letter after reloads,
2990 or set WINREG if this operand could fit after reloads
2991 provided the constraint allows some registers. */
2994 switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
3003 case '=': case '+': case '*':
3007 /* We only support one commutative marker, the first
3008 one. We already set commutative above. */
3020 /* Ignore rest of this alternative as far as
3021 reloading is concerned. */
3024 while (*p && *p != ',');
3028 case '0': case '1': case '2': case '3': case '4':
3029 case '5': case '6': case '7': case '8': case '9':
3030 m = strtoul (p, &end, 10);
3034 this_alternative_matches[i] = m;
3035 /* We are supposed to match a previous operand.
3036 If we do, we win if that one did.
3037 If we do not, count both of the operands as losers.
3038 (This is too conservative, since most of the time
3039 only a single reload insn will be needed to make
3040 the two operands win. As a result, this alternative
3041 may be rejected when it is actually desirable.) */
3042 if ((swapped && (m != commutative || i != commutative + 1))
3043 /* If we are matching as if two operands were swapped,
3044 also pretend that operands_match had been computed
3046 But if I is the second of those and C is the first,
3047 don't exchange them, because operands_match is valid
3048 only on one side of its diagonal. */
3050 [(m == commutative || m == commutative + 1)
3051 ? 2 * commutative + 1 - m : m]
3052 [(i == commutative || i == commutative + 1)
3053 ? 2 * commutative + 1 - i : i])
3054 : operands_match[m][i])
3056 /* If we are matching a non-offsettable address where an
3057 offsettable address was expected, then we must reject
3058 this combination, because we can't reload it. */
3059 if (this_alternative_offmemok[m]
3060 && GET_CODE (recog_data.operand[m]) == MEM
3061 && this_alternative[m] == (int) NO_REGS
3062 && ! this_alternative_win[m])
3065 did_match = this_alternative_win[m];
3069 /* Operands don't match. */
3071 /* Retroactively mark the operand we had to match
3072 as a loser, if it wasn't already. */
3073 if (this_alternative_win[m])
3075 this_alternative_win[m] = 0;
3076 if (this_alternative[m] == (int) NO_REGS)
3078 /* But count the pair only once in the total badness of
3079 this alternative, if the pair can be a dummy reload. */
3081 = find_dummy_reload (recog_data.operand[i],
3082 recog_data.operand[m],
3083 recog_data.operand_loc[i],
3084 recog_data.operand_loc[m],
3085 operand_mode[i], operand_mode[m],
3086 this_alternative[m], -1,
3087 this_alternative_earlyclobber[m]);
3092 /* This can be fixed with reloads if the operand
3093 we are supposed to match can be fixed with reloads. */
3095 this_alternative[i] = this_alternative[m];
3097 /* If we have to reload this operand and some previous
3098 operand also had to match the same thing as this
3099 operand, we don't know how to do that. So reject this
3101 if (! did_match || force_reload)
3102 for (j = 0; j < i; j++)
3103 if (this_alternative_matches[j]
3104 == this_alternative_matches[i])
3109 /* All necessary reloads for an address_operand
3110 were handled in find_reloads_address. */
3111 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3119 if (GET_CODE (operand) == MEM
3120 || (GET_CODE (operand) == REG
3121 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3122 && reg_renumber[REGNO (operand)] < 0))
3124 if (CONST_POOL_OK_P (operand))
3130 if (GET_CODE (operand) == MEM
3131 && ! address_reloaded[i]
3132 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3133 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3138 if (GET_CODE (operand) == MEM
3139 && ! address_reloaded[i]
3140 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3141 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3145 /* Memory operand whose address is not offsettable. */
3149 if (GET_CODE (operand) == MEM
3150 && ! (ind_levels ? offsettable_memref_p (operand)
3151 : offsettable_nonstrict_memref_p (operand))
3152 /* Certain mem addresses will become offsettable
3153 after they themselves are reloaded. This is important;
3154 we don't want our own handling of unoffsettables
3155 to override the handling of reg_equiv_address. */
3156 && !(GET_CODE (XEXP (operand, 0)) == REG
3158 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3162 /* Memory operand whose address is offsettable. */
3166 if ((GET_CODE (operand) == MEM
3167 /* If IND_LEVELS, find_reloads_address won't reload a
3168 pseudo that didn't get a hard reg, so we have to
3169 reject that case. */
3170 && ((ind_levels ? offsettable_memref_p (operand)
3171 : offsettable_nonstrict_memref_p (operand))
3172 /* A reloaded address is offsettable because it is now
3173 just a simple register indirect. */
3174 || address_reloaded[i]))
3175 || (GET_CODE (operand) == REG
3176 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3177 && reg_renumber[REGNO (operand)] < 0
3178 /* If reg_equiv_address is nonzero, we will be
3179 loading it into a register; hence it will be
3180 offsettable, but we cannot say that reg_equiv_mem
3181 is offsettable without checking. */
3182 && ((reg_equiv_mem[REGNO (operand)] != 0
3183 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3184 || (reg_equiv_address[REGNO (operand)] != 0))))
3186 if (CONST_POOL_OK_P (operand)
3187 || GET_CODE (operand) == MEM)
3194 /* Output operand that is stored before the need for the
3195 input operands (and their index registers) is over. */
3196 earlyclobber = 1, this_earlyclobber = 1;
3201 if (GET_CODE (operand) == CONST_DOUBLE
3202 || (GET_CODE (operand) == CONST_VECTOR
3203 && (GET_MODE_CLASS (GET_MODE (operand))
3204 == MODE_VECTOR_FLOAT)))
3210 if (GET_CODE (operand) == CONST_DOUBLE
3211 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand, c, p))
3216 if (GET_CODE (operand) == CONST_INT
3217 || (GET_CODE (operand) == CONST_DOUBLE
3218 && GET_MODE (operand) == VOIDmode))
3221 if (CONSTANT_P (operand)
3222 #ifdef LEGITIMATE_PIC_OPERAND_P
3223 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3230 if (GET_CODE (operand) == CONST_INT
3231 || (GET_CODE (operand) == CONST_DOUBLE
3232 && GET_MODE (operand) == VOIDmode))
3244 if (GET_CODE (operand) == CONST_INT
3245 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand), c, p))
3255 /* A PLUS is never a valid operand, but reload can make
3256 it from a register when eliminating registers. */
3257 && GET_CODE (operand) != PLUS
3258 /* A SCRATCH is not a valid operand. */
3259 && GET_CODE (operand) != SCRATCH
3260 #ifdef LEGITIMATE_PIC_OPERAND_P
3261 && (! CONSTANT_P (operand)
3263 || LEGITIMATE_PIC_OPERAND_P (operand))
3265 && (GENERAL_REGS == ALL_REGS
3266 || GET_CODE (operand) != REG
3267 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3268 && reg_renumber[REGNO (operand)] < 0)))
3270 /* Drop through into 'r' case. */
3274 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3278 if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
3280 #ifdef EXTRA_CONSTRAINT_STR
3281 if (EXTRA_MEMORY_CONSTRAINT (c, p))
3285 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3287 /* If the address was already reloaded,
3289 else if (GET_CODE (operand) == MEM
3290 && address_reloaded[i])
3292 /* Likewise if the address will be reloaded because
3293 reg_equiv_address is nonzero. For reg_equiv_mem
3294 we have to check. */
3295 else if (GET_CODE (operand) == REG
3296 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3297 && reg_renumber[REGNO (operand)] < 0
3298 && ((reg_equiv_mem[REGNO (operand)] != 0
3299 && EXTRA_CONSTRAINT_STR (reg_equiv_mem[REGNO (operand)], c, p))
3300 || (reg_equiv_address[REGNO (operand)] != 0)))
3303 /* If we didn't already win, we can reload
3304 constants via force_const_mem, and other
3305 MEMs by reloading the address like for 'o'. */
3306 if (CONST_POOL_OK_P (operand)
3307 || GET_CODE (operand) == MEM)
3313 if (EXTRA_ADDRESS_CONSTRAINT (c, p))
3315 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3318 /* If we didn't already win, we can reload
3319 the address into a base register. */
3320 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3325 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3332 = (int) (reg_class_subunion
3333 [this_alternative[i]]
3334 [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]);
3336 if (GET_MODE (operand) == BLKmode)
3339 if (GET_CODE (operand) == REG
3340 && reg_fits_class_p (operand, this_alternative[i],
3341 offset, GET_MODE (recog_data.operand[i])))
3345 while ((p += len), c);
3349 /* If this operand could be handled with a reg,
3350 and some reg is allowed, then this operand can be handled. */
3351 if (winreg && this_alternative[i] != (int) NO_REGS)
3354 /* Record which operands fit this alternative. */
3355 this_alternative_earlyclobber[i] = earlyclobber;
3356 if (win && ! force_reload)
3357 this_alternative_win[i] = 1;
3358 else if (did_match && ! force_reload)
3359 this_alternative_match_win[i] = 1;
3362 int const_to_mem = 0;
3364 this_alternative_offmemok[i] = offmemok;
3368 /* Alternative loses if it has no regs for a reg operand. */
3369 if (GET_CODE (operand) == REG
3370 && this_alternative[i] == (int) NO_REGS
3371 && this_alternative_matches[i] < 0)
3374 /* If this is a constant that is reloaded into the desired
3375 class by copying it to memory first, count that as another
3376 reload. This is consistent with other code and is
3377 required to avoid choosing another alternative when
3378 the constant is moved into memory by this function on
3379 an early reload pass. Note that the test here is
3380 precisely the same as in the code below that calls
3382 if (CONST_POOL_OK_P (operand)
3383 && ((PREFERRED_RELOAD_CLASS (operand,
3384 (enum reg_class) this_alternative[i])
3386 || no_input_reloads)
3387 && operand_mode[i] != VOIDmode)
3390 if (this_alternative[i] != (int) NO_REGS)
3394 /* If we can't reload this value at all, reject this
3395 alternative. Note that we could also lose due to
3396 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3399 if (! CONSTANT_P (operand)
3400 && (enum reg_class) this_alternative[i] != NO_REGS
3401 && (PREFERRED_RELOAD_CLASS (operand,
3402 (enum reg_class) this_alternative[i])
3406 /* Alternative loses if it requires a type of reload not
3407 permitted for this insn. We can always reload SCRATCH
3408 and objects with a REG_UNUSED note. */
3409 else if (GET_CODE (operand) != SCRATCH
3410 && modified[i] != RELOAD_READ && no_output_reloads
3411 && ! find_reg_note (insn, REG_UNUSED, operand))
3413 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3417 /* We prefer to reload pseudos over reloading other things,
3418 since such reloads may be able to be eliminated later.
3419 If we are reloading a SCRATCH, we won't be generating any
3420 insns, just using a register, so it is also preferred.
3421 So bump REJECT in other cases. Don't do this in the
3422 case where we are forcing a constant into memory and
3423 it will then win since we don't want to have a different
3424 alternative match then. */
3425 if (! (GET_CODE (operand) == REG
3426 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3427 && GET_CODE (operand) != SCRATCH
3428 && ! (const_to_mem && constmemok))
3431 /* Input reloads can be inherited more often than output
3432 reloads can be removed, so penalize output reloads. */
3433 if (operand_type[i] != RELOAD_FOR_INPUT
3434 && GET_CODE (operand) != SCRATCH)
3438 /* If this operand is a pseudo register that didn't get a hard
3439 reg and this alternative accepts some register, see if the
3440 class that we want is a subset of the preferred class for this
3441 register. If not, but it intersects that class, use the
3442 preferred class instead. If it does not intersect the preferred
3443 class, show that usage of this alternative should be discouraged;
3444 it will be discouraged more still if the register is `preferred
3445 or nothing'. We do this because it increases the chance of
3446 reusing our spill register in a later insn and avoiding a pair
3447 of memory stores and loads.
3449 Don't bother with this if this alternative will accept this
3452 Don't do this for a multiword operand, since it is only a
3453 small win and has the risk of requiring more spill registers,
3454 which could cause a large loss.
3456 Don't do this if the preferred class has only one register
3457 because we might otherwise exhaust the class. */
3459 if (! win && ! did_match
3460 && this_alternative[i] != (int) NO_REGS
3461 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3462 && reg_class_size[(int) preferred_class[i]] > 1)
3464 if (! reg_class_subset_p (this_alternative[i],
3465 preferred_class[i]))
3467 /* Since we don't have a way of forming the intersection,
3468 we just do something special if the preferred class
3469 is a subset of the class we have; that's the most
3470 common case anyway. */
3471 if (reg_class_subset_p (preferred_class[i],
3472 this_alternative[i]))
3473 this_alternative[i] = (int) preferred_class[i];
3475 reject += (2 + 2 * pref_or_nothing[i]);
3480 /* Now see if any output operands that are marked "earlyclobber"
3481 in this alternative conflict with any input operands
3482 or any memory addresses. */
3484 for (i = 0; i < noperands; i++)
3485 if (this_alternative_earlyclobber[i]
3486 && (this_alternative_win[i] || this_alternative_match_win[i]))
3488 struct decomposition early_data;
3490 early_data = decompose (recog_data.operand[i]);
3492 if (modified[i] == RELOAD_READ)
3495 if (this_alternative[i] == NO_REGS)
3497 this_alternative_earlyclobber[i] = 0;
3498 if (this_insn_is_asm)
3499 error_for_asm (this_insn,
3500 "`&' constraint used with no register class");
3505 for (j = 0; j < noperands; j++)
3506 /* Is this an input operand or a memory ref? */
3507 if ((GET_CODE (recog_data.operand[j]) == MEM
3508 || modified[j] != RELOAD_WRITE)
3510 /* Ignore things like match_operator operands. */
3511 && *recog_data.constraints[j] != 0
3512 /* Don't count an input operand that is constrained to match
3513 the early clobber operand. */
3514 && ! (this_alternative_matches[j] == i
3515 && rtx_equal_p (recog_data.operand[i],
3516 recog_data.operand[j]))
3517 /* Is it altered by storing the earlyclobber operand? */
3518 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3521 /* If the output is in a single-reg class,
3522 it's costly to reload it, so reload the input instead. */
3523 if (reg_class_size[this_alternative[i]] == 1
3524 && (GET_CODE (recog_data.operand[j]) == REG
3525 || GET_CODE (recog_data.operand[j]) == SUBREG))
3528 this_alternative_win[j] = 0;
3529 this_alternative_match_win[j] = 0;
3534 /* If an earlyclobber operand conflicts with something,
3535 it must be reloaded, so request this and count the cost. */
3539 this_alternative_win[i] = 0;
3540 this_alternative_match_win[j] = 0;
3541 for (j = 0; j < noperands; j++)
3542 if (this_alternative_matches[j] == i
3543 && this_alternative_match_win[j])
3545 this_alternative_win[j] = 0;
3546 this_alternative_match_win[j] = 0;
3552 /* If one alternative accepts all the operands, no reload required,
3553 choose that alternative; don't consider the remaining ones. */
3556 /* Unswap these so that they are never swapped at `finish'. */
3557 if (commutative >= 0)
3559 recog_data.operand[commutative] = substed_operand[commutative];
3560 recog_data.operand[commutative + 1]
3561 = substed_operand[commutative + 1];
3563 for (i = 0; i < noperands; i++)
3565 goal_alternative_win[i] = this_alternative_win[i];
3566 goal_alternative_match_win[i] = this_alternative_match_win[i];
3567 goal_alternative[i] = this_alternative[i];
3568 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3569 goal_alternative_matches[i] = this_alternative_matches[i];
3570 goal_alternative_earlyclobber[i]
3571 = this_alternative_earlyclobber[i];
3573 goal_alternative_number = this_alternative_number;
3574 goal_alternative_swapped = swapped;
3575 goal_earlyclobber = this_earlyclobber;
3579 /* REJECT, set by the ! and ? constraint characters and when a register
3580 would be reloaded into a non-preferred class, discourages the use of
3581 this alternative for a reload goal. REJECT is incremented by six
3582 for each ? and two for each non-preferred class. */
3583 losers = losers * 6 + reject;
3585 /* If this alternative can be made to work by reloading,
3586 and it needs less reloading than the others checked so far,
3587 record it as the chosen goal for reloading. */
3588 if (! bad && best > losers)
3590 for (i = 0; i < noperands; i++)
3592 goal_alternative[i] = this_alternative[i];
3593 goal_alternative_win[i] = this_alternative_win[i];
3594 goal_alternative_match_win[i] = this_alternative_match_win[i];
3595 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3596 goal_alternative_matches[i] = this_alternative_matches[i];
3597 goal_alternative_earlyclobber[i]
3598 = this_alternative_earlyclobber[i];
3600 goal_alternative_swapped = swapped;
3602 goal_alternative_number = this_alternative_number;
3603 goal_earlyclobber = this_earlyclobber;
3607 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3608 then we need to try each alternative twice,
3609 the second time matching those two operands
3610 as if we had exchanged them.
3611 To do this, really exchange them in operands.
3613 If we have just tried the alternatives the second time,
3614 return operands to normal and drop through. */
3616 if (commutative >= 0)
3621 enum reg_class tclass;
3624 recog_data.operand[commutative] = substed_operand[commutative + 1];
3625 recog_data.operand[commutative + 1] = substed_operand[commutative];
3626 /* Swap the duplicates too. */
3627 for (i = 0; i < recog_data.n_dups; i++)
3628 if (recog_data.dup_num[i] == commutative
3629 || recog_data.dup_num[i] == commutative + 1)
3630 *recog_data.dup_loc[i]
3631 = recog_data.operand[(int) recog_data.dup_num[i]];
3633 tclass = preferred_class[commutative];
3634 preferred_class[commutative] = preferred_class[commutative + 1];
3635 preferred_class[commutative + 1] = tclass;
3637 t = pref_or_nothing[commutative];
3638 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3639 pref_or_nothing[commutative + 1] = t;
3641 memcpy (constraints, recog_data.constraints,
3642 noperands * sizeof (char *));
3647 recog_data.operand[commutative] = substed_operand[commutative];
3648 recog_data.operand[commutative + 1]
3649 = substed_operand[commutative + 1];
3650 /* Unswap the duplicates too. */
3651 for (i = 0; i < recog_data.n_dups; i++)
3652 if (recog_data.dup_num[i] == commutative
3653 || recog_data.dup_num[i] == commutative + 1)
3654 *recog_data.dup_loc[i]
3655 = recog_data.operand[(int) recog_data.dup_num[i]];
3659 /* The operands don't meet the constraints.
3660 goal_alternative describes the alternative
3661 that we could reach by reloading the fewest operands.
3662 Reload so as to fit it. */
3664 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3666 /* No alternative works with reloads?? */
3667 if (insn_code_number >= 0)
3668 fatal_insn ("unable to generate reloads for:", insn);
3669 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3670 /* Avoid further trouble with this insn. */
3671 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3676 /* Jump to `finish' from above if all operands are valid already.
3677 In that case, goal_alternative_win is all 1. */
3680 /* Right now, for any pair of operands I and J that are required to match,
3682 goal_alternative_matches[J] is I.
3683 Set up goal_alternative_matched as the inverse function:
3684 goal_alternative_matched[I] = J. */
3686 for (i = 0; i < noperands; i++)
3687 goal_alternative_matched[i] = -1;
3689 for (i = 0; i < noperands; i++)
3690 if (! goal_alternative_win[i]
3691 && goal_alternative_matches[i] >= 0)
3692 goal_alternative_matched[goal_alternative_matches[i]] = i;
3694 for (i = 0; i < noperands; i++)
3695 goal_alternative_win[i] |= goal_alternative_match_win[i];
3697 /* If the best alternative is with operands 1 and 2 swapped,
3698 consider them swapped before reporting the reloads. Update the
3699 operand numbers of any reloads already pushed. */
3701 if (goal_alternative_swapped)
3705 tem = substed_operand[commutative];
3706 substed_operand[commutative] = substed_operand[commutative + 1];
3707 substed_operand[commutative + 1] = tem;
3708 tem = recog_data.operand[commutative];
3709 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3710 recog_data.operand[commutative + 1] = tem;
3711 tem = *recog_data.operand_loc[commutative];
3712 *recog_data.operand_loc[commutative]
3713 = *recog_data.operand_loc[commutative + 1];
3714 *recog_data.operand_loc[commutative + 1] = tem;
3716 for (i = 0; i < n_reloads; i++)
3718 if (rld[i].opnum == commutative)
3719 rld[i].opnum = commutative + 1;
3720 else if (rld[i].opnum == commutative + 1)
3721 rld[i].opnum = commutative;
3725 for (i = 0; i < noperands; i++)
3727 operand_reloadnum[i] = -1;
3729 /* If this is an earlyclobber operand, we need to widen the scope.
3730 The reload must remain valid from the start of the insn being
3731 reloaded until after the operand is stored into its destination.
3732 We approximate this with RELOAD_OTHER even though we know that we
3733 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3735 One special case that is worth checking is when we have an
3736 output that is earlyclobber but isn't used past the insn (typically
3737 a SCRATCH). In this case, we only need have the reload live
3738 through the insn itself, but not for any of our input or output
3740 But we must not accidentally narrow the scope of an existing
3741 RELOAD_OTHER reload - leave these alone.
3743 In any case, anything needed to address this operand can remain
3744 however they were previously categorized. */
3746 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3748 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3749 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3752 /* Any constants that aren't allowed and can't be reloaded
3753 into registers are here changed into memory references. */
3754 for (i = 0; i < noperands; i++)
3755 if (! goal_alternative_win[i]
3756 && CONST_POOL_OK_P (recog_data.operand[i])
3757 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3758 (enum reg_class) goal_alternative[i])
3760 || no_input_reloads)
3761 && operand_mode[i] != VOIDmode)
3763 substed_operand[i] = recog_data.operand[i]
3764 = find_reloads_toplev (force_const_mem (operand_mode[i],
3765 recog_data.operand[i]),
3766 i, address_type[i], ind_levels, 0, insn,
3768 if (alternative_allows_memconst (recog_data.constraints[i],
3769 goal_alternative_number))
3770 goal_alternative_win[i] = 1;
3773 /* Record the values of the earlyclobber operands for the caller. */
3774 if (goal_earlyclobber)
3775 for (i = 0; i < noperands; i++)
3776 if (goal_alternative_earlyclobber[i])
3777 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3779 /* Now record reloads for all the operands that need them. */
3780 for (i = 0; i < noperands; i++)
3781 if (! goal_alternative_win[i])
3783 /* Operands that match previous ones have already been handled. */
3784 if (goal_alternative_matches[i] >= 0)
3786 /* Handle an operand with a nonoffsettable address
3787 appearing where an offsettable address will do
3788 by reloading the address into a base register.
3790 ??? We can also do this when the operand is a register and
3791 reg_equiv_mem is not offsettable, but this is a bit tricky,
3792 so we don't bother with it. It may not be worth doing. */
3793 else if (goal_alternative_matched[i] == -1
3794 && goal_alternative_offmemok[i]
3795 && GET_CODE (recog_data.operand[i]) == MEM)
3797 operand_reloadnum[i]
3798 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3799 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3800 MODE_BASE_REG_CLASS (VOIDmode),
3801 GET_MODE (XEXP (recog_data.operand[i], 0)),
3802 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3803 rld[operand_reloadnum[i]].inc
3804 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3806 /* If this operand is an output, we will have made any
3807 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3808 now we are treating part of the operand as an input, so
3809 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3811 if (modified[i] == RELOAD_WRITE)
3813 for (j = 0; j < n_reloads; j++)
3815 if (rld[j].opnum == i)
3817 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3818 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3819 else if (rld[j].when_needed
3820 == RELOAD_FOR_OUTADDR_ADDRESS)
3821 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3826 else if (goal_alternative_matched[i] == -1)
3828 operand_reloadnum[i]
3829 = push_reload ((modified[i] != RELOAD_WRITE
3830 ? recog_data.operand[i] : 0),
3831 (modified[i] != RELOAD_READ
3832 ? recog_data.operand[i] : 0),
3833 (modified[i] != RELOAD_WRITE
3834 ? recog_data.operand_loc[i] : 0),
3835 (modified[i] != RELOAD_READ
3836 ? recog_data.operand_loc[i] : 0),
3837 (enum reg_class) goal_alternative[i],
3838 (modified[i] == RELOAD_WRITE
3839 ? VOIDmode : operand_mode[i]),
3840 (modified[i] == RELOAD_READ
3841 ? VOIDmode : operand_mode[i]),
3842 (insn_code_number < 0 ? 0
3843 : insn_data[insn_code_number].operand[i].strict_low),
3844 0, i, operand_type[i]);
3846 /* In a matching pair of operands, one must be input only
3847 and the other must be output only.
3848 Pass the input operand as IN and the other as OUT. */
3849 else if (modified[i] == RELOAD_READ
3850 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3852 operand_reloadnum[i]
3853 = push_reload (recog_data.operand[i],
3854 recog_data.operand[goal_alternative_matched[i]],
3855 recog_data.operand_loc[i],
3856 recog_data.operand_loc[goal_alternative_matched[i]],
3857 (enum reg_class) goal_alternative[i],
3859 operand_mode[goal_alternative_matched[i]],
3860 0, 0, i, RELOAD_OTHER);
3861 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3863 else if (modified[i] == RELOAD_WRITE
3864 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3866 operand_reloadnum[goal_alternative_matched[i]]
3867 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3868 recog_data.operand[i],
3869 recog_data.operand_loc[goal_alternative_matched[i]],
3870 recog_data.operand_loc[i],
3871 (enum reg_class) goal_alternative[i],
3872 operand_mode[goal_alternative_matched[i]],
3874 0, 0, i, RELOAD_OTHER);
3875 operand_reloadnum[i] = output_reloadnum;
3877 else if (insn_code_number >= 0)
3881 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3882 /* Avoid further trouble with this insn. */
3883 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3888 else if (goal_alternative_matched[i] < 0
3889 && goal_alternative_matches[i] < 0
3890 && !address_operand_reloaded[i]
3893 /* For each non-matching operand that's a MEM or a pseudo-register
3894 that didn't get a hard register, make an optional reload.
3895 This may get done even if the insn needs no reloads otherwise. */
3897 rtx operand = recog_data.operand[i];
3899 while (GET_CODE (operand) == SUBREG)
3900 operand = SUBREG_REG (operand);
3901 if ((GET_CODE (operand) == MEM
3902 || (GET_CODE (operand) == REG
3903 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3904 /* If this is only for an output, the optional reload would not
3905 actually cause us to use a register now, just note that
3906 something is stored here. */
3907 && ((enum reg_class) goal_alternative[i] != NO_REGS
3908 || modified[i] == RELOAD_WRITE)
3909 && ! no_input_reloads
3910 /* An optional output reload might allow to delete INSN later.
3911 We mustn't make in-out reloads on insns that are not permitted
3913 If this is an asm, we can't delete it; we must not even call
3914 push_reload for an optional output reload in this case,
3915 because we can't be sure that the constraint allows a register,
3916 and push_reload verifies the constraints for asms. */
3917 && (modified[i] == RELOAD_READ
3918 || (! no_output_reloads && ! this_insn_is_asm)))
3919 operand_reloadnum[i]
3920 = push_reload ((modified[i] != RELOAD_WRITE
3921 ? recog_data.operand[i] : 0),
3922 (modified[i] != RELOAD_READ
3923 ? recog_data.operand[i] : 0),
3924 (modified[i] != RELOAD_WRITE
3925 ? recog_data.operand_loc[i] : 0),
3926 (modified[i] != RELOAD_READ
3927 ? recog_data.operand_loc[i] : 0),
3928 (enum reg_class) goal_alternative[i],
3929 (modified[i] == RELOAD_WRITE
3930 ? VOIDmode : operand_mode[i]),
3931 (modified[i] == RELOAD_READ
3932 ? VOIDmode : operand_mode[i]),
3933 (insn_code_number < 0 ? 0
3934 : insn_data[insn_code_number].operand[i].strict_low),
3935 1, i, operand_type[i]);
3936 /* If a memory reference remains (either as a MEM or a pseudo that
3937 did not get a hard register), yet we can't make an optional
3938 reload, check if this is actually a pseudo register reference;
3939 we then need to emit a USE and/or a CLOBBER so that reload
3940 inheritance will do the right thing. */
3942 && (GET_CODE (operand) == MEM
3943 || (GET_CODE (operand) == REG
3944 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3945 && reg_renumber [REGNO (operand)] < 0)))
3947 operand = *recog_data.operand_loc[i];
3949 while (GET_CODE (operand) == SUBREG)
3950 operand = SUBREG_REG (operand);
3951 if (GET_CODE (operand) == REG)
3953 if (modified[i] != RELOAD_WRITE)
3954 /* We mark the USE with QImode so that we recognize
3955 it as one that can be safely deleted at the end
3957 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
3959 if (modified[i] != RELOAD_READ)
3960 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3964 else if (goal_alternative_matches[i] >= 0
3965 && goal_alternative_win[goal_alternative_matches[i]]
3966 && modified[i] == RELOAD_READ
3967 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3968 && ! no_input_reloads && ! no_output_reloads
3971 /* Similarly, make an optional reload for a pair of matching
3972 objects that are in MEM or a pseudo that didn't get a hard reg. */
3974 rtx operand = recog_data.operand[i];
3976 while (GET_CODE (operand) == SUBREG)
3977 operand = SUBREG_REG (operand);
3978 if ((GET_CODE (operand) == MEM
3979 || (GET_CODE (operand) == REG
3980 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3981 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3983 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3984 = push_reload (recog_data.operand[goal_alternative_matches[i]],
3985 recog_data.operand[i],
3986 recog_data.operand_loc[goal_alternative_matches[i]],
3987 recog_data.operand_loc[i],
3988 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3989 operand_mode[goal_alternative_matches[i]],
3991 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3994 /* Perform whatever substitutions on the operands we are supposed
3995 to make due to commutativity or replacement of registers
3996 with equivalent constants or memory slots. */
3998 for (i = 0; i < noperands; i++)
4000 /* We only do this on the last pass through reload, because it is
4001 possible for some data (like reg_equiv_address) to be changed during
4002 later passes. Moreover, we loose the opportunity to get a useful
4003 reload_{in,out}_reg when we do these replacements. */
4007 rtx substitution = substed_operand[i];
4009 *recog_data.operand_loc[i] = substitution;
4011 /* If we're replacing an operand with a LABEL_REF, we need
4012 to make sure that there's a REG_LABEL note attached to
4013 this instruction. */
4014 if (GET_CODE (insn) != JUMP_INSN
4015 && GET_CODE (substitution) == LABEL_REF
4016 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
4017 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
4018 XEXP (substitution, 0),
4022 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
4025 /* If this insn pattern contains any MATCH_DUP's, make sure that
4026 they will be substituted if the operands they match are substituted.
4027 Also do now any substitutions we already did on the operands.
4029 Don't do this if we aren't making replacements because we might be
4030 propagating things allocated by frame pointer elimination into places
4031 it doesn't expect. */
4033 if (insn_code_number >= 0 && replace)
4034 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4036 int opno = recog_data.dup_num[i];
4037 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4038 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4042 /* This loses because reloading of prior insns can invalidate the equivalence
4043 (or at least find_equiv_reg isn't smart enough to find it any more),
4044 causing this insn to need more reload regs than it needed before.
4045 It may be too late to make the reload regs available.
4046 Now this optimization is done safely in choose_reload_regs. */
4048 /* For each reload of a reg into some other class of reg,
4049 search for an existing equivalent reg (same value now) in the right class.
4050 We can use it as long as we don't need to change its contents. */
4051 for (i = 0; i < n_reloads; i++)
4052 if (rld[i].reg_rtx == 0
4054 && GET_CODE (rld[i].in) == REG
4058 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
4059 static_reload_reg_p, 0, rld[i].inmode);
4060 /* Prevent generation of insn to load the value
4061 because the one we found already has the value. */
4063 rld[i].in = rld[i].reg_rtx;
4067 /* Perhaps an output reload can be combined with another
4068 to reduce needs by one. */
4069 if (!goal_earlyclobber)
4072 /* If we have a pair of reloads for parts of an address, they are reloading
4073 the same object, the operands themselves were not reloaded, and they
4074 are for two operands that are supposed to match, merge the reloads and
4075 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4077 for (i = 0; i < n_reloads; i++)
4081 for (j = i + 1; j < n_reloads; j++)
4082 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4083 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4084 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4085 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4086 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4087 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4088 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4089 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4090 && rtx_equal_p (rld[i].in, rld[j].in)
4091 && (operand_reloadnum[rld[i].opnum] < 0
4092 || rld[operand_reloadnum[rld[i].opnum]].optional)
4093 && (operand_reloadnum[rld[j].opnum] < 0
4094 || rld[operand_reloadnum[rld[j].opnum]].optional)
4095 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4096 || (goal_alternative_matches[rld[j].opnum]
4099 for (k = 0; k < n_replacements; k++)
4100 if (replacements[k].what == j)
4101 replacements[k].what = i;
4103 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4104 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4105 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4107 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4112 /* Scan all the reloads and update their type.
4113 If a reload is for the address of an operand and we didn't reload
4114 that operand, change the type. Similarly, change the operand number
4115 of a reload when two operands match. If a reload is optional, treat it
4116 as though the operand isn't reloaded.
4118 ??? This latter case is somewhat odd because if we do the optional
4119 reload, it means the object is hanging around. Thus we need only
4120 do the address reload if the optional reload was NOT done.
4122 Change secondary reloads to be the address type of their operand, not
4125 If an operand's reload is now RELOAD_OTHER, change any
4126 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4127 RELOAD_FOR_OTHER_ADDRESS. */
4129 for (i = 0; i < n_reloads; i++)
4131 if (rld[i].secondary_p
4132 && rld[i].when_needed == operand_type[rld[i].opnum])
4133 rld[i].when_needed = address_type[rld[i].opnum];
4135 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4136 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4137 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4138 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4139 && (operand_reloadnum[rld[i].opnum] < 0
4140 || rld[operand_reloadnum[rld[i].opnum]].optional))
4142 /* If we have a secondary reload to go along with this reload,
4143 change its type to RELOAD_FOR_OPADDR_ADDR. */
4145 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4146 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4147 && rld[i].secondary_in_reload != -1)
4149 int secondary_in_reload = rld[i].secondary_in_reload;
4151 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4153 /* If there's a tertiary reload we have to change it also. */
4154 if (secondary_in_reload > 0
4155 && rld[secondary_in_reload].secondary_in_reload != -1)
4156 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4157 = RELOAD_FOR_OPADDR_ADDR;
4160 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4161 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4162 && rld[i].secondary_out_reload != -1)
4164 int secondary_out_reload = rld[i].secondary_out_reload;
4166 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4168 /* If there's a tertiary reload we have to change it also. */
4169 if (secondary_out_reload
4170 && rld[secondary_out_reload].secondary_out_reload != -1)
4171 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4172 = RELOAD_FOR_OPADDR_ADDR;
4175 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4176 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4177 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4179 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4182 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4183 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4184 && operand_reloadnum[rld[i].opnum] >= 0
4185 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4187 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4189 if (goal_alternative_matches[rld[i].opnum] >= 0)
4190 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4193 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4194 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4195 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4197 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4198 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4199 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4200 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4201 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4202 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4203 This is complicated by the fact that a single operand can have more
4204 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4205 choose_reload_regs without affecting code quality, and cases that
4206 actually fail are extremely rare, so it turns out to be better to fix
4207 the problem here by not generating cases that choose_reload_regs will
4209 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4210 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4212 We can reduce the register pressure by exploiting that a
4213 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4214 does not conflict with any of them, if it is only used for the first of
4215 the RELOAD_FOR_X_ADDRESS reloads. */
4217 int first_op_addr_num = -2;
4218 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4219 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4220 int need_change = 0;
4221 /* We use last_op_addr_reload and the contents of the above arrays
4222 first as flags - -2 means no instance encountered, -1 means exactly
4223 one instance encountered.
4224 If more than one instance has been encountered, we store the reload
4225 number of the first reload of the kind in question; reload numbers
4226 are known to be non-negative. */
4227 for (i = 0; i < noperands; i++)
4228 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4229 for (i = n_reloads - 1; i >= 0; i--)
4231 switch (rld[i].when_needed)
4233 case RELOAD_FOR_OPERAND_ADDRESS:
4234 if (++first_op_addr_num >= 0)
4236 first_op_addr_num = i;
4240 case RELOAD_FOR_INPUT_ADDRESS:
4241 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4243 first_inpaddr_num[rld[i].opnum] = i;
4247 case RELOAD_FOR_OUTPUT_ADDRESS:
4248 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4250 first_outpaddr_num[rld[i].opnum] = i;
4261 for (i = 0; i < n_reloads; i++)
4264 enum reload_type type;
4266 switch (rld[i].when_needed)
4268 case RELOAD_FOR_OPADDR_ADDR:
4269 first_num = first_op_addr_num;
4270 type = RELOAD_FOR_OPERAND_ADDRESS;
4272 case RELOAD_FOR_INPADDR_ADDRESS:
4273 first_num = first_inpaddr_num[rld[i].opnum];
4274 type = RELOAD_FOR_INPUT_ADDRESS;
4276 case RELOAD_FOR_OUTADDR_ADDRESS:
4277 first_num = first_outpaddr_num[rld[i].opnum];
4278 type = RELOAD_FOR_OUTPUT_ADDRESS;
4285 else if (i > first_num)
4286 rld[i].when_needed = type;
4289 /* Check if the only TYPE reload that uses reload I is
4290 reload FIRST_NUM. */
4291 for (j = n_reloads - 1; j > first_num; j--)
4293 if (rld[j].when_needed == type
4294 && (rld[i].secondary_p
4295 ? rld[j].secondary_in_reload == i
4296 : reg_mentioned_p (rld[i].in, rld[j].in)))
4298 rld[i].when_needed = type;
4307 /* See if we have any reloads that are now allowed to be merged
4308 because we've changed when the reload is needed to
4309 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4310 check for the most common cases. */
4312 for (i = 0; i < n_reloads; i++)
4313 if (rld[i].in != 0 && rld[i].out == 0
4314 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4315 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4316 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4317 for (j = 0; j < n_reloads; j++)
4318 if (i != j && rld[j].in != 0 && rld[j].out == 0
4319 && rld[j].when_needed == rld[i].when_needed
4320 && MATCHES (rld[i].in, rld[j].in)
4321 && rld[i].class == rld[j].class
4322 && !rld[i].nocombine && !rld[j].nocombine
4323 && rld[i].reg_rtx == rld[j].reg_rtx)
4325 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4326 transfer_replacements (i, j);
4331 /* If we made any reloads for addresses, see if they violate a
4332 "no input reloads" requirement for this insn. But loads that we
4333 do after the insn (such as for output addresses) are fine. */
4334 if (no_input_reloads)
4335 for (i = 0; i < n_reloads; i++)
4337 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
4338 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS)
4342 /* Compute reload_mode and reload_nregs. */
4343 for (i = 0; i < n_reloads; i++)
4346 = (rld[i].inmode == VOIDmode
4347 || (GET_MODE_SIZE (rld[i].outmode)
4348 > GET_MODE_SIZE (rld[i].inmode)))
4349 ? rld[i].outmode : rld[i].inmode;
4351 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4354 /* Special case a simple move with an input reload and a
4355 destination of a hard reg, if the hard reg is ok, use it. */
4356 for (i = 0; i < n_reloads; i++)
4357 if (rld[i].when_needed == RELOAD_FOR_INPUT
4358 && GET_CODE (PATTERN (insn)) == SET
4359 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
4360 && SET_SRC (PATTERN (insn)) == rld[i].in)
4362 rtx dest = SET_DEST (PATTERN (insn));
4363 unsigned int regno = REGNO (dest);
4365 if (regno < FIRST_PSEUDO_REGISTER
4366 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
4367 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4369 int nr = hard_regno_nregs[regno][rld[i].mode];
4372 for (nri = 1; nri < nr; nri ++)
4373 if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno + nri))
4377 rld[i].reg_rtx = dest;
4384 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4385 accepts a memory operand with constant address. */
4388 alternative_allows_memconst (const char *constraint, int altnum)
4391 /* Skip alternatives before the one requested. */
4394 while (*constraint++ != ',');
4397 /* Scan the requested alternative for 'm' or 'o'.
4398 If one of them is present, this alternative accepts memory constants. */
4399 for (; (c = *constraint) && c != ',' && c != '#';
4400 constraint += CONSTRAINT_LEN (c, constraint))
4401 if (c == 'm' || c == 'o' || EXTRA_MEMORY_CONSTRAINT (c, constraint))
4406 /* Scan X for memory references and scan the addresses for reloading.
4407 Also checks for references to "constant" regs that we want to eliminate
4408 and replaces them with the values they stand for.
4409 We may alter X destructively if it contains a reference to such.
4410 If X is just a constant reg, we return the equivalent value
4413 IND_LEVELS says how many levels of indirect addressing this machine
4416 OPNUM and TYPE identify the purpose of the reload.
4418 IS_SET_DEST is true if X is the destination of a SET, which is not
4419 appropriate to be replaced by a constant.
4421 INSN, if nonzero, is the insn in which we do the reload. It is used
4422 to determine if we may generate output reloads, and where to put USEs
4423 for pseudos that we have to replace with stack slots.
4425 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4426 result of find_reloads_address. */
4429 find_reloads_toplev (rtx x, int opnum, enum reload_type type,
4430 int ind_levels, int is_set_dest, rtx insn,
4431 int *address_reloaded)
4433 RTX_CODE code = GET_CODE (x);
4435 const char *fmt = GET_RTX_FORMAT (code);
4441 /* This code is duplicated for speed in find_reloads. */
4442 int regno = REGNO (x);
4443 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4444 x = reg_equiv_constant[regno];
4446 /* This creates (subreg (mem...)) which would cause an unnecessary
4447 reload of the mem. */
4448 else if (reg_equiv_mem[regno] != 0)
4449 x = reg_equiv_mem[regno];
4451 else if (reg_equiv_memory_loc[regno]
4452 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4454 rtx mem = make_memloc (x, regno);
4455 if (reg_equiv_address[regno]
4456 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4458 /* If this is not a toplevel operand, find_reloads doesn't see
4459 this substitution. We have to emit a USE of the pseudo so
4460 that delete_output_reload can see it. */
4461 if (replace_reloads && recog_data.operand[opnum] != x)
4462 /* We mark the USE with QImode so that we recognize it
4463 as one that can be safely deleted at the end of
4465 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4468 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4469 opnum, type, ind_levels, insn);
4470 if (address_reloaded)
4471 *address_reloaded = i;
4480 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4481 opnum, type, ind_levels, insn);
4482 if (address_reloaded)
4483 *address_reloaded = i;
4488 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4490 /* Check for SUBREG containing a REG that's equivalent to a constant.
4491 If the constant has a known value, truncate it right now.
4492 Similarly if we are extracting a single-word of a multi-word
4493 constant. If the constant is symbolic, allow it to be substituted
4494 normally. push_reload will strip the subreg later. If the
4495 constant is VOIDmode, abort because we will lose the mode of
4496 the register (this should never happen because one of the cases
4497 above should handle it). */
4499 int regno = REGNO (SUBREG_REG (x));
4502 if (subreg_lowpart_p (x)
4503 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4504 && reg_equiv_constant[regno] != 0
4505 && (tem = gen_lowpart_common (GET_MODE (x),
4506 reg_equiv_constant[regno])) != 0)
4509 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4510 && reg_equiv_constant[regno] != 0)
4513 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4514 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4520 /* If the subreg contains a reg that will be converted to a mem,
4521 convert the subreg to a narrower memref now.
4522 Otherwise, we would get (subreg (mem ...) ...),
4523 which would force reload of the mem.
4525 We also need to do this if there is an equivalent MEM that is
4526 not offsettable. In that case, alter_subreg would produce an
4527 invalid address on big-endian machines.
4529 For machines that extend byte loads, we must not reload using
4530 a wider mode if we have a paradoxical SUBREG. find_reloads will
4531 force a reload in that case. So we should not do anything here. */
4533 else if (regno >= FIRST_PSEUDO_REGISTER
4534 #ifdef LOAD_EXTEND_OP
4535 && (GET_MODE_SIZE (GET_MODE (x))
4536 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4538 && (reg_equiv_address[regno] != 0
4539 || (reg_equiv_mem[regno] != 0
4540 && (! strict_memory_address_p (GET_MODE (x),
4541 XEXP (reg_equiv_mem[regno], 0))
4542 || ! offsettable_memref_p (reg_equiv_mem[regno])
4543 || num_not_at_initial_offset))))
4544 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4548 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4552 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4553 ind_levels, is_set_dest, insn,
4555 /* If we have replaced a reg with it's equivalent memory loc -
4556 that can still be handled here e.g. if it's in a paradoxical
4557 subreg - we must make the change in a copy, rather than using
4558 a destructive change. This way, find_reloads can still elect
4559 not to do the change. */
4560 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4562 x = shallow_copy_rtx (x);
4565 XEXP (x, i) = new_part;
4571 /* Return a mem ref for the memory equivalent of reg REGNO.
4572 This mem ref is not shared with anything. */
4575 make_memloc (rtx ad, int regno)
4577 /* We must rerun eliminate_regs, in case the elimination
4578 offsets have changed. */
4580 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4582 /* If TEM might contain a pseudo, we must copy it to avoid
4583 modifying it when we do the substitution for the reload. */
4584 if (rtx_varies_p (tem, 0))
4585 tem = copy_rtx (tem);
4587 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4588 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4590 /* Copy the result if it's still the same as the equivalence, to avoid
4591 modifying it when we do the substitution for the reload. */
4592 if (tem == reg_equiv_memory_loc[regno])
4593 tem = copy_rtx (tem);
4597 /* Returns true if AD could be turned into a valid memory reference
4598 to mode MODE by reloading the part pointed to by PART into a
4602 maybe_memory_address_p (enum machine_mode mode, rtx ad, rtx *part)
4606 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4609 retv = memory_address_p (mode, ad);
4615 /* Record all reloads needed for handling memory address AD
4616 which appears in *LOC in a memory reference to mode MODE
4617 which itself is found in location *MEMREFLOC.
4618 Note that we take shortcuts assuming that no multi-reg machine mode
4619 occurs as part of an address.
4621 OPNUM and TYPE specify the purpose of this reload.
4623 IND_LEVELS says how many levels of indirect addressing this machine
4626 INSN, if nonzero, is the insn in which we do the reload. It is used
4627 to determine if we may generate output reloads, and where to put USEs
4628 for pseudos that we have to replace with stack slots.
4630 Value is nonzero if this address is reloaded or replaced as a whole.
4631 This is interesting to the caller if the address is an autoincrement.
4633 Note that there is no verification that the address will be valid after
4634 this routine does its work. Instead, we rely on the fact that the address
4635 was valid when reload started. So we need only undo things that reload
4636 could have broken. These are wrong register types, pseudos not allocated
4637 to a hard register, and frame pointer elimination. */
4640 find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad,
4641 rtx *loc, int opnum, enum reload_type type,
4642 int ind_levels, rtx insn)
4645 int removed_and = 0;
4648 /* If the address is a register, see if it is a legitimate address and
4649 reload if not. We first handle the cases where we need not reload
4650 or where we must reload in a non-standard way. */
4652 if (GET_CODE (ad) == REG)
4656 /* If the register is equivalent to an invariant expression, substitute
4657 the invariant, and eliminate any eliminable register references. */
4658 tem = reg_equiv_constant[regno];
4660 && (tem = eliminate_regs (tem, mode, insn))
4661 && strict_memory_address_p (mode, tem))
4667 tem = reg_equiv_memory_loc[regno];
4670 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4672 tem = make_memloc (ad, regno);
4673 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4675 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4676 &XEXP (tem, 0), opnum,
4677 ADDR_TYPE (type), ind_levels, insn);
4679 /* We can avoid a reload if the register's equivalent memory
4680 expression is valid as an indirect memory address.
4681 But not all addresses are valid in a mem used as an indirect
4682 address: only reg or reg+constant. */
4685 && strict_memory_address_p (mode, tem)
4686 && (GET_CODE (XEXP (tem, 0)) == REG
4687 || (GET_CODE (XEXP (tem, 0)) == PLUS
4688 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4689 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4691 /* TEM is not the same as what we'll be replacing the
4692 pseudo with after reload, put a USE in front of INSN
4693 in the final reload pass. */
4695 && num_not_at_initial_offset
4696 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4699 /* We mark the USE with QImode so that we
4700 recognize it as one that can be safely
4701 deleted at the end of reload. */
4702 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4705 /* This doesn't really count as replacing the address
4706 as a whole, since it is still a memory access. */
4714 /* The only remaining case where we can avoid a reload is if this is a
4715 hard register that is valid as a base register and which is not the
4716 subject of a CLOBBER in this insn. */
4718 else if (regno < FIRST_PSEUDO_REGISTER
4719 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4720 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4723 /* If we do not have one of the cases above, we must do the reload. */
4724 push_reload (ad, NULL_RTX, loc, (rtx*) 0, MODE_BASE_REG_CLASS (mode),
4725 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4729 if (strict_memory_address_p (mode, ad))
4731 /* The address appears valid, so reloads are not needed.
4732 But the address may contain an eliminable register.
4733 This can happen because a machine with indirect addressing
4734 may consider a pseudo register by itself a valid address even when
4735 it has failed to get a hard reg.
4736 So do a tree-walk to find and eliminate all such regs. */
4738 /* But first quickly dispose of a common case. */
4739 if (GET_CODE (ad) == PLUS
4740 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4741 && GET_CODE (XEXP (ad, 0)) == REG
4742 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4745 subst_reg_equivs_changed = 0;
4746 *loc = subst_reg_equivs (ad, insn);
4748 if (! subst_reg_equivs_changed)
4751 /* Check result for validity after substitution. */
4752 if (strict_memory_address_p (mode, ad))
4756 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4761 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4766 *memrefloc = copy_rtx (*memrefloc);
4767 XEXP (*memrefloc, 0) = ad;
4768 move_replacements (&ad, &XEXP (*memrefloc, 0));
4774 /* The address is not valid. We have to figure out why. First see if
4775 we have an outer AND and remove it if so. Then analyze what's inside. */
4777 if (GET_CODE (ad) == AND)
4780 loc = &XEXP (ad, 0);
4784 /* One possibility for why the address is invalid is that it is itself
4785 a MEM. This can happen when the frame pointer is being eliminated, a
4786 pseudo is not allocated to a hard register, and the offset between the
4787 frame and stack pointers is not its initial value. In that case the
4788 pseudo will have been replaced by a MEM referring to the
4790 if (GET_CODE (ad) == MEM)
4792 /* First ensure that the address in this MEM is valid. Then, unless
4793 indirect addresses are valid, reload the MEM into a register. */
4795 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4796 opnum, ADDR_TYPE (type),
4797 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4799 /* If tem was changed, then we must create a new memory reference to
4800 hold it and store it back into memrefloc. */
4801 if (tem != ad && memrefloc)
4803 *memrefloc = copy_rtx (*memrefloc);
4804 copy_replacements (tem, XEXP (*memrefloc, 0));
4805 loc = &XEXP (*memrefloc, 0);
4807 loc = &XEXP (*loc, 0);
4810 /* Check similar cases as for indirect addresses as above except
4811 that we can allow pseudos and a MEM since they should have been
4812 taken care of above. */
4815 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4816 || GET_CODE (XEXP (tem, 0)) == MEM
4817 || ! (GET_CODE (XEXP (tem, 0)) == REG
4818 || (GET_CODE (XEXP (tem, 0)) == PLUS
4819 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4820 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4822 /* Must use TEM here, not AD, since it is the one that will
4823 have any subexpressions reloaded, if needed. */
4824 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
4825 MODE_BASE_REG_CLASS (mode), GET_MODE (tem),
4828 return ! removed_and;
4834 /* If we have address of a stack slot but it's not valid because the
4835 displacement is too large, compute the sum in a register.
4836 Handle all base registers here, not just fp/ap/sp, because on some
4837 targets (namely SH) we can also get too large displacements from
4838 big-endian corrections. */
4839 else if (GET_CODE (ad) == PLUS
4840 && GET_CODE (XEXP (ad, 0)) == REG
4841 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4842 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4843 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4845 /* Unshare the MEM rtx so we can safely alter it. */
4848 *memrefloc = copy_rtx (*memrefloc);
4849 loc = &XEXP (*memrefloc, 0);
4851 loc = &XEXP (*loc, 0);
4854 if (double_reg_address_ok)
4856 /* Unshare the sum as well. */
4857 *loc = ad = copy_rtx (ad);
4859 /* Reload the displacement into an index reg.
4860 We assume the frame pointer or arg pointer is a base reg. */
4861 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4862 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4868 /* If the sum of two regs is not necessarily valid,
4869 reload the sum into a base reg.
4870 That will at least work. */
4871 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4872 Pmode, opnum, type, ind_levels);
4874 return ! removed_and;
4877 /* If we have an indexed stack slot, there are three possible reasons why
4878 it might be invalid: The index might need to be reloaded, the address
4879 might have been made by frame pointer elimination and hence have a
4880 constant out of range, or both reasons might apply.
4882 We can easily check for an index needing reload, but even if that is the
4883 case, we might also have an invalid constant. To avoid making the
4884 conservative assumption and requiring two reloads, we see if this address
4885 is valid when not interpreted strictly. If it is, the only problem is
4886 that the index needs a reload and find_reloads_address_1 will take care
4889 Handle all base registers here, not just fp/ap/sp, because on some
4890 targets (namely SPARC) we can also get invalid addresses from preventive
4891 subreg big-endian corrections made by find_reloads_toplev.
4893 If we decide to do something, it must be that `double_reg_address_ok'
4894 is true. We generate a reload of the base register + constant and
4895 rework the sum so that the reload register will be added to the index.
4896 This is safe because we know the address isn't shared.
4898 We check for the base register as both the first and second operand of
4899 the innermost PLUS. */
4901 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4902 && GET_CODE (XEXP (ad, 0)) == PLUS
4903 && GET_CODE (XEXP (XEXP (ad, 0), 0)) == REG
4904 && REGNO (XEXP (XEXP (ad, 0), 0)) < FIRST_PSEUDO_REGISTER
4905 && (REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad, 0), 0), mode)
4906 || XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4907 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4908 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4910 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4911 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4913 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4914 && ! maybe_memory_address_p (mode, ad, &XEXP (XEXP (ad, 0), 1)))
4916 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4917 plus_constant (XEXP (XEXP (ad, 0), 0),
4918 INTVAL (XEXP (ad, 1))),
4919 XEXP (XEXP (ad, 0), 1));
4920 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0),
4921 MODE_BASE_REG_CLASS (mode),
4922 GET_MODE (ad), opnum, type, ind_levels);
4923 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4929 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4930 && GET_CODE (XEXP (ad, 0)) == PLUS
4931 && GET_CODE (XEXP (XEXP (ad, 0), 1)) == REG
4932 && REGNO (XEXP (XEXP (ad, 0), 1)) < FIRST_PSEUDO_REGISTER
4933 && (REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad, 0), 1), mode)
4934 || XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4935 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4936 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4938 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4939 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4941 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4942 && ! maybe_memory_address_p (mode, ad, &XEXP (XEXP (ad, 0), 0)))
4944 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4945 XEXP (XEXP (ad, 0), 0),
4946 plus_constant (XEXP (XEXP (ad, 0), 1),
4947 INTVAL (XEXP (ad, 1))));
4948 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4949 MODE_BASE_REG_CLASS (mode),
4950 GET_MODE (ad), opnum, type, ind_levels);
4951 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4957 /* See if address becomes valid when an eliminable register
4958 in a sum is replaced. */
4961 if (GET_CODE (ad) == PLUS)
4962 tem = subst_indexed_address (ad);
4963 if (tem != ad && strict_memory_address_p (mode, tem))
4965 /* Ok, we win that way. Replace any additional eliminable
4968 subst_reg_equivs_changed = 0;
4969 tem = subst_reg_equivs (tem, insn);
4971 /* Make sure that didn't make the address invalid again. */
4973 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4980 /* If constants aren't valid addresses, reload the constant address
4982 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4984 /* If AD is an address in the constant pool, the MEM rtx may be shared.
4985 Unshare it so we can safely alter it. */
4986 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4987 && CONSTANT_POOL_ADDRESS_P (ad))
4989 *memrefloc = copy_rtx (*memrefloc);
4990 loc = &XEXP (*memrefloc, 0);
4992 loc = &XEXP (*loc, 0);
4995 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4996 Pmode, opnum, type, ind_levels);
4997 return ! removed_and;
5000 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
5004 /* Find all pseudo regs appearing in AD
5005 that are eliminable in favor of equivalent values
5006 and do not have hard regs; replace them by their equivalents.
5007 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5008 front of it for pseudos that we have to replace with stack slots. */
5011 subst_reg_equivs (rtx ad, rtx insn)
5013 RTX_CODE code = GET_CODE (ad);
5032 int regno = REGNO (ad);
5034 if (reg_equiv_constant[regno] != 0)
5036 subst_reg_equivs_changed = 1;
5037 return reg_equiv_constant[regno];
5039 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
5041 rtx mem = make_memloc (ad, regno);
5042 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
5044 subst_reg_equivs_changed = 1;
5045 /* We mark the USE with QImode so that we recognize it
5046 as one that can be safely deleted at the end of
5048 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5057 /* Quickly dispose of a common case. */
5058 if (XEXP (ad, 0) == frame_pointer_rtx
5059 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
5067 fmt = GET_RTX_FORMAT (code);
5068 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5070 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5074 /* Compute the sum of X and Y, making canonicalizations assumed in an
5075 address, namely: sum constant integers, surround the sum of two
5076 constants with a CONST, put the constant as the second operand, and
5077 group the constant on the outermost sum.
5079 This routine assumes both inputs are already in canonical form. */
5082 form_sum (rtx x, rtx y)
5085 enum machine_mode mode = GET_MODE (x);
5087 if (mode == VOIDmode)
5088 mode = GET_MODE (y);
5090 if (mode == VOIDmode)
5093 if (GET_CODE (x) == CONST_INT)
5094 return plus_constant (y, INTVAL (x));
5095 else if (GET_CODE (y) == CONST_INT)
5096 return plus_constant (x, INTVAL (y));
5097 else if (CONSTANT_P (x))
5098 tem = x, x = y, y = tem;
5100 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5101 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5103 /* Note that if the operands of Y are specified in the opposite
5104 order in the recursive calls below, infinite recursion will occur. */
5105 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5106 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5108 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5109 constant will have been placed second. */
5110 if (CONSTANT_P (x) && CONSTANT_P (y))
5112 if (GET_CODE (x) == CONST)
5114 if (GET_CODE (y) == CONST)
5117 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5120 return gen_rtx_PLUS (mode, x, y);
5123 /* If ADDR is a sum containing a pseudo register that should be
5124 replaced with a constant (from reg_equiv_constant),
5125 return the result of doing so, and also apply the associative
5126 law so that the result is more likely to be a valid address.
5127 (But it is not guaranteed to be one.)
5129 Note that at most one register is replaced, even if more are
5130 replaceable. Also, we try to put the result into a canonical form
5131 so it is more likely to be a valid address.
5133 In all other cases, return ADDR. */
5136 subst_indexed_address (rtx addr)
5138 rtx op0 = 0, op1 = 0, op2 = 0;
5142 if (GET_CODE (addr) == PLUS)
5144 /* Try to find a register to replace. */
5145 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5146 if (GET_CODE (op0) == REG
5147 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5148 && reg_renumber[regno] < 0
5149 && reg_equiv_constant[regno] != 0)
5150 op0 = reg_equiv_constant[regno];
5151 else if (GET_CODE (op1) == REG
5152 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5153 && reg_renumber[regno] < 0
5154 && reg_equiv_constant[regno] != 0)
5155 op1 = reg_equiv_constant[regno];
5156 else if (GET_CODE (op0) == PLUS
5157 && (tem = subst_indexed_address (op0)) != op0)
5159 else if (GET_CODE (op1) == PLUS
5160 && (tem = subst_indexed_address (op1)) != op1)
5165 /* Pick out up to three things to add. */
5166 if (GET_CODE (op1) == PLUS)
5167 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5168 else if (GET_CODE (op0) == PLUS)
5169 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5171 /* Compute the sum. */
5173 op1 = form_sum (op1, op2);
5175 op0 = form_sum (op0, op1);
5182 /* Update the REG_INC notes for an insn. It updates all REG_INC
5183 notes for the instruction which refer to REGNO the to refer
5184 to the reload number.
5186 INSN is the insn for which any REG_INC notes need updating.
5188 REGNO is the register number which has been reloaded.
5190 RELOADNUM is the reload number. */
5193 update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
5194 int reloadnum ATTRIBUTE_UNUSED)
5199 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5200 if (REG_NOTE_KIND (link) == REG_INC
5201 && (int) REGNO (XEXP (link, 0)) == regno)
5202 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5206 /* Record the pseudo registers we must reload into hard registers in a
5207 subexpression of a would-be memory address, X referring to a value
5208 in mode MODE. (This function is not called if the address we find
5211 CONTEXT = 1 means we are considering regs as index regs,
5212 = 0 means we are considering them as base regs.
5214 OPNUM and TYPE specify the purpose of any reloads made.
5216 IND_LEVELS says how many levels of indirect addressing are
5217 supported at this point in the address.
5219 INSN, if nonzero, is the insn in which we do the reload. It is used
5220 to determine if we may generate output reloads.
5222 We return nonzero if X, as a whole, is reloaded or replaced. */
5224 /* Note that we take shortcuts assuming that no multi-reg machine mode
5225 occurs as part of an address.
5226 Also, this is not fully machine-customizable; it works for machines
5227 such as VAXen and 68000's and 32000's, but other possible machines
5228 could have addressing modes that this does not handle right. */
5231 find_reloads_address_1 (enum machine_mode mode, rtx x, int context,
5232 rtx *loc, int opnum, enum reload_type type,
5233 int ind_levels, rtx insn)
5235 RTX_CODE code = GET_CODE (x);
5241 rtx orig_op0 = XEXP (x, 0);
5242 rtx orig_op1 = XEXP (x, 1);
5243 RTX_CODE code0 = GET_CODE (orig_op0);
5244 RTX_CODE code1 = GET_CODE (orig_op1);
5248 if (GET_CODE (op0) == SUBREG)
5250 op0 = SUBREG_REG (op0);
5251 code0 = GET_CODE (op0);
5252 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5253 op0 = gen_rtx_REG (word_mode,
5255 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5256 GET_MODE (SUBREG_REG (orig_op0)),
5257 SUBREG_BYTE (orig_op0),
5258 GET_MODE (orig_op0))));
5261 if (GET_CODE (op1) == SUBREG)
5263 op1 = SUBREG_REG (op1);
5264 code1 = GET_CODE (op1);
5265 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5266 /* ??? Why is this given op1's mode and above for
5267 ??? op0 SUBREGs we use word_mode? */
5268 op1 = gen_rtx_REG (GET_MODE (op1),
5270 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5271 GET_MODE (SUBREG_REG (orig_op1)),
5272 SUBREG_BYTE (orig_op1),
5273 GET_MODE (orig_op1))));
5275 /* Plus in the index register may be created only as a result of
5276 register remateralization for expression like &localvar*4. Reload it.
5277 It may be possible to combine the displacement on the outer level,
5278 but it is probably not worthwhile to do so. */
5281 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5282 opnum, ADDR_TYPE (type), ind_levels, insn);
5283 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5284 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5285 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5289 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5290 || code0 == ZERO_EXTEND || code1 == MEM)
5292 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5293 type, ind_levels, insn);
5294 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5295 type, ind_levels, insn);
5298 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5299 || code1 == ZERO_EXTEND || code0 == MEM)
5301 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5302 type, ind_levels, insn);
5303 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5304 type, ind_levels, insn);
5307 else if (code0 == CONST_INT || code0 == CONST
5308 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5309 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5310 type, ind_levels, insn);
5312 else if (code1 == CONST_INT || code1 == CONST
5313 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5314 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5315 type, ind_levels, insn);
5317 else if (code0 == REG && code1 == REG)
5319 if (REG_OK_FOR_INDEX_P (op0)
5320 && REG_MODE_OK_FOR_BASE_P (op1, mode))
5322 else if (REG_OK_FOR_INDEX_P (op1)
5323 && REG_MODE_OK_FOR_BASE_P (op0, mode))
5325 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5326 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5327 type, ind_levels, insn);
5328 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5329 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5330 type, ind_levels, insn);
5331 else if (REG_OK_FOR_INDEX_P (op1))
5332 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5333 type, ind_levels, insn);
5334 else if (REG_OK_FOR_INDEX_P (op0))
5335 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5336 type, ind_levels, insn);
5339 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5340 type, ind_levels, insn);
5341 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5342 type, ind_levels, insn);
5346 else if (code0 == REG)
5348 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5349 type, ind_levels, insn);
5350 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5351 type, ind_levels, insn);
5354 else if (code1 == REG)
5356 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5357 type, ind_levels, insn);
5358 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5359 type, ind_levels, insn);
5368 rtx op0 = XEXP (x, 0);
5369 rtx op1 = XEXP (x, 1);
5371 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5374 /* Currently, we only support {PRE,POST}_MODIFY constructs
5375 where a base register is {inc,dec}remented by the contents
5376 of another register or by a constant value. Thus, these
5377 operands must match. */
5378 if (op0 != XEXP (op1, 0))
5381 /* Require index register (or constant). Let's just handle the
5382 register case in the meantime... If the target allows
5383 auto-modify by a constant then we could try replacing a pseudo
5384 register with its equivalent constant where applicable. */
5385 if (REG_P (XEXP (op1, 1)))
5386 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5387 find_reloads_address_1 (mode, XEXP (op1, 1), 1, &XEXP (op1, 1),
5388 opnum, type, ind_levels, insn);
5390 if (REG_P (XEXP (op1, 0)))
5392 int regno = REGNO (XEXP (op1, 0));
5395 /* A register that is incremented cannot be constant! */
5396 if (regno >= FIRST_PSEUDO_REGISTER
5397 && reg_equiv_constant[regno] != 0)
5400 /* Handle a register that is equivalent to a memory location
5401 which cannot be addressed directly. */
5402 if (reg_equiv_memory_loc[regno] != 0
5403 && (reg_equiv_address[regno] != 0
5404 || num_not_at_initial_offset))
5406 rtx tem = make_memloc (XEXP (x, 0), regno);
5408 if (reg_equiv_address[regno]
5409 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5411 /* First reload the memory location's address.
5412 We can't use ADDR_TYPE (type) here, because we need to
5413 write back the value after reading it, hence we actually
5414 need two registers. */
5415 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5416 &XEXP (tem, 0), opnum,
5420 /* Then reload the memory location into a base
5422 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5424 MODE_BASE_REG_CLASS (mode),
5425 GET_MODE (x), GET_MODE (x), 0,
5426 0, opnum, RELOAD_OTHER);
5428 update_auto_inc_notes (this_insn, regno, reloadnum);
5433 if (reg_renumber[regno] >= 0)
5434 regno = reg_renumber[regno];
5436 /* We require a base register here... */
5437 if (!REGNO_MODE_OK_FOR_BASE_P (regno, GET_MODE (x)))
5439 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5440 &XEXP (op1, 0), &XEXP (x, 0),
5441 MODE_BASE_REG_CLASS (mode),
5442 GET_MODE (x), GET_MODE (x), 0, 0,
5443 opnum, RELOAD_OTHER);
5445 update_auto_inc_notes (this_insn, regno, reloadnum);
5458 if (GET_CODE (XEXP (x, 0)) == REG)
5460 int regno = REGNO (XEXP (x, 0));
5464 /* A register that is incremented cannot be constant! */
5465 if (regno >= FIRST_PSEUDO_REGISTER
5466 && reg_equiv_constant[regno] != 0)
5469 /* Handle a register that is equivalent to a memory location
5470 which cannot be addressed directly. */
5471 if (reg_equiv_memory_loc[regno] != 0
5472 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5474 rtx tem = make_memloc (XEXP (x, 0), regno);
5475 if (reg_equiv_address[regno]
5476 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5478 /* First reload the memory location's address.
5479 We can't use ADDR_TYPE (type) here, because we need to
5480 write back the value after reading it, hence we actually
5481 need two registers. */
5482 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5483 &XEXP (tem, 0), opnum, type,
5485 /* Put this inside a new increment-expression. */
5486 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5487 /* Proceed to reload that, as if it contained a register. */
5491 /* If we have a hard register that is ok as an index,
5492 don't make a reload. If an autoincrement of a nice register
5493 isn't "valid", it must be that no autoincrement is "valid".
5494 If that is true and something made an autoincrement anyway,
5495 this must be a special context where one is allowed.
5496 (For example, a "push" instruction.)
5497 We can't improve this address, so leave it alone. */
5499 /* Otherwise, reload the autoincrement into a suitable hard reg
5500 and record how much to increment by. */
5502 if (reg_renumber[regno] >= 0)
5503 regno = reg_renumber[regno];
5504 if ((regno >= FIRST_PSEUDO_REGISTER
5505 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5506 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5510 /* If we can output the register afterwards, do so, this
5511 saves the extra update.
5512 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5513 CALL_INSN - and it does not set CC0.
5514 But don't do this if we cannot directly address the
5515 memory location, since this will make it harder to
5516 reuse address reloads, and increases register pressure.
5517 Also don't do this if we can probably update x directly. */
5518 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM
5520 : reg_equiv_mem[regno]);
5521 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5522 if (insn && GET_CODE (insn) == INSN && equiv
5523 && memory_operand (equiv, GET_MODE (equiv))
5525 && ! sets_cc0_p (PATTERN (insn))
5527 && ! (icode != CODE_FOR_nothing
5528 && ((*insn_data[icode].operand[0].predicate)
5530 && ((*insn_data[icode].operand[1].predicate)
5533 /* We use the original pseudo for loc, so that
5534 emit_reload_insns() knows which pseudo this
5535 reload refers to and updates the pseudo rtx, not
5536 its equivalent memory location, as well as the
5537 corresponding entry in reg_last_reload_reg. */
5538 loc = &XEXP (x_orig, 0);
5541 = push_reload (x, x, loc, loc,
5542 (context ? INDEX_REG_CLASS :
5543 MODE_BASE_REG_CLASS (mode)),
5544 GET_MODE (x), GET_MODE (x), 0, 0,
5545 opnum, RELOAD_OTHER);
5550 = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5551 (context ? INDEX_REG_CLASS :
5552 MODE_BASE_REG_CLASS (mode)),
5553 GET_MODE (x), GET_MODE (x), 0, 0,
5556 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5561 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5567 else if (GET_CODE (XEXP (x, 0)) == MEM)
5569 /* This is probably the result of a substitution, by eliminate_regs,
5570 of an equivalent address for a pseudo that was not allocated to a
5571 hard register. Verify that the specified address is valid and
5572 reload it into a register. */
5573 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5574 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5578 /* Since we know we are going to reload this item, don't decrement
5579 for the indirection level.
5581 Note that this is actually conservative: it would be slightly
5582 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5584 /* We can't use ADDR_TYPE (type) here, because we need to
5585 write back the value after reading it, hence we actually
5586 need two registers. */
5587 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5588 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5589 opnum, type, ind_levels, insn);
5591 reloadnum = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5592 (context ? INDEX_REG_CLASS :
5593 MODE_BASE_REG_CLASS (mode)),
5594 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5596 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5598 link = FIND_REG_INC_NOTE (this_insn, tem);
5600 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5607 /* This is probably the result of a substitution, by eliminate_regs, of
5608 an equivalent address for a pseudo that was not allocated to a hard
5609 register. Verify that the specified address is valid and reload it
5612 Since we know we are going to reload this item, don't decrement for
5613 the indirection level.
5615 Note that this is actually conservative: it would be slightly more
5616 efficient to use the value of SPILL_INDIRECT_LEVELS from
5619 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5620 opnum, ADDR_TYPE (type), ind_levels, insn);
5621 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5622 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5623 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5628 int regno = REGNO (x);
5630 if (reg_equiv_constant[regno] != 0)
5632 find_reloads_address_part (reg_equiv_constant[regno], loc,
5633 (context ? INDEX_REG_CLASS :
5634 MODE_BASE_REG_CLASS (mode)),
5635 GET_MODE (x), opnum, type, ind_levels);
5639 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5640 that feeds this insn. */
5641 if (reg_equiv_mem[regno] != 0)
5643 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
5644 (context ? INDEX_REG_CLASS :
5645 MODE_BASE_REG_CLASS (mode)),
5646 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5651 if (reg_equiv_memory_loc[regno]
5652 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5654 rtx tem = make_memloc (x, regno);
5655 if (reg_equiv_address[regno] != 0
5656 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5659 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5660 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5665 if (reg_renumber[regno] >= 0)
5666 regno = reg_renumber[regno];
5668 if ((regno >= FIRST_PSEUDO_REGISTER
5669 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5670 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5672 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5673 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5674 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5678 /* If a register appearing in an address is the subject of a CLOBBER
5679 in this insn, reload it into some other register to be safe.
5680 The CLOBBER is supposed to make the register unavailable
5681 from before this insn to after it. */
5682 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5684 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5685 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5686 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5693 if (GET_CODE (SUBREG_REG (x)) == REG)
5695 /* If this is a SUBREG of a hard register and the resulting register
5696 is of the wrong class, reload the whole SUBREG. This avoids
5697 needless copies if SUBREG_REG is multi-word. */
5698 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5700 int regno ATTRIBUTE_UNUSED = subreg_regno (x);
5702 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5703 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5705 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5706 (context ? INDEX_REG_CLASS :
5707 MODE_BASE_REG_CLASS (mode)),
5708 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5712 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5713 is larger than the class size, then reload the whole SUBREG. */
5716 enum reg_class class = (context ? INDEX_REG_CLASS
5717 : MODE_BASE_REG_CLASS (mode));
5718 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5719 > reg_class_size[class])
5721 x = find_reloads_subreg_address (x, 0, opnum, type,
5723 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5724 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5736 const char *fmt = GET_RTX_FORMAT (code);
5739 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5742 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5743 opnum, type, ind_levels, insn);
5750 /* X, which is found at *LOC, is a part of an address that needs to be
5751 reloaded into a register of class CLASS. If X is a constant, or if
5752 X is a PLUS that contains a constant, check that the constant is a
5753 legitimate operand and that we are supposed to be able to load
5754 it into the register.
5756 If not, force the constant into memory and reload the MEM instead.
5758 MODE is the mode to use, in case X is an integer constant.
5760 OPNUM and TYPE describe the purpose of any reloads made.
5762 IND_LEVELS says how many levels of indirect addressing this machine
5766 find_reloads_address_part (rtx x, rtx *loc, enum reg_class class,
5767 enum machine_mode mode, int opnum,
5768 enum reload_type type, int ind_levels)
5771 && (! LEGITIMATE_CONSTANT_P (x)
5772 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5776 tem = x = force_const_mem (mode, x);
5777 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5778 opnum, type, ind_levels, 0);
5781 else if (GET_CODE (x) == PLUS
5782 && CONSTANT_P (XEXP (x, 1))
5783 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5784 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5788 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5789 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5790 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5791 opnum, type, ind_levels, 0);
5794 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5795 mode, VOIDmode, 0, 0, opnum, type);
5798 /* X, a subreg of a pseudo, is a part of an address that needs to be
5801 If the pseudo is equivalent to a memory location that cannot be directly
5802 addressed, make the necessary address reloads.
5804 If address reloads have been necessary, or if the address is changed
5805 by register elimination, return the rtx of the memory location;
5806 otherwise, return X.
5808 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5811 OPNUM and TYPE identify the purpose of the reload.
5813 IND_LEVELS says how many levels of indirect addressing are
5814 supported at this point in the address.
5816 INSN, if nonzero, is the insn in which we do the reload. It is used
5817 to determine where to put USEs for pseudos that we have to replace with
5821 find_reloads_subreg_address (rtx x, int force_replace, int opnum,
5822 enum reload_type type, int ind_levels, rtx insn)
5824 int regno = REGNO (SUBREG_REG (x));
5826 if (reg_equiv_memory_loc[regno])
5828 /* If the address is not directly addressable, or if the address is not
5829 offsettable, then it must be replaced. */
5831 && (reg_equiv_address[regno]
5832 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5835 if (force_replace || num_not_at_initial_offset)
5837 rtx tem = make_memloc (SUBREG_REG (x), regno);
5839 /* If the address changes because of register elimination, then
5840 it must be replaced. */
5842 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5844 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
5845 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5848 /* For big-endian paradoxical subregs, SUBREG_BYTE does not
5849 hold the correct (negative) byte offset. */
5850 if (BYTES_BIG_ENDIAN && outer_size > inner_size)
5851 offset = inner_size - outer_size;
5853 offset = SUBREG_BYTE (x);
5855 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5856 PUT_MODE (tem, GET_MODE (x));
5858 /* If this was a paradoxical subreg that we replaced, the
5859 resulting memory must be sufficiently aligned to allow
5860 us to widen the mode of the memory. */
5861 if (outer_size > inner_size && STRICT_ALIGNMENT)
5865 base = XEXP (tem, 0);
5866 if (GET_CODE (base) == PLUS)
5868 if (GET_CODE (XEXP (base, 1)) == CONST_INT
5869 && INTVAL (XEXP (base, 1)) % outer_size != 0)
5871 base = XEXP (base, 0);
5873 if (GET_CODE (base) != REG
5874 || (REGNO_POINTER_ALIGN (REGNO (base))
5875 < outer_size * BITS_PER_UNIT))
5879 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5880 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
5883 /* If this is not a toplevel operand, find_reloads doesn't see
5884 this substitution. We have to emit a USE of the pseudo so
5885 that delete_output_reload can see it. */
5886 if (replace_reloads && recog_data.operand[opnum] != x)
5887 /* We mark the USE with QImode so that we recognize it
5888 as one that can be safely deleted at the end of
5890 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
5900 /* Substitute into the current INSN the registers into which we have reloaded
5901 the things that need reloading. The array `replacements'
5902 contains the locations of all pointers that must be changed
5903 and says what to replace them with.
5905 Return the rtx that X translates into; usually X, but modified. */
5908 subst_reloads (rtx insn)
5912 for (i = 0; i < n_replacements; i++)
5914 struct replacement *r = &replacements[i];
5915 rtx reloadreg = rld[r->what].reg_rtx;
5918 #ifdef ENABLE_CHECKING
5919 /* Internal consistency test. Check that we don't modify
5920 anything in the equivalence arrays. Whenever something from
5921 those arrays needs to be reloaded, it must be unshared before
5922 being substituted into; the equivalence must not be modified.
5923 Otherwise, if the equivalence is used after that, it will
5924 have been modified, and the thing substituted (probably a
5925 register) is likely overwritten and not a usable equivalence. */
5928 for (check_regno = 0; check_regno < max_regno; check_regno++)
5930 #define CHECK_MODF(ARRAY) \
5931 if (ARRAY[check_regno] \
5932 && loc_mentioned_in_p (r->where, \
5933 ARRAY[check_regno])) \
5936 CHECK_MODF (reg_equiv_constant);
5937 CHECK_MODF (reg_equiv_memory_loc);
5938 CHECK_MODF (reg_equiv_address);
5939 CHECK_MODF (reg_equiv_mem);
5942 #endif /* ENABLE_CHECKING */
5944 /* If we're replacing a LABEL_REF with a register, add a
5945 REG_LABEL note to indicate to flow which label this
5946 register refers to. */
5947 if (GET_CODE (*r->where) == LABEL_REF
5948 && GET_CODE (insn) == JUMP_INSN)
5949 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
5950 XEXP (*r->where, 0),
5953 /* Encapsulate RELOADREG so its machine mode matches what
5954 used to be there. Note that gen_lowpart_common will
5955 do the wrong thing if RELOADREG is multi-word. RELOADREG
5956 will always be a REG here. */
5957 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5958 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
5960 /* If we are putting this into a SUBREG and RELOADREG is a
5961 SUBREG, we would be making nested SUBREGs, so we have to fix
5962 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5964 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5966 if (GET_MODE (*r->subreg_loc)
5967 == GET_MODE (SUBREG_REG (reloadreg)))
5968 *r->subreg_loc = SUBREG_REG (reloadreg);
5972 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
5974 /* When working with SUBREGs the rule is that the byte
5975 offset must be a multiple of the SUBREG's mode. */
5976 final_offset = (final_offset /
5977 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5978 final_offset = (final_offset *
5979 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5981 *r->where = SUBREG_REG (reloadreg);
5982 SUBREG_BYTE (*r->subreg_loc) = final_offset;
5986 *r->where = reloadreg;
5988 /* If reload got no reg and isn't optional, something's wrong. */
5989 else if (! rld[r->what].optional)
5994 /* Make a copy of any replacements being done into X and move those
5995 copies to locations in Y, a copy of X. */
5998 copy_replacements (rtx x, rtx y)
6000 /* We can't support X being a SUBREG because we might then need to know its
6001 location if something inside it was replaced. */
6002 if (GET_CODE (x) == SUBREG)
6005 copy_replacements_1 (&x, &y, n_replacements);
6009 copy_replacements_1 (rtx *px, rtx *py, int orig_replacements)
6013 struct replacement *r;
6017 for (j = 0; j < orig_replacements; j++)
6019 if (replacements[j].subreg_loc == px)
6021 r = &replacements[n_replacements++];
6022 r->where = replacements[j].where;
6024 r->what = replacements[j].what;
6025 r->mode = replacements[j].mode;
6027 else if (replacements[j].where == px)
6029 r = &replacements[n_replacements++];
6032 r->what = replacements[j].what;
6033 r->mode = replacements[j].mode;
6039 code = GET_CODE (x);
6040 fmt = GET_RTX_FORMAT (code);
6042 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6045 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6046 else if (fmt[i] == 'E')
6047 for (j = XVECLEN (x, i); --j >= 0; )
6048 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6053 /* Change any replacements being done to *X to be done to *Y. */
6056 move_replacements (rtx *x, rtx *y)
6060 for (i = 0; i < n_replacements; i++)
6061 if (replacements[i].subreg_loc == x)
6062 replacements[i].subreg_loc = y;
6063 else if (replacements[i].where == x)
6065 replacements[i].where = y;
6066 replacements[i].subreg_loc = 0;
6070 /* If LOC was scheduled to be replaced by something, return the replacement.
6071 Otherwise, return *LOC. */
6074 find_replacement (rtx *loc)
6076 struct replacement *r;
6078 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6080 rtx reloadreg = rld[r->what].reg_rtx;
6082 if (reloadreg && r->where == loc)
6084 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6085 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
6089 else if (reloadreg && r->subreg_loc == loc)
6091 /* RELOADREG must be either a REG or a SUBREG.
6093 ??? Is it actually still ever a SUBREG? If so, why? */
6095 if (GET_CODE (reloadreg) == REG)
6096 return gen_rtx_REG (GET_MODE (*loc),
6097 (REGNO (reloadreg) +
6098 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
6099 GET_MODE (SUBREG_REG (*loc)),
6102 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6106 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6108 /* When working with SUBREGs the rule is that the byte
6109 offset must be a multiple of the SUBREG's mode. */
6110 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6111 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6112 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6118 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6119 what's inside and make a new rtl if so. */
6120 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6121 || GET_CODE (*loc) == MULT)
6123 rtx x = find_replacement (&XEXP (*loc, 0));
6124 rtx y = find_replacement (&XEXP (*loc, 1));
6126 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6127 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6133 /* Return nonzero if register in range [REGNO, ENDREGNO)
6134 appears either explicitly or implicitly in X
6135 other than being stored into (except for earlyclobber operands).
6137 References contained within the substructure at LOC do not count.
6138 LOC may be zero, meaning don't ignore anything.
6140 This is similar to refers_to_regno_p in rtlanal.c except that we
6141 look at equivalences for pseudos that didn't get hard registers. */
6144 refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno,
6156 code = GET_CODE (x);
6163 /* If this is a pseudo, a hard register must not have been allocated.
6164 X must therefore either be a constant or be in memory. */
6165 if (r >= FIRST_PSEUDO_REGISTER)
6167 if (reg_equiv_memory_loc[r])
6168 return refers_to_regno_for_reload_p (regno, endregno,
6169 reg_equiv_memory_loc[r],
6172 if (reg_equiv_constant[r])
6178 return (endregno > r
6179 && regno < r + (r < FIRST_PSEUDO_REGISTER
6180 ? hard_regno_nregs[r][GET_MODE (x)]
6184 /* If this is a SUBREG of a hard reg, we can see exactly which
6185 registers are being modified. Otherwise, handle normally. */
6186 if (GET_CODE (SUBREG_REG (x)) == REG
6187 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6189 unsigned int inner_regno = subreg_regno (x);
6190 unsigned int inner_endregno
6191 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6192 ? hard_regno_nregs[inner_regno][GET_MODE (x)] : 1);
6194 return endregno > inner_regno && regno < inner_endregno;
6200 if (&SET_DEST (x) != loc
6201 /* Note setting a SUBREG counts as referring to the REG it is in for
6202 a pseudo but not for hard registers since we can
6203 treat each word individually. */
6204 && ((GET_CODE (SET_DEST (x)) == SUBREG
6205 && loc != &SUBREG_REG (SET_DEST (x))
6206 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
6207 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6208 && refers_to_regno_for_reload_p (regno, endregno,
6209 SUBREG_REG (SET_DEST (x)),
6211 /* If the output is an earlyclobber operand, this is
6213 || ((GET_CODE (SET_DEST (x)) != REG
6214 || earlyclobber_operand_p (SET_DEST (x)))
6215 && refers_to_regno_for_reload_p (regno, endregno,
6216 SET_DEST (x), loc))))
6219 if (code == CLOBBER || loc == &SET_SRC (x))
6228 /* X does not match, so try its subexpressions. */
6230 fmt = GET_RTX_FORMAT (code);
6231 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6233 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6241 if (refers_to_regno_for_reload_p (regno, endregno,
6245 else if (fmt[i] == 'E')
6248 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6249 if (loc != &XVECEXP (x, i, j)
6250 && refers_to_regno_for_reload_p (regno, endregno,
6251 XVECEXP (x, i, j), loc))
6258 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6259 we check if any register number in X conflicts with the relevant register
6260 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6261 contains a MEM (we don't bother checking for memory addresses that can't
6262 conflict because we expect this to be a rare case.
6264 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6265 that we look at equivalences for pseudos that didn't get hard registers. */
6268 reg_overlap_mentioned_for_reload_p (rtx x, rtx in)
6270 int regno, endregno;
6272 /* Overly conservative. */
6273 if (GET_CODE (x) == STRICT_LOW_PART
6274 || GET_RTX_CLASS (GET_CODE (x)) == 'a')
6277 /* If either argument is a constant, then modifying X can not affect IN. */
6278 if (CONSTANT_P (x) || CONSTANT_P (in))
6280 else if (GET_CODE (x) == SUBREG)
6282 regno = REGNO (SUBREG_REG (x));
6283 if (regno < FIRST_PSEUDO_REGISTER)
6284 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6285 GET_MODE (SUBREG_REG (x)),
6289 else if (GET_CODE (x) == REG)
6293 /* If this is a pseudo, it must not have been assigned a hard register.
6294 Therefore, it must either be in memory or be a constant. */
6296 if (regno >= FIRST_PSEUDO_REGISTER)
6298 if (reg_equiv_memory_loc[regno])
6299 return refers_to_mem_for_reload_p (in);
6300 else if (reg_equiv_constant[regno])
6305 else if (GET_CODE (x) == MEM)
6306 return refers_to_mem_for_reload_p (in);
6307 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6308 || GET_CODE (x) == CC0)
6309 return reg_mentioned_p (x, in);
6310 else if (GET_CODE (x) == PLUS)
6312 /* We actually want to know if X is mentioned somewhere inside IN.
6313 We must not say that (plus (sp) (const_int 124)) is in
6314 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6315 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6316 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6317 while (GET_CODE (in) == MEM)
6319 if (GET_CODE (in) == REG)
6321 else if (GET_CODE (in) == PLUS)
6322 return (reg_overlap_mentioned_for_reload_p (x, XEXP (in, 0))
6323 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 1)));
6324 else return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6325 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6330 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6331 ? hard_regno_nregs[regno][GET_MODE (x)] : 1);
6333 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6336 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6340 refers_to_mem_for_reload_p (rtx x)
6345 if (GET_CODE (x) == MEM)
6348 if (GET_CODE (x) == REG)
6349 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6350 && reg_equiv_memory_loc[REGNO (x)]);
6352 fmt = GET_RTX_FORMAT (GET_CODE (x));
6353 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6355 && (GET_CODE (XEXP (x, i)) == MEM
6356 || refers_to_mem_for_reload_p (XEXP (x, i))))
6362 /* Check the insns before INSN to see if there is a suitable register
6363 containing the same value as GOAL.
6364 If OTHER is -1, look for a register in class CLASS.
6365 Otherwise, just see if register number OTHER shares GOAL's value.
6367 Return an rtx for the register found, or zero if none is found.
6369 If RELOAD_REG_P is (short *)1,
6370 we reject any hard reg that appears in reload_reg_rtx
6371 because such a hard reg is also needed coming into this insn.
6373 If RELOAD_REG_P is any other nonzero value,
6374 it is a vector indexed by hard reg number
6375 and we reject any hard reg whose element in the vector is nonnegative
6376 as well as any that appears in reload_reg_rtx.
6378 If GOAL is zero, then GOALREG is a register number; we look
6379 for an equivalent for that register.
6381 MODE is the machine mode of the value we want an equivalence for.
6382 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6384 This function is used by jump.c as well as in the reload pass.
6386 If GOAL is the sum of the stack pointer and a constant, we treat it
6387 as if it were a constant except that sp is required to be unchanging. */
6390 find_equiv_reg (rtx goal, rtx insn, enum reg_class class, int other,
6391 short *reload_reg_p, int goalreg, enum machine_mode mode)
6394 rtx goaltry, valtry, value, where;
6400 int goal_mem_addr_varies = 0;
6401 int need_stable_sp = 0;
6408 else if (GET_CODE (goal) == REG)
6409 regno = REGNO (goal);
6410 else if (GET_CODE (goal) == MEM)
6412 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6413 if (MEM_VOLATILE_P (goal))
6415 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
6417 /* An address with side effects must be reexecuted. */
6432 else if (CONSTANT_P (goal))
6434 else if (GET_CODE (goal) == PLUS
6435 && XEXP (goal, 0) == stack_pointer_rtx
6436 && CONSTANT_P (XEXP (goal, 1)))
6437 goal_const = need_stable_sp = 1;
6438 else if (GET_CODE (goal) == PLUS
6439 && XEXP (goal, 0) == frame_pointer_rtx
6440 && CONSTANT_P (XEXP (goal, 1)))
6446 /* Scan insns back from INSN, looking for one that copies
6447 a value into or out of GOAL.
6448 Stop and give up if we reach a label. */
6454 if (p == 0 || GET_CODE (p) == CODE_LABEL
6455 || num > PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS))
6458 if (GET_CODE (p) == INSN
6459 /* If we don't want spill regs ... */
6460 && (! (reload_reg_p != 0
6461 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6462 /* ... then ignore insns introduced by reload; they aren't
6463 useful and can cause results in reload_as_needed to be
6464 different from what they were when calculating the need for
6465 spills. If we notice an input-reload insn here, we will
6466 reject it below, but it might hide a usable equivalent.
6467 That makes bad code. It may even abort: perhaps no reg was
6468 spilled for this insn because it was assumed we would find
6470 || INSN_UID (p) < reload_first_uid))
6473 pat = single_set (p);
6475 /* First check for something that sets some reg equal to GOAL. */
6478 && true_regnum (SET_SRC (pat)) == regno
6479 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6482 && true_regnum (SET_DEST (pat)) == regno
6483 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6485 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6486 /* When looking for stack pointer + const,
6487 make sure we don't use a stack adjust. */
6488 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6489 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6491 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6492 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6494 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6495 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6496 /* If we are looking for a constant,
6497 and something equivalent to that constant was copied
6498 into a reg, we can use that reg. */
6499 || (goal_const && REG_NOTES (p) != 0
6500 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6501 && ((rtx_equal_p (XEXP (tem, 0), goal)
6503 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6504 || (GET_CODE (SET_DEST (pat)) == REG
6505 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6506 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6508 && GET_CODE (goal) == CONST_INT
6510 = operand_subword (XEXP (tem, 0), 0, 0,
6512 && rtx_equal_p (goal, goaltry)
6514 = operand_subword (SET_DEST (pat), 0, 0,
6516 && (valueno = true_regnum (valtry)) >= 0)))
6517 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6519 && GET_CODE (SET_DEST (pat)) == REG
6520 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6521 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6523 && GET_CODE (goal) == CONST_INT
6524 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6526 && rtx_equal_p (goal, goaltry)
6528 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6529 && (valueno = true_regnum (valtry)) >= 0)))
6533 if (valueno != other)
6536 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6542 for (i = hard_regno_nregs[valueno][mode] - 1; i >= 0; i--)
6543 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6556 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6557 (or copying VALUE into GOAL, if GOAL is also a register).
6558 Now verify that VALUE is really valid. */
6560 /* VALUENO is the register number of VALUE; a hard register. */
6562 /* Don't try to re-use something that is killed in this insn. We want
6563 to be able to trust REG_UNUSED notes. */
6564 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6567 /* If we propose to get the value from the stack pointer or if GOAL is
6568 a MEM based on the stack pointer, we need a stable SP. */
6569 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6570 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6574 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6575 if (GET_MODE (value) != mode)
6578 /* Reject VALUE if it was loaded from GOAL
6579 and is also a register that appears in the address of GOAL. */
6581 if (goal_mem && value == SET_DEST (single_set (where))
6582 && refers_to_regno_for_reload_p (valueno,
6584 + hard_regno_nregs[valueno][mode]),
6588 /* Reject registers that overlap GOAL. */
6590 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6591 nregs = hard_regno_nregs[regno][mode];
6594 valuenregs = hard_regno_nregs[valueno][mode];
6596 if (!goal_mem && !goal_const
6597 && regno + nregs > valueno && regno < valueno + valuenregs)
6600 /* Reject VALUE if it is one of the regs reserved for reloads.
6601 Reload1 knows how to reuse them anyway, and it would get
6602 confused if we allocated one without its knowledge.
6603 (Now that insns introduced by reload are ignored above,
6604 this case shouldn't happen, but I'm not positive.) */
6606 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6609 for (i = 0; i < valuenregs; ++i)
6610 if (reload_reg_p[valueno + i] >= 0)
6614 /* Reject VALUE if it is a register being used for an input reload
6615 even if it is not one of those reserved. */
6617 if (reload_reg_p != 0)
6620 for (i = 0; i < n_reloads; i++)
6621 if (rld[i].reg_rtx != 0 && rld[i].in)
6623 int regno1 = REGNO (rld[i].reg_rtx);
6624 int nregs1 = hard_regno_nregs[regno1]
6625 [GET_MODE (rld[i].reg_rtx)];
6626 if (regno1 < valueno + valuenregs
6627 && regno1 + nregs1 > valueno)
6633 /* We must treat frame pointer as varying here,
6634 since it can vary--in a nonlocal goto as generated by expand_goto. */
6635 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6637 /* Now verify that the values of GOAL and VALUE remain unaltered
6638 until INSN is reached. */
6647 /* Don't trust the conversion past a function call
6648 if either of the two is in a call-clobbered register, or memory. */
6649 if (GET_CODE (p) == CALL_INSN)
6653 if (goal_mem || need_stable_sp)
6656 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6657 for (i = 0; i < nregs; ++i)
6658 if (call_used_regs[regno + i])
6661 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6662 for (i = 0; i < valuenregs; ++i)
6663 if (call_used_regs[valueno + i])
6665 #ifdef NON_SAVING_SETJMP
6666 if (NON_SAVING_SETJMP && find_reg_note (p, REG_SETJMP, NULL))
6675 /* Watch out for unspec_volatile, and volatile asms. */
6676 if (volatile_insn_p (pat))
6679 /* If this insn P stores in either GOAL or VALUE, return 0.
6680 If GOAL is a memory ref and this insn writes memory, return 0.
6681 If GOAL is a memory ref and its address is not constant,
6682 and this insn P changes a register used in GOAL, return 0. */
6684 if (GET_CODE (pat) == COND_EXEC)
6685 pat = COND_EXEC_CODE (pat);
6686 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6688 rtx dest = SET_DEST (pat);
6689 while (GET_CODE (dest) == SUBREG
6690 || GET_CODE (dest) == ZERO_EXTRACT
6691 || GET_CODE (dest) == SIGN_EXTRACT
6692 || GET_CODE (dest) == STRICT_LOW_PART)
6693 dest = XEXP (dest, 0);
6694 if (GET_CODE (dest) == REG)
6696 int xregno = REGNO (dest);
6698 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6699 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
6702 if (xregno < regno + nregs && xregno + xnregs > regno)
6704 if (xregno < valueno + valuenregs
6705 && xregno + xnregs > valueno)
6707 if (goal_mem_addr_varies
6708 && reg_overlap_mentioned_for_reload_p (dest, goal))
6710 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6713 else if (goal_mem && GET_CODE (dest) == MEM
6714 && ! push_operand (dest, GET_MODE (dest)))
6716 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6717 && reg_equiv_memory_loc[regno] != 0)
6719 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6722 else if (GET_CODE (pat) == PARALLEL)
6725 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6727 rtx v1 = XVECEXP (pat, 0, i);
6728 if (GET_CODE (v1) == COND_EXEC)
6729 v1 = COND_EXEC_CODE (v1);
6730 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6732 rtx dest = SET_DEST (v1);
6733 while (GET_CODE (dest) == SUBREG
6734 || GET_CODE (dest) == ZERO_EXTRACT
6735 || GET_CODE (dest) == SIGN_EXTRACT
6736 || GET_CODE (dest) == STRICT_LOW_PART)
6737 dest = XEXP (dest, 0);
6738 if (GET_CODE (dest) == REG)
6740 int xregno = REGNO (dest);
6742 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6743 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
6746 if (xregno < regno + nregs
6747 && xregno + xnregs > regno)
6749 if (xregno < valueno + valuenregs
6750 && xregno + xnregs > valueno)
6752 if (goal_mem_addr_varies
6753 && reg_overlap_mentioned_for_reload_p (dest,
6756 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6759 else if (goal_mem && GET_CODE (dest) == MEM
6760 && ! push_operand (dest, GET_MODE (dest)))
6762 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6763 && reg_equiv_memory_loc[regno] != 0)
6765 else if (need_stable_sp
6766 && push_operand (dest, GET_MODE (dest)))
6772 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
6776 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6777 link = XEXP (link, 1))
6779 pat = XEXP (link, 0);
6780 if (GET_CODE (pat) == CLOBBER)
6782 rtx dest = SET_DEST (pat);
6784 if (GET_CODE (dest) == REG)
6786 int xregno = REGNO (dest);
6788 = hard_regno_nregs[xregno][GET_MODE (dest)];
6790 if (xregno < regno + nregs
6791 && xregno + xnregs > regno)
6793 else if (xregno < valueno + valuenregs
6794 && xregno + xnregs > valueno)
6796 else if (goal_mem_addr_varies
6797 && reg_overlap_mentioned_for_reload_p (dest,
6802 else if (goal_mem && GET_CODE (dest) == MEM
6803 && ! push_operand (dest, GET_MODE (dest)))
6805 else if (need_stable_sp
6806 && push_operand (dest, GET_MODE (dest)))
6813 /* If this insn auto-increments or auto-decrements
6814 either regno or valueno, return 0 now.
6815 If GOAL is a memory ref and its address is not constant,
6816 and this insn P increments a register used in GOAL, return 0. */
6820 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6821 if (REG_NOTE_KIND (link) == REG_INC
6822 && GET_CODE (XEXP (link, 0)) == REG)
6824 int incno = REGNO (XEXP (link, 0));
6825 if (incno < regno + nregs && incno >= regno)
6827 if (incno < valueno + valuenregs && incno >= valueno)
6829 if (goal_mem_addr_varies
6830 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6840 /* Find a place where INCED appears in an increment or decrement operator
6841 within X, and return the amount INCED is incremented or decremented by.
6842 The value is always positive. */
6845 find_inc_amount (rtx x, rtx inced)
6847 enum rtx_code code = GET_CODE (x);
6853 rtx addr = XEXP (x, 0);
6854 if ((GET_CODE (addr) == PRE_DEC
6855 || GET_CODE (addr) == POST_DEC
6856 || GET_CODE (addr) == PRE_INC
6857 || GET_CODE (addr) == POST_INC)
6858 && XEXP (addr, 0) == inced)
6859 return GET_MODE_SIZE (GET_MODE (x));
6860 else if ((GET_CODE (addr) == PRE_MODIFY
6861 || GET_CODE (addr) == POST_MODIFY)
6862 && GET_CODE (XEXP (addr, 1)) == PLUS
6863 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
6864 && XEXP (addr, 0) == inced
6865 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
6867 i = INTVAL (XEXP (XEXP (addr, 1), 1));
6868 return i < 0 ? -i : i;
6872 fmt = GET_RTX_FORMAT (code);
6873 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6877 int tem = find_inc_amount (XEXP (x, i), inced);
6884 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6886 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6896 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6897 If SETS is nonzero, also consider SETs. */
6900 regno_clobbered_p (unsigned int regno, rtx insn, enum machine_mode mode,
6903 unsigned int nregs = hard_regno_nregs[regno][mode];
6904 unsigned int endregno = regno + nregs;
6906 if ((GET_CODE (PATTERN (insn)) == CLOBBER
6907 || (sets && GET_CODE (PATTERN (insn)) == SET))
6908 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6910 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
6912 return test >= regno && test < endregno;
6915 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6917 int i = XVECLEN (PATTERN (insn), 0) - 1;
6921 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6922 if ((GET_CODE (elt) == CLOBBER
6923 || (sets && GET_CODE (PATTERN (insn)) == SET))
6924 && GET_CODE (XEXP (elt, 0)) == REG)
6926 unsigned int test = REGNO (XEXP (elt, 0));
6928 if (test >= regno && test < endregno)
6937 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
6939 reload_adjust_reg_for_mode (rtx reloadreg, enum machine_mode mode)
6943 if (GET_MODE (reloadreg) == mode)
6946 regno = REGNO (reloadreg);
6948 if (WORDS_BIG_ENDIAN)
6949 regno += (int) hard_regno_nregs[regno][GET_MODE (reloadreg)]
6950 - (int) hard_regno_nregs[regno][mode];
6952 return gen_rtx_REG (mode, regno);
6955 static const char *const reload_when_needed_name[] =
6958 "RELOAD_FOR_OUTPUT",
6960 "RELOAD_FOR_INPUT_ADDRESS",
6961 "RELOAD_FOR_INPADDR_ADDRESS",
6962 "RELOAD_FOR_OUTPUT_ADDRESS",
6963 "RELOAD_FOR_OUTADDR_ADDRESS",
6964 "RELOAD_FOR_OPERAND_ADDRESS",
6965 "RELOAD_FOR_OPADDR_ADDR",
6967 "RELOAD_FOR_OTHER_ADDRESS"
6970 static const char * const reg_class_names[] = REG_CLASS_NAMES;
6972 /* These functions are used to print the variables set by 'find_reloads' */
6975 debug_reload_to_stream (FILE *f)
6982 for (r = 0; r < n_reloads; r++)
6984 fprintf (f, "Reload %d: ", r);
6988 fprintf (f, "reload_in (%s) = ",
6989 GET_MODE_NAME (rld[r].inmode));
6990 print_inline_rtx (f, rld[r].in, 24);
6991 fprintf (f, "\n\t");
6994 if (rld[r].out != 0)
6996 fprintf (f, "reload_out (%s) = ",
6997 GET_MODE_NAME (rld[r].outmode));
6998 print_inline_rtx (f, rld[r].out, 24);
6999 fprintf (f, "\n\t");
7002 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
7004 fprintf (f, "%s (opnum = %d)",
7005 reload_when_needed_name[(int) rld[r].when_needed],
7008 if (rld[r].optional)
7009 fprintf (f, ", optional");
7011 if (rld[r].nongroup)
7012 fprintf (f, ", nongroup");
7014 if (rld[r].inc != 0)
7015 fprintf (f, ", inc by %d", rld[r].inc);
7017 if (rld[r].nocombine)
7018 fprintf (f, ", can't combine");
7020 if (rld[r].secondary_p)
7021 fprintf (f, ", secondary_reload_p");
7023 if (rld[r].in_reg != 0)
7025 fprintf (f, "\n\treload_in_reg: ");
7026 print_inline_rtx (f, rld[r].in_reg, 24);
7029 if (rld[r].out_reg != 0)
7031 fprintf (f, "\n\treload_out_reg: ");
7032 print_inline_rtx (f, rld[r].out_reg, 24);
7035 if (rld[r].reg_rtx != 0)
7037 fprintf (f, "\n\treload_reg_rtx: ");
7038 print_inline_rtx (f, rld[r].reg_rtx, 24);
7042 if (rld[r].secondary_in_reload != -1)
7044 fprintf (f, "%ssecondary_in_reload = %d",
7045 prefix, rld[r].secondary_in_reload);
7049 if (rld[r].secondary_out_reload != -1)
7050 fprintf (f, "%ssecondary_out_reload = %d\n",
7051 prefix, rld[r].secondary_out_reload);
7054 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7056 fprintf (f, "%ssecondary_in_icode = %s", prefix,
7057 insn_data[rld[r].secondary_in_icode].name);
7061 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7062 fprintf (f, "%ssecondary_out_icode = %s", prefix,
7063 insn_data[rld[r].secondary_out_icode].name);
7072 debug_reload_to_stream (stderr);