1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This file contains subroutines used only from the file reload1.c.
22 It knows how to scan one insn for operands and values
23 that need to be copied into registers to make valid code.
24 It also finds other operands and values which are valid
25 but for which equivalent values in registers exist and
26 ought to be used instead.
28 Before processing the first insn of the function, call `init_reload'.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
91 #include "insn-config.h"
92 #include "insn-codes.h"
96 #include "hard-reg-set.h"
100 #ifndef REGISTER_MOVE_COST
101 #define REGISTER_MOVE_COST(x, y) 2
104 /* The variables set up by `find_reloads' are:
106 n_reloads number of distinct reloads needed; max reload # + 1
107 tables indexed by reload number
108 reload_in rtx for value to reload from
109 reload_out rtx for where to store reload-reg afterward if nec
110 (often the same as reload_in)
111 reload_reg_class enum reg_class, saying what regs to reload into
112 reload_inmode enum machine_mode; mode this operand should have
113 when reloaded, on input.
114 reload_outmode enum machine_mode; mode this operand should have
115 when reloaded, on output.
116 reload_optional char, nonzero for an optional reload.
117 Optional reloads are ignored unless the
118 value is already sitting in a register.
119 reload_inc int, positive amount to increment or decrement by if
120 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
121 Ignored otherwise (don't assume it is zero).
122 reload_in_reg rtx. A reg for which reload_in is the equivalent.
123 If reload_in is a symbol_ref which came from
124 reg_equiv_constant, then this is the pseudo
125 which has that symbol_ref as equivalent.
126 reload_reg_rtx rtx. This is the register to reload into.
127 If it is zero when `find_reloads' returns,
128 you must find a suitable register in the class
129 specified by reload_reg_class, and store here
130 an rtx for that register with mode from
131 reload_inmode or reload_outmode.
132 reload_nocombine char, nonzero if this reload shouldn't be
133 combined with another reload.
134 reload_opnum int, operand number being reloaded. This is
135 used to group related reloads and need not always
136 be equal to the actual operand number in the insn,
137 though it current will be; for in-out operands, it
138 is one of the two operand numbers.
139 reload_when_needed enum, classifies reload as needed either for
140 addressing an input reload, addressing an output,
141 for addressing a non-reloaded mem ref,
142 or for unspecified purposes (i.e., more than one
144 reload_secondary_reload int, gives the reload number of a secondary
145 reload, when needed; otherwise -1
146 reload_secondary_p int, 1 if this is a secondary register for one
148 reload_secondary_icode enum insn_code, if a secondary reload is required,
149 gives the INSN_CODE that uses the secondary
150 reload as a scratch register, or CODE_FOR_nothing
151 if the secondary reload register is to be an
152 intermediate register. */
155 rtx reload_in[MAX_RELOADS];
156 rtx reload_out[MAX_RELOADS];
157 enum reg_class reload_reg_class[MAX_RELOADS];
158 enum machine_mode reload_inmode[MAX_RELOADS];
159 enum machine_mode reload_outmode[MAX_RELOADS];
160 rtx reload_reg_rtx[MAX_RELOADS];
161 char reload_optional[MAX_RELOADS];
162 int reload_inc[MAX_RELOADS];
163 rtx reload_in_reg[MAX_RELOADS];
164 char reload_nocombine[MAX_RELOADS];
165 int reload_opnum[MAX_RELOADS];
166 enum reload_type reload_when_needed[MAX_RELOADS];
167 int reload_secondary_reload[MAX_RELOADS];
168 int reload_secondary_p[MAX_RELOADS];
169 enum insn_code reload_secondary_icode[MAX_RELOADS];
171 /* All the "earlyclobber" operands of the current insn
172 are recorded here. */
174 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
176 int reload_n_operands;
178 /* Replacing reloads.
180 If `replace_reloads' is nonzero, then as each reload is recorded
181 an entry is made for it in the table `replacements'.
182 Then later `subst_reloads' can look through that table and
183 perform all the replacements needed. */
185 /* Nonzero means record the places to replace. */
186 static int replace_reloads;
188 /* Each replacement is recorded with a structure like this. */
191 rtx *where; /* Location to store in */
192 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
193 a SUBREG; 0 otherwise. */
194 int what; /* which reload this is for */
195 enum machine_mode mode; /* mode it must have */
198 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
200 /* Number of replacements currently recorded. */
201 static int n_replacements;
203 /* Used to track what is modified by an operand. */
206 int reg_flag; /* Nonzero if referencing a register. */
207 int safe; /* Nonzero if this can't conflict with anything. */
208 rtx base; /* Base adddress for MEM. */
209 HOST_WIDE_INT start; /* Starting offset or register number. */
210 HOST_WIDE_INT end; /* Endinf offset or register number. */
213 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
214 (see reg_equiv_address). */
215 static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
216 static int n_memlocs;
218 #ifdef SECONDARY_MEMORY_NEEDED
220 /* Save MEMs needed to copy from one class of registers to another. One MEM
221 is used per mode, but normally only one or two modes are ever used.
223 We keep two versions, before and after register elimination. The one
224 after register elimination is record separately for each operand. This
225 is done in case the address is not valid to be sure that we separately
228 static rtx secondary_memlocs[NUM_MACHINE_MODES];
229 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
232 /* The instruction we are doing reloads for;
233 so we can test whether a register dies in it. */
234 static rtx this_insn;
236 /* Nonzero if this instruction is a user-specified asm with operands. */
237 static int this_insn_is_asm;
239 /* If hard_regs_live_known is nonzero,
240 we can tell which hard regs are currently live,
241 at least enough to succeed in choosing dummy reloads. */
242 static int hard_regs_live_known;
244 /* Indexed by hard reg number,
245 element is nonegative if hard reg has been spilled.
246 This vector is passed to `find_reloads' as an argument
247 and is not changed here. */
248 static short *static_reload_reg_p;
250 /* Set to 1 in subst_reg_equivs if it changes anything. */
251 static int subst_reg_equivs_changed;
253 /* On return from push_reload, holds the reload-number for the OUT
254 operand, which can be different for that from the input operand. */
255 static int output_reloadnum;
257 static enum reg_class find_secondary_reload PROTO((rtx, enum reg_class,
258 enum machine_mode, int,
263 enum machine_mode *));
264 static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
265 enum machine_mode, enum machine_mode,
266 int, int, int, enum reload_type));
267 static void push_replacement PROTO((rtx *, int, enum machine_mode));
268 static void combine_reloads PROTO((void));
269 static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
270 enum machine_mode, enum machine_mode,
271 enum reg_class, int));
272 static int hard_reg_set_here_p PROTO((int, int, rtx));
273 static struct decomposition decompose PROTO((rtx));
274 static int immune_p PROTO((rtx, rtx, struct decomposition));
275 static int alternative_allows_memconst PROTO((char *, int));
276 static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int));
277 static rtx make_memloc PROTO((rtx, int));
278 static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
279 int, enum reload_type, int));
280 static rtx subst_reg_equivs PROTO((rtx));
281 static rtx subst_indexed_address PROTO((rtx));
282 static int find_reloads_address_1 PROTO((rtx, int, rtx *, int,
283 enum reload_type,int));
284 static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
285 enum machine_mode, int,
286 enum reload_type, int));
287 static int find_inc_amount PROTO((rtx, rtx));
289 #ifdef HAVE_SECONDARY_RELOADS
291 /* Determine if any secondary reloads are needed for loading (if IN_P is
292 non-zero) or storing (if IN_P is zero) X to or from a reload register of
293 register class RELOAD_CLASS in mode RELOAD_MODE.
295 Return the register class of a secondary reload register, or NO_REGS if
296 none. *PMODE is set to the mode that the register is required in.
297 If the reload register is needed as a scratch register instead of an
298 intermediate register, *PICODE is set to the insn_code of the insn to be
299 used to load or store the primary reload register; otherwise *PICODE
300 is set to CODE_FOR_nothing.
302 In some cases (such as storing MQ into an external memory location on
303 the RT), both an intermediate register and a scratch register. In that
304 case, *PICODE is set to CODE_FOR_nothing, the class for the intermediate
305 register is returned, and the *PTERTIARY_... variables are set to describe
306 the scratch register. */
308 static enum reg_class
309 find_secondary_reload (x, reload_class, reload_mode, in_p, picode, pmode,
310 ptertiary_class, ptertiary_icode, ptertiary_mode)
312 enum reg_class reload_class;
313 enum machine_mode reload_mode;
315 enum insn_code *picode;
316 enum machine_mode *pmode;
317 enum reg_class *ptertiary_class;
318 enum insn_code *ptertiary_icode;
319 enum machine_mode *ptertiary_mode;
321 enum reg_class class = NO_REGS;
322 enum machine_mode mode = reload_mode;
323 enum insn_code icode = CODE_FOR_nothing;
324 enum reg_class t_class = NO_REGS;
325 enum machine_mode t_mode = VOIDmode;
326 enum insn_code t_icode = CODE_FOR_nothing;
328 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
329 is still a pseudo-register by now, it *must* have an equivalent MEM
330 but we don't want to assume that), use that equivalent when seeing if
331 a secondary reload is needed since whether or not a reload is needed
332 might be sensitive to the form of the MEM. */
334 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
335 && reg_equiv_mem[REGNO (x)] != 0)
336 x = reg_equiv_mem[REGNO (x)];
338 #ifdef SECONDARY_INPUT_RELOAD_CLASS
340 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
343 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
345 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
348 /* If we don't need any secondary registers, go away; the rest of the
349 values won't be used. */
350 if (class == NO_REGS)
353 /* Get a possible insn to use. If the predicate doesn't accept X, don't
356 icode = (in_p ? reload_in_optab[(int) reload_mode]
357 : reload_out_optab[(int) reload_mode]);
359 if (icode != CODE_FOR_nothing
360 && insn_operand_predicate[(int) icode][in_p]
361 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
362 icode = CODE_FOR_nothing;
364 /* If we will be using an insn, see if it can directly handle the reload
365 register we will be using. If it can, the secondary reload is for a
366 scratch register. If it can't, we will use the secondary reload for
367 an intermediate register and require a tertiary reload for the scratch
370 if (icode != CODE_FOR_nothing)
372 /* If IN_P is non-zero, the reload register will be the output in
373 operand 0. If IN_P is zero, the reload register will be the input
374 in operand 1. Outputs should have an initial "=", which we must
377 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
378 enum reg_class insn_class
379 = (insn_letter == 'r' ? GENERAL_REGS
380 : REG_CLASS_FROM_LETTER (insn_letter));
382 if (insn_class == NO_REGS
383 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
384 /* The scratch register's constraint must start with "=&". */
385 || insn_operand_constraint[(int) icode][2][0] != '='
386 || insn_operand_constraint[(int) icode][2][1] != '&')
389 if (reg_class_subset_p (reload_class, insn_class))
390 mode = insn_operand_mode[(int) icode][2];
393 char t_letter = insn_operand_constraint[(int) icode][2][2];
395 t_mode = insn_operand_mode[(int) icode][2];
396 t_class = (t_letter == 'r' ? GENERAL_REGS
397 : REG_CLASS_FROM_LETTER (t_letter));
399 icode = CODE_FOR_nothing;
405 *ptertiary_class = t_class;
406 *ptertiary_mode = t_mode;
407 *ptertiary_icode = t_icode;
411 #endif /* HAVE_SECONDARY_RELOADS */
413 #ifdef SECONDARY_MEMORY_NEEDED
415 /* Return a memory location that will be used to copy X in mode MODE.
416 If we haven't already made a location for this mode in this insn,
417 call find_reloads_address on the location being returned. */
420 get_secondary_mem (x, mode, opnum, type)
422 enum machine_mode mode;
424 enum reload_type type;
429 /* If MODE is narrower than a word, widen it. This is required because
430 most machines that require these memory locations do not support
431 short load and stores from all registers (e.g., FP registers). We could
432 possibly conditionalize this, but we lose nothing by doing the wider
435 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
436 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
438 /* If we already have made a MEM for this operand in MODE, return it. */
439 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
440 return secondary_memlocs_elim[(int) mode][opnum];
442 /* If this is the first time we've tried to get a MEM for this mode,
443 allocate a new one. `something_changed' in reload will get set
444 by noticing that the frame size has changed. */
446 if (secondary_memlocs[(int) mode] == 0)
448 #ifdef SECONDARY_MEMORY_NEEDED_RTX
449 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
451 secondary_memlocs[(int) mode]
452 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
456 /* Get a version of the address doing any eliminations needed. If that
457 didn't give us a new MEM, make a new one if it isn't valid. */
459 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
460 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
462 if (! mem_valid && loc == secondary_memlocs[(int) mode])
463 loc = copy_rtx (loc);
465 /* The only time the call below will do anything is if the stack
466 offset is too large. In that case IND_LEVELS doesn't matter, so we
467 can just pass a zero. Adjust the type to be the address of the
468 corresponding object. If the address was valid, save the eliminated
469 address. If it wasn't valid, we need to make a reload each time, so
474 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
475 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
478 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
482 secondary_memlocs_elim[(int) mode][opnum] = loc;
486 /* Clear any secondary memory locations we've made. */
489 clear_secondary_mem ()
491 bzero (secondary_memlocs, sizeof secondary_memlocs);
493 #endif /* SECONDARY_MEMORY_NEEDED */
495 /* Record one reload that needs to be performed.
496 IN is an rtx saying where the data are to be found before this instruction.
497 OUT says where they must be stored after the instruction.
498 (IN is zero for data not read, and OUT is zero for data not written.)
499 INLOC and OUTLOC point to the places in the instructions where
500 IN and OUT were found.
501 If IN and OUT are both non-zero, it means the same register must be used
502 to reload both IN and OUT.
504 CLASS is a register class required for the reloaded data.
505 INMODE is the machine mode that the instruction requires
506 for the reg that replaces IN and OUTMODE is likewise for OUT.
508 If IN is zero, then OUT's location and mode should be passed as
511 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
513 OPTIONAL nonzero means this reload does not need to be performed:
514 it can be discarded if that is more convenient.
516 OPNUM and TYPE say what the purpose of this reload is.
518 The return value is the reload-number for this reload.
520 If both IN and OUT are nonzero, in some rare cases we might
521 want to make two separate reloads. (Actually we never do this now.)
522 Therefore, the reload-number for OUT is stored in
523 output_reloadnum when we return; the return value applies to IN.
524 Usually (presently always), when IN and OUT are nonzero,
525 the two reload-numbers are equal, but the caller should be careful to
529 push_reload (in, out, inloc, outloc, class,
530 inmode, outmode, strict_low, optional, opnum, type)
531 register rtx in, out;
533 enum reg_class class;
534 enum machine_mode inmode, outmode;
538 enum reload_type type;
542 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
543 int secondary_reload = -1;
544 enum insn_code secondary_icode = CODE_FOR_nothing;
546 /* Compare two RTX's. */
547 #define MATCHES(x, y) \
548 (x == y || (x != 0 && (GET_CODE (x) == REG \
549 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
550 : rtx_equal_p (x, y) && ! side_effects_p (x))))
552 /* Indicates if two reloads purposes are for similar enough things that we
553 can merge their reloads. */
554 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
555 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
556 || ((when1) == (when2) && (op1) == (op2)) \
557 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
558 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
559 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
560 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
561 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
563 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
564 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
565 ((when1) != (when2) \
566 || ! ((op1) == (op2) \
567 || (when1) == RELOAD_FOR_INPUT \
568 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
569 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
571 /* INMODE and/or OUTMODE could be VOIDmode if no mode
572 has been specified for the operand. In that case,
573 use the operand's mode as the mode to reload. */
574 if (inmode == VOIDmode && in != 0)
575 inmode = GET_MODE (in);
576 if (outmode == VOIDmode && out != 0)
577 outmode = GET_MODE (out);
579 /* If IN is a pseudo register everywhere-equivalent to a constant, and
580 it is not in a hard register, reload straight from the constant,
581 since we want to get rid of such pseudo registers.
582 Often this is done earlier, but not always in find_reloads_address. */
583 if (in != 0 && GET_CODE (in) == REG)
585 register int regno = REGNO (in);
587 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
588 && reg_equiv_constant[regno] != 0)
589 in = reg_equiv_constant[regno];
592 /* Likewise for OUT. Of course, OUT will never be equivalent to
593 an actual constant, but it might be equivalent to a memory location
594 (in the case of a parameter). */
595 if (out != 0 && GET_CODE (out) == REG)
597 register int regno = REGNO (out);
599 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
600 && reg_equiv_constant[regno] != 0)
601 out = reg_equiv_constant[regno];
604 /* If we have a read-write operand with an address side-effect,
605 change either IN or OUT so the side-effect happens only once. */
606 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
608 if (GET_CODE (XEXP (in, 0)) == POST_INC
609 || GET_CODE (XEXP (in, 0)) == POST_DEC)
610 in = gen_rtx (MEM, GET_MODE (in), XEXP (XEXP (in, 0), 0));
611 if (GET_CODE (XEXP (in, 0)) == PRE_INC
612 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
613 out = gen_rtx (MEM, GET_MODE (out), XEXP (XEXP (out, 0), 0));
616 /* If we are reloading a (SUBREG constant ...), really reload just the
617 inside expression in its own mode.
618 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
619 a pseudo and hence will become a MEM) with M1 wider than M2 and the
620 register is a pseudo, also reload the inside expression.
621 For machines that extend byte loads, do this for any SUBREG of a pseudo
622 where both M1 and M2 are a word or smaller unless they are the same
624 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
625 either M1 is not valid for R or M2 is wider than a word but we only
626 need one word to store an M2-sized quantity in R.
627 (However, if OUT is nonzero, we need to reload the reg *and*
628 the subreg, so do nothing here, and let following statement handle it.)
630 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
631 we can't handle it here because CONST_INT does not indicate a mode.
633 Similarly, we must reload the inside expression if we have a
634 STRICT_LOW_PART (presumably, in == out in the cas).
636 Also reload the inner expression if it does not require a secondary
637 reload but the SUBREG does. */
639 if (in != 0 && GET_CODE (in) == SUBREG
640 && (CONSTANT_P (SUBREG_REG (in))
642 || (((GET_CODE (SUBREG_REG (in)) == REG
643 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
644 || GET_CODE (SUBREG_REG (in)) == MEM)
645 #if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
646 && GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
647 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) <= UNITS_PER_WORD
648 && (GET_MODE_SIZE (inmode)
649 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
651 && (GET_MODE_SIZE (inmode)
652 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
655 || (GET_CODE (SUBREG_REG (in)) == REG
656 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
657 /* The case where out is nonzero
658 is handled differently in the following statement. */
659 && (out == 0 || SUBREG_WORD (in) == 0)
660 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
661 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
663 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
665 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
666 GET_MODE (SUBREG_REG (in)))))
667 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in))
670 #ifdef SECONDARY_INPUT_RELOAD_CLASS
671 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
672 && (SECONDARY_INPUT_RELOAD_CLASS (class,
673 GET_MODE (SUBREG_REG (in)),
679 in_subreg_loc = inloc;
680 inloc = &SUBREG_REG (in);
682 #if ! defined(BYTE_LOADS_ZERO_EXTEND) && ! defined(BYTE_LOADS_SIGN_EXTEND)
683 if (GET_CODE (in) == MEM)
684 /* This is supposed to happen only for paradoxical subregs made by
685 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
686 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
689 inmode = GET_MODE (in);
692 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
693 either M1 is not valid for R or M2 is wider than a word but we only
694 need one word to store an M2-sized quantity in R.
696 However, we must reload the inner reg *as well as* the subreg in
699 if (in != 0 && GET_CODE (in) == SUBREG
700 && GET_CODE (SUBREG_REG (in)) == REG
701 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
702 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in)), inmode)
703 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
704 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
706 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
708 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
709 GET_MODE (SUBREG_REG (in)))))))
711 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
712 GENERAL_REGS, VOIDmode, VOIDmode, 0, 0, opnum, type);
716 /* Similarly for paradoxical and problematical SUBREGs on the output.
717 Note that there is no reason we need worry about the previous value
718 of SUBREG_REG (out); even if wider than out,
719 storing in a subreg is entitled to clobber it all
720 (except in the case of STRICT_LOW_PART,
721 and in that case the constraint should label it input-output.) */
722 if (out != 0 && GET_CODE (out) == SUBREG
723 && (CONSTANT_P (SUBREG_REG (out))
725 || (((GET_CODE (SUBREG_REG (out)) == REG
726 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
727 || GET_CODE (SUBREG_REG (out)) == MEM)
728 #if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
729 && GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
730 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) <= UNITS_PER_WORD
731 && (GET_MODE_SIZE (outmode)
732 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
734 && (GET_MODE_SIZE (outmode)
735 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
738 || (GET_CODE (SUBREG_REG (out)) == REG
739 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
740 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
741 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
743 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
745 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
746 GET_MODE (SUBREG_REG (out)))))
747 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out))
748 + SUBREG_WORD (out)),
750 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
751 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
752 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
753 GET_MODE (SUBREG_REG (out)),
759 out_subreg_loc = outloc;
760 outloc = &SUBREG_REG (out);
762 #if ! defined(BYTE_LOADS_ZERO_EXTEND) && ! defined(BYTE_LOADS_SIGN_EXTEND)
763 if (GET_CODE (out) == MEM
764 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
767 outmode = GET_MODE (out);
770 /* If IN appears in OUT, we can't share any input-only reload for IN. */
771 if (in != 0 && out != 0 && GET_CODE (out) == MEM
772 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
773 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
776 /* If IN is a SUBREG of a hard register, make a new REG. This
777 simplifies some of the cases below. */
779 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
780 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
781 in = gen_rtx (REG, GET_MODE (in),
782 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
784 /* Similarly for OUT. */
785 if (out != 0 && GET_CODE (out) == SUBREG
786 && GET_CODE (SUBREG_REG (out)) == REG
787 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
788 out = gen_rtx (REG, GET_MODE (out),
789 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
791 /* Narrow down the class of register wanted if that is
792 desirable on this machine for efficiency. */
794 class = PREFERRED_RELOAD_CLASS (in, class);
796 /* Output reloads may need analogous treatment, different in detail. */
797 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
799 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
802 /* Make sure we use a class that can handle the actual pseudo
803 inside any subreg. For example, on the 386, QImode regs
804 can appear within SImode subregs. Although GENERAL_REGS
805 can handle SImode, QImode needs a smaller class. */
806 #ifdef LIMIT_RELOAD_CLASS
808 class = LIMIT_RELOAD_CLASS (inmode, class);
809 else if (in != 0 && GET_CODE (in) == SUBREG)
810 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
813 class = LIMIT_RELOAD_CLASS (outmode, class);
814 if (out != 0 && GET_CODE (out) == SUBREG)
815 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
818 /* Verify that this class is at least possible for the mode that
820 if (this_insn_is_asm)
822 enum machine_mode mode;
823 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
827 if (mode == VOIDmode)
829 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
836 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
837 if (HARD_REGNO_MODE_OK (i, mode)
838 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
840 int nregs = HARD_REGNO_NREGS (i, mode);
843 for (j = 1; j < nregs; j++)
844 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
849 if (i == FIRST_PSEUDO_REGISTER)
851 error_for_asm (this_insn, "impossible register constraint in `asm'");
856 if (class == NO_REGS)
859 /* We can use an existing reload if the class is right
860 and at least one of IN and OUT is a match
861 and the other is at worst neutral.
862 (A zero compared against anything is neutral.)
864 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
865 for the same thing since that can cause us to need more reload registers
866 than we otherwise would. */
868 for (i = 0; i < n_reloads; i++)
869 if ((reg_class_subset_p (class, reload_reg_class[i])
870 || reg_class_subset_p (reload_reg_class[i], class))
871 /* If the existing reload has a register, it must fit our class. */
872 && (reload_reg_rtx[i] == 0
873 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
874 true_regnum (reload_reg_rtx[i])))
875 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
876 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
878 (out != 0 && MATCHES (reload_out[i], out)
879 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
880 && (reg_class_size[(int) class] == 1
881 #ifdef SMALL_REGISTER_CLASSES
885 && MERGABLE_RELOADS (type, reload_when_needed[i],
886 opnum, reload_opnum[i]))
889 /* Reloading a plain reg for input can match a reload to postincrement
890 that reg, since the postincrement's value is the right value.
891 Likewise, it can match a preincrement reload, since we regard
892 the preincrementation as happening before any ref in this insn
895 for (i = 0; i < n_reloads; i++)
896 if ((reg_class_subset_p (class, reload_reg_class[i])
897 || reg_class_subset_p (reload_reg_class[i], class))
898 /* If the existing reload has a register, it must fit our class. */
899 && (reload_reg_rtx[i] == 0
900 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
901 true_regnum (reload_reg_rtx[i])))
902 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
903 && ((GET_CODE (in) == REG
904 && (GET_CODE (reload_in[i]) == POST_INC
905 || GET_CODE (reload_in[i]) == POST_DEC
906 || GET_CODE (reload_in[i]) == PRE_INC
907 || GET_CODE (reload_in[i]) == PRE_DEC)
908 && MATCHES (XEXP (reload_in[i], 0), in))
910 (GET_CODE (reload_in[i]) == REG
911 && (GET_CODE (in) == POST_INC
912 || GET_CODE (in) == POST_DEC
913 || GET_CODE (in) == PRE_INC
914 || GET_CODE (in) == PRE_DEC)
915 && MATCHES (XEXP (in, 0), reload_in[i])))
916 && (reg_class_size[(int) class] == 1
917 #ifdef SMALL_REGISTER_CLASSES
921 && MERGABLE_RELOADS (type, reload_when_needed[i],
922 opnum, reload_opnum[i]))
924 /* Make sure reload_in ultimately has the increment,
925 not the plain register. */
926 if (GET_CODE (in) == REG)
933 #ifdef HAVE_SECONDARY_RELOADS
934 enum reg_class secondary_class = NO_REGS;
935 enum reg_class secondary_out_class = NO_REGS;
936 enum machine_mode secondary_mode = inmode;
937 enum machine_mode secondary_out_mode = outmode;
938 enum insn_code secondary_icode;
939 enum insn_code secondary_out_icode = CODE_FOR_nothing;
940 enum reg_class tertiary_class = NO_REGS;
941 enum reg_class tertiary_out_class = NO_REGS;
942 enum machine_mode tertiary_mode;
943 enum machine_mode tertiary_out_mode;
944 enum insn_code tertiary_icode;
945 enum insn_code tertiary_out_icode = CODE_FOR_nothing;
946 int tertiary_reload = -1;
948 /* See if we need a secondary reload register to move between
949 CLASS and IN or CLASS and OUT. Get the modes and icodes to
950 use for each of them if so. */
952 #ifdef SECONDARY_INPUT_RELOAD_CLASS
955 = find_secondary_reload (in, class, inmode, 1, &secondary_icode,
956 &secondary_mode, &tertiary_class,
957 &tertiary_icode, &tertiary_mode);
960 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
961 if (out != 0 && GET_CODE (out) != SCRATCH)
963 = find_secondary_reload (out, class, outmode, 0,
964 &secondary_out_icode, &secondary_out_mode,
965 &tertiary_out_class, &tertiary_out_icode,
969 /* We can only record one secondary and one tertiary reload. If both
970 IN and OUT need secondary reloads, we can only make an in-out
971 reload if neither need an insn and if the classes are compatible.
972 If they aren't, all we can do is abort since making two separate
973 reloads is invalid. */
975 if (secondary_class != NO_REGS && secondary_out_class != NO_REGS
976 && reg_class_subset_p (secondary_out_class, secondary_class))
977 secondary_class = secondary_out_class;
979 if (secondary_class != NO_REGS && secondary_out_class != NO_REGS
980 && (! reg_class_subset_p (secondary_class, secondary_out_class)
981 || secondary_icode != CODE_FOR_nothing
982 || secondary_out_icode != CODE_FOR_nothing))
985 /* If we need a secondary reload for OUT but not IN, copy the
987 if (secondary_class == NO_REGS && secondary_out_class != NO_REGS)
989 secondary_class = secondary_out_class;
990 secondary_icode = secondary_out_icode;
991 tertiary_class = tertiary_out_class;
992 tertiary_icode = tertiary_out_icode;
993 tertiary_mode = tertiary_out_mode;
996 if (secondary_class != NO_REGS)
998 /* Secondary reloads don't conflict as badly as the primary object
999 being reload. Specifically, we can always treat them as
1000 being for an input or output address and hence allowed to be
1001 reused in the same manner such address components could be
1002 reused. This is used as the reload_type for our secondary
1005 enum reload_type secondary_type
1006 = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
1007 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
1010 /* This case isn't valid, so fail. Reload is allowed to use the
1011 same register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT
1012 reloads, but in the case of a secondary register, we actually
1013 need two different registers for correct code. We fail here
1014 to prevent the possibility of silently generating incorrect code
1017 The convention is that secondary input reloads are valid only if
1018 the secondary_class is different from class. If you have such
1019 a case, you can not use secondary reloads, you must work around
1020 the problem some other way. */
1022 if (type == RELOAD_FOR_INPUT && secondary_class == class)
1025 /* If we need a tertiary reload, see if we have one we can reuse
1026 or else make one. */
1028 if (tertiary_class != NO_REGS)
1030 for (tertiary_reload = 0; tertiary_reload < n_reloads;
1032 if (reload_secondary_p[tertiary_reload]
1033 && (reg_class_subset_p (tertiary_class,
1034 reload_reg_class[tertiary_reload])
1035 || reg_class_subset_p (reload_reg_class[tertiary_reload],
1037 && ((reload_inmode[tertiary_reload] == tertiary_mode)
1038 || reload_inmode[tertiary_reload] == VOIDmode)
1039 && ((reload_outmode[tertiary_reload] == tertiary_mode)
1040 || reload_outmode[tertiary_reload] == VOIDmode)
1041 && (reload_secondary_icode[tertiary_reload]
1042 == CODE_FOR_nothing)
1043 && (reg_class_size[(int) tertiary_class] == 1
1044 #ifdef SMALL_REGISTER_CLASSES
1048 && MERGABLE_RELOADS (secondary_type,
1049 reload_when_needed[tertiary_reload],
1050 opnum, reload_opnum[tertiary_reload]))
1052 if (tertiary_mode != VOIDmode)
1053 reload_inmode[tertiary_reload] = tertiary_mode;
1054 if (tertiary_out_mode != VOIDmode)
1055 reload_outmode[tertiary_reload] = tertiary_mode;
1056 if (reg_class_subset_p (tertiary_class,
1057 reload_reg_class[tertiary_reload]))
1058 reload_reg_class[tertiary_reload] = tertiary_class;
1059 if (MERGE_TO_OTHER (secondary_type,
1060 reload_when_needed[tertiary_reload],
1062 reload_opnum[tertiary_reload]))
1063 reload_when_needed[tertiary_reload] = RELOAD_OTHER;
1064 reload_opnum[tertiary_reload]
1065 = MIN (reload_opnum[tertiary_reload], opnum);
1066 reload_optional[tertiary_reload] &= optional;
1067 reload_secondary_p[tertiary_reload] = 1;
1070 if (tertiary_reload == n_reloads)
1072 /* We need to make a new tertiary reload for this register
1074 reload_in[tertiary_reload] = reload_out[tertiary_reload] = 0;
1075 reload_reg_class[tertiary_reload] = tertiary_class;
1076 reload_inmode[tertiary_reload] = tertiary_mode;
1077 reload_outmode[tertiary_reload] = tertiary_mode;
1078 reload_reg_rtx[tertiary_reload] = 0;
1079 reload_optional[tertiary_reload] = optional;
1080 reload_inc[tertiary_reload] = 0;
1081 /* Maybe we could combine these, but it seems too tricky. */
1082 reload_nocombine[tertiary_reload] = 1;
1083 reload_in_reg[tertiary_reload] = 0;
1084 reload_opnum[tertiary_reload] = opnum;
1085 reload_when_needed[tertiary_reload] = secondary_type;
1086 reload_secondary_reload[tertiary_reload] = -1;
1087 reload_secondary_icode[tertiary_reload] = CODE_FOR_nothing;
1088 reload_secondary_p[tertiary_reload] = 1;
1095 /* See if we can reuse an existing secondary reload. */
1096 for (secondary_reload = 0; secondary_reload < n_reloads;
1098 if (reload_secondary_p[secondary_reload]
1099 && (reg_class_subset_p (secondary_class,
1100 reload_reg_class[secondary_reload])
1101 || reg_class_subset_p (reload_reg_class[secondary_reload],
1103 && ((reload_inmode[secondary_reload] == secondary_mode)
1104 || reload_inmode[secondary_reload] == VOIDmode)
1105 && ((reload_outmode[secondary_reload] == secondary_out_mode)
1106 || reload_outmode[secondary_reload] == VOIDmode)
1107 && reload_secondary_reload[secondary_reload] == tertiary_reload
1108 && reload_secondary_icode[secondary_reload] == tertiary_icode
1109 && (reg_class_size[(int) secondary_class] == 1
1110 #ifdef SMALL_REGISTER_CLASSES
1114 && MERGABLE_RELOADS (secondary_type,
1115 reload_when_needed[secondary_reload],
1116 opnum, reload_opnum[secondary_reload]))
1118 if (secondary_mode != VOIDmode)
1119 reload_inmode[secondary_reload] = secondary_mode;
1120 if (secondary_out_mode != VOIDmode)
1121 reload_outmode[secondary_reload] = secondary_out_mode;
1122 if (reg_class_subset_p (secondary_class,
1123 reload_reg_class[secondary_reload]))
1124 reload_reg_class[secondary_reload] = secondary_class;
1125 if (MERGE_TO_OTHER (secondary_type,
1126 reload_when_needed[secondary_reload],
1127 opnum, reload_opnum[secondary_reload]))
1128 reload_when_needed[secondary_reload] = RELOAD_OTHER;
1129 reload_opnum[secondary_reload]
1130 = MIN (reload_opnum[secondary_reload], opnum);
1131 reload_optional[secondary_reload] &= optional;
1132 reload_secondary_p[secondary_reload] = 1;
1135 if (secondary_reload == n_reloads)
1137 /* We need to make a new secondary reload for this register
1139 reload_in[secondary_reload] = reload_out[secondary_reload] = 0;
1140 reload_reg_class[secondary_reload] = secondary_class;
1141 reload_inmode[secondary_reload] = secondary_mode;
1142 reload_outmode[secondary_reload] = secondary_out_mode;
1143 reload_reg_rtx[secondary_reload] = 0;
1144 reload_optional[secondary_reload] = optional;
1145 reload_inc[secondary_reload] = 0;
1146 /* Maybe we could combine these, but it seems too tricky. */
1147 reload_nocombine[secondary_reload] = 1;
1148 reload_in_reg[secondary_reload] = 0;
1149 reload_opnum[secondary_reload] = opnum;
1150 reload_when_needed[secondary_reload] = secondary_type;
1151 reload_secondary_reload[secondary_reload] = tertiary_reload;
1152 reload_secondary_icode[secondary_reload] = tertiary_icode;
1153 reload_secondary_p[secondary_reload] = 1;
1158 #ifdef SECONDARY_MEMORY_NEEDED
1159 /* If we need a memory location to copy between the two
1160 reload regs, set it up now. */
1162 if (in != 0 && secondary_icode == CODE_FOR_nothing
1163 && SECONDARY_MEMORY_NEEDED (secondary_class, class, inmode))
1164 get_secondary_mem (in, inmode, opnum, type);
1166 if (out != 0 && secondary_icode == CODE_FOR_nothing
1167 && SECONDARY_MEMORY_NEEDED (class, secondary_class, outmode))
1168 get_secondary_mem (out, outmode, opnum, type);
1174 /* We found no existing reload suitable for re-use.
1175 So add an additional reload. */
1178 reload_out[i] = out;
1179 reload_reg_class[i] = class;
1180 reload_inmode[i] = inmode;
1181 reload_outmode[i] = outmode;
1182 reload_reg_rtx[i] = 0;
1183 reload_optional[i] = optional;
1185 reload_nocombine[i] = 0;
1186 reload_in_reg[i] = inloc ? *inloc : 0;
1187 reload_opnum[i] = opnum;
1188 reload_when_needed[i] = type;
1189 reload_secondary_reload[i] = secondary_reload;
1190 reload_secondary_icode[i] = secondary_icode;
1191 reload_secondary_p[i] = 0;
1195 #ifdef SECONDARY_MEMORY_NEEDED
1196 /* If a memory location is needed for the copy, make one. */
1197 if (in != 0 && GET_CODE (in) == REG
1198 && REGNO (in) < FIRST_PSEUDO_REGISTER
1199 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1201 get_secondary_mem (in, inmode, opnum, type);
1203 if (out != 0 && GET_CODE (out) == REG
1204 && REGNO (out) < FIRST_PSEUDO_REGISTER
1205 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1207 get_secondary_mem (out, outmode, opnum, type);
1212 /* We are reusing an existing reload,
1213 but we may have additional information for it.
1214 For example, we may now have both IN and OUT
1215 while the old one may have just one of them. */
1217 if (inmode != VOIDmode)
1218 reload_inmode[i] = inmode;
1219 if (outmode != VOIDmode)
1220 reload_outmode[i] = outmode;
1224 reload_out[i] = out;
1225 if (reg_class_subset_p (class, reload_reg_class[i]))
1226 reload_reg_class[i] = class;
1227 reload_optional[i] &= optional;
1228 if (MERGE_TO_OTHER (type, reload_when_needed[i],
1229 opnum, reload_opnum[i]))
1230 reload_when_needed[i] = RELOAD_OTHER;
1231 reload_opnum[i] = MIN (reload_opnum[i], opnum);
1234 /* If the ostensible rtx being reload differs from the rtx found
1235 in the location to substitute, this reload is not safe to combine
1236 because we cannot reliably tell whether it appears in the insn. */
1238 if (in != 0 && in != *inloc)
1239 reload_nocombine[i] = 1;
1242 /* This was replaced by changes in find_reloads_address_1 and the new
1243 function inc_for_reload, which go with a new meaning of reload_inc. */
1245 /* If this is an IN/OUT reload in an insn that sets the CC,
1246 it must be for an autoincrement. It doesn't work to store
1247 the incremented value after the insn because that would clobber the CC.
1248 So we must do the increment of the value reloaded from,
1249 increment it, store it back, then decrement again. */
1250 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1254 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1255 /* If we did not find a nonzero amount-to-increment-by,
1256 that contradicts the belief that IN is being incremented
1257 in an address in this insn. */
1258 if (reload_inc[i] == 0)
1263 /* If we will replace IN and OUT with the reload-reg,
1264 record where they are located so that substitution need
1265 not do a tree walk. */
1267 if (replace_reloads)
1271 register struct replacement *r = &replacements[n_replacements++];
1273 r->subreg_loc = in_subreg_loc;
1277 if (outloc != 0 && outloc != inloc)
1279 register struct replacement *r = &replacements[n_replacements++];
1282 r->subreg_loc = out_subreg_loc;
1287 /* If this reload is just being introduced and it has both
1288 an incoming quantity and an outgoing quantity that are
1289 supposed to be made to match, see if either one of the two
1290 can serve as the place to reload into.
1292 If one of them is acceptable, set reload_reg_rtx[i]
1295 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1297 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1299 reload_reg_class[i], i);
1301 /* If the outgoing register already contains the same value
1302 as the incoming one, we can dispense with loading it.
1303 The easiest way to tell the caller that is to give a phony
1304 value for the incoming operand (same as outgoing one). */
1305 if (reload_reg_rtx[i] == out
1306 && (GET_CODE (in) == REG || CONSTANT_P (in))
1307 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1308 static_reload_reg_p, i, inmode))
1312 /* If this is an input reload and the operand contains a register that
1313 dies in this insn and is used nowhere else, see if it is the right class
1314 to be used for this reload. Use it if so. (This occurs most commonly
1315 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1316 this if it is also an output reload that mentions the register unless
1317 the output is a SUBREG that clobbers an entire register.
1319 Note that the operand might be one of the spill regs, if it is a
1320 pseudo reg and we are in a block where spilling has not taken place.
1321 But if there is no spilling in this block, that is OK.
1322 An explicitly used hard reg cannot be a spill reg. */
1324 if (reload_reg_rtx[i] == 0 && in != 0)
1329 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1330 if (REG_NOTE_KIND (note) == REG_DEAD
1331 && GET_CODE (XEXP (note, 0)) == REG
1332 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1333 && reg_mentioned_p (XEXP (note, 0), in)
1334 && ! refers_to_regno_for_reload_p (regno,
1336 + HARD_REGNO_NREGS (regno,
1338 PATTERN (this_insn), inloc)
1339 /* If this is also an output reload, IN cannot be used as
1340 the reload register if it is set in this insn unless IN
1342 && (out == 0 || in == out
1343 || ! hard_reg_set_here_p (regno,
1345 + HARD_REGNO_NREGS (regno,
1347 PATTERN (this_insn)))
1348 /* ??? Why is this code so different from the previous?
1349 Is there any simple coherent way to describe the two together?
1350 What's going on here. */
1352 || (GET_CODE (in) == SUBREG
1353 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1355 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1356 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1357 /* Make sure the operand fits in the reg that dies. */
1358 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1359 && HARD_REGNO_MODE_OK (regno, inmode)
1360 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1361 && HARD_REGNO_MODE_OK (regno, outmode)
1362 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1363 && !fixed_regs[regno])
1365 reload_reg_rtx[i] = gen_rtx (REG, inmode, regno);
1371 output_reloadnum = i;
1376 /* Record an additional place we must replace a value
1377 for which we have already recorded a reload.
1378 RELOADNUM is the value returned by push_reload
1379 when the reload was recorded.
1380 This is used in insn patterns that use match_dup. */
1383 push_replacement (loc, reloadnum, mode)
1386 enum machine_mode mode;
1388 if (replace_reloads)
1390 register struct replacement *r = &replacements[n_replacements++];
1391 r->what = reloadnum;
1398 /* Transfer all replacements that used to be in reload FROM to be in
1402 transfer_replacements (to, from)
1407 for (i = 0; i < n_replacements; i++)
1408 if (replacements[i].what == from)
1409 replacements[i].what = to;
1412 /* If there is only one output reload, and it is not for an earlyclobber
1413 operand, try to combine it with a (logically unrelated) input reload
1414 to reduce the number of reload registers needed.
1416 This is safe if the input reload does not appear in
1417 the value being output-reloaded, because this implies
1418 it is not needed any more once the original insn completes.
1420 If that doesn't work, see we can use any of the registers that
1421 die in this insn as a reload register. We can if it is of the right
1422 class and does not appear in the value being output-reloaded. */
1428 int output_reload = -1;
1431 /* Find the output reload; return unless there is exactly one
1432 and that one is mandatory. */
1434 for (i = 0; i < n_reloads; i++)
1435 if (reload_out[i] != 0)
1437 if (output_reload >= 0)
1442 if (output_reload < 0 || reload_optional[output_reload])
1445 /* An input-output reload isn't combinable. */
1447 if (reload_in[output_reload] != 0)
1450 /* If this reload is for an earlyclobber operand, we can't do anything. */
1452 for (i = 0; i < n_earlyclobbers; i++)
1453 if (reload_out[output_reload] == reload_earlyclobbers[i])
1456 /* Check each input reload; can we combine it? */
1458 for (i = 0; i < n_reloads; i++)
1459 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1460 /* Life span of this reload must not extend past main insn. */
1461 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
1462 && reload_when_needed[i] != RELOAD_OTHER
1463 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
1464 == CLASS_MAX_NREGS (reload_reg_class[output_reload],
1465 reload_outmode[output_reload]))
1466 && reload_inc[i] == 0
1467 && reload_reg_rtx[i] == 0
1468 /* Don't combine two reloads with different secondary reloads. */
1469 && (reload_secondary_reload[i] == reload_secondary_reload[output_reload]
1470 || reload_secondary_reload[i] == -1
1471 || reload_secondary_reload[output_reload] == -1)
1472 #ifdef SECONDARY_MEMORY_NEEDED
1473 /* Likewise for different secondary memory locations. */
1474 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
1475 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
1476 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
1477 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
1479 #ifdef SMALL_REGISTER_CLASSES
1480 && reload_reg_class[i] == reload_reg_class[output_reload]
1482 && (reg_class_subset_p (reload_reg_class[i],
1483 reload_reg_class[output_reload])
1484 || reg_class_subset_p (reload_reg_class[output_reload],
1485 reload_reg_class[i]))
1487 && (MATCHES (reload_in[i], reload_out[output_reload])
1488 /* Args reversed because the first arg seems to be
1489 the one that we imagine being modified
1490 while the second is the one that might be affected. */
1491 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1493 /* However, if the input is a register that appears inside
1494 the output, then we also can't share.
1495 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1496 If the same reload reg is used for both reg 69 and the
1497 result to be stored in memory, then that result
1498 will clobber the address of the memory ref. */
1499 && ! (GET_CODE (reload_in[i]) == REG
1500 && reg_overlap_mentioned_for_reload_p (reload_in[i],
1501 reload_out[output_reload]))))
1502 && (reg_class_size[(int) reload_reg_class[i]]
1503 #ifdef SMALL_REGISTER_CLASSES
1507 /* We will allow making things slightly worse by combining an
1508 input and an output, but no worse than that. */
1509 && (reload_when_needed[i] == RELOAD_FOR_INPUT
1510 || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
1514 /* We have found a reload to combine with! */
1515 reload_out[i] = reload_out[output_reload];
1516 reload_outmode[i] = reload_outmode[output_reload];
1517 /* Mark the old output reload as inoperative. */
1518 reload_out[output_reload] = 0;
1519 /* The combined reload is needed for the entire insn. */
1520 reload_when_needed[i] = RELOAD_OTHER;
1521 /* If the output reload had a secondary reload, copy it. */
1522 if (reload_secondary_reload[output_reload] != -1)
1523 reload_secondary_reload[i] = reload_secondary_reload[output_reload];
1524 #ifdef SECONDARY_MEMORY_NEEDED
1525 /* Copy any secondary MEM. */
1526 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
1527 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
1528 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
1530 /* If required, minimize the register class. */
1531 if (reg_class_subset_p (reload_reg_class[output_reload],
1532 reload_reg_class[i]))
1533 reload_reg_class[i] = reload_reg_class[output_reload];
1535 /* Transfer all replacements from the old reload to the combined. */
1536 for (j = 0; j < n_replacements; j++)
1537 if (replacements[j].what == output_reload)
1538 replacements[j].what = i;
1543 /* If this insn has only one operand that is modified or written (assumed
1544 to be the first), it must be the one corresponding to this reload. It
1545 is safe to use anything that dies in this insn for that output provided
1546 that it does not occur in the output (we already know it isn't an
1547 earlyclobber. If this is an asm insn, give up. */
1549 if (INSN_CODE (this_insn) == -1)
1552 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1553 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1554 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1557 /* See if some hard register that dies in this insn and is not used in
1558 the output is the right class. Only works if the register we pick
1559 up can fully hold our output reload. */
1560 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1561 if (REG_NOTE_KIND (note) == REG_DEAD
1562 && GET_CODE (XEXP (note, 0)) == REG
1563 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1564 reload_out[output_reload])
1565 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1566 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1567 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1568 REGNO (XEXP (note, 0)))
1569 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1570 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1571 && ! fixed_regs[REGNO (XEXP (note, 0))])
1573 reload_reg_rtx[output_reload] = gen_rtx (REG,
1574 reload_outmode[output_reload],
1575 REGNO (XEXP (note, 0)));
1580 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1581 See if one of IN and OUT is a register that may be used;
1582 this is desirable since a spill-register won't be needed.
1583 If so, return the register rtx that proves acceptable.
1585 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1586 CLASS is the register class required for the reload.
1588 If FOR_REAL is >= 0, it is the number of the reload,
1589 and in some cases when it can be discovered that OUT doesn't need
1590 to be computed, clear out reload_out[FOR_REAL].
1592 If FOR_REAL is -1, this should not be done, because this call
1593 is just to see if a register can be found, not to find and install it. */
1596 find_dummy_reload (real_in, real_out, inloc, outloc,
1597 inmode, outmode, class, for_real)
1598 rtx real_in, real_out;
1599 rtx *inloc, *outloc;
1600 enum machine_mode inmode, outmode;
1601 enum reg_class class;
1610 /* If operands exceed a word, we can't use either of them
1611 unless they have the same size. */
1612 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1613 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1614 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1617 /* Find the inside of any subregs. */
1618 while (GET_CODE (out) == SUBREG)
1620 out_offset = SUBREG_WORD (out);
1621 out = SUBREG_REG (out);
1623 while (GET_CODE (in) == SUBREG)
1625 in_offset = SUBREG_WORD (in);
1626 in = SUBREG_REG (in);
1629 /* Narrow down the reg class, the same way push_reload will;
1630 otherwise we might find a dummy now, but push_reload won't. */
1631 class = PREFERRED_RELOAD_CLASS (in, class);
1633 /* See if OUT will do. */
1634 if (GET_CODE (out) == REG
1635 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1637 register int regno = REGNO (out) + out_offset;
1638 int nwords = HARD_REGNO_NREGS (regno, outmode);
1641 /* When we consider whether the insn uses OUT,
1642 ignore references within IN. They don't prevent us
1643 from copying IN into OUT, because those refs would
1644 move into the insn that reloads IN.
1646 However, we only ignore IN in its role as this reload.
1647 If the insn uses IN elsewhere and it contains OUT,
1648 that counts. We can't be sure it's the "same" operand
1649 so it might not go through this reload. */
1651 *inloc = const0_rtx;
1653 if (regno < FIRST_PSEUDO_REGISTER
1654 /* A fixed reg that can overlap other regs better not be used
1655 for reloading in any way. */
1656 #ifdef OVERLAPPING_REGNO_P
1657 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1659 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1660 PATTERN (this_insn), outloc))
1663 for (i = 0; i < nwords; i++)
1664 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1670 if (GET_CODE (real_out) == REG)
1673 value = gen_rtx (REG, outmode, regno);
1680 /* Consider using IN if OUT was not acceptable
1681 or if OUT dies in this insn (like the quotient in a divmod insn).
1682 We can't use IN unless it is dies in this insn,
1683 which means we must know accurately which hard regs are live.
1684 Also, the result can't go in IN if IN is used within OUT. */
1685 if (hard_regs_live_known
1686 && GET_CODE (in) == REG
1687 && REGNO (in) < FIRST_PSEUDO_REGISTER
1689 || find_reg_note (this_insn, REG_UNUSED, real_out))
1690 && find_reg_note (this_insn, REG_DEAD, real_in)
1691 && !fixed_regs[REGNO (in)]
1692 && HARD_REGNO_MODE_OK (REGNO (in),
1693 /* The only case where out and real_out might
1694 have different modes is where real_out
1695 is a subreg, and in that case, out
1697 (GET_MODE (out) != VOIDmode
1698 ? GET_MODE (out) : outmode)))
1700 register int regno = REGNO (in) + in_offset;
1701 int nwords = HARD_REGNO_NREGS (regno, inmode);
1703 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
1704 && ! hard_reg_set_here_p (regno, regno + nwords,
1705 PATTERN (this_insn)))
1708 for (i = 0; i < nwords; i++)
1709 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1715 /* If we were going to use OUT as the reload reg
1716 and changed our mind, it means OUT is a dummy that
1717 dies here. So don't bother copying value to it. */
1718 if (for_real >= 0 && value == real_out)
1719 reload_out[for_real] = 0;
1720 if (GET_CODE (real_in) == REG)
1723 value = gen_rtx (REG, inmode, regno);
1731 /* This page contains subroutines used mainly for determining
1732 whether the IN or an OUT of a reload can serve as the
1735 /* Return 1 if expression X alters a hard reg in the range
1736 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1737 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1738 X should be the body of an instruction. */
1741 hard_reg_set_here_p (beg_regno, end_regno, x)
1742 register int beg_regno, end_regno;
1745 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1747 register rtx op0 = SET_DEST (x);
1748 while (GET_CODE (op0) == SUBREG)
1749 op0 = SUBREG_REG (op0);
1750 if (GET_CODE (op0) == REG)
1752 register int r = REGNO (op0);
1753 /* See if this reg overlaps range under consideration. */
1755 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1759 else if (GET_CODE (x) == PARALLEL)
1761 register int i = XVECLEN (x, 0) - 1;
1763 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1770 /* Return 1 if ADDR is a valid memory address for mode MODE,
1771 and check that each pseudo reg has the proper kind of
1775 strict_memory_address_p (mode, addr)
1776 enum machine_mode mode;
1779 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
1786 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1787 if they are the same hard reg, and has special hacks for
1788 autoincrement and autodecrement.
1789 This is specifically intended for find_reloads to use
1790 in determining whether two operands match.
1791 X is the operand whose number is the lower of the two.
1793 The value is 2 if Y contains a pre-increment that matches
1794 a non-incrementing address in X. */
1796 /* ??? To be completely correct, we should arrange to pass
1797 for X the output operand and for Y the input operand.
1798 For now, we assume that the output operand has the lower number
1799 because that is natural in (SET output (... input ...)). */
1802 operands_match_p (x, y)
1806 register RTX_CODE code = GET_CODE (x);
1812 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
1813 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
1814 && GET_CODE (SUBREG_REG (y)) == REG)))
1820 i = REGNO (SUBREG_REG (x));
1821 if (i >= FIRST_PSEUDO_REGISTER)
1823 i += SUBREG_WORD (x);
1828 if (GET_CODE (y) == SUBREG)
1830 j = REGNO (SUBREG_REG (y));
1831 if (j >= FIRST_PSEUDO_REGISTER)
1833 j += SUBREG_WORD (y);
1838 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1839 multiple hard register group, so that for example (reg:DI 0) and
1840 (reg:SI 1) will be considered the same register. */
1841 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
1842 && i < FIRST_PSEUDO_REGISTER)
1843 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
1844 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
1845 && j < FIRST_PSEUDO_REGISTER)
1846 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
1850 /* If two operands must match, because they are really a single
1851 operand of an assembler insn, then two postincrements are invalid
1852 because the assembler insn would increment only once.
1853 On the other hand, an postincrement matches ordinary indexing
1854 if the postincrement is the output operand. */
1855 if (code == POST_DEC || code == POST_INC)
1856 return operands_match_p (XEXP (x, 0), y);
1857 /* Two preincrements are invalid
1858 because the assembler insn would increment only once.
1859 On the other hand, an preincrement matches ordinary indexing
1860 if the preincrement is the input operand.
1861 In this case, return 2, since some callers need to do special
1862 things when this happens. */
1863 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
1864 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
1868 /* Now we have disposed of all the cases
1869 in which different rtx codes can match. */
1870 if (code != GET_CODE (y))
1872 if (code == LABEL_REF)
1873 return XEXP (x, 0) == XEXP (y, 0);
1874 if (code == SYMBOL_REF)
1875 return XSTR (x, 0) == XSTR (y, 0);
1877 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1879 if (GET_MODE (x) != GET_MODE (y))
1882 /* Compare the elements. If any pair of corresponding elements
1883 fail to match, return 0 for the whole things. */
1886 fmt = GET_RTX_FORMAT (code);
1887 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1893 if (XWINT (x, i) != XWINT (y, i))
1898 if (XINT (x, i) != XINT (y, i))
1903 val = operands_match_p (XEXP (x, i), XEXP (y, i));
1906 /* If any subexpression returns 2,
1907 we should return 2 if we are successful. */
1915 /* It is believed that rtx's at this level will never
1916 contain anything but integers and other rtx's,
1917 except for within LABEL_REFs and SYMBOL_REFs. */
1922 return 1 + success_2;
1925 /* Return the number of times character C occurs in string S. */
1928 n_occurrences (c, s)
1938 /* Describe the range of registers or memory referenced by X.
1939 If X is a register, set REG_FLAG and put the first register
1940 number into START and the last plus one into END.
1941 If X is a memory reference, put a base address into BASE
1942 and a range of integer offsets into START and END.
1943 If X is pushing on the stack, we can assume it causes no trouble,
1944 so we set the SAFE field. */
1946 static struct decomposition
1950 struct decomposition val;
1955 if (GET_CODE (x) == MEM)
1957 rtx base, offset = 0;
1958 rtx addr = XEXP (x, 0);
1960 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
1961 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
1963 val.base = XEXP (addr, 0);
1964 val.start = - GET_MODE_SIZE (GET_MODE (x));
1965 val.end = GET_MODE_SIZE (GET_MODE (x));
1966 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
1970 if (GET_CODE (addr) == CONST)
1972 addr = XEXP (addr, 0);
1975 if (GET_CODE (addr) == PLUS)
1977 if (CONSTANT_P (XEXP (addr, 0)))
1979 base = XEXP (addr, 1);
1980 offset = XEXP (addr, 0);
1982 else if (CONSTANT_P (XEXP (addr, 1)))
1984 base = XEXP (addr, 0);
1985 offset = XEXP (addr, 1);
1992 offset = const0_rtx;
1994 if (GET_CODE (offset) == CONST)
1995 offset = XEXP (offset, 0);
1996 if (GET_CODE (offset) == PLUS)
1998 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2000 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 1));
2001 offset = XEXP (offset, 0);
2003 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2005 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 0));
2006 offset = XEXP (offset, 1);
2010 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
2011 offset = const0_rtx;
2014 else if (GET_CODE (offset) != CONST_INT)
2016 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
2017 offset = const0_rtx;
2020 if (all_const && GET_CODE (base) == PLUS)
2021 base = gen_rtx (CONST, GET_MODE (base), base);
2023 if (GET_CODE (offset) != CONST_INT)
2026 val.start = INTVAL (offset);
2027 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2031 else if (GET_CODE (x) == REG)
2034 val.start = true_regnum (x);
2037 /* A pseudo with no hard reg. */
2038 val.start = REGNO (x);
2039 val.end = val.start + 1;
2043 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2045 else if (GET_CODE (x) == SUBREG)
2047 if (GET_CODE (SUBREG_REG (x)) != REG)
2048 /* This could be more precise, but it's good enough. */
2049 return decompose (SUBREG_REG (x));
2051 val.start = true_regnum (x);
2053 return decompose (SUBREG_REG (x));
2056 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2058 else if (CONSTANT_P (x)
2059 /* This hasn't been assigned yet, so it can't conflict yet. */
2060 || GET_CODE (x) == SCRATCH)
2067 /* Return 1 if altering Y will not modify the value of X.
2068 Y is also described by YDATA, which should be decompose (Y). */
2071 immune_p (x, y, ydata)
2073 struct decomposition ydata;
2075 struct decomposition xdata;
2078 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
2082 if (GET_CODE (y) != MEM)
2084 /* If Y is memory and X is not, Y can't affect X. */
2085 if (GET_CODE (x) != MEM)
2088 xdata = decompose (x);
2090 if (! rtx_equal_p (xdata.base, ydata.base))
2092 /* If bases are distinct symbolic constants, there is no overlap. */
2093 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2095 /* Constants and stack slots never overlap. */
2096 if (CONSTANT_P (xdata.base)
2097 && (ydata.base == frame_pointer_rtx
2098 || ydata.base == stack_pointer_rtx))
2100 if (CONSTANT_P (ydata.base)
2101 && (xdata.base == frame_pointer_rtx
2102 || xdata.base == stack_pointer_rtx))
2104 /* If either base is variable, we don't know anything. */
2109 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2112 /* Similar, but calls decompose. */
2115 safe_from_earlyclobber (op, clobber)
2118 struct decomposition early_data;
2120 early_data = decompose (clobber);
2121 return immune_p (op, clobber, early_data);
2124 /* Main entry point of this file: search the body of INSN
2125 for values that need reloading and record them with push_reload.
2126 REPLACE nonzero means record also where the values occur
2127 so that subst_reloads can be used.
2129 IND_LEVELS says how many levels of indirection are supported by this
2130 machine; a value of zero means that a memory reference is not a valid
2133 LIVE_KNOWN says we have valid information about which hard
2134 regs are live at each point in the program; this is true when
2135 we are called from global_alloc but false when stupid register
2136 allocation has been done.
2138 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2139 which is nonnegative if the reg has been commandeered for reloading into.
2140 It is copied into STATIC_RELOAD_REG_P and referenced from there
2141 by various subroutines. */
2144 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2146 int replace, ind_levels;
2148 short *reload_reg_p;
2150 #ifdef REGISTER_CONSTRAINTS
2152 register int insn_code_number;
2155 /* These are the constraints for the insn. We don't change them. */
2156 char *constraints1[MAX_RECOG_OPERANDS];
2157 /* These start out as the constraints for the insn
2158 and they are chewed up as we consider alternatives. */
2159 char *constraints[MAX_RECOG_OPERANDS];
2160 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2162 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2163 char pref_or_nothing[MAX_RECOG_OPERANDS];
2164 /* Nonzero for a MEM operand whose entire address needs a reload. */
2165 int address_reloaded[MAX_RECOG_OPERANDS];
2166 /* Value of enum reload_type to use for operand. */
2167 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2168 /* Value of enum reload_type to use within address of operand. */
2169 enum reload_type address_type[MAX_RECOG_OPERANDS];
2170 /* Save the usage of each operand. */
2171 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2172 int no_input_reloads = 0, no_output_reloads = 0;
2174 int this_alternative[MAX_RECOG_OPERANDS];
2175 char this_alternative_win[MAX_RECOG_OPERANDS];
2176 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2177 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2178 int this_alternative_matches[MAX_RECOG_OPERANDS];
2180 int goal_alternative[MAX_RECOG_OPERANDS];
2181 int this_alternative_number;
2182 int goal_alternative_number;
2183 int operand_reloadnum[MAX_RECOG_OPERANDS];
2184 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2185 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2186 char goal_alternative_win[MAX_RECOG_OPERANDS];
2187 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2188 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2189 int goal_alternative_swapped;
2192 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2193 rtx substed_operand[MAX_RECOG_OPERANDS];
2194 rtx body = PATTERN (insn);
2195 rtx set = single_set (insn);
2196 int goal_earlyclobber, this_earlyclobber;
2197 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2200 this_insn_is_asm = 0; /* Tentative. */
2204 n_earlyclobbers = 0;
2205 replace_reloads = replace;
2206 hard_regs_live_known = live_known;
2207 static_reload_reg_p = reload_reg_p;
2209 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2210 neither are insns that SET cc0. Insns that use CC0 are not allowed
2211 to have any input reloads. */
2212 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2213 no_output_reloads = 1;
2216 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2217 no_input_reloads = 1;
2218 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2219 no_output_reloads = 1;
2222 #ifdef SECONDARY_MEMORY_NEEDED
2223 /* The eliminated forms of any secondary memory locations are per-insn, so
2224 clear them out here. */
2226 bzero (secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2229 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2230 Make OPERANDS point to a vector of operand values.
2231 Make OPERAND_LOCS point to a vector of pointers to
2232 where the operands were found.
2233 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2234 constraint-strings for this insn.
2235 Return if the insn needs no reload processing. */
2237 switch (GET_CODE (body))
2247 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2248 is cheap to move between them. If it is not, there may not be an insn
2249 to do the copy, so we may need a reload. */
2250 if (GET_CODE (SET_DEST (body)) == REG
2251 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2252 && GET_CODE (SET_SRC (body)) == REG
2253 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2254 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2255 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2259 reload_n_operands = noperands = asm_noperands (body);
2262 /* This insn is an `asm' with operands. */
2264 insn_code_number = -1;
2265 this_insn_is_asm = 1;
2267 /* expand_asm_operands makes sure there aren't too many operands. */
2268 if (noperands > MAX_RECOG_OPERANDS)
2271 /* Now get the operand values and constraints out of the insn. */
2273 decode_asm_operands (body, recog_operand, recog_operand_loc,
2274 constraints, operand_mode);
2277 bcopy (constraints, constraints1, noperands * sizeof (char *));
2278 n_alternatives = n_occurrences (',', constraints[0]) + 1;
2279 for (i = 1; i < noperands; i++)
2280 if (n_alternatives != n_occurrences (',', constraints[i]) + 1)
2282 error_for_asm (insn, "operand constraints differ in number of alternatives");
2283 /* Avoid further trouble with this insn. */
2284 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
2293 /* Ordinary insn: recognize it, get the operands via insn_extract
2294 and get the constraints. */
2296 insn_code_number = recog_memoized (insn);
2297 if (insn_code_number < 0)
2298 fatal_insn_not_found (insn);
2300 reload_n_operands = noperands = insn_n_operands[insn_code_number];
2301 n_alternatives = insn_n_alternatives[insn_code_number];
2302 /* Just return "no reloads" if insn has no operands with constraints. */
2303 if (n_alternatives == 0)
2305 insn_extract (insn);
2306 for (i = 0; i < noperands; i++)
2308 constraints[i] = constraints1[i]
2309 = insn_operand_constraint[insn_code_number][i];
2310 operand_mode[i] = insn_operand_mode[insn_code_number][i];
2319 /* If we will need to know, later, whether some pair of operands
2320 are the same, we must compare them now and save the result.
2321 Reloading the base and index registers will clobber them
2322 and afterward they will fail to match. */
2324 for (i = 0; i < noperands; i++)
2329 substed_operand[i] = recog_operand[i];
2332 modified[i] = RELOAD_READ;
2334 /* Scan this operand's constraint to see if it is an output operand,
2335 an in-out operand, is commutative, or should match another. */
2340 modified[i] = RELOAD_WRITE;
2342 modified[i] = RELOAD_READ_WRITE;
2345 /* The last operand should not be marked commutative. */
2346 if (i == noperands - 1)
2348 if (this_insn_is_asm)
2349 warning_for_asm (this_insn,
2350 "`%%' constraint used with last operand");
2357 else if (c >= '0' && c <= '9')
2360 operands_match[c][i]
2361 = operands_match_p (recog_operand[c], recog_operand[i]);
2363 /* An operand may not match itself. */
2366 if (this_insn_is_asm)
2367 warning_for_asm (this_insn,
2368 "operand %d has constraint %d", i, c);
2373 /* If C can be commuted with C+1, and C might need to match I,
2374 then C+1 might also need to match I. */
2375 if (commutative >= 0)
2377 if (c == commutative || c == commutative + 1)
2379 int other = c + (c == commutative ? 1 : -1);
2380 operands_match[other][i]
2381 = operands_match_p (recog_operand[other], recog_operand[i]);
2383 if (i == commutative || i == commutative + 1)
2385 int other = i + (i == commutative ? 1 : -1);
2386 operands_match[c][other]
2387 = operands_match_p (recog_operand[c], recog_operand[other]);
2389 /* Note that C is supposed to be less than I.
2390 No need to consider altering both C and I because in
2391 that case we would alter one into the other. */
2397 /* Examine each operand that is a memory reference or memory address
2398 and reload parts of the addresses into index registers.
2399 Also here any references to pseudo regs that didn't get hard regs
2400 but are equivalent to constants get replaced in the insn itself
2401 with those constants. Nobody will ever see them again.
2403 Finally, set up the preferred classes of each operand. */
2405 for (i = 0; i < noperands; i++)
2407 register RTX_CODE code = GET_CODE (recog_operand[i]);
2409 address_reloaded[i] = 0;
2410 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2411 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2414 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2415 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2418 if (constraints[i][0] == 'p')
2420 find_reloads_address (VOIDmode, NULL_PTR,
2421 recog_operand[i], recog_operand_loc[i],
2422 i, operand_type[i], ind_levels);
2423 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2425 else if (code == MEM)
2427 if (find_reloads_address (GET_MODE (recog_operand[i]),
2428 recog_operand_loc[i],
2429 XEXP (recog_operand[i], 0),
2430 &XEXP (recog_operand[i], 0),
2431 i, address_type[i], ind_levels))
2432 address_reloaded[i] = 1;
2433 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2435 else if (code == SUBREG)
2436 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
2437 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2440 && &SET_DEST (set) == recog_operand_loc[i]);
2441 else if (code == REG)
2443 /* This is equivalent to calling find_reloads_toplev.
2444 The code is duplicated for speed.
2445 When we find a pseudo always equivalent to a constant,
2446 we replace it by the constant. We must be sure, however,
2447 that we don't try to replace it in the insn in which it
2449 register int regno = REGNO (recog_operand[i]);
2450 if (reg_equiv_constant[regno] != 0
2451 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2452 substed_operand[i] = recog_operand[i]
2453 = reg_equiv_constant[regno];
2454 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2455 that feeds this insn. */
2456 if (reg_equiv_mem[regno] != 0)
2457 substed_operand[i] = recog_operand[i]
2458 = reg_equiv_mem[regno];
2460 if (reg_equiv_address[regno] != 0)
2462 /* If reg_equiv_address is not a constant address, copy it,
2463 since it may be shared. */
2464 rtx address = reg_equiv_address[regno];
2466 if (rtx_varies_p (address))
2467 address = copy_rtx (address);
2469 /* If this is an output operand, we must output a CLOBBER
2470 after INSN so find_equiv_reg knows REGNO is being written.
2471 Mark this insn specially, do we can put our output reloads
2474 if (modified[i] != RELOAD_READ)
2475 PUT_MODE (emit_insn_after (gen_rtx (CLOBBER, VOIDmode,
2480 *recog_operand_loc[i] = recog_operand[i]
2481 = gen_rtx (MEM, GET_MODE (recog_operand[i]), address);
2482 RTX_UNCHANGING_P (recog_operand[i])
2483 = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
2484 find_reloads_address (GET_MODE (recog_operand[i]),
2485 recog_operand_loc[i],
2486 XEXP (recog_operand[i], 0),
2487 &XEXP (recog_operand[i], 0),
2488 i, address_type[i], ind_levels);
2489 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2492 /* If the operand is still a register (we didn't replace it with an
2493 equivalent), get the preferred class to reload it into. */
2494 code = GET_CODE (recog_operand[i]);
2496 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
2497 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2499 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
2500 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
2503 /* If this is simply a copy from operand 1 to operand 0, merge the
2504 preferred classes for the operands. */
2505 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2506 && recog_operand[1] == SET_SRC (set))
2508 preferred_class[0] = preferred_class[1]
2509 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2510 pref_or_nothing[0] |= pref_or_nothing[1];
2511 pref_or_nothing[1] |= pref_or_nothing[0];
2514 /* Now see what we need for pseudo-regs that didn't get hard regs
2515 or got the wrong kind of hard reg. For this, we must consider
2516 all the operands together against the register constraints. */
2518 best = MAX_RECOG_OPERANDS + 300;
2521 goal_alternative_swapped = 0;
2524 /* The constraints are made of several alternatives.
2525 Each operand's constraint looks like foo,bar,... with commas
2526 separating the alternatives. The first alternatives for all
2527 operands go together, the second alternatives go together, etc.
2529 First loop over alternatives. */
2531 for (this_alternative_number = 0;
2532 this_alternative_number < n_alternatives;
2533 this_alternative_number++)
2535 /* Loop over operands for one constraint alternative. */
2536 /* LOSERS counts those that don't fit this alternative
2537 and would require loading. */
2539 /* BAD is set to 1 if it some operand can't fit this alternative
2540 even after reloading. */
2542 /* REJECT is a count of how undesirable this alternative says it is
2543 if any reloading is required. If the alternative matches exactly
2544 then REJECT is ignored, but otherwise it gets this much
2545 counted against it in addition to the reloading needed. Each
2546 ? counts three times here since we want the disparaging caused by
2547 a bad register class to only count 1/3 as much. */
2550 this_earlyclobber = 0;
2552 for (i = 0; i < noperands; i++)
2554 register char *p = constraints[i];
2555 register int win = 0;
2556 /* 0 => this operand can be reloaded somehow for this alternative */
2558 /* 0 => this operand can be reloaded if the alternative allows regs. */
2561 register rtx operand = recog_operand[i];
2563 /* Nonzero means this is a MEM that must be reloaded into a reg
2564 regardless of what the constraint says. */
2565 int force_reload = 0;
2567 int earlyclobber = 0;
2569 /* If the operand is a SUBREG, extract
2570 the REG or MEM (or maybe even a constant) within.
2571 (Constants can occur as a result of reg_equiv_constant.) */
2573 while (GET_CODE (operand) == SUBREG)
2575 offset += SUBREG_WORD (operand);
2576 operand = SUBREG_REG (operand);
2577 /* Force reload if this is a constant or if there may may
2578 be a problem accessing OPERAND in the outer mode. */
2579 if (CONSTANT_P (operand)
2580 #if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
2581 /* If we have a SUBREG where both the inner and outer
2582 modes are different size but no wider than a word,
2583 combine.c has made assumptions about the behavior of
2584 the machine in such register access. If the data is,
2585 in fact, in memory we must always load using the size
2586 assumed to be in the register and let the insn do the
2587 different-sized accesses. */
2588 || ((GET_CODE (operand) == MEM
2589 || (GET_CODE (operand)== REG
2590 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2591 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2592 && GET_MODE_SIZE (GET_MODE (operand)) <= UNITS_PER_WORD
2593 && (GET_MODE_SIZE (operand_mode[i])
2594 != GET_MODE_SIZE (GET_MODE (operand))))
2596 /* Subreg of a hard reg which can't handle the subreg's mode
2597 or which would handle that mode in the wrong number of
2598 registers for subregging to work. */
2599 || (GET_CODE (operand) == REG
2600 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2601 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2602 && (GET_MODE_SIZE (GET_MODE (operand))
2604 && ((GET_MODE_SIZE (GET_MODE (operand))
2606 != HARD_REGNO_NREGS (REGNO (operand),
2607 GET_MODE (operand))))
2608 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2613 this_alternative[i] = (int) NO_REGS;
2614 this_alternative_win[i] = 0;
2615 this_alternative_offmemok[i] = 0;
2616 this_alternative_earlyclobber[i] = 0;
2617 this_alternative_matches[i] = -1;
2619 /* An empty constraint or empty alternative
2620 allows anything which matched the pattern. */
2621 if (*p == 0 || *p == ',')
2624 /* Scan this alternative's specs for this operand;
2625 set WIN if the operand fits any letter in this alternative.
2626 Otherwise, clear BADOP if this operand could
2627 fit some letter after reloads,
2628 or set WINREG if this operand could fit after reloads
2629 provided the constraint allows some registers. */
2631 while (*p && (c = *p++) != ',')
2640 /* The last operand should not be marked commutative. */
2641 if (i != noperands - 1)
2654 /* Ignore rest of this alternative as far as
2655 reloading is concerned. */
2656 while (*p && *p != ',') p++;
2665 this_alternative_matches[i] = c;
2666 /* We are supposed to match a previous operand.
2667 If we do, we win if that one did.
2668 If we do not, count both of the operands as losers.
2669 (This is too conservative, since most of the time
2670 only a single reload insn will be needed to make
2671 the two operands win. As a result, this alternative
2672 may be rejected when it is actually desirable.) */
2673 if ((swapped && (c != commutative || i != commutative + 1))
2674 /* If we are matching as if two operands were swapped,
2675 also pretend that operands_match had been computed
2677 But if I is the second of those and C is the first,
2678 don't exchange them, because operands_match is valid
2679 only on one side of its diagonal. */
2681 [(c == commutative || c == commutative + 1)
2682 ? 2*commutative + 1 - c : c]
2683 [(i == commutative || i == commutative + 1)
2684 ? 2*commutative + 1 - i : i])
2685 : operands_match[c][i])
2686 win = this_alternative_win[c];
2689 /* Operands don't match. */
2691 /* Retroactively mark the operand we had to match
2692 as a loser, if it wasn't already. */
2693 if (this_alternative_win[c])
2695 this_alternative_win[c] = 0;
2696 if (this_alternative[c] == (int) NO_REGS)
2698 /* But count the pair only once in the total badness of
2699 this alternative, if the pair can be a dummy reload. */
2701 = find_dummy_reload (recog_operand[i], recog_operand[c],
2702 recog_operand_loc[i], recog_operand_loc[c],
2703 insn_operand_mode[insn_code_number][i],
2704 insn_operand_mode[insn_code_number][c],
2705 this_alternative[c], -1);
2710 /* This can be fixed with reloads if the operand
2711 we are supposed to match can be fixed with reloads. */
2713 this_alternative[i] = this_alternative[c];
2717 /* All necessary reloads for an address_operand
2718 were handled in find_reloads_address. */
2719 this_alternative[i] = (int) ALL_REGS;
2726 if (GET_CODE (operand) == MEM
2727 || (GET_CODE (operand) == REG
2728 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2729 && reg_renumber[REGNO (operand)] < 0))
2731 if (CONSTANT_P (operand))
2736 if (GET_CODE (operand) == MEM
2737 && ! address_reloaded[i]
2738 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2739 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2744 if (GET_CODE (operand) == MEM
2745 && ! address_reloaded[i]
2746 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2747 || GET_CODE (XEXP (operand, 0)) == POST_INC))
2751 /* Memory operand whose address is not offsettable. */
2755 if (GET_CODE (operand) == MEM
2756 && ! (ind_levels ? offsettable_memref_p (operand)
2757 : offsettable_nonstrict_memref_p (operand))
2758 /* Certain mem addresses will become offsettable
2759 after they themselves are reloaded. This is important;
2760 we don't want our own handling of unoffsettables
2761 to override the handling of reg_equiv_address. */
2762 && !(GET_CODE (XEXP (operand, 0)) == REG
2764 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
2768 /* Memory operand whose address is offsettable. */
2772 if ((GET_CODE (operand) == MEM
2773 /* If IND_LEVELS, find_reloads_address won't reload a
2774 pseudo that didn't get a hard reg, so we have to
2775 reject that case. */
2776 && (ind_levels ? offsettable_memref_p (operand)
2777 : offsettable_nonstrict_memref_p (operand)))
2778 /* Certain mem addresses will become offsettable
2779 after they themselves are reloaded. This is important;
2780 we don't want our own handling of unoffsettables
2781 to override the handling of reg_equiv_address. */
2782 || (GET_CODE (operand) == MEM
2783 && GET_CODE (XEXP (operand, 0)) == REG
2785 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))
2786 || (GET_CODE (operand) == REG
2787 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2788 && reg_renumber[REGNO (operand)] < 0))
2790 if (CONSTANT_P (operand) || GET_CODE (operand) == MEM)
2796 /* Output operand that is stored before the need for the
2797 input operands (and their index registers) is over. */
2798 earlyclobber = 1, this_earlyclobber = 1;
2802 /* Match any floating double constant, but only if
2803 we can examine the bits of it reliably. */
2804 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
2805 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
2806 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
2808 if (GET_CODE (operand) == CONST_DOUBLE)
2813 if (GET_CODE (operand) == CONST_DOUBLE)
2819 if (GET_CODE (operand) == CONST_DOUBLE
2820 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
2825 if (GET_CODE (operand) == CONST_INT
2826 || (GET_CODE (operand) == CONST_DOUBLE
2827 && GET_MODE (operand) == VOIDmode))
2830 if (CONSTANT_P (operand)
2831 #ifdef LEGITIMATE_PIC_OPERAND_P
2832 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
2839 if (GET_CODE (operand) == CONST_INT
2840 || (GET_CODE (operand) == CONST_DOUBLE
2841 && GET_MODE (operand) == VOIDmode))
2853 if (GET_CODE (operand) == CONST_INT
2854 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
2864 /* A PLUS is never a valid operand, but reload can make
2865 it from a register when eliminating registers. */
2866 && GET_CODE (operand) != PLUS
2867 /* A SCRATCH is not a valid operand. */
2868 && GET_CODE (operand) != SCRATCH
2869 #ifdef LEGITIMATE_PIC_OPERAND_P
2870 && (! CONSTANT_P (operand)
2872 || LEGITIMATE_PIC_OPERAND_P (operand))
2874 && (GENERAL_REGS == ALL_REGS
2875 || GET_CODE (operand) != REG
2876 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
2877 && reg_renumber[REGNO (operand)] < 0)))
2879 /* Drop through into 'r' case */
2883 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
2886 #ifdef EXTRA_CONSTRAINT
2892 if (EXTRA_CONSTRAINT (operand, c))
2899 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
2902 if (GET_MODE (operand) == BLKmode)
2905 if (GET_CODE (operand) == REG
2906 && reg_fits_class_p (operand, this_alternative[i],
2907 offset, GET_MODE (recog_operand[i])))
2914 /* If this operand could be handled with a reg,
2915 and some reg is allowed, then this operand can be handled. */
2916 if (winreg && this_alternative[i] != (int) NO_REGS)
2919 /* Record which operands fit this alternative. */
2920 this_alternative_earlyclobber[i] = earlyclobber;
2921 if (win && ! force_reload)
2922 this_alternative_win[i] = 1;
2925 this_alternative_offmemok[i] = offmemok;
2929 /* Alternative loses if it has no regs for a reg operand. */
2930 if (GET_CODE (operand) == REG
2931 && this_alternative[i] == (int) NO_REGS
2932 && this_alternative_matches[i] < 0)
2935 /* Alternative loses if it requires a type of reload not
2936 permitted for this insn. We can always reload SCRATCH
2937 and objects with a REG_UNUSED note. */
2938 if (GET_CODE (operand) != SCRATCH
2939 && modified[i] != RELOAD_READ && no_output_reloads
2940 && ! find_reg_note (insn, REG_UNUSED, operand))
2942 else if (modified[i] != RELOAD_WRITE && no_input_reloads)
2945 /* We prefer to reload pseudos over reloading other things,
2946 since such reloads may be able to be eliminated later.
2947 If we are reloading a SCRATCH, we won't be generating any
2948 insns, just using a register, so it is also preferred.
2949 So bump REJECT in other cases. */
2950 if (! (GET_CODE (operand) == REG
2951 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
2952 && GET_CODE (operand) != SCRATCH)
2956 /* If this operand is a pseudo register that didn't get a hard
2957 reg and this alternative accepts some register, see if the
2958 class that we want is a subset of the preferred class for this
2959 register. If not, but it intersects that class, use the
2960 preferred class instead. If it does not intersect the preferred
2961 class, show that usage of this alternative should be discouraged;
2962 it will be discouraged more still if the register is `preferred
2963 or nothing'. We do this because it increases the chance of
2964 reusing our spill register in a later insn and avoiding a pair
2965 of memory stores and loads.
2967 Don't bother with this if this alternative will accept this
2970 Don't do this for a multiword operand, if
2971 we have to worry about small classes, because making reg groups
2972 harder to allocate is asking for trouble.
2974 Don't do this if the preferred class has only one register
2975 because we might otherwise exhaust the class. */
2978 if (! win && this_alternative[i] != (int) NO_REGS
2979 #ifdef SMALL_REGISTER_CLASSES
2980 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2982 && reg_class_size[(int) preferred_class[i]] > 1)
2984 if (! reg_class_subset_p (this_alternative[i],
2985 preferred_class[i]))
2987 /* Since we don't have a way of forming the intersection,
2988 we just do something special if the preferred class
2989 is a subset of the class we have; that's the most
2990 common case anyway. */
2991 if (reg_class_subset_p (preferred_class[i],
2992 this_alternative[i]))
2993 this_alternative[i] = (int) preferred_class[i];
2995 reject += (1 + pref_or_nothing[i]);
3000 /* Now see if any output operands that are marked "earlyclobber"
3001 in this alternative conflict with any input operands
3002 or any memory addresses. */
3004 for (i = 0; i < noperands; i++)
3005 if (this_alternative_earlyclobber[i]
3006 && this_alternative_win[i])
3008 struct decomposition early_data;
3010 early_data = decompose (recog_operand[i]);
3012 if (modified[i] == RELOAD_READ)
3014 if (this_insn_is_asm)
3015 warning_for_asm (this_insn,
3016 "`&' constraint used with input operand");
3022 if (this_alternative[i] == NO_REGS)
3024 this_alternative_earlyclobber[i] = 0;
3025 if (this_insn_is_asm)
3026 error_for_asm (this_insn,
3027 "`&' constraint used with no register class");
3032 for (j = 0; j < noperands; j++)
3033 /* Is this an input operand or a memory ref? */
3034 if ((GET_CODE (recog_operand[j]) == MEM
3035 || modified[j] != RELOAD_WRITE)
3037 /* Ignore things like match_operator operands. */
3038 && *constraints1[j] != 0
3039 /* Don't count an input operand that is constrained to match
3040 the early clobber operand. */
3041 && ! (this_alternative_matches[j] == i
3042 && rtx_equal_p (recog_operand[i], recog_operand[j]))
3043 /* Is it altered by storing the earlyclobber operand? */
3044 && !immune_p (recog_operand[j], recog_operand[i], early_data))
3046 /* If the output is in a single-reg class,
3047 it's costly to reload it, so reload the input instead. */
3048 if (reg_class_size[this_alternative[i]] == 1
3049 && (GET_CODE (recog_operand[j]) == REG
3050 || GET_CODE (recog_operand[j]) == SUBREG))
3053 this_alternative_win[j] = 0;
3058 /* If an earlyclobber operand conflicts with something,
3059 it must be reloaded, so request this and count the cost. */
3063 this_alternative_win[i] = 0;
3064 for (j = 0; j < noperands; j++)
3065 if (this_alternative_matches[j] == i
3066 && this_alternative_win[j])
3068 this_alternative_win[j] = 0;
3074 /* If one alternative accepts all the operands, no reload required,
3075 choose that alternative; don't consider the remaining ones. */
3078 /* Unswap these so that they are never swapped at `finish'. */
3079 if (commutative >= 0)
3081 recog_operand[commutative] = substed_operand[commutative];
3082 recog_operand[commutative + 1]
3083 = substed_operand[commutative + 1];
3085 for (i = 0; i < noperands; i++)
3087 goal_alternative_win[i] = 1;
3088 goal_alternative[i] = this_alternative[i];
3089 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3090 goal_alternative_matches[i] = this_alternative_matches[i];
3091 goal_alternative_earlyclobber[i]
3092 = this_alternative_earlyclobber[i];
3094 goal_alternative_number = this_alternative_number;
3095 goal_alternative_swapped = swapped;
3096 goal_earlyclobber = this_earlyclobber;
3100 /* REJECT, set by the ! and ? constraint characters and when a register
3101 would be reloaded into a non-preferred class, discourages the use of
3102 this alternative for a reload goal. REJECT is incremented by three
3103 for each ? and one for each non-preferred class. */
3104 losers = losers * 3 + reject;
3106 /* If this alternative can be made to work by reloading,
3107 and it needs less reloading than the others checked so far,
3108 record it as the chosen goal for reloading. */
3109 if (! bad && best > losers)
3111 for (i = 0; i < noperands; i++)
3113 goal_alternative[i] = this_alternative[i];
3114 goal_alternative_win[i] = this_alternative_win[i];
3115 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3116 goal_alternative_matches[i] = this_alternative_matches[i];
3117 goal_alternative_earlyclobber[i]
3118 = this_alternative_earlyclobber[i];
3120 goal_alternative_swapped = swapped;
3122 goal_alternative_number = this_alternative_number;
3123 goal_earlyclobber = this_earlyclobber;
3127 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3128 then we need to try each alternative twice,
3129 the second time matching those two operands
3130 as if we had exchanged them.
3131 To do this, really exchange them in operands.
3133 If we have just tried the alternatives the second time,
3134 return operands to normal and drop through. */
3136 if (commutative >= 0)
3141 register enum reg_class tclass;
3144 recog_operand[commutative] = substed_operand[commutative + 1];
3145 recog_operand[commutative + 1] = substed_operand[commutative];
3147 tclass = preferred_class[commutative];
3148 preferred_class[commutative] = preferred_class[commutative + 1];
3149 preferred_class[commutative + 1] = tclass;
3151 t = pref_or_nothing[commutative];
3152 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3153 pref_or_nothing[commutative + 1] = t;
3155 bcopy (constraints1, constraints, noperands * sizeof (char *));
3160 recog_operand[commutative] = substed_operand[commutative];
3161 recog_operand[commutative + 1] = substed_operand[commutative + 1];
3165 /* The operands don't meet the constraints.
3166 goal_alternative describes the alternative
3167 that we could reach by reloading the fewest operands.
3168 Reload so as to fit it. */
3170 if (best == MAX_RECOG_OPERANDS + 300)
3172 /* No alternative works with reloads?? */
3173 if (insn_code_number >= 0)
3175 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3176 /* Avoid further trouble with this insn. */
3177 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3182 /* Jump to `finish' from above if all operands are valid already.
3183 In that case, goal_alternative_win is all 1. */
3186 /* Right now, for any pair of operands I and J that are required to match,
3188 goal_alternative_matches[J] is I.
3189 Set up goal_alternative_matched as the inverse function:
3190 goal_alternative_matched[I] = J. */
3192 for (i = 0; i < noperands; i++)
3193 goal_alternative_matched[i] = -1;
3195 for (i = 0; i < noperands; i++)
3196 if (! goal_alternative_win[i]
3197 && goal_alternative_matches[i] >= 0)
3198 goal_alternative_matched[goal_alternative_matches[i]] = i;
3200 /* If the best alternative is with operands 1 and 2 swapped,
3201 consider them swapped before reporting the reloads. Update the
3202 operand numbers of any reloads already pushed. */
3204 if (goal_alternative_swapped)
3208 tem = substed_operand[commutative];
3209 substed_operand[commutative] = substed_operand[commutative + 1];
3210 substed_operand[commutative + 1] = tem;
3211 tem = recog_operand[commutative];
3212 recog_operand[commutative] = recog_operand[commutative + 1];
3213 recog_operand[commutative + 1] = tem;
3215 for (i = 0; i < n_reloads; i++)
3217 if (reload_opnum[i] == commutative)
3218 reload_opnum[i] = commutative + 1;
3219 else if (reload_opnum[i] == commutative + 1)
3220 reload_opnum[i] = commutative;
3224 /* Perform whatever substitutions on the operands we are supposed
3225 to make due to commutativity or replacement of registers
3226 with equivalent constants or memory slots. */
3228 for (i = 0; i < noperands; i++)
3230 *recog_operand_loc[i] = substed_operand[i];
3231 /* While we are looping on operands, initialize this. */
3232 operand_reloadnum[i] = -1;
3234 /* If this is an earlyclobber operand, we need to widen the scope.
3235 The reload must remain valid from the start of the insn being
3236 reloaded until after the operand is stored into its destination.
3237 We approximate this with RELOAD_OTHER even though we know that we
3238 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3240 One special case that is worth checking is when we have an
3241 output that is earlyclobber but isn't used past the insn (typically
3242 a SCRATCH). In this case, we only need have the reload live
3243 through the insn itself, but not for any of our input or output
3246 In any case, anything needed to address this operand can remain
3247 however they were previously categorized. */
3249 if (goal_alternative_earlyclobber[i])
3251 = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
3252 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3255 /* Any constants that aren't allowed and can't be reloaded
3256 into registers are here changed into memory references. */
3257 for (i = 0; i < noperands; i++)
3258 if (! goal_alternative_win[i]
3259 && CONSTANT_P (recog_operand[i])
3260 && (PREFERRED_RELOAD_CLASS (recog_operand[i],
3261 (enum reg_class) goal_alternative[i])
3263 && operand_mode[i] != VOIDmode)
3265 *recog_operand_loc[i] = recog_operand[i]
3266 = find_reloads_toplev (force_const_mem (operand_mode[i],
3268 i, address_type[i], ind_levels, 0);
3269 if (alternative_allows_memconst (constraints1[i],
3270 goal_alternative_number))
3271 goal_alternative_win[i] = 1;
3274 /* Now record reloads for all the operands that need them. */
3275 for (i = 0; i < noperands; i++)
3276 if (! goal_alternative_win[i])
3278 /* Operands that match previous ones have already been handled. */
3279 if (goal_alternative_matches[i] >= 0)
3281 /* Handle an operand with a nonoffsettable address
3282 appearing where an offsettable address will do
3283 by reloading the address into a base register. */
3284 else if (goal_alternative_matched[i] == -1
3285 && goal_alternative_offmemok[i]
3286 && GET_CODE (recog_operand[i]) == MEM)
3288 operand_reloadnum[i]
3289 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
3290 &XEXP (recog_operand[i], 0), NULL_PTR,
3291 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
3292 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3293 reload_inc[operand_reloadnum[i]]
3294 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
3296 /* If this operand is an output, we will have made any
3297 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3298 now we are treating part of the operand as an input, so
3299 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3301 if (operand_type[i] == RELOAD_FOR_OUTPUT)
3302 for (j = 0; j < n_reloads; j++)
3303 if (reload_opnum[j] == i
3304 && reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3305 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
3307 else if (goal_alternative_matched[i] == -1)
3308 operand_reloadnum[i] =
3309 push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3310 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3311 (modified[i] != RELOAD_WRITE ?
3312 recog_operand_loc[i] : 0),
3313 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
3314 (enum reg_class) goal_alternative[i],
3315 (modified[i] == RELOAD_WRITE
3316 ? VOIDmode : operand_mode[i]),
3317 (modified[i] == RELOAD_READ
3318 ? VOIDmode : operand_mode[i]),
3319 (insn_code_number < 0 ? 0
3320 : insn_operand_strict_low[insn_code_number][i]),
3321 0, i, operand_type[i]);
3322 /* In a matching pair of operands, one must be input only
3323 and the other must be output only.
3324 Pass the input operand as IN and the other as OUT. */
3325 else if (modified[i] == RELOAD_READ
3326 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3328 operand_reloadnum[i]
3329 = push_reload (recog_operand[i],
3330 recog_operand[goal_alternative_matched[i]],
3331 recog_operand_loc[i],
3332 recog_operand_loc[goal_alternative_matched[i]],
3333 (enum reg_class) goal_alternative[i],
3335 operand_mode[goal_alternative_matched[i]],
3336 0, 0, i, RELOAD_OTHER);
3337 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3339 else if (modified[i] == RELOAD_WRITE
3340 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3342 operand_reloadnum[goal_alternative_matched[i]]
3343 = push_reload (recog_operand[goal_alternative_matched[i]],
3345 recog_operand_loc[goal_alternative_matched[i]],
3346 recog_operand_loc[i],
3347 (enum reg_class) goal_alternative[i],
3348 operand_mode[goal_alternative_matched[i]],
3350 0, 0, i, RELOAD_OTHER);
3351 operand_reloadnum[i] = output_reloadnum;
3353 else if (insn_code_number >= 0)
3357 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3358 /* Avoid further trouble with this insn. */
3359 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3364 else if (goal_alternative_matched[i] < 0
3365 && goal_alternative_matches[i] < 0
3368 /* For each non-matching operand that's a MEM or a pseudo-register
3369 that didn't get a hard register, make an optional reload.
3370 This may get done even if the insn needs no reloads otherwise. */
3372 rtx operand = recog_operand[i];
3374 while (GET_CODE (operand) == SUBREG)
3375 operand = XEXP (operand, 0);
3376 if ((GET_CODE (operand) == MEM
3377 || (GET_CODE (operand) == REG
3378 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3379 && (enum reg_class) goal_alternative[i] != NO_REGS
3380 && ! no_input_reloads
3381 /* Optional output reloads don't do anything and we mustn't
3382 make in-out reloads on insns that are not permitted output
3384 && (modified[i] == RELOAD_READ
3385 || (modified[i] == RELOAD_READ_WRITE && ! no_output_reloads)))
3386 operand_reloadnum[i]
3387 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3388 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
3389 (modified[i] != RELOAD_WRITE
3390 ? recog_operand_loc[i] : 0),
3391 (modified[i] != RELOAD_READ
3392 ? recog_operand_loc[i] : 0),
3393 (enum reg_class) goal_alternative[i],
3394 (modified[i] == RELOAD_WRITE
3395 ? VOIDmode : operand_mode[i]),
3396 (modified[i] == RELOAD_READ
3397 ? VOIDmode : operand_mode[i]),
3398 (insn_code_number < 0 ? 0
3399 : insn_operand_strict_low[insn_code_number][i]),
3400 1, i, operand_type[i]);
3402 else if (goal_alternative_matches[i] >= 0
3403 && goal_alternative_win[goal_alternative_matches[i]]
3404 && modified[i] == RELOAD_READ
3405 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3406 && ! no_input_reloads && ! no_output_reloads
3409 /* Similarly, make an optional reload for a pair of matching
3410 objects that are in MEM or a pseudo that didn't get a hard reg. */
3412 rtx operand = recog_operand[i];
3414 while (GET_CODE (operand) == SUBREG)
3415 operand = XEXP (operand, 0);
3416 if ((GET_CODE (operand) == MEM
3417 || (GET_CODE (operand) == REG
3418 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3419 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3421 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3422 = push_reload (recog_operand[goal_alternative_matches[i]],
3424 recog_operand_loc[goal_alternative_matches[i]],
3425 recog_operand_loc[i],
3426 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3427 operand_mode[goal_alternative_matches[i]],
3429 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3432 /* Record the values of the earlyclobber operands for the caller. */
3433 if (goal_earlyclobber)
3434 for (i = 0; i < noperands; i++)
3435 if (goal_alternative_earlyclobber[i])
3436 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3438 /* If this insn pattern contains any MATCH_DUP's, make sure that
3439 they will be substituted if the operands they match are substituted.
3440 Also do now any substitutions we already did on the operands.
3442 Don't do this if we aren't making replacements because we might be
3443 propagating things allocated by frame pointer elimination into places
3444 it doesn't expect. */
3446 if (insn_code_number >= 0 && replace)
3447 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3449 int opno = recog_dup_num[i];
3450 *recog_dup_loc[i] = *recog_operand_loc[opno];
3451 if (operand_reloadnum[opno] >= 0)
3452 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3453 insn_operand_mode[insn_code_number][opno]);
3457 /* This loses because reloading of prior insns can invalidate the equivalence
3458 (or at least find_equiv_reg isn't smart enough to find it any more),
3459 causing this insn to need more reload regs than it needed before.
3460 It may be too late to make the reload regs available.
3461 Now this optimization is done safely in choose_reload_regs. */
3463 /* For each reload of a reg into some other class of reg,
3464 search for an existing equivalent reg (same value now) in the right class.
3465 We can use it as long as we don't need to change its contents. */
3466 for (i = 0; i < n_reloads; i++)
3467 if (reload_reg_rtx[i] == 0
3468 && reload_in[i] != 0
3469 && GET_CODE (reload_in[i]) == REG
3470 && reload_out[i] == 0)
3473 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3474 static_reload_reg_p, 0, reload_inmode[i]);
3475 /* Prevent generation of insn to load the value
3476 because the one we found already has the value. */
3477 if (reload_reg_rtx[i])
3478 reload_in[i] = reload_reg_rtx[i];
3482 /* Perhaps an output reload can be combined with another
3483 to reduce needs by one. */
3484 if (!goal_earlyclobber)
3487 /* If we have a pair of reloads for parts of an address, they are reloading
3488 the same object, the operands themselves were not reloaded, and they
3489 are for two operands that are supposed to match, merge the reloads and
3490 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3492 for (i = 0; i < n_reloads; i++)
3496 for (j = i + 1; j < n_reloads; j++)
3497 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3498 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
3499 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
3500 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3501 && rtx_equal_p (reload_in[i], reload_in[j])
3502 && (operand_reloadnum[reload_opnum[i]] < 0
3503 || reload_optional[operand_reloadnum[reload_opnum[i]]])
3504 && (operand_reloadnum[reload_opnum[j]] < 0
3505 || reload_optional[operand_reloadnum[reload_opnum[j]]])
3506 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
3507 || (goal_alternative_matches[reload_opnum[j]]
3508 == reload_opnum[i])))
3510 for (k = 0; k < n_replacements; k++)
3511 if (replacements[k].what == j)
3512 replacements[k].what = i;
3514 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3519 /* Scan all the reloads and update their type.
3520 If a reload is for the address of an operand and we didn't reload
3521 that operand, change the type. Similarly, change the operand number
3522 of a reload when two operands match. If a reload is optional, treat it
3523 as though the operand isn't reloaded.
3525 ??? This latter case is somewhat odd because if we do the optional
3526 reload, it means the object is hanging around. Thus we need only
3527 do the address reload if the optional reload was NOT done.
3529 Change secondary reloads to be the address type of their operand, not
3532 If an operand's reload is now RELOAD_OTHER, change any
3533 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3534 RELOAD_FOR_OTHER_ADDRESS. */
3536 for (i = 0; i < n_reloads; i++)
3538 if (reload_secondary_p[i]
3539 && reload_when_needed[i] == operand_type[reload_opnum[i]])
3540 reload_when_needed[i] = address_type[reload_opnum[i]];
3542 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3543 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
3544 && (operand_reloadnum[reload_opnum[i]] < 0
3545 || reload_optional[operand_reloadnum[reload_opnum[i]]]))
3546 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3548 if (reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3549 && operand_reloadnum[reload_opnum[i]] >= 0
3550 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
3552 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
3554 if (goal_alternative_matches[reload_opnum[i]] >= 0)
3555 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
3558 /* See if we have any reloads that are now allowed to be merged
3559 because we've changed when the reload is needed to
3560 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3561 check for the most common cases. */
3563 for (i = 0; i < n_reloads; i++)
3564 if (reload_in[i] != 0 && reload_out[i] == 0
3565 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
3566 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
3567 for (j = 0; j < n_reloads; j++)
3568 if (i != j && reload_in[j] != 0 && reload_out[j] == 0
3569 && reload_when_needed[j] == reload_when_needed[i]
3570 && MATCHES (reload_in[i], reload_in[j])
3571 && reload_reg_class[i] == reload_reg_class[j]
3572 && !reload_nocombine[i] && !reload_nocombine[j]
3573 && reload_reg_rtx[i] == reload_reg_rtx[j])
3575 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
3576 transfer_replacements (i, j);
3580 #else /* no REGISTER_CONSTRAINTS */
3582 int insn_code_number;
3583 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
3585 rtx body = PATTERN (insn);
3589 n_earlyclobbers = 0;
3590 replace_reloads = replace;
3593 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3594 Store the operand values in RECOG_OPERAND and the locations
3595 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3596 Return if the insn needs no reload processing. */
3598 switch (GET_CODE (body))
3609 noperands = asm_noperands (body);
3612 /* This insn is an `asm' with operands.
3613 First, find out how many operands, and allocate space. */
3615 insn_code_number = -1;
3616 /* ??? This is a bug! ???
3617 Give up and delete this insn if it has too many operands. */
3618 if (noperands > MAX_RECOG_OPERANDS)
3621 /* Now get the operand values out of the insn. */
3623 decode_asm_operands (body, recog_operand, recog_operand_loc,
3624 NULL_PTR, NULL_PTR);
3629 /* Ordinary insn: recognize it, allocate space for operands and
3630 constraints, and get them out via insn_extract. */
3632 insn_code_number = recog_memoized (insn);
3633 noperands = insn_n_operands[insn_code_number];
3634 insn_extract (insn);
3640 for (i = 0; i < noperands; i++)
3642 register RTX_CODE code = GET_CODE (recog_operand[i]);
3643 int is_set_dest = GET_CODE (body) == SET && (i == 0);
3645 if (insn_code_number >= 0)
3646 if (insn_operand_address_p[insn_code_number][i])
3647 find_reloads_address (VOIDmode, NULL_PTR,
3648 recog_operand[i], recog_operand_loc[i],
3649 i, RELOAD_FOR_INPUT, ind_levels);
3651 /* In these cases, we can't tell if the operand is an input
3652 or an output, so be conservative. In practice it won't be
3656 find_reloads_address (GET_MODE (recog_operand[i]),
3657 recog_operand_loc[i],
3658 XEXP (recog_operand[i], 0),
3659 &XEXP (recog_operand[i], 0),
3660 i, RELOAD_OTHER, ind_levels);
3662 recog_operand[i] = *recog_operand_loc[i]
3663 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
3664 ind_levels, is_set_dest);
3667 register int regno = REGNO (recog_operand[i]);
3668 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3669 recog_operand[i] = *recog_operand_loc[i]
3670 = reg_equiv_constant[regno];
3671 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3672 that feeds this insn. */
3673 if (reg_equiv_mem[regno] != 0)
3674 recog_operand[i] = *recog_operand_loc[i]
3675 = reg_equiv_mem[regno];
3680 /* Perhaps an output reload can be combined with another
3681 to reduce needs by one. */
3682 if (!goal_earlyclobber)
3684 #endif /* no REGISTER_CONSTRAINTS */
3687 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3688 accepts a memory operand with constant address. */
3691 alternative_allows_memconst (constraint, altnum)
3696 /* Skip alternatives before the one requested. */
3699 while (*constraint++ != ',');
3702 /* Scan the requested alternative for 'm' or 'o'.
3703 If one of them is present, this alternative accepts memory constants. */
3704 while ((c = *constraint++) && c != ',' && c != '#')
3705 if (c == 'm' || c == 'o')
3710 /* Scan X for memory references and scan the addresses for reloading.
3711 Also checks for references to "constant" regs that we want to eliminate
3712 and replaces them with the values they stand for.
3713 We may alter X destructively if it contains a reference to such.
3714 If X is just a constant reg, we return the equivalent value
3717 IND_LEVELS says how many levels of indirect addressing this machine
3720 OPNUM and TYPE identify the purpose of the reload.
3722 IS_SET_DEST is true if X is the destination of a SET, which is not
3723 appropriate to be replaced by a constant. */
3726 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest)
3729 enum reload_type type;
3733 register RTX_CODE code = GET_CODE (x);
3735 register char *fmt = GET_RTX_FORMAT (code);
3740 /* This code is duplicated for speed in find_reloads. */
3741 register int regno = REGNO (x);
3742 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3743 x = reg_equiv_constant[regno];
3745 /* This creates (subreg (mem...)) which would cause an unnecessary
3746 reload of the mem. */
3747 else if (reg_equiv_mem[regno] != 0)
3748 x = reg_equiv_mem[regno];
3750 else if (reg_equiv_address[regno] != 0)
3752 /* If reg_equiv_address varies, it may be shared, so copy it. */
3753 rtx addr = reg_equiv_address[regno];
3755 if (rtx_varies_p (addr))
3756 addr = copy_rtx (addr);
3758 x = gen_rtx (MEM, GET_MODE (x), addr);
3759 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3760 find_reloads_address (GET_MODE (x), NULL_PTR,
3762 &XEXP (x, 0), opnum, type, ind_levels);
3769 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
3770 opnum, type, ind_levels);
3774 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
3776 /* Check for SUBREG containing a REG that's equivalent to a constant.
3777 If the constant has a known value, truncate it right now.
3778 Similarly if we are extracting a single-word of a multi-word
3779 constant. If the constant is symbolic, allow it to be substituted
3780 normally. push_reload will strip the subreg later. If the
3781 constant is VOIDmode, abort because we will lose the mode of
3782 the register (this should never happen because one of the cases
3783 above should handle it). */
3785 register int regno = REGNO (SUBREG_REG (x));
3788 if (subreg_lowpart_p (x)
3789 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3790 && reg_equiv_constant[regno] != 0
3791 && (tem = gen_lowpart_common (GET_MODE (x),
3792 reg_equiv_constant[regno])) != 0)
3795 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
3796 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3797 && reg_equiv_constant[regno] != 0
3798 && (tem = operand_subword (reg_equiv_constant[regno],
3800 GET_MODE (SUBREG_REG (x)))) != 0)
3803 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3804 && reg_equiv_constant[regno] != 0
3805 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
3808 /* If the subreg contains a reg that will be converted to a mem,
3809 convert the subreg to a narrower memref now.
3810 Otherwise, we would get (subreg (mem ...) ...),
3811 which would force reload of the mem.
3813 We also need to do this if there is an equivalent MEM that is
3814 not offsettable. In that case, alter_subreg would produce an
3815 invalid address on big-endian machines.
3817 For machines that extend byte loads, we must not reload using
3818 a wider mode if we have a paradoxical SUBREG. find_reloads will
3819 force a reload in that case. So we should not do anything here. */
3821 else if (regno >= FIRST_PSEUDO_REGISTER
3822 #if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
3823 && (GET_MODE_SIZE (GET_MODE (x))
3824 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3826 && (reg_equiv_address[regno] != 0
3827 || (reg_equiv_mem[regno] != 0
3828 && (! strict_memory_address_p (GET_MODE (x),
3829 XEXP (reg_equiv_mem[regno], 0))
3830 || ! offsettable_memref_p (reg_equiv_mem[regno])))))
3832 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
3833 rtx addr = (reg_equiv_address[regno] ? reg_equiv_address[regno]
3834 : XEXP (reg_equiv_mem[regno], 0));
3835 #if BYTES_BIG_ENDIAN
3837 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
3838 offset += MIN (size, UNITS_PER_WORD);
3839 size = GET_MODE_SIZE (GET_MODE (x));
3840 offset -= MIN (size, UNITS_PER_WORD);
3842 addr = plus_constant (addr, offset);
3843 x = gen_rtx (MEM, GET_MODE (x), addr);
3844 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3845 find_reloads_address (GET_MODE (x), NULL_PTR,
3847 &XEXP (x, 0), opnum, type, ind_levels);
3852 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3855 XEXP (x, i) = find_reloads_toplev (XEXP (x, i), opnum, type,
3856 ind_levels, is_set_dest);
3861 /* Return a mem ref for the memory equivalent of reg REGNO.
3862 This mem ref is not shared with anything. */
3865 make_memloc (ad, regno)
3870 rtx tem = reg_equiv_address[regno];
3872 #if 0 /* We cannot safely reuse a memloc made here;
3873 if the pseudo appears twice, and its mem needs a reload,
3874 it gets two separate reloads assigned, but it only
3875 gets substituted with the second of them;
3876 then it can get used before that reload reg gets loaded up. */
3877 for (i = 0; i < n_memlocs; i++)
3878 if (rtx_equal_p (tem, XEXP (memlocs[i], 0)))
3882 /* If TEM might contain a pseudo, we must copy it to avoid
3883 modifying it when we do the substitution for the reload. */
3884 if (rtx_varies_p (tem))
3885 tem = copy_rtx (tem);
3887 tem = gen_rtx (MEM, GET_MODE (ad), tem);
3888 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3889 memlocs[n_memlocs++] = tem;
3893 /* Record all reloads needed for handling memory address AD
3894 which appears in *LOC in a memory reference to mode MODE
3895 which itself is found in location *MEMREFLOC.
3896 Note that we take shortcuts assuming that no multi-reg machine mode
3897 occurs as part of an address.
3899 OPNUM and TYPE specify the purpose of this reload.
3901 IND_LEVELS says how many levels of indirect addressing this machine
3904 Value is nonzero if this address is reloaded or replaced as a whole.
3905 This is interesting to the caller if the address is an autoincrement.
3907 Note that there is no verification that the address will be valid after
3908 this routine does its work. Instead, we rely on the fact that the address
3909 was valid when reload started. So we need only undo things that reload
3910 could have broken. These are wrong register types, pseudos not allocated
3911 to a hard register, and frame pointer elimination. */
3914 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels)
3915 enum machine_mode mode;
3920 enum reload_type type;
3926 /* If the address is a register, see if it is a legitimate address and
3927 reload if not. We first handle the cases where we need not reload
3928 or where we must reload in a non-standard way. */
3930 if (GET_CODE (ad) == REG)
3934 if (reg_equiv_constant[regno] != 0
3935 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
3937 *loc = ad = reg_equiv_constant[regno];
3941 else if (reg_equiv_address[regno] != 0)
3943 tem = make_memloc (ad, regno);
3944 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
3945 &XEXP (tem, 0), opnum, type, ind_levels);
3946 push_reload (tem, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
3947 GET_MODE (ad), VOIDmode, 0, 0,
3952 /* We can avoid a reload if the register's equivalent memory expression
3953 is valid as an indirect memory address.
3954 But not all addresses are valid in a mem used as an indirect address:
3955 only reg or reg+constant. */
3957 else if (reg_equiv_mem[regno] != 0 && ind_levels > 0
3958 && strict_memory_address_p (mode, reg_equiv_mem[regno])
3959 && (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == REG
3960 || (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == PLUS
3961 && GET_CODE (XEXP (XEXP (reg_equiv_mem[regno], 0), 0)) == REG
3962 && CONSTANT_P (XEXP (XEXP (reg_equiv_mem[regno], 0), 0)))))
3965 /* The only remaining case where we can avoid a reload is if this is a
3966 hard register that is valid as a base register and which is not the
3967 subject of a CLOBBER in this insn. */
3969 else if (regno < FIRST_PSEUDO_REGISTER && REGNO_OK_FOR_BASE_P (regno)
3970 && ! regno_clobbered_p (regno, this_insn))
3973 /* If we do not have one of the cases above, we must do the reload. */
3974 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
3975 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
3979 if (strict_memory_address_p (mode, ad))
3981 /* The address appears valid, so reloads are not needed.
3982 But the address may contain an eliminable register.
3983 This can happen because a machine with indirect addressing
3984 may consider a pseudo register by itself a valid address even when
3985 it has failed to get a hard reg.
3986 So do a tree-walk to find and eliminate all such regs. */
3988 /* But first quickly dispose of a common case. */
3989 if (GET_CODE (ad) == PLUS
3990 && GET_CODE (XEXP (ad, 1)) == CONST_INT
3991 && GET_CODE (XEXP (ad, 0)) == REG
3992 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
3995 subst_reg_equivs_changed = 0;
3996 *loc = subst_reg_equivs (ad);
3998 if (! subst_reg_equivs_changed)
4001 /* Check result for validity after substitution. */
4002 if (strict_memory_address_p (mode, ad))
4006 /* The address is not valid. We have to figure out why. One possibility
4007 is that it is itself a MEM. This can happen when the frame pointer is
4008 being eliminated, a pseudo is not allocated to a hard register, and the
4009 offset between the frame and stack pointers is not its initial value.
4010 In that case the pseudo will have been replaced by a MEM referring to
4011 the stack pointer. */
4012 if (GET_CODE (ad) == MEM)
4014 /* First ensure that the address in this MEM is valid. Then, unless
4015 indirect addresses are valid, reload the MEM into a register. */
4017 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4018 opnum, type, ind_levels == 0 ? 0 : ind_levels - 1);
4020 /* If tem was changed, then we must create a new memory reference to
4021 hold it and store it back into memrefloc. */
4022 if (tem != ad && memrefloc)
4024 *memrefloc = copy_rtx (*memrefloc);
4025 copy_replacements (tem, XEXP (*memrefloc, 0));
4026 loc = &XEXP (*memrefloc, 0);
4029 /* Check similar cases as for indirect addresses as above except
4030 that we can allow pseudos and a MEM since they should have been
4031 taken care of above. */
4034 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4035 || GET_CODE (XEXP (tem, 0)) == MEM
4036 || ! (GET_CODE (XEXP (tem, 0)) == REG
4037 || (GET_CODE (XEXP (tem, 0)) == PLUS
4038 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4039 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4041 /* Must use TEM here, not AD, since it is the one that will
4042 have any subexpressions reloaded, if needed. */
4043 push_reload (tem, NULL_RTX, loc, NULL_PTR,
4044 BASE_REG_CLASS, GET_MODE (tem), VOIDmode, 0,
4052 /* If we have address of a stack slot but it's not valid
4053 (displacement is too large), compute the sum in a register. */
4054 else if (GET_CODE (ad) == PLUS
4055 && (XEXP (ad, 0) == frame_pointer_rtx
4056 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4057 || XEXP (ad, 0) == arg_pointer_rtx
4059 || XEXP (ad, 0) == stack_pointer_rtx)
4060 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4062 /* Unshare the MEM rtx so we can safely alter it. */
4065 rtx oldref = *memrefloc;
4066 *memrefloc = copy_rtx (*memrefloc);
4067 loc = &XEXP (*memrefloc, 0);
4069 if (double_reg_address_ok)
4071 /* Unshare the sum as well. */
4072 *loc = ad = copy_rtx (ad);
4073 /* Reload the displacement into an index reg.
4074 We assume the frame pointer or arg pointer is a base reg. */
4075 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4076 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4081 /* If the sum of two regs is not necessarily valid,
4082 reload the sum into a base reg.
4083 That will at least work. */
4084 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode,
4085 opnum, type, ind_levels);
4090 /* If we have an indexed stack slot, there are three possible reasons why
4091 it might be invalid: The index might need to be reloaded, the address
4092 might have been made by frame pointer elimination and hence have a
4093 constant out of range, or both reasons might apply.
4095 We can easily check for an index needing reload, but even if that is the
4096 case, we might also have an invalid constant. To avoid making the
4097 conservative assumption and requiring two reloads, we see if this address
4098 is valid when not interpreted strictly. If it is, the only problem is
4099 that the index needs a reload and find_reloads_address_1 will take care
4102 There is still a case when we might generate an extra reload,
4103 however. In certain cases eliminate_regs will return a MEM for a REG
4104 (see the code there for details). In those cases, memory_address_p
4105 applied to our address will return 0 so we will think that our offset
4106 must be too large. But it might indeed be valid and the only problem
4107 is that a MEM is present where a REG should be. This case should be
4108 very rare and there doesn't seem to be any way to avoid it.
4110 If we decide to do something here, it must be that
4111 `double_reg_address_ok' is true and that this address rtl was made by
4112 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4113 rework the sum so that the reload register will be added to the index.
4114 This is safe because we know the address isn't shared.
4116 We check for fp/ap/sp as both the first and second operand of the
4119 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4120 && GET_CODE (XEXP (ad, 0)) == PLUS
4121 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4122 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4123 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4125 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4126 && ! memory_address_p (mode, ad))
4128 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
4129 plus_constant (XEXP (XEXP (ad, 0), 0),
4130 INTVAL (XEXP (ad, 1))),
4131 XEXP (XEXP (ad, 0), 1));
4132 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4133 GET_MODE (ad), opnum, type, ind_levels);
4134 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, type, 0);
4139 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4140 && GET_CODE (XEXP (ad, 0)) == PLUS
4141 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4142 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4143 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4145 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4146 && ! memory_address_p (mode, ad))
4148 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
4149 plus_constant (XEXP (XEXP (ad, 0), 1),
4150 INTVAL (XEXP (ad, 1))),
4151 XEXP (XEXP (ad, 0), 0));
4152 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
4153 GET_MODE (ad), opnum, type, ind_levels);
4154 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, type, 0);
4159 /* See if address becomes valid when an eliminable register
4160 in a sum is replaced. */
4163 if (GET_CODE (ad) == PLUS)
4164 tem = subst_indexed_address (ad);
4165 if (tem != ad && strict_memory_address_p (mode, tem))
4167 /* Ok, we win that way. Replace any additional eliminable
4170 subst_reg_equivs_changed = 0;
4171 tem = subst_reg_equivs (tem);
4173 /* Make sure that didn't make the address invalid again. */
4175 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4182 /* If constants aren't valid addresses, reload the constant address
4184 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4186 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4187 Unshare it so we can safely alter it. */
4188 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4189 && CONSTANT_POOL_ADDRESS_P (ad))
4191 rtx oldref = *memrefloc;
4192 *memrefloc = copy_rtx (*memrefloc);
4193 loc = &XEXP (*memrefloc, 0);
4196 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
4201 return find_reloads_address_1 (ad, 0, loc, opnum, type, ind_levels);
4204 /* Find all pseudo regs appearing in AD
4205 that are eliminable in favor of equivalent values
4206 and do not have hard regs; replace them by their equivalents. */
4209 subst_reg_equivs (ad)
4212 register RTX_CODE code = GET_CODE (ad);
4230 register int regno = REGNO (ad);
4232 if (reg_equiv_constant[regno] != 0)
4234 subst_reg_equivs_changed = 1;
4235 return reg_equiv_constant[regno];
4241 /* Quickly dispose of a common case. */
4242 if (XEXP (ad, 0) == frame_pointer_rtx
4243 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4247 fmt = GET_RTX_FORMAT (code);
4248 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4250 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i));
4254 /* Compute the sum of X and Y, making canonicalizations assumed in an
4255 address, namely: sum constant integers, surround the sum of two
4256 constants with a CONST, put the constant as the second operand, and
4257 group the constant on the outermost sum.
4259 This routine assumes both inputs are already in canonical form. */
4266 enum machine_mode mode = GET_MODE (x);
4268 if (mode == VOIDmode)
4269 mode = GET_MODE (y);
4271 if (mode == VOIDmode)
4274 if (GET_CODE (x) == CONST_INT)
4275 return plus_constant (y, INTVAL (x));
4276 else if (GET_CODE (y) == CONST_INT)
4277 return plus_constant (x, INTVAL (y));
4278 else if (CONSTANT_P (x))
4279 tem = x, x = y, y = tem;
4281 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
4282 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
4284 /* Note that if the operands of Y are specified in the opposite
4285 order in the recursive calls below, infinite recursion will occur. */
4286 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
4287 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
4289 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4290 constant will have been placed second. */
4291 if (CONSTANT_P (x) && CONSTANT_P (y))
4293 if (GET_CODE (x) == CONST)
4295 if (GET_CODE (y) == CONST)
4298 return gen_rtx (CONST, VOIDmode, gen_rtx (PLUS, mode, x, y));
4301 return gen_rtx (PLUS, mode, x, y);
4304 /* If ADDR is a sum containing a pseudo register that should be
4305 replaced with a constant (from reg_equiv_constant),
4306 return the result of doing so, and also apply the associative
4307 law so that the result is more likely to be a valid address.
4308 (But it is not guaranteed to be one.)
4310 Note that at most one register is replaced, even if more are
4311 replaceable. Also, we try to put the result into a canonical form
4312 so it is more likely to be a valid address.
4314 In all other cases, return ADDR. */
4317 subst_indexed_address (addr)
4320 rtx op0 = 0, op1 = 0, op2 = 0;
4324 if (GET_CODE (addr) == PLUS)
4326 /* Try to find a register to replace. */
4327 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
4328 if (GET_CODE (op0) == REG
4329 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
4330 && reg_renumber[regno] < 0
4331 && reg_equiv_constant[regno] != 0)
4332 op0 = reg_equiv_constant[regno];
4333 else if (GET_CODE (op1) == REG
4334 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
4335 && reg_renumber[regno] < 0
4336 && reg_equiv_constant[regno] != 0)
4337 op1 = reg_equiv_constant[regno];
4338 else if (GET_CODE (op0) == PLUS
4339 && (tem = subst_indexed_address (op0)) != op0)
4341 else if (GET_CODE (op1) == PLUS
4342 && (tem = subst_indexed_address (op1)) != op1)
4347 /* Pick out up to three things to add. */
4348 if (GET_CODE (op1) == PLUS)
4349 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
4350 else if (GET_CODE (op0) == PLUS)
4351 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4353 /* Compute the sum. */
4355 op1 = form_sum (op1, op2);
4357 op0 = form_sum (op0, op1);
4364 /* Record the pseudo registers we must reload into hard registers
4365 in a subexpression of a would-be memory address, X.
4366 (This function is not called if the address we find is strictly valid.)
4367 CONTEXT = 1 means we are considering regs as index regs,
4368 = 0 means we are considering them as base regs.
4370 OPNUM and TYPE specify the purpose of any reloads made.
4372 IND_LEVELS says how many levels of indirect addressing are
4373 supported at this point in the address.
4375 We return nonzero if X, as a whole, is reloaded or replaced. */
4377 /* Note that we take shortcuts assuming that no multi-reg machine mode
4378 occurs as part of an address.
4379 Also, this is not fully machine-customizable; it works for machines
4380 such as vaxes and 68000's and 32000's, but other possible machines
4381 could have addressing modes that this does not handle right. */
4384 find_reloads_address_1 (x, context, loc, opnum, type, ind_levels)
4389 enum reload_type type;
4392 register RTX_CODE code = GET_CODE (x);
4396 register rtx orig_op0 = XEXP (x, 0);
4397 register rtx orig_op1 = XEXP (x, 1);
4398 register RTX_CODE code0 = GET_CODE (orig_op0);
4399 register RTX_CODE code1 = GET_CODE (orig_op1);
4400 register rtx op0 = orig_op0;
4401 register rtx op1 = orig_op1;
4403 if (GET_CODE (op0) == SUBREG)
4405 op0 = SUBREG_REG (op0);
4406 code0 = GET_CODE (op0);
4408 if (GET_CODE (op1) == SUBREG)
4410 op1 = SUBREG_REG (op1);
4411 code1 = GET_CODE (op1);
4414 if (code0 == MULT || code0 == SIGN_EXTEND || code1 == MEM)
4416 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4418 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4421 else if (code1 == MULT || code1 == SIGN_EXTEND || code0 == MEM)
4423 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4425 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4428 else if (code0 == CONST_INT || code0 == CONST
4429 || code0 == SYMBOL_REF || code0 == LABEL_REF)
4430 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type, ind_levels);
4431 else if (code1 == CONST_INT || code1 == CONST
4432 || code1 == SYMBOL_REF || code1 == LABEL_REF)
4433 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type, ind_levels);
4434 else if (code0 == REG && code1 == REG)
4436 if (REG_OK_FOR_INDEX_P (op0)
4437 && REG_OK_FOR_BASE_P (op1))
4439 else if (REG_OK_FOR_INDEX_P (op1)
4440 && REG_OK_FOR_BASE_P (op0))
4442 else if (REG_OK_FOR_BASE_P (op1))
4443 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4445 else if (REG_OK_FOR_BASE_P (op0))
4446 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4448 else if (REG_OK_FOR_INDEX_P (op1))
4449 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4451 else if (REG_OK_FOR_INDEX_P (op0))
4452 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4456 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4458 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4462 else if (code0 == REG)
4464 find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type,
4466 find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type,
4469 else if (code1 == REG)
4471 find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type,
4473 find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type,
4477 else if (code == POST_INC || code == POST_DEC
4478 || code == PRE_INC || code == PRE_DEC)
4480 if (GET_CODE (XEXP (x, 0)) == REG)
4482 register int regno = REGNO (XEXP (x, 0));
4486 /* A register that is incremented cannot be constant! */
4487 if (regno >= FIRST_PSEUDO_REGISTER
4488 && reg_equiv_constant[regno] != 0)
4491 /* Handle a register that is equivalent to a memory location
4492 which cannot be addressed directly. */
4493 if (reg_equiv_address[regno] != 0)
4495 rtx tem = make_memloc (XEXP (x, 0), regno);
4496 /* First reload the memory location's address. */
4497 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
4498 &XEXP (tem, 0), opnum, type, ind_levels);
4499 /* Put this inside a new increment-expression. */
4500 x = gen_rtx (GET_CODE (x), GET_MODE (x), tem);
4501 /* Proceed to reload that, as if it contained a register. */
4504 /* If we have a hard register that is ok as an index,
4505 don't make a reload. If an autoincrement of a nice register
4506 isn't "valid", it must be that no autoincrement is "valid".
4507 If that is true and something made an autoincrement anyway,
4508 this must be a special context where one is allowed.
4509 (For example, a "push" instruction.)
4510 We can't improve this address, so leave it alone. */
4512 /* Otherwise, reload the autoincrement into a suitable hard reg
4513 and record how much to increment by. */
4515 if (reg_renumber[regno] >= 0)
4516 regno = reg_renumber[regno];
4517 if ((regno >= FIRST_PSEUDO_REGISTER
4518 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4519 : REGNO_OK_FOR_BASE_P (regno))))
4524 = push_reload (x, NULL_RTX, loc, NULL_PTR,
4525 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4526 GET_MODE (x), GET_MODE (x), VOIDmode, 0,
4528 reload_inc[reloadnum]
4529 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
4534 /* Update the REG_INC notes. */
4536 for (link = REG_NOTES (this_insn);
4537 link; link = XEXP (link, 1))
4538 if (REG_NOTE_KIND (link) == REG_INC
4539 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
4540 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4545 else if (GET_CODE (XEXP (x, 0)) == MEM)
4547 /* This is probably the result of a substitution, by eliminate_regs,
4548 of an equivalent address for a pseudo that was not allocated to a
4549 hard register. Verify that the specified address is valid and
4550 reload it into a register. */
4551 rtx tem = XEXP (x, 0);
4555 /* Since we know we are going to reload this item, don't decrement
4556 for the indirection level.
4558 Note that this is actually conservative: it would be slightly
4559 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4561 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
4562 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
4563 opnum, type, ind_levels);
4565 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
4566 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4567 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4568 reload_inc[reloadnum]
4569 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
4571 link = FIND_REG_INC_NOTE (this_insn, tem);
4573 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4578 else if (code == MEM)
4580 /* This is probably the result of a substitution, by eliminate_regs,
4581 of an equivalent address for a pseudo that was not allocated to a
4582 hard register. Verify that the specified address is valid and reload
4585 Since we know we are going to reload this item, don't decrement
4586 for the indirection level.
4588 Note that this is actually conservative: it would be slightly more
4589 efficient to use the value of SPILL_INDIRECT_LEVELS from
4592 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
4593 opnum, type, ind_levels);
4595 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
4596 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4597 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4600 else if (code == REG)
4602 register int regno = REGNO (x);
4604 if (reg_equiv_constant[regno] != 0)
4606 find_reloads_address_part (reg_equiv_constant[regno], loc,
4607 (context ? INDEX_REG_CLASS
4609 GET_MODE (x), opnum, type, ind_levels);
4613 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4614 that feeds this insn. */
4615 if (reg_equiv_mem[regno] != 0)
4617 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
4618 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4619 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4623 if (reg_equiv_address[regno] != 0)
4625 x = make_memloc (x, regno);
4626 find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0),
4627 opnum, type, ind_levels);
4630 if (reg_renumber[regno] >= 0)
4631 regno = reg_renumber[regno];
4632 if ((regno >= FIRST_PSEUDO_REGISTER
4633 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4634 : REGNO_OK_FOR_BASE_P (regno))))
4636 push_reload (x, NULL_RTX, loc, NULL_PTR,
4637 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4638 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4642 /* If a register appearing in an address is the subject of a CLOBBER
4643 in this insn, reload it into some other register to be safe.
4644 The CLOBBER is supposed to make the register unavailable
4645 from before this insn to after it. */
4646 if (regno_clobbered_p (regno, this_insn))
4648 push_reload (x, NULL_RTX, loc, NULL_PTR,
4649 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
4650 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
4656 register char *fmt = GET_RTX_FORMAT (code);
4658 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4661 find_reloads_address_1 (XEXP (x, i), context, &XEXP (x, i),
4662 opnum, type, ind_levels);
4669 /* X, which is found at *LOC, is a part of an address that needs to be
4670 reloaded into a register of class CLASS. If X is a constant, or if
4671 X is a PLUS that contains a constant, check that the constant is a
4672 legitimate operand and that we are supposed to be able to load
4673 it into the register.
4675 If not, force the constant into memory and reload the MEM instead.
4677 MODE is the mode to use, in case X is an integer constant.
4679 OPNUM and TYPE describe the purpose of any reloads made.
4681 IND_LEVELS says how many levels of indirect addressing this machine
4685 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
4688 enum reg_class class;
4689 enum machine_mode mode;
4691 enum reload_type type;
4695 && (! LEGITIMATE_CONSTANT_P (x)
4696 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
4698 rtx tem = x = force_const_mem (mode, x);
4699 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4700 opnum, type, ind_levels);
4703 else if (GET_CODE (x) == PLUS
4704 && CONSTANT_P (XEXP (x, 1))
4705 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
4706 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
4708 rtx tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
4710 x = gen_rtx (PLUS, GET_MODE (x), XEXP (x, 0), tem);
4711 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
4712 opnum, type, ind_levels);
4715 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
4716 mode, VOIDmode, 0, 0, opnum, type);
4719 /* Substitute into the current INSN the registers into which we have reloaded
4720 the things that need reloading. The array `replacements'
4721 says contains the locations of all pointers that must be changed
4722 and says what to replace them with.
4724 Return the rtx that X translates into; usually X, but modified. */
4731 for (i = 0; i < n_replacements; i++)
4733 register struct replacement *r = &replacements[i];
4734 register rtx reloadreg = reload_reg_rtx[r->what];
4737 /* Encapsulate RELOADREG so its machine mode matches what
4738 used to be there. Note that gen_lowpart_common will
4739 do the wrong thing if RELOADREG is multi-word. RELOADREG
4740 will always be a REG here. */
4741 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
4742 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
4744 /* If we are putting this into a SUBREG and RELOADREG is a
4745 SUBREG, we would be making nested SUBREGs, so we have to fix
4746 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
4748 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
4750 if (GET_MODE (*r->subreg_loc)
4751 == GET_MODE (SUBREG_REG (reloadreg)))
4752 *r->subreg_loc = SUBREG_REG (reloadreg);
4755 *r->where = SUBREG_REG (reloadreg);
4756 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
4760 *r->where = reloadreg;
4762 /* If reload got no reg and isn't optional, something's wrong. */
4763 else if (! reload_optional[r->what])
4768 /* Make a copy of any replacements being done into X and move those copies
4769 to locations in Y, a copy of X. We only look at the highest level of
4773 copy_replacements (x, y)
4778 enum rtx_code code = GET_CODE (x);
4779 char *fmt = GET_RTX_FORMAT (code);
4780 struct replacement *r;
4782 /* We can't support X being a SUBREG because we might then need to know its
4783 location if something inside it was replaced. */
4787 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4789 for (j = 0; j < n_replacements; j++)
4791 if (replacements[j].subreg_loc == &XEXP (x, i))
4793 r = &replacements[n_replacements++];
4794 r->where = replacements[j].where;
4795 r->subreg_loc = &XEXP (y, i);
4796 r->what = replacements[j].what;
4797 r->mode = replacements[j].mode;
4799 else if (replacements[j].where == &XEXP (x, i))
4801 r = &replacements[n_replacements++];
4802 r->where = &XEXP (y, i);
4804 r->what = replacements[j].what;
4805 r->mode = replacements[j].mode;
4810 /* If LOC was scheduled to be replaced by something, return the replacement.
4811 Otherwise, return *LOC. */
4814 find_replacement (loc)
4817 struct replacement *r;
4819 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
4821 rtx reloadreg = reload_reg_rtx[r->what];
4823 if (reloadreg && r->where == loc)
4825 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
4826 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
4830 else if (reloadreg && r->subreg_loc == loc)
4832 /* RELOADREG must be either a REG or a SUBREG.
4834 ??? Is it actually still ever a SUBREG? If so, why? */
4836 if (GET_CODE (reloadreg) == REG)
4837 return gen_rtx (REG, GET_MODE (*loc),
4838 REGNO (reloadreg) + SUBREG_WORD (*loc));
4839 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
4842 return gen_rtx (SUBREG, GET_MODE (*loc), SUBREG_REG (reloadreg),
4843 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
4850 /* Return nonzero if register in range [REGNO, ENDREGNO)
4851 appears either explicitly or implicitly in X
4852 other than being stored into.
4854 References contained within the substructure at LOC do not count.
4855 LOC may be zero, meaning don't ignore anything.
4857 This is similar to refers_to_regno_p in rtlanal.c except that we
4858 look at equivalences for pseudos that didn't get hard registers. */
4861 refers_to_regno_for_reload_p (regno, endregno, x, loc)
4862 int regno, endregno;
4867 register RTX_CODE code;
4874 code = GET_CODE (x);
4881 /* If this is a pseudo, a hard register must not have been allocated.
4882 X must therefore either be a constant or be in memory. */
4883 if (i >= FIRST_PSEUDO_REGISTER)
4885 if (reg_equiv_memory_loc[i])
4886 return refers_to_regno_for_reload_p (regno, endregno,
4887 reg_equiv_memory_loc[i],
4890 if (reg_equiv_constant[i])
4896 return (endregno > i
4897 && regno < i + (i < FIRST_PSEUDO_REGISTER
4898 ? HARD_REGNO_NREGS (i, GET_MODE (x))
4902 /* If this is a SUBREG of a hard reg, we can see exactly which
4903 registers are being modified. Otherwise, handle normally. */
4904 if (GET_CODE (SUBREG_REG (x)) == REG
4905 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
4907 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
4909 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
4910 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
4912 return endregno > inner_regno && regno < inner_endregno;
4918 if (&SET_DEST (x) != loc
4919 /* Note setting a SUBREG counts as referring to the REG it is in for
4920 a pseudo but not for hard registers since we can
4921 treat each word individually. */
4922 && ((GET_CODE (SET_DEST (x)) == SUBREG
4923 && loc != &SUBREG_REG (SET_DEST (x))
4924 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
4925 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
4926 && refers_to_regno_for_reload_p (regno, endregno,
4927 SUBREG_REG (SET_DEST (x)),
4929 || (GET_CODE (SET_DEST (x)) != REG
4930 && refers_to_regno_for_reload_p (regno, endregno,
4931 SET_DEST (x), loc))))
4934 if (code == CLOBBER || loc == &SET_SRC (x))
4940 /* X does not match, so try its subexpressions. */
4942 fmt = GET_RTX_FORMAT (code);
4943 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4945 if (fmt[i] == 'e' && loc != &XEXP (x, i))
4953 if (refers_to_regno_for_reload_p (regno, endregno,
4957 else if (fmt[i] == 'E')
4960 for (j = XVECLEN (x, i) - 1; j >=0; j--)
4961 if (loc != &XVECEXP (x, i, j)
4962 && refers_to_regno_for_reload_p (regno, endregno,
4963 XVECEXP (x, i, j), loc))
4970 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
4971 we check if any register number in X conflicts with the relevant register
4972 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
4973 contains a MEM (we don't bother checking for memory addresses that can't
4974 conflict because we expect this to be a rare case.
4976 This function is similar to reg_overlap_mention_p in rtlanal.c except
4977 that we look at equivalences for pseudos that didn't get hard registers. */
4980 reg_overlap_mentioned_for_reload_p (x, in)
4983 int regno, endregno;
4985 if (GET_CODE (x) == SUBREG)
4987 regno = REGNO (SUBREG_REG (x));
4988 if (regno < FIRST_PSEUDO_REGISTER)
4989 regno += SUBREG_WORD (x);
4991 else if (GET_CODE (x) == REG)
4995 /* If this is a pseudo, it must not have been assigned a hard register.
4996 Therefore, it must either be in memory or be a constant. */
4998 if (regno >= FIRST_PSEUDO_REGISTER)
5000 if (reg_equiv_memory_loc[regno])
5001 return refers_to_mem_for_reload_p (in);
5002 else if (reg_equiv_constant[regno])
5007 else if (CONSTANT_P (x))
5009 else if (GET_CODE (x) == MEM)
5010 return refers_to_mem_for_reload_p (in);
5011 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
5012 || GET_CODE (x) == CC0)
5013 return reg_mentioned_p (x, in);
5017 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
5018 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
5020 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
5023 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5027 refers_to_mem_for_reload_p (x)
5033 if (GET_CODE (x) == MEM)
5036 if (GET_CODE (x) == REG)
5037 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
5038 && reg_equiv_memory_loc[REGNO (x)]);
5040 fmt = GET_RTX_FORMAT (GET_CODE (x));
5041 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
5043 && (GET_CODE (XEXP (x, i)) == MEM
5044 || refers_to_mem_for_reload_p (XEXP (x, i))))
5050 /* Check the insns before INSN to see if there is a suitable register
5051 containing the same value as GOAL.
5052 If OTHER is -1, look for a register in class CLASS.
5053 Otherwise, just see if register number OTHER shares GOAL's value.
5055 Return an rtx for the register found, or zero if none is found.
5057 If RELOAD_REG_P is (short *)1,
5058 we reject any hard reg that appears in reload_reg_rtx
5059 because such a hard reg is also needed coming into this insn.
5061 If RELOAD_REG_P is any other nonzero value,
5062 it is a vector indexed by hard reg number
5063 and we reject any hard reg whose element in the vector is nonnegative
5064 as well as any that appears in reload_reg_rtx.
5066 If GOAL is zero, then GOALREG is a register number; we look
5067 for an equivalent for that register.
5069 MODE is the machine mode of the value we want an equivalence for.
5070 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5072 This function is used by jump.c as well as in the reload pass.
5074 If GOAL is the sum of the stack pointer and a constant, we treat it
5075 as if it were a constant except that sp is required to be unchanging. */
5078 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
5081 enum reg_class class;
5083 short *reload_reg_p;
5085 enum machine_mode mode;
5087 register rtx p = insn;
5088 rtx goaltry, valtry, value, where;
5090 register int regno = -1;
5094 int goal_mem_addr_varies = 0;
5095 int need_stable_sp = 0;
5101 else if (GET_CODE (goal) == REG)
5102 regno = REGNO (goal);
5103 else if (GET_CODE (goal) == MEM)
5105 enum rtx_code code = GET_CODE (XEXP (goal, 0));
5106 if (MEM_VOLATILE_P (goal))
5108 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
5110 /* An address with side effects must be reexecuted. */
5121 else if (CONSTANT_P (goal))
5123 else if (GET_CODE (goal) == PLUS
5124 && XEXP (goal, 0) == stack_pointer_rtx
5125 && CONSTANT_P (XEXP (goal, 1)))
5126 goal_const = need_stable_sp = 1;
5130 /* On some machines, certain regs must always be rejected
5131 because they don't behave the way ordinary registers do. */
5133 #ifdef OVERLAPPING_REGNO_P
5134 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5135 && OVERLAPPING_REGNO_P (regno))
5139 /* Scan insns back from INSN, looking for one that copies
5140 a value into or out of GOAL.
5141 Stop and give up if we reach a label. */
5146 if (p == 0 || GET_CODE (p) == CODE_LABEL)
5148 if (GET_CODE (p) == INSN
5149 /* If we don't want spill regs ... */
5150 && (! (reload_reg_p != 0
5151 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
5152 /* ... then ignore insns introduced by reload; they aren't useful
5153 and can cause results in reload_as_needed to be different
5154 from what they were when calculating the need for spills.
5155 If we notice an input-reload insn here, we will reject it below,
5156 but it might hide a usable equivalent. That makes bad code.
5157 It may even abort: perhaps no reg was spilled for this insn
5158 because it was assumed we would find that equivalent. */
5159 || INSN_UID (p) < reload_first_uid))
5162 pat = single_set (p);
5163 /* First check for something that sets some reg equal to GOAL. */
5166 && true_regnum (SET_SRC (pat)) == regno
5167 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5170 && true_regnum (SET_DEST (pat)) == regno
5171 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
5173 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
5174 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5176 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
5177 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
5179 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
5180 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
5181 /* If we are looking for a constant,
5182 and something equivalent to that constant was copied
5183 into a reg, we can use that reg. */
5184 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5186 && rtx_equal_p (XEXP (tem, 0), goal)
5187 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5188 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5190 && GET_CODE (SET_DEST (pat)) == REG
5191 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5192 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5193 && GET_CODE (goal) == CONST_INT
5194 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
5196 && rtx_equal_p (goal, goaltry)
5197 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
5199 && (valueno = true_regnum (valtry)) >= 0)
5200 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5202 && GET_CODE (SET_DEST (pat)) == REG
5203 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5204 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5205 && GET_CODE (goal) == CONST_INT
5206 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
5208 && rtx_equal_p (goal, goaltry)
5210 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
5211 && (valueno = true_regnum (valtry)) >= 0)))
5214 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
5215 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
5225 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5226 (or copying VALUE into GOAL, if GOAL is also a register).
5227 Now verify that VALUE is really valid. */
5229 /* VALUENO is the register number of VALUE; a hard register. */
5231 /* Don't try to re-use something that is killed in this insn. We want
5232 to be able to trust REG_UNUSED notes. */
5233 if (find_reg_note (where, REG_UNUSED, value))
5236 /* If we propose to get the value from the stack pointer or if GOAL is
5237 a MEM based on the stack pointer, we need a stable SP. */
5238 if (valueno == STACK_POINTER_REGNUM
5239 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
5243 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5244 if (GET_MODE (value) != mode)
5247 /* Reject VALUE if it was loaded from GOAL
5248 and is also a register that appears in the address of GOAL. */
5250 if (goal_mem && value == SET_DEST (PATTERN (where))
5251 && refers_to_regno_for_reload_p (valueno,
5253 + HARD_REGNO_NREGS (valueno, mode)),
5257 /* Reject registers that overlap GOAL. */
5259 if (!goal_mem && !goal_const
5260 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
5261 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
5264 /* Reject VALUE if it is one of the regs reserved for reloads.
5265 Reload1 knows how to reuse them anyway, and it would get
5266 confused if we allocated one without its knowledge.
5267 (Now that insns introduced by reload are ignored above,
5268 this case shouldn't happen, but I'm not positive.) */
5270 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
5271 && reload_reg_p[valueno] >= 0)
5274 /* On some machines, certain regs must always be rejected
5275 because they don't behave the way ordinary registers do. */
5277 #ifdef OVERLAPPING_REGNO_P
5278 if (OVERLAPPING_REGNO_P (valueno))
5282 nregs = HARD_REGNO_NREGS (regno, mode);
5283 valuenregs = HARD_REGNO_NREGS (valueno, mode);
5285 /* Reject VALUE if it is a register being used for an input reload
5286 even if it is not one of those reserved. */
5288 if (reload_reg_p != 0)
5291 for (i = 0; i < n_reloads; i++)
5292 if (reload_reg_rtx[i] != 0 && reload_in[i])
5294 int regno1 = REGNO (reload_reg_rtx[i]);
5295 int nregs1 = HARD_REGNO_NREGS (regno1,
5296 GET_MODE (reload_reg_rtx[i]));
5297 if (regno1 < valueno + valuenregs
5298 && regno1 + nregs1 > valueno)
5304 /* We must treat frame pointer as varying here,
5305 since it can vary--in a nonlocal goto as generated by expand_goto. */
5306 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
5308 /* Now verify that the values of GOAL and VALUE remain unaltered
5309 until INSN is reached. */
5318 /* Don't trust the conversion past a function call
5319 if either of the two is in a call-clobbered register, or memory. */
5320 if (GET_CODE (p) == CALL_INSN
5321 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5322 && call_used_regs[regno])
5324 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5325 && call_used_regs[valueno])
5331 #ifdef INSN_CLOBBERS_REGNO_P
5332 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5333 && INSN_CLOBBERS_REGNO_P (p, valueno))
5334 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5335 && INSN_CLOBBERS_REGNO_P (p, regno)))
5339 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
5341 /* If this insn P stores in either GOAL or VALUE, return 0.
5342 If GOAL is a memory ref and this insn writes memory, return 0.
5343 If GOAL is a memory ref and its address is not constant,
5344 and this insn P changes a register used in GOAL, return 0. */
5347 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
5349 register rtx dest = SET_DEST (pat);
5350 while (GET_CODE (dest) == SUBREG
5351 || GET_CODE (dest) == ZERO_EXTRACT
5352 || GET_CODE (dest) == SIGN_EXTRACT
5353 || GET_CODE (dest) == STRICT_LOW_PART)
5354 dest = XEXP (dest, 0);
5355 if (GET_CODE (dest) == REG)
5357 register int xregno = REGNO (dest);
5359 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5360 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5363 if (xregno < regno + nregs && xregno + xnregs > regno)
5365 if (xregno < valueno + valuenregs
5366 && xregno + xnregs > valueno)
5368 if (goal_mem_addr_varies
5369 && reg_overlap_mentioned_for_reload_p (dest, goal))
5372 else if (goal_mem && GET_CODE (dest) == MEM
5373 && ! push_operand (dest, GET_MODE (dest)))
5375 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
5378 else if (GET_CODE (pat) == PARALLEL)
5381 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
5383 register rtx v1 = XVECEXP (pat, 0, i);
5384 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
5386 register rtx dest = SET_DEST (v1);
5387 while (GET_CODE (dest) == SUBREG
5388 || GET_CODE (dest) == ZERO_EXTRACT
5389 || GET_CODE (dest) == SIGN_EXTRACT
5390 || GET_CODE (dest) == STRICT_LOW_PART)
5391 dest = XEXP (dest, 0);
5392 if (GET_CODE (dest) == REG)
5394 register int xregno = REGNO (dest);
5396 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5397 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5400 if (xregno < regno + nregs
5401 && xregno + xnregs > regno)
5403 if (xregno < valueno + valuenregs
5404 && xregno + xnregs > valueno)
5406 if (goal_mem_addr_varies
5407 && reg_overlap_mentioned_for_reload_p (dest,
5411 else if (goal_mem && GET_CODE (dest) == MEM
5412 && ! push_operand (dest, GET_MODE (dest)))
5414 else if (need_stable_sp
5415 && push_operand (dest, GET_MODE (dest)))
5422 /* If this insn auto-increments or auto-decrements
5423 either regno or valueno, return 0 now.
5424 If GOAL is a memory ref and its address is not constant,
5425 and this insn P increments a register used in GOAL, return 0. */
5429 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
5430 if (REG_NOTE_KIND (link) == REG_INC
5431 && GET_CODE (XEXP (link, 0)) == REG)
5433 register int incno = REGNO (XEXP (link, 0));
5434 if (incno < regno + nregs && incno >= regno)
5436 if (incno < valueno + valuenregs && incno >= valueno)
5438 if (goal_mem_addr_varies
5439 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
5449 /* Find a place where INCED appears in an increment or decrement operator
5450 within X, and return the amount INCED is incremented or decremented by.
5451 The value is always positive. */
5454 find_inc_amount (x, inced)
5457 register enum rtx_code code = GET_CODE (x);
5463 register rtx addr = XEXP (x, 0);
5464 if ((GET_CODE (addr) == PRE_DEC
5465 || GET_CODE (addr) == POST_DEC
5466 || GET_CODE (addr) == PRE_INC
5467 || GET_CODE (addr) == POST_INC)
5468 && XEXP (addr, 0) == inced)
5469 return GET_MODE_SIZE (GET_MODE (x));
5472 fmt = GET_RTX_FORMAT (code);
5473 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5477 register int tem = find_inc_amount (XEXP (x, i), inced);
5484 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5486 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
5496 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5499 regno_clobbered_p (regno, insn)
5503 if (GET_CODE (PATTERN (insn)) == CLOBBER
5504 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
5505 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
5507 if (GET_CODE (PATTERN (insn)) == PARALLEL)
5509 int i = XVECLEN (PATTERN (insn), 0) - 1;
5513 rtx elt = XVECEXP (PATTERN (insn), 0, i);
5514 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
5515 && REGNO (XEXP (elt, 0)) == regno)
OSDN Git Service
