1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
93 #include "insn-config.h"
99 #include "hard-reg-set.h"
103 #include "function.h"
106 #ifndef REGISTER_MOVE_COST
107 #define REGISTER_MOVE_COST(m, x, y) 2
110 #ifndef REGNO_MODE_OK_FOR_BASE_P
111 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
114 #ifndef REG_MODE_OK_FOR_BASE_P
115 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
118 /* All reloads of the current insn are recorded here. See reload.h for
121 struct reload rld[MAX_RELOADS];
123 /* All the "earlyclobber" operands of the current insn
124 are recorded here. */
126 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
128 int reload_n_operands;
130 /* Replacing reloads.
132 If `replace_reloads' is nonzero, then as each reload is recorded
133 an entry is made for it in the table `replacements'.
134 Then later `subst_reloads' can look through that table and
135 perform all the replacements needed. */
137 /* Nonzero means record the places to replace. */
138 static int replace_reloads;
140 /* Each replacement is recorded with a structure like this. */
143 rtx *where; /* Location to store in */
144 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
145 a SUBREG; 0 otherwise. */
146 int what; /* which reload this is for */
147 enum machine_mode mode; /* mode it must have */
150 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
152 /* Number of replacements currently recorded. */
153 static int n_replacements;
155 /* Used to track what is modified by an operand. */
158 int reg_flag; /* Nonzero if referencing a register. */
159 int safe; /* Nonzero if this can't conflict with anything. */
160 rtx base; /* Base address for MEM. */
161 HOST_WIDE_INT start; /* Starting offset or register number. */
162 HOST_WIDE_INT end; /* Ending offset or register number. */
165 #ifdef SECONDARY_MEMORY_NEEDED
167 /* Save MEMs needed to copy from one class of registers to another. One MEM
168 is used per mode, but normally only one or two modes are ever used.
170 We keep two versions, before and after register elimination. The one
171 after register elimination is record separately for each operand. This
172 is done in case the address is not valid to be sure that we separately
175 static rtx secondary_memlocs[NUM_MACHINE_MODES];
176 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
179 /* The instruction we are doing reloads for;
180 so we can test whether a register dies in it. */
181 static rtx this_insn;
183 /* Nonzero if this instruction is a user-specified asm with operands. */
184 static int this_insn_is_asm;
186 /* If hard_regs_live_known is nonzero,
187 we can tell which hard regs are currently live,
188 at least enough to succeed in choosing dummy reloads. */
189 static int hard_regs_live_known;
191 /* Indexed by hard reg number,
192 element is nonnegative if hard reg has been spilled.
193 This vector is passed to `find_reloads' as an argument
194 and is not changed here. */
195 static short *static_reload_reg_p;
197 /* Set to 1 in subst_reg_equivs if it changes anything. */
198 static int subst_reg_equivs_changed;
200 /* On return from push_reload, holds the reload-number for the OUT
201 operand, which can be different for that from the input operand. */
202 static int output_reloadnum;
204 /* Compare two RTX's. */
205 #define MATCHES(x, y) \
206 (x == y || (x != 0 && (GET_CODE (x) == REG \
207 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
208 : rtx_equal_p (x, y) && ! side_effects_p (x))))
210 /* Indicates if two reloads purposes are for similar enough things that we
211 can merge their reloads. */
212 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
213 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
214 || ((when1) == (when2) && (op1) == (op2)) \
215 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
216 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
217 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
218 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
219 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
221 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
222 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
223 ((when1) != (when2) \
224 || ! ((op1) == (op2) \
225 || (when1) == RELOAD_FOR_INPUT \
226 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
227 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
229 /* If we are going to reload an address, compute the reload type to
231 #define ADDR_TYPE(type) \
232 ((type) == RELOAD_FOR_INPUT_ADDRESS \
233 ? RELOAD_FOR_INPADDR_ADDRESS \
234 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
235 ? RELOAD_FOR_OUTADDR_ADDRESS \
238 #ifdef HAVE_SECONDARY_RELOADS
239 static int push_secondary_reload PARAMS ((int, rtx, int, int, enum reg_class,
240 enum machine_mode, enum reload_type,
243 static enum reg_class find_valid_class PARAMS ((enum machine_mode, int,
245 static int reload_inner_reg_of_subreg PARAMS ((rtx, enum machine_mode));
246 static void push_replacement PARAMS ((rtx *, int, enum machine_mode));
247 static void dup_replacements PARAMS ((rtx *, rtx *));
248 static void combine_reloads PARAMS ((void));
249 static int find_reusable_reload PARAMS ((rtx *, rtx, enum reg_class,
250 enum reload_type, int, int));
251 static rtx find_dummy_reload PARAMS ((rtx, rtx, rtx *, rtx *,
252 enum machine_mode, enum machine_mode,
253 enum reg_class, int, int));
254 static int hard_reg_set_here_p PARAMS ((unsigned int, unsigned int, rtx));
255 static struct decomposition decompose PARAMS ((rtx));
256 static int immune_p PARAMS ((rtx, rtx, struct decomposition));
257 static int alternative_allows_memconst PARAMS ((const char *, int));
258 static rtx find_reloads_toplev PARAMS ((rtx, int, enum reload_type, int,
260 static rtx make_memloc PARAMS ((rtx, int));
261 static int find_reloads_address PARAMS ((enum machine_mode, rtx *, rtx, rtx *,
262 int, enum reload_type, int, rtx));
263 static rtx subst_reg_equivs PARAMS ((rtx, rtx));
264 static rtx subst_indexed_address PARAMS ((rtx));
265 static void update_auto_inc_notes PARAMS ((rtx, int, int));
266 static int find_reloads_address_1 PARAMS ((enum machine_mode, rtx, int, rtx *,
267 int, enum reload_type,int, rtx));
268 static void find_reloads_address_part PARAMS ((rtx, rtx *, enum reg_class,
269 enum machine_mode, int,
270 enum reload_type, int));
271 static rtx find_reloads_subreg_address PARAMS ((rtx, int, int,
272 enum reload_type, int, rtx));
273 static void copy_replacements_1 PARAMS ((rtx *, rtx *, int));
274 static int find_inc_amount PARAMS ((rtx, rtx));
276 #ifdef HAVE_SECONDARY_RELOADS
278 /* Determine if any secondary reloads are needed for loading (if IN_P is
279 non-zero) or storing (if IN_P is zero) X to or from a reload register of
280 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
281 are needed, push them.
283 Return the reload number of the secondary reload we made, or -1 if
284 we didn't need one. *PICODE is set to the insn_code to use if we do
285 need a secondary reload. */
288 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
294 enum reg_class reload_class;
295 enum machine_mode reload_mode;
296 enum reload_type type;
297 enum insn_code *picode;
299 enum reg_class class = NO_REGS;
300 enum machine_mode mode = reload_mode;
301 enum insn_code icode = CODE_FOR_nothing;
302 enum reg_class t_class = NO_REGS;
303 enum machine_mode t_mode = VOIDmode;
304 enum insn_code t_icode = CODE_FOR_nothing;
305 enum reload_type secondary_type;
306 int s_reload, t_reload = -1;
308 if (type == RELOAD_FOR_INPUT_ADDRESS
309 || type == RELOAD_FOR_OUTPUT_ADDRESS
310 || type == RELOAD_FOR_INPADDR_ADDRESS
311 || type == RELOAD_FOR_OUTADDR_ADDRESS)
312 secondary_type = type;
314 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
316 *picode = CODE_FOR_nothing;
318 /* If X is a paradoxical SUBREG, use the inner value to determine both the
319 mode and object being reloaded. */
320 if (GET_CODE (x) == SUBREG
321 && (GET_MODE_SIZE (GET_MODE (x))
322 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
325 reload_mode = GET_MODE (x);
328 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
329 is still a pseudo-register by now, it *must* have an equivalent MEM
330 but we don't want to assume that), use that equivalent when seeing if
331 a secondary reload is needed since whether or not a reload is needed
332 might be sensitive to the form of the MEM. */
334 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
335 && reg_equiv_mem[REGNO (x)] != 0)
336 x = reg_equiv_mem[REGNO (x)];
338 #ifdef SECONDARY_INPUT_RELOAD_CLASS
340 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
343 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
345 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
348 /* If we don't need any secondary registers, done. */
349 if (class == NO_REGS)
352 /* Get a possible insn to use. If the predicate doesn't accept X, don't
355 icode = (in_p ? reload_in_optab[(int) reload_mode]
356 : reload_out_optab[(int) reload_mode]);
358 if (icode != CODE_FOR_nothing
359 && insn_data[(int) icode].operand[in_p].predicate
360 && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode)))
361 icode = CODE_FOR_nothing;
363 /* If we will be using an insn, see if it can directly handle the reload
364 register we will be using. If it can, the secondary reload is for a
365 scratch register. If it can't, we will use the secondary reload for
366 an intermediate register and require a tertiary reload for the scratch
369 if (icode != CODE_FOR_nothing)
371 /* If IN_P is non-zero, the reload register will be the output in
372 operand 0. If IN_P is zero, the reload register will be the input
373 in operand 1. Outputs should have an initial "=", which we must
376 enum reg_class insn_class;
378 if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0)
379 insn_class = ALL_REGS;
383 = insn_data[(int) icode].operand[!in_p].constraint[in_p];
385 = (insn_letter == 'r' ? GENERAL_REGS
386 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter));
388 if (insn_class == NO_REGS)
391 && insn_data[(int) icode].operand[!in_p].constraint[0] != '=')
395 /* The scratch register's constraint must start with "=&". */
396 if (insn_data[(int) icode].operand[2].constraint[0] != '='
397 || insn_data[(int) icode].operand[2].constraint[1] != '&')
400 if (reg_class_subset_p (reload_class, insn_class))
401 mode = insn_data[(int) icode].operand[2].mode;
404 char t_letter = insn_data[(int) icode].operand[2].constraint[2];
406 t_mode = insn_data[(int) icode].operand[2].mode;
407 t_class = (t_letter == 'r' ? GENERAL_REGS
408 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter));
410 icode = CODE_FOR_nothing;
414 /* This case isn't valid, so fail. Reload is allowed to use the same
415 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
416 in the case of a secondary register, we actually need two different
417 registers for correct code. We fail here to prevent the possibility of
418 silently generating incorrect code later.
420 The convention is that secondary input reloads are valid only if the
421 secondary_class is different from class. If you have such a case, you
422 can not use secondary reloads, you must work around the problem some
425 Allow this when a reload_in/out pattern is being used. I.e. assume
426 that the generated code handles this case. */
428 if (in_p && class == reload_class && icode == CODE_FOR_nothing
429 && t_icode == CODE_FOR_nothing)
432 /* If we need a tertiary reload, see if we have one we can reuse or else
435 if (t_class != NO_REGS)
437 for (t_reload = 0; t_reload < n_reloads; t_reload++)
438 if (rld[t_reload].secondary_p
439 && (reg_class_subset_p (t_class, rld[t_reload].class)
440 || reg_class_subset_p (rld[t_reload].class, t_class))
441 && ((in_p && rld[t_reload].inmode == t_mode)
442 || (! in_p && rld[t_reload].outmode == t_mode))
443 && ((in_p && (rld[t_reload].secondary_in_icode
444 == CODE_FOR_nothing))
445 || (! in_p &&(rld[t_reload].secondary_out_icode
446 == CODE_FOR_nothing)))
447 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
448 && MERGABLE_RELOADS (secondary_type,
449 rld[t_reload].when_needed,
450 opnum, rld[t_reload].opnum))
453 rld[t_reload].inmode = t_mode;
455 rld[t_reload].outmode = t_mode;
457 if (reg_class_subset_p (t_class, rld[t_reload].class))
458 rld[t_reload].class = t_class;
460 rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum);
461 rld[t_reload].optional &= optional;
462 rld[t_reload].secondary_p = 1;
463 if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed,
464 opnum, rld[t_reload].opnum))
465 rld[t_reload].when_needed = RELOAD_OTHER;
468 if (t_reload == n_reloads)
470 /* We need to make a new tertiary reload for this register class. */
471 rld[t_reload].in = rld[t_reload].out = 0;
472 rld[t_reload].class = t_class;
473 rld[t_reload].inmode = in_p ? t_mode : VOIDmode;
474 rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode;
475 rld[t_reload].reg_rtx = 0;
476 rld[t_reload].optional = optional;
477 rld[t_reload].inc = 0;
478 /* Maybe we could combine these, but it seems too tricky. */
479 rld[t_reload].nocombine = 1;
480 rld[t_reload].in_reg = 0;
481 rld[t_reload].out_reg = 0;
482 rld[t_reload].opnum = opnum;
483 rld[t_reload].when_needed = secondary_type;
484 rld[t_reload].secondary_in_reload = -1;
485 rld[t_reload].secondary_out_reload = -1;
486 rld[t_reload].secondary_in_icode = CODE_FOR_nothing;
487 rld[t_reload].secondary_out_icode = CODE_FOR_nothing;
488 rld[t_reload].secondary_p = 1;
494 /* See if we can reuse an existing secondary reload. */
495 for (s_reload = 0; s_reload < n_reloads; s_reload++)
496 if (rld[s_reload].secondary_p
497 && (reg_class_subset_p (class, rld[s_reload].class)
498 || reg_class_subset_p (rld[s_reload].class, class))
499 && ((in_p && rld[s_reload].inmode == mode)
500 || (! in_p && rld[s_reload].outmode == mode))
501 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
502 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
503 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
504 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
505 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
506 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
507 opnum, rld[s_reload].opnum))
510 rld[s_reload].inmode = mode;
512 rld[s_reload].outmode = mode;
514 if (reg_class_subset_p (class, rld[s_reload].class))
515 rld[s_reload].class = class;
517 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
518 rld[s_reload].optional &= optional;
519 rld[s_reload].secondary_p = 1;
520 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
521 opnum, rld[s_reload].opnum))
522 rld[s_reload].when_needed = RELOAD_OTHER;
525 if (s_reload == n_reloads)
527 #ifdef SECONDARY_MEMORY_NEEDED
528 /* If we need a memory location to copy between the two reload regs,
529 set it up now. Note that we do the input case before making
530 the reload and the output case after. This is due to the
531 way reloads are output. */
533 if (in_p && icode == CODE_FOR_nothing
534 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
536 get_secondary_mem (x, reload_mode, opnum, type);
538 /* We may have just added new reloads. Make sure we add
539 the new reload at the end. */
540 s_reload = n_reloads;
544 /* We need to make a new secondary reload for this register class. */
545 rld[s_reload].in = rld[s_reload].out = 0;
546 rld[s_reload].class = class;
548 rld[s_reload].inmode = in_p ? mode : VOIDmode;
549 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
550 rld[s_reload].reg_rtx = 0;
551 rld[s_reload].optional = optional;
552 rld[s_reload].inc = 0;
553 /* Maybe we could combine these, but it seems too tricky. */
554 rld[s_reload].nocombine = 1;
555 rld[s_reload].in_reg = 0;
556 rld[s_reload].out_reg = 0;
557 rld[s_reload].opnum = opnum;
558 rld[s_reload].when_needed = secondary_type;
559 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
560 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
561 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
562 rld[s_reload].secondary_out_icode
563 = ! in_p ? t_icode : CODE_FOR_nothing;
564 rld[s_reload].secondary_p = 1;
568 #ifdef SECONDARY_MEMORY_NEEDED
569 if (! in_p && icode == CODE_FOR_nothing
570 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
571 get_secondary_mem (x, mode, opnum, type);
578 #endif /* HAVE_SECONDARY_RELOADS */
580 #ifdef SECONDARY_MEMORY_NEEDED
582 /* Return a memory location that will be used to copy X in mode MODE.
583 If we haven't already made a location for this mode in this insn,
584 call find_reloads_address on the location being returned. */
587 get_secondary_mem (x, mode, opnum, type)
588 rtx x ATTRIBUTE_UNUSED;
589 enum machine_mode mode;
591 enum reload_type type;
596 /* By default, if MODE is narrower than a word, widen it to a word.
597 This is required because most machines that require these memory
598 locations do not support short load and stores from all registers
599 (e.g., FP registers). */
601 #ifdef SECONDARY_MEMORY_NEEDED_MODE
602 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
604 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
605 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
608 /* If we already have made a MEM for this operand in MODE, return it. */
609 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
610 return secondary_memlocs_elim[(int) mode][opnum];
612 /* If this is the first time we've tried to get a MEM for this mode,
613 allocate a new one. `something_changed' in reload will get set
614 by noticing that the frame size has changed. */
616 if (secondary_memlocs[(int) mode] == 0)
618 #ifdef SECONDARY_MEMORY_NEEDED_RTX
619 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
621 secondary_memlocs[(int) mode]
622 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
626 /* Get a version of the address doing any eliminations needed. If that
627 didn't give us a new MEM, make a new one if it isn't valid. */
629 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
630 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
632 if (! mem_valid && loc == secondary_memlocs[(int) mode])
633 loc = copy_rtx (loc);
635 /* The only time the call below will do anything is if the stack
636 offset is too large. In that case IND_LEVELS doesn't matter, so we
637 can just pass a zero. Adjust the type to be the address of the
638 corresponding object. If the address was valid, save the eliminated
639 address. If it wasn't valid, we need to make a reload each time, so
644 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
645 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
648 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
652 secondary_memlocs_elim[(int) mode][opnum] = loc;
656 /* Clear any secondary memory locations we've made. */
659 clear_secondary_mem ()
661 memset ((char *) secondary_memlocs, 0, sizeof secondary_memlocs);
663 #endif /* SECONDARY_MEMORY_NEEDED */
665 /* Find the largest class for which every register number plus N is valid in
666 M1 (if in range) and is cheap to move into REGNO.
667 Abort if no such class exists. */
669 static enum reg_class
670 find_valid_class (m1, n, dest_regno)
671 enum machine_mode m1 ATTRIBUTE_UNUSED;
673 unsigned int dest_regno;
678 enum reg_class best_class = NO_REGS;
679 enum reg_class dest_class = REGNO_REG_CLASS (dest_regno);
680 unsigned int best_size = 0;
683 for (class = 1; class < N_REG_CLASSES; class++)
686 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
687 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
688 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
689 && ! HARD_REGNO_MODE_OK (regno + n, m1))
694 cost = REGISTER_MOVE_COST (m1, class, dest_class);
696 if ((reg_class_size[class] > best_size
697 && (best_cost < 0 || best_cost >= cost))
701 best_size = reg_class_size[class];
702 best_cost = REGISTER_MOVE_COST (m1, class, dest_class);
712 /* Return the number of a previously made reload that can be combined with
713 a new one, or n_reloads if none of the existing reloads can be used.
714 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
715 push_reload, they determine the kind of the new reload that we try to
716 combine. P_IN points to the corresponding value of IN, which can be
717 modified by this function.
718 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
721 find_reusable_reload (p_in, out, class, type, opnum, dont_share)
723 enum reg_class class;
724 enum reload_type type;
725 int opnum, dont_share;
729 /* We can't merge two reloads if the output of either one is
732 if (earlyclobber_operand_p (out))
735 /* We can use an existing reload if the class is right
736 and at least one of IN and OUT is a match
737 and the other is at worst neutral.
738 (A zero compared against anything is neutral.)
740 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
741 for the same thing since that can cause us to need more reload registers
742 than we otherwise would. */
744 for (i = 0; i < n_reloads; i++)
745 if ((reg_class_subset_p (class, rld[i].class)
746 || reg_class_subset_p (rld[i].class, class))
747 /* If the existing reload has a register, it must fit our class. */
748 && (rld[i].reg_rtx == 0
749 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
750 true_regnum (rld[i].reg_rtx)))
751 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
752 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
753 || (out != 0 && MATCHES (rld[i].out, out)
754 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
755 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
756 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
757 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
760 /* Reloading a plain reg for input can match a reload to postincrement
761 that reg, since the postincrement's value is the right value.
762 Likewise, it can match a preincrement reload, since we regard
763 the preincrementation as happening before any ref in this insn
765 for (i = 0; i < n_reloads; i++)
766 if ((reg_class_subset_p (class, rld[i].class)
767 || reg_class_subset_p (rld[i].class, class))
768 /* If the existing reload has a register, it must fit our
770 && (rld[i].reg_rtx == 0
771 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
772 true_regnum (rld[i].reg_rtx)))
773 && out == 0 && rld[i].out == 0 && rld[i].in != 0
774 && ((GET_CODE (in) == REG
775 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == 'a'
776 && MATCHES (XEXP (rld[i].in, 0), in))
777 || (GET_CODE (rld[i].in) == REG
778 && GET_RTX_CLASS (GET_CODE (in)) == 'a'
779 && MATCHES (XEXP (in, 0), rld[i].in)))
780 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
781 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
782 && MERGABLE_RELOADS (type, rld[i].when_needed,
783 opnum, rld[i].opnum))
785 /* Make sure reload_in ultimately has the increment,
786 not the plain register. */
787 if (GET_CODE (in) == REG)
794 /* Return nonzero if X is a SUBREG which will require reloading of its
795 SUBREG_REG expression. */
798 reload_inner_reg_of_subreg (x, mode)
800 enum machine_mode mode;
804 /* Only SUBREGs are problematical. */
805 if (GET_CODE (x) != SUBREG)
808 inner = SUBREG_REG (x);
810 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
811 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
814 /* If INNER is not a hard register, then INNER will not need to
816 if (GET_CODE (inner) != REG
817 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
820 /* If INNER is not ok for MODE, then INNER will need reloading. */
821 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
824 /* If the outer part is a word or smaller, INNER larger than a
825 word and the number of regs for INNER is not the same as the
826 number of words in INNER, then INNER will need reloading. */
827 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
828 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
829 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
830 != (int) HARD_REGNO_NREGS (REGNO (inner), GET_MODE (inner))));
833 /* Record one reload that needs to be performed.
834 IN is an rtx saying where the data are to be found before this instruction.
835 OUT says where they must be stored after the instruction.
836 (IN is zero for data not read, and OUT is zero for data not written.)
837 INLOC and OUTLOC point to the places in the instructions where
838 IN and OUT were found.
839 If IN and OUT are both non-zero, it means the same register must be used
840 to reload both IN and OUT.
842 CLASS is a register class required for the reloaded data.
843 INMODE is the machine mode that the instruction requires
844 for the reg that replaces IN and OUTMODE is likewise for OUT.
846 If IN is zero, then OUT's location and mode should be passed as
849 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
851 OPTIONAL nonzero means this reload does not need to be performed:
852 it can be discarded if that is more convenient.
854 OPNUM and TYPE say what the purpose of this reload is.
856 The return value is the reload-number for this reload.
858 If both IN and OUT are nonzero, in some rare cases we might
859 want to make two separate reloads. (Actually we never do this now.)
860 Therefore, the reload-number for OUT is stored in
861 output_reloadnum when we return; the return value applies to IN.
862 Usually (presently always), when IN and OUT are nonzero,
863 the two reload-numbers are equal, but the caller should be careful to
867 push_reload (in, out, inloc, outloc, class,
868 inmode, outmode, strict_low, optional, opnum, type)
871 enum reg_class class;
872 enum machine_mode inmode, outmode;
876 enum reload_type type;
880 int dont_remove_subreg = 0;
881 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
882 int secondary_in_reload = -1, secondary_out_reload = -1;
883 enum insn_code secondary_in_icode = CODE_FOR_nothing;
884 enum insn_code secondary_out_icode = CODE_FOR_nothing;
886 /* INMODE and/or OUTMODE could be VOIDmode if no mode
887 has been specified for the operand. In that case,
888 use the operand's mode as the mode to reload. */
889 if (inmode == VOIDmode && in != 0)
890 inmode = GET_MODE (in);
891 if (outmode == VOIDmode && out != 0)
892 outmode = GET_MODE (out);
894 /* If IN is a pseudo register everywhere-equivalent to a constant, and
895 it is not in a hard register, reload straight from the constant,
896 since we want to get rid of such pseudo registers.
897 Often this is done earlier, but not always in find_reloads_address. */
898 if (in != 0 && GET_CODE (in) == REG)
900 int regno = REGNO (in);
902 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
903 && reg_equiv_constant[regno] != 0)
904 in = reg_equiv_constant[regno];
907 /* Likewise for OUT. Of course, OUT will never be equivalent to
908 an actual constant, but it might be equivalent to a memory location
909 (in the case of a parameter). */
910 if (out != 0 && GET_CODE (out) == REG)
912 int regno = REGNO (out);
914 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
915 && reg_equiv_constant[regno] != 0)
916 out = reg_equiv_constant[regno];
919 /* If we have a read-write operand with an address side-effect,
920 change either IN or OUT so the side-effect happens only once. */
921 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
922 switch (GET_CODE (XEXP (in, 0)))
924 case POST_INC: case POST_DEC: case POST_MODIFY:
925 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
928 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
929 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
936 /* If we are reloading a (SUBREG constant ...), really reload just the
937 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
938 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
939 a pseudo and hence will become a MEM) with M1 wider than M2 and the
940 register is a pseudo, also reload the inside expression.
941 For machines that extend byte loads, do this for any SUBREG of a pseudo
942 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
943 M2 is an integral mode that gets extended when loaded.
944 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
945 either M1 is not valid for R or M2 is wider than a word but we only
946 need one word to store an M2-sized quantity in R.
947 (However, if OUT is nonzero, we need to reload the reg *and*
948 the subreg, so do nothing here, and let following statement handle it.)
950 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
951 we can't handle it here because CONST_INT does not indicate a mode.
953 Similarly, we must reload the inside expression if we have a
954 STRICT_LOW_PART (presumably, in == out in the cas).
956 Also reload the inner expression if it does not require a secondary
957 reload but the SUBREG does.
959 Finally, reload the inner expression if it is a register that is in
960 the class whose registers cannot be referenced in a different size
961 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
962 cannot reload just the inside since we might end up with the wrong
963 register class. But if it is inside a STRICT_LOW_PART, we have
964 no choice, so we hope we do get the right register class there. */
966 if (in != 0 && GET_CODE (in) == SUBREG
967 && (subreg_lowpart_p (in) || strict_low)
968 #ifdef CLASS_CANNOT_CHANGE_MODE
969 && (class != CLASS_CANNOT_CHANGE_MODE
970 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)), inmode))
972 && (CONSTANT_P (SUBREG_REG (in))
973 || GET_CODE (SUBREG_REG (in)) == PLUS
975 || (((GET_CODE (SUBREG_REG (in)) == REG
976 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
977 || GET_CODE (SUBREG_REG (in)) == MEM)
978 && ((GET_MODE_SIZE (inmode)
979 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
980 #ifdef LOAD_EXTEND_OP
981 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
982 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
984 && (GET_MODE_SIZE (inmode)
985 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
986 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
987 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
989 #ifdef WORD_REGISTER_OPERATIONS
990 || ((GET_MODE_SIZE (inmode)
991 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
992 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
993 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
997 || (GET_CODE (SUBREG_REG (in)) == REG
998 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
999 /* The case where out is nonzero
1000 is handled differently in the following statement. */
1001 && (out == 0 || subreg_lowpart_p (in))
1002 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1003 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1005 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1007 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1008 GET_MODE (SUBREG_REG (in)))))
1009 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1010 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1011 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
1012 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1013 GET_MODE (SUBREG_REG (in)),
1017 #ifdef CLASS_CANNOT_CHANGE_MODE
1018 || (GET_CODE (SUBREG_REG (in)) == REG
1019 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1020 && (TEST_HARD_REG_BIT
1021 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
1022 REGNO (SUBREG_REG (in))))
1023 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)),
1028 in_subreg_loc = inloc;
1029 inloc = &SUBREG_REG (in);
1031 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1032 if (GET_CODE (in) == MEM)
1033 /* This is supposed to happen only for paradoxical subregs made by
1034 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1035 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
1038 inmode = GET_MODE (in);
1041 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1042 either M1 is not valid for R or M2 is wider than a word but we only
1043 need one word to store an M2-sized quantity in R.
1045 However, we must reload the inner reg *as well as* the subreg in
1048 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1049 code above. This can happen if SUBREG_BYTE != 0. */
1051 if (in != 0 && reload_inner_reg_of_subreg (in, inmode))
1053 enum reg_class in_class = class;
1055 if (GET_CODE (SUBREG_REG (in)) == REG)
1057 = find_valid_class (inmode,
1058 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1059 GET_MODE (SUBREG_REG (in)),
1062 REGNO (SUBREG_REG (in)));
1064 /* This relies on the fact that emit_reload_insns outputs the
1065 instructions for input reloads of type RELOAD_OTHER in the same
1066 order as the reloads. Thus if the outer reload is also of type
1067 RELOAD_OTHER, we are guaranteed that this inner reload will be
1068 output before the outer reload. */
1069 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1070 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1071 dont_remove_subreg = 1;
1074 /* Similarly for paradoxical and problematical SUBREGs on the output.
1075 Note that there is no reason we need worry about the previous value
1076 of SUBREG_REG (out); even if wider than out,
1077 storing in a subreg is entitled to clobber it all
1078 (except in the case of STRICT_LOW_PART,
1079 and in that case the constraint should label it input-output.) */
1080 if (out != 0 && GET_CODE (out) == SUBREG
1081 && (subreg_lowpart_p (out) || strict_low)
1082 #ifdef CLASS_CANNOT_CHANGE_MODE
1083 && (class != CLASS_CANNOT_CHANGE_MODE
1084 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)),
1087 && (CONSTANT_P (SUBREG_REG (out))
1089 || (((GET_CODE (SUBREG_REG (out)) == REG
1090 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1091 || GET_CODE (SUBREG_REG (out)) == MEM)
1092 && ((GET_MODE_SIZE (outmode)
1093 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1094 #ifdef WORD_REGISTER_OPERATIONS
1095 || ((GET_MODE_SIZE (outmode)
1096 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1097 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1098 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1102 || (GET_CODE (SUBREG_REG (out)) == REG
1103 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1104 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1105 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1107 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1109 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1110 GET_MODE (SUBREG_REG (out)))))
1111 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1112 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1113 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1114 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1115 GET_MODE (SUBREG_REG (out)),
1119 #ifdef CLASS_CANNOT_CHANGE_MODE
1120 || (GET_CODE (SUBREG_REG (out)) == REG
1121 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1122 && (TEST_HARD_REG_BIT
1123 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
1124 REGNO (SUBREG_REG (out))))
1125 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)),
1130 out_subreg_loc = outloc;
1131 outloc = &SUBREG_REG (out);
1133 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1134 if (GET_CODE (out) == MEM
1135 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1138 outmode = GET_MODE (out);
1141 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1142 either M1 is not valid for R or M2 is wider than a word but we only
1143 need one word to store an M2-sized quantity in R.
1145 However, we must reload the inner reg *as well as* the subreg in
1146 that case. In this case, the inner reg is an in-out reload. */
1148 if (out != 0 && reload_inner_reg_of_subreg (out, outmode))
1150 /* This relies on the fact that emit_reload_insns outputs the
1151 instructions for output reloads of type RELOAD_OTHER in reverse
1152 order of the reloads. Thus if the outer reload is also of type
1153 RELOAD_OTHER, we are guaranteed that this inner reload will be
1154 output after the outer reload. */
1155 dont_remove_subreg = 1;
1156 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1158 find_valid_class (outmode,
1159 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1160 GET_MODE (SUBREG_REG (out)),
1163 REGNO (SUBREG_REG (out))),
1164 VOIDmode, VOIDmode, 0, 0,
1165 opnum, RELOAD_OTHER);
1168 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1169 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1170 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1171 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1174 /* If IN is a SUBREG of a hard register, make a new REG. This
1175 simplifies some of the cases below. */
1177 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1178 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1179 && ! dont_remove_subreg)
1180 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1182 /* Similarly for OUT. */
1183 if (out != 0 && GET_CODE (out) == SUBREG
1184 && GET_CODE (SUBREG_REG (out)) == REG
1185 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1186 && ! dont_remove_subreg)
1187 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1189 /* Narrow down the class of register wanted if that is
1190 desirable on this machine for efficiency. */
1192 class = PREFERRED_RELOAD_CLASS (in, class);
1194 /* Output reloads may need analogous treatment, different in detail. */
1195 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1197 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1200 /* Make sure we use a class that can handle the actual pseudo
1201 inside any subreg. For example, on the 386, QImode regs
1202 can appear within SImode subregs. Although GENERAL_REGS
1203 can handle SImode, QImode needs a smaller class. */
1204 #ifdef LIMIT_RELOAD_CLASS
1206 class = LIMIT_RELOAD_CLASS (inmode, class);
1207 else if (in != 0 && GET_CODE (in) == SUBREG)
1208 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1211 class = LIMIT_RELOAD_CLASS (outmode, class);
1212 if (out != 0 && GET_CODE (out) == SUBREG)
1213 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1216 /* Verify that this class is at least possible for the mode that
1218 if (this_insn_is_asm)
1220 enum machine_mode mode;
1221 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1225 if (mode == VOIDmode)
1227 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1232 outmode = word_mode;
1234 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1235 if (HARD_REGNO_MODE_OK (i, mode)
1236 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1238 int nregs = HARD_REGNO_NREGS (i, mode);
1241 for (j = 1; j < nregs; j++)
1242 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1247 if (i == FIRST_PSEUDO_REGISTER)
1249 error_for_asm (this_insn, "impossible register constraint in `asm'");
1254 /* Optional output reloads are always OK even if we have no register class,
1255 since the function of these reloads is only to have spill_reg_store etc.
1256 set, so that the storing insn can be deleted later. */
1257 if (class == NO_REGS
1258 && (optional == 0 || type != RELOAD_FOR_OUTPUT))
1261 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1265 /* See if we need a secondary reload register to move between CLASS
1266 and IN or CLASS and OUT. Get the icode and push any required reloads
1267 needed for each of them if so. */
1269 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1272 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1273 &secondary_in_icode);
1276 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1277 if (out != 0 && GET_CODE (out) != SCRATCH)
1278 secondary_out_reload
1279 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1280 type, &secondary_out_icode);
1283 /* We found no existing reload suitable for re-use.
1284 So add an additional reload. */
1286 #ifdef SECONDARY_MEMORY_NEEDED
1287 /* If a memory location is needed for the copy, make one. */
1288 if (in != 0 && GET_CODE (in) == REG
1289 && REGNO (in) < FIRST_PSEUDO_REGISTER
1290 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1292 get_secondary_mem (in, inmode, opnum, type);
1298 rld[i].class = class;
1299 rld[i].inmode = inmode;
1300 rld[i].outmode = outmode;
1302 rld[i].optional = optional;
1304 rld[i].nocombine = 0;
1305 rld[i].in_reg = inloc ? *inloc : 0;
1306 rld[i].out_reg = outloc ? *outloc : 0;
1307 rld[i].opnum = opnum;
1308 rld[i].when_needed = type;
1309 rld[i].secondary_in_reload = secondary_in_reload;
1310 rld[i].secondary_out_reload = secondary_out_reload;
1311 rld[i].secondary_in_icode = secondary_in_icode;
1312 rld[i].secondary_out_icode = secondary_out_icode;
1313 rld[i].secondary_p = 0;
1317 #ifdef SECONDARY_MEMORY_NEEDED
1318 if (out != 0 && GET_CODE (out) == REG
1319 && REGNO (out) < FIRST_PSEUDO_REGISTER
1320 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1322 get_secondary_mem (out, outmode, opnum, type);
1327 /* We are reusing an existing reload,
1328 but we may have additional information for it.
1329 For example, we may now have both IN and OUT
1330 while the old one may have just one of them. */
1332 /* The modes can be different. If they are, we want to reload in
1333 the larger mode, so that the value is valid for both modes. */
1334 if (inmode != VOIDmode
1335 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1336 rld[i].inmode = inmode;
1337 if (outmode != VOIDmode
1338 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1339 rld[i].outmode = outmode;
1342 rtx in_reg = inloc ? *inloc : 0;
1343 /* If we merge reloads for two distinct rtl expressions that
1344 are identical in content, there might be duplicate address
1345 reloads. Remove the extra set now, so that if we later find
1346 that we can inherit this reload, we can get rid of the
1347 address reloads altogether.
1349 Do not do this if both reloads are optional since the result
1350 would be an optional reload which could potentially leave
1351 unresolved address replacements.
1353 It is not sufficient to call transfer_replacements since
1354 choose_reload_regs will remove the replacements for address
1355 reloads of inherited reloads which results in the same
1357 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1358 && ! (rld[i].optional && optional))
1360 /* We must keep the address reload with the lower operand
1362 if (opnum > rld[i].opnum)
1364 remove_address_replacements (in);
1366 in_reg = rld[i].in_reg;
1369 remove_address_replacements (rld[i].in);
1372 rld[i].in_reg = in_reg;
1377 rld[i].out_reg = outloc ? *outloc : 0;
1379 if (reg_class_subset_p (class, rld[i].class))
1380 rld[i].class = class;
1381 rld[i].optional &= optional;
1382 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1383 opnum, rld[i].opnum))
1384 rld[i].when_needed = RELOAD_OTHER;
1385 rld[i].opnum = MIN (rld[i].opnum, opnum);
1388 /* If the ostensible rtx being reloaded differs from the rtx found
1389 in the location to substitute, this reload is not safe to combine
1390 because we cannot reliably tell whether it appears in the insn. */
1392 if (in != 0 && in != *inloc)
1393 rld[i].nocombine = 1;
1396 /* This was replaced by changes in find_reloads_address_1 and the new
1397 function inc_for_reload, which go with a new meaning of reload_inc. */
1399 /* If this is an IN/OUT reload in an insn that sets the CC,
1400 it must be for an autoincrement. It doesn't work to store
1401 the incremented value after the insn because that would clobber the CC.
1402 So we must do the increment of the value reloaded from,
1403 increment it, store it back, then decrement again. */
1404 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1408 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1409 /* If we did not find a nonzero amount-to-increment-by,
1410 that contradicts the belief that IN is being incremented
1411 in an address in this insn. */
1412 if (rld[i].inc == 0)
1417 /* If we will replace IN and OUT with the reload-reg,
1418 record where they are located so that substitution need
1419 not do a tree walk. */
1421 if (replace_reloads)
1425 struct replacement *r = &replacements[n_replacements++];
1427 r->subreg_loc = in_subreg_loc;
1431 if (outloc != 0 && outloc != inloc)
1433 struct replacement *r = &replacements[n_replacements++];
1436 r->subreg_loc = out_subreg_loc;
1441 /* If this reload is just being introduced and it has both
1442 an incoming quantity and an outgoing quantity that are
1443 supposed to be made to match, see if either one of the two
1444 can serve as the place to reload into.
1446 If one of them is acceptable, set rld[i].reg_rtx
1449 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1451 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1454 earlyclobber_operand_p (out));
1456 /* If the outgoing register already contains the same value
1457 as the incoming one, we can dispense with loading it.
1458 The easiest way to tell the caller that is to give a phony
1459 value for the incoming operand (same as outgoing one). */
1460 if (rld[i].reg_rtx == out
1461 && (GET_CODE (in) == REG || CONSTANT_P (in))
1462 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1463 static_reload_reg_p, i, inmode))
1467 /* If this is an input reload and the operand contains a register that
1468 dies in this insn and is used nowhere else, see if it is the right class
1469 to be used for this reload. Use it if so. (This occurs most commonly
1470 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1471 this if it is also an output reload that mentions the register unless
1472 the output is a SUBREG that clobbers an entire register.
1474 Note that the operand might be one of the spill regs, if it is a
1475 pseudo reg and we are in a block where spilling has not taken place.
1476 But if there is no spilling in this block, that is OK.
1477 An explicitly used hard reg cannot be a spill reg. */
1479 if (rld[i].reg_rtx == 0 && in != 0)
1483 enum machine_mode rel_mode = inmode;
1485 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1488 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1489 if (REG_NOTE_KIND (note) == REG_DEAD
1490 && GET_CODE (XEXP (note, 0)) == REG
1491 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1492 && reg_mentioned_p (XEXP (note, 0), in)
1493 && ! refers_to_regno_for_reload_p (regno,
1495 + HARD_REGNO_NREGS (regno,
1497 PATTERN (this_insn), inloc)
1498 /* If this is also an output reload, IN cannot be used as
1499 the reload register if it is set in this insn unless IN
1501 && (out == 0 || in == out
1502 || ! hard_reg_set_here_p (regno,
1504 + HARD_REGNO_NREGS (regno,
1506 PATTERN (this_insn)))
1507 /* ??? Why is this code so different from the previous?
1508 Is there any simple coherent way to describe the two together?
1509 What's going on here. */
1511 || (GET_CODE (in) == SUBREG
1512 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1514 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1515 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1516 /* Make sure the operand fits in the reg that dies. */
1517 && (GET_MODE_SIZE (rel_mode)
1518 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1519 && HARD_REGNO_MODE_OK (regno, inmode)
1520 && HARD_REGNO_MODE_OK (regno, outmode))
1523 unsigned int nregs = MAX (HARD_REGNO_NREGS (regno, inmode),
1524 HARD_REGNO_NREGS (regno, outmode));
1526 for (offs = 0; offs < nregs; offs++)
1527 if (fixed_regs[regno + offs]
1528 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1534 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1541 output_reloadnum = i;
1546 /* Record an additional place we must replace a value
1547 for which we have already recorded a reload.
1548 RELOADNUM is the value returned by push_reload
1549 when the reload was recorded.
1550 This is used in insn patterns that use match_dup. */
1553 push_replacement (loc, reloadnum, mode)
1556 enum machine_mode mode;
1558 if (replace_reloads)
1560 struct replacement *r = &replacements[n_replacements++];
1561 r->what = reloadnum;
1568 /* Duplicate any replacement we have recorded to apply at
1569 location ORIG_LOC to also be performed at DUP_LOC.
1570 This is used in insn patterns that use match_dup. */
1573 dup_replacements (dup_loc, orig_loc)
1577 int i, n = n_replacements;
1579 for (i = 0; i < n; i++)
1581 struct replacement *r = &replacements[i];
1582 if (r->where == orig_loc)
1583 push_replacement (dup_loc, r->what, r->mode);
1587 /* Transfer all replacements that used to be in reload FROM to be in
1591 transfer_replacements (to, from)
1596 for (i = 0; i < n_replacements; i++)
1597 if (replacements[i].what == from)
1598 replacements[i].what = to;
1601 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1602 or a subpart of it. If we have any replacements registered for IN_RTX,
1603 cancel the reloads that were supposed to load them.
1604 Return non-zero if we canceled any reloads. */
1606 remove_address_replacements (in_rtx)
1610 char reload_flags[MAX_RELOADS];
1611 int something_changed = 0;
1613 memset (reload_flags, 0, sizeof reload_flags);
1614 for (i = 0, j = 0; i < n_replacements; i++)
1616 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1617 reload_flags[replacements[i].what] |= 1;
1620 replacements[j++] = replacements[i];
1621 reload_flags[replacements[i].what] |= 2;
1624 /* Note that the following store must be done before the recursive calls. */
1627 for (i = n_reloads - 1; i >= 0; i--)
1629 if (reload_flags[i] == 1)
1631 deallocate_reload_reg (i);
1632 remove_address_replacements (rld[i].in);
1634 something_changed = 1;
1637 return something_changed;
1640 /* If there is only one output reload, and it is not for an earlyclobber
1641 operand, try to combine it with a (logically unrelated) input reload
1642 to reduce the number of reload registers needed.
1644 This is safe if the input reload does not appear in
1645 the value being output-reloaded, because this implies
1646 it is not needed any more once the original insn completes.
1648 If that doesn't work, see we can use any of the registers that
1649 die in this insn as a reload register. We can if it is of the right
1650 class and does not appear in the value being output-reloaded. */
1656 int output_reload = -1;
1657 int secondary_out = -1;
1660 /* Find the output reload; return unless there is exactly one
1661 and that one is mandatory. */
1663 for (i = 0; i < n_reloads; i++)
1664 if (rld[i].out != 0)
1666 if (output_reload >= 0)
1671 if (output_reload < 0 || rld[output_reload].optional)
1674 /* An input-output reload isn't combinable. */
1676 if (rld[output_reload].in != 0)
1679 /* If this reload is for an earlyclobber operand, we can't do anything. */
1680 if (earlyclobber_operand_p (rld[output_reload].out))
1683 /* If there is a reload for part of the address of this operand, we would
1684 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1685 its life to the point where doing this combine would not lower the
1686 number of spill registers needed. */
1687 for (i = 0; i < n_reloads; i++)
1688 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1689 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1690 && rld[i].opnum == rld[output_reload].opnum)
1693 /* Check each input reload; can we combine it? */
1695 for (i = 0; i < n_reloads; i++)
1696 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1697 /* Life span of this reload must not extend past main insn. */
1698 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1699 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1700 && rld[i].when_needed != RELOAD_OTHER
1701 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1702 == CLASS_MAX_NREGS (rld[output_reload].class,
1703 rld[output_reload].outmode))
1705 && rld[i].reg_rtx == 0
1706 #ifdef SECONDARY_MEMORY_NEEDED
1707 /* Don't combine two reloads with different secondary
1708 memory locations. */
1709 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1710 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1711 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1712 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1714 && (SMALL_REGISTER_CLASSES
1715 ? (rld[i].class == rld[output_reload].class)
1716 : (reg_class_subset_p (rld[i].class,
1717 rld[output_reload].class)
1718 || reg_class_subset_p (rld[output_reload].class,
1720 && (MATCHES (rld[i].in, rld[output_reload].out)
1721 /* Args reversed because the first arg seems to be
1722 the one that we imagine being modified
1723 while the second is the one that might be affected. */
1724 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1726 /* However, if the input is a register that appears inside
1727 the output, then we also can't share.
1728 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1729 If the same reload reg is used for both reg 69 and the
1730 result to be stored in memory, then that result
1731 will clobber the address of the memory ref. */
1732 && ! (GET_CODE (rld[i].in) == REG
1733 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1734 rld[output_reload].out))))
1735 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode)
1736 && (reg_class_size[(int) rld[i].class]
1737 || SMALL_REGISTER_CLASSES)
1738 /* We will allow making things slightly worse by combining an
1739 input and an output, but no worse than that. */
1740 && (rld[i].when_needed == RELOAD_FOR_INPUT
1741 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1745 /* We have found a reload to combine with! */
1746 rld[i].out = rld[output_reload].out;
1747 rld[i].out_reg = rld[output_reload].out_reg;
1748 rld[i].outmode = rld[output_reload].outmode;
1749 /* Mark the old output reload as inoperative. */
1750 rld[output_reload].out = 0;
1751 /* The combined reload is needed for the entire insn. */
1752 rld[i].when_needed = RELOAD_OTHER;
1753 /* If the output reload had a secondary reload, copy it. */
1754 if (rld[output_reload].secondary_out_reload != -1)
1756 rld[i].secondary_out_reload
1757 = rld[output_reload].secondary_out_reload;
1758 rld[i].secondary_out_icode
1759 = rld[output_reload].secondary_out_icode;
1762 #ifdef SECONDARY_MEMORY_NEEDED
1763 /* Copy any secondary MEM. */
1764 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1765 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1766 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1768 /* If required, minimize the register class. */
1769 if (reg_class_subset_p (rld[output_reload].class,
1771 rld[i].class = rld[output_reload].class;
1773 /* Transfer all replacements from the old reload to the combined. */
1774 for (j = 0; j < n_replacements; j++)
1775 if (replacements[j].what == output_reload)
1776 replacements[j].what = i;
1781 /* If this insn has only one operand that is modified or written (assumed
1782 to be the first), it must be the one corresponding to this reload. It
1783 is safe to use anything that dies in this insn for that output provided
1784 that it does not occur in the output (we already know it isn't an
1785 earlyclobber. If this is an asm insn, give up. */
1787 if (INSN_CODE (this_insn) == -1)
1790 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1791 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1792 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1795 /* See if some hard register that dies in this insn and is not used in
1796 the output is the right class. Only works if the register we pick
1797 up can fully hold our output reload. */
1798 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1799 if (REG_NOTE_KIND (note) == REG_DEAD
1800 && GET_CODE (XEXP (note, 0)) == REG
1801 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1802 rld[output_reload].out)
1803 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1804 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1805 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1806 REGNO (XEXP (note, 0)))
1807 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1808 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1809 /* Ensure that a secondary or tertiary reload for this output
1810 won't want this register. */
1811 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1812 || (! (TEST_HARD_REG_BIT
1813 (reg_class_contents[(int) rld[secondary_out].class],
1814 REGNO (XEXP (note, 0))))
1815 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1816 || ! (TEST_HARD_REG_BIT
1817 (reg_class_contents[(int) rld[secondary_out].class],
1818 REGNO (XEXP (note, 0)))))))
1819 && ! fixed_regs[REGNO (XEXP (note, 0))])
1821 rld[output_reload].reg_rtx
1822 = gen_rtx_REG (rld[output_reload].outmode,
1823 REGNO (XEXP (note, 0)));
1828 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1829 See if one of IN and OUT is a register that may be used;
1830 this is desirable since a spill-register won't be needed.
1831 If so, return the register rtx that proves acceptable.
1833 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1834 CLASS is the register class required for the reload.
1836 If FOR_REAL is >= 0, it is the number of the reload,
1837 and in some cases when it can be discovered that OUT doesn't need
1838 to be computed, clear out rld[FOR_REAL].out.
1840 If FOR_REAL is -1, this should not be done, because this call
1841 is just to see if a register can be found, not to find and install it.
1843 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1844 puts an additional constraint on being able to use IN for OUT since
1845 IN must not appear elsewhere in the insn (it is assumed that IN itself
1846 is safe from the earlyclobber). */
1849 find_dummy_reload (real_in, real_out, inloc, outloc,
1850 inmode, outmode, class, for_real, earlyclobber)
1851 rtx real_in, real_out;
1852 rtx *inloc, *outloc;
1853 enum machine_mode inmode, outmode;
1854 enum reg_class class;
1864 /* If operands exceed a word, we can't use either of them
1865 unless they have the same size. */
1866 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1867 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1868 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1871 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1872 respectively refers to a hard register. */
1874 /* Find the inside of any subregs. */
1875 while (GET_CODE (out) == SUBREG)
1877 if (GET_CODE (SUBREG_REG (out)) == REG
1878 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1879 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1880 GET_MODE (SUBREG_REG (out)),
1883 out = SUBREG_REG (out);
1885 while (GET_CODE (in) == SUBREG)
1887 if (GET_CODE (SUBREG_REG (in)) == REG
1888 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1889 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1890 GET_MODE (SUBREG_REG (in)),
1893 in = SUBREG_REG (in);
1896 /* Narrow down the reg class, the same way push_reload will;
1897 otherwise we might find a dummy now, but push_reload won't. */
1898 class = PREFERRED_RELOAD_CLASS (in, class);
1900 /* See if OUT will do. */
1901 if (GET_CODE (out) == REG
1902 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1904 unsigned int regno = REGNO (out) + out_offset;
1905 unsigned int nwords = HARD_REGNO_NREGS (regno, outmode);
1908 /* When we consider whether the insn uses OUT,
1909 ignore references within IN. They don't prevent us
1910 from copying IN into OUT, because those refs would
1911 move into the insn that reloads IN.
1913 However, we only ignore IN in its role as this reload.
1914 If the insn uses IN elsewhere and it contains OUT,
1915 that counts. We can't be sure it's the "same" operand
1916 so it might not go through this reload. */
1918 *inloc = const0_rtx;
1920 if (regno < FIRST_PSEUDO_REGISTER
1921 && HARD_REGNO_MODE_OK (regno, outmode)
1922 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1923 PATTERN (this_insn), outloc))
1927 for (i = 0; i < nwords; i++)
1928 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1934 if (GET_CODE (real_out) == REG)
1937 value = gen_rtx_REG (outmode, regno);
1944 /* Consider using IN if OUT was not acceptable
1945 or if OUT dies in this insn (like the quotient in a divmod insn).
1946 We can't use IN unless it is dies in this insn,
1947 which means we must know accurately which hard regs are live.
1948 Also, the result can't go in IN if IN is used within OUT,
1949 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1950 if (hard_regs_live_known
1951 && GET_CODE (in) == REG
1952 && REGNO (in) < FIRST_PSEUDO_REGISTER
1954 || find_reg_note (this_insn, REG_UNUSED, real_out))
1955 && find_reg_note (this_insn, REG_DEAD, real_in)
1956 && !fixed_regs[REGNO (in)]
1957 && HARD_REGNO_MODE_OK (REGNO (in),
1958 /* The only case where out and real_out might
1959 have different modes is where real_out
1960 is a subreg, and in that case, out
1962 (GET_MODE (out) != VOIDmode
1963 ? GET_MODE (out) : outmode)))
1965 unsigned int regno = REGNO (in) + in_offset;
1966 unsigned int nwords = HARD_REGNO_NREGS (regno, inmode);
1968 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
1969 && ! hard_reg_set_here_p (regno, regno + nwords,
1970 PATTERN (this_insn))
1972 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1973 PATTERN (this_insn), inloc)))
1977 for (i = 0; i < nwords; i++)
1978 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1984 /* If we were going to use OUT as the reload reg
1985 and changed our mind, it means OUT is a dummy that
1986 dies here. So don't bother copying value to it. */
1987 if (for_real >= 0 && value == real_out)
1988 rld[for_real].out = 0;
1989 if (GET_CODE (real_in) == REG)
1992 value = gen_rtx_REG (inmode, regno);
2000 /* This page contains subroutines used mainly for determining
2001 whether the IN or an OUT of a reload can serve as the
2004 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2007 earlyclobber_operand_p (x)
2012 for (i = 0; i < n_earlyclobbers; i++)
2013 if (reload_earlyclobbers[i] == x)
2019 /* Return 1 if expression X alters a hard reg in the range
2020 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2021 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2022 X should be the body of an instruction. */
2025 hard_reg_set_here_p (beg_regno, end_regno, x)
2026 unsigned int beg_regno, end_regno;
2029 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2031 rtx op0 = SET_DEST (x);
2033 while (GET_CODE (op0) == SUBREG)
2034 op0 = SUBREG_REG (op0);
2035 if (GET_CODE (op0) == REG)
2037 unsigned int r = REGNO (op0);
2039 /* See if this reg overlaps range under consideration. */
2041 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
2045 else if (GET_CODE (x) == PARALLEL)
2047 int i = XVECLEN (x, 0) - 1;
2050 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2057 /* Return 1 if ADDR is a valid memory address for mode MODE,
2058 and check that each pseudo reg has the proper kind of
2062 strict_memory_address_p (mode, addr)
2063 enum machine_mode mode ATTRIBUTE_UNUSED;
2066 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2073 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2074 if they are the same hard reg, and has special hacks for
2075 autoincrement and autodecrement.
2076 This is specifically intended for find_reloads to use
2077 in determining whether two operands match.
2078 X is the operand whose number is the lower of the two.
2080 The value is 2 if Y contains a pre-increment that matches
2081 a non-incrementing address in X. */
2083 /* ??? To be completely correct, we should arrange to pass
2084 for X the output operand and for Y the input operand.
2085 For now, we assume that the output operand has the lower number
2086 because that is natural in (SET output (... input ...)). */
2089 operands_match_p (x, y)
2093 RTX_CODE code = GET_CODE (x);
2099 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2100 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2101 && GET_CODE (SUBREG_REG (y)) == REG)))
2107 i = REGNO (SUBREG_REG (x));
2108 if (i >= FIRST_PSEUDO_REGISTER)
2110 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2111 GET_MODE (SUBREG_REG (x)),
2118 if (GET_CODE (y) == SUBREG)
2120 j = REGNO (SUBREG_REG (y));
2121 if (j >= FIRST_PSEUDO_REGISTER)
2123 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2124 GET_MODE (SUBREG_REG (y)),
2131 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2132 multiple hard register group, so that for example (reg:DI 0) and
2133 (reg:SI 1) will be considered the same register. */
2134 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2135 && i < FIRST_PSEUDO_REGISTER)
2136 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
2137 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2138 && j < FIRST_PSEUDO_REGISTER)
2139 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
2143 /* If two operands must match, because they are really a single
2144 operand of an assembler insn, then two postincrements are invalid
2145 because the assembler insn would increment only once.
2146 On the other hand, an postincrement matches ordinary indexing
2147 if the postincrement is the output operand. */
2148 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2149 return operands_match_p (XEXP (x, 0), y);
2150 /* Two preincrements are invalid
2151 because the assembler insn would increment only once.
2152 On the other hand, an preincrement matches ordinary indexing
2153 if the preincrement is the input operand.
2154 In this case, return 2, since some callers need to do special
2155 things when this happens. */
2156 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2157 || GET_CODE (y) == PRE_MODIFY)
2158 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2162 /* Now we have disposed of all the cases
2163 in which different rtx codes can match. */
2164 if (code != GET_CODE (y))
2166 if (code == LABEL_REF)
2167 return XEXP (x, 0) == XEXP (y, 0);
2168 if (code == SYMBOL_REF)
2169 return XSTR (x, 0) == XSTR (y, 0);
2171 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2173 if (GET_MODE (x) != GET_MODE (y))
2176 /* Compare the elements. If any pair of corresponding elements
2177 fail to match, return 0 for the whole things. */
2180 fmt = GET_RTX_FORMAT (code);
2181 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2187 if (XWINT (x, i) != XWINT (y, i))
2192 if (XINT (x, i) != XINT (y, i))
2197 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2200 /* If any subexpression returns 2,
2201 we should return 2 if we are successful. */
2210 if (XVECLEN (x, i) != XVECLEN (y, i))
2212 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2214 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2222 /* It is believed that rtx's at this level will never
2223 contain anything but integers and other rtx's,
2224 except for within LABEL_REFs and SYMBOL_REFs. */
2229 return 1 + success_2;
2232 /* Describe the range of registers or memory referenced by X.
2233 If X is a register, set REG_FLAG and put the first register
2234 number into START and the last plus one into END.
2235 If X is a memory reference, put a base address into BASE
2236 and a range of integer offsets into START and END.
2237 If X is pushing on the stack, we can assume it causes no trouble,
2238 so we set the SAFE field. */
2240 static struct decomposition
2244 struct decomposition val;
2250 if (GET_CODE (x) == MEM)
2252 rtx base = NULL_RTX, offset = 0;
2253 rtx addr = XEXP (x, 0);
2255 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2256 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2258 val.base = XEXP (addr, 0);
2259 val.start = -GET_MODE_SIZE (GET_MODE (x));
2260 val.end = GET_MODE_SIZE (GET_MODE (x));
2261 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2265 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2267 if (GET_CODE (XEXP (addr, 1)) == PLUS
2268 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2269 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2271 val.base = XEXP (addr, 0);
2272 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2273 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2274 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2279 if (GET_CODE (addr) == CONST)
2281 addr = XEXP (addr, 0);
2284 if (GET_CODE (addr) == PLUS)
2286 if (CONSTANT_P (XEXP (addr, 0)))
2288 base = XEXP (addr, 1);
2289 offset = XEXP (addr, 0);
2291 else if (CONSTANT_P (XEXP (addr, 1)))
2293 base = XEXP (addr, 0);
2294 offset = XEXP (addr, 1);
2301 offset = const0_rtx;
2303 if (GET_CODE (offset) == CONST)
2304 offset = XEXP (offset, 0);
2305 if (GET_CODE (offset) == PLUS)
2307 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2309 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2310 offset = XEXP (offset, 0);
2312 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2314 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2315 offset = XEXP (offset, 1);
2319 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2320 offset = const0_rtx;
2323 else if (GET_CODE (offset) != CONST_INT)
2325 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2326 offset = const0_rtx;
2329 if (all_const && GET_CODE (base) == PLUS)
2330 base = gen_rtx_CONST (GET_MODE (base), base);
2332 if (GET_CODE (offset) != CONST_INT)
2335 val.start = INTVAL (offset);
2336 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2340 else if (GET_CODE (x) == REG)
2343 val.start = true_regnum (x);
2346 /* A pseudo with no hard reg. */
2347 val.start = REGNO (x);
2348 val.end = val.start + 1;
2352 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2354 else if (GET_CODE (x) == SUBREG)
2356 if (GET_CODE (SUBREG_REG (x)) != REG)
2357 /* This could be more precise, but it's good enough. */
2358 return decompose (SUBREG_REG (x));
2360 val.start = true_regnum (x);
2362 return decompose (SUBREG_REG (x));
2365 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2367 else if (CONSTANT_P (x)
2368 /* This hasn't been assigned yet, so it can't conflict yet. */
2369 || GET_CODE (x) == SCRATCH)
2376 /* Return 1 if altering Y will not modify the value of X.
2377 Y is also described by YDATA, which should be decompose (Y). */
2380 immune_p (x, y, ydata)
2382 struct decomposition ydata;
2384 struct decomposition xdata;
2387 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2391 if (GET_CODE (y) != MEM)
2393 /* If Y is memory and X is not, Y can't affect X. */
2394 if (GET_CODE (x) != MEM)
2397 xdata = decompose (x);
2399 if (! rtx_equal_p (xdata.base, ydata.base))
2401 /* If bases are distinct symbolic constants, there is no overlap. */
2402 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2404 /* Constants and stack slots never overlap. */
2405 if (CONSTANT_P (xdata.base)
2406 && (ydata.base == frame_pointer_rtx
2407 || ydata.base == hard_frame_pointer_rtx
2408 || ydata.base == stack_pointer_rtx))
2410 if (CONSTANT_P (ydata.base)
2411 && (xdata.base == frame_pointer_rtx
2412 || xdata.base == hard_frame_pointer_rtx
2413 || xdata.base == stack_pointer_rtx))
2415 /* If either base is variable, we don't know anything. */
2419 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2422 /* Similar, but calls decompose. */
2425 safe_from_earlyclobber (op, clobber)
2428 struct decomposition early_data;
2430 early_data = decompose (clobber);
2431 return immune_p (op, clobber, early_data);
2434 /* Main entry point of this file: search the body of INSN
2435 for values that need reloading and record them with push_reload.
2436 REPLACE nonzero means record also where the values occur
2437 so that subst_reloads can be used.
2439 IND_LEVELS says how many levels of indirection are supported by this
2440 machine; a value of zero means that a memory reference is not a valid
2443 LIVE_KNOWN says we have valid information about which hard
2444 regs are live at each point in the program; this is true when
2445 we are called from global_alloc but false when stupid register
2446 allocation has been done.
2448 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2449 which is nonnegative if the reg has been commandeered for reloading into.
2450 It is copied into STATIC_RELOAD_REG_P and referenced from there
2451 by various subroutines.
2453 Return TRUE if some operands need to be changed, because of swapping
2454 commutative operands, reg_equiv_address substitution, or whatever. */
2457 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2459 int replace, ind_levels;
2461 short *reload_reg_p;
2463 int insn_code_number;
2466 /* These start out as the constraints for the insn
2467 and they are chewed up as we consider alternatives. */
2468 char *constraints[MAX_RECOG_OPERANDS];
2469 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2471 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2472 char pref_or_nothing[MAX_RECOG_OPERANDS];
2473 /* Nonzero for a MEM operand whose entire address needs a reload. */
2474 int address_reloaded[MAX_RECOG_OPERANDS];
2475 /* Value of enum reload_type to use for operand. */
2476 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2477 /* Value of enum reload_type to use within address of operand. */
2478 enum reload_type address_type[MAX_RECOG_OPERANDS];
2479 /* Save the usage of each operand. */
2480 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2481 int no_input_reloads = 0, no_output_reloads = 0;
2483 int this_alternative[MAX_RECOG_OPERANDS];
2484 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2485 char this_alternative_win[MAX_RECOG_OPERANDS];
2486 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2487 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2488 int this_alternative_matches[MAX_RECOG_OPERANDS];
2490 int goal_alternative[MAX_RECOG_OPERANDS];
2491 int this_alternative_number;
2492 int goal_alternative_number = 0;
2493 int operand_reloadnum[MAX_RECOG_OPERANDS];
2494 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2495 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2496 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2497 char goal_alternative_win[MAX_RECOG_OPERANDS];
2498 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2499 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2500 int goal_alternative_swapped;
2503 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2504 rtx substed_operand[MAX_RECOG_OPERANDS];
2505 rtx body = PATTERN (insn);
2506 rtx set = single_set (insn);
2507 int goal_earlyclobber = 0, this_earlyclobber;
2508 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2514 n_earlyclobbers = 0;
2515 replace_reloads = replace;
2516 hard_regs_live_known = live_known;
2517 static_reload_reg_p = reload_reg_p;
2519 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2520 neither are insns that SET cc0. Insns that use CC0 are not allowed
2521 to have any input reloads. */
2522 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2523 no_output_reloads = 1;
2526 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2527 no_input_reloads = 1;
2528 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2529 no_output_reloads = 1;
2532 #ifdef SECONDARY_MEMORY_NEEDED
2533 /* The eliminated forms of any secondary memory locations are per-insn, so
2534 clear them out here. */
2536 memset ((char *) secondary_memlocs_elim, 0, sizeof secondary_memlocs_elim);
2539 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2540 is cheap to move between them. If it is not, there may not be an insn
2541 to do the copy, so we may need a reload. */
2542 if (GET_CODE (body) == SET
2543 && GET_CODE (SET_DEST (body)) == REG
2544 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2545 && GET_CODE (SET_SRC (body)) == REG
2546 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2547 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2548 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2549 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2552 extract_insn (insn);
2554 noperands = reload_n_operands = recog_data.n_operands;
2555 n_alternatives = recog_data.n_alternatives;
2557 /* Just return "no reloads" if insn has no operands with constraints. */
2558 if (noperands == 0 || n_alternatives == 0)
2561 insn_code_number = INSN_CODE (insn);
2562 this_insn_is_asm = insn_code_number < 0;
2564 memcpy (operand_mode, recog_data.operand_mode,
2565 noperands * sizeof (enum machine_mode));
2566 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2570 /* If we will need to know, later, whether some pair of operands
2571 are the same, we must compare them now and save the result.
2572 Reloading the base and index registers will clobber them
2573 and afterward they will fail to match. */
2575 for (i = 0; i < noperands; i++)
2580 substed_operand[i] = recog_data.operand[i];
2583 modified[i] = RELOAD_READ;
2585 /* Scan this operand's constraint to see if it is an output operand,
2586 an in-out operand, is commutative, or should match another. */
2591 modified[i] = RELOAD_WRITE;
2593 modified[i] = RELOAD_READ_WRITE;
2596 /* The last operand should not be marked commutative. */
2597 if (i == noperands - 1)
2602 else if (ISDIGIT (c))
2604 c = strtoul (p - 1, &p, 10);
2606 operands_match[c][i]
2607 = operands_match_p (recog_data.operand[c],
2608 recog_data.operand[i]);
2610 /* An operand may not match itself. */
2614 /* If C can be commuted with C+1, and C might need to match I,
2615 then C+1 might also need to match I. */
2616 if (commutative >= 0)
2618 if (c == commutative || c == commutative + 1)
2620 int other = c + (c == commutative ? 1 : -1);
2621 operands_match[other][i]
2622 = operands_match_p (recog_data.operand[other],
2623 recog_data.operand[i]);
2625 if (i == commutative || i == commutative + 1)
2627 int other = i + (i == commutative ? 1 : -1);
2628 operands_match[c][other]
2629 = operands_match_p (recog_data.operand[c],
2630 recog_data.operand[other]);
2632 /* Note that C is supposed to be less than I.
2633 No need to consider altering both C and I because in
2634 that case we would alter one into the other. */
2640 /* Examine each operand that is a memory reference or memory address
2641 and reload parts of the addresses into index registers.
2642 Also here any references to pseudo regs that didn't get hard regs
2643 but are equivalent to constants get replaced in the insn itself
2644 with those constants. Nobody will ever see them again.
2646 Finally, set up the preferred classes of each operand. */
2648 for (i = 0; i < noperands; i++)
2650 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2652 address_reloaded[i] = 0;
2653 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2654 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2657 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2658 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2661 if (*constraints[i] == 0)
2662 /* Ignore things like match_operator operands. */
2664 else if (constraints[i][0] == 'p'
2665 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0]))
2667 find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2668 recog_data.operand[i],
2669 recog_data.operand_loc[i],
2670 i, operand_type[i], ind_levels, insn);
2672 /* If we now have a simple operand where we used to have a
2673 PLUS or MULT, re-recognize and try again. */
2674 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
2675 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2676 && (GET_CODE (recog_data.operand[i]) == MULT
2677 || GET_CODE (recog_data.operand[i]) == PLUS))
2679 INSN_CODE (insn) = -1;
2680 retval = find_reloads (insn, replace, ind_levels, live_known,
2685 recog_data.operand[i] = *recog_data.operand_loc[i];
2686 substed_operand[i] = recog_data.operand[i];
2688 else if (code == MEM)
2691 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2692 recog_data.operand_loc[i],
2693 XEXP (recog_data.operand[i], 0),
2694 &XEXP (recog_data.operand[i], 0),
2695 i, address_type[i], ind_levels, insn);
2696 recog_data.operand[i] = *recog_data.operand_loc[i];
2697 substed_operand[i] = recog_data.operand[i];
2699 else if (code == SUBREG)
2701 rtx reg = SUBREG_REG (recog_data.operand[i]);
2703 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2706 && &SET_DEST (set) == recog_data.operand_loc[i],
2708 &address_reloaded[i]);
2710 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2711 that didn't get a hard register, emit a USE with a REG_EQUAL
2712 note in front so that we might inherit a previous, possibly
2716 && GET_CODE (op) == MEM
2717 && GET_CODE (reg) == REG
2718 && (GET_MODE_SIZE (GET_MODE (reg))
2719 >= GET_MODE_SIZE (GET_MODE (op))))
2720 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2722 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2724 substed_operand[i] = recog_data.operand[i] = op;
2726 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2727 /* We can get a PLUS as an "operand" as a result of register
2728 elimination. See eliminate_regs and gen_reload. We handle
2729 a unary operator by reloading the operand. */
2730 substed_operand[i] = recog_data.operand[i]
2731 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2732 ind_levels, 0, insn,
2733 &address_reloaded[i]);
2734 else if (code == REG)
2736 /* This is equivalent to calling find_reloads_toplev.
2737 The code is duplicated for speed.
2738 When we find a pseudo always equivalent to a constant,
2739 we replace it by the constant. We must be sure, however,
2740 that we don't try to replace it in the insn in which it
2742 int regno = REGNO (recog_data.operand[i]);
2743 if (reg_equiv_constant[regno] != 0
2744 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2746 /* Record the existing mode so that the check if constants are
2747 allowed will work when operand_mode isn't specified. */
2749 if (operand_mode[i] == VOIDmode)
2750 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2752 substed_operand[i] = recog_data.operand[i]
2753 = reg_equiv_constant[regno];
2755 if (reg_equiv_memory_loc[regno] != 0
2756 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2757 /* We need not give a valid is_set_dest argument since the case
2758 of a constant equivalence was checked above. */
2759 substed_operand[i] = recog_data.operand[i]
2760 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2761 ind_levels, 0, insn,
2762 &address_reloaded[i]);
2764 /* If the operand is still a register (we didn't replace it with an
2765 equivalent), get the preferred class to reload it into. */
2766 code = GET_CODE (recog_data.operand[i]);
2768 = ((code == REG && REGNO (recog_data.operand[i])
2769 >= FIRST_PSEUDO_REGISTER)
2770 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2774 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2775 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2778 /* If this is simply a copy from operand 1 to operand 0, merge the
2779 preferred classes for the operands. */
2780 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2781 && recog_data.operand[1] == SET_SRC (set))
2783 preferred_class[0] = preferred_class[1]
2784 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2785 pref_or_nothing[0] |= pref_or_nothing[1];
2786 pref_or_nothing[1] |= pref_or_nothing[0];
2789 /* Now see what we need for pseudo-regs that didn't get hard regs
2790 or got the wrong kind of hard reg. For this, we must consider
2791 all the operands together against the register constraints. */
2793 best = MAX_RECOG_OPERANDS * 2 + 600;
2796 goal_alternative_swapped = 0;
2799 /* The constraints are made of several alternatives.
2800 Each operand's constraint looks like foo,bar,... with commas
2801 separating the alternatives. The first alternatives for all
2802 operands go together, the second alternatives go together, etc.
2804 First loop over alternatives. */
2806 for (this_alternative_number = 0;
2807 this_alternative_number < n_alternatives;
2808 this_alternative_number++)
2810 /* Loop over operands for one constraint alternative. */
2811 /* LOSERS counts those that don't fit this alternative
2812 and would require loading. */
2814 /* BAD is set to 1 if it some operand can't fit this alternative
2815 even after reloading. */
2817 /* REJECT is a count of how undesirable this alternative says it is
2818 if any reloading is required. If the alternative matches exactly
2819 then REJECT is ignored, but otherwise it gets this much
2820 counted against it in addition to the reloading needed. Each
2821 ? counts three times here since we want the disparaging caused by
2822 a bad register class to only count 1/3 as much. */
2825 this_earlyclobber = 0;
2827 for (i = 0; i < noperands; i++)
2829 char *p = constraints[i];
2832 /* 0 => this operand can be reloaded somehow for this alternative. */
2834 /* 0 => this operand can be reloaded if the alternative allows regs. */
2837 rtx operand = recog_data.operand[i];
2839 /* Nonzero means this is a MEM that must be reloaded into a reg
2840 regardless of what the constraint says. */
2841 int force_reload = 0;
2843 /* Nonzero if a constant forced into memory would be OK for this
2846 int earlyclobber = 0;
2848 /* If the predicate accepts a unary operator, it means that
2849 we need to reload the operand, but do not do this for
2850 match_operator and friends. */
2851 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2852 operand = XEXP (operand, 0);
2854 /* If the operand is a SUBREG, extract
2855 the REG or MEM (or maybe even a constant) within.
2856 (Constants can occur as a result of reg_equiv_constant.) */
2858 while (GET_CODE (operand) == SUBREG)
2860 /* Offset only matters when operand is a REG and
2861 it is a hard reg. This is because it is passed
2862 to reg_fits_class_p if it is a REG and all pseudos
2863 return 0 from that function. */
2864 if (GET_CODE (SUBREG_REG (operand)) == REG
2865 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2867 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2868 GET_MODE (SUBREG_REG (operand)),
2869 SUBREG_BYTE (operand),
2870 GET_MODE (operand));
2872 operand = SUBREG_REG (operand);
2873 /* Force reload if this is a constant or PLUS or if there may
2874 be a problem accessing OPERAND in the outer mode. */
2875 if (CONSTANT_P (operand)
2876 || GET_CODE (operand) == PLUS
2877 /* We must force a reload of paradoxical SUBREGs
2878 of a MEM because the alignment of the inner value
2879 may not be enough to do the outer reference. On
2880 big-endian machines, it may also reference outside
2883 On machines that extend byte operations and we have a
2884 SUBREG where both the inner and outer modes are no wider
2885 than a word and the inner mode is narrower, is integral,
2886 and gets extended when loaded from memory, combine.c has
2887 made assumptions about the behavior of the machine in such
2888 register access. If the data is, in fact, in memory we
2889 must always load using the size assumed to be in the
2890 register and let the insn do the different-sized
2893 This is doubly true if WORD_REGISTER_OPERATIONS. In
2894 this case eliminate_regs has left non-paradoxical
2895 subregs for push_reloads to see. Make sure it does
2896 by forcing the reload.
2898 ??? When is it right at this stage to have a subreg
2899 of a mem that is _not_ to be handled specialy? IMO
2900 those should have been reduced to just a mem. */
2901 || ((GET_CODE (operand) == MEM
2902 || (GET_CODE (operand)== REG
2903 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2904 #ifndef WORD_REGISTER_OPERATIONS
2905 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2906 < BIGGEST_ALIGNMENT)
2907 && (GET_MODE_SIZE (operand_mode[i])
2908 > GET_MODE_SIZE (GET_MODE (operand))))
2909 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2910 #ifdef LOAD_EXTEND_OP
2911 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2912 && (GET_MODE_SIZE (GET_MODE (operand))
2914 && (GET_MODE_SIZE (operand_mode[i])
2915 > GET_MODE_SIZE (GET_MODE (operand)))
2916 && INTEGRAL_MODE_P (GET_MODE (operand))
2917 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2922 /* This following hunk of code should no longer be
2923 needed at all with SUBREG_BYTE. If you need this
2924 code back, please explain to me why so I can
2925 fix the real problem. -DaveM */
2927 /* Subreg of a hard reg which can't handle the subreg's mode
2928 or which would handle that mode in the wrong number of
2929 registers for subregging to work. */
2930 || (GET_CODE (operand) == REG
2931 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2932 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2933 && (GET_MODE_SIZE (GET_MODE (operand))
2935 && ((GET_MODE_SIZE (GET_MODE (operand))
2937 != HARD_REGNO_NREGS (REGNO (operand),
2938 GET_MODE (operand))))
2939 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2946 this_alternative[i] = (int) NO_REGS;
2947 this_alternative_win[i] = 0;
2948 this_alternative_match_win[i] = 0;
2949 this_alternative_offmemok[i] = 0;
2950 this_alternative_earlyclobber[i] = 0;
2951 this_alternative_matches[i] = -1;
2953 /* An empty constraint or empty alternative
2954 allows anything which matched the pattern. */
2955 if (*p == 0 || *p == ',')
2958 /* Scan this alternative's specs for this operand;
2959 set WIN if the operand fits any letter in this alternative.
2960 Otherwise, clear BADOP if this operand could
2961 fit some letter after reloads,
2962 or set WINREG if this operand could fit after reloads
2963 provided the constraint allows some registers. */
2965 while (*p && (c = *p++) != ',')
2968 case '=': case '+': case '*':
2972 /* The last operand should not be marked commutative. */
2973 if (i != noperands - 1)
2986 /* Ignore rest of this alternative as far as
2987 reloading is concerned. */
2988 while (*p && *p != ',')
2992 case '0': case '1': case '2': case '3': case '4':
2993 case '5': case '6': case '7': case '8': case '9':
2994 c = strtoul (p - 1, &p, 10);
2996 this_alternative_matches[i] = c;
2997 /* We are supposed to match a previous operand.
2998 If we do, we win if that one did.
2999 If we do not, count both of the operands as losers.
3000 (This is too conservative, since most of the time
3001 only a single reload insn will be needed to make
3002 the two operands win. As a result, this alternative
3003 may be rejected when it is actually desirable.) */
3004 if ((swapped && (c != commutative || i != commutative + 1))
3005 /* If we are matching as if two operands were swapped,
3006 also pretend that operands_match had been computed
3008 But if I is the second of those and C is the first,
3009 don't exchange them, because operands_match is valid
3010 only on one side of its diagonal. */
3012 [(c == commutative || c == commutative + 1)
3013 ? 2 * commutative + 1 - c : c]
3014 [(i == commutative || i == commutative + 1)
3015 ? 2 * commutative + 1 - i : i])
3016 : operands_match[c][i])
3018 /* If we are matching a non-offsettable address where an
3019 offsettable address was expected, then we must reject
3020 this combination, because we can't reload it. */
3021 if (this_alternative_offmemok[c]
3022 && GET_CODE (recog_data.operand[c]) == MEM
3023 && this_alternative[c] == (int) NO_REGS
3024 && ! this_alternative_win[c])
3027 did_match = this_alternative_win[c];
3031 /* Operands don't match. */
3033 /* Retroactively mark the operand we had to match
3034 as a loser, if it wasn't already. */
3035 if (this_alternative_win[c])
3037 this_alternative_win[c] = 0;
3038 if (this_alternative[c] == (int) NO_REGS)
3040 /* But count the pair only once in the total badness of
3041 this alternative, if the pair can be a dummy reload. */
3043 = find_dummy_reload (recog_data.operand[i],
3044 recog_data.operand[c],
3045 recog_data.operand_loc[i],
3046 recog_data.operand_loc[c],
3047 operand_mode[i], operand_mode[c],
3048 this_alternative[c], -1,
3049 this_alternative_earlyclobber[c]);
3054 /* This can be fixed with reloads if the operand
3055 we are supposed to match can be fixed with reloads. */
3057 this_alternative[i] = this_alternative[c];
3059 /* If we have to reload this operand and some previous
3060 operand also had to match the same thing as this
3061 operand, we don't know how to do that. So reject this
3063 if (! did_match || force_reload)
3064 for (j = 0; j < i; j++)
3065 if (this_alternative_matches[j]
3066 == this_alternative_matches[i])
3071 /* All necessary reloads for an address_operand
3072 were handled in find_reloads_address. */
3073 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3081 if (GET_CODE (operand) == MEM
3082 || (GET_CODE (operand) == REG
3083 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3084 && reg_renumber[REGNO (operand)] < 0))
3086 if (CONSTANT_P (operand)
3087 /* force_const_mem does not accept HIGH. */
3088 && GET_CODE (operand) != HIGH)
3094 if (GET_CODE (operand) == MEM
3095 && ! address_reloaded[i]
3096 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3097 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3102 if (GET_CODE (operand) == MEM
3103 && ! address_reloaded[i]
3104 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3105 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3109 /* Memory operand whose address is not offsettable. */
3113 if (GET_CODE (operand) == MEM
3114 && ! (ind_levels ? offsettable_memref_p (operand)
3115 : offsettable_nonstrict_memref_p (operand))
3116 /* Certain mem addresses will become offsettable
3117 after they themselves are reloaded. This is important;
3118 we don't want our own handling of unoffsettables
3119 to override the handling of reg_equiv_address. */
3120 && !(GET_CODE (XEXP (operand, 0)) == REG
3122 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3126 /* Memory operand whose address is offsettable. */
3130 if ((GET_CODE (operand) == MEM
3131 /* If IND_LEVELS, find_reloads_address won't reload a
3132 pseudo that didn't get a hard reg, so we have to
3133 reject that case. */
3134 && ((ind_levels ? offsettable_memref_p (operand)
3135 : offsettable_nonstrict_memref_p (operand))
3136 /* A reloaded address is offsettable because it is now
3137 just a simple register indirect. */
3138 || address_reloaded[i]))
3139 || (GET_CODE (operand) == REG
3140 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3141 && reg_renumber[REGNO (operand)] < 0
3142 /* If reg_equiv_address is nonzero, we will be
3143 loading it into a register; hence it will be
3144 offsettable, but we cannot say that reg_equiv_mem
3145 is offsettable without checking. */
3146 && ((reg_equiv_mem[REGNO (operand)] != 0
3147 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3148 || (reg_equiv_address[REGNO (operand)] != 0))))
3150 /* force_const_mem does not accept HIGH. */
3151 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3152 || GET_CODE (operand) == MEM)
3159 /* Output operand that is stored before the need for the
3160 input operands (and their index registers) is over. */
3161 earlyclobber = 1, this_earlyclobber = 1;
3166 if (GET_CODE (operand) == CONST_DOUBLE
3167 || (GET_CODE (operand) == CONST_VECTOR
3168 && (GET_MODE_CLASS (GET_MODE (operand))
3169 == MODE_VECTOR_FLOAT)))
3175 if (GET_CODE (operand) == CONST_DOUBLE
3176 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
3181 if (GET_CODE (operand) == CONST_INT
3182 || (GET_CODE (operand) == CONST_DOUBLE
3183 && GET_MODE (operand) == VOIDmode))
3186 if (CONSTANT_P (operand)
3187 #ifdef LEGITIMATE_PIC_OPERAND_P
3188 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3195 if (GET_CODE (operand) == CONST_INT
3196 || (GET_CODE (operand) == CONST_DOUBLE
3197 && GET_MODE (operand) == VOIDmode))
3209 if (GET_CODE (operand) == CONST_INT
3210 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
3220 /* A PLUS is never a valid operand, but reload can make
3221 it from a register when eliminating registers. */
3222 && GET_CODE (operand) != PLUS
3223 /* A SCRATCH is not a valid operand. */
3224 && GET_CODE (operand) != SCRATCH
3225 #ifdef LEGITIMATE_PIC_OPERAND_P
3226 && (! CONSTANT_P (operand)
3228 || LEGITIMATE_PIC_OPERAND_P (operand))
3230 && (GENERAL_REGS == ALL_REGS
3231 || GET_CODE (operand) != REG
3232 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3233 && reg_renumber[REGNO (operand)] < 0)))
3235 /* Drop through into 'r' case. */
3239 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3243 if (REG_CLASS_FROM_LETTER (c) == NO_REGS)
3245 #ifdef EXTRA_CONSTRAINT
3246 if (EXTRA_MEMORY_CONSTRAINT (c))
3250 if (EXTRA_CONSTRAINT (operand, c))
3252 /* If the address was already reloaded,
3254 if (GET_CODE (operand) == MEM && address_reloaded[i])
3256 /* Likewise if the address will be reloaded because
3257 reg_equiv_address is nonzero. For reg_equiv_mem
3258 we have to check. */
3259 if (GET_CODE (operand) == REG
3260 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3261 && reg_renumber[REGNO (operand)] < 0
3262 && ((reg_equiv_mem[REGNO (operand)] != 0
3263 && EXTRA_CONSTRAINT (reg_equiv_mem[REGNO (operand)], c))
3264 || (reg_equiv_address[REGNO (operand)] != 0)))
3267 /* If we didn't already win, we can reload
3268 constants via force_const_mem, and other
3269 MEMs by reloading the address like for 'o'. */
3270 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3271 || GET_CODE (operand) == MEM)
3277 if (EXTRA_ADDRESS_CONSTRAINT (c))
3279 if (EXTRA_CONSTRAINT (operand, c))
3282 /* If we didn't already win, we can reload
3283 the address into a base register. */
3284 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3289 if (EXTRA_CONSTRAINT (operand, c))
3296 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3298 if (GET_MODE (operand) == BLKmode)
3301 if (GET_CODE (operand) == REG
3302 && reg_fits_class_p (operand, this_alternative[i],
3303 offset, GET_MODE (recog_data.operand[i])))
3310 /* If this operand could be handled with a reg,
3311 and some reg is allowed, then this operand can be handled. */
3312 if (winreg && this_alternative[i] != (int) NO_REGS)
3315 /* Record which operands fit this alternative. */
3316 this_alternative_earlyclobber[i] = earlyclobber;
3317 if (win && ! force_reload)
3318 this_alternative_win[i] = 1;
3319 else if (did_match && ! force_reload)
3320 this_alternative_match_win[i] = 1;
3323 int const_to_mem = 0;
3325 this_alternative_offmemok[i] = offmemok;
3329 /* Alternative loses if it has no regs for a reg operand. */
3330 if (GET_CODE (operand) == REG
3331 && this_alternative[i] == (int) NO_REGS
3332 && this_alternative_matches[i] < 0)
3335 /* If this is a constant that is reloaded into the desired
3336 class by copying it to memory first, count that as another
3337 reload. This is consistent with other code and is
3338 required to avoid choosing another alternative when
3339 the constant is moved into memory by this function on
3340 an early reload pass. Note that the test here is
3341 precisely the same as in the code below that calls
3343 if (CONSTANT_P (operand)
3344 /* force_const_mem does not accept HIGH. */
3345 && GET_CODE (operand) != HIGH
3346 && ((PREFERRED_RELOAD_CLASS (operand,
3347 (enum reg_class) this_alternative[i])
3349 || no_input_reloads)
3350 && operand_mode[i] != VOIDmode)
3353 if (this_alternative[i] != (int) NO_REGS)
3357 /* If we can't reload this value at all, reject this
3358 alternative. Note that we could also lose due to
3359 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3362 if (! CONSTANT_P (operand)
3363 && (enum reg_class) this_alternative[i] != NO_REGS
3364 && (PREFERRED_RELOAD_CLASS (operand,
3365 (enum reg_class) this_alternative[i])
3369 /* Alternative loses if it requires a type of reload not
3370 permitted for this insn. We can always reload SCRATCH
3371 and objects with a REG_UNUSED note. */
3372 else if (GET_CODE (operand) != SCRATCH
3373 && modified[i] != RELOAD_READ && no_output_reloads
3374 && ! find_reg_note (insn, REG_UNUSED, operand))
3376 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3380 /* We prefer to reload pseudos over reloading other things,
3381 since such reloads may be able to be eliminated later.
3382 If we are reloading a SCRATCH, we won't be generating any
3383 insns, just using a register, so it is also preferred.
3384 So bump REJECT in other cases. Don't do this in the
3385 case where we are forcing a constant into memory and
3386 it will then win since we don't want to have a different
3387 alternative match then. */
3388 if (! (GET_CODE (operand) == REG
3389 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3390 && GET_CODE (operand) != SCRATCH
3391 && ! (const_to_mem && constmemok))
3394 /* Input reloads can be inherited more often than output
3395 reloads can be removed, so penalize output reloads. */
3396 if (operand_type[i] != RELOAD_FOR_INPUT
3397 && GET_CODE (operand) != SCRATCH)
3401 /* If this operand is a pseudo register that didn't get a hard
3402 reg and this alternative accepts some register, see if the
3403 class that we want is a subset of the preferred class for this
3404 register. If not, but it intersects that class, use the
3405 preferred class instead. If it does not intersect the preferred
3406 class, show that usage of this alternative should be discouraged;
3407 it will be discouraged more still if the register is `preferred
3408 or nothing'. We do this because it increases the chance of
3409 reusing our spill register in a later insn and avoiding a pair
3410 of memory stores and loads.
3412 Don't bother with this if this alternative will accept this
3415 Don't do this for a multiword operand, since it is only a
3416 small win and has the risk of requiring more spill registers,
3417 which could cause a large loss.
3419 Don't do this if the preferred class has only one register
3420 because we might otherwise exhaust the class. */
3422 if (! win && ! did_match
3423 && this_alternative[i] != (int) NO_REGS
3424 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3425 && reg_class_size[(int) preferred_class[i]] > 1)
3427 if (! reg_class_subset_p (this_alternative[i],
3428 preferred_class[i]))
3430 /* Since we don't have a way of forming the intersection,
3431 we just do something special if the preferred class
3432 is a subset of the class we have; that's the most
3433 common case anyway. */
3434 if (reg_class_subset_p (preferred_class[i],
3435 this_alternative[i]))
3436 this_alternative[i] = (int) preferred_class[i];
3438 reject += (2 + 2 * pref_or_nothing[i]);
3443 /* Now see if any output operands that are marked "earlyclobber"
3444 in this alternative conflict with any input operands
3445 or any memory addresses. */
3447 for (i = 0; i < noperands; i++)
3448 if (this_alternative_earlyclobber[i]
3449 && (this_alternative_win[i] || this_alternative_match_win[i]))
3451 struct decomposition early_data;
3453 early_data = decompose (recog_data.operand[i]);
3455 if (modified[i] == RELOAD_READ)
3458 if (this_alternative[i] == NO_REGS)
3460 this_alternative_earlyclobber[i] = 0;
3461 if (this_insn_is_asm)
3462 error_for_asm (this_insn,
3463 "`&' constraint used with no register class");
3468 for (j = 0; j < noperands; j++)
3469 /* Is this an input operand or a memory ref? */
3470 if ((GET_CODE (recog_data.operand[j]) == MEM
3471 || modified[j] != RELOAD_WRITE)
3473 /* Ignore things like match_operator operands. */
3474 && *recog_data.constraints[j] != 0
3475 /* Don't count an input operand that is constrained to match
3476 the early clobber operand. */
3477 && ! (this_alternative_matches[j] == i
3478 && rtx_equal_p (recog_data.operand[i],
3479 recog_data.operand[j]))
3480 /* Is it altered by storing the earlyclobber operand? */
3481 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3484 /* If the output is in a single-reg class,
3485 it's costly to reload it, so reload the input instead. */
3486 if (reg_class_size[this_alternative[i]] == 1
3487 && (GET_CODE (recog_data.operand[j]) == REG
3488 || GET_CODE (recog_data.operand[j]) == SUBREG))
3491 this_alternative_win[j] = 0;
3492 this_alternative_match_win[j] = 0;
3497 /* If an earlyclobber operand conflicts with something,
3498 it must be reloaded, so request this and count the cost. */
3502 this_alternative_win[i] = 0;
3503 this_alternative_match_win[j] = 0;
3504 for (j = 0; j < noperands; j++)
3505 if (this_alternative_matches[j] == i
3506 && this_alternative_match_win[j])
3508 this_alternative_win[j] = 0;
3509 this_alternative_match_win[j] = 0;
3515 /* If one alternative accepts all the operands, no reload required,
3516 choose that alternative; don't consider the remaining ones. */
3519 /* Unswap these so that they are never swapped at `finish'. */
3520 if (commutative >= 0)
3522 recog_data.operand[commutative] = substed_operand[commutative];
3523 recog_data.operand[commutative + 1]
3524 = substed_operand[commutative + 1];
3526 for (i = 0; i < noperands; i++)
3528 goal_alternative_win[i] = this_alternative_win[i];
3529 goal_alternative_match_win[i] = this_alternative_match_win[i];
3530 goal_alternative[i] = this_alternative[i];
3531 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3532 goal_alternative_matches[i] = this_alternative_matches[i];
3533 goal_alternative_earlyclobber[i]
3534 = this_alternative_earlyclobber[i];
3536 goal_alternative_number = this_alternative_number;
3537 goal_alternative_swapped = swapped;
3538 goal_earlyclobber = this_earlyclobber;
3542 /* REJECT, set by the ! and ? constraint characters and when a register
3543 would be reloaded into a non-preferred class, discourages the use of
3544 this alternative for a reload goal. REJECT is incremented by six
3545 for each ? and two for each non-preferred class. */
3546 losers = losers * 6 + reject;
3548 /* If this alternative can be made to work by reloading,
3549 and it needs less reloading than the others checked so far,
3550 record it as the chosen goal for reloading. */
3551 if (! bad && best > losers)
3553 for (i = 0; i < noperands; i++)
3555 goal_alternative[i] = this_alternative[i];
3556 goal_alternative_win[i] = this_alternative_win[i];
3557 goal_alternative_match_win[i] = this_alternative_match_win[i];
3558 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3559 goal_alternative_matches[i] = this_alternative_matches[i];
3560 goal_alternative_earlyclobber[i]
3561 = this_alternative_earlyclobber[i];
3563 goal_alternative_swapped = swapped;
3565 goal_alternative_number = this_alternative_number;
3566 goal_earlyclobber = this_earlyclobber;
3570 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3571 then we need to try each alternative twice,
3572 the second time matching those two operands
3573 as if we had exchanged them.
3574 To do this, really exchange them in operands.
3576 If we have just tried the alternatives the second time,
3577 return operands to normal and drop through. */
3579 if (commutative >= 0)
3584 enum reg_class tclass;
3587 recog_data.operand[commutative] = substed_operand[commutative + 1];
3588 recog_data.operand[commutative + 1] = substed_operand[commutative];
3589 /* Swap the duplicates too. */
3590 for (i = 0; i < recog_data.n_dups; i++)
3591 if (recog_data.dup_num[i] == commutative
3592 || recog_data.dup_num[i] == commutative + 1)
3593 *recog_data.dup_loc[i]
3594 = recog_data.operand[(int) recog_data.dup_num[i]];
3596 tclass = preferred_class[commutative];
3597 preferred_class[commutative] = preferred_class[commutative + 1];
3598 preferred_class[commutative + 1] = tclass;
3600 t = pref_or_nothing[commutative];
3601 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3602 pref_or_nothing[commutative + 1] = t;
3604 memcpy (constraints, recog_data.constraints,
3605 noperands * sizeof (char *));
3610 recog_data.operand[commutative] = substed_operand[commutative];
3611 recog_data.operand[commutative + 1]
3612 = substed_operand[commutative + 1];
3613 /* Unswap the duplicates too. */
3614 for (i = 0; i < recog_data.n_dups; i++)
3615 if (recog_data.dup_num[i] == commutative
3616 || recog_data.dup_num[i] == commutative + 1)
3617 *recog_data.dup_loc[i]
3618 = recog_data.operand[(int) recog_data.dup_num[i]];
3622 /* The operands don't meet the constraints.
3623 goal_alternative describes the alternative
3624 that we could reach by reloading the fewest operands.
3625 Reload so as to fit it. */
3627 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3629 /* No alternative works with reloads?? */
3630 if (insn_code_number >= 0)
3631 fatal_insn ("unable to generate reloads for:", insn);
3632 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3633 /* Avoid further trouble with this insn. */
3634 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3639 /* Jump to `finish' from above if all operands are valid already.
3640 In that case, goal_alternative_win is all 1. */
3643 /* Right now, for any pair of operands I and J that are required to match,
3645 goal_alternative_matches[J] is I.
3646 Set up goal_alternative_matched as the inverse function:
3647 goal_alternative_matched[I] = J. */
3649 for (i = 0; i < noperands; i++)
3650 goal_alternative_matched[i] = -1;
3652 for (i = 0; i < noperands; i++)
3653 if (! goal_alternative_win[i]
3654 && goal_alternative_matches[i] >= 0)
3655 goal_alternative_matched[goal_alternative_matches[i]] = i;
3657 for (i = 0; i < noperands; i++)
3658 goal_alternative_win[i] |= goal_alternative_match_win[i];
3660 /* If the best alternative is with operands 1 and 2 swapped,
3661 consider them swapped before reporting the reloads. Update the
3662 operand numbers of any reloads already pushed. */
3664 if (goal_alternative_swapped)
3668 tem = substed_operand[commutative];
3669 substed_operand[commutative] = substed_operand[commutative + 1];
3670 substed_operand[commutative + 1] = tem;
3671 tem = recog_data.operand[commutative];
3672 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3673 recog_data.operand[commutative + 1] = tem;
3674 tem = *recog_data.operand_loc[commutative];
3675 *recog_data.operand_loc[commutative]
3676 = *recog_data.operand_loc[commutative + 1];
3677 *recog_data.operand_loc[commutative + 1] = tem;
3679 for (i = 0; i < n_reloads; i++)
3681 if (rld[i].opnum == commutative)
3682 rld[i].opnum = commutative + 1;
3683 else if (rld[i].opnum == commutative + 1)
3684 rld[i].opnum = commutative;
3688 for (i = 0; i < noperands; i++)
3690 operand_reloadnum[i] = -1;
3692 /* If this is an earlyclobber operand, we need to widen the scope.
3693 The reload must remain valid from the start of the insn being
3694 reloaded until after the operand is stored into its destination.
3695 We approximate this with RELOAD_OTHER even though we know that we
3696 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3698 One special case that is worth checking is when we have an
3699 output that is earlyclobber but isn't used past the insn (typically
3700 a SCRATCH). In this case, we only need have the reload live
3701 through the insn itself, but not for any of our input or output
3703 But we must not accidentally narrow the scope of an existing
3704 RELOAD_OTHER reload - leave these alone.
3706 In any case, anything needed to address this operand can remain
3707 however they were previously categorized. */
3709 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3711 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3712 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3715 /* Any constants that aren't allowed and can't be reloaded
3716 into registers are here changed into memory references. */
3717 for (i = 0; i < noperands; i++)
3718 if (! goal_alternative_win[i]
3719 && CONSTANT_P (recog_data.operand[i])
3720 /* force_const_mem does not accept HIGH. */
3721 && GET_CODE (recog_data.operand[i]) != HIGH
3722 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3723 (enum reg_class) goal_alternative[i])
3725 || no_input_reloads)
3726 && operand_mode[i] != VOIDmode)
3728 substed_operand[i] = recog_data.operand[i]
3729 = find_reloads_toplev (force_const_mem (operand_mode[i],
3730 recog_data.operand[i]),
3731 i, address_type[i], ind_levels, 0, insn,
3733 if (alternative_allows_memconst (recog_data.constraints[i],
3734 goal_alternative_number))
3735 goal_alternative_win[i] = 1;
3738 /* Record the values of the earlyclobber operands for the caller. */
3739 if (goal_earlyclobber)
3740 for (i = 0; i < noperands; i++)
3741 if (goal_alternative_earlyclobber[i])
3742 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3744 /* Now record reloads for all the operands that need them. */
3745 for (i = 0; i < noperands; i++)
3746 if (! goal_alternative_win[i])
3748 /* Operands that match previous ones have already been handled. */
3749 if (goal_alternative_matches[i] >= 0)
3751 /* Handle an operand with a nonoffsettable address
3752 appearing where an offsettable address will do
3753 by reloading the address into a base register.
3755 ??? We can also do this when the operand is a register and
3756 reg_equiv_mem is not offsettable, but this is a bit tricky,
3757 so we don't bother with it. It may not be worth doing. */
3758 else if (goal_alternative_matched[i] == -1
3759 && goal_alternative_offmemok[i]
3760 && GET_CODE (recog_data.operand[i]) == MEM)
3762 operand_reloadnum[i]
3763 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3764 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3765 MODE_BASE_REG_CLASS (VOIDmode),
3766 GET_MODE (XEXP (recog_data.operand[i], 0)),
3767 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3768 rld[operand_reloadnum[i]].inc
3769 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3771 /* If this operand is an output, we will have made any
3772 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3773 now we are treating part of the operand as an input, so
3774 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3776 if (modified[i] == RELOAD_WRITE)
3778 for (j = 0; j < n_reloads; j++)
3780 if (rld[j].opnum == i)
3782 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3783 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3784 else if (rld[j].when_needed
3785 == RELOAD_FOR_OUTADDR_ADDRESS)
3786 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3791 else if (goal_alternative_matched[i] == -1)
3793 operand_reloadnum[i]
3794 = push_reload ((modified[i] != RELOAD_WRITE
3795 ? recog_data.operand[i] : 0),
3796 (modified[i] != RELOAD_READ
3797 ? recog_data.operand[i] : 0),
3798 (modified[i] != RELOAD_WRITE
3799 ? recog_data.operand_loc[i] : 0),
3800 (modified[i] != RELOAD_READ
3801 ? recog_data.operand_loc[i] : 0),
3802 (enum reg_class) goal_alternative[i],
3803 (modified[i] == RELOAD_WRITE
3804 ? VOIDmode : operand_mode[i]),
3805 (modified[i] == RELOAD_READ
3806 ? VOIDmode : operand_mode[i]),
3807 (insn_code_number < 0 ? 0
3808 : insn_data[insn_code_number].operand[i].strict_low),
3809 0, i, operand_type[i]);
3811 /* In a matching pair of operands, one must be input only
3812 and the other must be output only.
3813 Pass the input operand as IN and the other as OUT. */
3814 else if (modified[i] == RELOAD_READ
3815 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3817 operand_reloadnum[i]
3818 = push_reload (recog_data.operand[i],
3819 recog_data.operand[goal_alternative_matched[i]],
3820 recog_data.operand_loc[i],
3821 recog_data.operand_loc[goal_alternative_matched[i]],
3822 (enum reg_class) goal_alternative[i],
3824 operand_mode[goal_alternative_matched[i]],
3825 0, 0, i, RELOAD_OTHER);
3826 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3828 else if (modified[i] == RELOAD_WRITE
3829 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3831 operand_reloadnum[goal_alternative_matched[i]]
3832 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3833 recog_data.operand[i],
3834 recog_data.operand_loc[goal_alternative_matched[i]],
3835 recog_data.operand_loc[i],
3836 (enum reg_class) goal_alternative[i],
3837 operand_mode[goal_alternative_matched[i]],
3839 0, 0, i, RELOAD_OTHER);
3840 operand_reloadnum[i] = output_reloadnum;
3842 else if (insn_code_number >= 0)
3846 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3847 /* Avoid further trouble with this insn. */
3848 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3853 else if (goal_alternative_matched[i] < 0
3854 && goal_alternative_matches[i] < 0
3857 /* For each non-matching operand that's a MEM or a pseudo-register
3858 that didn't get a hard register, make an optional reload.
3859 This may get done even if the insn needs no reloads otherwise. */
3861 rtx operand = recog_data.operand[i];
3863 while (GET_CODE (operand) == SUBREG)
3864 operand = SUBREG_REG (operand);
3865 if ((GET_CODE (operand) == MEM
3866 || (GET_CODE (operand) == REG
3867 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3868 /* If this is only for an output, the optional reload would not
3869 actually cause us to use a register now, just note that
3870 something is stored here. */
3871 && ((enum reg_class) goal_alternative[i] != NO_REGS
3872 || modified[i] == RELOAD_WRITE)
3873 && ! no_input_reloads
3874 /* An optional output reload might allow to delete INSN later.
3875 We mustn't make in-out reloads on insns that are not permitted
3877 If this is an asm, we can't delete it; we must not even call
3878 push_reload for an optional output reload in this case,
3879 because we can't be sure that the constraint allows a register,
3880 and push_reload verifies the constraints for asms. */
3881 && (modified[i] == RELOAD_READ
3882 || (! no_output_reloads && ! this_insn_is_asm)))
3883 operand_reloadnum[i]
3884 = push_reload ((modified[i] != RELOAD_WRITE
3885 ? recog_data.operand[i] : 0),
3886 (modified[i] != RELOAD_READ
3887 ? recog_data.operand[i] : 0),
3888 (modified[i] != RELOAD_WRITE
3889 ? recog_data.operand_loc[i] : 0),
3890 (modified[i] != RELOAD_READ
3891 ? recog_data.operand_loc[i] : 0),
3892 (enum reg_class) goal_alternative[i],
3893 (modified[i] == RELOAD_WRITE
3894 ? VOIDmode : operand_mode[i]),
3895 (modified[i] == RELOAD_READ
3896 ? VOIDmode : operand_mode[i]),
3897 (insn_code_number < 0 ? 0
3898 : insn_data[insn_code_number].operand[i].strict_low),
3899 1, i, operand_type[i]);
3900 /* If a memory reference remains (either as a MEM or a pseudo that
3901 did not get a hard register), yet we can't make an optional
3902 reload, check if this is actually a pseudo register reference;
3903 we then need to emit a USE and/or a CLOBBER so that reload
3904 inheritance will do the right thing. */
3906 && (GET_CODE (operand) == MEM
3907 || (GET_CODE (operand) == REG
3908 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3909 && reg_renumber [REGNO (operand)] < 0)))
3911 operand = *recog_data.operand_loc[i];
3913 while (GET_CODE (operand) == SUBREG)
3914 operand = SUBREG_REG (operand);
3915 if (GET_CODE (operand) == REG)
3917 if (modified[i] != RELOAD_WRITE)
3918 /* We mark the USE with QImode so that we recognize
3919 it as one that can be safely deleted at the end
3921 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
3923 if (modified[i] != RELOAD_READ)
3924 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3928 else if (goal_alternative_matches[i] >= 0
3929 && goal_alternative_win[goal_alternative_matches[i]]
3930 && modified[i] == RELOAD_READ
3931 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3932 && ! no_input_reloads && ! no_output_reloads
3935 /* Similarly, make an optional reload for a pair of matching
3936 objects that are in MEM or a pseudo that didn't get a hard reg. */
3938 rtx operand = recog_data.operand[i];
3940 while (GET_CODE (operand) == SUBREG)
3941 operand = SUBREG_REG (operand);
3942 if ((GET_CODE (operand) == MEM
3943 || (GET_CODE (operand) == REG
3944 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3945 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3947 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3948 = push_reload (recog_data.operand[goal_alternative_matches[i]],
3949 recog_data.operand[i],
3950 recog_data.operand_loc[goal_alternative_matches[i]],
3951 recog_data.operand_loc[i],
3952 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3953 operand_mode[goal_alternative_matches[i]],
3955 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3958 /* Perform whatever substitutions on the operands we are supposed
3959 to make due to commutativity or replacement of registers
3960 with equivalent constants or memory slots. */
3962 for (i = 0; i < noperands; i++)
3964 /* We only do this on the last pass through reload, because it is
3965 possible for some data (like reg_equiv_address) to be changed during
3966 later passes. Moreover, we loose the opportunity to get a useful
3967 reload_{in,out}_reg when we do these replacements. */
3971 rtx substitution = substed_operand[i];
3973 *recog_data.operand_loc[i] = substitution;
3975 /* If we're replacing an operand with a LABEL_REF, we need
3976 to make sure that there's a REG_LABEL note attached to
3977 this instruction. */
3978 if (GET_CODE (insn) != JUMP_INSN
3979 && GET_CODE (substitution) == LABEL_REF
3980 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
3981 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
3982 XEXP (substitution, 0),
3986 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
3989 /* If this insn pattern contains any MATCH_DUP's, make sure that
3990 they will be substituted if the operands they match are substituted.
3991 Also do now any substitutions we already did on the operands.
3993 Don't do this if we aren't making replacements because we might be
3994 propagating things allocated by frame pointer elimination into places
3995 it doesn't expect. */
3997 if (insn_code_number >= 0 && replace)
3998 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4000 int opno = recog_data.dup_num[i];
4001 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4002 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4006 /* This loses because reloading of prior insns can invalidate the equivalence
4007 (or at least find_equiv_reg isn't smart enough to find it any more),
4008 causing this insn to need more reload regs than it needed before.
4009 It may be too late to make the reload regs available.
4010 Now this optimization is done safely in choose_reload_regs. */
4012 /* For each reload of a reg into some other class of reg,
4013 search for an existing equivalent reg (same value now) in the right class.
4014 We can use it as long as we don't need to change its contents. */
4015 for (i = 0; i < n_reloads; i++)
4016 if (rld[i].reg_rtx == 0
4018 && GET_CODE (rld[i].in) == REG
4022 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
4023 static_reload_reg_p, 0, rld[i].inmode);
4024 /* Prevent generation of insn to load the value
4025 because the one we found already has the value. */
4027 rld[i].in = rld[i].reg_rtx;
4031 /* Perhaps an output reload can be combined with another
4032 to reduce needs by one. */
4033 if (!goal_earlyclobber)
4036 /* If we have a pair of reloads for parts of an address, they are reloading
4037 the same object, the operands themselves were not reloaded, and they
4038 are for two operands that are supposed to match, merge the reloads and
4039 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4041 for (i = 0; i < n_reloads; i++)
4045 for (j = i + 1; j < n_reloads; j++)
4046 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4047 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4048 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4049 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4050 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4051 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4052 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4053 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4054 && rtx_equal_p (rld[i].in, rld[j].in)
4055 && (operand_reloadnum[rld[i].opnum] < 0
4056 || rld[operand_reloadnum[rld[i].opnum]].optional)
4057 && (operand_reloadnum[rld[j].opnum] < 0
4058 || rld[operand_reloadnum[rld[j].opnum]].optional)
4059 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4060 || (goal_alternative_matches[rld[j].opnum]
4063 for (k = 0; k < n_replacements; k++)
4064 if (replacements[k].what == j)
4065 replacements[k].what = i;
4067 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4068 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4069 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4071 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4076 /* Scan all the reloads and update their type.
4077 If a reload is for the address of an operand and we didn't reload
4078 that operand, change the type. Similarly, change the operand number
4079 of a reload when two operands match. If a reload is optional, treat it
4080 as though the operand isn't reloaded.
4082 ??? This latter case is somewhat odd because if we do the optional
4083 reload, it means the object is hanging around. Thus we need only
4084 do the address reload if the optional reload was NOT done.
4086 Change secondary reloads to be the address type of their operand, not
4089 If an operand's reload is now RELOAD_OTHER, change any
4090 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4091 RELOAD_FOR_OTHER_ADDRESS. */
4093 for (i = 0; i < n_reloads; i++)
4095 if (rld[i].secondary_p
4096 && rld[i].when_needed == operand_type[rld[i].opnum])
4097 rld[i].when_needed = address_type[rld[i].opnum];
4099 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4100 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4101 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4102 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4103 && (operand_reloadnum[rld[i].opnum] < 0
4104 || rld[operand_reloadnum[rld[i].opnum]].optional))
4106 /* If we have a secondary reload to go along with this reload,
4107 change its type to RELOAD_FOR_OPADDR_ADDR. */
4109 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4110 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4111 && rld[i].secondary_in_reload != -1)
4113 int secondary_in_reload = rld[i].secondary_in_reload;
4115 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4117 /* If there's a tertiary reload we have to change it also. */
4118 if (secondary_in_reload > 0
4119 && rld[secondary_in_reload].secondary_in_reload != -1)
4120 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4121 = RELOAD_FOR_OPADDR_ADDR;
4124 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4125 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4126 && rld[i].secondary_out_reload != -1)
4128 int secondary_out_reload = rld[i].secondary_out_reload;
4130 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4132 /* If there's a tertiary reload we have to change it also. */
4133 if (secondary_out_reload
4134 && rld[secondary_out_reload].secondary_out_reload != -1)
4135 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4136 = RELOAD_FOR_OPADDR_ADDR;
4139 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4140 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4141 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4143 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4146 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4147 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4148 && operand_reloadnum[rld[i].opnum] >= 0
4149 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4151 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4153 if (goal_alternative_matches[rld[i].opnum] >= 0)
4154 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4157 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4158 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4159 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4161 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4162 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4163 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4164 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4165 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4166 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4167 This is complicated by the fact that a single operand can have more
4168 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4169 choose_reload_regs without affecting code quality, and cases that
4170 actually fail are extremely rare, so it turns out to be better to fix
4171 the problem here by not generating cases that choose_reload_regs will
4173 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4174 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4176 We can reduce the register pressure by exploiting that a
4177 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4178 does not conflict with any of them, if it is only used for the first of
4179 the RELOAD_FOR_X_ADDRESS reloads. */
4181 int first_op_addr_num = -2;
4182 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4183 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4184 int need_change = 0;
4185 /* We use last_op_addr_reload and the contents of the above arrays
4186 first as flags - -2 means no instance encountered, -1 means exactly
4187 one instance encountered.
4188 If more than one instance has been encountered, we store the reload
4189 number of the first reload of the kind in question; reload numbers
4190 are known to be non-negative. */
4191 for (i = 0; i < noperands; i++)
4192 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4193 for (i = n_reloads - 1; i >= 0; i--)
4195 switch (rld[i].when_needed)
4197 case RELOAD_FOR_OPERAND_ADDRESS:
4198 if (++first_op_addr_num >= 0)
4200 first_op_addr_num = i;
4204 case RELOAD_FOR_INPUT_ADDRESS:
4205 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4207 first_inpaddr_num[rld[i].opnum] = i;
4211 case RELOAD_FOR_OUTPUT_ADDRESS:
4212 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4214 first_outpaddr_num[rld[i].opnum] = i;
4225 for (i = 0; i < n_reloads; i++)
4228 enum reload_type type;
4230 switch (rld[i].when_needed)
4232 case RELOAD_FOR_OPADDR_ADDR:
4233 first_num = first_op_addr_num;
4234 type = RELOAD_FOR_OPERAND_ADDRESS;
4236 case RELOAD_FOR_INPADDR_ADDRESS:
4237 first_num = first_inpaddr_num[rld[i].opnum];
4238 type = RELOAD_FOR_INPUT_ADDRESS;
4240 case RELOAD_FOR_OUTADDR_ADDRESS:
4241 first_num = first_outpaddr_num[rld[i].opnum];
4242 type = RELOAD_FOR_OUTPUT_ADDRESS;
4249 else if (i > first_num)
4250 rld[i].when_needed = type;
4253 /* Check if the only TYPE reload that uses reload I is
4254 reload FIRST_NUM. */
4255 for (j = n_reloads - 1; j > first_num; j--)
4257 if (rld[j].when_needed == type
4258 && (rld[i].secondary_p
4259 ? rld[j].secondary_in_reload == i
4260 : reg_mentioned_p (rld[i].in, rld[j].in)))
4262 rld[i].when_needed = type;
4271 /* See if we have any reloads that are now allowed to be merged
4272 because we've changed when the reload is needed to
4273 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4274 check for the most common cases. */
4276 for (i = 0; i < n_reloads; i++)
4277 if (rld[i].in != 0 && rld[i].out == 0
4278 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4279 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4280 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4281 for (j = 0; j < n_reloads; j++)
4282 if (i != j && rld[j].in != 0 && rld[j].out == 0
4283 && rld[j].when_needed == rld[i].when_needed
4284 && MATCHES (rld[i].in, rld[j].in)
4285 && rld[i].class == rld[j].class
4286 && !rld[i].nocombine && !rld[j].nocombine
4287 && rld[i].reg_rtx == rld[j].reg_rtx)
4289 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4290 transfer_replacements (i, j);
4295 /* If we made any reloads for addresses, see if they violate a
4296 "no input reloads" requirement for this insn. But loads that we
4297 do after the insn (such as for output addresses) are fine. */
4298 if (no_input_reloads)
4299 for (i = 0; i < n_reloads; i++)
4301 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
4302 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS)
4306 /* Compute reload_mode and reload_nregs. */
4307 for (i = 0; i < n_reloads; i++)
4310 = (rld[i].inmode == VOIDmode
4311 || (GET_MODE_SIZE (rld[i].outmode)
4312 > GET_MODE_SIZE (rld[i].inmode)))
4313 ? rld[i].outmode : rld[i].inmode;
4315 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4318 /* Special case a simple move with an input reload and a
4319 destination of a hard reg, if the hard reg is ok, use it. */
4320 for (i = 0; i < n_reloads; i++)
4321 if (rld[i].when_needed == RELOAD_FOR_INPUT
4322 && GET_CODE (PATTERN (insn)) == SET
4323 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
4324 && SET_SRC (PATTERN (insn)) == rld[i].in)
4326 rtx dest = SET_DEST (PATTERN (insn));
4327 unsigned int regno = REGNO (dest);
4329 if (regno < FIRST_PSEUDO_REGISTER
4330 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
4331 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4332 rld[i].reg_rtx = dest;
4338 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4339 accepts a memory operand with constant address. */
4342 alternative_allows_memconst (constraint, altnum)
4343 const char *constraint;
4347 /* Skip alternatives before the one requested. */
4350 while (*constraint++ != ',');
4353 /* Scan the requested alternative for 'm' or 'o'.
4354 If one of them is present, this alternative accepts memory constants. */
4355 while ((c = *constraint++) && c != ',' && c != '#')
4356 if (c == 'm' || c == 'o' || EXTRA_MEMORY_CONSTRAINT (c))
4361 /* Scan X for memory references and scan the addresses for reloading.
4362 Also checks for references to "constant" regs that we want to eliminate
4363 and replaces them with the values they stand for.
4364 We may alter X destructively if it contains a reference to such.
4365 If X is just a constant reg, we return the equivalent value
4368 IND_LEVELS says how many levels of indirect addressing this machine
4371 OPNUM and TYPE identify the purpose of the reload.
4373 IS_SET_DEST is true if X is the destination of a SET, which is not
4374 appropriate to be replaced by a constant.
4376 INSN, if nonzero, is the insn in which we do the reload. It is used
4377 to determine if we may generate output reloads, and where to put USEs
4378 for pseudos that we have to replace with stack slots.
4380 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4381 result of find_reloads_address. */
4384 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn,
4388 enum reload_type type;
4392 int *address_reloaded;
4394 RTX_CODE code = GET_CODE (x);
4396 const char *fmt = GET_RTX_FORMAT (code);
4402 /* This code is duplicated for speed in find_reloads. */
4403 int regno = REGNO (x);
4404 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4405 x = reg_equiv_constant[regno];
4407 /* This creates (subreg (mem...)) which would cause an unnecessary
4408 reload of the mem. */
4409 else if (reg_equiv_mem[regno] != 0)
4410 x = reg_equiv_mem[regno];
4412 else if (reg_equiv_memory_loc[regno]
4413 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4415 rtx mem = make_memloc (x, regno);
4416 if (reg_equiv_address[regno]
4417 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4419 /* If this is not a toplevel operand, find_reloads doesn't see
4420 this substitution. We have to emit a USE of the pseudo so
4421 that delete_output_reload can see it. */
4422 if (replace_reloads && recog_data.operand[opnum] != x)
4423 /* We mark the USE with QImode so that we recognize it
4424 as one that can be safely deleted at the end of
4426 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4429 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4430 opnum, type, ind_levels, insn);
4431 if (address_reloaded)
4432 *address_reloaded = i;
4441 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4442 opnum, type, ind_levels, insn);
4443 if (address_reloaded)
4444 *address_reloaded = i;
4449 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4451 /* Check for SUBREG containing a REG that's equivalent to a constant.
4452 If the constant has a known value, truncate it right now.
4453 Similarly if we are extracting a single-word of a multi-word
4454 constant. If the constant is symbolic, allow it to be substituted
4455 normally. push_reload will strip the subreg later. If the
4456 constant is VOIDmode, abort because we will lose the mode of
4457 the register (this should never happen because one of the cases
4458 above should handle it). */
4460 int regno = REGNO (SUBREG_REG (x));
4463 if (subreg_lowpart_p (x)
4464 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4465 && reg_equiv_constant[regno] != 0
4466 && (tem = gen_lowpart_common (GET_MODE (x),
4467 reg_equiv_constant[regno])) != 0)
4470 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
4471 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4472 && reg_equiv_constant[regno] != 0)
4475 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4476 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4482 /* If the subreg contains a reg that will be converted to a mem,
4483 convert the subreg to a narrower memref now.
4484 Otherwise, we would get (subreg (mem ...) ...),
4485 which would force reload of the mem.
4487 We also need to do this if there is an equivalent MEM that is
4488 not offsettable. In that case, alter_subreg would produce an
4489 invalid address on big-endian machines.
4491 For machines that extend byte loads, we must not reload using
4492 a wider mode if we have a paradoxical SUBREG. find_reloads will
4493 force a reload in that case. So we should not do anything here. */
4495 else if (regno >= FIRST_PSEUDO_REGISTER
4496 #ifdef LOAD_EXTEND_OP
4497 && (GET_MODE_SIZE (GET_MODE (x))
4498 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4500 && (reg_equiv_address[regno] != 0
4501 || (reg_equiv_mem[regno] != 0
4502 && (! strict_memory_address_p (GET_MODE (x),
4503 XEXP (reg_equiv_mem[regno], 0))
4504 || ! offsettable_memref_p (reg_equiv_mem[regno])
4505 || num_not_at_initial_offset))))
4506 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4510 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4514 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4515 ind_levels, is_set_dest, insn,
4517 /* If we have replaced a reg with it's equivalent memory loc -
4518 that can still be handled here e.g. if it's in a paradoxical
4519 subreg - we must make the change in a copy, rather than using
4520 a destructive change. This way, find_reloads can still elect
4521 not to do the change. */
4522 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4524 x = shallow_copy_rtx (x);
4527 XEXP (x, i) = new_part;
4533 /* Return a mem ref for the memory equivalent of reg REGNO.
4534 This mem ref is not shared with anything. */
4537 make_memloc (ad, regno)
4541 /* We must rerun eliminate_regs, in case the elimination
4542 offsets have changed. */
4544 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4546 /* If TEM might contain a pseudo, we must copy it to avoid
4547 modifying it when we do the substitution for the reload. */
4548 if (rtx_varies_p (tem, 0))
4549 tem = copy_rtx (tem);
4551 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4552 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4554 /* Copy the result if it's still the same as the equivalence, to avoid
4555 modifying it when we do the substitution for the reload. */
4556 if (tem == reg_equiv_memory_loc[regno])
4557 tem = copy_rtx (tem);
4561 /* Record all reloads needed for handling memory address AD
4562 which appears in *LOC in a memory reference to mode MODE
4563 which itself is found in location *MEMREFLOC.
4564 Note that we take shortcuts assuming that no multi-reg machine mode
4565 occurs as part of an address.
4567 OPNUM and TYPE specify the purpose of this reload.
4569 IND_LEVELS says how many levels of indirect addressing this machine
4572 INSN, if nonzero, is the insn in which we do the reload. It is used
4573 to determine if we may generate output reloads, and where to put USEs
4574 for pseudos that we have to replace with stack slots.
4576 Value is nonzero if this address is reloaded or replaced as a whole.
4577 This is interesting to the caller if the address is an autoincrement.
4579 Note that there is no verification that the address will be valid after
4580 this routine does its work. Instead, we rely on the fact that the address
4581 was valid when reload started. So we need only undo things that reload
4582 could have broken. These are wrong register types, pseudos not allocated
4583 to a hard register, and frame pointer elimination. */
4586 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn)
4587 enum machine_mode mode;
4592 enum reload_type type;
4597 int removed_and = 0;
4600 /* If the address is a register, see if it is a legitimate address and
4601 reload if not. We first handle the cases where we need not reload
4602 or where we must reload in a non-standard way. */
4604 if (GET_CODE (ad) == REG)
4608 /* If the register is equivalent to an invariant expression, substitute
4609 the invariant, and eliminate any eliminable register references. */
4610 tem = reg_equiv_constant[regno];
4612 && (tem = eliminate_regs (tem, mode, insn))
4613 && strict_memory_address_p (mode, tem))
4619 tem = reg_equiv_memory_loc[regno];
4622 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4624 tem = make_memloc (ad, regno);
4625 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4627 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4628 &XEXP (tem, 0), opnum,
4629 ADDR_TYPE (type), ind_levels, insn);
4631 /* We can avoid a reload if the register's equivalent memory
4632 expression is valid as an indirect memory address.
4633 But not all addresses are valid in a mem used as an indirect
4634 address: only reg or reg+constant. */
4637 && strict_memory_address_p (mode, tem)
4638 && (GET_CODE (XEXP (tem, 0)) == REG
4639 || (GET_CODE (XEXP (tem, 0)) == PLUS
4640 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4641 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4643 /* TEM is not the same as what we'll be replacing the
4644 pseudo with after reload, put a USE in front of INSN
4645 in the final reload pass. */
4647 && num_not_at_initial_offset
4648 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4651 /* We mark the USE with QImode so that we
4652 recognize it as one that can be safely
4653 deleted at the end of reload. */
4654 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4657 /* This doesn't really count as replacing the address
4658 as a whole, since it is still a memory access. */
4666 /* The only remaining case where we can avoid a reload is if this is a
4667 hard register that is valid as a base register and which is not the
4668 subject of a CLOBBER in this insn. */
4670 else if (regno < FIRST_PSEUDO_REGISTER
4671 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4672 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4675 /* If we do not have one of the cases above, we must do the reload. */
4676 push_reload (ad, NULL_RTX, loc, (rtx*) 0, MODE_BASE_REG_CLASS (mode),
4677 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4681 if (strict_memory_address_p (mode, ad))
4683 /* The address appears valid, so reloads are not needed.
4684 But the address may contain an eliminable register.
4685 This can happen because a machine with indirect addressing
4686 may consider a pseudo register by itself a valid address even when
4687 it has failed to get a hard reg.
4688 So do a tree-walk to find and eliminate all such regs. */
4690 /* But first quickly dispose of a common case. */
4691 if (GET_CODE (ad) == PLUS
4692 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4693 && GET_CODE (XEXP (ad, 0)) == REG
4694 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4697 subst_reg_equivs_changed = 0;
4698 *loc = subst_reg_equivs (ad, insn);
4700 if (! subst_reg_equivs_changed)
4703 /* Check result for validity after substitution. */
4704 if (strict_memory_address_p (mode, ad))
4708 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4713 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4718 *memrefloc = copy_rtx (*memrefloc);
4719 XEXP (*memrefloc, 0) = ad;
4720 move_replacements (&ad, &XEXP (*memrefloc, 0));
4726 /* The address is not valid. We have to figure out why. First see if
4727 we have an outer AND and remove it if so. Then analyze what's inside. */
4729 if (GET_CODE (ad) == AND)
4732 loc = &XEXP (ad, 0);
4736 /* One possibility for why the address is invalid is that it is itself
4737 a MEM. This can happen when the frame pointer is being eliminated, a
4738 pseudo is not allocated to a hard register, and the offset between the
4739 frame and stack pointers is not its initial value. In that case the
4740 pseudo will have been replaced by a MEM referring to the
4742 if (GET_CODE (ad) == MEM)
4744 /* First ensure that the address in this MEM is valid. Then, unless
4745 indirect addresses are valid, reload the MEM into a register. */
4747 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4748 opnum, ADDR_TYPE (type),
4749 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4751 /* If tem was changed, then we must create a new memory reference to
4752 hold it and store it back into memrefloc. */
4753 if (tem != ad && memrefloc)
4755 *memrefloc = copy_rtx (*memrefloc);
4756 copy_replacements (tem, XEXP (*memrefloc, 0));
4757 loc = &XEXP (*memrefloc, 0);
4759 loc = &XEXP (*loc, 0);
4762 /* Check similar cases as for indirect addresses as above except
4763 that we can allow pseudos and a MEM since they should have been
4764 taken care of above. */
4767 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4768 || GET_CODE (XEXP (tem, 0)) == MEM
4769 || ! (GET_CODE (XEXP (tem, 0)) == REG
4770 || (GET_CODE (XEXP (tem, 0)) == PLUS
4771 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4772 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4774 /* Must use TEM here, not AD, since it is the one that will
4775 have any subexpressions reloaded, if needed. */
4776 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
4777 MODE_BASE_REG_CLASS (mode), GET_MODE (tem),
4780 return ! removed_and;
4786 /* If we have address of a stack slot but it's not valid because the
4787 displacement is too large, compute the sum in a register.
4788 Handle all base registers here, not just fp/ap/sp, because on some
4789 targets (namely SH) we can also get too large displacements from
4790 big-endian corrections. */
4791 else if (GET_CODE (ad) == PLUS
4792 && GET_CODE (XEXP (ad, 0)) == REG
4793 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4794 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4795 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4797 /* Unshare the MEM rtx so we can safely alter it. */
4800 *memrefloc = copy_rtx (*memrefloc);
4801 loc = &XEXP (*memrefloc, 0);
4803 loc = &XEXP (*loc, 0);
4806 if (double_reg_address_ok)
4808 /* Unshare the sum as well. */
4809 *loc = ad = copy_rtx (ad);
4811 /* Reload the displacement into an index reg.
4812 We assume the frame pointer or arg pointer is a base reg. */
4813 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4814 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4820 /* If the sum of two regs is not necessarily valid,
4821 reload the sum into a base reg.
4822 That will at least work. */
4823 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4824 Pmode, opnum, type, ind_levels);
4826 return ! removed_and;
4829 /* If we have an indexed stack slot, there are three possible reasons why
4830 it might be invalid: The index might need to be reloaded, the address
4831 might have been made by frame pointer elimination and hence have a
4832 constant out of range, or both reasons might apply.
4834 We can easily check for an index needing reload, but even if that is the
4835 case, we might also have an invalid constant. To avoid making the
4836 conservative assumption and requiring two reloads, we see if this address
4837 is valid when not interpreted strictly. If it is, the only problem is
4838 that the index needs a reload and find_reloads_address_1 will take care
4841 If we decide to do something here, it must be that
4842 `double_reg_address_ok' is true and that this address rtl was made by
4843 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4844 rework the sum so that the reload register will be added to the index.
4845 This is safe because we know the address isn't shared.
4847 We check for fp/ap/sp as both the first and second operand of the
4850 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4851 && GET_CODE (XEXP (ad, 0)) == PLUS
4852 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4853 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4854 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4856 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4857 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4859 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4860 && ! memory_address_p (mode, ad))
4862 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4863 plus_constant (XEXP (XEXP (ad, 0), 0),
4864 INTVAL (XEXP (ad, 1))),
4865 XEXP (XEXP (ad, 0), 1));
4866 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0),
4867 MODE_BASE_REG_CLASS (mode),
4868 GET_MODE (ad), opnum, type, ind_levels);
4869 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4875 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4876 && GET_CODE (XEXP (ad, 0)) == PLUS
4877 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4878 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4879 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4881 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4882 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4884 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4885 && ! memory_address_p (mode, ad))
4887 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4888 XEXP (XEXP (ad, 0), 0),
4889 plus_constant (XEXP (XEXP (ad, 0), 1),
4890 INTVAL (XEXP (ad, 1))));
4891 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4892 MODE_BASE_REG_CLASS (mode),
4893 GET_MODE (ad), opnum, type, ind_levels);
4894 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4900 /* See if address becomes valid when an eliminable register
4901 in a sum is replaced. */
4904 if (GET_CODE (ad) == PLUS)
4905 tem = subst_indexed_address (ad);
4906 if (tem != ad && strict_memory_address_p (mode, tem))
4908 /* Ok, we win that way. Replace any additional eliminable
4911 subst_reg_equivs_changed = 0;
4912 tem = subst_reg_equivs (tem, insn);
4914 /* Make sure that didn't make the address invalid again. */
4916 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4923 /* If constants aren't valid addresses, reload the constant address
4925 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4927 /* If AD is an address in the constant pool, the MEM rtx may be shared.
4928 Unshare it so we can safely alter it. */
4929 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4930 && CONSTANT_POOL_ADDRESS_P (ad))
4932 *memrefloc = copy_rtx (*memrefloc);
4933 loc = &XEXP (*memrefloc, 0);
4935 loc = &XEXP (*loc, 0);
4938 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4939 Pmode, opnum, type, ind_levels);
4940 return ! removed_and;
4943 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
4947 /* Find all pseudo regs appearing in AD
4948 that are eliminable in favor of equivalent values
4949 and do not have hard regs; replace them by their equivalents.
4950 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4951 front of it for pseudos that we have to replace with stack slots. */
4954 subst_reg_equivs (ad, insn)
4958 RTX_CODE code = GET_CODE (ad);
4977 int regno = REGNO (ad);
4979 if (reg_equiv_constant[regno] != 0)
4981 subst_reg_equivs_changed = 1;
4982 return reg_equiv_constant[regno];
4984 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
4986 rtx mem = make_memloc (ad, regno);
4987 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
4989 subst_reg_equivs_changed = 1;
4990 /* We mark the USE with QImode so that we recognize it
4991 as one that can be safely deleted at the end of
4993 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5002 /* Quickly dispose of a common case. */
5003 if (XEXP (ad, 0) == frame_pointer_rtx
5004 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
5012 fmt = GET_RTX_FORMAT (code);
5013 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5015 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5019 /* Compute the sum of X and Y, making canonicalizations assumed in an
5020 address, namely: sum constant integers, surround the sum of two
5021 constants with a CONST, put the constant as the second operand, and
5022 group the constant on the outermost sum.
5024 This routine assumes both inputs are already in canonical form. */
5031 enum machine_mode mode = GET_MODE (x);
5033 if (mode == VOIDmode)
5034 mode = GET_MODE (y);
5036 if (mode == VOIDmode)
5039 if (GET_CODE (x) == CONST_INT)
5040 return plus_constant (y, INTVAL (x));
5041 else if (GET_CODE (y) == CONST_INT)
5042 return plus_constant (x, INTVAL (y));
5043 else if (CONSTANT_P (x))
5044 tem = x, x = y, y = tem;
5046 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5047 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5049 /* Note that if the operands of Y are specified in the opposite
5050 order in the recursive calls below, infinite recursion will occur. */
5051 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5052 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5054 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5055 constant will have been placed second. */
5056 if (CONSTANT_P (x) && CONSTANT_P (y))
5058 if (GET_CODE (x) == CONST)
5060 if (GET_CODE (y) == CONST)
5063 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5066 return gen_rtx_PLUS (mode, x, y);
5069 /* If ADDR is a sum containing a pseudo register that should be
5070 replaced with a constant (from reg_equiv_constant),
5071 return the result of doing so, and also apply the associative
5072 law so that the result is more likely to be a valid address.
5073 (But it is not guaranteed to be one.)
5075 Note that at most one register is replaced, even if more are
5076 replaceable. Also, we try to put the result into a canonical form
5077 so it is more likely to be a valid address.
5079 In all other cases, return ADDR. */
5082 subst_indexed_address (addr)
5085 rtx op0 = 0, op1 = 0, op2 = 0;
5089 if (GET_CODE (addr) == PLUS)
5091 /* Try to find a register to replace. */
5092 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5093 if (GET_CODE (op0) == REG
5094 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5095 && reg_renumber[regno] < 0
5096 && reg_equiv_constant[regno] != 0)
5097 op0 = reg_equiv_constant[regno];
5098 else if (GET_CODE (op1) == REG
5099 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5100 && reg_renumber[regno] < 0
5101 && reg_equiv_constant[regno] != 0)
5102 op1 = reg_equiv_constant[regno];
5103 else if (GET_CODE (op0) == PLUS
5104 && (tem = subst_indexed_address (op0)) != op0)
5106 else if (GET_CODE (op1) == PLUS
5107 && (tem = subst_indexed_address (op1)) != op1)
5112 /* Pick out up to three things to add. */
5113 if (GET_CODE (op1) == PLUS)
5114 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5115 else if (GET_CODE (op0) == PLUS)
5116 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5118 /* Compute the sum. */
5120 op1 = form_sum (op1, op2);
5122 op0 = form_sum (op0, op1);
5129 /* Update the REG_INC notes for an insn. It updates all REG_INC
5130 notes for the instruction which refer to REGNO the to refer
5131 to the reload number.
5133 INSN is the insn for which any REG_INC notes need updating.
5135 REGNO is the register number which has been reloaded.
5137 RELOADNUM is the reload number. */
5140 update_auto_inc_notes (insn, regno, reloadnum)
5141 rtx insn ATTRIBUTE_UNUSED;
5142 int regno ATTRIBUTE_UNUSED;
5143 int reloadnum ATTRIBUTE_UNUSED;
5148 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5149 if (REG_NOTE_KIND (link) == REG_INC
5150 && REGNO (XEXP (link, 0)) == regno)
5151 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5155 /* Record the pseudo registers we must reload into hard registers in a
5156 subexpression of a would-be memory address, X referring to a value
5157 in mode MODE. (This function is not called if the address we find
5160 CONTEXT = 1 means we are considering regs as index regs,
5161 = 0 means we are considering them as base regs.
5163 OPNUM and TYPE specify the purpose of any reloads made.
5165 IND_LEVELS says how many levels of indirect addressing are
5166 supported at this point in the address.
5168 INSN, if nonzero, is the insn in which we do the reload. It is used
5169 to determine if we may generate output reloads.
5171 We return nonzero if X, as a whole, is reloaded or replaced. */
5173 /* Note that we take shortcuts assuming that no multi-reg machine mode
5174 occurs as part of an address.
5175 Also, this is not fully machine-customizable; it works for machines
5176 such as VAXen and 68000's and 32000's, but other possible machines
5177 could have addressing modes that this does not handle right. */
5180 find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
5181 enum machine_mode mode;
5186 enum reload_type type;
5190 RTX_CODE code = GET_CODE (x);
5196 rtx orig_op0 = XEXP (x, 0);
5197 rtx orig_op1 = XEXP (x, 1);
5198 RTX_CODE code0 = GET_CODE (orig_op0);
5199 RTX_CODE code1 = GET_CODE (orig_op1);
5203 if (GET_CODE (op0) == SUBREG)
5205 op0 = SUBREG_REG (op0);
5206 code0 = GET_CODE (op0);
5207 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5208 op0 = gen_rtx_REG (word_mode,
5210 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5211 GET_MODE (SUBREG_REG (orig_op0)),
5212 SUBREG_BYTE (orig_op0),
5213 GET_MODE (orig_op0))));
5216 if (GET_CODE (op1) == SUBREG)
5218 op1 = SUBREG_REG (op1);
5219 code1 = GET_CODE (op1);
5220 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5221 /* ??? Why is this given op1's mode and above for
5222 ??? op0 SUBREGs we use word_mode? */
5223 op1 = gen_rtx_REG (GET_MODE (op1),
5225 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5226 GET_MODE (SUBREG_REG (orig_op1)),
5227 SUBREG_BYTE (orig_op1),
5228 GET_MODE (orig_op1))));
5231 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5232 || code0 == ZERO_EXTEND || code1 == MEM)
5234 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5235 type, ind_levels, insn);
5236 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5237 type, ind_levels, insn);
5240 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5241 || code1 == ZERO_EXTEND || code0 == MEM)
5243 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5244 type, ind_levels, insn);
5245 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5246 type, ind_levels, insn);
5249 else if (code0 == CONST_INT || code0 == CONST
5250 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5251 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5252 type, ind_levels, insn);
5254 else if (code1 == CONST_INT || code1 == CONST
5255 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5256 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5257 type, ind_levels, insn);
5259 else if (code0 == REG && code1 == REG)
5261 if (REG_OK_FOR_INDEX_P (op0)
5262 && REG_MODE_OK_FOR_BASE_P (op1, mode))
5264 else if (REG_OK_FOR_INDEX_P (op1)
5265 && REG_MODE_OK_FOR_BASE_P (op0, mode))
5267 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5268 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5269 type, ind_levels, insn);
5270 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5271 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5272 type, ind_levels, insn);
5273 else if (REG_OK_FOR_INDEX_P (op1))
5274 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5275 type, ind_levels, insn);
5276 else if (REG_OK_FOR_INDEX_P (op0))
5277 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5278 type, ind_levels, insn);
5281 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5282 type, ind_levels, insn);
5283 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5284 type, ind_levels, insn);
5288 else if (code0 == REG)
5290 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5291 type, ind_levels, insn);
5292 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5293 type, ind_levels, insn);
5296 else if (code1 == REG)
5298 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5299 type, ind_levels, insn);
5300 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5301 type, ind_levels, insn);
5310 rtx op0 = XEXP (x, 0);
5311 rtx op1 = XEXP (x, 1);
5313 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5316 /* Currently, we only support {PRE,POST}_MODIFY constructs
5317 where a base register is {inc,dec}remented by the contents
5318 of another register or by a constant value. Thus, these
5319 operands must match. */
5320 if (op0 != XEXP (op1, 0))
5323 /* Require index register (or constant). Let's just handle the
5324 register case in the meantime... If the target allows
5325 auto-modify by a constant then we could try replacing a pseudo
5326 register with its equivalent constant where applicable. */
5327 if (REG_P (XEXP (op1, 1)))
5328 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5329 find_reloads_address_1 (mode, XEXP (op1, 1), 1, &XEXP (op1, 1),
5330 opnum, type, ind_levels, insn);
5332 if (REG_P (XEXP (op1, 0)))
5334 int regno = REGNO (XEXP (op1, 0));
5337 /* A register that is incremented cannot be constant! */
5338 if (regno >= FIRST_PSEUDO_REGISTER
5339 && reg_equiv_constant[regno] != 0)
5342 /* Handle a register that is equivalent to a memory location
5343 which cannot be addressed directly. */
5344 if (reg_equiv_memory_loc[regno] != 0
5345 && (reg_equiv_address[regno] != 0
5346 || num_not_at_initial_offset))
5348 rtx tem = make_memloc (XEXP (x, 0), regno);
5350 if (reg_equiv_address[regno]
5351 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5353 /* First reload the memory location's address.
5354 We can't use ADDR_TYPE (type) here, because we need to
5355 write back the value after reading it, hence we actually
5356 need two registers. */
5357 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5358 &XEXP (tem, 0), opnum,
5362 /* Then reload the memory location into a base
5364 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5366 MODE_BASE_REG_CLASS (mode),
5367 GET_MODE (x), GET_MODE (x), 0,
5368 0, opnum, RELOAD_OTHER);
5370 update_auto_inc_notes (this_insn, regno, reloadnum);
5375 if (reg_renumber[regno] >= 0)
5376 regno = reg_renumber[regno];
5378 /* We require a base register here... */
5379 if (!REGNO_MODE_OK_FOR_BASE_P (regno, GET_MODE (x)))
5381 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5382 &XEXP (op1, 0), &XEXP (x, 0),
5383 MODE_BASE_REG_CLASS (mode),
5384 GET_MODE (x), GET_MODE (x), 0, 0,
5385 opnum, RELOAD_OTHER);
5387 update_auto_inc_notes (this_insn, regno, reloadnum);
5400 if (GET_CODE (XEXP (x, 0)) == REG)
5402 int regno = REGNO (XEXP (x, 0));
5406 /* A register that is incremented cannot be constant! */
5407 if (regno >= FIRST_PSEUDO_REGISTER
5408 && reg_equiv_constant[regno] != 0)
5411 /* Handle a register that is equivalent to a memory location
5412 which cannot be addressed directly. */
5413 if (reg_equiv_memory_loc[regno] != 0
5414 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5416 rtx tem = make_memloc (XEXP (x, 0), regno);
5417 if (reg_equiv_address[regno]
5418 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5420 /* First reload the memory location's address.
5421 We can't use ADDR_TYPE (type) here, because we need to
5422 write back the value after reading it, hence we actually
5423 need two registers. */
5424 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5425 &XEXP (tem, 0), opnum, type,
5427 /* Put this inside a new increment-expression. */
5428 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5429 /* Proceed to reload that, as if it contained a register. */
5433 /* If we have a hard register that is ok as an index,
5434 don't make a reload. If an autoincrement of a nice register
5435 isn't "valid", it must be that no autoincrement is "valid".
5436 If that is true and something made an autoincrement anyway,
5437 this must be a special context where one is allowed.
5438 (For example, a "push" instruction.)
5439 We can't improve this address, so leave it alone. */
5441 /* Otherwise, reload the autoincrement into a suitable hard reg
5442 and record how much to increment by. */
5444 if (reg_renumber[regno] >= 0)
5445 regno = reg_renumber[regno];
5446 if ((regno >= FIRST_PSEUDO_REGISTER
5447 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5448 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5452 /* If we can output the register afterwards, do so, this
5453 saves the extra update.
5454 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5455 CALL_INSN - and it does not set CC0.
5456 But don't do this if we cannot directly address the
5457 memory location, since this will make it harder to
5458 reuse address reloads, and increases register pressure.
5459 Also don't do this if we can probably update x directly. */
5460 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM
5462 : reg_equiv_mem[regno]);
5463 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5464 if (insn && GET_CODE (insn) == INSN && equiv
5465 && memory_operand (equiv, GET_MODE (equiv))
5467 && ! sets_cc0_p (PATTERN (insn))
5469 && ! (icode != CODE_FOR_nothing
5470 && ((*insn_data[icode].operand[0].predicate)
5472 && ((*insn_data[icode].operand[1].predicate)
5475 /* We use the original pseudo for loc, so that
5476 emit_reload_insns() knows which pseudo this
5477 reload refers to and updates the pseudo rtx, not
5478 its equivalent memory location, as well as the
5479 corresponding entry in reg_last_reload_reg. */
5480 loc = &XEXP (x_orig, 0);
5483 = push_reload (x, x, loc, loc,
5484 (context ? INDEX_REG_CLASS :
5485 MODE_BASE_REG_CLASS (mode)),
5486 GET_MODE (x), GET_MODE (x), 0, 0,
5487 opnum, RELOAD_OTHER);
5492 = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5493 (context ? INDEX_REG_CLASS :
5494 MODE_BASE_REG_CLASS (mode)),
5495 GET_MODE (x), GET_MODE (x), 0, 0,
5498 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5503 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5509 else if (GET_CODE (XEXP (x, 0)) == MEM)
5511 /* This is probably the result of a substitution, by eliminate_regs,
5512 of an equivalent address for a pseudo that was not allocated to a
5513 hard register. Verify that the specified address is valid and
5514 reload it into a register. */
5515 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5516 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5520 /* Since we know we are going to reload this item, don't decrement
5521 for the indirection level.
5523 Note that this is actually conservative: it would be slightly
5524 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5526 /* We can't use ADDR_TYPE (type) here, because we need to
5527 write back the value after reading it, hence we actually
5528 need two registers. */
5529 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5530 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5531 opnum, type, ind_levels, insn);
5533 reloadnum = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5534 (context ? INDEX_REG_CLASS :
5535 MODE_BASE_REG_CLASS (mode)),
5536 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5538 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5540 link = FIND_REG_INC_NOTE (this_insn, tem);
5542 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5549 /* This is probably the result of a substitution, by eliminate_regs, of
5550 an equivalent address for a pseudo that was not allocated to a hard
5551 register. Verify that the specified address is valid and reload it
5554 Since we know we are going to reload this item, don't decrement for
5555 the indirection level.
5557 Note that this is actually conservative: it would be slightly more
5558 efficient to use the value of SPILL_INDIRECT_LEVELS from
5561 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5562 opnum, ADDR_TYPE (type), ind_levels, insn);
5563 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5564 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5565 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5570 int regno = REGNO (x);
5572 if (reg_equiv_constant[regno] != 0)
5574 find_reloads_address_part (reg_equiv_constant[regno], loc,
5575 (context ? INDEX_REG_CLASS :
5576 MODE_BASE_REG_CLASS (mode)),
5577 GET_MODE (x), opnum, type, ind_levels);
5581 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5582 that feeds this insn. */
5583 if (reg_equiv_mem[regno] != 0)
5585 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
5586 (context ? INDEX_REG_CLASS :
5587 MODE_BASE_REG_CLASS (mode)),
5588 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5593 if (reg_equiv_memory_loc[regno]
5594 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5596 rtx tem = make_memloc (x, regno);
5597 if (reg_equiv_address[regno] != 0
5598 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5601 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5602 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5607 if (reg_renumber[regno] >= 0)
5608 regno = reg_renumber[regno];
5610 if ((regno >= FIRST_PSEUDO_REGISTER
5611 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5612 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5614 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5615 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5616 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5620 /* If a register appearing in an address is the subject of a CLOBBER
5621 in this insn, reload it into some other register to be safe.
5622 The CLOBBER is supposed to make the register unavailable
5623 from before this insn to after it. */
5624 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5626 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5627 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5628 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5635 if (GET_CODE (SUBREG_REG (x)) == REG)
5637 /* If this is a SUBREG of a hard register and the resulting register
5638 is of the wrong class, reload the whole SUBREG. This avoids
5639 needless copies if SUBREG_REG is multi-word. */
5640 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5642 int regno = subreg_regno (x);
5644 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5645 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5647 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5648 (context ? INDEX_REG_CLASS :
5649 MODE_BASE_REG_CLASS (mode)),
5650 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5654 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5655 is larger than the class size, then reload the whole SUBREG. */
5658 enum reg_class class = (context ? INDEX_REG_CLASS
5659 : MODE_BASE_REG_CLASS (mode));
5660 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5661 > reg_class_size[class])
5663 x = find_reloads_subreg_address (x, 0, opnum, type,
5665 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5666 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5678 const char *fmt = GET_RTX_FORMAT (code);
5681 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5684 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5685 opnum, type, ind_levels, insn);
5692 /* X, which is found at *LOC, is a part of an address that needs to be
5693 reloaded into a register of class CLASS. If X is a constant, or if
5694 X is a PLUS that contains a constant, check that the constant is a
5695 legitimate operand and that we are supposed to be able to load
5696 it into the register.
5698 If not, force the constant into memory and reload the MEM instead.
5700 MODE is the mode to use, in case X is an integer constant.
5702 OPNUM and TYPE describe the purpose of any reloads made.
5704 IND_LEVELS says how many levels of indirect addressing this machine
5708 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
5711 enum reg_class class;
5712 enum machine_mode mode;
5714 enum reload_type type;
5718 && (! LEGITIMATE_CONSTANT_P (x)
5719 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5723 tem = x = force_const_mem (mode, x);
5724 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5725 opnum, type, ind_levels, 0);
5728 else if (GET_CODE (x) == PLUS
5729 && CONSTANT_P (XEXP (x, 1))
5730 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5731 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5735 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5736 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5737 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5738 opnum, type, ind_levels, 0);
5741 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5742 mode, VOIDmode, 0, 0, opnum, type);
5745 /* X, a subreg of a pseudo, is a part of an address that needs to be
5748 If the pseudo is equivalent to a memory location that cannot be directly
5749 addressed, make the necessary address reloads.
5751 If address reloads have been necessary, or if the address is changed
5752 by register elimination, return the rtx of the memory location;
5753 otherwise, return X.
5755 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5758 OPNUM and TYPE identify the purpose of the reload.
5760 IND_LEVELS says how many levels of indirect addressing are
5761 supported at this point in the address.
5763 INSN, if nonzero, is the insn in which we do the reload. It is used
5764 to determine where to put USEs for pseudos that we have to replace with
5768 find_reloads_subreg_address (x, force_replace, opnum, type,
5773 enum reload_type type;
5777 int regno = REGNO (SUBREG_REG (x));
5779 if (reg_equiv_memory_loc[regno])
5781 /* If the address is not directly addressable, or if the address is not
5782 offsettable, then it must be replaced. */
5784 && (reg_equiv_address[regno]
5785 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5788 if (force_replace || num_not_at_initial_offset)
5790 rtx tem = make_memloc (SUBREG_REG (x), regno);
5792 /* If the address changes because of register elimination, then
5793 it must be replaced. */
5795 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5797 int offset = SUBREG_BYTE (x);
5798 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
5799 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5801 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5802 PUT_MODE (tem, GET_MODE (x));
5804 /* If this was a paradoxical subreg that we replaced, the
5805 resulting memory must be sufficiently aligned to allow
5806 us to widen the mode of the memory. */
5807 if (outer_size > inner_size && STRICT_ALIGNMENT)
5811 base = XEXP (tem, 0);
5812 if (GET_CODE (base) == PLUS)
5814 if (GET_CODE (XEXP (base, 1)) == CONST_INT
5815 && INTVAL (XEXP (base, 1)) % outer_size != 0)
5817 base = XEXP (base, 0);
5819 if (GET_CODE (base) != REG
5820 || (REGNO_POINTER_ALIGN (REGNO (base))
5821 < outer_size * BITS_PER_UNIT))
5825 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5826 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
5829 /* If this is not a toplevel operand, find_reloads doesn't see
5830 this substitution. We have to emit a USE of the pseudo so
5831 that delete_output_reload can see it. */
5832 if (replace_reloads && recog_data.operand[opnum] != x)
5833 /* We mark the USE with QImode so that we recognize it
5834 as one that can be safely deleted at the end of
5836 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
5846 /* Substitute into the current INSN the registers into which we have reloaded
5847 the things that need reloading. The array `replacements'
5848 contains the locations of all pointers that must be changed
5849 and says what to replace them with.
5851 Return the rtx that X translates into; usually X, but modified. */
5854 subst_reloads (insn)
5859 for (i = 0; i < n_replacements; i++)
5861 struct replacement *r = &replacements[i];
5862 rtx reloadreg = rld[r->what].reg_rtx;
5865 #ifdef ENABLE_CHECKING
5866 /* Internal consistency test. Check that we don't modify
5867 anything in the equivalence arrays. Whenever something from
5868 those arrays needs to be reloaded, it must be unshared before
5869 being substituted into; the equivalence must not be modified.
5870 Otherwise, if the equivalence is used after that, it will
5871 have been modified, and the thing substituted (probably a
5872 register) is likely overwritten and not a usable equivalence. */
5875 for (check_regno = 0; check_regno < max_regno; check_regno++)
5877 #define CHECK_MODF(ARRAY) \
5878 if (ARRAY[check_regno] \
5879 && loc_mentioned_in_p (r->where, \
5880 ARRAY[check_regno])) \
5883 CHECK_MODF (reg_equiv_constant);
5884 CHECK_MODF (reg_equiv_memory_loc);
5885 CHECK_MODF (reg_equiv_address);
5886 CHECK_MODF (reg_equiv_mem);
5889 #endif /* ENABLE_CHECKING */
5891 /* If we're replacing a LABEL_REF with a register, add a
5892 REG_LABEL note to indicate to flow which label this
5893 register refers to. */
5894 if (GET_CODE (*r->where) == LABEL_REF
5895 && GET_CODE (insn) == JUMP_INSN)
5896 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
5897 XEXP (*r->where, 0),
5900 /* Encapsulate RELOADREG so its machine mode matches what
5901 used to be there. Note that gen_lowpart_common will
5902 do the wrong thing if RELOADREG is multi-word. RELOADREG
5903 will always be a REG here. */
5904 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5905 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5907 /* If we are putting this into a SUBREG and RELOADREG is a
5908 SUBREG, we would be making nested SUBREGs, so we have to fix
5909 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5911 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5913 if (GET_MODE (*r->subreg_loc)
5914 == GET_MODE (SUBREG_REG (reloadreg)))
5915 *r->subreg_loc = SUBREG_REG (reloadreg);
5919 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
5921 /* When working with SUBREGs the rule is that the byte
5922 offset must be a multiple of the SUBREG's mode. */
5923 final_offset = (final_offset /
5924 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5925 final_offset = (final_offset *
5926 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5928 *r->where = SUBREG_REG (reloadreg);
5929 SUBREG_BYTE (*r->subreg_loc) = final_offset;
5933 *r->where = reloadreg;
5935 /* If reload got no reg and isn't optional, something's wrong. */
5936 else if (! rld[r->what].optional)
5941 /* Make a copy of any replacements being done into X and move those
5942 copies to locations in Y, a copy of X. */
5945 copy_replacements (x, y)
5948 /* We can't support X being a SUBREG because we might then need to know its
5949 location if something inside it was replaced. */
5950 if (GET_CODE (x) == SUBREG)
5953 copy_replacements_1 (&x, &y, n_replacements);
5957 copy_replacements_1 (px, py, orig_replacements)
5960 int orig_replacements;
5964 struct replacement *r;
5968 for (j = 0; j < orig_replacements; j++)
5970 if (replacements[j].subreg_loc == px)
5972 r = &replacements[n_replacements++];
5973 r->where = replacements[j].where;
5975 r->what = replacements[j].what;
5976 r->mode = replacements[j].mode;
5978 else if (replacements[j].where == px)
5980 r = &replacements[n_replacements++];
5983 r->what = replacements[j].what;
5984 r->mode = replacements[j].mode;
5990 code = GET_CODE (x);
5991 fmt = GET_RTX_FORMAT (code);
5993 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5996 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
5997 else if (fmt[i] == 'E')
5998 for (j = XVECLEN (x, i); --j >= 0; )
5999 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6004 /* Change any replacements being done to *X to be done to *Y */
6007 move_replacements (x, y)
6013 for (i = 0; i < n_replacements; i++)
6014 if (replacements[i].subreg_loc == x)
6015 replacements[i].subreg_loc = y;
6016 else if (replacements[i].where == x)
6018 replacements[i].where = y;
6019 replacements[i].subreg_loc = 0;
6023 /* If LOC was scheduled to be replaced by something, return the replacement.
6024 Otherwise, return *LOC. */
6027 find_replacement (loc)
6030 struct replacement *r;
6032 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6034 rtx reloadreg = rld[r->what].reg_rtx;
6036 if (reloadreg && r->where == loc)
6038 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6039 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
6043 else if (reloadreg && r->subreg_loc == loc)
6045 /* RELOADREG must be either a REG or a SUBREG.
6047 ??? Is it actually still ever a SUBREG? If so, why? */
6049 if (GET_CODE (reloadreg) == REG)
6050 return gen_rtx_REG (GET_MODE (*loc),
6051 (REGNO (reloadreg) +
6052 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
6053 GET_MODE (SUBREG_REG (*loc)),
6056 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6060 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6062 /* When working with SUBREGs the rule is that the byte
6063 offset must be a multiple of the SUBREG's mode. */
6064 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6065 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6066 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6072 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6073 what's inside and make a new rtl if so. */
6074 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6075 || GET_CODE (*loc) == MULT)
6077 rtx x = find_replacement (&XEXP (*loc, 0));
6078 rtx y = find_replacement (&XEXP (*loc, 1));
6080 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6081 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6087 /* Return nonzero if register in range [REGNO, ENDREGNO)
6088 appears either explicitly or implicitly in X
6089 other than being stored into (except for earlyclobber operands).
6091 References contained within the substructure at LOC do not count.
6092 LOC may be zero, meaning don't ignore anything.
6094 This is similar to refers_to_regno_p in rtlanal.c except that we
6095 look at equivalences for pseudos that didn't get hard registers. */
6098 refers_to_regno_for_reload_p (regno, endregno, x, loc)
6099 unsigned int regno, endregno;
6112 code = GET_CODE (x);
6119 /* If this is a pseudo, a hard register must not have been allocated.
6120 X must therefore either be a constant or be in memory. */
6121 if (r >= FIRST_PSEUDO_REGISTER)
6123 if (reg_equiv_memory_loc[r])
6124 return refers_to_regno_for_reload_p (regno, endregno,
6125 reg_equiv_memory_loc[r],
6128 if (reg_equiv_constant[r])
6134 return (endregno > r
6135 && regno < r + (r < FIRST_PSEUDO_REGISTER
6136 ? HARD_REGNO_NREGS (r, GET_MODE (x))
6140 /* If this is a SUBREG of a hard reg, we can see exactly which
6141 registers are being modified. Otherwise, handle normally. */
6142 if (GET_CODE (SUBREG_REG (x)) == REG
6143 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6145 unsigned int inner_regno = subreg_regno (x);
6146 unsigned int inner_endregno
6147 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6148 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6150 return endregno > inner_regno && regno < inner_endregno;
6156 if (&SET_DEST (x) != loc
6157 /* Note setting a SUBREG counts as referring to the REG it is in for
6158 a pseudo but not for hard registers since we can
6159 treat each word individually. */
6160 && ((GET_CODE (SET_DEST (x)) == SUBREG
6161 && loc != &SUBREG_REG (SET_DEST (x))
6162 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
6163 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6164 && refers_to_regno_for_reload_p (regno, endregno,
6165 SUBREG_REG (SET_DEST (x)),
6167 /* If the output is an earlyclobber operand, this is
6169 || ((GET_CODE (SET_DEST (x)) != REG
6170 || earlyclobber_operand_p (SET_DEST (x)))
6171 && refers_to_regno_for_reload_p (regno, endregno,
6172 SET_DEST (x), loc))))
6175 if (code == CLOBBER || loc == &SET_SRC (x))
6184 /* X does not match, so try its subexpressions. */
6186 fmt = GET_RTX_FORMAT (code);
6187 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6189 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6197 if (refers_to_regno_for_reload_p (regno, endregno,
6201 else if (fmt[i] == 'E')
6204 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6205 if (loc != &XVECEXP (x, i, j)
6206 && refers_to_regno_for_reload_p (regno, endregno,
6207 XVECEXP (x, i, j), loc))
6214 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6215 we check if any register number in X conflicts with the relevant register
6216 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6217 contains a MEM (we don't bother checking for memory addresses that can't
6218 conflict because we expect this to be a rare case.
6220 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6221 that we look at equivalences for pseudos that didn't get hard registers. */
6224 reg_overlap_mentioned_for_reload_p (x, in)
6227 int regno, endregno;
6229 /* Overly conservative. */
6230 if (GET_CODE (x) == STRICT_LOW_PART
6231 || GET_RTX_CLASS (GET_CODE (x)) == 'a')
6234 /* If either argument is a constant, then modifying X can not affect IN. */
6235 if (CONSTANT_P (x) || CONSTANT_P (in))
6237 else if (GET_CODE (x) == SUBREG)
6239 regno = REGNO (SUBREG_REG (x));
6240 if (regno < FIRST_PSEUDO_REGISTER)
6241 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6242 GET_MODE (SUBREG_REG (x)),
6246 else if (GET_CODE (x) == REG)
6250 /* If this is a pseudo, it must not have been assigned a hard register.
6251 Therefore, it must either be in memory or be a constant. */
6253 if (regno >= FIRST_PSEUDO_REGISTER)
6255 if (reg_equiv_memory_loc[regno])
6256 return refers_to_mem_for_reload_p (in);
6257 else if (reg_equiv_constant[regno])
6262 else if (GET_CODE (x) == MEM)
6263 return refers_to_mem_for_reload_p (in);
6264 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6265 || GET_CODE (x) == CC0)
6266 return reg_mentioned_p (x, in);
6267 else if (GET_CODE (x) == PLUS)
6268 return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6269 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6273 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6274 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6276 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6279 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6283 refers_to_mem_for_reload_p (x)
6289 if (GET_CODE (x) == MEM)
6292 if (GET_CODE (x) == REG)
6293 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6294 && reg_equiv_memory_loc[REGNO (x)]);
6296 fmt = GET_RTX_FORMAT (GET_CODE (x));
6297 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6299 && (GET_CODE (XEXP (x, i)) == MEM
6300 || refers_to_mem_for_reload_p (XEXP (x, i))))
6306 /* Check the insns before INSN to see if there is a suitable register
6307 containing the same value as GOAL.
6308 If OTHER is -1, look for a register in class CLASS.
6309 Otherwise, just see if register number OTHER shares GOAL's value.
6311 Return an rtx for the register found, or zero if none is found.
6313 If RELOAD_REG_P is (short *)1,
6314 we reject any hard reg that appears in reload_reg_rtx
6315 because such a hard reg is also needed coming into this insn.
6317 If RELOAD_REG_P is any other nonzero value,
6318 it is a vector indexed by hard reg number
6319 and we reject any hard reg whose element in the vector is nonnegative
6320 as well as any that appears in reload_reg_rtx.
6322 If GOAL is zero, then GOALREG is a register number; we look
6323 for an equivalent for that register.
6325 MODE is the machine mode of the value we want an equivalence for.
6326 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6328 This function is used by jump.c as well as in the reload pass.
6330 If GOAL is the sum of the stack pointer and a constant, we treat it
6331 as if it were a constant except that sp is required to be unchanging. */
6334 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
6337 enum reg_class class;
6339 short *reload_reg_p;
6341 enum machine_mode mode;
6344 rtx goaltry, valtry, value, where;
6350 int goal_mem_addr_varies = 0;
6351 int need_stable_sp = 0;
6357 else if (GET_CODE (goal) == REG)
6358 regno = REGNO (goal);
6359 else if (GET_CODE (goal) == MEM)
6361 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6362 if (MEM_VOLATILE_P (goal))
6364 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
6366 /* An address with side effects must be reexecuted. */
6381 else if (CONSTANT_P (goal))
6383 else if (GET_CODE (goal) == PLUS
6384 && XEXP (goal, 0) == stack_pointer_rtx
6385 && CONSTANT_P (XEXP (goal, 1)))
6386 goal_const = need_stable_sp = 1;
6387 else if (GET_CODE (goal) == PLUS
6388 && XEXP (goal, 0) == frame_pointer_rtx
6389 && CONSTANT_P (XEXP (goal, 1)))
6394 /* Scan insns back from INSN, looking for one that copies
6395 a value into or out of GOAL.
6396 Stop and give up if we reach a label. */
6401 if (p == 0 || GET_CODE (p) == CODE_LABEL)
6404 if (GET_CODE (p) == INSN
6405 /* If we don't want spill regs ... */
6406 && (! (reload_reg_p != 0
6407 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6408 /* ... then ignore insns introduced by reload; they aren't
6409 useful and can cause results in reload_as_needed to be
6410 different from what they were when calculating the need for
6411 spills. If we notice an input-reload insn here, we will
6412 reject it below, but it might hide a usable equivalent.
6413 That makes bad code. It may even abort: perhaps no reg was
6414 spilled for this insn because it was assumed we would find
6416 || INSN_UID (p) < reload_first_uid))
6419 pat = single_set (p);
6421 /* First check for something that sets some reg equal to GOAL. */
6424 && true_regnum (SET_SRC (pat)) == regno
6425 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6428 && true_regnum (SET_DEST (pat)) == regno
6429 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6431 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6432 /* When looking for stack pointer + const,
6433 make sure we don't use a stack adjust. */
6434 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6435 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6437 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6438 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6440 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6441 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6442 /* If we are looking for a constant,
6443 and something equivalent to that constant was copied
6444 into a reg, we can use that reg. */
6445 || (goal_const && REG_NOTES (p) != 0
6446 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6447 && ((rtx_equal_p (XEXP (tem, 0), goal)
6449 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6450 || (GET_CODE (SET_DEST (pat)) == REG
6451 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6452 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6454 && GET_CODE (goal) == CONST_INT
6456 = operand_subword (XEXP (tem, 0), 0, 0,
6458 && rtx_equal_p (goal, goaltry)
6460 = operand_subword (SET_DEST (pat), 0, 0,
6462 && (valueno = true_regnum (valtry)) >= 0)))
6463 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6465 && GET_CODE (SET_DEST (pat)) == REG
6466 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6467 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6469 && GET_CODE (goal) == CONST_INT
6470 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6472 && rtx_equal_p (goal, goaltry)
6474 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6475 && (valueno = true_regnum (valtry)) >= 0)))
6479 if (valueno != other)
6482 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6488 for (i = HARD_REGNO_NREGS (valueno, mode) - 1; i >= 0; i--)
6489 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6502 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6503 (or copying VALUE into GOAL, if GOAL is also a register).
6504 Now verify that VALUE is really valid. */
6506 /* VALUENO is the register number of VALUE; a hard register. */
6508 /* Don't try to re-use something that is killed in this insn. We want
6509 to be able to trust REG_UNUSED notes. */
6510 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6513 /* If we propose to get the value from the stack pointer or if GOAL is
6514 a MEM based on the stack pointer, we need a stable SP. */
6515 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6516 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6520 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6521 if (GET_MODE (value) != mode)
6524 /* Reject VALUE if it was loaded from GOAL
6525 and is also a register that appears in the address of GOAL. */
6527 if (goal_mem && value == SET_DEST (single_set (where))
6528 && refers_to_regno_for_reload_p (valueno,
6530 + HARD_REGNO_NREGS (valueno, mode)),
6534 /* Reject registers that overlap GOAL. */
6536 if (!goal_mem && !goal_const
6537 && regno + (int) HARD_REGNO_NREGS (regno, mode) > valueno
6538 && regno < valueno + (int) HARD_REGNO_NREGS (valueno, mode))
6541 nregs = HARD_REGNO_NREGS (regno, mode);
6542 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6544 /* Reject VALUE if it is one of the regs reserved for reloads.
6545 Reload1 knows how to reuse them anyway, and it would get
6546 confused if we allocated one without its knowledge.
6547 (Now that insns introduced by reload are ignored above,
6548 this case shouldn't happen, but I'm not positive.) */
6550 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6553 for (i = 0; i < valuenregs; ++i)
6554 if (reload_reg_p[valueno + i] >= 0)
6558 /* Reject VALUE if it is a register being used for an input reload
6559 even if it is not one of those reserved. */
6561 if (reload_reg_p != 0)
6564 for (i = 0; i < n_reloads; i++)
6565 if (rld[i].reg_rtx != 0 && rld[i].in)
6567 int regno1 = REGNO (rld[i].reg_rtx);
6568 int nregs1 = HARD_REGNO_NREGS (regno1,
6569 GET_MODE (rld[i].reg_rtx));
6570 if (regno1 < valueno + valuenregs
6571 && regno1 + nregs1 > valueno)
6577 /* We must treat frame pointer as varying here,
6578 since it can vary--in a nonlocal goto as generated by expand_goto. */
6579 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6581 /* Now verify that the values of GOAL and VALUE remain unaltered
6582 until INSN is reached. */
6591 /* Don't trust the conversion past a function call
6592 if either of the two is in a call-clobbered register, or memory. */
6593 if (GET_CODE (p) == CALL_INSN)
6597 if (goal_mem || need_stable_sp)
6600 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6601 for (i = 0; i < nregs; ++i)
6602 if (call_used_regs[regno + i])
6605 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6606 for (i = 0; i < valuenregs; ++i)
6607 if (call_used_regs[valueno + i])
6609 #ifdef NON_SAVING_SETJMP
6610 if (NON_SAVING_SETJMP && find_reg_note (p, REG_SETJMP, NULL))
6619 /* Watch out for unspec_volatile, and volatile asms. */
6620 if (volatile_insn_p (pat))
6623 /* If this insn P stores in either GOAL or VALUE, return 0.
6624 If GOAL is a memory ref and this insn writes memory, return 0.
6625 If GOAL is a memory ref and its address is not constant,
6626 and this insn P changes a register used in GOAL, return 0. */
6628 if (GET_CODE (pat) == COND_EXEC)
6629 pat = COND_EXEC_CODE (pat);
6630 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6632 rtx dest = SET_DEST (pat);
6633 while (GET_CODE (dest) == SUBREG
6634 || GET_CODE (dest) == ZERO_EXTRACT
6635 || GET_CODE (dest) == SIGN_EXTRACT
6636 || GET_CODE (dest) == STRICT_LOW_PART)
6637 dest = XEXP (dest, 0);
6638 if (GET_CODE (dest) == REG)
6640 int xregno = REGNO (dest);
6642 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6643 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6646 if (xregno < regno + nregs && xregno + xnregs > regno)
6648 if (xregno < valueno + valuenregs
6649 && xregno + xnregs > valueno)
6651 if (goal_mem_addr_varies
6652 && reg_overlap_mentioned_for_reload_p (dest, goal))
6654 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6657 else if (goal_mem && GET_CODE (dest) == MEM
6658 && ! push_operand (dest, GET_MODE (dest)))
6660 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6661 && reg_equiv_memory_loc[regno] != 0)
6663 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6666 else if (GET_CODE (pat) == PARALLEL)
6669 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6671 rtx v1 = XVECEXP (pat, 0, i);
6672 if (GET_CODE (v1) == COND_EXEC)
6673 v1 = COND_EXEC_CODE (v1);
6674 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6676 rtx dest = SET_DEST (v1);
6677 while (GET_CODE (dest) == SUBREG
6678 || GET_CODE (dest) == ZERO_EXTRACT
6679 || GET_CODE (dest) == SIGN_EXTRACT
6680 || GET_CODE (dest) == STRICT_LOW_PART)
6681 dest = XEXP (dest, 0);
6682 if (GET_CODE (dest) == REG)
6684 int xregno = REGNO (dest);
6686 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6687 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6690 if (xregno < regno + nregs
6691 && xregno + xnregs > regno)
6693 if (xregno < valueno + valuenregs
6694 && xregno + xnregs > valueno)
6696 if (goal_mem_addr_varies
6697 && reg_overlap_mentioned_for_reload_p (dest,
6700 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6703 else if (goal_mem && GET_CODE (dest) == MEM
6704 && ! push_operand (dest, GET_MODE (dest)))
6706 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6707 && reg_equiv_memory_loc[regno] != 0)
6709 else if (need_stable_sp
6710 && push_operand (dest, GET_MODE (dest)))
6716 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
6720 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6721 link = XEXP (link, 1))
6723 pat = XEXP (link, 0);
6724 if (GET_CODE (pat) == CLOBBER)
6726 rtx dest = SET_DEST (pat);
6728 if (GET_CODE (dest) == REG)
6730 int xregno = REGNO (dest);
6732 = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6734 if (xregno < regno + nregs
6735 && xregno + xnregs > regno)
6737 else if (xregno < valueno + valuenregs
6738 && xregno + xnregs > valueno)
6740 else if (goal_mem_addr_varies
6741 && reg_overlap_mentioned_for_reload_p (dest,
6746 else if (goal_mem && GET_CODE (dest) == MEM
6747 && ! push_operand (dest, GET_MODE (dest)))
6749 else if (need_stable_sp
6750 && push_operand (dest, GET_MODE (dest)))
6757 /* If this insn auto-increments or auto-decrements
6758 either regno or valueno, return 0 now.
6759 If GOAL is a memory ref and its address is not constant,
6760 and this insn P increments a register used in GOAL, return 0. */
6764 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6765 if (REG_NOTE_KIND (link) == REG_INC
6766 && GET_CODE (XEXP (link, 0)) == REG)
6768 int incno = REGNO (XEXP (link, 0));
6769 if (incno < regno + nregs && incno >= regno)
6771 if (incno < valueno + valuenregs && incno >= valueno)
6773 if (goal_mem_addr_varies
6774 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6784 /* Find a place where INCED appears in an increment or decrement operator
6785 within X, and return the amount INCED is incremented or decremented by.
6786 The value is always positive. */
6789 find_inc_amount (x, inced)
6792 enum rtx_code code = GET_CODE (x);
6798 rtx addr = XEXP (x, 0);
6799 if ((GET_CODE (addr) == PRE_DEC
6800 || GET_CODE (addr) == POST_DEC
6801 || GET_CODE (addr) == PRE_INC
6802 || GET_CODE (addr) == POST_INC)
6803 && XEXP (addr, 0) == inced)
6804 return GET_MODE_SIZE (GET_MODE (x));
6805 else if ((GET_CODE (addr) == PRE_MODIFY
6806 || GET_CODE (addr) == POST_MODIFY)
6807 && GET_CODE (XEXP (addr, 1)) == PLUS
6808 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
6809 && XEXP (addr, 0) == inced
6810 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
6812 i = INTVAL (XEXP (XEXP (addr, 1), 1));
6813 return i < 0 ? -i : i;
6817 fmt = GET_RTX_FORMAT (code);
6818 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6822 int tem = find_inc_amount (XEXP (x, i), inced);
6829 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6831 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6841 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6842 If SETS is nonzero, also consider SETs. */
6845 regno_clobbered_p (regno, insn, mode, sets)
6848 enum machine_mode mode;
6851 unsigned int nregs = HARD_REGNO_NREGS (regno, mode);
6852 unsigned int endregno = regno + nregs;
6854 if ((GET_CODE (PATTERN (insn)) == CLOBBER
6855 || (sets && GET_CODE (PATTERN (insn)) == SET))
6856 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6858 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
6860 return test >= regno && test < endregno;
6863 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6865 int i = XVECLEN (PATTERN (insn), 0) - 1;
6869 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6870 if ((GET_CODE (elt) == CLOBBER
6871 || (sets && GET_CODE (PATTERN (insn)) == SET))
6872 && GET_CODE (XEXP (elt, 0)) == REG)
6874 unsigned int test = REGNO (XEXP (elt, 0));
6876 if (test >= regno && test < endregno)
6885 static const char *const reload_when_needed_name[] =
6888 "RELOAD_FOR_OUTPUT",
6890 "RELOAD_FOR_INPUT_ADDRESS",
6891 "RELOAD_FOR_INPADDR_ADDRESS",
6892 "RELOAD_FOR_OUTPUT_ADDRESS",
6893 "RELOAD_FOR_OUTADDR_ADDRESS",
6894 "RELOAD_FOR_OPERAND_ADDRESS",
6895 "RELOAD_FOR_OPADDR_ADDR",
6897 "RELOAD_FOR_OTHER_ADDRESS"
6900 static const char * const reg_class_names[] = REG_CLASS_NAMES;
6902 /* These functions are used to print the variables set by 'find_reloads' */
6905 debug_reload_to_stream (f)
6913 for (r = 0; r < n_reloads; r++)
6915 fprintf (f, "Reload %d: ", r);
6919 fprintf (f, "reload_in (%s) = ",
6920 GET_MODE_NAME (rld[r].inmode));
6921 print_inline_rtx (f, rld[r].in, 24);
6922 fprintf (f, "\n\t");
6925 if (rld[r].out != 0)
6927 fprintf (f, "reload_out (%s) = ",
6928 GET_MODE_NAME (rld[r].outmode));
6929 print_inline_rtx (f, rld[r].out, 24);
6930 fprintf (f, "\n\t");
6933 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
6935 fprintf (f, "%s (opnum = %d)",
6936 reload_when_needed_name[(int) rld[r].when_needed],
6939 if (rld[r].optional)
6940 fprintf (f, ", optional");
6942 if (rld[r].nongroup)
6943 fprintf (f, ", nongroup");
6945 if (rld[r].inc != 0)
6946 fprintf (f, ", inc by %d", rld[r].inc);
6948 if (rld[r].nocombine)
6949 fprintf (f, ", can't combine");
6951 if (rld[r].secondary_p)
6952 fprintf (f, ", secondary_reload_p");
6954 if (rld[r].in_reg != 0)
6956 fprintf (f, "\n\treload_in_reg: ");
6957 print_inline_rtx (f, rld[r].in_reg, 24);
6960 if (rld[r].out_reg != 0)
6962 fprintf (f, "\n\treload_out_reg: ");
6963 print_inline_rtx (f, rld[r].out_reg, 24);
6966 if (rld[r].reg_rtx != 0)
6968 fprintf (f, "\n\treload_reg_rtx: ");
6969 print_inline_rtx (f, rld[r].reg_rtx, 24);
6973 if (rld[r].secondary_in_reload != -1)
6975 fprintf (f, "%ssecondary_in_reload = %d",
6976 prefix, rld[r].secondary_in_reload);
6980 if (rld[r].secondary_out_reload != -1)
6981 fprintf (f, "%ssecondary_out_reload = %d\n",
6982 prefix, rld[r].secondary_out_reload);
6985 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
6987 fprintf (f, "%ssecondary_in_icode = %s", prefix,
6988 insn_data[rld[r].secondary_in_icode].name);
6992 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
6993 fprintf (f, "%ssecondary_out_icode = %s", prefix,
6994 insn_data[rld[r].secondary_out_icode].name);
7003 debug_reload_to_stream (stderr);