1 /* Move registers around to reduce number of move instructions needed.
2 Copyright (C) 1987, 88, 89, 92-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This module looks for cases where matching constraints would force
23 an instruction to need a reload, and this reload would be a register
24 to register move. It then attempts to change the registers used by the
25 instruction to avoid the move instruction. */
29 #include "rtl.h" /* stdio.h must precede rtl.h for FFS. */
31 #include "insn-config.h"
36 #include "hard-reg-set.h"
40 #include "insn-flags.h"
41 #include "basic-block.h"
44 static int optimize_reg_copy_1 PROTO((rtx, rtx, rtx));
45 static void optimize_reg_copy_2 PROTO((rtx, rtx, rtx));
46 static void optimize_reg_copy_3 PROTO((rtx, rtx, rtx));
47 static rtx gen_add3_insn PROTO((rtx, rtx, rtx));
48 static void copy_src_to_dest PROTO((rtx, rtx, rtx, int));
49 static int *regmove_bb_head;
52 int with[MAX_RECOG_OPERANDS];
53 enum { READ, WRITE, READWRITE } use[MAX_RECOG_OPERANDS];
54 int commutative[MAX_RECOG_OPERANDS];
55 int early_clobber[MAX_RECOG_OPERANDS];
58 static rtx discover_flags_reg PROTO((void));
59 static void mark_flags_life_zones PROTO((rtx));
60 static void flags_set_1 PROTO((rtx, rtx, void *));
62 static int try_auto_increment PROTO((rtx, rtx, rtx, rtx, HOST_WIDE_INT, int));
63 static int find_matches PROTO((rtx, struct match *));
64 static int fixup_match_1 PROTO((rtx, rtx, rtx, rtx, rtx, int, int, int, FILE *))
66 static int reg_is_remote_constant_p PROTO((rtx, rtx, rtx));
67 static int stable_and_no_regs_but_for_p PROTO((rtx, rtx, rtx));
68 static int regclass_compatible_p PROTO((int, int));
69 static int replacement_quality PROTO((rtx));
70 static int fixup_match_2 PROTO((rtx, rtx, rtx, rtx, FILE *));
72 /* Return non-zero if registers with CLASS1 and CLASS2 can be merged without
73 causing too much register allocation problems. */
75 regclass_compatible_p (class0, class1)
78 return (class0 == class1
79 || (reg_class_subset_p (class0, class1)
80 && ! CLASS_LIKELY_SPILLED_P (class0))
81 || (reg_class_subset_p (class1, class0)
82 && ! CLASS_LIKELY_SPILLED_P (class1)));
85 /* Generate and return an insn body to add r1 and c,
86 storing the result in r0. */
88 gen_add3_insn (r0, r1, c)
91 int icode = (int) add_optab->handlers[(int) GET_MODE (r0)].insn_code;
93 if (icode == CODE_FOR_nothing
94 || ! ((*insn_data[icode].operand[0].predicate)
95 (r0, insn_data[icode].operand[0].mode))
96 || ! ((*insn_data[icode].operand[1].predicate)
97 (r1, insn_data[icode].operand[1].mode))
98 || ! ((*insn_data[icode].operand[2].predicate)
99 (c, insn_data[icode].operand[2].mode)))
102 return (GEN_FCN (icode) (r0, r1, c));
106 /* INC_INSN is an instruction that adds INCREMENT to REG.
107 Try to fold INC_INSN as a post/pre in/decrement into INSN.
108 Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src.
109 Return nonzero for success. */
111 try_auto_increment (insn, inc_insn, inc_insn_set, reg, increment, pre)
112 rtx reg, insn, inc_insn ,inc_insn_set;
113 HOST_WIDE_INT increment;
116 enum rtx_code inc_code;
118 rtx pset = single_set (insn);
121 /* Can't use the size of SET_SRC, we might have something like
122 (sign_extend:SI (mem:QI ... */
123 rtx use = find_use_as_address (pset, reg, 0);
124 if (use != 0 && use != (rtx) 1)
126 int size = GET_MODE_SIZE (GET_MODE (use));
128 || (HAVE_POST_INCREMENT
129 && pre == 0 && (inc_code = POST_INC, increment == size))
130 || (HAVE_PRE_INCREMENT
131 && pre == 1 && (inc_code = PRE_INC, increment == size))
132 || (HAVE_POST_DECREMENT
133 && pre == 0 && (inc_code = POST_DEC, increment == -size))
134 || (HAVE_PRE_DECREMENT
135 && pre == 1 && (inc_code = PRE_DEC, increment == -size))
141 &SET_SRC (inc_insn_set),
142 XEXP (SET_SRC (inc_insn_set), 0), 1);
143 validate_change (insn, &XEXP (use, 0),
144 gen_rtx_fmt_e (inc_code, Pmode, reg), 1);
145 if (apply_change_group ())
148 = gen_rtx_EXPR_LIST (REG_INC,
149 reg, REG_NOTES (insn));
152 PUT_CODE (inc_insn, NOTE);
153 NOTE_LINE_NUMBER (inc_insn) = NOTE_INSN_DELETED;
154 NOTE_SOURCE_FILE (inc_insn) = 0;
164 /* Determine if the pattern generated by add_optab has a clobber,
165 such as might be issued for a flags hard register. To make the
166 code elsewhere simpler, we handle cc0 in this same framework.
168 Return the register if one was discovered. Return NULL_RTX if
169 if no flags were found. Return pc_rtx if we got confused. */
172 discover_flags_reg ()
175 tmp = gen_rtx_REG (word_mode, 10000);
176 tmp = gen_add3_insn (tmp, tmp, GEN_INT (2));
178 /* If we get something that isn't a simple set, or a
179 [(set ..) (clobber ..)], this whole function will go wrong. */
180 if (GET_CODE (tmp) == SET)
182 else if (GET_CODE (tmp) == PARALLEL)
186 if (XVECLEN (tmp, 0) != 2)
188 tmp = XVECEXP (tmp, 0, 1);
189 if (GET_CODE (tmp) != CLOBBER)
193 /* Don't do anything foolish if the md wanted to clobber a
194 scratch or something. We only care about hard regs.
195 Moreover we don't like the notion of subregs of hard regs. */
196 if (GET_CODE (tmp) == SUBREG
197 && GET_CODE (SUBREG_REG (tmp)) == REG
198 && REGNO (SUBREG_REG (tmp)) < FIRST_PSEUDO_REGISTER)
200 found = (GET_CODE (tmp) == REG && REGNO (tmp) < FIRST_PSEUDO_REGISTER);
202 return (found ? tmp : NULL_RTX);
208 /* It is a tedious task identifying when the flags register is live and
209 when it is safe to optimize. Since we process the instruction stream
210 multiple times, locate and record these live zones by marking the
211 mode of the instructions --
213 QImode is used on the instruction at which the flags becomes live.
215 HImode is used within the range (exclusive) that the flags are
216 live. Thus the user of the flags is not marked.
218 All other instructions are cleared to VOIDmode. */
220 /* Used to communicate with flags_set_1. */
221 static rtx flags_set_1_rtx;
222 static int flags_set_1_set;
225 mark_flags_life_zones (flags)
233 /* If we found a flags register on a cc0 host, bail. */
234 if (flags == NULL_RTX)
236 else if (flags != cc0_rtx)
240 /* Simple cases first: if no flags, clear all modes. If confusing,
241 mark the entire function as being in a flags shadow. */
242 if (flags == NULL_RTX || flags == pc_rtx)
244 enum machine_mode mode = (flags ? HImode : VOIDmode);
246 for (insn = get_insns(); insn; insn = NEXT_INSN (insn))
247 PUT_MODE (insn, mode);
255 flags_regno = REGNO (flags);
256 flags_nregs = HARD_REGNO_NREGS (flags_regno, GET_MODE (flags));
258 flags_set_1_rtx = flags;
260 /* Process each basic block. */
261 for (block = n_basic_blocks - 1; block >= 0; block--)
266 insn = BLOCK_HEAD (block);
267 end = BLOCK_END (block);
269 /* Look out for the (unlikely) case of flags being live across
270 basic block boundaries. */
275 for (i = 0; i < flags_nregs; ++i)
276 live |= REGNO_REG_SET_P (BASIC_BLOCK (block)->global_live_at_start,
283 /* Process liveness in reverse order of importance --
284 alive, death, birth. This lets more important info
285 overwrite the mode of lesser info. */
287 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
290 /* In the cc0 case, death is not marked in reg notes,
291 but is instead the mere use of cc0 when it is alive. */
292 if (live && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
295 /* In the hard reg case, we watch death notes. */
296 if (live && find_regno_note (insn, REG_DEAD, flags_regno))
299 PUT_MODE (insn, (live ? HImode : VOIDmode));
301 /* In either case, birth is denoted simply by it's presence
302 as the destination of a set. */
304 note_stores (PATTERN (insn), flags_set_1, NULL);
308 PUT_MODE (insn, QImode);
312 PUT_MODE (insn, (live ? HImode : VOIDmode));
316 insn = NEXT_INSN (insn);
321 /* A subroutine of mark_flags_life_zones, called through note_stores. */
324 flags_set_1 (x, pat, data)
326 void *data ATTRIBUTE_UNUSED;
328 if (GET_CODE (pat) == SET
329 && reg_overlap_mentioned_p (x, flags_set_1_rtx))
333 static int *regno_src_regno;
335 /* Indicate how good a choice REG (which appears as a source) is to replace
336 a destination register with. The higher the returned value, the better
337 the choice. The main objective is to avoid using a register that is
338 a candidate for tying to a hard register, since the output might in
339 turn be a candidate to be tied to a different hard register. */
341 replacement_quality(reg)
346 /* Bad if this isn't a register at all. */
347 if (GET_CODE (reg) != REG)
350 /* If this register is not meant to get a hard register,
351 it is a poor choice. */
352 if (REG_LIVE_LENGTH (REGNO (reg)) < 0)
355 src_regno = regno_src_regno[REGNO (reg)];
357 /* If it was not copied from another register, it is fine. */
361 /* Copied from a hard register? */
362 if (src_regno < FIRST_PSEUDO_REGISTER)
365 /* Copied from a pseudo register - not as bad as from a hard register,
366 yet still cumbersome, since the register live length will be lengthened
367 when the registers get tied. */
371 /* INSN is a copy from SRC to DEST, both registers, and SRC does not die
374 Search forward to see if SRC dies before either it or DEST is modified,
375 but don't scan past the end of a basic block. If so, we can replace SRC
376 with DEST and let SRC die in INSN.
378 This will reduce the number of registers live in that range and may enable
379 DEST to be tied to SRC, thus often saving one register in addition to a
380 register-register copy. */
383 optimize_reg_copy_1 (insn, dest, src)
391 int sregno = REGNO (src);
392 int dregno = REGNO (dest);
394 /* We don't want to mess with hard regs if register classes are small. */
396 || (SMALL_REGISTER_CLASSES
397 && (sregno < FIRST_PSEUDO_REGISTER
398 || dregno < FIRST_PSEUDO_REGISTER))
399 /* We don't see all updates to SP if they are in an auto-inc memory
400 reference, so we must disallow this optimization on them. */
401 || sregno == STACK_POINTER_REGNUM || dregno == STACK_POINTER_REGNUM)
404 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
406 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
407 || (GET_CODE (p) == NOTE
408 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
409 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
412 /* ??? We can't scan past the end of a basic block without updating
413 the register lifetime info (REG_DEAD/basic_block_live_at_start).
414 A CALL_INSN might be the last insn of a basic block, if it is inside
415 an EH region. There is no easy way to tell, so we just always break
416 when we see a CALL_INSN if flag_exceptions is nonzero. */
417 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
420 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
423 if (reg_set_p (src, p) || reg_set_p (dest, p)
424 /* Don't change a USE of a register. */
425 || (GET_CODE (PATTERN (p)) == USE
426 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0))))
429 /* See if all of SRC dies in P. This test is slightly more
430 conservative than it needs to be. */
431 if ((note = find_regno_note (p, REG_DEAD, sregno)) != 0
432 && GET_MODE (XEXP (note, 0)) == GET_MODE (src))
440 /* We can do the optimization. Scan forward from INSN again,
441 replacing regs as we go. Set FAILED if a replacement can't
442 be done. In that case, we can't move the death note for SRC.
443 This should be rare. */
445 /* Set to stop at next insn. */
446 for (q = next_real_insn (insn);
447 q != next_real_insn (p);
448 q = next_real_insn (q))
450 if (reg_overlap_mentioned_p (src, PATTERN (q)))
452 /* If SRC is a hard register, we might miss some
453 overlapping registers with validate_replace_rtx,
454 so we would have to undo it. We can't if DEST is
455 present in the insn, so fail in that combination
457 if (sregno < FIRST_PSEUDO_REGISTER
458 && reg_mentioned_p (dest, PATTERN (q)))
461 /* Replace all uses and make sure that the register
462 isn't still present. */
463 else if (validate_replace_rtx (src, dest, q)
464 && (sregno >= FIRST_PSEUDO_REGISTER
465 || ! reg_overlap_mentioned_p (src,
470 validate_replace_rtx (dest, src, q);
475 /* For SREGNO, count the total number of insns scanned.
476 For DREGNO, count the total number of insns scanned after
477 passing the death note for DREGNO. */
482 /* If the insn in which SRC dies is a CALL_INSN, don't count it
483 as a call that has been crossed. Otherwise, count it. */
484 if (q != p && GET_CODE (q) == CALL_INSN)
486 /* Similarly, total calls for SREGNO, total calls beyond
487 the death note for DREGNO. */
493 /* If DEST dies here, remove the death note and save it for
494 later. Make sure ALL of DEST dies here; again, this is
495 overly conservative. */
497 && (dest_death = find_regno_note (q, REG_DEAD, dregno)) != 0)
499 if (GET_MODE (XEXP (dest_death, 0)) != GET_MODE (dest))
500 failed = 1, dest_death = 0;
502 remove_note (q, dest_death);
508 /* These counters need to be updated if and only if we are
509 going to move the REG_DEAD note. */
510 if (sregno >= FIRST_PSEUDO_REGISTER)
512 if (REG_LIVE_LENGTH (sregno) >= 0)
514 REG_LIVE_LENGTH (sregno) -= s_length;
515 /* REG_LIVE_LENGTH is only an approximation after
516 combine if sched is not run, so make sure that we
517 still have a reasonable value. */
518 if (REG_LIVE_LENGTH (sregno) < 2)
519 REG_LIVE_LENGTH (sregno) = 2;
522 REG_N_CALLS_CROSSED (sregno) -= s_n_calls;
525 /* Move death note of SRC from P to INSN. */
526 remove_note (p, note);
527 XEXP (note, 1) = REG_NOTES (insn);
528 REG_NOTES (insn) = note;
531 /* Put death note of DEST on P if we saw it die. */
534 XEXP (dest_death, 1) = REG_NOTES (p);
535 REG_NOTES (p) = dest_death;
537 if (dregno >= FIRST_PSEUDO_REGISTER)
539 /* If and only if we are moving the death note for DREGNO,
540 then we need to update its counters. */
541 if (REG_LIVE_LENGTH (dregno) >= 0)
542 REG_LIVE_LENGTH (dregno) += d_length;
543 REG_N_CALLS_CROSSED (dregno) += d_n_calls;
550 /* If SRC is a hard register which is set or killed in some other
551 way, we can't do this optimization. */
552 else if (sregno < FIRST_PSEUDO_REGISTER
553 && dead_or_set_p (p, src))
559 /* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have
560 a sequence of insns that modify DEST followed by an insn that sets
561 SRC to DEST in which DEST dies, with no prior modification of DEST.
562 (There is no need to check if the insns in between actually modify
563 DEST. We should not have cases where DEST is not modified, but
564 the optimization is safe if no such modification is detected.)
565 In that case, we can replace all uses of DEST, starting with INSN and
566 ending with the set of SRC to DEST, with SRC. We do not do this
567 optimization if a CALL_INSN is crossed unless SRC already crosses a
568 call or if DEST dies before the copy back to SRC.
570 It is assumed that DEST and SRC are pseudos; it is too complicated to do
571 this for hard registers since the substitutions we may make might fail. */
574 optimize_reg_copy_2 (insn, dest, src)
581 int sregno = REGNO (src);
582 int dregno = REGNO (dest);
584 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
586 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
587 || (GET_CODE (p) == NOTE
588 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
589 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
592 /* ??? We can't scan past the end of a basic block without updating
593 the register lifetime info (REG_DEAD/basic_block_live_at_start).
594 A CALL_INSN might be the last insn of a basic block, if it is inside
595 an EH region. There is no easy way to tell, so we just always break
596 when we see a CALL_INSN if flag_exceptions is nonzero. */
597 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
600 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
603 set = single_set (p);
604 if (set && SET_SRC (set) == dest && SET_DEST (set) == src
605 && find_reg_note (p, REG_DEAD, dest))
607 /* We can do the optimization. Scan forward from INSN again,
608 replacing regs as we go. */
610 /* Set to stop at next insn. */
611 for (q = insn; q != NEXT_INSN (p); q = NEXT_INSN (q))
612 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
614 if (reg_mentioned_p (dest, PATTERN (q)))
615 PATTERN (q) = replace_rtx (PATTERN (q), dest, src);
618 if (GET_CODE (q) == CALL_INSN)
620 REG_N_CALLS_CROSSED (dregno)--;
621 REG_N_CALLS_CROSSED (sregno)++;
625 remove_note (p, find_reg_note (p, REG_DEAD, dest));
626 REG_N_DEATHS (dregno)--;
627 remove_note (insn, find_reg_note (insn, REG_DEAD, src));
628 REG_N_DEATHS (sregno)--;
632 if (reg_set_p (src, p)
633 || find_reg_note (p, REG_DEAD, dest)
634 || (GET_CODE (p) == CALL_INSN && REG_N_CALLS_CROSSED (sregno) == 0))
638 /* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST.
639 Look if SRC dies there, and if it is only set once, by loading
640 it from memory. If so, try to encorporate the zero/sign extension
641 into the memory read, change SRC to the mode of DEST, and alter
642 the remaining accesses to use the appropriate SUBREG. This allows
643 SRC and DEST to be tied later. */
645 optimize_reg_copy_3 (insn, dest, src)
650 rtx src_reg = XEXP (src, 0);
651 int src_no = REGNO (src_reg);
652 int dst_no = REGNO (dest);
654 enum machine_mode old_mode;
656 if (src_no < FIRST_PSEUDO_REGISTER
657 || dst_no < FIRST_PSEUDO_REGISTER
658 || ! find_reg_note (insn, REG_DEAD, src_reg)
659 || REG_N_SETS (src_no) != 1)
661 for (p = PREV_INSN (insn); p && ! reg_set_p (src_reg, p); p = PREV_INSN (p))
663 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
664 || (GET_CODE (p) == NOTE
665 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
666 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
669 /* ??? We can't scan past the end of a basic block without updating
670 the register lifetime info (REG_DEAD/basic_block_live_at_start).
671 A CALL_INSN might be the last insn of a basic block, if it is inside
672 an EH region. There is no easy way to tell, so we just always break
673 when we see a CALL_INSN if flag_exceptions is nonzero. */
674 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
677 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
683 if (! (set = single_set (p))
684 || GET_CODE (SET_SRC (set)) != MEM
685 || SET_DEST (set) != src_reg)
688 /* Be conserative: although this optimization is also valid for
689 volatile memory references, that could cause trouble in later passes. */
690 if (MEM_VOLATILE_P (SET_SRC (set)))
693 /* Do not use a SUBREG to truncate from one mode to another if truncation
695 if (GET_MODE_BITSIZE (GET_MODE (src_reg)) <= GET_MODE_BITSIZE (GET_MODE (src))
696 && !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (src)),
697 GET_MODE_BITSIZE (GET_MODE (src_reg))))
700 old_mode = GET_MODE (src_reg);
701 PUT_MODE (src_reg, GET_MODE (src));
702 XEXP (src, 0) = SET_SRC (set);
704 /* Include this change in the group so that it's easily undone if
705 one of the changes in the group is invalid. */
706 validate_change (p, &SET_SRC (set), src, 1);
708 /* Now walk forward making additional replacements. We want to be able
709 to undo all the changes if a later substitution fails. */
710 subreg = gen_rtx_SUBREG (old_mode, src_reg, 0);
711 while (p = NEXT_INSN (p), p != insn)
713 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
716 /* Make a tenative change. */
717 validate_replace_rtx_group (src_reg, subreg, p);
720 validate_replace_rtx_group (src, src_reg, insn);
722 /* Now see if all the changes are valid. */
723 if (! apply_change_group ())
725 /* One or more changes were no good. Back out everything. */
726 PUT_MODE (src_reg, old_mode);
727 XEXP (src, 0) = src_reg;
732 /* If we were not able to update the users of src to use dest directly, try
733 instead moving the value to dest directly before the operation. */
736 copy_src_to_dest (insn, src, dest, old_max_uid)
755 /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant
756 or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is
757 parameter when there is no frame pointer that is not allocated a register.
758 For now, we just reject them, rather than incrementing the live length. */
760 if (GET_CODE (src) == REG
761 && REG_LIVE_LENGTH (REGNO (src)) > 0
762 && GET_CODE (dest) == REG
763 && REG_LIVE_LENGTH (REGNO (dest)) > 0
764 && (set = single_set (insn)) != NULL_RTX
765 && !reg_mentioned_p (dest, SET_SRC (set))
766 && GET_MODE (src) == GET_MODE (dest))
768 int old_num_regs = reg_rtx_no;
770 /* Generate the src->dest move. */
772 emit_move_insn (dest, src);
773 seq = gen_sequence ();
775 /* If this sequence uses new registers, we may not use it. */
776 if (old_num_regs != reg_rtx_no
777 || ! validate_replace_rtx (src, dest, insn))
779 /* We have to restore reg_rtx_no to its old value, lest
780 recompute_reg_usage will try to compute the usage of the
781 new regs, yet reg_n_info is not valid for them. */
782 reg_rtx_no = old_num_regs;
785 emit_insn_before (seq, insn);
786 move_insn = PREV_INSN (insn);
787 p_move_notes = ®_NOTES (move_insn);
788 p_insn_notes = ®_NOTES (insn);
790 /* Move any notes mentioning src to the move instruction */
791 for (link = REG_NOTES (insn); link != NULL_RTX; link = next)
793 next = XEXP (link, 1);
794 if (XEXP (link, 0) == src)
796 *p_move_notes = link;
797 p_move_notes = &XEXP (link, 1);
801 *p_insn_notes = link;
802 p_insn_notes = &XEXP (link, 1);
806 *p_move_notes = NULL_RTX;
807 *p_insn_notes = NULL_RTX;
809 /* Is the insn the head of a basic block? If so extend it */
810 insn_uid = INSN_UID (insn);
811 move_uid = INSN_UID (move_insn);
812 if (insn_uid < old_max_uid)
814 bb = regmove_bb_head[insn_uid];
817 BLOCK_HEAD (bb) = move_insn;
818 regmove_bb_head[insn_uid] = -1;
822 /* Update the various register tables. */
823 dest_regno = REGNO (dest);
824 REG_N_SETS (dest_regno) ++;
825 REG_LIVE_LENGTH (dest_regno)++;
826 if (REGNO_FIRST_UID (dest_regno) == insn_uid)
827 REGNO_FIRST_UID (dest_regno) = move_uid;
829 src_regno = REGNO (src);
830 if (! find_reg_note (move_insn, REG_DEAD, src))
831 REG_LIVE_LENGTH (src_regno)++;
833 if (REGNO_FIRST_UID (src_regno) == insn_uid)
834 REGNO_FIRST_UID (src_regno) = move_uid;
836 if (REGNO_LAST_UID (src_regno) == insn_uid)
837 REGNO_LAST_UID (src_regno) = move_uid;
839 if (REGNO_LAST_NOTE_UID (src_regno) == insn_uid)
840 REGNO_LAST_NOTE_UID (src_regno) = move_uid;
845 /* Return whether REG is set in only one location, and is set to a
846 constant, but is set in a different basic block from INSN (an
847 instructions which uses REG). In this case REG is equivalent to a
848 constant, and we don't want to break that equivalence, because that
849 may increase register pressure and make reload harder. If REG is
850 set in the same basic block as INSN, we don't worry about it,
851 because we'll probably need a register anyhow (??? but what if REG
852 is used in a different basic block as well as this one?). FIRST is
853 the first insn in the function. */
856 reg_is_remote_constant_p (reg, insn, first)
863 if (REG_N_SETS (REGNO (reg)) != 1)
866 /* Look for the set. */
867 for (p = LOG_LINKS (insn); p; p = XEXP (p, 1))
871 if (REG_NOTE_KIND (p) != 0)
873 s = single_set (XEXP (p, 0));
875 && GET_CODE (SET_DEST (s)) == REG
876 && REGNO (SET_DEST (s)) == REGNO (reg))
878 /* The register is set in the same basic block. */
883 for (p = first; p && p != insn; p = NEXT_INSN (p))
887 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
891 && GET_CODE (SET_DEST (s)) == REG
892 && REGNO (SET_DEST (s)) == REGNO (reg))
894 /* This is the instruction which sets REG. If there is a
895 REG_EQUAL note, then REG is equivalent to a constant. */
896 if (find_reg_note (p, REG_EQUAL, NULL_RTX))
905 /* INSN is adding a CONST_INT to a REG. We search backwards looking for
906 another add immediate instruction with the same source and dest registers,
907 and if we find one, we change INSN to an increment, and return 1. If
908 no changes are made, we return 0.
911 (set (reg100) (plus reg1 offset1))
913 (set (reg100) (plus reg1 offset2))
915 (set (reg100) (plus reg1 offset1))
917 (set (reg100) (plus reg100 offset2-offset1)) */
919 /* ??? What does this comment mean? */
920 /* cse disrupts preincrement / postdecrement squences when it finds a
921 hard register as ultimate source, like the frame pointer. */
924 fixup_match_2 (insn, dst, src, offset, regmove_dump_file)
925 rtx insn, dst, src, offset;
926 FILE *regmove_dump_file;
928 rtx p, dst_death = 0;
929 int length, num_calls = 0;
931 /* If SRC dies in INSN, we'd have to move the death note. This is
932 considered to be very unlikely, so we just skip the optimization
934 if (find_regno_note (insn, REG_DEAD, REGNO (src)))
937 /* Scan backward to find the first instruction that sets DST. */
939 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p))
943 if (GET_CODE (p) == CODE_LABEL
944 || GET_CODE (p) == JUMP_INSN
945 || (GET_CODE (p) == NOTE
946 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
947 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
950 /* ??? We can't scan past the end of a basic block without updating
951 the register lifetime info (REG_DEAD/basic_block_live_at_start).
952 A CALL_INSN might be the last insn of a basic block, if it is inside
953 an EH region. There is no easy way to tell, so we just always break
954 when we see a CALL_INSN if flag_exceptions is nonzero. */
955 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
958 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
961 if (find_regno_note (p, REG_DEAD, REGNO (dst)))
966 pset = single_set (p);
967 if (pset && SET_DEST (pset) == dst
968 && GET_CODE (SET_SRC (pset)) == PLUS
969 && XEXP (SET_SRC (pset), 0) == src
970 && GET_CODE (XEXP (SET_SRC (pset), 1)) == CONST_INT)
972 HOST_WIDE_INT newconst
973 = INTVAL (offset) - INTVAL (XEXP (SET_SRC (pset), 1));
974 rtx add = gen_add3_insn (dst, dst, GEN_INT (newconst));
976 if (add && validate_change (insn, &PATTERN (insn), add, 0))
978 /* Remove the death note for DST from DST_DEATH. */
981 remove_death (REGNO (dst), dst_death);
982 REG_LIVE_LENGTH (REGNO (dst)) += length;
983 REG_N_CALLS_CROSSED (REGNO (dst)) += num_calls;
986 if (regmove_dump_file)
987 fprintf (regmove_dump_file,
988 "Fixed operand of insn %d.\n",
992 for (p = PREV_INSN (insn); p; p = PREV_INSN (p))
994 if (GET_CODE (p) == CODE_LABEL
995 || GET_CODE (p) == JUMP_INSN
996 || (GET_CODE (p) == NOTE
997 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
998 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1000 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1002 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
1004 if (try_auto_increment (p, insn, 0, dst, newconst, 0))
1009 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
1011 if (GET_CODE (p) == CODE_LABEL
1012 || GET_CODE (p) == JUMP_INSN
1013 || (GET_CODE (p) == NOTE
1014 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1015 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1017 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1019 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
1021 try_auto_increment (p, insn, 0, dst, newconst, 1);
1030 if (reg_set_p (dst, PATTERN (p)))
1033 /* If we have passed a call instruction, and the
1034 pseudo-reg SRC is not already live across a call,
1035 then don't perform the optimization. */
1036 /* reg_set_p is overly conservative for CALL_INSNS, thinks that all
1037 hard regs are clobbered. Thus, we only use it for src for
1039 if (GET_CODE (p) == CALL_INSN)
1044 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
1047 if (call_used_regs [REGNO (dst)]
1048 || find_reg_fusage (p, CLOBBER, dst))
1051 else if (reg_set_p (src, PATTERN (p)))
1059 regmove_optimize (f, nregs, regmove_dump_file)
1062 FILE *regmove_dump_file;
1064 int old_max_uid = get_max_uid ();
1069 rtx copy_src, copy_dst;
1071 /* Find out where a potential flags register is live, and so that we
1072 can supress some optimizations in those zones. */
1073 mark_flags_life_zones (discover_flags_reg ());
1075 regno_src_regno = (int *) xmalloc (sizeof *regno_src_regno * nregs);
1076 for (i = nregs; --i >= 0; ) regno_src_regno[i] = -1;
1078 regmove_bb_head = (int *) xmalloc (sizeof (int) * (old_max_uid + 1));
1079 for (i = old_max_uid; i >= 0; i--) regmove_bb_head[i] = -1;
1080 for (i = 0; i < n_basic_blocks; i++)
1081 regmove_bb_head[INSN_UID (BLOCK_HEAD (i))] = i;
1083 /* A forward/backward pass. Replace output operands with input operands. */
1085 for (pass = 0; pass <= 2; pass++)
1087 if (! flag_regmove && pass >= flag_expensive_optimizations)
1090 if (regmove_dump_file)
1091 fprintf (regmove_dump_file, "Starting %s pass...\n",
1092 pass ? "backward" : "forward");
1094 for (insn = pass ? get_last_insn () : f; insn;
1095 insn = pass ? PREV_INSN (insn) : NEXT_INSN (insn))
1098 int op_no, match_no;
1100 set = single_set (insn);
1104 if (flag_expensive_optimizations && ! pass
1105 && (GET_CODE (SET_SRC (set)) == SIGN_EXTEND
1106 || GET_CODE (SET_SRC (set)) == ZERO_EXTEND)
1107 && GET_CODE (XEXP (SET_SRC (set), 0)) == REG
1108 && GET_CODE (SET_DEST(set)) == REG)
1109 optimize_reg_copy_3 (insn, SET_DEST (set), SET_SRC (set));
1111 if (flag_expensive_optimizations && ! pass
1112 && GET_CODE (SET_SRC (set)) == REG
1113 && GET_CODE (SET_DEST(set)) == REG)
1115 /* If this is a register-register copy where SRC is not dead,
1116 see if we can optimize it. If this optimization succeeds,
1117 it will become a copy where SRC is dead. */
1118 if ((find_reg_note (insn, REG_DEAD, SET_SRC (set))
1119 || optimize_reg_copy_1 (insn, SET_DEST (set), SET_SRC (set)))
1120 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER)
1122 /* Similarly for a pseudo-pseudo copy when SRC is dead. */
1123 if (REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER)
1124 optimize_reg_copy_2 (insn, SET_DEST (set), SET_SRC (set));
1125 if (regno_src_regno[REGNO (SET_DEST (set))] < 0
1126 && SET_SRC (set) != SET_DEST (set))
1128 int srcregno = REGNO (SET_SRC(set));
1129 if (regno_src_regno[srcregno] >= 0)
1130 srcregno = regno_src_regno[srcregno];
1131 regno_src_regno[REGNO (SET_DEST (set))] = srcregno;
1138 if (! find_matches (insn, &match))
1141 /* Now scan through the operands looking for a source operand
1142 which is supposed to match the destination operand.
1143 Then scan forward for an instruction which uses the dest
1145 If it dies there, then replace the dest in both operands with
1146 the source operand. */
1148 for (op_no = 0; op_no < recog_data.n_operands; op_no++)
1150 rtx src, dst, src_subreg;
1151 enum reg_class src_class, dst_class;
1153 match_no = match.with[op_no];
1155 /* Nothing to do if the two operands aren't supposed to match. */
1159 src = recog_data.operand[op_no];
1160 dst = recog_data.operand[match_no];
1162 if (GET_CODE (src) != REG)
1166 if (GET_CODE (dst) == SUBREG
1167 && GET_MODE_SIZE (GET_MODE (dst))
1168 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst))))
1171 = gen_rtx_SUBREG (GET_MODE (SUBREG_REG (dst)),
1172 src, SUBREG_WORD (dst));
1173 dst = SUBREG_REG (dst);
1175 if (GET_CODE (dst) != REG
1176 || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1179 if (REGNO (src) < FIRST_PSEUDO_REGISTER)
1181 if (match.commutative[op_no] < op_no)
1182 regno_src_regno[REGNO (dst)] = REGNO (src);
1186 if (REG_LIVE_LENGTH (REGNO (src)) < 0)
1189 /* op_no/src must be a read-only operand, and
1190 match_operand/dst must be a write-only operand. */
1191 if (match.use[op_no] != READ
1192 || match.use[match_no] != WRITE)
1195 if (match.early_clobber[match_no]
1196 && count_occurrences (PATTERN (insn), src) > 1)
1199 /* Make sure match_operand is the destination. */
1200 if (recog_data.operand[match_no] != SET_DEST (set))
1203 /* If the operands already match, then there is nothing to do. */
1204 if (operands_match_p (src, dst))
1207 /* But in the commutative case, we might find a better match. */
1208 if (match.commutative[op_no] >= 0)
1210 rtx comm = recog_data.operand[match.commutative[op_no]];
1211 if (operands_match_p (comm, dst)
1212 && (replacement_quality (comm)
1213 >= replacement_quality (src)))
1217 src_class = reg_preferred_class (REGNO (src));
1218 dst_class = reg_preferred_class (REGNO (dst));
1219 if (! regclass_compatible_p (src_class, dst_class))
1222 if (fixup_match_1 (insn, set, src, src_subreg, dst, pass,
1230 /* A backward pass. Replace input operands with output operands. */
1232 if (regmove_dump_file)
1233 fprintf (regmove_dump_file, "Starting backward pass...\n");
1235 for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
1237 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
1239 int op_no, match_no;
1242 if (! find_matches (insn, &match))
1245 /* Now scan through the operands looking for a destination operand
1246 which is supposed to match a source operand.
1247 Then scan backward for an instruction which sets the source
1248 operand. If safe, then replace the source operand with the
1249 dest operand in both instructions. */
1251 copy_src = NULL_RTX;
1252 copy_dst = NULL_RTX;
1253 for (op_no = 0; op_no < recog_data.n_operands; op_no++)
1255 rtx set, p, src, dst;
1256 rtx src_note, dst_note;
1258 enum reg_class src_class, dst_class;
1261 match_no = match.with[op_no];
1263 /* Nothing to do if the two operands aren't supposed to match. */
1267 dst = recog_data.operand[match_no];
1268 src = recog_data.operand[op_no];
1270 if (GET_CODE (src) != REG)
1273 if (GET_CODE (dst) != REG
1274 || REGNO (dst) < FIRST_PSEUDO_REGISTER
1275 || REG_LIVE_LENGTH (REGNO (dst)) < 0)
1278 /* If the operands already match, then there is nothing to do. */
1279 if (operands_match_p (src, dst))
1282 if (match.commutative[op_no] >= 0)
1284 rtx comm = recog_data.operand[match.commutative[op_no]];
1285 if (operands_match_p (comm, dst))
1289 set = single_set (insn);
1293 /* match_no/dst must be a write-only operand, and
1294 operand_operand/src must be a read-only operand. */
1295 if (match.use[op_no] != READ
1296 || match.use[match_no] != WRITE)
1299 if (match.early_clobber[match_no]
1300 && count_occurrences (PATTERN (insn), src) > 1)
1303 /* Make sure match_no is the destination. */
1304 if (recog_data.operand[match_no] != SET_DEST (set))
1307 if (REGNO (src) < FIRST_PSEUDO_REGISTER)
1309 if (GET_CODE (SET_SRC (set)) == PLUS
1310 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT
1311 && XEXP (SET_SRC (set), 0) == src
1312 && fixup_match_2 (insn, dst, src,
1313 XEXP (SET_SRC (set), 1),
1318 src_class = reg_preferred_class (REGNO (src));
1319 dst_class = reg_preferred_class (REGNO (dst));
1320 if (! regclass_compatible_p (src_class, dst_class))
1330 /* Can not modify an earlier insn to set dst if this insn
1331 uses an old value in the source. */
1332 if (reg_overlap_mentioned_p (dst, SET_SRC (set)))
1342 if (! (src_note = find_reg_note (insn, REG_DEAD, src)))
1353 /* If src is set once in a different basic block,
1354 and is set equal to a constant, then do not use
1355 it for this optimization, as this would make it
1356 no longer equivalent to a constant. */
1358 if (reg_is_remote_constant_p (src, insn, f))
1369 if (regmove_dump_file)
1370 fprintf (regmove_dump_file,
1371 "Could fix operand %d of insn %d matching operand %d.\n",
1372 op_no, INSN_UID (insn), match_no);
1374 /* Scan backward to find the first instruction that uses
1375 the input operand. If the operand is set here, then
1376 replace it in both instructions with match_no. */
1378 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p))
1382 if (GET_CODE (p) == CODE_LABEL
1383 || GET_CODE (p) == JUMP_INSN
1384 || (GET_CODE (p) == NOTE
1385 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1386 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1389 /* ??? We can't scan past the end of a basic block without
1390 updating the register lifetime info
1391 (REG_DEAD/basic_block_live_at_start).
1392 A CALL_INSN might be the last insn of a basic block, if
1393 it is inside an EH region. There is no easy way to tell,
1394 so we just always break when we see a CALL_INSN if
1395 flag_exceptions is nonzero. */
1396 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
1399 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1404 /* ??? See if all of SRC is set in P. This test is much
1405 more conservative than it needs to be. */
1406 pset = single_set (p);
1407 if (pset && SET_DEST (pset) == src)
1409 /* We use validate_replace_rtx, in case there
1410 are multiple identical source operands. All of
1411 them have to be changed at the same time. */
1412 if (validate_replace_rtx (src, dst, insn))
1414 if (validate_change (p, &SET_DEST (pset),
1419 /* Change all source operands back.
1420 This modifies the dst as a side-effect. */
1421 validate_replace_rtx (dst, src, insn);
1422 /* Now make sure the dst is right. */
1423 validate_change (insn,
1424 recog_data.operand_loc[match_no],
1431 if (reg_overlap_mentioned_p (src, PATTERN (p))
1432 || reg_overlap_mentioned_p (dst, PATTERN (p)))
1435 /* If we have passed a call instruction, and the
1436 pseudo-reg DST is not already live across a call,
1437 then don't perform the optimization. */
1438 if (GET_CODE (p) == CALL_INSN)
1442 if (REG_N_CALLS_CROSSED (REGNO (dst)) == 0)
1451 /* Remove the death note for SRC from INSN. */
1452 remove_note (insn, src_note);
1453 /* Move the death note for SRC to P if it is used
1455 if (reg_overlap_mentioned_p (src, PATTERN (p)))
1457 XEXP (src_note, 1) = REG_NOTES (p);
1458 REG_NOTES (p) = src_note;
1460 /* If there is a REG_DEAD note for DST on P, then remove
1461 it, because DST is now set there. */
1462 if ((dst_note = find_reg_note (p, REG_DEAD, dst)))
1463 remove_note (p, dst_note);
1465 dstno = REGNO (dst);
1466 srcno = REGNO (src);
1468 REG_N_SETS (dstno)++;
1469 REG_N_SETS (srcno)--;
1471 REG_N_CALLS_CROSSED (dstno) += num_calls;
1472 REG_N_CALLS_CROSSED (srcno) -= num_calls;
1474 REG_LIVE_LENGTH (dstno) += length;
1475 if (REG_LIVE_LENGTH (srcno) >= 0)
1477 REG_LIVE_LENGTH (srcno) -= length;
1478 /* REG_LIVE_LENGTH is only an approximation after
1479 combine if sched is not run, so make sure that we
1480 still have a reasonable value. */
1481 if (REG_LIVE_LENGTH (srcno) < 2)
1482 REG_LIVE_LENGTH (srcno) = 2;
1485 if (regmove_dump_file)
1486 fprintf (regmove_dump_file,
1487 "Fixed operand %d of insn %d matching operand %d.\n",
1488 op_no, INSN_UID (insn), match_no);
1494 /* If we weren't able to replace any of the alternatives, try an
1495 alternative appoach of copying the source to the destination. */
1496 if (!success && copy_src != NULL_RTX)
1497 copy_src_to_dest (insn, copy_src, copy_dst, old_max_uid);
1502 /* In fixup_match_1, some insns may have been inserted after basic block
1503 ends. Fix that here. */
1504 for (i = 0; i < n_basic_blocks; i++)
1506 rtx end = BLOCK_END (i);
1508 rtx next = NEXT_INSN (new);
1509 while (next != 0 && INSN_UID (next) >= old_max_uid
1510 && (i == n_basic_blocks - 1 || BLOCK_HEAD (i + 1) != next))
1511 new = next, next = NEXT_INSN (new);
1512 BLOCK_END (i) = new;
1517 free (regno_src_regno);
1518 free (regmove_bb_head);
1521 /* Returns nonzero if INSN's pattern has matching constraints for any operand.
1522 Returns 0 if INSN can't be recognized, or if the alternative can't be
1525 Initialize the info in MATCHP based on the constraints. */
1528 find_matches (insn, matchp)
1530 struct match *matchp;
1532 int likely_spilled[MAX_RECOG_OPERANDS];
1534 int any_matches = 0;
1536 extract_insn (insn);
1537 if (! constrain_operands (0))
1540 /* Must initialize this before main loop, because the code for
1541 the commutative case may set matches for operands other than
1543 for (op_no = recog_data.n_operands; --op_no >= 0; )
1544 matchp->with[op_no] = matchp->commutative[op_no] = -1;
1546 for (op_no = 0; op_no < recog_data.n_operands; op_no++)
1552 p = recog_data.constraints[op_no];
1554 likely_spilled[op_no] = 0;
1555 matchp->use[op_no] = READ;
1556 matchp->early_clobber[op_no] = 0;
1558 matchp->use[op_no] = WRITE;
1560 matchp->use[op_no] = READWRITE;
1562 for (;*p && i < which_alternative; p++)
1566 while ((c = *p++) != '\0' && c != ',')
1574 matchp->early_clobber[op_no] = 1;
1577 matchp->commutative[op_no] = op_no + 1;
1578 matchp->commutative[op_no + 1] = op_no;
1580 case '0': case '1': case '2': case '3': case '4':
1581 case '5': case '6': case '7': case '8': case '9':
1583 if (c < op_no && likely_spilled[(unsigned char) c])
1585 matchp->with[op_no] = c;
1587 if (matchp->commutative[op_no] >= 0)
1588 matchp->with[matchp->commutative[op_no]] = c;
1590 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h':
1591 case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u':
1592 case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B':
1593 case 'C': case 'D': case 'W': case 'Y': case 'Z':
1594 if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_LETTER ((unsigned char)c)))
1595 likely_spilled[op_no] = 1;
1602 /* Try to replace output operand DST in SET, with input operand SRC. SET is
1603 the only set in INSN. INSN has just been recognized and constrained.
1604 SRC is operand number OPERAND_NUMBER in INSN.
1605 DST is operand number MATCH_NUMBER in INSN.
1606 If BACKWARD is nonzero, we have been called in a backward pass.
1607 Return nonzero for success. */
1609 fixup_match_1 (insn, set, src, src_subreg, dst, backward, operand_number,
1610 match_number, regmove_dump_file)
1611 rtx insn, set, src, src_subreg, dst;
1612 int backward, operand_number, match_number;
1613 FILE *regmove_dump_file;
1616 rtx post_inc = 0, post_inc_set = 0, search_end = 0;
1618 int num_calls = 0, s_num_calls = 0;
1619 enum rtx_code code = NOTE;
1620 HOST_WIDE_INT insn_const, newconst;
1621 rtx overlap = 0; /* need to move insn ? */
1622 rtx src_note = find_reg_note (insn, REG_DEAD, src), dst_note;
1623 int length, s_length;
1625 /* If SRC is marked as unchanging, we may not change it.
1626 ??? Maybe we could get better code by removing the unchanging bit
1627 instead, and changing it back if we don't succeed? */
1628 if (RTX_UNCHANGING_P (src))
1633 /* Look for (set (regX) (op regA constX))
1634 (set (regY) (op regA constY))
1636 (set (regA) (op regA constX)).
1637 (set (regY) (op regA constY-constX)).
1638 This works for add and shift operations, if
1639 regA is dead after or set by the second insn. */
1641 code = GET_CODE (SET_SRC (set));
1642 if ((code == PLUS || code == LSHIFTRT
1643 || code == ASHIFT || code == ASHIFTRT)
1644 && XEXP (SET_SRC (set), 0) == src
1645 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT)
1646 insn_const = INTVAL (XEXP (SET_SRC (set), 1));
1647 else if (! stable_and_no_regs_but_for_p (SET_SRC (set), src, dst))
1650 /* We might find a src_note while scanning. */
1654 if (regmove_dump_file)
1655 fprintf (regmove_dump_file,
1656 "Could fix operand %d of insn %d matching operand %d.\n",
1657 operand_number, INSN_UID (insn), match_number);
1659 /* If SRC is equivalent to a constant set in a different basic block,
1660 then do not use it for this optimization. We want the equivalence
1661 so that if we have to reload this register, we can reload the
1662 constant, rather than extending the lifespan of the register. */
1663 if (reg_is_remote_constant_p (src, insn, get_insns ()))
1666 /* Scan forward to find the next instruction that
1667 uses the output operand. If the operand dies here,
1668 then replace it in both instructions with
1671 for (length = s_length = 0, p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
1673 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
1674 || (GET_CODE (p) == NOTE
1675 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1676 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1679 /* ??? We can't scan past the end of a basic block without updating
1680 the register lifetime info (REG_DEAD/basic_block_live_at_start).
1681 A CALL_INSN might be the last insn of a basic block, if it is
1682 inside an EH region. There is no easy way to tell, so we just
1683 always break when we see a CALL_INSN if flag_exceptions is nonzero. */
1684 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
1687 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1694 if (reg_set_p (src, p) || reg_set_p (dst, p)
1695 || (GET_CODE (PATTERN (p)) == USE
1696 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0))))
1699 /* See if all of DST dies in P. This test is
1700 slightly more conservative than it needs to be. */
1701 if ((dst_note = find_regno_note (p, REG_DEAD, REGNO (dst)))
1702 && (GET_MODE (XEXP (dst_note, 0)) == GET_MODE (dst)))
1704 /* If we would be moving INSN, check that we won't move it
1705 into the shadow of a live a live flags register. */
1706 /* ??? We only try to move it in front of P, although
1707 we could move it anywhere between OVERLAP and P. */
1708 if (overlap && GET_MODE (PREV_INSN (p)) != VOIDmode)
1716 /* If an optimization is done, the value of SRC while P
1717 is executed will be changed. Check that this is OK. */
1718 if (reg_overlap_mentioned_p (src, PATTERN (p)))
1720 for (q = p; q; q = NEXT_INSN (q))
1722 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1723 || (GET_CODE (q) == NOTE
1724 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1725 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1731 /* ??? We can't scan past the end of a basic block without
1732 updating the register lifetime info
1733 (REG_DEAD/basic_block_live_at_start).
1734 A CALL_INSN might be the last insn of a basic block, if
1735 it is inside an EH region. There is no easy way to tell,
1736 so we just always break when we see a CALL_INSN if
1737 flag_exceptions is nonzero. */
1738 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1744 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
1746 if (reg_overlap_mentioned_p (src, PATTERN (q))
1747 || reg_set_p (src, q))
1751 set2 = single_set (q);
1752 if (! q || ! set2 || GET_CODE (SET_SRC (set2)) != code
1753 || XEXP (SET_SRC (set2), 0) != src
1754 || GET_CODE (XEXP (SET_SRC (set2), 1)) != CONST_INT
1755 || (SET_DEST (set2) != src
1756 && ! find_reg_note (q, REG_DEAD, src)))
1758 /* If this is a PLUS, we can still save a register by doing
1761 src -= insn_const; .
1762 This also gives opportunities for subsequent
1763 optimizations in the backward pass, so do it there. */
1764 if (code == PLUS && backward
1765 /* Don't do this if we can likely tie DST to SET_DEST
1766 of P later; we can't do this tying here if we got a
1768 && ! (dst_note && ! REG_N_CALLS_CROSSED (REGNO (dst))
1770 && GET_CODE (SET_DEST (single_set (p))) == REG
1771 && (REGNO (SET_DEST (single_set (p)))
1772 < FIRST_PSEUDO_REGISTER))
1773 /* We may only emit an insn directly after P if we
1774 are not in the shadow of a live flags register. */
1775 && GET_MODE (p) == VOIDmode)
1780 newconst = -insn_const;
1788 newconst = INTVAL (XEXP (SET_SRC (set2), 1)) - insn_const;
1789 /* Reject out of range shifts. */
1793 >= GET_MODE_BITSIZE (GET_MODE (SET_SRC (set2))))))
1798 if (SET_DEST (set2) != src)
1799 post_inc_set = set2;
1802 /* We use 1 as last argument to validate_change so that all
1803 changes are accepted or rejected together by apply_change_group
1804 when it is called by validate_replace_rtx . */
1805 validate_change (q, &XEXP (SET_SRC (set2), 1),
1806 GEN_INT (newconst), 1);
1808 validate_change (insn, recog_data.operand_loc[match_number], src, 1);
1809 if (validate_replace_rtx (dst, src_subreg, p))
1814 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
1816 if (! src_note && reg_overlap_mentioned_p (src, PATTERN (p)))
1818 /* INSN was already checked to be movable wrt. the registers that it
1819 sets / uses when we found no REG_DEAD note for src on it, but it
1820 still might clobber the flags register. We'll have to check that
1821 we won't insert it into the shadow of a live flags register when
1822 we finally know where we are to move it. */
1824 src_note = find_reg_note (p, REG_DEAD, src);
1827 /* If we have passed a call instruction, and the pseudo-reg SRC is not
1828 already live across a call, then don't perform the optimization. */
1829 if (GET_CODE (p) == CALL_INSN)
1831 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
1845 /* Remove the death note for DST from P. */
1846 remove_note (p, dst_note);
1849 post_inc = emit_insn_after (copy_rtx (PATTERN (insn)), p);
1850 if ((HAVE_PRE_INCREMENT || HAVE_PRE_DECREMENT)
1852 && try_auto_increment (search_end, post_inc, 0, src, newconst, 1))
1854 validate_change (insn, &XEXP (SET_SRC (set), 1), GEN_INT (insn_const), 0);
1855 REG_N_SETS (REGNO (src))++;
1856 REG_LIVE_LENGTH (REGNO (src))++;
1860 /* The lifetime of src and dest overlap,
1861 but we can change this by moving insn. */
1862 rtx pat = PATTERN (insn);
1864 remove_note (overlap, src_note);
1865 if ((HAVE_POST_INCREMENT || HAVE_POST_DECREMENT)
1867 && try_auto_increment (overlap, insn, 0, src, insn_const, 0))
1871 rtx notes = REG_NOTES (insn);
1873 emit_insn_after_with_line_notes (pat, PREV_INSN (p), insn);
1874 PUT_CODE (insn, NOTE);
1875 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1876 NOTE_SOURCE_FILE (insn) = 0;
1877 /* emit_insn_after_with_line_notes has no
1878 return value, so search for the new insn. */
1880 while (GET_RTX_CLASS (GET_CODE (insn)) != 'i'
1881 || PATTERN (insn) != pat)
1882 insn = PREV_INSN (insn);
1884 REG_NOTES (insn) = notes;
1887 /* Sometimes we'd generate src = const; src += n;
1888 if so, replace the instruction that set src
1889 in the first place. */
1891 if (! overlap && (code == PLUS || code == MINUS))
1893 rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
1895 int num_calls2 = 0, s_length2 = 0;
1897 if (note && CONSTANT_P (XEXP (note, 0)))
1899 for (q = PREV_INSN (insn); q; q = PREV_INSN(q))
1901 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1902 || (GET_CODE (q) == NOTE
1903 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1904 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1910 /* ??? We can't scan past the end of a basic block without
1911 updating the register lifetime info
1912 (REG_DEAD/basic_block_live_at_start).
1913 A CALL_INSN might be the last insn of a basic block, if
1914 it is inside an EH region. There is no easy way to tell,
1915 so we just always break when we see a CALL_INSN if
1916 flag_exceptions is nonzero. */
1917 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1923 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
1926 if (reg_set_p (src, q))
1928 set2 = single_set (q);
1931 if (reg_overlap_mentioned_p (src, PATTERN (q)))
1936 if (GET_CODE (p) == CALL_INSN)
1939 if (q && set2 && SET_DEST (set2) == src && CONSTANT_P (SET_SRC (set2))
1940 && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0))
1943 NOTE_LINE_NUMBER (q) = NOTE_INSN_DELETED;
1944 NOTE_SOURCE_FILE (q) = 0;
1945 REG_N_SETS (REGNO (src))--;
1946 REG_N_CALLS_CROSSED (REGNO (src)) -= num_calls2;
1947 REG_LIVE_LENGTH (REGNO (src)) -= s_length2;
1953 if ((HAVE_PRE_INCREMENT || HAVE_PRE_DECREMENT)
1954 && (code == PLUS || code == MINUS) && insn_const
1955 && try_auto_increment (p, insn, 0, src, insn_const, 1))
1957 else if ((HAVE_POST_INCREMENT || HAVE_POST_DECREMENT)
1959 && try_auto_increment (p, post_inc, post_inc_set, src, newconst, 0))
1961 /* If post_inc still prevails, try to find an
1962 insn where it can be used as a pre-in/decrement.
1963 If code is MINUS, this was already tried. */
1964 if (post_inc && code == PLUS
1965 /* Check that newconst is likely to be usable
1966 in a pre-in/decrement before starting the search. */
1967 && ((HAVE_PRE_INCREMENT && newconst > 0 && newconst <= MOVE_MAX)
1968 || (HAVE_PRE_DECREMENT && newconst < 0 && newconst >= -MOVE_MAX))
1969 && exact_log2 (newconst))
1973 inc_dest = post_inc_set ? SET_DEST (post_inc_set) : src;
1974 for (q = post_inc; (q = NEXT_INSN (q)); )
1976 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1977 || (GET_CODE (q) == NOTE
1978 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1979 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1982 /* ??? We can't scan past the end of a basic block without updating
1983 the register lifetime info (REG_DEAD/basic_block_live_at_start).
1984 A CALL_INSN might be the last insn of a basic block, if it
1985 is inside an EH region. There is no easy way to tell so we
1986 just always break when we see a CALL_INSN if flag_exceptions
1988 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1991 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
1993 if (src != inc_dest && (reg_overlap_mentioned_p (src, PATTERN (q))
1994 || reg_set_p (src, q)))
1996 if (reg_set_p (inc_dest, q))
1998 if (reg_overlap_mentioned_p (inc_dest, PATTERN (q)))
2000 try_auto_increment (q, post_inc,
2001 post_inc_set, inc_dest, newconst, 1);
2006 /* Move the death note for DST to INSN if it is used
2008 if (reg_overlap_mentioned_p (dst, PATTERN (insn)))
2010 XEXP (dst_note, 1) = REG_NOTES (insn);
2011 REG_NOTES (insn) = dst_note;
2016 /* Move the death note for SRC from INSN to P. */
2018 remove_note (insn, src_note);
2019 XEXP (src_note, 1) = REG_NOTES (p);
2020 REG_NOTES (p) = src_note;
2022 REG_N_CALLS_CROSSED (REGNO (src)) += s_num_calls;
2025 REG_N_SETS (REGNO (src))++;
2026 REG_N_SETS (REGNO (dst))--;
2028 REG_N_CALLS_CROSSED (REGNO (dst)) -= num_calls;
2030 REG_LIVE_LENGTH (REGNO (src)) += s_length;
2031 if (REG_LIVE_LENGTH (REGNO (dst)) >= 0)
2033 REG_LIVE_LENGTH (REGNO (dst)) -= length;
2034 /* REG_LIVE_LENGTH is only an approximation after
2035 combine if sched is not run, so make sure that we
2036 still have a reasonable value. */
2037 if (REG_LIVE_LENGTH (REGNO (dst)) < 2)
2038 REG_LIVE_LENGTH (REGNO (dst)) = 2;
2040 if (regmove_dump_file)
2041 fprintf (regmove_dump_file,
2042 "Fixed operand %d of insn %d matching operand %d.\n",
2043 operand_number, INSN_UID (insn), match_number);
2048 /* return nonzero if X is stable and mentions no regsiters but for
2049 mentioning SRC or mentioning / changing DST . If in doubt, presume
2051 The rationale is that we want to check if we can move an insn easily
2052 while just paying attention to SRC and DST. A register is considered
2053 stable if it has the RTX_UNCHANGING_P bit set, but that would still
2054 leave the burden to update REG_DEAD / REG_UNUSED notes, so we don't
2055 want any registers but SRC and DST. */
2057 stable_and_no_regs_but_for_p (x, src, dst)
2060 RTX_CODE code = GET_CODE (x);
2061 switch (GET_RTX_CLASS (code))
2063 case '<': case '1': case 'c': case '2': case 'b': case '3':
2066 const char *fmt = GET_RTX_FORMAT (code);
2067 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2069 && ! stable_and_no_regs_but_for_p (XEXP (x, i), src, dst))
2075 return x == src || x == dst;
2076 /* If this is a MEM, look inside - there might be a register hidden in
2077 the address of an unchanging MEM. */
2079 && ! stable_and_no_regs_but_for_p (XEXP (x, 0), src, dst))
2083 return ! rtx_unstable_p (x);