1 /* Move registers around to reduce number of move instructions needed.
2 Copyright (C) 1987, 88, 89, 92-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This module looks for cases where matching constraints would force
23 an instruction to need a reload, and this reload would be a register
24 to register move. It then attempts to change the registers used by the
25 instruction to avoid the move instruction. */
29 #include "rtl.h" /* stdio.h must precede rtl.h for FFS. */
30 #include "insn-config.h"
35 #include "hard-reg-set.h"
39 #include "insn-flags.h"
40 #include "basic-block.h"
43 static int optimize_reg_copy_1 PROTO((rtx, rtx, rtx));
44 static void optimize_reg_copy_2 PROTO((rtx, rtx, rtx));
45 static void optimize_reg_copy_3 PROTO((rtx, rtx, rtx));
46 static rtx gen_add3_insn PROTO((rtx, rtx, rtx));
47 static void copy_src_to_dest PROTO((rtx, rtx, rtx, int, int));
48 static int *regmove_bb_head;
51 int with[MAX_RECOG_OPERANDS];
52 enum { READ, WRITE, READWRITE } use[MAX_RECOG_OPERANDS];
53 int commutative[MAX_RECOG_OPERANDS];
54 int early_clobber[MAX_RECOG_OPERANDS];
57 static rtx discover_flags_reg PROTO((void));
58 static void mark_flags_life_zones PROTO((rtx));
59 static void flags_set_1 PROTO((rtx, rtx));
61 static int try_auto_increment PROTO((rtx, rtx, rtx, rtx, HOST_WIDE_INT, int));
62 static int find_matches PROTO((rtx, struct match *));
63 static int fixup_match_1 PROTO((rtx, rtx, rtx, rtx, rtx, int, int, int, FILE *))
65 static int reg_is_remote_constant_p PROTO((rtx, rtx, rtx));
66 static int stable_but_for_p PROTO((rtx, rtx, rtx));
67 static int regclass_compatible_p PROTO((int, int));
68 static int loop_depth;
70 /* Return non-zero if registers with CLASS1 and CLASS2 can be merged without
71 causing too much register allocation problems. */
73 regclass_compatible_p (class0, class1)
76 return (class0 == class1
77 || (reg_class_subset_p (class0, class1)
78 && ! CLASS_LIKELY_SPILLED_P (class0))
79 || (reg_class_subset_p (class1, class0)
80 && ! CLASS_LIKELY_SPILLED_P (class1)));
83 /* Generate and return an insn body to add r1 and c,
84 storing the result in r0. */
86 gen_add3_insn (r0, r1, c)
89 int icode = (int) add_optab->handlers[(int) GET_MODE (r0)].insn_code;
91 if (icode == CODE_FOR_nothing
92 || ! (*insn_operand_predicate[icode][0]) (r0, insn_operand_mode[icode][0])
93 || ! (*insn_operand_predicate[icode][1]) (r1, insn_operand_mode[icode][1])
94 || ! (*insn_operand_predicate[icode][2]) (c, insn_operand_mode[icode][2]))
97 return (GEN_FCN (icode) (r0, r1, c));
101 /* INC_INSN is an instruction that adds INCREMENT to REG.
102 Try to fold INC_INSN as a post/pre in/decrement into INSN.
103 Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src.
104 Return nonzero for success. */
106 try_auto_increment (insn, inc_insn, inc_insn_set, reg, increment, pre)
107 rtx reg, insn, inc_insn ,inc_insn_set;
108 HOST_WIDE_INT increment;
111 enum rtx_code inc_code;
113 rtx pset = single_set (insn);
116 /* Can't use the size of SET_SRC, we might have something like
117 (sign_extend:SI (mem:QI ... */
118 rtx use = find_use_as_address (pset, reg, 0);
119 if (use != 0 && use != (rtx) 1)
121 int size = GET_MODE_SIZE (GET_MODE (use));
123 || (HAVE_POST_INCREMENT
124 && pre == 0 && (inc_code = POST_INC, increment == size))
125 || (HAVE_PRE_INCREMENT
126 && pre == 1 && (inc_code = PRE_INC, increment == size))
127 || (HAVE_POST_DECREMENT
128 && pre == 0 && (inc_code = POST_DEC, increment == -size))
129 || (HAVE_PRE_DECREMENT
130 && pre == 1 && (inc_code = PRE_DEC, increment == -size))
136 &SET_SRC (inc_insn_set),
137 XEXP (SET_SRC (inc_insn_set), 0), 1);
138 validate_change (insn, &XEXP (use, 0),
139 gen_rtx_fmt_e (inc_code, Pmode, reg), 1);
140 if (apply_change_group ())
143 = gen_rtx_EXPR_LIST (REG_INC,
144 reg, REG_NOTES (insn));
147 PUT_CODE (inc_insn, NOTE);
148 NOTE_LINE_NUMBER (inc_insn) = NOTE_INSN_DELETED;
149 NOTE_SOURCE_FILE (inc_insn) = 0;
159 /* Determine if the pattern generated by add_optab has a clobber,
160 such as might be issued for a flags hard register. To make the
161 code elsewhere simpler, we handle cc0 in this same framework.
163 Return the register if one was discovered. Return NULL_RTX if
164 if no flags were found. Return pc_rtx if we got confused. */
167 discover_flags_reg ()
170 tmp = gen_rtx_REG (word_mode, 10000);
171 tmp = gen_add3_insn (tmp, tmp, GEN_INT (2));
173 /* If we get something that isn't a simple set, or a
174 [(set ..) (clobber ..)], this whole function will go wrong. */
175 if (GET_CODE (tmp) == SET)
177 else if (GET_CODE (tmp) == PARALLEL)
181 if (XVECLEN (tmp, 0) != 2)
183 tmp = XVECEXP (tmp, 0, 1);
184 if (GET_CODE (tmp) != CLOBBER)
188 /* Don't do anything foolish if the md wanted to clobber a
189 scratch or something. We only care about hard regs.
190 Moreover we don't like the notion of subregs of hard regs. */
191 if (GET_CODE (tmp) == SUBREG
192 && GET_CODE (SUBREG_REG (tmp)) == REG
193 && REGNO (SUBREG_REG (tmp)) < FIRST_PSEUDO_REGISTER)
195 found = (GET_CODE (tmp) == REG && REGNO (tmp) < FIRST_PSEUDO_REGISTER);
197 return (found ? tmp : NULL_RTX);
203 /* It is a tedious task identifying when the flags register is live and
204 when it is safe to optimize. Since we process the instruction stream
205 multiple times, locate and record these live zones by marking the
206 mode of the instructions --
208 QImode is used on the instruction at which the flags becomes live.
210 HImode is used within the range (exclusive) that the flags are
211 live. Thus the user of the flags is not marked.
213 All other instructions are cleared to VOIDmode. */
215 /* Used to communicate with flags_set_1. */
216 static rtx flags_set_1_rtx;
217 static int flags_set_1_set;
220 mark_flags_life_zones (flags)
228 /* If we found a flags register on a cc0 host, bail. */
229 if (flags == NULL_RTX)
231 else if (flags != cc0_rtx)
235 /* Simple cases first: if no flags, clear all modes. If confusing,
236 mark the entire function as being in a flags shadow. */
237 if (flags == NULL_RTX || flags == pc_rtx)
239 enum machine_mode mode = (flags ? HImode : VOIDmode);
241 for (insn = get_insns(); insn; insn = NEXT_INSN (insn))
242 PUT_MODE (insn, mode);
250 flags_regno = REGNO (flags);
251 flags_nregs = HARD_REGNO_NREGS (flags_regno, GET_MODE (flags));
253 flags_set_1_rtx = flags;
255 /* Process each basic block. */
256 for (block = n_basic_blocks - 1; block >= 0; block--)
261 insn = BLOCK_HEAD (block);
262 end = BLOCK_END (block);
264 /* Look out for the (unlikely) case of flags being live across
265 basic block boundaries. */
270 for (i = 0; i < flags_nregs; ++i)
271 live |= REGNO_REG_SET_P (BASIC_BLOCK (block)->global_live_at_start,
278 /* Process liveness in reverse order of importance --
279 alive, death, birth. This lets more important info
280 overwrite the mode of lesser info. */
282 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
285 /* In the cc0 case, death is not marked in reg notes,
286 but is instead the mere use of cc0 when it is alive. */
287 if (live && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
290 /* In the hard reg case, we watch death notes. */
291 if (live && find_regno_note (insn, REG_DEAD, flags_regno))
294 PUT_MODE (insn, (live ? HImode : VOIDmode));
296 /* In either case, birth is denoted simply by it's presence
297 as the destination of a set. */
299 note_stores (PATTERN (insn), flags_set_1);
303 PUT_MODE (insn, QImode);
307 PUT_MODE (insn, (live ? HImode : VOIDmode));
311 insn = NEXT_INSN (insn);
316 /* A subroutine of mark_flags_life_zones, called through note_stores. */
322 if (GET_CODE (pat) == SET
323 && reg_overlap_mentioned_p (x, flags_set_1_rtx))
327 static int *regno_src_regno;
329 /* Indicate how good a choice REG (which appears as a source) is to replace
330 a destination register with. The higher the returned value, the better
331 the choice. The main objective is to avoid using a register that is
332 a candidate for tying to a hard register, since the output might in
333 turn be a candidate to be tied to a different hard register. */
335 replacement_quality(reg)
340 /* Bad if this isn't a register at all. */
341 if (GET_CODE (reg) != REG)
344 /* If this register is not meant to get a hard register,
345 it is a poor choice. */
346 if (REG_LIVE_LENGTH (REGNO (reg)) < 0)
349 src_regno = regno_src_regno[REGNO (reg)];
351 /* If it was not copied from another register, it is fine. */
355 /* Copied from a hard register? */
356 if (src_regno < FIRST_PSEUDO_REGISTER)
359 /* Copied from a pseudo register - not as bad as from a hard register,
360 yet still cumbersome, since the register live length will be lengthened
361 when the registers get tied. */
365 /* INSN is a copy from SRC to DEST, both registers, and SRC does not die
368 Search forward to see if SRC dies before either it or DEST is modified,
369 but don't scan past the end of a basic block. If so, we can replace SRC
370 with DEST and let SRC die in INSN.
372 This will reduce the number of registers live in that range and may enable
373 DEST to be tied to SRC, thus often saving one register in addition to a
374 register-register copy. */
377 optimize_reg_copy_1 (insn, dest, src)
385 int sregno = REGNO (src);
386 int dregno = REGNO (dest);
388 /* We don't want to mess with hard regs if register classes are small. */
390 || (SMALL_REGISTER_CLASSES
391 && (sregno < FIRST_PSEUDO_REGISTER
392 || dregno < FIRST_PSEUDO_REGISTER))
393 /* We don't see all updates to SP if they are in an auto-inc memory
394 reference, so we must disallow this optimization on them. */
395 || sregno == STACK_POINTER_REGNUM || dregno == STACK_POINTER_REGNUM)
398 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
400 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
401 || (GET_CODE (p) == NOTE
402 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
403 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
406 /* ??? We can't scan past the end of a basic block without updating
407 the register lifetime info (REG_DEAD/basic_block_live_at_start).
408 A CALL_INSN might be the last insn of a basic block, if it is inside
409 an EH region. There is no easy way to tell, so we just always break
410 when we see a CALL_INSN if flag_exceptions is nonzero. */
411 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
414 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
417 if (reg_set_p (src, p) || reg_set_p (dest, p)
418 /* Don't change a USE of a register. */
419 || (GET_CODE (PATTERN (p)) == USE
420 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0))))
423 /* See if all of SRC dies in P. This test is slightly more
424 conservative than it needs to be. */
425 if ((note = find_regno_note (p, REG_DEAD, sregno)) != 0
426 && GET_MODE (XEXP (note, 0)) == GET_MODE (src))
434 /* We can do the optimization. Scan forward from INSN again,
435 replacing regs as we go. Set FAILED if a replacement can't
436 be done. In that case, we can't move the death note for SRC.
437 This should be rare. */
439 /* Set to stop at next insn. */
440 for (q = next_real_insn (insn);
441 q != next_real_insn (p);
442 q = next_real_insn (q))
444 if (reg_overlap_mentioned_p (src, PATTERN (q)))
446 /* If SRC is a hard register, we might miss some
447 overlapping registers with validate_replace_rtx,
448 so we would have to undo it. We can't if DEST is
449 present in the insn, so fail in that combination
451 if (sregno < FIRST_PSEUDO_REGISTER
452 && reg_mentioned_p (dest, PATTERN (q)))
455 /* Replace all uses and make sure that the register
456 isn't still present. */
457 else if (validate_replace_rtx (src, dest, q)
458 && (sregno >= FIRST_PSEUDO_REGISTER
459 || ! reg_overlap_mentioned_p (src,
462 /* We assume that a register is used exactly once per
463 insn in the REG_N_REFS updates below. If this is not
464 correct, no great harm is done.
466 Since we do not know if we will change the lifetime of
467 SREGNO or DREGNO, we must not update REG_LIVE_LENGTH
468 or REG_N_CALLS_CROSSED at this time. */
469 if (sregno >= FIRST_PSEUDO_REGISTER)
470 REG_N_REFS (sregno) -= loop_depth;
472 if (dregno >= FIRST_PSEUDO_REGISTER)
473 REG_N_REFS (dregno) += loop_depth;
477 validate_replace_rtx (dest, src, q);
482 /* For SREGNO, count the total number of insns scanned.
483 For DREGNO, count the total number of insns scanned after
484 passing the death note for DREGNO. */
489 /* If the insn in which SRC dies is a CALL_INSN, don't count it
490 as a call that has been crossed. Otherwise, count it. */
491 if (q != p && GET_CODE (q) == CALL_INSN)
493 /* Similarly, total calls for SREGNO, total calls beyond
494 the death note for DREGNO. */
500 /* If DEST dies here, remove the death note and save it for
501 later. Make sure ALL of DEST dies here; again, this is
502 overly conservative. */
504 && (dest_death = find_regno_note (q, REG_DEAD, dregno)) != 0)
506 if (GET_MODE (XEXP (dest_death, 0)) != GET_MODE (dest))
507 failed = 1, dest_death = 0;
509 remove_note (q, dest_death);
515 /* These counters need to be updated if and only if we are
516 going to move the REG_DEAD note. */
517 if (sregno >= FIRST_PSEUDO_REGISTER)
519 if (REG_LIVE_LENGTH (sregno) >= 0)
521 REG_LIVE_LENGTH (sregno) -= s_length;
522 /* REG_LIVE_LENGTH is only an approximation after
523 combine if sched is not run, so make sure that we
524 still have a reasonable value. */
525 if (REG_LIVE_LENGTH (sregno) < 2)
526 REG_LIVE_LENGTH (sregno) = 2;
529 REG_N_CALLS_CROSSED (sregno) -= s_n_calls;
532 /* Move death note of SRC from P to INSN. */
533 remove_note (p, note);
534 XEXP (note, 1) = REG_NOTES (insn);
535 REG_NOTES (insn) = note;
538 /* Put death note of DEST on P if we saw it die. */
541 XEXP (dest_death, 1) = REG_NOTES (p);
542 REG_NOTES (p) = dest_death;
544 if (dregno >= FIRST_PSEUDO_REGISTER)
546 /* If and only if we are moving the death note for DREGNO,
547 then we need to update its counters. */
548 if (REG_LIVE_LENGTH (dregno) >= 0)
549 REG_LIVE_LENGTH (dregno) += d_length;
550 REG_N_CALLS_CROSSED (dregno) += d_n_calls;
557 /* If SRC is a hard register which is set or killed in some other
558 way, we can't do this optimization. */
559 else if (sregno < FIRST_PSEUDO_REGISTER
560 && dead_or_set_p (p, src))
566 /* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have
567 a sequence of insns that modify DEST followed by an insn that sets
568 SRC to DEST in which DEST dies, with no prior modification of DEST.
569 (There is no need to check if the insns in between actually modify
570 DEST. We should not have cases where DEST is not modified, but
571 the optimization is safe if no such modification is detected.)
572 In that case, we can replace all uses of DEST, starting with INSN and
573 ending with the set of SRC to DEST, with SRC. We do not do this
574 optimization if a CALL_INSN is crossed unless SRC already crosses a
575 call or if DEST dies before the copy back to SRC.
577 It is assumed that DEST and SRC are pseudos; it is too complicated to do
578 this for hard registers since the substitutions we may make might fail. */
581 optimize_reg_copy_2 (insn, dest, src)
588 int sregno = REGNO (src);
589 int dregno = REGNO (dest);
591 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
593 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
594 || (GET_CODE (p) == NOTE
595 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
596 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
599 /* ??? We can't scan past the end of a basic block without updating
600 the register lifetime info (REG_DEAD/basic_block_live_at_start).
601 A CALL_INSN might be the last insn of a basic block, if it is inside
602 an EH region. There is no easy way to tell, so we just always break
603 when we see a CALL_INSN if flag_exceptions is nonzero. */
604 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
607 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
610 set = single_set (p);
611 if (set && SET_SRC (set) == dest && SET_DEST (set) == src
612 && find_reg_note (p, REG_DEAD, dest))
614 /* We can do the optimization. Scan forward from INSN again,
615 replacing regs as we go. */
617 /* Set to stop at next insn. */
618 for (q = insn; q != NEXT_INSN (p); q = NEXT_INSN (q))
619 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
621 if (reg_mentioned_p (dest, PATTERN (q)))
623 PATTERN (q) = replace_rtx (PATTERN (q), dest, src);
625 /* We assume that a register is used exactly once per
626 insn in the updates below. If this is not correct,
627 no great harm is done. */
628 REG_N_REFS (dregno) -= loop_depth;
629 REG_N_REFS (sregno) += loop_depth;
633 if (GET_CODE (q) == CALL_INSN)
635 REG_N_CALLS_CROSSED (dregno)--;
636 REG_N_CALLS_CROSSED (sregno)++;
640 remove_note (p, find_reg_note (p, REG_DEAD, dest));
641 REG_N_DEATHS (dregno)--;
642 remove_note (insn, find_reg_note (insn, REG_DEAD, src));
643 REG_N_DEATHS (sregno)--;
647 if (reg_set_p (src, p)
648 || find_reg_note (p, REG_DEAD, dest)
649 || (GET_CODE (p) == CALL_INSN && REG_N_CALLS_CROSSED (sregno) == 0))
653 /* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST.
654 Look if SRC dies there, and if it is only set once, by loading
655 it from memory. If so, try to encorporate the zero/sign extension
656 into the memory read, change SRC to the mode of DEST, and alter
657 the remaining accesses to use the appropriate SUBREG. This allows
658 SRC and DEST to be tied later. */
660 optimize_reg_copy_3 (insn, dest, src)
665 rtx src_reg = XEXP (src, 0);
666 int src_no = REGNO (src_reg);
667 int dst_no = REGNO (dest);
669 enum machine_mode old_mode;
671 if (src_no < FIRST_PSEUDO_REGISTER
672 || dst_no < FIRST_PSEUDO_REGISTER
673 || ! find_reg_note (insn, REG_DEAD, src_reg)
674 || REG_N_SETS (src_no) != 1)
676 for (p = PREV_INSN (insn); ! reg_set_p (src_reg, p); p = PREV_INSN (p))
678 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
679 || (GET_CODE (p) == NOTE
680 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
681 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
684 /* ??? We can't scan past the end of a basic block without updating
685 the register lifetime info (REG_DEAD/basic_block_live_at_start).
686 A CALL_INSN might be the last insn of a basic block, if it is inside
687 an EH region. There is no easy way to tell, so we just always break
688 when we see a CALL_INSN if flag_exceptions is nonzero. */
689 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
692 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
695 if (! (set = single_set (p))
696 || GET_CODE (SET_SRC (set)) != MEM
697 || SET_DEST (set) != src_reg)
700 /* Be conserative: although this optimization is also valid for
701 volatile memory references, that could cause trouble in later passes. */
702 if (MEM_VOLATILE_P (SET_SRC (set)))
705 /* Do not use a SUBREG to truncate from one mode to another if truncation
707 if (GET_MODE_BITSIZE (GET_MODE (src_reg)) <= GET_MODE_BITSIZE (GET_MODE (src))
708 && !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (src)),
709 GET_MODE_BITSIZE (GET_MODE (src_reg))))
712 old_mode = GET_MODE (src_reg);
713 PUT_MODE (src_reg, GET_MODE (src));
714 XEXP (src, 0) = SET_SRC (set);
716 /* Include this change in the group so that it's easily undone if
717 one of the changes in the group is invalid. */
718 validate_change (p, &SET_SRC (set), src, 1);
720 /* Now walk forward making additional replacements. We want to be able
721 to undo all the changes if a later substitution fails. */
722 subreg = gen_rtx_SUBREG (old_mode, src_reg, 0);
723 while (p = NEXT_INSN (p), p != insn)
725 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
728 /* Make a tenative change. */
729 validate_replace_rtx_group (src_reg, subreg, p);
732 validate_replace_rtx_group (src, src_reg, insn);
734 /* Now see if all the changes are valid. */
735 if (! apply_change_group ())
737 /* One or more changes were no good. Back out everything. */
738 PUT_MODE (src_reg, old_mode);
739 XEXP (src, 0) = src_reg;
744 /* If we were not able to update the users of src to use dest directly, try
745 instead moving the value to dest directly before the operation. */
748 copy_src_to_dest (insn, src, dest, loop_depth, old_max_uid)
768 /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant
769 or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is
770 parameter when there is no frame pointer that is not allocated a register.
771 For now, we just reject them, rather than incrementing the live length. */
773 if (GET_CODE (src) == REG
774 && REG_LIVE_LENGTH (REGNO (src)) > 0
775 && GET_CODE (dest) == REG
776 && REG_LIVE_LENGTH (REGNO (dest)) > 0
777 && (set = single_set (insn)) != NULL_RTX
778 && !reg_mentioned_p (dest, SET_SRC (set))
779 && GET_MODE (src) == GET_MODE (dest))
781 int old_num_regs = reg_rtx_no;
783 /* Generate the src->dest move. */
785 emit_move_insn (dest, src);
786 seq = gen_sequence ();
788 /* If this sequence uses new registers, we may not use it. */
789 if (old_num_regs != reg_rtx_no
790 || ! validate_replace_rtx (src, dest, insn))
792 /* We have to restore reg_rtx_no to its old value, lest
793 recompute_reg_usage will try to compute the usage of the
794 new regs, yet reg_n_info is not valid for them. */
795 reg_rtx_no = old_num_regs;
798 emit_insn_before (seq, insn);
799 move_insn = PREV_INSN (insn);
800 p_move_notes = ®_NOTES (move_insn);
801 p_insn_notes = ®_NOTES (insn);
803 /* Move any notes mentioning src to the move instruction */
804 for (link = REG_NOTES (insn); link != NULL_RTX; link = next)
806 next = XEXP (link, 1);
807 if (XEXP (link, 0) == src)
809 *p_move_notes = link;
810 p_move_notes = &XEXP (link, 1);
814 *p_insn_notes = link;
815 p_insn_notes = &XEXP (link, 1);
819 *p_move_notes = NULL_RTX;
820 *p_insn_notes = NULL_RTX;
822 /* Is the insn the head of a basic block? If so extend it */
823 insn_uid = INSN_UID (insn);
824 move_uid = INSN_UID (move_insn);
825 if (insn_uid < old_max_uid)
827 bb = regmove_bb_head[insn_uid];
830 BLOCK_HEAD (bb) = move_insn;
831 regmove_bb_head[insn_uid] = -1;
835 /* Update the various register tables. */
836 dest_regno = REGNO (dest);
837 REG_N_SETS (dest_regno) += loop_depth;
838 REG_N_REFS (dest_regno) += loop_depth;
839 REG_LIVE_LENGTH (dest_regno)++;
840 if (REGNO_FIRST_UID (dest_regno) == insn_uid)
841 REGNO_FIRST_UID (dest_regno) = move_uid;
843 src_regno = REGNO (src);
844 if (! find_reg_note (move_insn, REG_DEAD, src))
845 REG_LIVE_LENGTH (src_regno)++;
847 if (REGNO_FIRST_UID (src_regno) == insn_uid)
848 REGNO_FIRST_UID (src_regno) = move_uid;
850 if (REGNO_LAST_UID (src_regno) == insn_uid)
851 REGNO_LAST_UID (src_regno) = move_uid;
853 if (REGNO_LAST_NOTE_UID (src_regno) == insn_uid)
854 REGNO_LAST_NOTE_UID (src_regno) = move_uid;
859 /* Return whether REG is set in only one location, and is set to a
860 constant, but is set in a different basic block from INSN (an
861 instructions which uses REG). In this case REG is equivalent to a
862 constant, and we don't want to break that equivalence, because that
863 may increase register pressure and make reload harder. If REG is
864 set in the same basic block as INSN, we don't worry about it,
865 because we'll probably need a register anyhow (??? but what if REG
866 is used in a different basic block as well as this one?). FIRST is
867 the first insn in the function. */
870 reg_is_remote_constant_p (reg, insn, first)
877 if (REG_N_SETS (REGNO (reg)) != 1)
880 /* Look for the set. */
881 for (p = LOG_LINKS (insn); p; p = XEXP (p, 1))
885 if (REG_NOTE_KIND (p) != 0)
887 s = single_set (XEXP (p, 0));
889 && GET_CODE (SET_DEST (s)) == REG
890 && REGNO (SET_DEST (s)) == REGNO (reg))
892 /* The register is set in the same basic block. */
897 for (p = first; p && p != insn; p = NEXT_INSN (p))
901 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
905 && GET_CODE (SET_DEST (s)) == REG
906 && REGNO (SET_DEST (s)) == REGNO (reg))
908 /* This is the instruction which sets REG. If there is a
909 REG_EQUAL note, then REG is equivalent to a constant. */
910 if (find_reg_note (p, REG_EQUAL, NULL_RTX))
919 /* INSN is adding a CONST_INT to a REG. We search backwards looking for
920 another add immediate instruction with the same source and dest registers,
921 and if we find one, we change INSN to an increment, and return 1. If
922 no changes are made, we return 0.
925 (set (reg100) (plus reg1 offset1))
927 (set (reg100) (plus reg1 offset2))
929 (set (reg100) (plus reg1 offset1))
931 (set (reg100) (plus reg100 offset2-offset1)) */
933 /* ??? What does this comment mean? */
934 /* cse disrupts preincrement / postdecrement squences when it finds a
935 hard register as ultimate source, like the frame pointer. */
938 fixup_match_2 (insn, dst, src, offset, regmove_dump_file)
939 rtx insn, dst, src, offset;
940 FILE *regmove_dump_file;
942 rtx p, dst_death = 0;
943 int length, num_calls = 0;
945 /* If SRC dies in INSN, we'd have to move the death note. This is
946 considered to be very unlikely, so we just skip the optimization
948 if (find_regno_note (insn, REG_DEAD, REGNO (src)))
951 /* Scan backward to find the first instruction that sets DST. */
953 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p))
957 if (GET_CODE (p) == CODE_LABEL
958 || GET_CODE (p) == JUMP_INSN
959 || (GET_CODE (p) == NOTE
960 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
961 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
964 /* ??? We can't scan past the end of a basic block without updating
965 the register lifetime info (REG_DEAD/basic_block_live_at_start).
966 A CALL_INSN might be the last insn of a basic block, if it is inside
967 an EH region. There is no easy way to tell, so we just always break
968 when we see a CALL_INSN if flag_exceptions is nonzero. */
969 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
972 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
975 if (find_regno_note (p, REG_DEAD, REGNO (dst)))
980 pset = single_set (p);
981 if (pset && SET_DEST (pset) == dst
982 && GET_CODE (SET_SRC (pset)) == PLUS
983 && XEXP (SET_SRC (pset), 0) == src
984 && GET_CODE (XEXP (SET_SRC (pset), 1)) == CONST_INT)
986 HOST_WIDE_INT newconst
987 = INTVAL (offset) - INTVAL (XEXP (SET_SRC (pset), 1));
988 rtx add = gen_add3_insn (dst, dst, GEN_INT (newconst));
990 if (add && validate_change (insn, &PATTERN (insn), add, 0))
992 /* Remove the death note for DST from DST_DEATH. */
995 remove_death (REGNO (dst), dst_death);
996 REG_LIVE_LENGTH (REGNO (dst)) += length;
997 REG_N_CALLS_CROSSED (REGNO (dst)) += num_calls;
1000 REG_N_REFS (REGNO (dst)) += loop_depth;
1001 REG_N_REFS (REGNO (src)) -= loop_depth;
1003 if (regmove_dump_file)
1004 fprintf (regmove_dump_file,
1005 "Fixed operand of insn %d.\n",
1009 for (p = PREV_INSN (insn); p; p = PREV_INSN (p))
1011 if (GET_CODE (p) == CODE_LABEL
1012 || GET_CODE (p) == JUMP_INSN
1013 || (GET_CODE (p) == NOTE
1014 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1015 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1017 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1019 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
1021 if (try_auto_increment (p, insn, 0, dst, newconst, 0))
1026 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
1028 if (GET_CODE (p) == CODE_LABEL
1029 || GET_CODE (p) == JUMP_INSN
1030 || (GET_CODE (p) == NOTE
1031 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1032 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1034 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1036 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
1038 try_auto_increment (p, insn, 0, dst, newconst, 1);
1047 if (reg_set_p (dst, PATTERN (p)))
1050 /* If we have passed a call instruction, and the
1051 pseudo-reg SRC is not already live across a call,
1052 then don't perform the optimization. */
1053 /* reg_set_p is overly conservative for CALL_INSNS, thinks that all
1054 hard regs are clobbered. Thus, we only use it for src for
1056 if (GET_CODE (p) == CALL_INSN)
1061 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
1064 if (call_used_regs [REGNO (dst)]
1065 || find_reg_fusage (p, CLOBBER, dst))
1068 else if (reg_set_p (src, PATTERN (p)))
1076 regmove_optimize (f, nregs, regmove_dump_file)
1079 FILE *regmove_dump_file;
1081 int old_max_uid = get_max_uid ();
1086 rtx copy_src, copy_dst;
1088 /* Find out where a potential flags register is live, and so that we
1089 can supress some optimizations in those zones. */
1090 mark_flags_life_zones (discover_flags_reg ());
1092 regno_src_regno = (int *)alloca (sizeof *regno_src_regno * nregs);
1093 for (i = nregs; --i >= 0; ) regno_src_regno[i] = -1;
1095 regmove_bb_head = (int *)alloca (sizeof (int) * (old_max_uid + 1));
1096 for (i = old_max_uid; i >= 0; i--) regmove_bb_head[i] = -1;
1097 for (i = 0; i < n_basic_blocks; i++)
1098 regmove_bb_head[INSN_UID (BLOCK_HEAD (i))] = i;
1100 /* A forward/backward pass. Replace output operands with input operands. */
1104 for (pass = 0; pass <= 2; pass++)
1106 if (! flag_regmove && pass >= flag_expensive_optimizations)
1109 if (regmove_dump_file)
1110 fprintf (regmove_dump_file, "Starting %s pass...\n",
1111 pass ? "backward" : "forward");
1113 for (insn = pass ? get_last_insn () : f; insn;
1114 insn = pass ? PREV_INSN (insn) : NEXT_INSN (insn))
1117 int op_no, match_no;
1119 if (GET_CODE (insn) == NOTE)
1121 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1123 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
1127 set = single_set (insn);
1131 if (flag_expensive_optimizations && ! pass
1132 && (GET_CODE (SET_SRC (set)) == SIGN_EXTEND
1133 || GET_CODE (SET_SRC (set)) == ZERO_EXTEND)
1134 && GET_CODE (XEXP (SET_SRC (set), 0)) == REG
1135 && GET_CODE (SET_DEST(set)) == REG)
1136 optimize_reg_copy_3 (insn, SET_DEST (set), SET_SRC (set));
1138 if (flag_expensive_optimizations && ! pass
1139 && GET_CODE (SET_SRC (set)) == REG
1140 && GET_CODE (SET_DEST(set)) == REG)
1142 /* If this is a register-register copy where SRC is not dead,
1143 see if we can optimize it. If this optimization succeeds,
1144 it will become a copy where SRC is dead. */
1145 if ((find_reg_note (insn, REG_DEAD, SET_SRC (set))
1146 || optimize_reg_copy_1 (insn, SET_DEST (set), SET_SRC (set)))
1147 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER)
1149 /* Similarly for a pseudo-pseudo copy when SRC is dead. */
1150 if (REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER)
1151 optimize_reg_copy_2 (insn, SET_DEST (set), SET_SRC (set));
1152 if (regno_src_regno[REGNO (SET_DEST (set))] < 0
1153 && SET_SRC (set) != SET_DEST (set))
1155 int srcregno = REGNO (SET_SRC(set));
1156 if (regno_src_regno[srcregno] >= 0)
1157 srcregno = regno_src_regno[srcregno];
1158 regno_src_regno[REGNO (SET_DEST (set))] = srcregno;
1165 #ifdef REGISTER_CONSTRAINTS
1166 if (! find_matches (insn, &match))
1169 /* Now scan through the operands looking for a source operand
1170 which is supposed to match the destination operand.
1171 Then scan forward for an instruction which uses the dest
1173 If it dies there, then replace the dest in both operands with
1174 the source operand. */
1176 for (op_no = 0; op_no < recog_n_operands; op_no++)
1178 rtx src, dst, src_subreg;
1179 enum reg_class src_class, dst_class;
1181 match_no = match.with[op_no];
1183 /* Nothing to do if the two operands aren't supposed to match. */
1187 src = recog_operand[op_no];
1188 dst = recog_operand[match_no];
1190 if (GET_CODE (src) != REG)
1194 if (GET_CODE (dst) == SUBREG
1195 && GET_MODE_SIZE (GET_MODE (dst))
1196 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst))))
1199 = gen_rtx_SUBREG (GET_MODE (SUBREG_REG (dst)),
1200 src, SUBREG_WORD (dst));
1201 dst = SUBREG_REG (dst);
1203 if (GET_CODE (dst) != REG
1204 || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1207 if (REGNO (src) < FIRST_PSEUDO_REGISTER)
1209 if (match.commutative[op_no] < op_no)
1210 regno_src_regno[REGNO (dst)] = REGNO (src);
1214 if (REG_LIVE_LENGTH (REGNO (src)) < 0)
1217 /* op_no/src must be a read-only operand, and
1218 match_operand/dst must be a write-only operand. */
1219 if (match.use[op_no] != READ
1220 || match.use[match_no] != WRITE)
1223 if (match.early_clobber[match_no]
1224 && count_occurrences (PATTERN (insn), src) > 1)
1227 /* Make sure match_operand is the destination. */
1228 if (recog_operand[match_no] != SET_DEST (set))
1231 /* If the operands already match, then there is nothing to do. */
1232 /* But in the commutative case, we might find a better match. */
1233 if (operands_match_p (src, dst)
1234 || (match.commutative[op_no] >= 0
1235 && operands_match_p (recog_operand[match.commutative
1237 && (replacement_quality (recog_operand[match.commutative
1239 >= replacement_quality (src))))
1242 src_class = reg_preferred_class (REGNO (src));
1243 dst_class = reg_preferred_class (REGNO (dst));
1244 if (! regclass_compatible_p (src_class, dst_class))
1247 if (fixup_match_1 (insn, set, src, src_subreg, dst, pass,
1255 /* A backward pass. Replace input operands with output operands. */
1257 if (regmove_dump_file)
1258 fprintf (regmove_dump_file, "Starting backward pass...\n");
1262 for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
1264 if (GET_CODE (insn) == NOTE)
1266 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
1268 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1271 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
1273 int op_no, match_no;
1276 if (! find_matches (insn, &match))
1279 /* Now scan through the operands looking for a destination operand
1280 which is supposed to match a source operand.
1281 Then scan backward for an instruction which sets the source
1282 operand. If safe, then replace the source operand with the
1283 dest operand in both instructions. */
1285 copy_src = NULL_RTX;
1286 copy_dst = NULL_RTX;
1287 for (op_no = 0; op_no < recog_n_operands; op_no++)
1289 rtx set, p, src, dst;
1290 rtx src_note, dst_note;
1292 enum reg_class src_class, dst_class;
1295 match_no = match.with[op_no];
1297 /* Nothing to do if the two operands aren't supposed to match. */
1301 dst = recog_operand[match_no];
1302 src = recog_operand[op_no];
1304 if (GET_CODE (src) != REG)
1307 if (GET_CODE (dst) != REG
1308 || REGNO (dst) < FIRST_PSEUDO_REGISTER
1309 || REG_LIVE_LENGTH (REGNO (dst)) < 0)
1312 /* If the operands already match, then there is nothing to do. */
1313 if (operands_match_p (src, dst)
1314 || (match.commutative[op_no] >= 0
1315 && operands_match_p (recog_operand[match.commutative[op_no]], dst)))
1318 set = single_set (insn);
1322 /* match_no/dst must be a write-only operand, and
1323 operand_operand/src must be a read-only operand. */
1324 if (match.use[op_no] != READ
1325 || match.use[match_no] != WRITE)
1328 if (match.early_clobber[match_no]
1329 && count_occurrences (PATTERN (insn), src) > 1)
1332 /* Make sure match_no is the destination. */
1333 if (recog_operand[match_no] != SET_DEST (set))
1336 if (REGNO (src) < FIRST_PSEUDO_REGISTER)
1338 if (GET_CODE (SET_SRC (set)) == PLUS
1339 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT
1340 && XEXP (SET_SRC (set), 0) == src
1341 && fixup_match_2 (insn, dst, src,
1342 XEXP (SET_SRC (set), 1),
1347 src_class = reg_preferred_class (REGNO (src));
1348 dst_class = reg_preferred_class (REGNO (dst));
1349 if (! regclass_compatible_p (src_class, dst_class))
1359 /* Can not modify an earlier insn to set dst if this insn
1360 uses an old value in the source. */
1361 if (reg_overlap_mentioned_p (dst, SET_SRC (set)))
1371 if (! (src_note = find_reg_note (insn, REG_DEAD, src)))
1382 /* If src is set once in a different basic block,
1383 and is set equal to a constant, then do not use
1384 it for this optimization, as this would make it
1385 no longer equivalent to a constant. */
1387 if (reg_is_remote_constant_p (src, insn, f))
1398 if (regmove_dump_file)
1399 fprintf (regmove_dump_file,
1400 "Could fix operand %d of insn %d matching operand %d.\n",
1401 op_no, INSN_UID (insn), match_no);
1403 /* Scan backward to find the first instruction that uses
1404 the input operand. If the operand is set here, then
1405 replace it in both instructions with match_no. */
1407 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p))
1411 if (GET_CODE (p) == CODE_LABEL
1412 || GET_CODE (p) == JUMP_INSN
1413 || (GET_CODE (p) == NOTE
1414 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1415 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1418 /* ??? We can't scan past the end of a basic block without
1419 updating the register lifetime info
1420 (REG_DEAD/basic_block_live_at_start).
1421 A CALL_INSN might be the last insn of a basic block, if
1422 it is inside an EH region. There is no easy way to tell,
1423 so we just always break when we see a CALL_INSN if
1424 flag_exceptions is nonzero. */
1425 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
1428 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1433 /* ??? See if all of SRC is set in P. This test is much
1434 more conservative than it needs to be. */
1435 pset = single_set (p);
1436 if (pset && SET_DEST (pset) == src)
1438 /* We use validate_replace_rtx, in case there
1439 are multiple identical source operands. All of
1440 them have to be changed at the same time. */
1441 if (validate_replace_rtx (src, dst, insn))
1443 if (validate_change (p, &SET_DEST (pset),
1448 /* Change all source operands back.
1449 This modifies the dst as a side-effect. */
1450 validate_replace_rtx (dst, src, insn);
1451 /* Now make sure the dst is right. */
1452 validate_change (insn,
1453 recog_operand_loc[match_no],
1460 if (reg_overlap_mentioned_p (src, PATTERN (p))
1461 || reg_overlap_mentioned_p (dst, PATTERN (p)))
1464 /* If we have passed a call instruction, and the
1465 pseudo-reg DST is not already live across a call,
1466 then don't perform the optimization. */
1467 if (GET_CODE (p) == CALL_INSN)
1471 if (REG_N_CALLS_CROSSED (REGNO (dst)) == 0)
1480 /* Remove the death note for SRC from INSN. */
1481 remove_note (insn, src_note);
1482 /* Move the death note for SRC to P if it is used
1484 if (reg_overlap_mentioned_p (src, PATTERN (p)))
1486 XEXP (src_note, 1) = REG_NOTES (p);
1487 REG_NOTES (p) = src_note;
1489 /* If there is a REG_DEAD note for DST on P, then remove
1490 it, because DST is now set there. */
1491 if ((dst_note = find_reg_note (p, REG_DEAD, dst)))
1492 remove_note (p, dst_note);
1494 dstno = REGNO (dst);
1495 srcno = REGNO (src);
1497 REG_N_SETS (dstno)++;
1498 REG_N_SETS (srcno)--;
1500 REG_N_CALLS_CROSSED (dstno) += num_calls;
1501 REG_N_CALLS_CROSSED (srcno) -= num_calls;
1503 REG_LIVE_LENGTH (dstno) += length;
1504 if (REG_LIVE_LENGTH (srcno) >= 0)
1506 REG_LIVE_LENGTH (srcno) -= length;
1507 /* REG_LIVE_LENGTH is only an approximation after
1508 combine if sched is not run, so make sure that we
1509 still have a reasonable value. */
1510 if (REG_LIVE_LENGTH (srcno) < 2)
1511 REG_LIVE_LENGTH (srcno) = 2;
1514 /* We assume that a register is used exactly once per
1515 insn in the updates above. If this is not correct,
1516 no great harm is done. */
1518 REG_N_REFS (dstno) += 2 * loop_depth;
1519 REG_N_REFS (srcno) -= 2 * loop_depth;
1521 /* If that was the only time src was set,
1522 and src was not live at the start of the
1523 function, we know that we have no more
1524 references to src; clear REG_N_REFS so it
1525 won't make reload do any work. */
1526 if (REG_N_SETS (REGNO (src)) == 0
1527 && ! regno_uninitialized (REGNO (src)))
1528 REG_N_REFS (REGNO (src)) = 0;
1530 if (regmove_dump_file)
1531 fprintf (regmove_dump_file,
1532 "Fixed operand %d of insn %d matching operand %d.\n",
1533 op_no, INSN_UID (insn), match_no);
1539 /* If we weren't able to replace any of the alternatives, try an
1540 alternative appoach of copying the source to the destination. */
1541 if (!success && copy_src != NULL_RTX)
1542 copy_src_to_dest (insn, copy_src, copy_dst, loop_depth,
1547 #endif /* REGISTER_CONSTRAINTS */
1549 /* In fixup_match_1, some insns may have been inserted after basic block
1550 ends. Fix that here. */
1551 for (i = 0; i < n_basic_blocks; i++)
1553 rtx end = BLOCK_END (i);
1555 rtx next = NEXT_INSN (new);
1556 while (next != 0 && INSN_UID (next) >= old_max_uid
1557 && (i == n_basic_blocks - 1 || BLOCK_HEAD (i + 1) != next))
1558 new = next, next = NEXT_INSN (new);
1559 BLOCK_END (i) = new;
1563 /* Returns nonzero if INSN's pattern has matching constraints for any operand.
1564 Returns 0 if INSN can't be recognized, or if the alternative can't be
1567 Initialize the info in MATCHP based on the constraints. */
1570 find_matches (insn, matchp)
1572 struct match *matchp;
1574 int likely_spilled[MAX_RECOG_OPERANDS];
1576 int any_matches = 0;
1578 extract_insn (insn);
1579 if (! constrain_operands (0))
1582 /* Must initialize this before main loop, because the code for
1583 the commutative case may set matches for operands other than
1585 for (op_no = recog_n_operands; --op_no >= 0; )
1586 matchp->with[op_no] = matchp->commutative[op_no] = -1;
1588 for (op_no = 0; op_no < recog_n_operands; op_no++)
1594 p = recog_constraints[op_no];
1596 likely_spilled[op_no] = 0;
1597 matchp->use[op_no] = READ;
1598 matchp->early_clobber[op_no] = 0;
1600 matchp->use[op_no] = WRITE;
1602 matchp->use[op_no] = READWRITE;
1604 for (;*p && i < which_alternative; p++)
1608 while ((c = *p++) != '\0' && c != ',')
1616 matchp->early_clobber[op_no] = 1;
1619 matchp->commutative[op_no] = op_no + 1;
1620 matchp->commutative[op_no + 1] = op_no;
1622 case '0': case '1': case '2': case '3': case '4':
1623 case '5': case '6': case '7': case '8': case '9':
1625 if (c < op_no && likely_spilled[(unsigned char) c])
1627 matchp->with[op_no] = c;
1629 if (matchp->commutative[op_no] >= 0)
1630 matchp->with[matchp->commutative[op_no]] = c;
1632 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h':
1633 case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u':
1634 case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B':
1635 case 'C': case 'D': case 'W': case 'Y': case 'Z':
1636 if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_LETTER ((unsigned char)c)))
1637 likely_spilled[op_no] = 1;
1644 /* Try to replace output operand DST in SET, with input operand SRC. SET is
1645 the only set in INSN. INSN has just been recognized and constrained.
1646 SRC is operand number OPERAND_NUMBER in INSN.
1647 DST is operand number MATCH_NUMBER in INSN.
1648 If BACKWARD is nonzero, we have been called in a backward pass.
1649 Return nonzero for success. */
1651 fixup_match_1 (insn, set, src, src_subreg, dst, backward, operand_number,
1652 match_number, regmove_dump_file)
1653 rtx insn, set, src, src_subreg, dst;
1654 int backward, operand_number, match_number;
1655 FILE *regmove_dump_file;
1658 rtx post_inc = 0, post_inc_set = 0, search_end = 0;
1660 int num_calls = 0, s_num_calls = 0;
1661 enum rtx_code code = NOTE;
1662 HOST_WIDE_INT insn_const, newconst;
1663 rtx overlap = 0; /* need to move insn ? */
1664 rtx src_note = find_reg_note (insn, REG_DEAD, src), dst_note;
1665 int length, s_length, true_loop_depth;
1669 /* Look for (set (regX) (op regA constX))
1670 (set (regY) (op regA constY))
1672 (set (regA) (op regA constX)).
1673 (set (regY) (op regA constY-constX)).
1674 This works for add and shift operations, if
1675 regA is dead after or set by the second insn. */
1677 code = GET_CODE (SET_SRC (set));
1678 if ((code == PLUS || code == LSHIFTRT
1679 || code == ASHIFT || code == ASHIFTRT)
1680 && XEXP (SET_SRC (set), 0) == src
1681 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT)
1682 insn_const = INTVAL (XEXP (SET_SRC (set), 1));
1683 else if (! stable_but_for_p (SET_SRC (set), src, dst))
1686 /* We might find a src_note while scanning. */
1690 if (regmove_dump_file)
1691 fprintf (regmove_dump_file,
1692 "Could fix operand %d of insn %d matching operand %d.\n",
1693 operand_number, INSN_UID (insn), match_number);
1695 /* If SRC is equivalent to a constant set in a different basic block,
1696 then do not use it for this optimization. We want the equivalence
1697 so that if we have to reload this register, we can reload the
1698 constant, rather than extending the lifespan of the register. */
1699 if (reg_is_remote_constant_p (src, insn, get_insns ()))
1702 /* Scan forward to find the next instruction that
1703 uses the output operand. If the operand dies here,
1704 then replace it in both instructions with
1707 for (length = s_length = 0, p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
1709 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
1710 || (GET_CODE (p) == NOTE
1711 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1712 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1715 /* ??? We can't scan past the end of a basic block without updating
1716 the register lifetime info (REG_DEAD/basic_block_live_at_start).
1717 A CALL_INSN might be the last insn of a basic block, if it is
1718 inside an EH region. There is no easy way to tell, so we just
1719 always break when we see a CALL_INSN if flag_exceptions is nonzero. */
1720 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
1723 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1730 if (reg_set_p (src, p) || reg_set_p (dst, p)
1731 || (GET_CODE (PATTERN (p)) == USE
1732 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0))))
1735 /* See if all of DST dies in P. This test is
1736 slightly more conservative than it needs to be. */
1737 if ((dst_note = find_regno_note (p, REG_DEAD, REGNO (dst)))
1738 && (GET_MODE (XEXP (dst_note, 0)) == GET_MODE (dst)))
1740 /* If we would be moving INSN, check that we won't move it
1741 into the shadow of a live a live flags register. */
1742 /* ??? We only try to move it in front of P, although
1743 we could move it anywhere between OVERLAP and P. */
1744 if (overlap && GET_MODE (PREV_INSN (p)) != VOIDmode)
1752 /* If an optimization is done, the value of SRC while P
1753 is executed will be changed. Check that this is OK. */
1754 if (reg_overlap_mentioned_p (src, PATTERN (p)))
1756 for (q = p; q; q = NEXT_INSN (q))
1758 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1759 || (GET_CODE (q) == NOTE
1760 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1761 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1767 /* ??? We can't scan past the end of a basic block without
1768 updating the register lifetime info
1769 (REG_DEAD/basic_block_live_at_start).
1770 A CALL_INSN might be the last insn of a basic block, if
1771 it is inside an EH region. There is no easy way to tell,
1772 so we just always break when we see a CALL_INSN if
1773 flag_exceptions is nonzero. */
1774 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1780 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
1782 if (reg_overlap_mentioned_p (src, PATTERN (q))
1783 || reg_set_p (src, q))
1787 set2 = single_set (q);
1788 if (! q || ! set2 || GET_CODE (SET_SRC (set2)) != code
1789 || XEXP (SET_SRC (set2), 0) != src
1790 || GET_CODE (XEXP (SET_SRC (set2), 1)) != CONST_INT
1791 || (SET_DEST (set2) != src
1792 && ! find_reg_note (q, REG_DEAD, src)))
1794 /* If this is a PLUS, we can still save a register by doing
1797 src -= insn_const; .
1798 This also gives opportunities for subsequent
1799 optimizations in the backward pass, so do it there. */
1800 if (code == PLUS && backward
1801 /* Don't do this if we can likely tie DST to SET_DEST
1802 of P later; we can't do this tying here if we got a
1804 && ! (dst_note && ! REG_N_CALLS_CROSSED (REGNO (dst))
1806 && GET_CODE (SET_DEST (single_set (p))) == REG
1807 && (REGNO (SET_DEST (single_set (p)))
1808 < FIRST_PSEUDO_REGISTER))
1809 /* We may only emit an insn directly after P if we
1810 are not in the shadow of a live flags register. */
1811 && GET_MODE (p) == VOIDmode)
1816 newconst = -insn_const;
1824 newconst = INTVAL (XEXP (SET_SRC (set2), 1)) - insn_const;
1825 /* Reject out of range shifts. */
1829 >= GET_MODE_BITSIZE (GET_MODE (SET_SRC (set2))))))
1834 if (SET_DEST (set2) != src)
1835 post_inc_set = set2;
1838 /* We use 1 as last argument to validate_change so that all
1839 changes are accepted or rejected together by apply_change_group
1840 when it is called by validate_replace_rtx . */
1841 validate_change (q, &XEXP (SET_SRC (set2), 1),
1842 GEN_INT (newconst), 1);
1844 validate_change (insn, recog_operand_loc[match_number], src, 1);
1845 if (validate_replace_rtx (dst, src_subreg, p))
1850 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
1852 if (! src_note && reg_overlap_mentioned_p (src, PATTERN (p)))
1854 /* INSN was already checked to be movable wrt. the registers that it
1855 sets / uses when we found no REG_DEAD note for src on it, but it
1856 still might clobber the flags register. We'll have to check that
1857 we won't insert it into the shadow of a live flags register when
1858 we finally know where we are to move it. */
1860 src_note = find_reg_note (p, REG_DEAD, src);
1863 /* If we have passed a call instruction, and the pseudo-reg SRC is not
1864 already live across a call, then don't perform the optimization. */
1865 if (GET_CODE (p) == CALL_INSN)
1867 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
1881 true_loop_depth = backward ? 2 - loop_depth : loop_depth;
1883 /* Remove the death note for DST from P. */
1884 remove_note (p, dst_note);
1887 post_inc = emit_insn_after (copy_rtx (PATTERN (insn)), p);
1888 if ((HAVE_PRE_INCREMENT || HAVE_PRE_DECREMENT)
1890 && try_auto_increment (search_end, post_inc, 0, src, newconst, 1))
1892 validate_change (insn, &XEXP (SET_SRC (set), 1), GEN_INT (insn_const), 0);
1893 REG_N_SETS (REGNO (src))++;
1894 REG_N_REFS (REGNO (src)) += true_loop_depth;
1895 REG_LIVE_LENGTH (REGNO (src))++;
1899 /* The lifetime of src and dest overlap,
1900 but we can change this by moving insn. */
1901 rtx pat = PATTERN (insn);
1903 remove_note (overlap, src_note);
1904 if ((HAVE_POST_INCREMENT || HAVE_POST_DECREMENT)
1906 && try_auto_increment (overlap, insn, 0, src, insn_const, 0))
1910 rtx notes = REG_NOTES (insn);
1912 emit_insn_after_with_line_notes (pat, PREV_INSN (p), insn);
1913 PUT_CODE (insn, NOTE);
1914 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1915 NOTE_SOURCE_FILE (insn) = 0;
1916 /* emit_insn_after_with_line_notes has no
1917 return value, so search for the new insn. */
1919 while (GET_RTX_CLASS (GET_CODE (insn)) != 'i'
1920 || PATTERN (insn) != pat)
1921 insn = PREV_INSN (insn);
1923 REG_NOTES (insn) = notes;
1926 /* Sometimes we'd generate src = const; src += n;
1927 if so, replace the instruction that set src
1928 in the first place. */
1930 if (! overlap && (code == PLUS || code == MINUS))
1932 rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
1934 int num_calls2 = 0, s_length2 = 0;
1936 if (note && CONSTANT_P (XEXP (note, 0)))
1938 for (q = PREV_INSN (insn); q; q = PREV_INSN(q))
1940 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1941 || (GET_CODE (q) == NOTE
1942 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1943 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1949 /* ??? We can't scan past the end of a basic block without
1950 updating the register lifetime info
1951 (REG_DEAD/basic_block_live_at_start).
1952 A CALL_INSN might be the last insn of a basic block, if
1953 it is inside an EH region. There is no easy way to tell,
1954 so we just always break when we see a CALL_INSN if
1955 flag_exceptions is nonzero. */
1956 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1962 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
1965 if (reg_set_p (src, q))
1967 set2 = single_set (q);
1970 if (reg_overlap_mentioned_p (src, PATTERN (q)))
1975 if (GET_CODE (p) == CALL_INSN)
1978 if (q && set2 && SET_DEST (set2) == src && CONSTANT_P (SET_SRC (set2))
1979 && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0))
1982 NOTE_LINE_NUMBER (q) = NOTE_INSN_DELETED;
1983 NOTE_SOURCE_FILE (q) = 0;
1984 REG_N_SETS (REGNO (src))--;
1985 REG_N_CALLS_CROSSED (REGNO (src)) -= num_calls2;
1986 REG_N_REFS (REGNO (src)) -= true_loop_depth;
1987 REG_LIVE_LENGTH (REGNO (src)) -= s_length2;
1993 if ((HAVE_PRE_INCREMENT || HAVE_PRE_DECREMENT)
1994 && (code == PLUS || code == MINUS) && insn_const
1995 && try_auto_increment (p, insn, 0, src, insn_const, 1))
1997 else if ((HAVE_POST_INCREMENT || HAVE_POST_DECREMENT)
1999 && try_auto_increment (p, post_inc, post_inc_set, src, newconst, 0))
2001 /* If post_inc still prevails, try to find an
2002 insn where it can be used as a pre-in/decrement.
2003 If code is MINUS, this was already tried. */
2004 if (post_inc && code == PLUS
2005 /* Check that newconst is likely to be usable
2006 in a pre-in/decrement before starting the search. */
2007 && ((HAVE_PRE_INCREMENT && newconst > 0 && newconst <= MOVE_MAX)
2008 || (HAVE_PRE_DECREMENT && newconst < 0 && newconst >= -MOVE_MAX))
2009 && exact_log2 (newconst))
2013 inc_dest = post_inc_set ? SET_DEST (post_inc_set) : src;
2014 for (q = post_inc; (q = NEXT_INSN (q)); )
2016 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
2017 || (GET_CODE (q) == NOTE
2018 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
2019 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
2022 /* ??? We can't scan past the end of a basic block without updating
2023 the register lifetime info (REG_DEAD/basic_block_live_at_start).
2024 A CALL_INSN might be the last insn of a basic block, if it
2025 is inside an EH region. There is no easy way to tell so we
2026 just always break when we see a CALL_INSN if flag_exceptions
2028 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
2031 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
2033 if (src != inc_dest && (reg_overlap_mentioned_p (src, PATTERN (q))
2034 || reg_set_p (src, q)))
2036 if (reg_set_p (inc_dest, q))
2038 if (reg_overlap_mentioned_p (inc_dest, PATTERN (q)))
2040 try_auto_increment (q, post_inc,
2041 post_inc_set, inc_dest, newconst, 1);
2046 /* Move the death note for DST to INSN if it is used
2048 if (reg_overlap_mentioned_p (dst, PATTERN (insn)))
2050 XEXP (dst_note, 1) = REG_NOTES (insn);
2051 REG_NOTES (insn) = dst_note;
2056 /* Move the death note for SRC from INSN to P. */
2058 remove_note (insn, src_note);
2059 XEXP (src_note, 1) = REG_NOTES (p);
2060 REG_NOTES (p) = src_note;
2062 REG_N_CALLS_CROSSED (REGNO (src)) += s_num_calls;
2065 REG_N_SETS (REGNO (src))++;
2066 REG_N_SETS (REGNO (dst))--;
2068 REG_N_CALLS_CROSSED (REGNO (dst)) -= num_calls;
2070 REG_LIVE_LENGTH (REGNO (src)) += s_length;
2071 if (REG_LIVE_LENGTH (REGNO (dst)) >= 0)
2073 REG_LIVE_LENGTH (REGNO (dst)) -= length;
2074 /* REG_LIVE_LENGTH is only an approximation after
2075 combine if sched is not run, so make sure that we
2076 still have a reasonable value. */
2077 if (REG_LIVE_LENGTH (REGNO (dst)) < 2)
2078 REG_LIVE_LENGTH (REGNO (dst)) = 2;
2081 /* We assume that a register is used exactly once per
2082 insn in the updates above. If this is not correct,
2083 no great harm is done. */
2085 REG_N_REFS (REGNO (src)) += 2 * true_loop_depth;
2086 REG_N_REFS (REGNO (dst)) -= 2 * true_loop_depth;
2088 /* If that was the only time dst was set,
2089 and dst was not live at the start of the
2090 function, we know that we have no more
2091 references to dst; clear REG_N_REFS so it
2092 won't make reload do any work. */
2093 if (REG_N_SETS (REGNO (dst)) == 0
2094 && ! regno_uninitialized (REGNO (dst)))
2095 REG_N_REFS (REGNO (dst)) = 0;
2097 if (regmove_dump_file)
2098 fprintf (regmove_dump_file,
2099 "Fixed operand %d of insn %d matching operand %d.\n",
2100 operand_number, INSN_UID (insn), match_number);
2105 /* return nonzero if X is stable but for mentioning SRC or mentioning /
2106 changing DST . If in doubt, presume it is unstable. */
2108 stable_but_for_p (x, src, dst)
2111 RTX_CODE code = GET_CODE (x);
2112 switch (GET_RTX_CLASS (code))
2114 case '<': case '1': case 'c': case '2': case 'b': case '3':
2117 const char *fmt = GET_RTX_FORMAT (code);
2118 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2119 if (fmt[i] == 'e' && ! stable_but_for_p (XEXP (x, i), src, dst))
2124 if (x == src || x == dst)
2128 return ! rtx_unstable_p (x);
2132 /* Test if regmove seems profitable for this target. Regmove is useful only
2133 if some common patterns are two address, i.e. require matching constraints,
2134 so we check that condition here. */
2137 regmove_profitable_p ()
2139 #ifdef REGISTER_CONSTRAINTS
2141 enum machine_mode mode;
2142 optab tstoptab = add_optab;
2143 do /* check add_optab and ashl_optab */
2144 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2145 mode = GET_MODE_WIDER_MODE (mode))
2147 int icode = (int) tstoptab->handlers[(int) mode].insn_code;
2148 rtx reg0, reg1, reg2, pat;
2151 if (GET_MODE_BITSIZE (mode) < 32 || icode == CODE_FOR_nothing)
2153 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2154 if (TEST_HARD_REG_BIT (reg_class_contents[GENERAL_REGS], i))
2156 if (i + 2 >= FIRST_PSEUDO_REGISTER)
2158 reg0 = gen_rtx_REG (insn_operand_mode[icode][0], i);
2159 reg1 = gen_rtx_REG (insn_operand_mode[icode][1], i + 1);
2160 reg2 = gen_rtx_REG (insn_operand_mode[icode][2], i + 2);
2161 if (! (*insn_operand_predicate[icode][0]) (reg0, VOIDmode)
2162 || ! (*insn_operand_predicate[icode][1]) (reg1, VOIDmode)
2163 || ! (*insn_operand_predicate[icode][2]) (reg2, VOIDmode))
2165 pat = GEN_FCN (icode) (reg0, reg1, reg2);
2168 if (GET_CODE (pat) == SEQUENCE)
2169 pat = XVECEXP (pat, 0, XVECLEN (pat, 0) - 1);
2171 pat = make_insn_raw (pat);
2172 if (! single_set (pat)
2173 || GET_CODE (SET_SRC (single_set (pat))) != tstoptab->code)
2174 /* Unexpected complexity; don't need to handle this unless
2175 we find a machine where this occurs and regmove should
2178 if (find_matches (pat, &match))
2182 while (tstoptab != ashl_optab && (tstoptab = ashl_optab, 1));
2183 #endif /* REGISTER_CONSTRAINTS */
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