1 /* Move registers around to reduce number of move instructions needed.
2 Copyright (C) 1987, 88, 89, 92-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This module looks for cases where matching constraints would force
22 an instruction to need a reload, and this reload would be a register
23 to register move. It then attempts to change the registers used by the
24 instruction to avoid the move instruction. */
28 #include "rtl.h" /* stdio.h must precede rtl.h for FFS. */
29 #include "insn-config.h"
34 #include "hard-reg-set.h"
37 #include "insn-flags.h"
38 #include "basic-block.h"
41 static int optimize_reg_copy_1 PROTO((rtx, rtx, rtx));
42 static void optimize_reg_copy_2 PROTO((rtx, rtx, rtx));
43 static void optimize_reg_copy_3 PROTO((rtx, rtx, rtx));
44 static rtx gen_add3_insn PROTO((rtx, rtx, rtx));
45 static void copy_src_to_dest PROTO((rtx, rtx, rtx, int));
46 static int *regmove_bb_head;
49 int with[MAX_RECOG_OPERANDS];
50 enum { READ, WRITE, READWRITE } use[MAX_RECOG_OPERANDS];
51 int commutative[MAX_RECOG_OPERANDS];
52 int early_clobber[MAX_RECOG_OPERANDS];
56 static int try_auto_increment PROTO((rtx, rtx, rtx, rtx, HOST_WIDE_INT, int));
58 static int find_matches PROTO((rtx, struct match *));
59 static int fixup_match_1 PROTO((rtx, rtx, rtx, rtx, rtx, int, int, int, FILE *))
61 static int reg_is_remote_constant_p PROTO((rtx, rtx, rtx));
62 static int stable_but_for_p PROTO((rtx, rtx, rtx));
63 static int regclass_compatible_p PROTO((int, int));
64 static int loop_depth;
66 /* Return non-zero if registers with CLASS1 and CLASS2 can be merged without
67 causing too much register allocation problems. */
69 regclass_compatible_p (class0, class1)
72 return (class0 == class1
73 || (reg_class_subset_p (class0, class1)
74 && ! CLASS_LIKELY_SPILLED_P (class0))
75 || (reg_class_subset_p (class1, class0)
76 && ! CLASS_LIKELY_SPILLED_P (class1)));
79 /* Generate and return an insn body to add r1 and c,
80 storing the result in r0. */
82 gen_add3_insn (r0, r1, c)
85 int icode = (int) add_optab->handlers[(int) GET_MODE (r0)].insn_code;
87 if (icode == CODE_FOR_nothing
88 || ! (*insn_operand_predicate[icode][0]) (r0, insn_operand_mode[icode][0])
89 || ! (*insn_operand_predicate[icode][1]) (r1, insn_operand_mode[icode][1])
90 || ! (*insn_operand_predicate[icode][2]) (c, insn_operand_mode[icode][2]))
93 return (GEN_FCN (icode) (r0, r1, c));
98 /* INC_INSN is an instruction that adds INCREMENT to REG.
99 Try to fold INC_INSN as a post/pre in/decrement into INSN.
100 Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src.
101 Return nonzero for success. */
103 try_auto_increment (insn, inc_insn, inc_insn_set, reg, increment, pre)
104 rtx reg, insn, inc_insn ,inc_insn_set;
105 HOST_WIDE_INT increment;
108 enum rtx_code inc_code;
110 rtx pset = single_set (insn);
113 /* Can't use the size of SET_SRC, we might have something like
114 (sign_extend:SI (mem:QI ... */
115 rtx use = find_use_as_address (pset, reg, 0);
116 if (use != 0 && use != (rtx) 1)
118 int size = GET_MODE_SIZE (GET_MODE (use));
120 #ifdef HAVE_POST_INCREMENT
121 || (pre == 0 && (inc_code = POST_INC, increment == size))
123 #ifdef HAVE_PRE_INCREMENT
124 || (pre == 1 && (inc_code = PRE_INC, increment == size))
126 #ifdef HAVE_POST_DECREMENT
127 || (pre == 0 && (inc_code = POST_DEC, increment == -size))
129 #ifdef HAVE_PRE_DECREMENT
130 || (pre == 1 && (inc_code = PRE_DEC, increment == -size))
137 &SET_SRC (inc_insn_set),
138 XEXP (SET_SRC (inc_insn_set), 0), 1);
139 validate_change (insn, &XEXP (use, 0),
140 gen_rtx_fmt_e (inc_code, Pmode, reg), 1);
141 if (apply_change_group ())
144 = gen_rtx_EXPR_LIST (REG_INC,
145 reg, REG_NOTES (insn));
148 PUT_CODE (inc_insn, NOTE);
149 NOTE_LINE_NUMBER (inc_insn) = NOTE_INSN_DELETED;
150 NOTE_SOURCE_FILE (inc_insn) = 0;
159 #endif /* AUTO_INC_DEC */
161 static int *regno_src_regno;
163 /* Indicate how good a choice REG (which appears as a source) is to replace
164 a destination register with. The higher the returned value, the better
165 the choice. The main objective is to avoid using a register that is
166 a candidate for tying to a hard register, since the output might in
167 turn be a candidate to be tied to a different hard register. */
169 replacement_quality(reg)
174 /* Bad if this isn't a register at all. */
175 if (GET_CODE (reg) != REG)
178 /* If this register is not meant to get a hard register,
179 it is a poor choice. */
180 if (REG_LIVE_LENGTH (REGNO (reg)) < 0)
183 src_regno = regno_src_regno[REGNO (reg)];
185 /* If it was not copied from another register, it is fine. */
189 /* Copied from a hard register? */
190 if (src_regno < FIRST_PSEUDO_REGISTER)
193 /* Copied from a pseudo register - not as bad as from a hard register,
194 yet still cumbersome, since the register live length will be lengthened
195 when the registers get tied. */
199 /* INSN is a copy from SRC to DEST, both registers, and SRC does not die
202 Search forward to see if SRC dies before either it or DEST is modified,
203 but don't scan past the end of a basic block. If so, we can replace SRC
204 with DEST and let SRC die in INSN.
206 This will reduce the number of registers live in that range and may enable
207 DEST to be tied to SRC, thus often saving one register in addition to a
208 register-register copy. */
211 optimize_reg_copy_1 (insn, dest, src)
219 int sregno = REGNO (src);
220 int dregno = REGNO (dest);
222 /* We don't want to mess with hard regs if register classes are small. */
224 || (SMALL_REGISTER_CLASSES
225 && (sregno < FIRST_PSEUDO_REGISTER
226 || dregno < FIRST_PSEUDO_REGISTER))
227 /* We don't see all updates to SP if they are in an auto-inc memory
228 reference, so we must disallow this optimization on them. */
229 || sregno == STACK_POINTER_REGNUM || dregno == STACK_POINTER_REGNUM)
232 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
234 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
235 || (GET_CODE (p) == NOTE
236 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
237 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
240 /* ??? We can't scan past the end of a basic block without updating
241 the register lifetime info (REG_DEAD/basic_block_live_at_start).
242 A CALL_INSN might be the last insn of a basic block, if it is inside
243 an EH region. There is no easy way to tell, so we just always break
244 when we see a CALL_INSN if flag_exceptions is nonzero. */
245 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
248 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
251 if (reg_set_p (src, p) || reg_set_p (dest, p)
252 /* Don't change a USE of a register. */
253 || (GET_CODE (PATTERN (p)) == USE
254 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0))))
257 /* See if all of SRC dies in P. This test is slightly more
258 conservative than it needs to be. */
259 if ((note = find_regno_note (p, REG_DEAD, sregno)) != 0
260 && GET_MODE (XEXP (note, 0)) == GET_MODE (src))
268 /* We can do the optimization. Scan forward from INSN again,
269 replacing regs as we go. Set FAILED if a replacement can't
270 be done. In that case, we can't move the death note for SRC.
271 This should be rare. */
273 /* Set to stop at next insn. */
274 for (q = next_real_insn (insn);
275 q != next_real_insn (p);
276 q = next_real_insn (q))
278 if (reg_overlap_mentioned_p (src, PATTERN (q)))
280 /* If SRC is a hard register, we might miss some
281 overlapping registers with validate_replace_rtx,
282 so we would have to undo it. We can't if DEST is
283 present in the insn, so fail in that combination
285 if (sregno < FIRST_PSEUDO_REGISTER
286 && reg_mentioned_p (dest, PATTERN (q)))
289 /* Replace all uses and make sure that the register
290 isn't still present. */
291 else if (validate_replace_rtx (src, dest, q)
292 && (sregno >= FIRST_PSEUDO_REGISTER
293 || ! reg_overlap_mentioned_p (src,
296 /* We assume that a register is used exactly once per
297 insn in the REG_N_REFS updates below. If this is not
298 correct, no great harm is done.
301 We do not undo this substitution if something later
302 fails. Therefore, we must update the other REG_N_*
303 counters now to keep them accurate. */
304 if (sregno >= FIRST_PSEUDO_REGISTER)
306 REG_N_REFS (sregno) -= loop_depth;
308 if (REG_LIVE_LENGTH (sregno) >= 0)
310 REG_LIVE_LENGTH (sregno) -= length;
311 /* REG_LIVE_LENGTH is only an approximation after
312 combine if sched is not run, so make sure that
313 we still have a reasonable value. */
314 if (REG_LIVE_LENGTH (sregno) < 2)
315 REG_LIVE_LENGTH (sregno) = 2;
318 REG_N_CALLS_CROSSED (sregno) -= n_calls;
321 if (dregno >= FIRST_PSEUDO_REGISTER)
323 REG_N_REFS (dregno) += loop_depth;
325 if (REG_LIVE_LENGTH (dregno) >= 0)
326 REG_LIVE_LENGTH (dregno) += d_length;
328 REG_N_CALLS_CROSSED (dregno) += d_n_calls;
331 /* We've done a substitution, clear the counters. */
339 validate_replace_rtx (dest, src, q);
344 /* Count the insns and CALL_INSNs passed. If we passed the
345 death note of DEST, show increased live length. */
350 /* If the insn in which SRC dies is a CALL_INSN, don't count it
351 as a call that has been crossed. Otherwise, count it. */
352 if (q != p && GET_CODE (q) == CALL_INSN)
359 /* If DEST dies here, remove the death note and save it for
360 later. Make sure ALL of DEST dies here; again, this is
361 overly conservative. */
363 && (dest_death = find_regno_note (q, REG_DEAD, dregno)) != 0)
365 if (GET_MODE (XEXP (dest_death, 0)) != GET_MODE (dest))
366 failed = 1, dest_death = 0;
368 remove_note (q, dest_death);
374 if (sregno >= FIRST_PSEUDO_REGISTER)
376 if (REG_LIVE_LENGTH (sregno) >= 0)
378 REG_LIVE_LENGTH (sregno) -= length;
379 /* REG_LIVE_LENGTH is only an approximation after
380 combine if sched is not run, so make sure that we
381 still have a reasonable value. */
382 if (REG_LIVE_LENGTH (sregno) < 2)
383 REG_LIVE_LENGTH (sregno) = 2;
386 REG_N_CALLS_CROSSED (sregno) -= n_calls;
389 if (dregno >= FIRST_PSEUDO_REGISTER)
391 if (REG_LIVE_LENGTH (dregno) >= 0)
392 REG_LIVE_LENGTH (dregno) += d_length;
394 REG_N_CALLS_CROSSED (dregno) += d_n_calls;
397 /* Move death note of SRC from P to INSN. */
398 remove_note (p, note);
399 XEXP (note, 1) = REG_NOTES (insn);
400 REG_NOTES (insn) = note;
403 /* Put death note of DEST on P if we saw it die. */
406 XEXP (dest_death, 1) = REG_NOTES (p);
407 REG_NOTES (p) = dest_death;
413 /* If SRC is a hard register which is set or killed in some other
414 way, we can't do this optimization. */
415 else if (sregno < FIRST_PSEUDO_REGISTER
416 && dead_or_set_p (p, src))
422 /* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have
423 a sequence of insns that modify DEST followed by an insn that sets
424 SRC to DEST in which DEST dies, with no prior modification of DEST.
425 (There is no need to check if the insns in between actually modify
426 DEST. We should not have cases where DEST is not modified, but
427 the optimization is safe if no such modification is detected.)
428 In that case, we can replace all uses of DEST, starting with INSN and
429 ending with the set of SRC to DEST, with SRC. We do not do this
430 optimization if a CALL_INSN is crossed unless SRC already crosses a
431 call or if DEST dies before the copy back to SRC.
433 It is assumed that DEST and SRC are pseudos; it is too complicated to do
434 this for hard registers since the substitutions we may make might fail. */
437 optimize_reg_copy_2 (insn, dest, src)
444 int sregno = REGNO (src);
445 int dregno = REGNO (dest);
447 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
449 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
450 || (GET_CODE (p) == NOTE
451 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
452 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
455 /* ??? We can't scan past the end of a basic block without updating
456 the register lifetime info (REG_DEAD/basic_block_live_at_start).
457 A CALL_INSN might be the last insn of a basic block, if it is inside
458 an EH region. There is no easy way to tell, so we just always break
459 when we see a CALL_INSN if flag_exceptions is nonzero. */
460 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
463 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
466 set = single_set (p);
467 if (set && SET_SRC (set) == dest && SET_DEST (set) == src
468 && find_reg_note (p, REG_DEAD, dest))
470 /* We can do the optimization. Scan forward from INSN again,
471 replacing regs as we go. */
473 /* Set to stop at next insn. */
474 for (q = insn; q != NEXT_INSN (p); q = NEXT_INSN (q))
475 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
477 if (reg_mentioned_p (dest, PATTERN (q)))
479 PATTERN (q) = replace_rtx (PATTERN (q), dest, src);
481 /* We assume that a register is used exactly once per
482 insn in the updates below. If this is not correct,
483 no great harm is done. */
484 REG_N_REFS (dregno) -= loop_depth;
485 REG_N_REFS (sregno) += loop_depth;
489 if (GET_CODE (q) == CALL_INSN)
491 REG_N_CALLS_CROSSED (dregno)--;
492 REG_N_CALLS_CROSSED (sregno)++;
496 remove_note (p, find_reg_note (p, REG_DEAD, dest));
497 REG_N_DEATHS (dregno)--;
498 remove_note (insn, find_reg_note (insn, REG_DEAD, src));
499 REG_N_DEATHS (sregno)--;
503 if (reg_set_p (src, p)
504 || find_reg_note (p, REG_DEAD, dest)
505 || (GET_CODE (p) == CALL_INSN && REG_N_CALLS_CROSSED (sregno) == 0))
509 /* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST.
510 Look if SRC dies there, and if it is only set once, by loading
511 it from memory. If so, try to encorporate the zero/sign extension
512 into the memory read, change SRC to the mode of DEST, and alter
513 the remaining accesses to use the appropriate SUBREG. This allows
514 SRC and DEST to be tied later. */
516 optimize_reg_copy_3 (insn, dest, src)
521 rtx src_reg = XEXP (src, 0);
522 int src_no = REGNO (src_reg);
523 int dst_no = REGNO (dest);
525 enum machine_mode old_mode;
527 if (src_no < FIRST_PSEUDO_REGISTER
528 || dst_no < FIRST_PSEUDO_REGISTER
529 || ! find_reg_note (insn, REG_DEAD, src_reg)
530 || REG_N_SETS (src_no) != 1)
532 for (p = PREV_INSN (insn); ! reg_set_p (src_reg, p); p = PREV_INSN (p))
534 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
535 || (GET_CODE (p) == NOTE
536 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
537 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
540 /* ??? We can't scan past the end of a basic block without updating
541 the register lifetime info (REG_DEAD/basic_block_live_at_start).
542 A CALL_INSN might be the last insn of a basic block, if it is inside
543 an EH region. There is no easy way to tell, so we just always break
544 when we see a CALL_INSN if flag_exceptions is nonzero. */
545 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
548 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
551 if (! (set = single_set (p))
552 || GET_CODE (SET_SRC (set)) != MEM
553 || SET_DEST (set) != src_reg)
556 /* Be conserative: although this optimization is also valid for
557 volatile memory references, that could cause trouble in later passes. */
558 if (MEM_VOLATILE_P (SET_SRC (set)))
561 /* Do not use a SUBREG to truncate from one mode to another if truncation
563 if (GET_MODE_BITSIZE (GET_MODE (src_reg)) <= GET_MODE_BITSIZE (GET_MODE (src))
564 && !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (src)),
565 GET_MODE_BITSIZE (GET_MODE (src_reg))))
568 old_mode = GET_MODE (src_reg);
569 PUT_MODE (src_reg, GET_MODE (src));
570 XEXP (src, 0) = SET_SRC (set);
572 /* Include this change in the group so that it's easily undone if
573 one of the changes in the group is invalid. */
574 validate_change (p, &SET_SRC (set), src, 1);
576 /* Now walk forward making additional replacements. We want to be able
577 to undo all the changes if a later substitution fails. */
578 subreg = gen_rtx_SUBREG (old_mode, src_reg, 0);
579 while (p = NEXT_INSN (p), p != insn)
581 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
584 /* Make a tenative change. */
585 validate_replace_rtx_group (src_reg, subreg, p);
588 validate_replace_rtx_group (src, src_reg, insn);
590 /* Now see if all the changes are valid. */
591 if (! apply_change_group ())
593 /* One or more changes were no good. Back out everything. */
594 PUT_MODE (src_reg, old_mode);
595 XEXP (src, 0) = src_reg;
600 /* If we were not able to update the users of src to use dest directly, try
601 instead moving the value to dest directly before the operation. */
604 copy_src_to_dest (insn, src, dest, loop_depth)
623 /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant
624 or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is
625 parameter when there is no frame pointer that is not allocated a register.
626 For now, we just reject them, rather than incrementing the live length. */
628 if (GET_CODE (src) == REG
629 && REG_LIVE_LENGTH (REGNO (src)) > 0
630 && GET_CODE (dest) == REG
631 && REG_LIVE_LENGTH (REGNO (dest)) > 0
632 && (set = single_set (insn)) != NULL_RTX
633 && !reg_mentioned_p (dest, SET_SRC (set))
634 && GET_MODE (src) == GET_MODE (dest))
636 int old_num_regs = reg_rtx_no;
638 /* Generate the src->dest move. */
640 emit_move_insn (dest, src);
641 seq = gen_sequence ();
643 /* If this sequence uses new registers, we may not use it. */
644 if (old_num_regs != reg_rtx_no
645 || ! validate_replace_rtx (src, dest, insn))
647 /* We have to restore reg_rtx_no to its old value, lest
648 recompute_reg_usage will try to compute the usage of the
649 new regs, yet reg_n_info is not valid for them. */
650 reg_rtx_no = old_num_regs;
653 emit_insn_before (seq, insn);
654 move_insn = PREV_INSN (insn);
655 p_move_notes = ®_NOTES (move_insn);
656 p_insn_notes = ®_NOTES (insn);
658 /* Move any notes mentioning src to the move instruction */
659 for (link = REG_NOTES (insn); link != NULL_RTX; link = next)
661 next = XEXP (link, 1);
662 if (XEXP (link, 0) == src)
664 *p_move_notes = link;
665 p_move_notes = &XEXP (link, 1);
669 *p_insn_notes = link;
670 p_insn_notes = &XEXP (link, 1);
674 *p_move_notes = NULL_RTX;
675 *p_insn_notes = NULL_RTX;
677 /* Is the insn the head of a basic block? If so extend it */
678 insn_uid = INSN_UID (insn);
679 move_uid = INSN_UID (move_insn);
680 bb = regmove_bb_head[insn_uid];
683 basic_block_head[bb] = move_insn;
684 regmove_bb_head[insn_uid] = -1;
687 /* Update the various register tables. */
688 dest_regno = REGNO (dest);
689 REG_N_SETS (dest_regno) += loop_depth;
690 REG_N_REFS (dest_regno) += loop_depth;
691 REG_LIVE_LENGTH (dest_regno)++;
692 if (REGNO_FIRST_UID (dest_regno) == insn_uid)
693 REGNO_FIRST_UID (dest_regno) = move_uid;
695 src_regno = REGNO (src);
696 if (! find_reg_note (move_insn, REG_DEAD, src))
697 REG_LIVE_LENGTH (src_regno)++;
699 if (REGNO_FIRST_UID (src_regno) == insn_uid)
700 REGNO_FIRST_UID (src_regno) = move_uid;
702 if (REGNO_LAST_UID (src_regno) == insn_uid)
703 REGNO_LAST_UID (src_regno) = move_uid;
705 if (REGNO_LAST_NOTE_UID (src_regno) == insn_uid)
706 REGNO_LAST_NOTE_UID (src_regno) = move_uid;
711 /* Return whether REG is set in only one location, and is set to a
712 constant, but is set in a different basic block from INSN (an
713 instructions which uses REG). In this case REG is equivalent to a
714 constant, and we don't want to break that equivalence, because that
715 may increase register pressure and make reload harder. If REG is
716 set in the same basic block as INSN, we don't worry about it,
717 because we'll probably need a register anyhow (??? but what if REG
718 is used in a different basic block as well as this one?). FIRST is
719 the first insn in the function. */
722 reg_is_remote_constant_p (reg, insn, first)
729 if (REG_N_SETS (REGNO (reg)) != 1)
732 /* Look for the set. */
733 for (p = LOG_LINKS (insn); p; p = XEXP (p, 1))
737 if (REG_NOTE_KIND (p) != 0)
739 s = single_set (XEXP (p, 0));
741 && GET_CODE (SET_DEST (s)) == REG
742 && REGNO (SET_DEST (s)) == REGNO (reg))
744 /* The register is set in the same basic block. */
749 for (p = first; p && p != insn; p = NEXT_INSN (p))
753 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
757 && GET_CODE (SET_DEST (s)) == REG
758 && REGNO (SET_DEST (s)) == REGNO (reg))
760 /* This is the instruction which sets REG. If there is a
761 REG_EQUAL note, then REG is equivalent to a constant. */
762 if (find_reg_note (p, REG_EQUAL, NULL_RTX))
771 /* INSN is adding a CONST_INT to a REG. We search backwards looking for
772 another add immediate instruction with the same source and dest registers,
773 and if we find one, we change INSN to an increment, and return 1. If
774 no changes are made, we return 0.
777 (set (reg100) (plus reg1 offset1))
779 (set (reg100) (plus reg1 offset2))
781 (set (reg100) (plus reg1 offset1))
783 (set (reg100) (plus reg100 offset2-offset1)) */
785 /* ??? What does this comment mean? */
786 /* cse disrupts preincrement / postdecrement squences when it finds a
787 hard register as ultimate source, like the frame pointer. */
790 fixup_match_2 (insn, dst, src, offset, regmove_dump_file)
791 rtx insn, dst, src, offset;
792 FILE *regmove_dump_file;
794 rtx p, dst_death = 0;
795 int length, num_calls = 0;
797 /* If SRC dies in INSN, we'd have to move the death note. This is
798 considered to be very unlikely, so we just skip the optimization
800 if (find_regno_note (insn, REG_DEAD, REGNO (src)))
803 /* Scan backward to find the first instruction that sets DST. */
805 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p))
809 if (GET_CODE (p) == CODE_LABEL
810 || GET_CODE (p) == JUMP_INSN
811 || (GET_CODE (p) == NOTE
812 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
813 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
816 /* ??? We can't scan past the end of a basic block without updating
817 the register lifetime info (REG_DEAD/basic_block_live_at_start).
818 A CALL_INSN might be the last insn of a basic block, if it is inside
819 an EH region. There is no easy way to tell, so we just always break
820 when we see a CALL_INSN if flag_exceptions is nonzero. */
821 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
824 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
827 if (find_regno_note (p, REG_DEAD, REGNO (dst)))
832 pset = single_set (p);
833 if (pset && SET_DEST (pset) == dst
834 && GET_CODE (SET_SRC (pset)) == PLUS
835 && XEXP (SET_SRC (pset), 0) == src
836 && GET_CODE (XEXP (SET_SRC (pset), 1)) == CONST_INT)
838 HOST_WIDE_INT newconst
839 = INTVAL (offset) - INTVAL (XEXP (SET_SRC (pset), 1));
840 rtx add = gen_add3_insn (dst, dst, GEN_INT (newconst));
842 if (add && validate_change (insn, &PATTERN (insn), add, 0))
844 /* Remove the death note for DST from DST_DEATH. */
847 remove_death (REGNO (dst), dst_death);
848 REG_LIVE_LENGTH (REGNO (dst)) += length;
849 REG_N_CALLS_CROSSED (REGNO (dst)) += num_calls;
852 REG_N_REFS (REGNO (dst)) += loop_depth;
853 REG_N_REFS (REGNO (src)) -= loop_depth;
855 if (regmove_dump_file)
856 fprintf (regmove_dump_file,
857 "Fixed operand of insn %d.\n",
861 for (p = PREV_INSN (insn); p; p = PREV_INSN (p))
863 if (GET_CODE (p) == CODE_LABEL
864 || GET_CODE (p) == JUMP_INSN
865 || (GET_CODE (p) == NOTE
866 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
867 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
869 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
871 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
873 if (try_auto_increment (p, insn, 0, dst, newconst, 0))
878 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
880 if (GET_CODE (p) == CODE_LABEL
881 || GET_CODE (p) == JUMP_INSN
882 || (GET_CODE (p) == NOTE
883 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
884 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
886 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
888 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
890 try_auto_increment (p, insn, 0, dst, newconst, 1);
899 if (reg_set_p (dst, PATTERN (p)))
902 /* If we have passed a call instruction, and the
903 pseudo-reg SRC is not already live across a call,
904 then don't perform the optimization. */
905 /* reg_set_p is overly conservative for CALL_INSNS, thinks that all
906 hard regs are clobbered. Thus, we only use it for src for
908 if (GET_CODE (p) == CALL_INSN)
913 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
916 if (call_used_regs [REGNO (dst)]
917 || find_reg_fusage (p, CLOBBER, dst))
920 else if (reg_set_p (src, PATTERN (p)))
928 regmove_optimize (f, nregs, regmove_dump_file)
931 FILE *regmove_dump_file;
933 int old_max_uid = get_max_uid ();
938 rtx copy_src, copy_dst;
940 regno_src_regno = (int *)alloca (sizeof *regno_src_regno * nregs);
941 for (i = nregs; --i >= 0; ) regno_src_regno[i] = -1;
943 regmove_bb_head = (int *)alloca (sizeof (int) * (old_max_uid + 1));
944 for (i = old_max_uid; i >= 0; i--) regmove_bb_head[i] = -1;
945 for (i = 0; i < n_basic_blocks; i++)
946 regmove_bb_head[INSN_UID (basic_block_head[i])] = i;
948 /* A forward/backward pass. Replace output operands with input operands. */
952 for (pass = 0; pass <= 2; pass++)
954 if (! flag_regmove && pass >= flag_expensive_optimizations)
957 if (regmove_dump_file)
958 fprintf (regmove_dump_file, "Starting %s pass...\n",
959 pass ? "backward" : "forward");
961 for (insn = pass ? get_last_insn () : f; insn;
962 insn = pass ? PREV_INSN (insn) : NEXT_INSN (insn))
967 if (GET_CODE (insn) == NOTE)
969 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
971 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
975 set = single_set (insn);
979 if (flag_expensive_optimizations && ! pass
980 && (GET_CODE (SET_SRC (set)) == SIGN_EXTEND
981 || GET_CODE (SET_SRC (set)) == ZERO_EXTEND)
982 && GET_CODE (XEXP (SET_SRC (set), 0)) == REG
983 && GET_CODE (SET_DEST(set)) == REG)
984 optimize_reg_copy_3 (insn, SET_DEST (set), SET_SRC (set));
986 if (flag_expensive_optimizations && ! pass
987 && GET_CODE (SET_SRC (set)) == REG
988 && GET_CODE (SET_DEST(set)) == REG)
990 /* If this is a register-register copy where SRC is not dead,
991 see if we can optimize it. If this optimization succeeds,
992 it will become a copy where SRC is dead. */
993 if ((find_reg_note (insn, REG_DEAD, SET_SRC (set))
994 || optimize_reg_copy_1 (insn, SET_DEST (set), SET_SRC (set)))
995 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER)
997 /* Similarly for a pseudo-pseudo copy when SRC is dead. */
998 if (REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER)
999 optimize_reg_copy_2 (insn, SET_DEST (set), SET_SRC (set));
1000 if (regno_src_regno[REGNO (SET_DEST (set))] < 0
1001 && SET_SRC (set) != SET_DEST (set))
1003 int srcregno = REGNO (SET_SRC(set));
1004 if (regno_src_regno[srcregno] >= 0)
1005 srcregno = regno_src_regno[srcregno];
1006 regno_src_regno[REGNO (SET_DEST (set))] = srcregno;
1013 #ifdef REGISTER_CONSTRAINTS
1014 if (! find_matches (insn, &match))
1017 /* Now scan through the operands looking for a source operand
1018 which is supposed to match the destination operand.
1019 Then scan forward for an instruction which uses the dest
1021 If it dies there, then replace the dest in both operands with
1022 the source operand. */
1024 for (op_no = 0; op_no < recog_n_operands; op_no++)
1026 rtx src, dst, src_subreg;
1027 enum reg_class src_class, dst_class;
1029 match_no = match.with[op_no];
1031 /* Nothing to do if the two operands aren't supposed to match. */
1035 src = recog_operand[op_no];
1036 dst = recog_operand[match_no];
1038 if (GET_CODE (src) != REG)
1042 if (GET_CODE (dst) == SUBREG
1043 && GET_MODE_SIZE (GET_MODE (dst))
1044 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst))))
1047 = gen_rtx_SUBREG (GET_MODE (SUBREG_REG (dst)),
1048 src, SUBREG_WORD (dst));
1049 dst = SUBREG_REG (dst);
1051 if (GET_CODE (dst) != REG
1052 || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1055 if (REGNO (src) < FIRST_PSEUDO_REGISTER)
1057 if (match.commutative[op_no] < op_no)
1058 regno_src_regno[REGNO (dst)] = REGNO (src);
1062 if (REG_LIVE_LENGTH (REGNO (src)) < 0)
1065 /* op_no/src must be a read-only operand, and
1066 match_operand/dst must be a write-only operand. */
1067 if (match.use[op_no] != READ
1068 || match.use[match_no] != WRITE)
1071 if (match.early_clobber[match_no]
1072 && count_occurrences (PATTERN (insn), src) > 1)
1075 /* Make sure match_operand is the destination. */
1076 if (recog_operand[match_no] != SET_DEST (set))
1079 /* If the operands already match, then there is nothing to do. */
1080 /* But in the commutative case, we might find a better match. */
1081 if (operands_match_p (src, dst)
1082 || (match.commutative[op_no] >= 0
1083 && operands_match_p (recog_operand[match.commutative
1085 && (replacement_quality (recog_operand[match.commutative
1087 >= replacement_quality (src))))
1090 src_class = reg_preferred_class (REGNO (src));
1091 dst_class = reg_preferred_class (REGNO (dst));
1092 if (! regclass_compatible_p (src_class, dst_class))
1095 if (fixup_match_1 (insn, set, src, src_subreg, dst, pass,
1103 /* A backward pass. Replace input operands with output operands. */
1105 if (regmove_dump_file)
1106 fprintf (regmove_dump_file, "Starting backward pass...\n");
1110 for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
1112 if (GET_CODE (insn) == NOTE)
1114 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
1116 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1119 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
1121 int op_no, match_no;
1124 if (! find_matches (insn, &match))
1127 /* Now scan through the operands looking for a destination operand
1128 which is supposed to match a source operand.
1129 Then scan backward for an instruction which sets the source
1130 operand. If safe, then replace the source operand with the
1131 dest operand in both instructions. */
1133 copy_src = NULL_RTX;
1134 copy_dst = NULL_RTX;
1135 for (op_no = 0; op_no < recog_n_operands; op_no++)
1137 rtx set, p, src, dst;
1138 rtx src_note, dst_note;
1140 enum reg_class src_class, dst_class;
1143 match_no = match.with[op_no];
1145 /* Nothing to do if the two operands aren't supposed to match. */
1149 dst = recog_operand[match_no];
1150 src = recog_operand[op_no];
1152 if (GET_CODE (src) != REG)
1155 if (GET_CODE (dst) != REG
1156 || REGNO (dst) < FIRST_PSEUDO_REGISTER
1157 || REG_LIVE_LENGTH (REGNO (dst)) < 0)
1160 /* If the operands already match, then there is nothing to do. */
1161 if (operands_match_p (src, dst)
1162 || (match.commutative[op_no] >= 0
1163 && operands_match_p (recog_operand[match.commutative[op_no]], dst)))
1166 set = single_set (insn);
1170 /* match_no/dst must be a write-only operand, and
1171 operand_operand/src must be a read-only operand. */
1172 if (match.use[op_no] != READ
1173 || match.use[match_no] != WRITE)
1176 if (match.early_clobber[match_no]
1177 && count_occurrences (PATTERN (insn), src) > 1)
1180 /* Make sure match_no is the destination. */
1181 if (recog_operand[match_no] != SET_DEST (set))
1184 if (REGNO (src) < FIRST_PSEUDO_REGISTER)
1186 if (GET_CODE (SET_SRC (set)) == PLUS
1187 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT
1188 && XEXP (SET_SRC (set), 0) == src
1189 && fixup_match_2 (insn, dst, src,
1190 XEXP (SET_SRC (set), 1),
1195 src_class = reg_preferred_class (REGNO (src));
1196 dst_class = reg_preferred_class (REGNO (dst));
1197 if (! regclass_compatible_p (src_class, dst_class))
1207 /* Can not modify an earlier insn to set dst if this insn
1208 uses an old value in the source. */
1209 if (reg_overlap_mentioned_p (dst, SET_SRC (set)))
1219 if (! (src_note = find_reg_note (insn, REG_DEAD, src)))
1230 /* If src is set once in a different basic block,
1231 and is set equal to a constant, then do not use
1232 it for this optimization, as this would make it
1233 no longer equivalent to a constant. */
1235 if (reg_is_remote_constant_p (src, insn, f))
1246 if (regmove_dump_file)
1247 fprintf (regmove_dump_file,
1248 "Could fix operand %d of insn %d matching operand %d.\n",
1249 op_no, INSN_UID (insn), match_no);
1251 /* Scan backward to find the first instruction that uses
1252 the input operand. If the operand is set here, then
1253 replace it in both instructions with match_no. */
1255 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p))
1259 if (GET_CODE (p) == CODE_LABEL
1260 || GET_CODE (p) == JUMP_INSN
1261 || (GET_CODE (p) == NOTE
1262 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1263 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1266 /* ??? We can't scan past the end of a basic block without
1267 updating the register lifetime info
1268 (REG_DEAD/basic_block_live_at_start).
1269 A CALL_INSN might be the last insn of a basic block, if
1270 it is inside an EH region. There is no easy way to tell,
1271 so we just always break when we see a CALL_INSN if
1272 flag_exceptions is nonzero. */
1273 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
1276 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1281 /* ??? See if all of SRC is set in P. This test is much
1282 more conservative than it needs to be. */
1283 pset = single_set (p);
1284 if (pset && SET_DEST (pset) == src)
1286 /* We use validate_replace_rtx, in case there
1287 are multiple identical source operands. All of
1288 them have to be changed at the same time. */
1289 if (validate_replace_rtx (src, dst, insn))
1291 if (validate_change (p, &SET_DEST (pset),
1296 /* Change all source operands back.
1297 This modifies the dst as a side-effect. */
1298 validate_replace_rtx (dst, src, insn);
1299 /* Now make sure the dst is right. */
1300 validate_change (insn,
1301 recog_operand_loc[match_no],
1308 if (reg_overlap_mentioned_p (src, PATTERN (p))
1309 || reg_overlap_mentioned_p (dst, PATTERN (p)))
1312 /* If we have passed a call instruction, and the
1313 pseudo-reg DST is not already live across a call,
1314 then don't perform the optimization. */
1315 if (GET_CODE (p) == CALL_INSN)
1319 if (REG_N_CALLS_CROSSED (REGNO (dst)) == 0)
1328 /* Remove the death note for SRC from INSN. */
1329 remove_note (insn, src_note);
1330 /* Move the death note for SRC to P if it is used
1332 if (reg_overlap_mentioned_p (src, PATTERN (p)))
1334 XEXP (src_note, 1) = REG_NOTES (p);
1335 REG_NOTES (p) = src_note;
1337 /* If there is a REG_DEAD note for DST on P, then remove
1338 it, because DST is now set there. */
1339 if ((dst_note = find_reg_note (p, REG_DEAD, dst)))
1340 remove_note (p, dst_note);
1342 dstno = REGNO (dst);
1343 srcno = REGNO (src);
1345 REG_N_SETS (dstno)++;
1346 REG_N_SETS (srcno)--;
1348 REG_N_CALLS_CROSSED (dstno) += num_calls;
1349 REG_N_CALLS_CROSSED (srcno) -= num_calls;
1351 REG_LIVE_LENGTH (dstno) += length;
1352 if (REG_LIVE_LENGTH (srcno) >= 0)
1354 REG_LIVE_LENGTH (srcno) -= length;
1355 /* REG_LIVE_LENGTH is only an approximation after
1356 combine if sched is not run, so make sure that we
1357 still have a reasonable value. */
1358 if (REG_LIVE_LENGTH (srcno) < 2)
1359 REG_LIVE_LENGTH (srcno) = 2;
1362 /* We assume that a register is used exactly once per
1363 insn in the updates above. If this is not correct,
1364 no great harm is done. */
1366 REG_N_REFS (dstno) += 2 * loop_depth;
1367 REG_N_REFS (srcno) -= 2 * loop_depth;
1369 /* If that was the only time src was set,
1370 and src was not live at the start of the
1371 function, we know that we have no more
1372 references to src; clear REG_N_REFS so it
1373 won't make reload do any work. */
1374 if (REG_N_SETS (REGNO (src)) == 0
1375 && ! regno_uninitialized (REGNO (src)))
1376 REG_N_REFS (REGNO (src)) = 0;
1378 if (regmove_dump_file)
1379 fprintf (regmove_dump_file,
1380 "Fixed operand %d of insn %d matching operand %d.\n",
1381 op_no, INSN_UID (insn), match_no);
1387 /* If we weren't able to replace any of the alternatives, try an
1388 alternative appoach of copying the source to the destination. */
1389 if (!success && copy_src != NULL_RTX)
1390 copy_src_to_dest (insn, copy_src, copy_dst, loop_depth);
1394 #endif /* REGISTER_CONSTRAINTS */
1396 /* In fixup_match_1, some insns may have been inserted after basic block
1397 ends. Fix that here. */
1398 for (i = 0; i < n_basic_blocks; i++)
1400 rtx end = basic_block_end[i];
1402 rtx next = NEXT_INSN (new);
1403 while (next != 0 && INSN_UID (next) >= old_max_uid
1404 && (i == n_basic_blocks - 1 || basic_block_head[i + 1] != next))
1405 new = next, next = NEXT_INSN (new);
1406 basic_block_end[i] = new;
1410 /* Returns nonzero if INSN's pattern has matching constraints for any operand.
1411 Returns 0 if INSN can't be recognized, or if the alternative can't be
1414 Initialize the info in MATCHP based on the constraints. */
1417 find_matches (insn, matchp)
1419 struct match *matchp;
1421 int likely_spilled[MAX_RECOG_OPERANDS];
1423 int any_matches = 0;
1425 extract_insn (insn);
1426 if (! constrain_operands (0))
1429 /* Must initialize this before main loop, because the code for
1430 the commutative case may set matches for operands other than
1432 for (op_no = recog_n_operands; --op_no >= 0; )
1433 matchp->with[op_no] = matchp->commutative[op_no] = -1;
1435 for (op_no = 0; op_no < recog_n_operands; op_no++)
1440 p = recog_constraints[op_no];
1442 likely_spilled[op_no] = 0;
1443 matchp->use[op_no] = READ;
1444 matchp->early_clobber[op_no] = 0;
1446 matchp->use[op_no] = WRITE;
1448 matchp->use[op_no] = READWRITE;
1450 for (;*p && i < which_alternative; p++)
1454 while ((c = *p++) != '\0' && c != ',')
1462 matchp->early_clobber[op_no] = 1;
1465 matchp->commutative[op_no] = op_no + 1;
1466 matchp->commutative[op_no + 1] = op_no;
1468 case '0': case '1': case '2': case '3': case '4':
1469 case '5': case '6': case '7': case '8': case '9':
1471 if (c < op_no && likely_spilled[(unsigned char) c])
1473 matchp->with[op_no] = c;
1475 if (matchp->commutative[op_no] >= 0)
1476 matchp->with[matchp->commutative[op_no]] = c;
1478 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h':
1479 case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u':
1480 case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B':
1481 case 'C': case 'D': case 'W': case 'Y': case 'Z':
1482 if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_LETTER (c)))
1483 likely_spilled[op_no] = 1;
1490 /* Try to replace output operand DST in SET, with input operand SRC. SET is
1491 the only set in INSN. INSN has just been recgnized and constrained.
1492 SRC is operand number OPERAND_NUMBER in INSN.
1493 DST is operand number MATCH_NUMBER in INSN.
1494 If BACKWARD is nonzero, we have been called in a backward pass.
1495 Return nonzero for success. */
1497 fixup_match_1 (insn, set, src, src_subreg, dst, backward, operand_number,
1498 match_number, regmove_dump_file)
1499 rtx insn, set, src, src_subreg, dst;
1500 int backward, operand_number, match_number;
1501 FILE *regmove_dump_file;
1504 rtx post_inc = 0, post_inc_set = 0, search_end = 0;
1506 int num_calls = 0, s_num_calls = 0;
1507 enum rtx_code code = NOTE;
1508 HOST_WIDE_INT insn_const, newconst;
1509 rtx overlap = 0; /* need to move insn ? */
1510 rtx src_note = find_reg_note (insn, REG_DEAD, src), dst_note;
1511 int length, s_length, true_loop_depth;
1515 /* Look for (set (regX) (op regA constX))
1516 (set (regY) (op regA constY))
1518 (set (regA) (op regA constX)).
1519 (set (regY) (op regA constY-constX)).
1520 This works for add and shift operations, if
1521 regA is dead after or set by the second insn. */
1523 code = GET_CODE (SET_SRC (set));
1524 if ((code == PLUS || code == LSHIFTRT
1525 || code == ASHIFT || code == ASHIFTRT)
1526 && XEXP (SET_SRC (set), 0) == src
1527 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT)
1528 insn_const = INTVAL (XEXP (SET_SRC (set), 1));
1529 else if (! stable_but_for_p (SET_SRC (set), src, dst))
1532 /* We might find a src_note while scanning. */
1536 if (regmove_dump_file)
1537 fprintf (regmove_dump_file,
1538 "Could fix operand %d of insn %d matching operand %d.\n",
1539 operand_number, INSN_UID (insn), match_number);
1541 /* If SRC is equivalent to a constant set in a different basic block,
1542 then do not use it for this optimization. We want the equivalence
1543 so that if we have to reload this register, we can reload the
1544 constant, rather than extending the lifespan of the register. */
1545 if (reg_is_remote_constant_p (src, insn, get_insns ()))
1548 /* Scan forward to find the next instruction that
1549 uses the output operand. If the operand dies here,
1550 then replace it in both instructions with
1553 for (length = s_length = 0, p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
1555 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
1556 || (GET_CODE (p) == NOTE
1557 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1558 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1561 /* ??? We can't scan past the end of a basic block without updating
1562 the register lifetime info (REG_DEAD/basic_block_live_at_start).
1563 A CALL_INSN might be the last insn of a basic block, if it is
1564 inside an EH region. There is no easy way to tell, so we just
1565 always break when we see a CALL_INSN if flag_exceptions is nonzero. */
1566 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
1569 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1576 if (reg_set_p (src, p) || reg_set_p (dst, p)
1577 || (GET_CODE (PATTERN (p)) == USE
1578 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0))))
1581 /* See if all of DST dies in P. This test is
1582 slightly more conservative than it needs to be. */
1583 if ((dst_note = find_regno_note (p, REG_DEAD, REGNO (dst)))
1584 && (GET_MODE (XEXP (dst_note, 0)) == GET_MODE (dst)))
1591 /* If an optimization is done, the value of SRC while P
1592 is executed will be changed. Check that this is OK. */
1593 if (reg_overlap_mentioned_p (src, PATTERN (p)))
1595 for (q = p; q; q = NEXT_INSN (q))
1597 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1598 || (GET_CODE (q) == NOTE
1599 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1600 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1606 /* ??? We can't scan past the end of a basic block without
1607 updating the register lifetime info
1608 (REG_DEAD/basic_block_live_at_start).
1609 A CALL_INSN might be the last insn of a basic block, if
1610 it is inside an EH region. There is no easy way to tell,
1611 so we just always break when we see a CALL_INSN if
1612 flag_exceptions is nonzero. */
1613 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1619 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
1621 if (reg_overlap_mentioned_p (src, PATTERN (q))
1622 || reg_set_p (src, q))
1626 set2 = single_set (q);
1627 if (! q || ! set2 || GET_CODE (SET_SRC (set2)) != code
1628 || XEXP (SET_SRC (set2), 0) != src
1629 || GET_CODE (XEXP (SET_SRC (set2), 1)) != CONST_INT
1630 || (SET_DEST (set2) != src
1631 && ! find_reg_note (q, REG_DEAD, src)))
1633 /* If this is a PLUS, we can still save a register by doing
1636 src -= insn_const; .
1637 This also gives opportunities for subsequent
1638 optimizations in the backward pass, so do it there. */
1639 if (code == PLUS && backward
1640 /* Don't do this if we can likely tie DST to SET_DEST
1641 of P later; we can't do this tying here if we got a
1643 && ! (dst_note && ! REG_N_CALLS_CROSSED (REGNO (dst))
1645 && GET_CODE (SET_DEST (single_set (p))) == REG
1646 && (REGNO (SET_DEST (single_set (p)))
1647 < FIRST_PSEUDO_REGISTER))
1649 /* We may not emit an insn directly
1650 after P if the latter sets CC0. */
1651 && ! sets_cc0_p (PATTERN (p))
1659 newconst = -insn_const;
1667 newconst = INTVAL (XEXP (SET_SRC (set2), 1)) - insn_const;
1668 /* Reject out of range shifts. */
1672 >= GET_MODE_BITSIZE (GET_MODE (SET_SRC (set2))))))
1677 if (SET_DEST (set2) != src)
1678 post_inc_set = set2;
1681 /* We use 1 as last argument to validate_change so that all
1682 changes are accepted or rejected together by apply_change_group
1683 when it is called by validate_replace_rtx . */
1684 validate_change (q, &XEXP (SET_SRC (set2), 1),
1685 GEN_INT (newconst), 1);
1687 validate_change (insn, recog_operand_loc[match_number], src, 1);
1688 if (validate_replace_rtx (dst, src_subreg, p))
1693 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
1695 if (! src_note && reg_overlap_mentioned_p (src, PATTERN (p)))
1697 /* INSN was already checked to be movable when
1698 we found no REG_DEAD note for src on it. */
1700 src_note = find_reg_note (p, REG_DEAD, src);
1703 /* If we have passed a call instruction, and the pseudo-reg SRC is not
1704 already live across a call, then don't perform the optimization. */
1705 if (GET_CODE (p) == CALL_INSN)
1707 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
1721 true_loop_depth = backward ? 2 - loop_depth : loop_depth;
1723 /* Remove the death note for DST from P. */
1724 remove_note (p, dst_note);
1727 post_inc = emit_insn_after (copy_rtx (PATTERN (insn)), p);
1728 #if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT)
1730 && try_auto_increment (search_end, post_inc, 0, src, newconst, 1))
1733 validate_change (insn, &XEXP (SET_SRC (set), 1), GEN_INT (insn_const), 0);
1734 REG_N_SETS (REGNO (src))++;
1735 REG_N_REFS (REGNO (src)) += true_loop_depth;
1736 REG_LIVE_LENGTH (REGNO (src))++;
1740 /* The lifetime of src and dest overlap,
1741 but we can change this by moving insn. */
1742 rtx pat = PATTERN (insn);
1744 remove_note (overlap, src_note);
1745 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_POST_DECREMENT)
1747 && try_auto_increment (overlap, insn, 0, src, insn_const, 0))
1752 rtx notes = REG_NOTES (insn);
1754 emit_insn_after_with_line_notes (pat, PREV_INSN (p), insn);
1755 PUT_CODE (insn, NOTE);
1756 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1757 NOTE_SOURCE_FILE (insn) = 0;
1758 /* emit_insn_after_with_line_notes has no
1759 return value, so search for the new insn. */
1760 for (insn = p; PATTERN (insn) != pat; )
1761 insn = PREV_INSN (insn);
1763 REG_NOTES (insn) = notes;
1766 /* Sometimes we'd generate src = const; src += n;
1767 if so, replace the instruction that set src
1768 in the first place. */
1770 if (! overlap && (code == PLUS || code == MINUS))
1772 rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
1774 int num_calls2 = 0, s_length2 = 0;
1776 if (note && CONSTANT_P (XEXP (note, 0)))
1778 for (q = PREV_INSN (insn); q; q = PREV_INSN(q))
1780 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1781 || (GET_CODE (q) == NOTE
1782 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1783 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1789 /* ??? We can't scan past the end of a basic block without
1790 updating the register lifetime info
1791 (REG_DEAD/basic_block_live_at_start).
1792 A CALL_INSN might be the last insn of a basic block, if
1793 it is inside an EH region. There is no easy way to tell,
1794 so we just always break when we see a CALL_INSN if
1795 flag_exceptions is nonzero. */
1796 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1802 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
1805 if (reg_set_p (src, q))
1807 set2 = single_set (q);
1810 if (reg_overlap_mentioned_p (src, PATTERN (q)))
1815 if (GET_CODE (p) == CALL_INSN)
1818 if (q && set2 && SET_DEST (set2) == src && CONSTANT_P (SET_SRC (set2))
1819 && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0))
1822 NOTE_LINE_NUMBER (q) = NOTE_INSN_DELETED;
1823 NOTE_SOURCE_FILE (q) = 0;
1824 REG_N_SETS (REGNO (src))--;
1825 REG_N_CALLS_CROSSED (REGNO (src)) -= num_calls2;
1826 REG_N_REFS (REGNO (src)) -= true_loop_depth;
1827 REG_LIVE_LENGTH (REGNO (src)) -= s_length2;
1833 /* Don't remove this seemingly useless if, it is needed to pair with the
1834 else in the next two conditionally included code blocks. */
1837 #if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT)
1838 else if ((code == PLUS || code == MINUS) && insn_const
1839 && try_auto_increment (p, insn, 0, src, insn_const, 1))
1842 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_POST_DECREMENT)
1844 && try_auto_increment (p, post_inc, post_inc_set, src, newconst, 0))
1847 #if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT)
1848 /* If post_inc still prevails, try to find an
1849 insn where it can be used as a pre-in/decrement.
1850 If code is MINUS, this was already tried. */
1851 if (post_inc && code == PLUS
1852 /* Check that newconst is likely to be usable
1853 in a pre-in/decrement before starting the search. */
1855 #if defined (HAVE_PRE_INCREMENT)
1856 || (newconst > 0 && newconst <= MOVE_MAX)
1858 #if defined (HAVE_PRE_DECREMENT)
1859 || (newconst < 0 && newconst >= -MOVE_MAX)
1861 ) && exact_log2 (newconst))
1865 inc_dest = post_inc_set ? SET_DEST (post_inc_set) : src;
1866 for (q = post_inc; (q = NEXT_INSN (q)); )
1868 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1869 || (GET_CODE (q) == NOTE
1870 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1871 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1874 /* ??? We can't scan past the end of a basic block without updating
1875 the register lifetime info (REG_DEAD/basic_block_live_at_start).
1876 A CALL_INSN might be the last insn of a basic block, if it
1877 is inside an EH region. There is no easy way to tell so we
1878 just always break when we see a CALL_INSN if flag_exceptions
1880 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1883 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
1885 if (src != inc_dest && (reg_overlap_mentioned_p (src, PATTERN (q))
1886 || reg_set_p (src, q)))
1888 if (reg_set_p (inc_dest, q))
1890 if (reg_overlap_mentioned_p (inc_dest, PATTERN (q)))
1892 try_auto_increment (q, post_inc,
1893 post_inc_set, inc_dest, newconst, 1);
1898 #endif /* defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) */
1899 /* Move the death note for DST to INSN if it is used
1901 if (reg_overlap_mentioned_p (dst, PATTERN (insn)))
1903 XEXP (dst_note, 1) = REG_NOTES (insn);
1904 REG_NOTES (insn) = dst_note;
1909 /* Move the death note for SRC from INSN to P. */
1911 remove_note (insn, src_note);
1912 XEXP (src_note, 1) = REG_NOTES (p);
1913 REG_NOTES (p) = src_note;
1915 REG_N_CALLS_CROSSED (REGNO (src)) += s_num_calls;
1918 REG_N_SETS (REGNO (src))++;
1919 REG_N_SETS (REGNO (dst))--;
1921 REG_N_CALLS_CROSSED (REGNO (dst)) -= num_calls;
1923 REG_LIVE_LENGTH (REGNO (src)) += s_length;
1924 if (REG_LIVE_LENGTH (REGNO (dst)) >= 0)
1926 REG_LIVE_LENGTH (REGNO (dst)) -= length;
1927 /* REG_LIVE_LENGTH is only an approximation after
1928 combine if sched is not run, so make sure that we
1929 still have a reasonable value. */
1930 if (REG_LIVE_LENGTH (REGNO (dst)) < 2)
1931 REG_LIVE_LENGTH (REGNO (dst)) = 2;
1934 /* We assume that a register is used exactly once per
1935 insn in the updates above. If this is not correct,
1936 no great harm is done. */
1938 REG_N_REFS (REGNO (src)) += 2 * true_loop_depth;
1939 REG_N_REFS (REGNO (dst)) -= 2 * true_loop_depth;
1941 /* If that was the only time dst was set,
1942 and dst was not live at the start of the
1943 function, we know that we have no more
1944 references to dst; clear REG_N_REFS so it
1945 won't make reload do any work. */
1946 if (REG_N_SETS (REGNO (dst)) == 0
1947 && ! regno_uninitialized (REGNO (dst)))
1948 REG_N_REFS (REGNO (dst)) = 0;
1950 if (regmove_dump_file)
1951 fprintf (regmove_dump_file,
1952 "Fixed operand %d of insn %d matching operand %d.\n",
1953 operand_number, INSN_UID (insn), match_number);
1958 /* return nonzero if X is stable but for mentioning SRC or mentioning /
1959 changing DST . If in doubt, presume it is unstable. */
1961 stable_but_for_p (x, src, dst)
1964 RTX_CODE code = GET_CODE (x);
1965 switch (GET_RTX_CLASS (code))
1967 case '<': case '1': case 'c': case '2': case 'b': case '3':
1970 char *fmt = GET_RTX_FORMAT (code);
1971 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1972 if (fmt[i] == 'e' && ! stable_but_for_p (XEXP (x, i), src, dst))
1977 if (x == src || x == dst)
1981 return ! rtx_unstable_p (x);
1985 /* Test if regmove seems profitable for this target. Regmove is useful only
1986 if some common patterns are two address, i.e. require matching constraints,
1987 so we check that condition here. */
1990 regmove_profitable_p ()
1992 #ifdef REGISTER_CONSTRAINTS
1994 enum machine_mode mode;
1995 optab tstoptab = add_optab;
1996 do /* check add_optab and ashl_optab */
1997 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1998 mode = GET_MODE_WIDER_MODE (mode))
2000 int icode = (int) tstoptab->handlers[(int) mode].insn_code;
2001 rtx reg0, reg1, reg2, pat;
2004 if (GET_MODE_BITSIZE (mode) < 32 || icode == CODE_FOR_nothing)
2006 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2007 if (TEST_HARD_REG_BIT (reg_class_contents[GENERAL_REGS], i))
2009 if (i + 2 >= FIRST_PSEUDO_REGISTER)
2011 reg0 = gen_rtx_REG (insn_operand_mode[icode][0], i);
2012 reg1 = gen_rtx_REG (insn_operand_mode[icode][1], i + 1);
2013 reg2 = gen_rtx_REG (insn_operand_mode[icode][2], i + 2);
2014 if (! (*insn_operand_predicate[icode][0]) (reg0, VOIDmode)
2015 || ! (*insn_operand_predicate[icode][1]) (reg1, VOIDmode)
2016 || ! (*insn_operand_predicate[icode][2]) (reg2, VOIDmode))
2018 pat = GEN_FCN (icode) (reg0, reg1, reg2);
2021 if (GET_CODE (pat) == SEQUENCE)
2022 pat = XVECEXP (pat, 0, XVECLEN (pat, 0) - 1);
2024 pat = make_insn_raw (pat);
2025 if (! single_set (pat)
2026 || GET_CODE (SET_SRC (single_set (pat))) != tstoptab->code)
2027 /* Unexpected complexity; don't need to handle this unless
2028 we find a machine where this occurs and regmove should
2031 if (find_matches (pat, &match))
2035 while (tstoptab != ashl_optab && (tstoptab = ashl_optab, 1));
2036 #endif /* REGISTER_CONSTRAINTS */