1 /* Move registers around to reduce number of move instructions needed.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* This module looks for cases where matching constraints would force
24 an instruction to need a reload, and this reload would be a register
25 to register move. It then attempts to change the registers used by the
26 instruction to avoid the move instruction. */
30 #include "rtl.h" /* stdio.h must precede rtl.h for FFS. */
32 #include "insn-config.h"
36 #include "hard-reg-set.h"
40 #include "basic-block.h"
46 /* Turn STACK_GROWS_DOWNWARD into a boolean. */
47 #ifdef STACK_GROWS_DOWNWARD
48 #undef STACK_GROWS_DOWNWARD
49 #define STACK_GROWS_DOWNWARD 1
51 #define STACK_GROWS_DOWNWARD 0
54 static int perhaps_ends_bb_p PARAMS ((rtx));
55 static int optimize_reg_copy_1 PARAMS ((rtx, rtx, rtx));
56 static void optimize_reg_copy_2 PARAMS ((rtx, rtx, rtx));
57 static void optimize_reg_copy_3 PARAMS ((rtx, rtx, rtx));
58 static rtx gen_add3_insn PARAMS ((rtx, rtx, rtx));
59 static void copy_src_to_dest PARAMS ((rtx, rtx, rtx, int));
60 static int *regmove_bb_head;
63 int with[MAX_RECOG_OPERANDS];
64 enum { READ, WRITE, READWRITE } use[MAX_RECOG_OPERANDS];
65 int commutative[MAX_RECOG_OPERANDS];
66 int early_clobber[MAX_RECOG_OPERANDS];
69 static rtx discover_flags_reg PARAMS ((void));
70 static void mark_flags_life_zones PARAMS ((rtx));
71 static void flags_set_1 PARAMS ((rtx, rtx, void *));
73 static int try_auto_increment PARAMS ((rtx, rtx, rtx, rtx, HOST_WIDE_INT, int));
74 static int find_matches PARAMS ((rtx, struct match *));
75 static void replace_in_call_usage PARAMS ((rtx *, int, rtx, rtx));
76 static int fixup_match_1 PARAMS ((rtx, rtx, rtx, rtx, rtx, int, int, int, FILE *))
78 static int reg_is_remote_constant_p PARAMS ((rtx, rtx, rtx));
79 static int stable_and_no_regs_but_for_p PARAMS ((rtx, rtx, rtx));
80 static int regclass_compatible_p PARAMS ((int, int));
81 static int replacement_quality PARAMS ((rtx));
82 static int fixup_match_2 PARAMS ((rtx, rtx, rtx, rtx, FILE *));
84 /* Return non-zero if registers with CLASS1 and CLASS2 can be merged without
85 causing too much register allocation problems. */
87 regclass_compatible_p (class0, class1)
90 return (class0 == class1
91 || (reg_class_subset_p (class0, class1)
92 && ! CLASS_LIKELY_SPILLED_P (class0))
93 || (reg_class_subset_p (class1, class0)
94 && ! CLASS_LIKELY_SPILLED_P (class1)));
97 /* Generate and return an insn body to add r1 and c,
98 storing the result in r0. */
100 gen_add3_insn (r0, r1, c)
103 int icode = (int) add_optab->handlers[(int) GET_MODE (r0)].insn_code;
105 if (icode == CODE_FOR_nothing
106 || ! ((*insn_data[icode].operand[0].predicate)
107 (r0, insn_data[icode].operand[0].mode))
108 || ! ((*insn_data[icode].operand[1].predicate)
109 (r1, insn_data[icode].operand[1].mode))
110 || ! ((*insn_data[icode].operand[2].predicate)
111 (c, insn_data[icode].operand[2].mode)))
114 return (GEN_FCN (icode) (r0, r1, c));
118 /* INC_INSN is an instruction that adds INCREMENT to REG.
119 Try to fold INC_INSN as a post/pre in/decrement into INSN.
120 Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src.
121 Return nonzero for success. */
123 try_auto_increment (insn, inc_insn, inc_insn_set, reg, increment, pre)
124 rtx reg, insn, inc_insn ,inc_insn_set;
125 HOST_WIDE_INT increment;
128 enum rtx_code inc_code;
130 rtx pset = single_set (insn);
133 /* Can't use the size of SET_SRC, we might have something like
134 (sign_extend:SI (mem:QI ... */
135 rtx use = find_use_as_address (pset, reg, 0);
136 if (use != 0 && use != (rtx) 1)
138 int size = GET_MODE_SIZE (GET_MODE (use));
140 || (HAVE_POST_INCREMENT
141 && pre == 0 && (inc_code = POST_INC, increment == size))
142 || (HAVE_PRE_INCREMENT
143 && pre == 1 && (inc_code = PRE_INC, increment == size))
144 || (HAVE_POST_DECREMENT
145 && pre == 0 && (inc_code = POST_DEC, increment == -size))
146 || (HAVE_PRE_DECREMENT
147 && pre == 1 && (inc_code = PRE_DEC, increment == -size))
153 &SET_SRC (inc_insn_set),
154 XEXP (SET_SRC (inc_insn_set), 0), 1);
155 validate_change (insn, &XEXP (use, 0),
156 gen_rtx_fmt_e (inc_code, Pmode, reg), 1);
157 if (apply_change_group ())
159 /* If there is a REG_DEAD note on this insn, we must
160 change this not to REG_UNUSED meaning that the register
161 is set, but the value is dead. Failure to do so will
162 result in a sched1 abort -- when it recomputes lifetime
163 information, the number of REG_DEAD notes will have
165 rtx note = find_reg_note (insn, REG_DEAD, reg);
167 PUT_MODE (note, REG_UNUSED);
170 = gen_rtx_EXPR_LIST (REG_INC,
171 reg, REG_NOTES (insn));
174 PUT_CODE (inc_insn, NOTE);
175 NOTE_LINE_NUMBER (inc_insn) = NOTE_INSN_DELETED;
176 NOTE_SOURCE_FILE (inc_insn) = 0;
186 /* Determine if the pattern generated by add_optab has a clobber,
187 such as might be issued for a flags hard register. To make the
188 code elsewhere simpler, we handle cc0 in this same framework.
190 Return the register if one was discovered. Return NULL_RTX if
191 if no flags were found. Return pc_rtx if we got confused. */
194 discover_flags_reg ()
197 tmp = gen_rtx_REG (word_mode, 10000);
198 tmp = gen_add3_insn (tmp, tmp, GEN_INT (2));
200 /* If we get something that isn't a simple set, or a
201 [(set ..) (clobber ..)], this whole function will go wrong. */
202 if (GET_CODE (tmp) == SET)
204 else if (GET_CODE (tmp) == PARALLEL)
208 if (XVECLEN (tmp, 0) != 2)
210 tmp = XVECEXP (tmp, 0, 1);
211 if (GET_CODE (tmp) != CLOBBER)
215 /* Don't do anything foolish if the md wanted to clobber a
216 scratch or something. We only care about hard regs.
217 Moreover we don't like the notion of subregs of hard regs. */
218 if (GET_CODE (tmp) == SUBREG
219 && GET_CODE (SUBREG_REG (tmp)) == REG
220 && REGNO (SUBREG_REG (tmp)) < FIRST_PSEUDO_REGISTER)
222 found = (GET_CODE (tmp) == REG && REGNO (tmp) < FIRST_PSEUDO_REGISTER);
224 return (found ? tmp : NULL_RTX);
230 /* It is a tedious task identifying when the flags register is live and
231 when it is safe to optimize. Since we process the instruction stream
232 multiple times, locate and record these live zones by marking the
233 mode of the instructions --
235 QImode is used on the instruction at which the flags becomes live.
237 HImode is used within the range (exclusive) that the flags are
238 live. Thus the user of the flags is not marked.
240 All other instructions are cleared to VOIDmode. */
242 /* Used to communicate with flags_set_1. */
243 static rtx flags_set_1_rtx;
244 static int flags_set_1_set;
247 mark_flags_life_zones (flags)
255 /* If we found a flags register on a cc0 host, bail. */
256 if (flags == NULL_RTX)
258 else if (flags != cc0_rtx)
262 /* Simple cases first: if no flags, clear all modes. If confusing,
263 mark the entire function as being in a flags shadow. */
264 if (flags == NULL_RTX || flags == pc_rtx)
266 enum machine_mode mode = (flags ? HImode : VOIDmode);
268 for (insn = get_insns(); insn; insn = NEXT_INSN (insn))
269 PUT_MODE (insn, mode);
277 flags_regno = REGNO (flags);
278 flags_nregs = HARD_REGNO_NREGS (flags_regno, GET_MODE (flags));
280 flags_set_1_rtx = flags;
282 /* Process each basic block. */
283 for (block = n_basic_blocks - 1; block >= 0; block--)
288 insn = BLOCK_HEAD (block);
289 end = BLOCK_END (block);
291 /* Look out for the (unlikely) case of flags being live across
292 basic block boundaries. */
297 for (i = 0; i < flags_nregs; ++i)
298 live |= REGNO_REG_SET_P (BASIC_BLOCK (block)->global_live_at_start,
305 /* Process liveness in reverse order of importance --
306 alive, death, birth. This lets more important info
307 overwrite the mode of lesser info. */
312 /* In the cc0 case, death is not marked in reg notes,
313 but is instead the mere use of cc0 when it is alive. */
314 if (live && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
317 /* In the hard reg case, we watch death notes. */
318 if (live && find_regno_note (insn, REG_DEAD, flags_regno))
321 PUT_MODE (insn, (live ? HImode : VOIDmode));
323 /* In either case, birth is denoted simply by it's presence
324 as the destination of a set. */
326 note_stores (PATTERN (insn), flags_set_1, NULL);
330 PUT_MODE (insn, QImode);
334 PUT_MODE (insn, (live ? HImode : VOIDmode));
338 insn = NEXT_INSN (insn);
343 /* A subroutine of mark_flags_life_zones, called through note_stores. */
346 flags_set_1 (x, pat, data)
348 void *data ATTRIBUTE_UNUSED;
350 if (GET_CODE (pat) == SET
351 && reg_overlap_mentioned_p (x, flags_set_1_rtx))
355 static int *regno_src_regno;
357 /* Indicate how good a choice REG (which appears as a source) is to replace
358 a destination register with. The higher the returned value, the better
359 the choice. The main objective is to avoid using a register that is
360 a candidate for tying to a hard register, since the output might in
361 turn be a candidate to be tied to a different hard register. */
363 replacement_quality(reg)
368 /* Bad if this isn't a register at all. */
369 if (GET_CODE (reg) != REG)
372 /* If this register is not meant to get a hard register,
373 it is a poor choice. */
374 if (REG_LIVE_LENGTH (REGNO (reg)) < 0)
377 src_regno = regno_src_regno[REGNO (reg)];
379 /* If it was not copied from another register, it is fine. */
383 /* Copied from a hard register? */
384 if (src_regno < FIRST_PSEUDO_REGISTER)
387 /* Copied from a pseudo register - not as bad as from a hard register,
388 yet still cumbersome, since the register live length will be lengthened
389 when the registers get tied. */
393 /* Return 1 if INSN might end a basic block. */
395 static int perhaps_ends_bb_p (insn)
398 switch (GET_CODE (insn))
402 /* These always end a basic block. */
406 /* A CALL_INSN might be the last insn of a basic block, if it is inside
407 an EH region or if there are nonlocal gotos. Note that this test is
408 very conservative. */
409 if (nonlocal_goto_handler_labels)
413 return can_throw_internal (insn);
417 /* INSN is a copy from SRC to DEST, both registers, and SRC does not die
420 Search forward to see if SRC dies before either it or DEST is modified,
421 but don't scan past the end of a basic block. If so, we can replace SRC
422 with DEST and let SRC die in INSN.
424 This will reduce the number of registers live in that range and may enable
425 DEST to be tied to SRC, thus often saving one register in addition to a
426 register-register copy. */
429 optimize_reg_copy_1 (insn, dest, src)
437 int sregno = REGNO (src);
438 int dregno = REGNO (dest);
440 /* We don't want to mess with hard regs if register classes are small. */
442 || (SMALL_REGISTER_CLASSES
443 && (sregno < FIRST_PSEUDO_REGISTER
444 || dregno < FIRST_PSEUDO_REGISTER))
445 /* We don't see all updates to SP if they are in an auto-inc memory
446 reference, so we must disallow this optimization on them. */
447 || sregno == STACK_POINTER_REGNUM || dregno == STACK_POINTER_REGNUM)
450 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
452 /* ??? We can't scan past the end of a basic block without updating
453 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
454 if (perhaps_ends_bb_p (p))
456 else if (! INSN_P (p))
459 if (reg_set_p (src, p) || reg_set_p (dest, p)
460 /* Don't change a USE of a register. */
461 || (GET_CODE (PATTERN (p)) == USE
462 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0))))
465 /* See if all of SRC dies in P. This test is slightly more
466 conservative than it needs to be. */
467 if ((note = find_regno_note (p, REG_DEAD, sregno)) != 0
468 && GET_MODE (XEXP (note, 0)) == GET_MODE (src))
476 /* We can do the optimization. Scan forward from INSN again,
477 replacing regs as we go. Set FAILED if a replacement can't
478 be done. In that case, we can't move the death note for SRC.
479 This should be rare. */
481 /* Set to stop at next insn. */
482 for (q = next_real_insn (insn);
483 q != next_real_insn (p);
484 q = next_real_insn (q))
486 if (reg_overlap_mentioned_p (src, PATTERN (q)))
488 /* If SRC is a hard register, we might miss some
489 overlapping registers with validate_replace_rtx,
490 so we would have to undo it. We can't if DEST is
491 present in the insn, so fail in that combination
493 if (sregno < FIRST_PSEUDO_REGISTER
494 && reg_mentioned_p (dest, PATTERN (q)))
497 /* Replace all uses and make sure that the register
498 isn't still present. */
499 else if (validate_replace_rtx (src, dest, q)
500 && (sregno >= FIRST_PSEUDO_REGISTER
501 || ! reg_overlap_mentioned_p (src,
506 validate_replace_rtx (dest, src, q);
511 /* For SREGNO, count the total number of insns scanned.
512 For DREGNO, count the total number of insns scanned after
513 passing the death note for DREGNO. */
518 /* If the insn in which SRC dies is a CALL_INSN, don't count it
519 as a call that has been crossed. Otherwise, count it. */
520 if (q != p && GET_CODE (q) == CALL_INSN)
522 /* Similarly, total calls for SREGNO, total calls beyond
523 the death note for DREGNO. */
529 /* If DEST dies here, remove the death note and save it for
530 later. Make sure ALL of DEST dies here; again, this is
531 overly conservative. */
533 && (dest_death = find_regno_note (q, REG_DEAD, dregno)) != 0)
535 if (GET_MODE (XEXP (dest_death, 0)) != GET_MODE (dest))
536 failed = 1, dest_death = 0;
538 remove_note (q, dest_death);
544 /* These counters need to be updated if and only if we are
545 going to move the REG_DEAD note. */
546 if (sregno >= FIRST_PSEUDO_REGISTER)
548 if (REG_LIVE_LENGTH (sregno) >= 0)
550 REG_LIVE_LENGTH (sregno) -= s_length;
551 /* REG_LIVE_LENGTH is only an approximation after
552 combine if sched is not run, so make sure that we
553 still have a reasonable value. */
554 if (REG_LIVE_LENGTH (sregno) < 2)
555 REG_LIVE_LENGTH (sregno) = 2;
558 REG_N_CALLS_CROSSED (sregno) -= s_n_calls;
561 /* Move death note of SRC from P to INSN. */
562 remove_note (p, note);
563 XEXP (note, 1) = REG_NOTES (insn);
564 REG_NOTES (insn) = note;
567 /* DEST is also dead if INSN has a REG_UNUSED note for DEST. */
569 && (dest_death = find_regno_note (insn, REG_UNUSED, dregno)))
571 PUT_REG_NOTE_KIND (dest_death, REG_DEAD);
572 remove_note (insn, dest_death);
575 /* Put death note of DEST on P if we saw it die. */
578 XEXP (dest_death, 1) = REG_NOTES (p);
579 REG_NOTES (p) = dest_death;
581 if (dregno >= FIRST_PSEUDO_REGISTER)
583 /* If and only if we are moving the death note for DREGNO,
584 then we need to update its counters. */
585 if (REG_LIVE_LENGTH (dregno) >= 0)
586 REG_LIVE_LENGTH (dregno) += d_length;
587 REG_N_CALLS_CROSSED (dregno) += d_n_calls;
594 /* If SRC is a hard register which is set or killed in some other
595 way, we can't do this optimization. */
596 else if (sregno < FIRST_PSEUDO_REGISTER
597 && dead_or_set_p (p, src))
603 /* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have
604 a sequence of insns that modify DEST followed by an insn that sets
605 SRC to DEST in which DEST dies, with no prior modification of DEST.
606 (There is no need to check if the insns in between actually modify
607 DEST. We should not have cases where DEST is not modified, but
608 the optimization is safe if no such modification is detected.)
609 In that case, we can replace all uses of DEST, starting with INSN and
610 ending with the set of SRC to DEST, with SRC. We do not do this
611 optimization if a CALL_INSN is crossed unless SRC already crosses a
612 call or if DEST dies before the copy back to SRC.
614 It is assumed that DEST and SRC are pseudos; it is too complicated to do
615 this for hard registers since the substitutions we may make might fail. */
618 optimize_reg_copy_2 (insn, dest, src)
625 int sregno = REGNO (src);
626 int dregno = REGNO (dest);
628 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
630 /* ??? We can't scan past the end of a basic block without updating
631 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
632 if (perhaps_ends_bb_p (p))
634 else if (! INSN_P (p))
637 set = single_set (p);
638 if (set && SET_SRC (set) == dest && SET_DEST (set) == src
639 && find_reg_note (p, REG_DEAD, dest))
641 /* We can do the optimization. Scan forward from INSN again,
642 replacing regs as we go. */
644 /* Set to stop at next insn. */
645 for (q = insn; q != NEXT_INSN (p); q = NEXT_INSN (q))
648 if (reg_mentioned_p (dest, PATTERN (q)))
649 PATTERN (q) = replace_rtx (PATTERN (q), dest, src);
652 if (GET_CODE (q) == CALL_INSN)
654 REG_N_CALLS_CROSSED (dregno)--;
655 REG_N_CALLS_CROSSED (sregno)++;
659 remove_note (p, find_reg_note (p, REG_DEAD, dest));
660 REG_N_DEATHS (dregno)--;
661 remove_note (insn, find_reg_note (insn, REG_DEAD, src));
662 REG_N_DEATHS (sregno)--;
666 if (reg_set_p (src, p)
667 || find_reg_note (p, REG_DEAD, dest)
668 || (GET_CODE (p) == CALL_INSN && REG_N_CALLS_CROSSED (sregno) == 0))
672 /* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST.
673 Look if SRC dies there, and if it is only set once, by loading
674 it from memory. If so, try to encorporate the zero/sign extension
675 into the memory read, change SRC to the mode of DEST, and alter
676 the remaining accesses to use the appropriate SUBREG. This allows
677 SRC and DEST to be tied later. */
679 optimize_reg_copy_3 (insn, dest, src)
684 rtx src_reg = XEXP (src, 0);
685 int src_no = REGNO (src_reg);
686 int dst_no = REGNO (dest);
688 enum machine_mode old_mode;
690 if (src_no < FIRST_PSEUDO_REGISTER
691 || dst_no < FIRST_PSEUDO_REGISTER
692 || ! find_reg_note (insn, REG_DEAD, src_reg)
693 || REG_N_SETS (src_no) != 1)
695 for (p = PREV_INSN (insn); p && ! reg_set_p (src_reg, p); p = PREV_INSN (p))
696 /* ??? We can't scan past the end of a basic block without updating
697 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
698 if (perhaps_ends_bb_p (p))
704 if (! (set = single_set (p))
705 || GET_CODE (SET_SRC (set)) != MEM
706 /* If there's a REG_EQUIV note, this must be an insn that loads an
707 argument. Prefer keeping the note over doing this optimization. */
708 || find_reg_note (p, REG_EQUIV, NULL_RTX)
709 || SET_DEST (set) != src_reg)
712 /* Be conserative: although this optimization is also valid for
713 volatile memory references, that could cause trouble in later passes. */
714 if (MEM_VOLATILE_P (SET_SRC (set)))
717 /* Do not use a SUBREG to truncate from one mode to another if truncation
719 if (GET_MODE_BITSIZE (GET_MODE (src_reg)) <= GET_MODE_BITSIZE (GET_MODE (src))
720 && !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (src)),
721 GET_MODE_BITSIZE (GET_MODE (src_reg))))
724 old_mode = GET_MODE (src_reg);
725 PUT_MODE (src_reg, GET_MODE (src));
726 XEXP (src, 0) = SET_SRC (set);
728 /* Include this change in the group so that it's easily undone if
729 one of the changes in the group is invalid. */
730 validate_change (p, &SET_SRC (set), src, 1);
732 /* Now walk forward making additional replacements. We want to be able
733 to undo all the changes if a later substitution fails. */
734 subreg = gen_lowpart_SUBREG (old_mode, src_reg);
735 while (p = NEXT_INSN (p), p != insn)
740 /* Make a tenative change. */
741 validate_replace_rtx_group (src_reg, subreg, p);
744 validate_replace_rtx_group (src, src_reg, insn);
746 /* Now see if all the changes are valid. */
747 if (! apply_change_group ())
749 /* One or more changes were no good. Back out everything. */
750 PUT_MODE (src_reg, old_mode);
751 XEXP (src, 0) = src_reg;
755 rtx note = find_reg_note (p, REG_EQUAL, NULL_RTX);
757 remove_note (p, note);
762 /* If we were not able to update the users of src to use dest directly, try
763 instead moving the value to dest directly before the operation. */
766 copy_src_to_dest (insn, src, dest, old_max_uid)
785 /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant
786 or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is
787 parameter when there is no frame pointer that is not allocated a register.
788 For now, we just reject them, rather than incrementing the live length. */
790 if (GET_CODE (src) == REG
791 && REG_LIVE_LENGTH (REGNO (src)) > 0
792 && GET_CODE (dest) == REG
793 && !RTX_UNCHANGING_P (dest)
794 && REG_LIVE_LENGTH (REGNO (dest)) > 0
795 && (set = single_set (insn)) != NULL_RTX
796 && !reg_mentioned_p (dest, SET_SRC (set))
797 && GET_MODE (src) == GET_MODE (dest))
799 int old_num_regs = reg_rtx_no;
801 /* Generate the src->dest move. */
803 emit_move_insn (dest, src);
804 seq = gen_sequence ();
806 /* If this sequence uses new registers, we may not use it. */
807 if (old_num_regs != reg_rtx_no
808 || ! validate_replace_rtx (src, dest, insn))
810 /* We have to restore reg_rtx_no to its old value, lest
811 recompute_reg_usage will try to compute the usage of the
812 new regs, yet reg_n_info is not valid for them. */
813 reg_rtx_no = old_num_regs;
816 emit_insn_before (seq, insn);
817 move_insn = PREV_INSN (insn);
818 p_move_notes = ®_NOTES (move_insn);
819 p_insn_notes = ®_NOTES (insn);
821 /* Move any notes mentioning src to the move instruction */
822 for (link = REG_NOTES (insn); link != NULL_RTX; link = next)
824 next = XEXP (link, 1);
825 if (XEXP (link, 0) == src)
827 *p_move_notes = link;
828 p_move_notes = &XEXP (link, 1);
832 *p_insn_notes = link;
833 p_insn_notes = &XEXP (link, 1);
837 *p_move_notes = NULL_RTX;
838 *p_insn_notes = NULL_RTX;
840 /* Is the insn the head of a basic block? If so extend it */
841 insn_uid = INSN_UID (insn);
842 move_uid = INSN_UID (move_insn);
843 if (insn_uid < old_max_uid)
845 bb = regmove_bb_head[insn_uid];
848 BLOCK_HEAD (bb) = move_insn;
849 regmove_bb_head[insn_uid] = -1;
853 /* Update the various register tables. */
854 dest_regno = REGNO (dest);
855 REG_N_SETS (dest_regno) ++;
856 REG_LIVE_LENGTH (dest_regno)++;
857 if (REGNO_FIRST_UID (dest_regno) == insn_uid)
858 REGNO_FIRST_UID (dest_regno) = move_uid;
860 src_regno = REGNO (src);
861 if (! find_reg_note (move_insn, REG_DEAD, src))
862 REG_LIVE_LENGTH (src_regno)++;
864 if (REGNO_FIRST_UID (src_regno) == insn_uid)
865 REGNO_FIRST_UID (src_regno) = move_uid;
867 if (REGNO_LAST_UID (src_regno) == insn_uid)
868 REGNO_LAST_UID (src_regno) = move_uid;
870 if (REGNO_LAST_NOTE_UID (src_regno) == insn_uid)
871 REGNO_LAST_NOTE_UID (src_regno) = move_uid;
876 /* Return whether REG is set in only one location, and is set to a
877 constant, but is set in a different basic block from INSN (an
878 instructions which uses REG). In this case REG is equivalent to a
879 constant, and we don't want to break that equivalence, because that
880 may increase register pressure and make reload harder. If REG is
881 set in the same basic block as INSN, we don't worry about it,
882 because we'll probably need a register anyhow (??? but what if REG
883 is used in a different basic block as well as this one?). FIRST is
884 the first insn in the function. */
887 reg_is_remote_constant_p (reg, insn, first)
894 if (REG_N_SETS (REGNO (reg)) != 1)
897 /* Look for the set. */
898 for (p = LOG_LINKS (insn); p; p = XEXP (p, 1))
902 if (REG_NOTE_KIND (p) != 0)
904 s = single_set (XEXP (p, 0));
906 && GET_CODE (SET_DEST (s)) == REG
907 && REGNO (SET_DEST (s)) == REGNO (reg))
909 /* The register is set in the same basic block. */
914 for (p = first; p && p != insn; p = NEXT_INSN (p))
922 && GET_CODE (SET_DEST (s)) == REG
923 && REGNO (SET_DEST (s)) == REGNO (reg))
925 /* This is the instruction which sets REG. If there is a
926 REG_EQUAL note, then REG is equivalent to a constant. */
927 if (find_reg_note (p, REG_EQUAL, NULL_RTX))
936 /* INSN is adding a CONST_INT to a REG. We search backwards looking for
937 another add immediate instruction with the same source and dest registers,
938 and if we find one, we change INSN to an increment, and return 1. If
939 no changes are made, we return 0.
942 (set (reg100) (plus reg1 offset1))
944 (set (reg100) (plus reg1 offset2))
946 (set (reg100) (plus reg1 offset1))
948 (set (reg100) (plus reg100 offset2-offset1)) */
950 /* ??? What does this comment mean? */
951 /* cse disrupts preincrement / postdecrement squences when it finds a
952 hard register as ultimate source, like the frame pointer. */
955 fixup_match_2 (insn, dst, src, offset, regmove_dump_file)
956 rtx insn, dst, src, offset;
957 FILE *regmove_dump_file;
959 rtx p, dst_death = 0;
960 int length, num_calls = 0;
962 /* If SRC dies in INSN, we'd have to move the death note. This is
963 considered to be very unlikely, so we just skip the optimization
965 if (find_regno_note (insn, REG_DEAD, REGNO (src)))
968 /* Scan backward to find the first instruction that sets DST. */
970 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p))
974 /* ??? We can't scan past the end of a basic block without updating
975 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
976 if (perhaps_ends_bb_p (p))
978 else if (! INSN_P (p))
981 if (find_regno_note (p, REG_DEAD, REGNO (dst)))
986 pset = single_set (p);
987 if (pset && SET_DEST (pset) == dst
988 && GET_CODE (SET_SRC (pset)) == PLUS
989 && XEXP (SET_SRC (pset), 0) == src
990 && GET_CODE (XEXP (SET_SRC (pset), 1)) == CONST_INT)
992 HOST_WIDE_INT newconst
993 = INTVAL (offset) - INTVAL (XEXP (SET_SRC (pset), 1));
994 rtx add = gen_add3_insn (dst, dst, GEN_INT (newconst));
996 if (add && validate_change (insn, &PATTERN (insn), add, 0))
998 /* Remove the death note for DST from DST_DEATH. */
1001 remove_death (REGNO (dst), dst_death);
1002 REG_LIVE_LENGTH (REGNO (dst)) += length;
1003 REG_N_CALLS_CROSSED (REGNO (dst)) += num_calls;
1006 if (regmove_dump_file)
1007 fprintf (regmove_dump_file,
1008 "Fixed operand of insn %d.\n",
1012 for (p = PREV_INSN (insn); p; p = PREV_INSN (p))
1014 if (GET_CODE (p) == CODE_LABEL
1015 || GET_CODE (p) == JUMP_INSN)
1019 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
1021 if (try_auto_increment (p, insn, 0, dst, newconst, 0))
1026 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
1028 if (GET_CODE (p) == CODE_LABEL
1029 || GET_CODE (p) == JUMP_INSN)
1033 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
1035 try_auto_increment (p, insn, 0, dst, newconst, 1);
1044 if (reg_set_p (dst, PATTERN (p)))
1047 /* If we have passed a call instruction, and the
1048 pseudo-reg SRC is not already live across a call,
1049 then don't perform the optimization. */
1050 /* reg_set_p is overly conservative for CALL_INSNS, thinks that all
1051 hard regs are clobbered. Thus, we only use it for src for
1053 if (GET_CODE (p) == CALL_INSN)
1058 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
1061 if (call_used_regs [REGNO (dst)]
1062 || find_reg_fusage (p, CLOBBER, dst))
1065 else if (reg_set_p (src, PATTERN (p)))
1072 /* Main entry for the register move optimization.
1073 F is the first instruction.
1074 NREGS is one plus the highest pseudo-reg number used in the instruction.
1075 REGMOVE_DUMP_FILE is a stream for output of a trace of actions taken
1076 (or 0 if none should be output). */
1079 regmove_optimize (f, nregs, regmove_dump_file)
1082 FILE *regmove_dump_file;
1084 int old_max_uid = get_max_uid ();
1089 rtx copy_src, copy_dst;
1091 /* ??? Hack. Regmove doesn't examine the CFG, and gets mightily
1092 confused by non-call exceptions ending blocks. */
1093 if (flag_non_call_exceptions)
1096 /* Find out where a potential flags register is live, and so that we
1097 can supress some optimizations in those zones. */
1098 mark_flags_life_zones (discover_flags_reg ());
1100 regno_src_regno = (int *) xmalloc (sizeof *regno_src_regno * nregs);
1101 for (i = nregs; --i >= 0; ) regno_src_regno[i] = -1;
1103 regmove_bb_head = (int *) xmalloc (sizeof (int) * (old_max_uid + 1));
1104 for (i = old_max_uid; i >= 0; i--) regmove_bb_head[i] = -1;
1105 for (i = 0; i < n_basic_blocks; i++)
1106 regmove_bb_head[INSN_UID (BLOCK_HEAD (i))] = i;
1108 /* A forward/backward pass. Replace output operands with input operands. */
1110 for (pass = 0; pass <= 2; pass++)
1112 if (! flag_regmove && pass >= flag_expensive_optimizations)
1115 if (regmove_dump_file)
1116 fprintf (regmove_dump_file, "Starting %s pass...\n",
1117 pass ? "backward" : "forward");
1119 for (insn = pass ? get_last_insn () : f; insn;
1120 insn = pass ? PREV_INSN (insn) : NEXT_INSN (insn))
1123 int op_no, match_no;
1125 set = single_set (insn);
1129 if (flag_expensive_optimizations && ! pass
1130 && (GET_CODE (SET_SRC (set)) == SIGN_EXTEND
1131 || GET_CODE (SET_SRC (set)) == ZERO_EXTEND)
1132 && GET_CODE (XEXP (SET_SRC (set), 0)) == REG
1133 && GET_CODE (SET_DEST(set)) == REG)
1134 optimize_reg_copy_3 (insn, SET_DEST (set), SET_SRC (set));
1136 if (flag_expensive_optimizations && ! pass
1137 && GET_CODE (SET_SRC (set)) == REG
1138 && GET_CODE (SET_DEST(set)) == REG)
1140 /* If this is a register-register copy where SRC is not dead,
1141 see if we can optimize it. If this optimization succeeds,
1142 it will become a copy where SRC is dead. */
1143 if ((find_reg_note (insn, REG_DEAD, SET_SRC (set))
1144 || optimize_reg_copy_1 (insn, SET_DEST (set), SET_SRC (set)))
1145 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER)
1147 /* Similarly for a pseudo-pseudo copy when SRC is dead. */
1148 if (REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER)
1149 optimize_reg_copy_2 (insn, SET_DEST (set), SET_SRC (set));
1150 if (regno_src_regno[REGNO (SET_DEST (set))] < 0
1151 && SET_SRC (set) != SET_DEST (set))
1153 int srcregno = REGNO (SET_SRC(set));
1154 if (regno_src_regno[srcregno] >= 0)
1155 srcregno = regno_src_regno[srcregno];
1156 regno_src_regno[REGNO (SET_DEST (set))] = srcregno;
1163 if (! find_matches (insn, &match))
1166 /* Now scan through the operands looking for a source operand
1167 which is supposed to match the destination operand.
1168 Then scan forward for an instruction which uses the dest
1170 If it dies there, then replace the dest in both operands with
1171 the source operand. */
1173 for (op_no = 0; op_no < recog_data.n_operands; op_no++)
1175 rtx src, dst, src_subreg;
1176 enum reg_class src_class, dst_class;
1178 match_no = match.with[op_no];
1180 /* Nothing to do if the two operands aren't supposed to match. */
1184 src = recog_data.operand[op_no];
1185 dst = recog_data.operand[match_no];
1187 if (GET_CODE (src) != REG)
1191 if (GET_CODE (dst) == SUBREG
1192 && GET_MODE_SIZE (GET_MODE (dst))
1193 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst))))
1196 = gen_rtx_SUBREG (GET_MODE (SUBREG_REG (dst)),
1197 src, SUBREG_BYTE (dst));
1198 dst = SUBREG_REG (dst);
1200 if (GET_CODE (dst) != REG
1201 || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1204 if (REGNO (src) < FIRST_PSEUDO_REGISTER)
1206 if (match.commutative[op_no] < op_no)
1207 regno_src_regno[REGNO (dst)] = REGNO (src);
1211 if (REG_LIVE_LENGTH (REGNO (src)) < 0)
1214 /* op_no/src must be a read-only operand, and
1215 match_operand/dst must be a write-only operand. */
1216 if (match.use[op_no] != READ
1217 || match.use[match_no] != WRITE)
1220 if (match.early_clobber[match_no]
1221 && count_occurrences (PATTERN (insn), src, 0) > 1)
1224 /* Make sure match_operand is the destination. */
1225 if (recog_data.operand[match_no] != SET_DEST (set))
1228 /* If the operands already match, then there is nothing to do. */
1229 if (operands_match_p (src, dst))
1232 /* But in the commutative case, we might find a better match. */
1233 if (match.commutative[op_no] >= 0)
1235 rtx comm = recog_data.operand[match.commutative[op_no]];
1236 if (operands_match_p (comm, dst)
1237 && (replacement_quality (comm)
1238 >= replacement_quality (src)))
1242 src_class = reg_preferred_class (REGNO (src));
1243 dst_class = reg_preferred_class (REGNO (dst));
1244 if (! regclass_compatible_p (src_class, dst_class))
1247 if (fixup_match_1 (insn, set, src, src_subreg, dst, pass,
1255 /* A backward pass. Replace input operands with output operands. */
1257 if (regmove_dump_file)
1258 fprintf (regmove_dump_file, "Starting backward pass...\n");
1260 for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
1264 int op_no, match_no;
1267 if (! find_matches (insn, &match))
1270 /* Now scan through the operands looking for a destination operand
1271 which is supposed to match a source operand.
1272 Then scan backward for an instruction which sets the source
1273 operand. If safe, then replace the source operand with the
1274 dest operand in both instructions. */
1276 copy_src = NULL_RTX;
1277 copy_dst = NULL_RTX;
1278 for (op_no = 0; op_no < recog_data.n_operands; op_no++)
1280 rtx set, p, src, dst;
1281 rtx src_note, dst_note;
1283 enum reg_class src_class, dst_class;
1286 match_no = match.with[op_no];
1288 /* Nothing to do if the two operands aren't supposed to match. */
1292 dst = recog_data.operand[match_no];
1293 src = recog_data.operand[op_no];
1295 if (GET_CODE (src) != REG)
1298 if (GET_CODE (dst) != REG
1299 || REGNO (dst) < FIRST_PSEUDO_REGISTER
1300 || REG_LIVE_LENGTH (REGNO (dst)) < 0
1301 || RTX_UNCHANGING_P (dst))
1304 /* If the operands already match, then there is nothing to do. */
1305 if (operands_match_p (src, dst))
1308 if (match.commutative[op_no] >= 0)
1310 rtx comm = recog_data.operand[match.commutative[op_no]];
1311 if (operands_match_p (comm, dst))
1315 set = single_set (insn);
1319 /* match_no/dst must be a write-only operand, and
1320 operand_operand/src must be a read-only operand. */
1321 if (match.use[op_no] != READ
1322 || match.use[match_no] != WRITE)
1325 if (match.early_clobber[match_no]
1326 && count_occurrences (PATTERN (insn), src, 0) > 1)
1329 /* Make sure match_no is the destination. */
1330 if (recog_data.operand[match_no] != SET_DEST (set))
1333 if (REGNO (src) < FIRST_PSEUDO_REGISTER)
1335 if (GET_CODE (SET_SRC (set)) == PLUS
1336 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT
1337 && XEXP (SET_SRC (set), 0) == src
1338 && fixup_match_2 (insn, dst, src,
1339 XEXP (SET_SRC (set), 1),
1344 src_class = reg_preferred_class (REGNO (src));
1345 dst_class = reg_preferred_class (REGNO (dst));
1346 if (! regclass_compatible_p (src_class, dst_class))
1356 /* Can not modify an earlier insn to set dst if this insn
1357 uses an old value in the source. */
1358 if (reg_overlap_mentioned_p (dst, SET_SRC (set)))
1368 if (! (src_note = find_reg_note (insn, REG_DEAD, src)))
1379 /* If src is set once in a different basic block,
1380 and is set equal to a constant, then do not use
1381 it for this optimization, as this would make it
1382 no longer equivalent to a constant. */
1384 if (reg_is_remote_constant_p (src, insn, f))
1395 if (regmove_dump_file)
1396 fprintf (regmove_dump_file,
1397 "Could fix operand %d of insn %d matching operand %d.\n",
1398 op_no, INSN_UID (insn), match_no);
1400 /* Scan backward to find the first instruction that uses
1401 the input operand. If the operand is set here, then
1402 replace it in both instructions with match_no. */
1404 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p))
1408 /* ??? We can't scan past the end of a basic block without
1409 updating the register lifetime info
1410 (REG_DEAD/basic_block_live_at_start). */
1411 if (perhaps_ends_bb_p (p))
1413 else if (! INSN_P (p))
1418 /* ??? See if all of SRC is set in P. This test is much
1419 more conservative than it needs to be. */
1420 pset = single_set (p);
1421 if (pset && SET_DEST (pset) == src)
1423 /* We use validate_replace_rtx, in case there
1424 are multiple identical source operands. All of
1425 them have to be changed at the same time. */
1426 if (validate_replace_rtx (src, dst, insn))
1428 if (validate_change (p, &SET_DEST (pset),
1433 /* Change all source operands back.
1434 This modifies the dst as a side-effect. */
1435 validate_replace_rtx (dst, src, insn);
1436 /* Now make sure the dst is right. */
1437 validate_change (insn,
1438 recog_data.operand_loc[match_no],
1445 if (reg_overlap_mentioned_p (src, PATTERN (p))
1446 || reg_overlap_mentioned_p (dst, PATTERN (p)))
1449 /* If we have passed a call instruction, and the
1450 pseudo-reg DST is not already live across a call,
1451 then don't perform the optimization. */
1452 if (GET_CODE (p) == CALL_INSN)
1456 if (REG_N_CALLS_CROSSED (REGNO (dst)) == 0)
1465 /* Remove the death note for SRC from INSN. */
1466 remove_note (insn, src_note);
1467 /* Move the death note for SRC to P if it is used
1469 if (reg_overlap_mentioned_p (src, PATTERN (p)))
1471 XEXP (src_note, 1) = REG_NOTES (p);
1472 REG_NOTES (p) = src_note;
1474 /* If there is a REG_DEAD note for DST on P, then remove
1475 it, because DST is now set there. */
1476 if ((dst_note = find_reg_note (p, REG_DEAD, dst)))
1477 remove_note (p, dst_note);
1479 dstno = REGNO (dst);
1480 srcno = REGNO (src);
1482 REG_N_SETS (dstno)++;
1483 REG_N_SETS (srcno)--;
1485 REG_N_CALLS_CROSSED (dstno) += num_calls;
1486 REG_N_CALLS_CROSSED (srcno) -= num_calls;
1488 REG_LIVE_LENGTH (dstno) += length;
1489 if (REG_LIVE_LENGTH (srcno) >= 0)
1491 REG_LIVE_LENGTH (srcno) -= length;
1492 /* REG_LIVE_LENGTH is only an approximation after
1493 combine if sched is not run, so make sure that we
1494 still have a reasonable value. */
1495 if (REG_LIVE_LENGTH (srcno) < 2)
1496 REG_LIVE_LENGTH (srcno) = 2;
1499 if (regmove_dump_file)
1500 fprintf (regmove_dump_file,
1501 "Fixed operand %d of insn %d matching operand %d.\n",
1502 op_no, INSN_UID (insn), match_no);
1508 /* If we weren't able to replace any of the alternatives, try an
1509 alternative appoach of copying the source to the destination. */
1510 if (!success && copy_src != NULL_RTX)
1511 copy_src_to_dest (insn, copy_src, copy_dst, old_max_uid);
1516 /* In fixup_match_1, some insns may have been inserted after basic block
1517 ends. Fix that here. */
1518 for (i = 0; i < n_basic_blocks; i++)
1520 rtx end = BLOCK_END (i);
1522 rtx next = NEXT_INSN (new);
1523 while (next != 0 && INSN_UID (next) >= old_max_uid
1524 && (i == n_basic_blocks - 1 || BLOCK_HEAD (i + 1) != next))
1525 new = next, next = NEXT_INSN (new);
1526 BLOCK_END (i) = new;
1531 free (regno_src_regno);
1532 free (regmove_bb_head);
1535 /* Returns nonzero if INSN's pattern has matching constraints for any operand.
1536 Returns 0 if INSN can't be recognized, or if the alternative can't be
1539 Initialize the info in MATCHP based on the constraints. */
1542 find_matches (insn, matchp)
1544 struct match *matchp;
1546 int likely_spilled[MAX_RECOG_OPERANDS];
1548 int any_matches = 0;
1550 extract_insn (insn);
1551 if (! constrain_operands (0))
1554 /* Must initialize this before main loop, because the code for
1555 the commutative case may set matches for operands other than
1557 for (op_no = recog_data.n_operands; --op_no >= 0; )
1558 matchp->with[op_no] = matchp->commutative[op_no] = -1;
1560 for (op_no = 0; op_no < recog_data.n_operands; op_no++)
1566 p = recog_data.constraints[op_no];
1568 likely_spilled[op_no] = 0;
1569 matchp->use[op_no] = READ;
1570 matchp->early_clobber[op_no] = 0;
1572 matchp->use[op_no] = WRITE;
1574 matchp->use[op_no] = READWRITE;
1576 for (;*p && i < which_alternative; p++)
1580 while ((c = *p++) != '\0' && c != ',')
1588 matchp->early_clobber[op_no] = 1;
1591 matchp->commutative[op_no] = op_no + 1;
1592 matchp->commutative[op_no + 1] = op_no;
1594 case '0': case '1': case '2': case '3': case '4':
1595 case '5': case '6': case '7': case '8': case '9':
1597 if (c < op_no && likely_spilled[(unsigned char) c])
1599 matchp->with[op_no] = c;
1601 if (matchp->commutative[op_no] >= 0)
1602 matchp->with[matchp->commutative[op_no]] = c;
1604 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h':
1605 case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u':
1606 case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B':
1607 case 'C': case 'D': case 'W': case 'Y': case 'Z':
1608 if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_LETTER ((unsigned char)c)))
1609 likely_spilled[op_no] = 1;
1616 /* Try to replace all occurrences of DST_REG with SRC in LOC, that is
1617 assumed to be in INSN. */
1620 replace_in_call_usage (loc, dst_reg, src, insn)
1634 code = GET_CODE (x);
1637 if (REGNO (x) != dst_reg)
1640 validate_change (insn, loc, src, 1);
1645 /* Process each of our operands recursively. */
1646 fmt = GET_RTX_FORMAT (code);
1647 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
1649 replace_in_call_usage (&XEXP (x, i), dst_reg, src, insn);
1650 else if (*fmt == 'E')
1651 for (j = 0; j < XVECLEN (x, i); j++)
1652 replace_in_call_usage (& XVECEXP (x, i, j), dst_reg, src, insn);
1655 /* Try to replace output operand DST in SET, with input operand SRC. SET is
1656 the only set in INSN. INSN has just been recognized and constrained.
1657 SRC is operand number OPERAND_NUMBER in INSN.
1658 DST is operand number MATCH_NUMBER in INSN.
1659 If BACKWARD is nonzero, we have been called in a backward pass.
1660 Return nonzero for success. */
1663 fixup_match_1 (insn, set, src, src_subreg, dst, backward, operand_number,
1664 match_number, regmove_dump_file)
1665 rtx insn, set, src, src_subreg, dst;
1666 int backward, operand_number, match_number;
1667 FILE *regmove_dump_file;
1670 rtx post_inc = 0, post_inc_set = 0, search_end = 0;
1672 int num_calls = 0, s_num_calls = 0;
1673 enum rtx_code code = NOTE;
1674 HOST_WIDE_INT insn_const = 0, newconst;
1675 rtx overlap = 0; /* need to move insn ? */
1676 rtx src_note = find_reg_note (insn, REG_DEAD, src), dst_note = NULL_RTX;
1677 int length, s_length;
1679 /* If SRC is marked as unchanging, we may not change it.
1680 ??? Maybe we could get better code by removing the unchanging bit
1681 instead, and changing it back if we don't succeed? */
1682 if (RTX_UNCHANGING_P (src))
1687 /* Look for (set (regX) (op regA constX))
1688 (set (regY) (op regA constY))
1690 (set (regA) (op regA constX)).
1691 (set (regY) (op regA constY-constX)).
1692 This works for add and shift operations, if
1693 regA is dead after or set by the second insn. */
1695 code = GET_CODE (SET_SRC (set));
1696 if ((code == PLUS || code == LSHIFTRT
1697 || code == ASHIFT || code == ASHIFTRT)
1698 && XEXP (SET_SRC (set), 0) == src
1699 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT)
1700 insn_const = INTVAL (XEXP (SET_SRC (set), 1));
1701 else if (! stable_and_no_regs_but_for_p (SET_SRC (set), src, dst))
1704 /* We might find a src_note while scanning. */
1708 if (regmove_dump_file)
1709 fprintf (regmove_dump_file,
1710 "Could fix operand %d of insn %d matching operand %d.\n",
1711 operand_number, INSN_UID (insn), match_number);
1713 /* If SRC is equivalent to a constant set in a different basic block,
1714 then do not use it for this optimization. We want the equivalence
1715 so that if we have to reload this register, we can reload the
1716 constant, rather than extending the lifespan of the register. */
1717 if (reg_is_remote_constant_p (src, insn, get_insns ()))
1720 /* Scan forward to find the next instruction that
1721 uses the output operand. If the operand dies here,
1722 then replace it in both instructions with
1725 for (length = s_length = 0, p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
1727 if (GET_CODE (p) == CALL_INSN)
1728 replace_in_call_usage (& CALL_INSN_FUNCTION_USAGE (p),
1729 REGNO (dst), src, p);
1731 /* ??? We can't scan past the end of a basic block without updating
1732 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
1733 if (perhaps_ends_bb_p (p))
1735 else if (! INSN_P (p))
1742 if (reg_set_p (src, p) || reg_set_p (dst, p)
1743 || (GET_CODE (PATTERN (p)) == USE
1744 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0))))
1747 /* See if all of DST dies in P. This test is
1748 slightly more conservative than it needs to be. */
1749 if ((dst_note = find_regno_note (p, REG_DEAD, REGNO (dst)))
1750 && (GET_MODE (XEXP (dst_note, 0)) == GET_MODE (dst)))
1752 /* If we would be moving INSN, check that we won't move it
1753 into the shadow of a live a live flags register. */
1754 /* ??? We only try to move it in front of P, although
1755 we could move it anywhere between OVERLAP and P. */
1756 if (overlap && GET_MODE (PREV_INSN (p)) != VOIDmode)
1762 rtx set2 = NULL_RTX;
1764 /* If an optimization is done, the value of SRC while P
1765 is executed will be changed. Check that this is OK. */
1766 if (reg_overlap_mentioned_p (src, PATTERN (p)))
1768 for (q = p; q; q = NEXT_INSN (q))
1770 /* ??? We can't scan past the end of a basic block without
1771 updating the register lifetime info
1772 (REG_DEAD/basic_block_live_at_start). */
1773 if (perhaps_ends_bb_p (q))
1778 else if (! INSN_P (q))
1780 else if (reg_overlap_mentioned_p (src, PATTERN (q))
1781 || reg_set_p (src, q))
1785 set2 = single_set (q);
1786 if (! q || ! set2 || GET_CODE (SET_SRC (set2)) != code
1787 || XEXP (SET_SRC (set2), 0) != src
1788 || GET_CODE (XEXP (SET_SRC (set2), 1)) != CONST_INT
1789 || (SET_DEST (set2) != src
1790 && ! find_reg_note (q, REG_DEAD, src)))
1792 /* If this is a PLUS, we can still save a register by doing
1795 src -= insn_const; .
1796 This also gives opportunities for subsequent
1797 optimizations in the backward pass, so do it there. */
1798 if (code == PLUS && backward
1799 /* Don't do this if we can likely tie DST to SET_DEST
1800 of P later; we can't do this tying here if we got a
1802 && ! (dst_note && ! REG_N_CALLS_CROSSED (REGNO (dst))
1804 && GET_CODE (SET_DEST (single_set (p))) == REG
1805 && (REGNO (SET_DEST (single_set (p)))
1806 < FIRST_PSEUDO_REGISTER))
1807 /* We may only emit an insn directly after P if we
1808 are not in the shadow of a live flags register. */
1809 && GET_MODE (p) == VOIDmode)
1814 newconst = -insn_const;
1822 newconst = INTVAL (XEXP (SET_SRC (set2), 1)) - insn_const;
1823 /* Reject out of range shifts. */
1826 || ((unsigned HOST_WIDE_INT) newconst
1827 >= (GET_MODE_BITSIZE (GET_MODE
1828 (SET_SRC (set2)))))))
1833 if (SET_DEST (set2) != src)
1834 post_inc_set = set2;
1837 /* We use 1 as last argument to validate_change so that all
1838 changes are accepted or rejected together by apply_change_group
1839 when it is called by validate_replace_rtx . */
1840 validate_change (q, &XEXP (SET_SRC (set2), 1),
1841 GEN_INT (newconst), 1);
1843 validate_change (insn, recog_data.operand_loc[match_number], src, 1);
1844 if (validate_replace_rtx (dst, src_subreg, p))
1849 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
1851 if (! src_note && reg_overlap_mentioned_p (src, PATTERN (p)))
1853 /* INSN was already checked to be movable wrt. the registers that it
1854 sets / uses when we found no REG_DEAD note for src on it, but it
1855 still might clobber the flags register. We'll have to check that
1856 we won't insert it into the shadow of a live flags register when
1857 we finally know where we are to move it. */
1859 src_note = find_reg_note (p, REG_DEAD, src);
1862 /* If we have passed a call instruction, and the pseudo-reg SRC is not
1863 already live across a call, then don't perform the optimization. */
1864 if (GET_CODE (p) == CALL_INSN)
1866 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
1880 /* Remove the death note for DST from P. */
1881 remove_note (p, dst_note);
1884 post_inc = emit_insn_after (copy_rtx (PATTERN (insn)), p);
1885 if ((HAVE_PRE_INCREMENT || HAVE_PRE_DECREMENT)
1887 && try_auto_increment (search_end, post_inc, 0, src, newconst, 1))
1889 validate_change (insn, &XEXP (SET_SRC (set), 1), GEN_INT (insn_const), 0);
1890 REG_N_SETS (REGNO (src))++;
1891 REG_LIVE_LENGTH (REGNO (src))++;
1895 /* The lifetime of src and dest overlap,
1896 but we can change this by moving insn. */
1897 rtx pat = PATTERN (insn);
1899 remove_note (overlap, src_note);
1900 if ((HAVE_POST_INCREMENT || HAVE_POST_DECREMENT)
1902 && try_auto_increment (overlap, insn, 0, src, insn_const, 0))
1906 rtx notes = REG_NOTES (insn);
1908 emit_insn_after_with_line_notes (pat, PREV_INSN (p), insn);
1909 PUT_CODE (insn, NOTE);
1910 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1911 NOTE_SOURCE_FILE (insn) = 0;
1912 /* emit_insn_after_with_line_notes has no
1913 return value, so search for the new insn. */
1915 while (! INSN_P (insn) || PATTERN (insn) != pat)
1916 insn = PREV_INSN (insn);
1918 REG_NOTES (insn) = notes;
1921 /* Sometimes we'd generate src = const; src += n;
1922 if so, replace the instruction that set src
1923 in the first place. */
1925 if (! overlap && (code == PLUS || code == MINUS))
1927 rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
1928 rtx q, set2 = NULL_RTX;
1929 int num_calls2 = 0, s_length2 = 0;
1931 if (note && CONSTANT_P (XEXP (note, 0)))
1933 for (q = PREV_INSN (insn); q; q = PREV_INSN(q))
1935 /* ??? We can't scan past the end of a basic block without
1936 updating the register lifetime info
1937 (REG_DEAD/basic_block_live_at_start). */
1938 if (perhaps_ends_bb_p (q))
1943 else if (! INSN_P (q))
1947 if (reg_set_p (src, q))
1949 set2 = single_set (q);
1952 if (reg_overlap_mentioned_p (src, PATTERN (q)))
1957 if (GET_CODE (p) == CALL_INSN)
1960 if (q && set2 && SET_DEST (set2) == src && CONSTANT_P (SET_SRC (set2))
1961 && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0))
1964 NOTE_LINE_NUMBER (q) = NOTE_INSN_DELETED;
1965 NOTE_SOURCE_FILE (q) = 0;
1966 REG_N_SETS (REGNO (src))--;
1967 REG_N_CALLS_CROSSED (REGNO (src)) -= num_calls2;
1968 REG_LIVE_LENGTH (REGNO (src)) -= s_length2;
1974 if ((HAVE_PRE_INCREMENT || HAVE_PRE_DECREMENT)
1975 && (code == PLUS || code == MINUS) && insn_const
1976 && try_auto_increment (p, insn, 0, src, insn_const, 1))
1978 else if ((HAVE_POST_INCREMENT || HAVE_POST_DECREMENT)
1980 && try_auto_increment (p, post_inc, post_inc_set, src, newconst, 0))
1982 /* If post_inc still prevails, try to find an
1983 insn where it can be used as a pre-in/decrement.
1984 If code is MINUS, this was already tried. */
1985 if (post_inc && code == PLUS
1986 /* Check that newconst is likely to be usable
1987 in a pre-in/decrement before starting the search. */
1988 && ((HAVE_PRE_INCREMENT && newconst > 0 && newconst <= MOVE_MAX)
1989 || (HAVE_PRE_DECREMENT && newconst < 0 && newconst >= -MOVE_MAX))
1990 && exact_log2 (newconst))
1994 inc_dest = post_inc_set ? SET_DEST (post_inc_set) : src;
1995 for (q = post_inc; (q = NEXT_INSN (q)); )
1997 /* ??? We can't scan past the end of a basic block without updating
1998 the register lifetime info
1999 (REG_DEAD/basic_block_live_at_start). */
2000 if (perhaps_ends_bb_p (q))
2002 else if (! INSN_P (q))
2004 else if (src != inc_dest
2005 && (reg_overlap_mentioned_p (src, PATTERN (q))
2006 || reg_set_p (src, q)))
2008 else if (reg_set_p (inc_dest, q))
2010 else if (reg_overlap_mentioned_p (inc_dest, PATTERN (q)))
2012 try_auto_increment (q, post_inc,
2013 post_inc_set, inc_dest, newconst, 1);
2019 /* Move the death note for DST to INSN if it is used
2021 if (reg_overlap_mentioned_p (dst, PATTERN (insn)))
2023 XEXP (dst_note, 1) = REG_NOTES (insn);
2024 REG_NOTES (insn) = dst_note;
2029 /* Move the death note for SRC from INSN to P. */
2031 remove_note (insn, src_note);
2032 XEXP (src_note, 1) = REG_NOTES (p);
2033 REG_NOTES (p) = src_note;
2035 REG_N_CALLS_CROSSED (REGNO (src)) += s_num_calls;
2038 REG_N_SETS (REGNO (src))++;
2039 REG_N_SETS (REGNO (dst))--;
2041 REG_N_CALLS_CROSSED (REGNO (dst)) -= num_calls;
2043 REG_LIVE_LENGTH (REGNO (src)) += s_length;
2044 if (REG_LIVE_LENGTH (REGNO (dst)) >= 0)
2046 REG_LIVE_LENGTH (REGNO (dst)) -= length;
2047 /* REG_LIVE_LENGTH is only an approximation after
2048 combine if sched is not run, so make sure that we
2049 still have a reasonable value. */
2050 if (REG_LIVE_LENGTH (REGNO (dst)) < 2)
2051 REG_LIVE_LENGTH (REGNO (dst)) = 2;
2053 if (regmove_dump_file)
2054 fprintf (regmove_dump_file,
2055 "Fixed operand %d of insn %d matching operand %d.\n",
2056 operand_number, INSN_UID (insn), match_number);
2061 /* return nonzero if X is stable and mentions no regsiters but for
2062 mentioning SRC or mentioning / changing DST . If in doubt, presume
2064 The rationale is that we want to check if we can move an insn easily
2065 while just paying attention to SRC and DST. A register is considered
2066 stable if it has the RTX_UNCHANGING_P bit set, but that would still
2067 leave the burden to update REG_DEAD / REG_UNUSED notes, so we don't
2068 want any registers but SRC and DST. */
2070 stable_and_no_regs_but_for_p (x, src, dst)
2073 RTX_CODE code = GET_CODE (x);
2074 switch (GET_RTX_CLASS (code))
2076 case '<': case '1': case 'c': case '2': case 'b': case '3':
2079 const char *fmt = GET_RTX_FORMAT (code);
2080 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2082 && ! stable_and_no_regs_but_for_p (XEXP (x, i), src, dst))
2088 return x == src || x == dst;
2089 /* If this is a MEM, look inside - there might be a register hidden in
2090 the address of an unchanging MEM. */
2092 && ! stable_and_no_regs_but_for_p (XEXP (x, 0), src, dst))
2096 return ! rtx_unstable_p (x);
2100 /* Track stack adjustments and stack memory references. Attempt to
2101 reduce the number of stack adjustments by back-propogating across
2102 the memory references.
2104 This is intended primarily for use with targets that do not define
2105 ACCUMULATE_OUTGOING_ARGS. It is of significantly more value to
2106 targets that define PREFERRED_STACK_BOUNDARY more aligned than
2107 STACK_BOUNDARY (e.g. x86), or if not all registers can be pushed
2108 (e.g. x86 fp regs) which would ordinarily have to be implemented
2109 as a sub/mov pair due to restrictions in calls.c.
2111 Propogation stops when any of the insns that need adjusting are
2112 (a) no longer valid because we've exceeded their range, (b) a
2113 non-trivial push instruction, or (c) a call instruction.
2115 Restriction B is based on the assumption that push instructions
2116 are smaller or faster. If a port really wants to remove all
2117 pushes, it should have defined ACCUMULATE_OUTGOING_ARGS. The
2118 one exception that is made is for an add immediately followed
2121 /* This structure records stack memory references between stack adjusting
2126 HOST_WIDE_INT sp_offset;
2128 struct csa_memlist *next;
2131 static int stack_memref_p PARAMS ((rtx));
2132 static rtx single_set_for_csa PARAMS ((rtx));
2133 static void free_csa_memlist PARAMS ((struct csa_memlist *));
2134 static struct csa_memlist *record_one_stack_memref
2135 PARAMS ((rtx, rtx *, struct csa_memlist *));
2136 static int try_apply_stack_adjustment
2137 PARAMS ((rtx, struct csa_memlist *, HOST_WIDE_INT, HOST_WIDE_INT));
2138 static void combine_stack_adjustments_for_block PARAMS ((basic_block));
2139 static int record_stack_memrefs PARAMS ((rtx *, void *));
2142 /* Main entry point for stack adjustment combination. */
2145 combine_stack_adjustments ()
2149 for (i = 0; i < n_basic_blocks; ++i)
2150 combine_stack_adjustments_for_block (BASIC_BLOCK (i));
2153 /* Recognize a MEM of the form (sp) or (plus sp const). */
2159 if (GET_CODE (x) != MEM)
2163 if (x == stack_pointer_rtx)
2165 if (GET_CODE (x) == PLUS
2166 && XEXP (x, 0) == stack_pointer_rtx
2167 && GET_CODE (XEXP (x, 1)) == CONST_INT)
2173 /* Recognize either normal single_set or the hack in i386.md for
2174 tying fp and sp adjustments. */
2177 single_set_for_csa (insn)
2181 rtx tmp = single_set (insn);
2185 if (GET_CODE (insn) != INSN
2186 || GET_CODE (PATTERN (insn)) != PARALLEL)
2189 tmp = PATTERN (insn);
2190 if (GET_CODE (XVECEXP (tmp, 0, 0)) != SET)
2193 for (i = 1; i < XVECLEN (tmp, 0); ++i)
2195 rtx this = XVECEXP (tmp, 0, i);
2197 /* The special case is allowing a no-op set. */
2198 if (GET_CODE (this) == SET
2199 && SET_SRC (this) == SET_DEST (this))
2201 else if (GET_CODE (this) != CLOBBER
2202 && GET_CODE (this) != USE)
2206 return XVECEXP (tmp, 0, 0);
2209 /* Free the list of csa_memlist nodes. */
2212 free_csa_memlist (memlist)
2213 struct csa_memlist *memlist;
2215 struct csa_memlist *next;
2216 for (; memlist ; memlist = next)
2218 next = memlist->next;
2223 /* Create a new csa_memlist node from the given memory reference.
2224 It is already known that the memory is stack_memref_p. */
2226 static struct csa_memlist *
2227 record_one_stack_memref (insn, mem, next_memlist)
2229 struct csa_memlist *next_memlist;
2231 struct csa_memlist *ml;
2233 ml = (struct csa_memlist *) xmalloc (sizeof (*ml));
2235 if (XEXP (*mem, 0) == stack_pointer_rtx)
2238 ml->sp_offset = INTVAL (XEXP (XEXP (*mem, 0), 1));
2242 ml->next = next_memlist;
2247 /* Attempt to apply ADJUST to the stack adjusting insn INSN, as well
2248 as each of the memories in MEMLIST. Return true on success. */
2251 try_apply_stack_adjustment (insn, memlist, new_adjust, delta)
2253 struct csa_memlist *memlist;
2254 HOST_WIDE_INT new_adjust, delta;
2256 struct csa_memlist *ml;
2259 set = single_set_for_csa (insn);
2260 validate_change (insn, &XEXP (SET_SRC (set), 1), GEN_INT (new_adjust), 1);
2262 for (ml = memlist; ml ; ml = ml->next)
2264 HOST_WIDE_INT c = ml->sp_offset - delta;
2265 rtx new = gen_rtx_MEM (GET_MODE (*ml->mem),
2266 plus_constant (stack_pointer_rtx, c));
2268 MEM_COPY_ATTRIBUTES (new, *ml->mem);
2269 validate_change (ml->insn, ml->mem, new, 1);
2272 if (apply_change_group ())
2274 /* Succeeded. Update our knowledge of the memory references. */
2275 for (ml = memlist; ml ; ml = ml->next)
2276 ml->sp_offset -= delta;
2284 /* Called via for_each_rtx and used to record all stack memory references in
2285 the insn and discard all other stack pointer references. */
2286 struct record_stack_memrefs_data
2289 struct csa_memlist *memlist;
2293 record_stack_memrefs (xp, data)
2298 struct record_stack_memrefs_data *d =
2299 (struct record_stack_memrefs_data *) data;
2302 switch (GET_CODE (x))
2305 if (!reg_mentioned_p (stack_pointer_rtx, x))
2307 /* We are not able to handle correctly all possible memrefs containing
2308 stack pointer, so this check is neccesary. */
2309 if (stack_memref_p (x))
2311 d->memlist = record_one_stack_memref (d->insn, xp, d->memlist);
2316 /* ??? We want be able to handle non-memory stack pointer
2317 references later. For now just discard all insns refering to
2318 stack pointer outside mem expressions. We would probably
2319 want to teach validate_replace to simplify expressions first.
2321 We can't just compare with STACK_POINTER_RTX because the
2322 reference to the stack pointer might be in some other mode.
2323 In particular, an explict clobber in an asm statement will
2324 result in a QImode clober. */
2325 if (REGNO (x) == STACK_POINTER_REGNUM)
2334 /* Subroutine of combine_stack_adjustments, called for each basic block. */
2337 combine_stack_adjustments_for_block (bb)
2340 HOST_WIDE_INT last_sp_adjust = 0;
2341 rtx last_sp_set = NULL_RTX;
2342 struct csa_memlist *memlist = NULL;
2345 struct record_stack_memrefs_data data;
2347 for (insn = bb->head; ; insn = next)
2351 pending_delete = NULL_RTX;
2352 next = NEXT_INSN (insn);
2354 if (! INSN_P (insn))
2357 set = single_set_for_csa (insn);
2360 rtx dest = SET_DEST (set);
2361 rtx src = SET_SRC (set);
2363 /* Find constant additions to the stack pointer. */
2364 if (dest == stack_pointer_rtx
2365 && GET_CODE (src) == PLUS
2366 && XEXP (src, 0) == stack_pointer_rtx
2367 && GET_CODE (XEXP (src, 1)) == CONST_INT)
2369 HOST_WIDE_INT this_adjust = INTVAL (XEXP (src, 1));
2371 /* If we've not seen an adjustment previously, record
2372 it now and continue. */
2376 last_sp_adjust = this_adjust;
2380 /* If not all recorded memrefs can be adjusted, or the
2381 adjustment is now too large for a constant addition,
2382 we cannot merge the two stack adjustments.
2384 Also we need to be carefull to not move stack pointer
2385 such that we create stack accesses outside the allocated
2386 area. We can combine an allocation into the first insn,
2387 or a deallocation into the second insn. We can not
2388 combine an allocation followed by a deallocation.
2390 The only somewhat frequent ocurrence of the later is when
2391 a function allocates a stack frame but does not use it.
2392 For this case, we would need to analyze rtl stream to be
2393 sure that allocated area is really unused. This means not
2394 only checking the memory references, but also all registers
2395 or global memory references possibly containing a stack
2398 Perhaps the best way to address this problem is to teach
2399 gcc not to allocate stack for objects never used. */
2401 /* Combine an allocation into the first instruction. */
2402 if (STACK_GROWS_DOWNWARD ? this_adjust <= 0 : this_adjust >= 0)
2404 if (try_apply_stack_adjustment (last_sp_set, memlist,
2405 last_sp_adjust + this_adjust,
2409 pending_delete = insn;
2410 last_sp_adjust += this_adjust;
2415 /* Otherwise we have a deallocation. Do not combine with
2416 a previous allocation. Combine into the second insn. */
2417 else if (STACK_GROWS_DOWNWARD
2418 ? last_sp_adjust >= 0 : last_sp_adjust <= 0)
2420 if (try_apply_stack_adjustment (insn, memlist,
2421 last_sp_adjust + this_adjust,
2425 flow_delete_insn (last_sp_set);
2427 last_sp_adjust += this_adjust;
2428 free_csa_memlist (memlist);
2434 /* Combination failed. Restart processing from here. */
2435 free_csa_memlist (memlist);
2438 last_sp_adjust = this_adjust;
2442 /* Find a predecrement of exactly the previous adjustment and
2443 turn it into a direct store. Obviously we can't do this if
2444 there were any intervening uses of the stack pointer. */
2446 && GET_CODE (dest) == MEM
2447 && ((GET_CODE (XEXP (dest, 0)) == PRE_DEC
2449 == (HOST_WIDE_INT) GET_MODE_SIZE (GET_MODE (dest))))
2450 || (GET_CODE (XEXP (dest, 0)) == PRE_MODIFY
2451 && GET_CODE (XEXP (XEXP (dest, 0), 1)) == PLUS
2452 && XEXP (XEXP (XEXP (dest, 0), 1), 0) == stack_pointer_rtx
2453 && (GET_CODE (XEXP (XEXP (XEXP (dest, 0), 1), 1))
2455 && (INTVAL (XEXP (XEXP (XEXP (dest, 0), 1), 1))
2456 == -last_sp_adjust)))
2457 && XEXP (XEXP (dest, 0), 0) == stack_pointer_rtx
2458 && ! reg_mentioned_p (stack_pointer_rtx, src)
2459 && memory_address_p (GET_MODE (dest), stack_pointer_rtx)
2460 && validate_change (insn, &SET_DEST (set),
2461 change_address (dest, VOIDmode,
2462 stack_pointer_rtx), 0))
2464 if (last_sp_set == bb->head)
2465 bb->head = NEXT_INSN (last_sp_set);
2466 flow_delete_insn (last_sp_set);
2468 free_csa_memlist (memlist);
2470 last_sp_set = NULL_RTX;
2477 data.memlist = memlist;
2478 if (GET_CODE (insn) != CALL_INSN && last_sp_set
2479 && !for_each_rtx (&PATTERN (insn), record_stack_memrefs, &data))
2481 memlist = data.memlist;
2484 memlist = data.memlist;
2486 /* Otherwise, we were not able to process the instruction.
2487 Do not continue collecting data across such a one. */
2489 && (GET_CODE (insn) == CALL_INSN
2490 || reg_mentioned_p (stack_pointer_rtx, PATTERN (insn))))
2492 free_csa_memlist (memlist);
2494 last_sp_set = NULL_RTX;
2499 if (insn == bb->end)
2503 flow_delete_insn (pending_delete);
2508 bb->end = PREV_INSN (pending_delete);
2509 flow_delete_insn (pending_delete);