1 /* Compute different info about registers.
2 Copyright (C) 1987, 1988, 1991, 1992, 1993, 1994, 1995, 1996
3 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
4 2009 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* This file contains regscan pass of the compiler and passes for
24 dealing with info about modes of pseudo-registers inside
25 subregisters. It also defines some tables of information about the
26 hardware registers, function init_reg_sets to initialize the
27 tables, and other auxiliary functions to deal with info about
28 registers and their classes. */
32 #include "coretypes.h"
34 #include "hard-reg-set.h"
39 #include "basic-block.h"
41 #include "addresses.h"
43 #include "insn-config.h"
47 #include "diagnostic-core.h"
53 #include "tree-pass.h"
57 /* Maximum register number used in this function, plus one. */
62 /* Register tables used by many passes. */
64 /* Indexed by hard register number, contains 1 for registers
65 that are fixed use (stack pointer, pc, frame pointer, etc.).
66 These are the registers that cannot be used to allocate
67 a pseudo reg for general use. */
68 char fixed_regs[FIRST_PSEUDO_REGISTER];
70 /* Same info as a HARD_REG_SET. */
71 HARD_REG_SET fixed_reg_set;
73 /* Data for initializing the above. */
74 static const char initial_fixed_regs[] = FIXED_REGISTERS;
76 /* Indexed by hard register number, contains 1 for registers
77 that are fixed use or are clobbered by function calls.
78 These are the registers that cannot be used to allocate
79 a pseudo reg whose life crosses calls unless we are able
80 to save/restore them across the calls. */
81 char call_used_regs[FIRST_PSEUDO_REGISTER];
83 /* Same info as a HARD_REG_SET. */
84 HARD_REG_SET call_used_reg_set;
86 /* Data for initializing the above. */
87 static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
89 /* This is much like call_used_regs, except it doesn't have to
90 be a superset of FIXED_REGISTERS. This vector indicates
91 what is really call clobbered, and is used when defining
92 regs_invalidated_by_call. */
93 #ifdef CALL_REALLY_USED_REGISTERS
94 char call_really_used_regs[] = CALL_REALLY_USED_REGISTERS;
97 #ifdef CALL_REALLY_USED_REGISTERS
98 #define CALL_REALLY_USED_REGNO_P(X) call_really_used_regs[X]
100 #define CALL_REALLY_USED_REGNO_P(X) call_used_regs[X]
104 /* Contains registers that are fixed use -- i.e. in fixed_reg_set -- or
105 a function value return register or TARGET_STRUCT_VALUE_RTX or
106 STATIC_CHAIN_REGNUM. These are the registers that cannot hold quantities
107 across calls even if we are willing to save and restore them. */
109 HARD_REG_SET call_fixed_reg_set;
111 /* Indexed by hard register number, contains 1 for registers
112 that are being used for global register decls.
113 These must be exempt from ordinary flow analysis
114 and are also considered fixed. */
115 char global_regs[FIRST_PSEUDO_REGISTER];
117 /* Contains 1 for registers that are set or clobbered by calls. */
118 /* ??? Ideally, this would be just call_used_regs plus global_regs, but
119 for someone's bright idea to have call_used_regs strictly include
120 fixed_regs. Which leaves us guessing as to the set of fixed_regs
121 that are actually preserved. We know for sure that those associated
122 with the local stack frame are safe, but scant others. */
123 HARD_REG_SET regs_invalidated_by_call;
125 /* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used
126 in dataflow more conveniently. */
127 regset regs_invalidated_by_call_regset;
129 /* The bitmap_obstack is used to hold some static variables that
130 should not be reset after each function is compiled. */
131 static bitmap_obstack persistent_obstack;
133 /* Table of register numbers in the order in which to try to use them. */
134 #ifdef REG_ALLOC_ORDER
135 int reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
137 /* The inverse of reg_alloc_order. */
138 int inv_reg_alloc_order[FIRST_PSEUDO_REGISTER];
141 /* For each reg class, a HARD_REG_SET saying which registers are in it. */
142 HARD_REG_SET reg_class_contents[N_REG_CLASSES];
144 /* The same information, but as an array of unsigned ints. We copy from
145 these unsigned ints to the table above. We do this so the tm.h files
146 do not have to be aware of the wordsize for machines with <= 64 regs.
147 Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
149 ((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
151 static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
152 = REG_CLASS_CONTENTS;
154 /* For each reg class, number of regs it contains. */
155 unsigned int reg_class_size[N_REG_CLASSES];
157 /* For each reg class, table listing all the classes contained in it. */
158 enum reg_class reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
160 /* For each pair of reg classes,
161 a largest reg class contained in their union. */
162 enum reg_class reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
164 /* For each pair of reg classes,
165 the smallest reg class containing their union. */
166 enum reg_class reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
168 /* Array containing all of the register names. */
169 const char * reg_names[] = REGISTER_NAMES;
171 /* Array containing all of the register class names. */
172 const char * reg_class_names[] = REG_CLASS_NAMES;
174 /* For each hard register, the widest mode object that it can contain.
175 This will be a MODE_INT mode if the register can hold integers. Otherwise
176 it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
178 enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER];
180 /* 1 if there is a register of given mode. */
181 bool have_regs_of_mode [MAX_MACHINE_MODE];
183 /* 1 if class does contain register of given mode. */
184 char contains_reg_of_mode [N_REG_CLASSES] [MAX_MACHINE_MODE];
186 /* Maximum cost of moving from a register in one class to a register in
187 another class. Based on TARGET_REGISTER_MOVE_COST. */
188 move_table *move_cost[MAX_MACHINE_MODE];
190 /* Similar, but here we don't have to move if the first index is a subset
191 of the second so in that case the cost is zero. */
192 move_table *may_move_in_cost[MAX_MACHINE_MODE];
194 /* Similar, but here we don't have to move if the first index is a superset
195 of the second so in that case the cost is zero. */
196 move_table *may_move_out_cost[MAX_MACHINE_MODE];
198 /* Keep track of the last mode we initialized move costs for. */
199 static int last_mode_for_init_move_cost;
201 /* Sample MEM values for use by memory_move_secondary_cost. */
202 static GTY(()) rtx top_of_stack[MAX_MACHINE_MODE];
204 /* No more global register variables may be declared; true once
205 reginfo has been initialized. */
206 static int no_global_reg_vars = 0;
208 /* Specify number of hard registers given machine mode occupy. */
209 unsigned char hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
211 /* Given a register bitmap, turn on the bits in a HARD_REG_SET that
212 correspond to the hard registers, if any, set in that map. This
213 could be done far more efficiently by having all sorts of special-cases
214 with moving single words, but probably isn't worth the trouble. */
216 reg_set_to_hard_reg_set (HARD_REG_SET *to, const_bitmap from)
221 EXECUTE_IF_SET_IN_BITMAP (from, 0, i, bi)
223 if (i >= FIRST_PSEUDO_REGISTER)
225 SET_HARD_REG_BIT (*to, i);
229 /* Function called only once to initialize the above data on reg usage.
230 Once this is done, various switches may override. */
236 /* First copy the register information from the initial int form into
239 for (i = 0; i < N_REG_CLASSES; i++)
241 CLEAR_HARD_REG_SET (reg_class_contents[i]);
243 /* Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
244 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
245 if (int_reg_class_contents[i][j / 32]
246 & ((unsigned) 1 << (j % 32)))
247 SET_HARD_REG_BIT (reg_class_contents[i], j);
250 /* Sanity check: make sure the target macros FIXED_REGISTERS and
251 CALL_USED_REGISTERS had the right number of initializers. */
252 gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs);
253 gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs);
255 memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs);
256 memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs);
257 memset (global_regs, 0, sizeof global_regs);
260 /* Initialize may_move_cost and friends for mode M. */
262 init_move_cost (enum machine_mode m)
264 static unsigned short last_move_cost[N_REG_CLASSES][N_REG_CLASSES];
265 bool all_match = true;
268 gcc_assert (have_regs_of_mode[m]);
269 for (i = 0; i < N_REG_CLASSES; i++)
270 if (contains_reg_of_mode[i][m])
271 for (j = 0; j < N_REG_CLASSES; j++)
274 if (!contains_reg_of_mode[j][m])
278 cost = register_move_cost (m, (enum reg_class) i,
280 gcc_assert (cost < 65535);
282 all_match &= (last_move_cost[i][j] == cost);
283 last_move_cost[i][j] = cost;
285 if (all_match && last_mode_for_init_move_cost != -1)
287 move_cost[m] = move_cost[last_mode_for_init_move_cost];
288 may_move_in_cost[m] = may_move_in_cost[last_mode_for_init_move_cost];
289 may_move_out_cost[m] = may_move_out_cost[last_mode_for_init_move_cost];
292 last_mode_for_init_move_cost = m;
293 move_cost[m] = (move_table *)xmalloc (sizeof (move_table)
295 may_move_in_cost[m] = (move_table *)xmalloc (sizeof (move_table)
297 may_move_out_cost[m] = (move_table *)xmalloc (sizeof (move_table)
299 for (i = 0; i < N_REG_CLASSES; i++)
300 if (contains_reg_of_mode[i][m])
301 for (j = 0; j < N_REG_CLASSES; j++)
304 enum reg_class *p1, *p2;
306 if (last_move_cost[i][j] == 65535)
308 move_cost[m][i][j] = 65535;
309 may_move_in_cost[m][i][j] = 65535;
310 may_move_out_cost[m][i][j] = 65535;
314 cost = last_move_cost[i][j];
316 for (p2 = ®_class_subclasses[j][0];
317 *p2 != LIM_REG_CLASSES; p2++)
318 if (*p2 != i && contains_reg_of_mode[*p2][m])
319 cost = MAX (cost, move_cost[m][i][*p2]);
321 for (p1 = ®_class_subclasses[i][0];
322 *p1 != LIM_REG_CLASSES; p1++)
323 if (*p1 != j && contains_reg_of_mode[*p1][m])
324 cost = MAX (cost, move_cost[m][*p1][j]);
326 gcc_assert (cost <= 65535);
327 move_cost[m][i][j] = cost;
329 if (reg_class_subset_p ((enum reg_class) i, (enum reg_class) j))
330 may_move_in_cost[m][i][j] = 0;
332 may_move_in_cost[m][i][j] = cost;
334 if (reg_class_subset_p ((enum reg_class) j, (enum reg_class) i))
335 may_move_out_cost[m][i][j] = 0;
337 may_move_out_cost[m][i][j] = cost;
341 for (j = 0; j < N_REG_CLASSES; j++)
343 move_cost[m][i][j] = 65535;
344 may_move_in_cost[m][i][j] = 65535;
345 may_move_out_cost[m][i][j] = 65535;
349 /* We need to save copies of some of the register information which
350 can be munged by command-line switches so we can restore it during
351 subsequent back-end reinitialization. */
352 static char saved_fixed_regs[FIRST_PSEUDO_REGISTER];
353 static char saved_call_used_regs[FIRST_PSEUDO_REGISTER];
354 #ifdef CALL_REALLY_USED_REGISTERS
355 static char saved_call_really_used_regs[FIRST_PSEUDO_REGISTER];
357 static const char *saved_reg_names[FIRST_PSEUDO_REGISTER];
359 /* Save the register information. */
361 save_register_info (void)
363 /* Sanity check: make sure the target macros FIXED_REGISTERS and
364 CALL_USED_REGISTERS had the right number of initializers. */
365 gcc_assert (sizeof fixed_regs == sizeof saved_fixed_regs);
366 gcc_assert (sizeof call_used_regs == sizeof saved_call_used_regs);
367 memcpy (saved_fixed_regs, fixed_regs, sizeof fixed_regs);
368 memcpy (saved_call_used_regs, call_used_regs, sizeof call_used_regs);
370 /* Likewise for call_really_used_regs. */
371 #ifdef CALL_REALLY_USED_REGISTERS
372 gcc_assert (sizeof call_really_used_regs
373 == sizeof saved_call_really_used_regs);
374 memcpy (saved_call_really_used_regs, call_really_used_regs,
375 sizeof call_really_used_regs);
378 /* And similarly for reg_names. */
379 gcc_assert (sizeof reg_names == sizeof saved_reg_names);
380 memcpy (saved_reg_names, reg_names, sizeof reg_names);
383 /* Restore the register information. */
385 restore_register_info (void)
387 memcpy (fixed_regs, saved_fixed_regs, sizeof fixed_regs);
388 memcpy (call_used_regs, saved_call_used_regs, sizeof call_used_regs);
390 #ifdef CALL_REALLY_USED_REGISTERS
391 memcpy (call_really_used_regs, saved_call_really_used_regs,
392 sizeof call_really_used_regs);
395 memcpy (reg_names, saved_reg_names, sizeof reg_names);
398 /* After switches have been processed, which perhaps alter
399 `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */
401 init_reg_sets_1 (void)
404 unsigned int /* enum machine_mode */ m;
406 restore_register_info ();
408 #ifdef REG_ALLOC_ORDER
409 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
410 inv_reg_alloc_order[reg_alloc_order[i]] = i;
413 /* This macro allows the fixed or call-used registers
414 and the register classes to depend on target flags. */
416 #ifdef CONDITIONAL_REGISTER_USAGE
417 CONDITIONAL_REGISTER_USAGE;
420 /* Compute number of hard regs in each class. */
422 memset (reg_class_size, 0, sizeof reg_class_size);
423 for (i = 0; i < N_REG_CLASSES; i++)
424 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
425 if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
428 /* Initialize the table of subunions.
429 reg_class_subunion[I][J] gets the largest-numbered reg-class
430 that is contained in the union of classes I and J. */
432 memset (reg_class_subunion, 0, sizeof reg_class_subunion);
433 for (i = 0; i < N_REG_CLASSES; i++)
435 for (j = 0; j < N_REG_CLASSES; j++)
440 COPY_HARD_REG_SET (c, reg_class_contents[i]);
441 IOR_HARD_REG_SET (c, reg_class_contents[j]);
442 for (k = 0; k < N_REG_CLASSES; k++)
443 if (hard_reg_set_subset_p (reg_class_contents[k], c)
444 && !hard_reg_set_subset_p (reg_class_contents[k],
446 [(int) reg_class_subunion[i][j]]))
447 reg_class_subunion[i][j] = (enum reg_class) k;
451 /* Initialize the table of superunions.
452 reg_class_superunion[I][J] gets the smallest-numbered reg-class
453 containing the union of classes I and J. */
455 memset (reg_class_superunion, 0, sizeof reg_class_superunion);
456 for (i = 0; i < N_REG_CLASSES; i++)
458 for (j = 0; j < N_REG_CLASSES; j++)
463 COPY_HARD_REG_SET (c, reg_class_contents[i]);
464 IOR_HARD_REG_SET (c, reg_class_contents[j]);
465 for (k = 0; k < N_REG_CLASSES; k++)
466 if (hard_reg_set_subset_p (c, reg_class_contents[k]))
469 reg_class_superunion[i][j] = (enum reg_class) k;
473 /* Initialize the tables of subclasses and superclasses of each reg class.
474 First clear the whole table, then add the elements as they are found. */
476 for (i = 0; i < N_REG_CLASSES; i++)
478 for (j = 0; j < N_REG_CLASSES; j++)
479 reg_class_subclasses[i][j] = LIM_REG_CLASSES;
482 for (i = 0; i < N_REG_CLASSES; i++)
484 if (i == (int) NO_REGS)
487 for (j = i + 1; j < N_REG_CLASSES; j++)
488 if (hard_reg_set_subset_p (reg_class_contents[i],
489 reg_class_contents[j]))
491 /* Reg class I is a subclass of J.
492 Add J to the table of superclasses of I. */
495 /* Add I to the table of superclasses of J. */
496 p = ®_class_subclasses[j][0];
497 while (*p != LIM_REG_CLASSES) p++;
498 *p = (enum reg_class) i;
502 /* Initialize "constant" tables. */
504 CLEAR_HARD_REG_SET (fixed_reg_set);
505 CLEAR_HARD_REG_SET (call_used_reg_set);
506 CLEAR_HARD_REG_SET (call_fixed_reg_set);
507 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
508 if (!regs_invalidated_by_call_regset)
510 bitmap_obstack_initialize (&persistent_obstack);
511 regs_invalidated_by_call_regset = ALLOC_REG_SET (&persistent_obstack);
514 CLEAR_REG_SET (regs_invalidated_by_call_regset);
516 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
518 /* call_used_regs must include fixed_regs. */
519 gcc_assert (!fixed_regs[i] || call_used_regs[i]);
520 #ifdef CALL_REALLY_USED_REGISTERS
521 /* call_used_regs must include call_really_used_regs. */
522 gcc_assert (!call_really_used_regs[i] || call_used_regs[i]);
526 SET_HARD_REG_BIT (fixed_reg_set, i);
528 if (call_used_regs[i])
529 SET_HARD_REG_BIT (call_used_reg_set, i);
531 /* There are a couple of fixed registers that we know are safe to
532 exclude from being clobbered by calls:
534 The frame pointer is always preserved across calls. The arg
535 pointer is if it is fixed. The stack pointer usually is,
536 unless TARGET_RETURN_POPS_ARGS, in which case an explicit
537 CLOBBER will be present. If we are generating PIC code, the
538 PIC offset table register is preserved across calls, though the
539 target can override that. */
541 if (i == STACK_POINTER_REGNUM)
543 else if (global_regs[i])
545 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
546 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
548 else if (i == FRAME_POINTER_REGNUM)
550 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
551 else if (i == HARD_FRAME_POINTER_REGNUM)
554 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
555 else if (i == ARG_POINTER_REGNUM && fixed_regs[i])
558 #ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
559 else if (i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i])
562 else if (CALL_REALLY_USED_REGNO_P (i))
564 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
565 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
569 COPY_HARD_REG_SET(call_fixed_reg_set, fixed_reg_set);
571 /* Preserve global registers if called more than once. */
572 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
576 fixed_regs[i] = call_used_regs[i] = 1;
577 SET_HARD_REG_BIT (fixed_reg_set, i);
578 SET_HARD_REG_BIT (call_used_reg_set, i);
579 SET_HARD_REG_BIT (call_fixed_reg_set, i);
583 memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode));
584 memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
585 for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
587 HARD_REG_SET ok_regs;
588 CLEAR_HARD_REG_SET (ok_regs);
589 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
590 if (!fixed_regs [j] && HARD_REGNO_MODE_OK (j, (enum machine_mode) m))
591 SET_HARD_REG_BIT (ok_regs, j);
593 for (i = 0; i < N_REG_CLASSES; i++)
594 if (((unsigned) CLASS_MAX_NREGS ((enum reg_class) i,
595 (enum machine_mode) m)
596 <= reg_class_size[i])
597 && hard_reg_set_intersect_p (ok_regs, reg_class_contents[i]))
599 contains_reg_of_mode [i][m] = 1;
600 have_regs_of_mode [m] = 1;
604 /* Reset move_cost and friends, making sure we only free shared
605 table entries once. */
606 for (i = 0; i < MAX_MACHINE_MODE; i++)
609 for (j = 0; j < i && move_cost[i] != move_cost[j]; j++)
614 free (may_move_in_cost[i]);
615 free (may_move_out_cost[i]);
618 memset (move_cost, 0, sizeof move_cost);
619 memset (may_move_in_cost, 0, sizeof may_move_in_cost);
620 memset (may_move_out_cost, 0, sizeof may_move_out_cost);
621 last_mode_for_init_move_cost = -1;
624 /* Compute the table of register modes.
625 These values are used to record death information for individual registers
626 (as opposed to a multi-register mode).
627 This function might be invoked more than once, if the target has support
628 for changing register usage conventions on a per-function basis.
631 init_reg_modes_target (void)
635 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
636 for (j = 0; j < MAX_MACHINE_MODE; j++)
637 hard_regno_nregs[i][j] = HARD_REGNO_NREGS(i, (enum machine_mode)j);
639 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
641 reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false);
643 /* If we couldn't find a valid mode, just use the previous mode.
644 ??? One situation in which we need to do this is on the mips where
645 HARD_REGNO_NREGS (fpreg, [SD]Fmode) returns 2. Ideally we'd like
646 to use DF mode for the even registers and VOIDmode for the odd
647 (for the cpu models where the odd ones are inaccessible). */
648 if (reg_raw_mode[i] == VOIDmode)
649 reg_raw_mode[i] = i == 0 ? word_mode : reg_raw_mode[i-1];
653 /* Finish initializing the register sets and initialize the register modes.
654 This function might be invoked more than once, if the target has support
655 for changing register usage conventions on a per-function basis.
660 /* This finishes what was started by init_reg_sets, but couldn't be done
661 until after register usage was specified. */
665 /* The same as previous function plus initializing IRA. */
670 /* caller_save needs to be re-initialized. */
671 caller_save_initialized_p = false;
675 /* Initialize some fake stack-frame MEM references for use in
676 memory_move_secondary_cost. */
678 init_fake_stack_mems (void)
682 for (i = 0; i < MAX_MACHINE_MODE; i++)
683 top_of_stack[i] = gen_rtx_MEM ((enum machine_mode) i, stack_pointer_rtx);
687 /* Compute cost of moving data from a register of class FROM to one of
691 register_move_cost (enum machine_mode mode, enum reg_class from,
694 return targetm.register_move_cost (mode, from, to);
697 /* Compute cost of moving registers to/from memory. */
699 memory_move_cost (enum machine_mode mode, enum reg_class rclass, bool in)
701 return targetm.memory_move_cost (mode, rclass, in);
704 /* Compute extra cost of moving registers to/from memory due to reloads.
705 Only needed if secondary reloads are required for memory moves. */
707 memory_move_secondary_cost (enum machine_mode mode, enum reg_class rclass,
710 enum reg_class altclass;
711 int partial_cost = 0;
712 /* We need a memory reference to feed to SECONDARY... macros. */
713 /* mem may be unused even if the SECONDARY_ macros are defined. */
714 rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode];
716 altclass = secondary_reload_class (in ? 1 : 0, rclass, mode, mem);
718 if (altclass == NO_REGS)
722 partial_cost = register_move_cost (mode, altclass, rclass);
724 partial_cost = register_move_cost (mode, rclass, altclass);
726 if (rclass == altclass)
727 /* This isn't simply a copy-to-temporary situation. Can't guess
728 what it is, so TARGET_MEMORY_MOVE_COST really ought not to be
729 calling here in that case.
731 I'm tempted to put in an assert here, but returning this will
732 probably only give poor estimates, which is what we would've
733 had before this code anyways. */
736 /* Check if the secondary reload register will also need a
738 return memory_move_secondary_cost (mode, altclass, in) + partial_cost;
741 /* Return a machine mode that is legitimate for hard reg REGNO and large
742 enough to save nregs. If we can't find one, return VOIDmode.
743 If CALL_SAVED is true, only consider modes that are call saved. */
745 choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED,
746 unsigned int nregs, bool call_saved)
748 unsigned int /* enum machine_mode */ m;
749 enum machine_mode found_mode = VOIDmode, mode;
751 /* We first look for the largest integer mode that can be validly
752 held in REGNO. If none, we look for the largest floating-point mode.
753 If we still didn't find a valid mode, try CCmode. */
755 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
757 mode = GET_MODE_WIDER_MODE (mode))
758 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
759 && HARD_REGNO_MODE_OK (regno, mode)
760 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
763 if (found_mode != VOIDmode)
766 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
768 mode = GET_MODE_WIDER_MODE (mode))
769 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
770 && HARD_REGNO_MODE_OK (regno, mode)
771 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
774 if (found_mode != VOIDmode)
777 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
779 mode = GET_MODE_WIDER_MODE (mode))
780 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
781 && HARD_REGNO_MODE_OK (regno, mode)
782 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
785 if (found_mode != VOIDmode)
788 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
790 mode = GET_MODE_WIDER_MODE (mode))
791 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
792 && HARD_REGNO_MODE_OK (regno, mode)
793 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
796 if (found_mode != VOIDmode)
799 /* Iterate over all of the CCmodes. */
800 for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m)
802 mode = (enum machine_mode) m;
803 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
804 && HARD_REGNO_MODE_OK (regno, mode)
805 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
809 /* We can't find a mode valid for this register. */
813 /* Specify the usage characteristics of the register named NAME.
814 It should be a fixed register if FIXED and a
815 call-used register if CALL_USED. */
817 fix_register (const char *name, int fixed, int call_used)
821 /* Decode the name and update the primary form of
822 the register info. */
824 if ((i = decode_reg_name (name)) >= 0)
826 if ((i == STACK_POINTER_REGNUM
827 #ifdef HARD_FRAME_POINTER_REGNUM
828 || i == HARD_FRAME_POINTER_REGNUM
830 || i == FRAME_POINTER_REGNUM
833 && (fixed == 0 || call_used == 0))
835 static const char * const what_option[2][2] = {
836 { "call-saved", "call-used" },
837 { "no-such-option", "fixed" }};
839 error ("can't use '%s' as a %s register", name,
840 what_option[fixed][call_used]);
844 fixed_regs[i] = fixed;
845 call_used_regs[i] = call_used;
846 #ifdef CALL_REALLY_USED_REGISTERS
848 call_really_used_regs[i] = call_used;
854 warning (0, "unknown register name: %s", name);
858 /* Mark register number I as global. */
860 globalize_reg (int i)
862 if (fixed_regs[i] == 0 && no_global_reg_vars)
863 error ("global register variable follows a function definition");
867 warning (0, "register used for two global register variables");
871 if (call_used_regs[i] && ! fixed_regs[i])
872 warning (0, "call-clobbered register used for global register variable");
876 /* If we're globalizing the frame pointer, we need to set the
877 appropriate regs_invalidated_by_call bit, even if it's already
878 set in fixed_regs. */
879 if (i != STACK_POINTER_REGNUM)
881 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
882 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
885 /* If already fixed, nothing else to do. */
889 fixed_regs[i] = call_used_regs[i] = 1;
890 #ifdef CALL_REALLY_USED_REGISTERS
891 call_really_used_regs[i] = 1;
894 SET_HARD_REG_BIT (fixed_reg_set, i);
895 SET_HARD_REG_BIT (call_used_reg_set, i);
896 SET_HARD_REG_BIT (call_fixed_reg_set, i);
902 /* Structure used to record preferences of given pseudo. */
905 /* (enum reg_class) prefclass is the preferred class. May be
906 NO_REGS if no class is better than memory. */
909 /* altclass is a register class that we should use for allocating
910 pseudo if no register in the preferred class is available.
911 If no register in this class is available, memory is preferred.
913 It might appear to be more general to have a bitmask of classes here,
914 but since it is recommended that there be a class corresponding to the
915 union of most major pair of classes, that generality is not required. */
918 /* coverclass is a register class that IRA uses for allocating
923 /* Record preferences of each pseudo. This is available after RA is
925 static struct reg_pref *reg_pref;
927 /* Current size of reg_info. */
928 static int reg_info_size;
930 /* Return the reg_class in which pseudo reg number REGNO is best allocated.
931 This function is sometimes called before the info has been computed.
932 When that happens, just return GENERAL_REGS, which is innocuous. */
934 reg_preferred_class (int regno)
939 return (enum reg_class) reg_pref[regno].prefclass;
943 reg_alternate_class (int regno)
948 return (enum reg_class) reg_pref[regno].altclass;
951 /* Return the reg_class which is used by IRA for its allocation. */
953 reg_cover_class (int regno)
958 return (enum reg_class) reg_pref[regno].coverclass;
963 /* Allocate space for reg info. */
965 allocate_reg_info (void)
967 reg_info_size = max_reg_num ();
968 gcc_assert (! reg_pref && ! reg_renumber);
969 reg_renumber = XNEWVEC (short, reg_info_size);
970 reg_pref = XCNEWVEC (struct reg_pref, reg_info_size);
971 memset (reg_renumber, -1, reg_info_size * sizeof (short));
975 /* Resize reg info. The new elements will be uninitialized. Return
976 TRUE if new elements (for new pseudos) were added. */
978 resize_reg_info (void)
982 if (reg_pref == NULL)
984 allocate_reg_info ();
987 if (reg_info_size == max_reg_num ())
990 reg_info_size = max_reg_num ();
991 gcc_assert (reg_pref && reg_renumber);
992 reg_renumber = XRESIZEVEC (short, reg_renumber, reg_info_size);
993 reg_pref = XRESIZEVEC (struct reg_pref, reg_pref, reg_info_size);
994 memset (reg_pref + old, -1,
995 (reg_info_size - old) * sizeof (struct reg_pref));
996 memset (reg_renumber + old, -1, (reg_info_size - old) * sizeof (short));
1001 /* Free up the space allocated by allocate_reg_info. */
1003 free_reg_info (void)
1013 free (reg_renumber);
1014 reg_renumber = NULL;
1018 /* Initialize some global data for this pass. */
1023 df_compute_regs_ever_live (true);
1025 /* This prevents dump_flow_info from losing if called
1026 before reginfo is run. */
1028 /* No more global register variables may be declared. */
1029 no_global_reg_vars = 1;
1033 struct rtl_opt_pass pass_reginfo_init =
1037 "reginfo", /* name */
1039 reginfo_init, /* execute */
1042 0, /* static_pass_number */
1043 TV_NONE, /* tv_id */
1044 0, /* properties_required */
1045 0, /* properties_provided */
1046 0, /* properties_destroyed */
1047 0, /* todo_flags_start */
1048 0 /* todo_flags_finish */
1054 /* Set up preferred, alternate, and cover classes for REGNO as
1055 PREFCLASS, ALTCLASS, and COVERCLASS. */
1057 setup_reg_classes (int regno,
1058 enum reg_class prefclass, enum reg_class altclass,
1059 enum reg_class coverclass)
1061 if (reg_pref == NULL)
1063 gcc_assert (reg_info_size == max_reg_num ());
1064 reg_pref[regno].prefclass = prefclass;
1065 reg_pref[regno].altclass = altclass;
1066 reg_pref[regno].coverclass = coverclass;
1070 /* This is the `regscan' pass of the compiler, run just before cse and
1071 again just before loop. It finds the first and last use of each
1074 static void reg_scan_mark_refs (rtx, rtx);
1077 reg_scan (rtx f, unsigned int nregs ATTRIBUTE_UNUSED)
1081 timevar_push (TV_REG_SCAN);
1083 for (insn = f; insn; insn = NEXT_INSN (insn))
1086 reg_scan_mark_refs (PATTERN (insn), insn);
1087 if (REG_NOTES (insn))
1088 reg_scan_mark_refs (REG_NOTES (insn), insn);
1091 timevar_pop (TV_REG_SCAN);
1095 /* X is the expression to scan. INSN is the insn it appears in.
1096 NOTE_FLAG is nonzero if X is from INSN's notes rather than its body.
1097 We should only record information for REGs with numbers
1098 greater than or equal to MIN_REGNO. */
1100 reg_scan_mark_refs (rtx x, rtx insn)
1108 code = GET_CODE (x);
1127 reg_scan_mark_refs (XEXP (x, 0), insn);
1129 reg_scan_mark_refs (XEXP (x, 1), insn);
1134 reg_scan_mark_refs (XEXP (x, 1), insn);
1138 if (MEM_P (XEXP (x, 0)))
1139 reg_scan_mark_refs (XEXP (XEXP (x, 0), 0), insn);
1143 /* Count a set of the destination if it is a register. */
1144 for (dest = SET_DEST (x);
1145 GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
1146 || GET_CODE (dest) == ZERO_EXTEND;
1147 dest = XEXP (dest, 0))
1150 /* If this is setting a pseudo from another pseudo or the sum of a
1151 pseudo and a constant integer and the other pseudo is known to be
1152 a pointer, set the destination to be a pointer as well.
1154 Likewise if it is setting the destination from an address or from a
1155 value equivalent to an address or to the sum of an address and
1158 But don't do any of this if the pseudo corresponds to a user
1159 variable since it should have already been set as a pointer based
1162 if (REG_P (SET_DEST (x))
1163 && REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER
1164 /* If the destination pseudo is set more than once, then other
1165 sets might not be to a pointer value (consider access to a
1166 union in two threads of control in the presence of global
1167 optimizations). So only set REG_POINTER on the destination
1168 pseudo if this is the only set of that pseudo. */
1169 && DF_REG_DEF_COUNT (REGNO (SET_DEST (x))) == 1
1170 && ! REG_USERVAR_P (SET_DEST (x))
1171 && ! REG_POINTER (SET_DEST (x))
1172 && ((REG_P (SET_SRC (x))
1173 && REG_POINTER (SET_SRC (x)))
1174 || ((GET_CODE (SET_SRC (x)) == PLUS
1175 || GET_CODE (SET_SRC (x)) == LO_SUM)
1176 && CONST_INT_P (XEXP (SET_SRC (x), 1))
1177 && REG_P (XEXP (SET_SRC (x), 0))
1178 && REG_POINTER (XEXP (SET_SRC (x), 0)))
1179 || GET_CODE (SET_SRC (x)) == CONST
1180 || GET_CODE (SET_SRC (x)) == SYMBOL_REF
1181 || GET_CODE (SET_SRC (x)) == LABEL_REF
1182 || (GET_CODE (SET_SRC (x)) == HIGH
1183 && (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST
1184 || GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF
1185 || GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF))
1186 || ((GET_CODE (SET_SRC (x)) == PLUS
1187 || GET_CODE (SET_SRC (x)) == LO_SUM)
1188 && (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST
1189 || GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF
1190 || GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF))
1191 || ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
1192 && (GET_CODE (XEXP (note, 0)) == CONST
1193 || GET_CODE (XEXP (note, 0)) == SYMBOL_REF
1194 || GET_CODE (XEXP (note, 0)) == LABEL_REF))))
1195 REG_POINTER (SET_DEST (x)) = 1;
1197 /* If this is setting a register from a register or from a simple
1198 conversion of a register, propagate REG_EXPR. */
1199 if (REG_P (dest) && !REG_ATTRS (dest))
1201 rtx src = SET_SRC (x);
1203 while (GET_CODE (src) == SIGN_EXTEND
1204 || GET_CODE (src) == ZERO_EXTEND
1205 || GET_CODE (src) == TRUNCATE
1206 || (GET_CODE (src) == SUBREG && subreg_lowpart_p (src)))
1207 src = XEXP (src, 0);
1209 set_reg_attrs_from_value (dest, src);
1212 /* ... fall through ... */
1216 const char *fmt = GET_RTX_FORMAT (code);
1218 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1221 reg_scan_mark_refs (XEXP (x, i), insn);
1222 else if (fmt[i] == 'E' && XVEC (x, i) != 0)
1225 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1226 reg_scan_mark_refs (XVECEXP (x, i, j), insn);
1234 /* Return nonzero if C1 is a subset of C2, i.e., if every register in C1
1237 reg_class_subset_p (enum reg_class c1, enum reg_class c2)
1241 || hard_reg_set_subset_p (reg_class_contents[(int) c1],
1242 reg_class_contents[(int) c2]));
1245 /* Return nonzero if there is a register that is in both C1 and C2. */
1247 reg_classes_intersect_p (enum reg_class c1, enum reg_class c2)
1252 || hard_reg_set_intersect_p (reg_class_contents[(int) c1],
1253 reg_class_contents[(int) c2]));
1258 /* Passes for keeping and updating info about modes of registers
1259 inside subregisters. */
1261 #ifdef CANNOT_CHANGE_MODE_CLASS
1263 struct subregs_of_mode_node
1266 unsigned char modes[MAX_MACHINE_MODE];
1269 static htab_t subregs_of_mode;
1272 som_hash (const void *x)
1274 const struct subregs_of_mode_node *const a =
1275 (const struct subregs_of_mode_node *) x;
1280 som_eq (const void *x, const void *y)
1282 const struct subregs_of_mode_node *const a =
1283 (const struct subregs_of_mode_node *) x;
1284 const struct subregs_of_mode_node *const b =
1285 (const struct subregs_of_mode_node *) y;
1286 return a->block == b->block;
1290 record_subregs_of_mode (rtx subreg)
1292 struct subregs_of_mode_node dummy, *node;
1293 enum machine_mode mode;
1297 if (!REG_P (SUBREG_REG (subreg)))
1300 regno = REGNO (SUBREG_REG (subreg));
1301 mode = GET_MODE (subreg);
1303 if (regno < FIRST_PSEUDO_REGISTER)
1306 dummy.block = regno & -8;
1307 slot = htab_find_slot_with_hash (subregs_of_mode, &dummy,
1308 dummy.block, INSERT);
1309 node = (struct subregs_of_mode_node *) *slot;
1312 node = XCNEW (struct subregs_of_mode_node);
1313 node->block = regno & -8;
1317 node->modes[mode] |= 1 << (regno & 7);
1320 /* Call record_subregs_of_mode for all the subregs in X. */
1322 find_subregs_of_mode (rtx x)
1324 enum rtx_code code = GET_CODE (x);
1325 const char * const fmt = GET_RTX_FORMAT (code);
1329 record_subregs_of_mode (x);
1331 /* Time for some deep diving. */
1332 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1335 find_subregs_of_mode (XEXP (x, i));
1336 else if (fmt[i] == 'E')
1339 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1340 find_subregs_of_mode (XVECEXP (x, i, j));
1346 init_subregs_of_mode (void)
1351 if (subregs_of_mode)
1352 htab_empty (subregs_of_mode);
1354 subregs_of_mode = htab_create (100, som_hash, som_eq, free);
1357 FOR_BB_INSNS (bb, insn)
1359 find_subregs_of_mode (PATTERN (insn));
1362 /* Return 1 if REGNO has had an invalid mode change in CLASS from FROM
1365 invalid_mode_change_p (unsigned int regno,
1366 enum reg_class rclass ATTRIBUTE_UNUSED,
1367 enum machine_mode from)
1369 struct subregs_of_mode_node dummy, *node;
1373 gcc_assert (subregs_of_mode);
1374 dummy.block = regno & -8;
1375 node = (struct subregs_of_mode_node *)
1376 htab_find_with_hash (subregs_of_mode, &dummy, dummy.block);
1380 mask = 1 << (regno & 7);
1381 for (to = VOIDmode; to < NUM_MACHINE_MODES; to++)
1382 if (node->modes[to] & mask)
1383 if (CANNOT_CHANGE_MODE_CLASS (from, (enum machine_mode) to, rclass))
1390 finish_subregs_of_mode (void)
1392 htab_delete (subregs_of_mode);
1393 subregs_of_mode = 0;
1397 init_subregs_of_mode (void)
1401 finish_subregs_of_mode (void)
1405 #endif /* CANNOT_CHANGE_MODE_CLASS */
1407 #include "gt-reginfo.h"