1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
25 * The form of the input:
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
45 * The form of the output:
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
105 asm ("foo" : "=t" (a) : "f" (b));
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, i.e., the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
116 The asm above would be written as
118 asm ("foo" : "=&t" (a) : "f" (b));
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
156 #include "coretypes.h"
161 #include "function.h"
162 #include "insn-config.h"
164 #include "hard-reg-set.h"
169 #include "basic-block.h"
174 #include "tree-pass.h"
180 /* We use this array to cache info about insns, because otherwise we
181 spend too much time in stack_regs_mentioned_p.
183 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
184 the insn uses stack registers, two indicates the insn does not use
186 static VEC(char,heap) *stack_regs_mentioned_data;
188 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
190 int regstack_completed = 0;
192 /* This is the basic stack record. TOP is an index into REG[] such
193 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
195 If TOP is -2, REG[] is not yet initialized. Stack initialization
196 consists of placing each live reg in array `reg' and setting `top'
199 REG_SET indicates which registers are live. */
201 typedef struct stack_def
203 int top; /* index to top stack element */
204 HARD_REG_SET reg_set; /* set of live registers */
205 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
208 /* This is used to carry information about basic blocks. It is
209 attached to the AUX field of the standard CFG block. */
211 typedef struct block_info_def
213 struct stack_def stack_in; /* Input stack configuration. */
214 struct stack_def stack_out; /* Output stack configuration. */
215 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
216 int done; /* True if block already converted. */
217 int predecessors; /* Number of predecessors that need
221 #define BLOCK_INFO(B) ((block_info) (B)->aux)
223 /* Passed to change_stack to indicate where to emit insns. */
230 /* The block we're currently working on. */
231 static basic_block current_block;
233 /* In the current_block, whether we're processing the first register
234 stack or call instruction, i.e. the regstack is currently the
235 same as BLOCK_INFO(current_block)->stack_in. */
236 static bool starting_stack_p;
238 /* This is the register file for all register after conversion. */
240 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
242 #define FP_MODE_REG(regno,mode) \
243 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
245 /* Used to initialize uninitialized registers. */
246 static rtx not_a_num;
248 /* Forward declarations */
250 static int stack_regs_mentioned_p (rtx pat);
251 static void pop_stack (stack, int);
252 static rtx *get_true_reg (rtx *);
254 static int check_asm_stack_operands (rtx);
255 static int get_asm_operand_n_inputs (rtx);
256 static rtx stack_result (tree);
257 static void replace_reg (rtx *, int);
258 static void remove_regno_note (rtx, enum reg_note, unsigned int);
259 static int get_hard_regnum (stack, rtx);
260 static rtx emit_pop_insn (rtx, stack, rtx, enum emit_where);
261 static void swap_to_top(rtx, stack, rtx, rtx);
262 static bool move_for_stack_reg (rtx, stack, rtx);
263 static bool move_nan_for_stack_reg (rtx, stack, rtx);
264 static int swap_rtx_condition_1 (rtx);
265 static int swap_rtx_condition (rtx);
266 static void compare_for_stack_reg (rtx, stack, rtx);
267 static bool subst_stack_regs_pat (rtx, stack, rtx);
268 static void subst_asm_stack_regs (rtx, stack);
269 static bool subst_stack_regs (rtx, stack);
270 static void change_stack (rtx, stack, stack, enum emit_where);
271 static void print_stack (FILE *, stack);
272 static rtx next_flags_user (rtx);
274 /* Return nonzero if any stack register is mentioned somewhere within PAT. */
277 stack_regs_mentioned_p (rtx pat)
282 if (STACK_REG_P (pat))
285 fmt = GET_RTX_FORMAT (GET_CODE (pat));
286 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
292 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
293 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
296 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
303 /* Return nonzero if INSN mentions stacked registers, else return zero. */
306 stack_regs_mentioned (rtx insn)
308 unsigned int uid, max;
311 if (! INSN_P (insn) || !stack_regs_mentioned_data)
314 uid = INSN_UID (insn);
315 max = VEC_length (char, stack_regs_mentioned_data);
319 unsigned int old_max = max;
321 /* Allocate some extra size to avoid too many reallocs, but
322 do not grow too quickly. */
323 max = uid + uid / 20 + 1;
324 VEC_safe_grow (char, heap, stack_regs_mentioned_data, max);
325 p = VEC_address (char, stack_regs_mentioned_data);
326 memset (&p[old_max], 0,
327 sizeof (char) * (max - old_max));
330 test = VEC_index (char, stack_regs_mentioned_data, uid);
333 /* This insn has yet to be examined. Do so now. */
334 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
335 VEC_replace (char, stack_regs_mentioned_data, uid, test);
341 static rtx ix86_flags_rtx;
344 next_flags_user (rtx insn)
346 /* Search forward looking for the first use of this value.
347 Stop at block boundaries. */
349 while (insn != BB_END (current_block))
351 insn = NEXT_INSN (insn);
353 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
362 /* Reorganize the stack into ascending numbers, before this insn. */
365 straighten_stack (rtx insn, stack regstack)
367 struct stack_def temp_stack;
370 /* If there is only a single register on the stack, then the stack is
371 already in increasing order and no reorganization is needed.
373 Similarly if the stack is empty. */
374 if (regstack->top <= 0)
377 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
379 for (top = temp_stack.top = regstack->top; top >= 0; top--)
380 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
382 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
385 /* Pop a register from the stack. */
388 pop_stack (stack regstack, int regno)
390 int top = regstack->top;
392 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
394 /* If regno was not at the top of stack then adjust stack. */
395 if (regstack->reg [top] != regno)
398 for (i = regstack->top; i >= 0; i--)
399 if (regstack->reg [i] == regno)
402 for (j = i; j < top; j++)
403 regstack->reg [j] = regstack->reg [j + 1];
409 /* Return a pointer to the REG expression within PAT. If PAT is not a
410 REG, possible enclosed by a conversion rtx, return the inner part of
411 PAT that stopped the search. */
414 get_true_reg (rtx *pat)
417 switch (GET_CODE (*pat))
420 /* Eliminate FP subregister accesses in favor of the
421 actual FP register in use. */
424 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
426 int regno_off = subreg_regno_offset (REGNO (subreg),
430 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
439 pat = & XEXP (*pat, 0);
443 if (XINT (*pat, 1) == UNSPEC_TRUNC_NOOP)
445 pat = & XVECEXP (*pat, 0, 0);
450 if (!flag_unsafe_math_optimizations)
452 pat = & XEXP (*pat, 0);
457 /* Set if we find any malformed asms in a block. */
458 static bool any_malformed_asm;
460 /* There are many rules that an asm statement for stack-like regs must
461 follow. Those rules are explained at the top of this file: the rule
462 numbers below refer to that explanation. */
465 check_asm_stack_operands (rtx insn)
469 int malformed_asm = 0;
470 rtx body = PATTERN (insn);
472 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
473 char implicitly_dies[FIRST_PSEUDO_REGISTER];
476 rtx *clobber_reg = 0;
477 int n_inputs, n_outputs;
479 /* Find out what the constraints require. If no constraint
480 alternative matches, this asm is malformed. */
482 constrain_operands (1);
483 alt = which_alternative;
485 preprocess_constraints ();
487 n_inputs = get_asm_operand_n_inputs (body);
488 n_outputs = recog_data.n_operands - n_inputs;
493 /* Avoid further trouble with this insn. */
494 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
498 /* Strip SUBREGs here to make the following code simpler. */
499 for (i = 0; i < recog_data.n_operands; i++)
500 if (GET_CODE (recog_data.operand[i]) == SUBREG
501 && REG_P (SUBREG_REG (recog_data.operand[i])))
502 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
504 /* Set up CLOBBER_REG. */
508 if (GET_CODE (body) == PARALLEL)
510 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
512 for (i = 0; i < XVECLEN (body, 0); i++)
513 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
515 rtx clobber = XVECEXP (body, 0, i);
516 rtx reg = XEXP (clobber, 0);
518 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
519 reg = SUBREG_REG (reg);
521 if (STACK_REG_P (reg))
523 clobber_reg[n_clobbers] = reg;
529 /* Enforce rule #4: Output operands must specifically indicate which
530 reg an output appears in after an asm. "=f" is not allowed: the
531 operand constraints must select a class with a single reg.
533 Also enforce rule #5: Output operands must start at the top of
534 the reg-stack: output operands may not "skip" a reg. */
536 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
537 for (i = 0; i < n_outputs; i++)
538 if (STACK_REG_P (recog_data.operand[i]))
540 if (reg_class_size[(int) recog_op_alt[i][alt].cl] != 1)
542 error_for_asm (insn, "output constraint %d must specify a single register", i);
549 for (j = 0; j < n_clobbers; j++)
550 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
552 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
553 i, reg_names [REGNO (clobber_reg[j])]);
558 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
563 /* Search for first non-popped reg. */
564 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
565 if (! reg_used_as_output[i])
568 /* If there are any other popped regs, that's an error. */
569 for (; i < LAST_STACK_REG + 1; i++)
570 if (reg_used_as_output[i])
573 if (i != LAST_STACK_REG + 1)
575 error_for_asm (insn, "output regs must be grouped at top of stack");
579 /* Enforce rule #2: All implicitly popped input regs must be closer
580 to the top of the reg-stack than any input that is not implicitly
583 memset (implicitly_dies, 0, sizeof (implicitly_dies));
584 for (i = n_outputs; i < n_outputs + n_inputs; i++)
585 if (STACK_REG_P (recog_data.operand[i]))
587 /* An input reg is implicitly popped if it is tied to an
588 output, or if there is a CLOBBER for it. */
591 for (j = 0; j < n_clobbers; j++)
592 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
595 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
596 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
599 /* Search for first non-popped reg. */
600 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
601 if (! implicitly_dies[i])
604 /* If there are any other popped regs, that's an error. */
605 for (; i < LAST_STACK_REG + 1; i++)
606 if (implicitly_dies[i])
609 if (i != LAST_STACK_REG + 1)
612 "implicitly popped regs must be grouped at top of stack");
616 /* Enforce rule #3: If any input operand uses the "f" constraint, all
617 output constraints must use the "&" earlyclobber.
619 ??? Detect this more deterministically by having constrain_asm_operands
620 record any earlyclobber. */
622 for (i = n_outputs; i < n_outputs + n_inputs; i++)
623 if (recog_op_alt[i][alt].matches == -1)
627 for (j = 0; j < n_outputs; j++)
628 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
631 "output operand %d must use %<&%> constraint", j);
638 /* Avoid further trouble with this insn. */
639 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
640 any_malformed_asm = true;
647 /* Calculate the number of inputs and outputs in BODY, an
648 asm_operands. N_OPERANDS is the total number of operands, and
649 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
653 get_asm_operand_n_inputs (rtx body)
655 switch (GET_CODE (body))
658 gcc_assert (GET_CODE (SET_SRC (body)) == ASM_OPERANDS);
659 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
662 return ASM_OPERANDS_INPUT_LENGTH (body);
665 return get_asm_operand_n_inputs (XVECEXP (body, 0, 0));
672 /* If current function returns its result in an fp stack register,
673 return the REG. Otherwise, return 0. */
676 stack_result (tree decl)
680 /* If the value is supposed to be returned in memory, then clearly
681 it is not returned in a stack register. */
682 if (aggregate_value_p (DECL_RESULT (decl), decl))
685 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
687 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)),
690 return result != 0 && STACK_REG_P (result) ? result : 0;
695 * This section deals with stack register substitution, and forms the second
699 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
700 the desired hard REGNO. */
703 replace_reg (rtx *reg, int regno)
705 gcc_assert (regno >= FIRST_STACK_REG);
706 gcc_assert (regno <= LAST_STACK_REG);
707 gcc_assert (STACK_REG_P (*reg));
709 gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg))
710 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT);
712 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
715 /* Remove a note of type NOTE, which must be found, for register
716 number REGNO from INSN. Remove only one such note. */
719 remove_regno_note (rtx insn, enum reg_note note, unsigned int regno)
721 rtx *note_link, this;
723 note_link = ®_NOTES (insn);
724 for (this = *note_link; this; this = XEXP (this, 1))
725 if (REG_NOTE_KIND (this) == note
726 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
728 *note_link = XEXP (this, 1);
732 note_link = &XEXP (this, 1);
737 /* Find the hard register number of virtual register REG in REGSTACK.
738 The hard register number is relative to the top of the stack. -1 is
739 returned if the register is not found. */
742 get_hard_regnum (stack regstack, rtx reg)
746 gcc_assert (STACK_REG_P (reg));
748 for (i = regstack->top; i >= 0; i--)
749 if (regstack->reg[i] == REGNO (reg))
752 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
755 /* Emit an insn to pop virtual register REG before or after INSN.
756 REGSTACK is the stack state after INSN and is updated to reflect this
757 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
758 is represented as a SET whose destination is the register to be popped
759 and source is the top of stack. A death note for the top of stack
760 cases the movdf pattern to pop. */
763 emit_pop_insn (rtx insn, stack regstack, rtx reg, enum emit_where where)
765 rtx pop_insn, pop_rtx;
768 /* For complex types take care to pop both halves. These may survive in
769 CLOBBER and USE expressions. */
770 if (COMPLEX_MODE_P (GET_MODE (reg)))
772 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
773 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
776 if (get_hard_regnum (regstack, reg1) >= 0)
777 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
778 if (get_hard_regnum (regstack, reg2) >= 0)
779 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
780 gcc_assert (pop_insn);
784 hard_regno = get_hard_regnum (regstack, reg);
786 gcc_assert (hard_regno >= FIRST_STACK_REG);
788 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
789 FP_MODE_REG (FIRST_STACK_REG, DFmode));
791 if (where == EMIT_AFTER)
792 pop_insn = emit_insn_after (pop_rtx, insn);
794 pop_insn = emit_insn_before (pop_rtx, insn);
797 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
798 REG_NOTES (pop_insn));
800 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
801 = regstack->reg[regstack->top];
803 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
808 /* Emit an insn before or after INSN to swap virtual register REG with
809 the top of stack. REGSTACK is the stack state before the swap, and
810 is updated to reflect the swap. A swap insn is represented as a
811 PARALLEL of two patterns: each pattern moves one reg to the other.
813 If REG is already at the top of the stack, no insn is emitted. */
816 emit_swap_insn (rtx insn, stack regstack, rtx reg)
820 int tmp, other_reg; /* swap regno temps */
821 rtx i1; /* the stack-reg insn prior to INSN */
822 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
824 hard_regno = get_hard_regnum (regstack, reg);
826 gcc_assert (hard_regno >= FIRST_STACK_REG);
827 if (hard_regno == FIRST_STACK_REG)
830 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
832 tmp = regstack->reg[other_reg];
833 regstack->reg[other_reg] = regstack->reg[regstack->top];
834 regstack->reg[regstack->top] = tmp;
836 /* Find the previous insn involving stack regs, but don't pass a
839 if (current_block && insn != BB_HEAD (current_block))
841 rtx tmp = PREV_INSN (insn);
842 rtx limit = PREV_INSN (BB_HEAD (current_block));
847 || NOTE_INSN_BASIC_BLOCK_P (tmp)
848 || (NONJUMP_INSN_P (tmp)
849 && stack_regs_mentioned (tmp)))
854 tmp = PREV_INSN (tmp);
859 && (i1set = single_set (i1)) != NULL_RTX)
861 rtx i1src = *get_true_reg (&SET_SRC (i1set));
862 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
864 /* If the previous register stack push was from the reg we are to
865 swap with, omit the swap. */
867 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG
869 && REGNO (i1src) == (unsigned) hard_regno - 1
870 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
873 /* If the previous insn wrote to the reg we are to swap with,
876 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno
877 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG
878 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
882 /* Avoid emitting the swap if this is the first register stack insn
883 of the current_block. Instead update the current_block's stack_in
884 and let compensate edges take care of this for us. */
885 if (current_block && starting_stack_p)
887 BLOCK_INFO (current_block)->stack_in = *regstack;
888 starting_stack_p = false;
892 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
893 FP_MODE_REG (FIRST_STACK_REG, XFmode));
896 emit_insn_after (swap_rtx, i1);
897 else if (current_block)
898 emit_insn_before (swap_rtx, BB_HEAD (current_block));
900 emit_insn_before (swap_rtx, insn);
903 /* Emit an insns before INSN to swap virtual register SRC1 with
904 the top of stack and virtual register SRC2 with second stack
905 slot. REGSTACK is the stack state before the swaps, and
906 is updated to reflect the swaps. A swap insn is represented as a
907 PARALLEL of two patterns: each pattern moves one reg to the other.
909 If SRC1 and/or SRC2 are already at the right place, no swap insn
913 swap_to_top (rtx insn, stack regstack, rtx src1, rtx src2)
915 struct stack_def temp_stack;
916 int regno, j, k, temp;
918 temp_stack = *regstack;
920 /* Place operand 1 at the top of stack. */
921 regno = get_hard_regnum (&temp_stack, src1);
922 gcc_assert (regno >= 0);
923 if (regno != FIRST_STACK_REG)
925 k = temp_stack.top - (regno - FIRST_STACK_REG);
928 temp = temp_stack.reg[k];
929 temp_stack.reg[k] = temp_stack.reg[j];
930 temp_stack.reg[j] = temp;
933 /* Place operand 2 next on the stack. */
934 regno = get_hard_regnum (&temp_stack, src2);
935 gcc_assert (regno >= 0);
936 if (regno != FIRST_STACK_REG + 1)
938 k = temp_stack.top - (regno - FIRST_STACK_REG);
939 j = temp_stack.top - 1;
941 temp = temp_stack.reg[k];
942 temp_stack.reg[k] = temp_stack.reg[j];
943 temp_stack.reg[j] = temp;
946 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
949 /* Handle a move to or from a stack register in PAT, which is in INSN.
950 REGSTACK is the current stack. Return whether a control flow insn
951 was deleted in the process. */
954 move_for_stack_reg (rtx insn, stack regstack, rtx pat)
956 rtx *psrc = get_true_reg (&SET_SRC (pat));
957 rtx *pdest = get_true_reg (&SET_DEST (pat));
960 bool control_flow_insn_deleted = false;
962 src = *psrc; dest = *pdest;
964 if (STACK_REG_P (src) && STACK_REG_P (dest))
966 /* Write from one stack reg to another. If SRC dies here, then
967 just change the register mapping and delete the insn. */
969 note = find_regno_note (insn, REG_DEAD, REGNO (src));
974 /* If this is a no-op move, there must not be a REG_DEAD note. */
975 gcc_assert (REGNO (src) != REGNO (dest));
977 for (i = regstack->top; i >= 0; i--)
978 if (regstack->reg[i] == REGNO (src))
981 /* The destination must be dead, or life analysis is borked. */
982 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
984 /* If the source is not live, this is yet another case of
985 uninitialized variables. Load up a NaN instead. */
987 return move_nan_for_stack_reg (insn, regstack, dest);
989 /* It is possible that the dest is unused after this insn.
990 If so, just pop the src. */
992 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
993 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
996 regstack->reg[i] = REGNO (dest);
997 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
998 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1001 control_flow_insn_deleted |= control_flow_insn_p (insn);
1003 return control_flow_insn_deleted;
1006 /* The source reg does not die. */
1008 /* If this appears to be a no-op move, delete it, or else it
1009 will confuse the machine description output patterns. But if
1010 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1011 for REG_UNUSED will not work for deleted insns. */
1013 if (REGNO (src) == REGNO (dest))
1015 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1016 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1018 control_flow_insn_deleted |= control_flow_insn_p (insn);
1020 return control_flow_insn_deleted;
1023 /* The destination ought to be dead. */
1024 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1026 replace_reg (psrc, get_hard_regnum (regstack, src));
1028 regstack->reg[++regstack->top] = REGNO (dest);
1029 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1030 replace_reg (pdest, FIRST_STACK_REG);
1032 else if (STACK_REG_P (src))
1034 /* Save from a stack reg to MEM, or possibly integer reg. Since
1035 only top of stack may be saved, emit an exchange first if
1038 emit_swap_insn (insn, regstack, src);
1040 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1043 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1045 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1047 else if ((GET_MODE (src) == XFmode)
1048 && regstack->top < REG_STACK_SIZE - 1)
1050 /* A 387 cannot write an XFmode value to a MEM without
1051 clobbering the source reg. The output code can handle
1052 this by reading back the value from the MEM.
1053 But it is more efficient to use a temp register if one is
1054 available. Push the source value here if the register
1055 stack is not full, and then write the value to memory via
1058 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1060 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1061 emit_insn_before (push_rtx, insn);
1062 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1066 replace_reg (psrc, FIRST_STACK_REG);
1070 gcc_assert (STACK_REG_P (dest));
1072 /* Load from MEM, or possibly integer REG or constant, into the
1073 stack regs. The actual target is always the top of the
1074 stack. The stack mapping is changed to reflect that DEST is
1075 now at top of stack. */
1077 /* The destination ought to be dead. */
1078 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1080 gcc_assert (regstack->top < REG_STACK_SIZE);
1082 regstack->reg[++regstack->top] = REGNO (dest);
1083 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1084 replace_reg (pdest, FIRST_STACK_REG);
1087 return control_flow_insn_deleted;
1090 /* A helper function which replaces INSN with a pattern that loads up
1091 a NaN into DEST, then invokes move_for_stack_reg. */
1094 move_nan_for_stack_reg (rtx insn, stack regstack, rtx dest)
1098 dest = FP_MODE_REG (REGNO (dest), SFmode);
1099 pat = gen_rtx_SET (VOIDmode, dest, not_a_num);
1100 PATTERN (insn) = pat;
1101 INSN_CODE (insn) = -1;
1103 return move_for_stack_reg (insn, regstack, pat);
1106 /* Swap the condition on a branch, if there is one. Return true if we
1107 found a condition to swap. False if the condition was not used as
1111 swap_rtx_condition_1 (rtx pat)
1116 if (COMPARISON_P (pat))
1118 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1123 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1124 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1130 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1131 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1133 else if (fmt[i] == 'e')
1134 r |= swap_rtx_condition_1 (XEXP (pat, i));
1142 swap_rtx_condition (rtx insn)
1144 rtx pat = PATTERN (insn);
1146 /* We're looking for a single set to cc0 or an HImode temporary. */
1148 if (GET_CODE (pat) == SET
1149 && REG_P (SET_DEST (pat))
1150 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1152 insn = next_flags_user (insn);
1153 if (insn == NULL_RTX)
1155 pat = PATTERN (insn);
1158 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything
1159 with the cc value right now. We may be able to search for one
1162 if (GET_CODE (pat) == SET
1163 && GET_CODE (SET_SRC (pat)) == UNSPEC
1164 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
1166 rtx dest = SET_DEST (pat);
1168 /* Search forward looking for the first use of this value.
1169 Stop at block boundaries. */
1170 while (insn != BB_END (current_block))
1172 insn = NEXT_INSN (insn);
1173 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1179 /* We haven't found it. */
1180 if (insn == BB_END (current_block))
1183 /* So we've found the insn using this value. If it is anything
1184 other than sahf or the value does not die (meaning we'd have
1185 to search further), then we must give up. */
1186 pat = PATTERN (insn);
1187 if (GET_CODE (pat) != SET
1188 || GET_CODE (SET_SRC (pat)) != UNSPEC
1189 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
1190 || ! dead_or_set_p (insn, dest))
1193 /* Now we are prepared to handle this as a normal cc0 setter. */
1194 insn = next_flags_user (insn);
1195 if (insn == NULL_RTX)
1197 pat = PATTERN (insn);
1200 if (swap_rtx_condition_1 (pat))
1203 INSN_CODE (insn) = -1;
1204 if (recog_memoized (insn) == -1)
1206 /* In case the flags don't die here, recurse to try fix
1207 following user too. */
1208 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1210 insn = next_flags_user (insn);
1211 if (!insn || !swap_rtx_condition (insn))
1216 swap_rtx_condition_1 (pat);
1224 /* Handle a comparison. Special care needs to be taken to avoid
1225 causing comparisons that a 387 cannot do correctly, such as EQ.
1227 Also, a pop insn may need to be emitted. The 387 does have an
1228 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1229 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1233 compare_for_stack_reg (rtx insn, stack regstack, rtx pat_src)
1236 rtx src1_note, src2_note;
1238 src1 = get_true_reg (&XEXP (pat_src, 0));
1239 src2 = get_true_reg (&XEXP (pat_src, 1));
1241 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1242 registers that die in this insn - move those to stack top first. */
1243 if ((! STACK_REG_P (*src1)
1244 || (STACK_REG_P (*src2)
1245 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1246 && swap_rtx_condition (insn))
1249 temp = XEXP (pat_src, 0);
1250 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1251 XEXP (pat_src, 1) = temp;
1253 src1 = get_true_reg (&XEXP (pat_src, 0));
1254 src2 = get_true_reg (&XEXP (pat_src, 1));
1256 INSN_CODE (insn) = -1;
1259 /* We will fix any death note later. */
1261 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1263 if (STACK_REG_P (*src2))
1264 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1266 src2_note = NULL_RTX;
1268 emit_swap_insn (insn, regstack, *src1);
1270 replace_reg (src1, FIRST_STACK_REG);
1272 if (STACK_REG_P (*src2))
1273 replace_reg (src2, get_hard_regnum (regstack, *src2));
1277 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1278 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1281 /* If the second operand dies, handle that. But if the operands are
1282 the same stack register, don't bother, because only one death is
1283 needed, and it was just handled. */
1286 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1287 && REGNO (*src1) == REGNO (*src2)))
1289 /* As a special case, two regs may die in this insn if src2 is
1290 next to top of stack and the top of stack also dies. Since
1291 we have already popped src1, "next to top of stack" is really
1292 at top (FIRST_STACK_REG) now. */
1294 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1297 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1298 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1302 /* The 386 can only represent death of the first operand in
1303 the case handled above. In all other cases, emit a separate
1304 pop and remove the death note from here. */
1306 /* link_cc0_insns (insn); */
1308 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1310 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1316 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1317 is the current register layout. Return whether a control flow insn
1318 was deleted in the process. */
1321 subst_stack_regs_pat (rtx insn, stack regstack, rtx pat)
1324 bool control_flow_insn_deleted = false;
1326 switch (GET_CODE (pat))
1329 /* Deaths in USE insns can happen in non optimizing compilation.
1330 Handle them by popping the dying register. */
1331 src = get_true_reg (&XEXP (pat, 0));
1332 if (STACK_REG_P (*src)
1333 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1335 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1336 return control_flow_insn_deleted;
1338 /* ??? Uninitialized USE should not happen. */
1340 gcc_assert (get_hard_regnum (regstack, *src) != -1);
1347 dest = get_true_reg (&XEXP (pat, 0));
1348 if (STACK_REG_P (*dest))
1350 note = find_reg_note (insn, REG_DEAD, *dest);
1352 if (pat != PATTERN (insn))
1354 /* The fix_truncdi_1 pattern wants to be able to allocate
1355 its own scratch register. It does this by clobbering
1356 an fp reg so that it is assured of an empty reg-stack
1357 register. If the register is live, kill it now.
1358 Remove the DEAD/UNUSED note so we don't try to kill it
1362 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1365 note = find_reg_note (insn, REG_UNUSED, *dest);
1368 remove_note (insn, note);
1369 replace_reg (dest, FIRST_STACK_REG + 1);
1373 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1374 indicates an uninitialized value. Because reload removed
1375 all other clobbers, this must be due to a function
1376 returning without a value. Load up a NaN. */
1381 if (COMPLEX_MODE_P (GET_MODE (t)))
1383 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode);
1384 if (get_hard_regnum (regstack, u) == -1)
1386 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u);
1387 rtx insn2 = emit_insn_before (pat2, insn);
1388 control_flow_insn_deleted
1389 |= move_nan_for_stack_reg (insn2, regstack, u);
1392 if (get_hard_regnum (regstack, t) == -1)
1393 control_flow_insn_deleted
1394 |= move_nan_for_stack_reg (insn, regstack, t);
1403 rtx *src1 = (rtx *) 0, *src2;
1404 rtx src1_note, src2_note;
1407 dest = get_true_reg (&SET_DEST (pat));
1408 src = get_true_reg (&SET_SRC (pat));
1409 pat_src = SET_SRC (pat);
1411 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1412 if (STACK_REG_P (*src)
1413 || (STACK_REG_P (*dest)
1414 && (REG_P (*src) || MEM_P (*src)
1415 || GET_CODE (*src) == CONST_DOUBLE)))
1417 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1421 switch (GET_CODE (pat_src))
1424 compare_for_stack_reg (insn, regstack, pat_src);
1430 for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)];
1433 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1434 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1437 replace_reg (dest, FIRST_STACK_REG);
1441 /* This is a `tstM2' case. */
1442 gcc_assert (*dest == cc0_rtx);
1447 case FLOAT_TRUNCATE:
1451 /* These insns only operate on the top of the stack. DEST might
1452 be cc0_rtx if we're processing a tstM pattern. Also, it's
1453 possible that the tstM case results in a REG_DEAD note on the
1457 src1 = get_true_reg (&XEXP (pat_src, 0));
1459 emit_swap_insn (insn, regstack, *src1);
1461 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1463 if (STACK_REG_P (*dest))
1464 replace_reg (dest, FIRST_STACK_REG);
1468 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1470 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1473 replace_reg (src1, FIRST_STACK_REG);
1478 /* On i386, reversed forms of subM3 and divM3 exist for
1479 MODE_FLOAT, so the same code that works for addM3 and mulM3
1483 /* These insns can accept the top of stack as a destination
1484 from a stack reg or mem, or can use the top of stack as a
1485 source and some other stack register (possibly top of stack)
1486 as a destination. */
1488 src1 = get_true_reg (&XEXP (pat_src, 0));
1489 src2 = get_true_reg (&XEXP (pat_src, 1));
1491 /* We will fix any death note later. */
1493 if (STACK_REG_P (*src1))
1494 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1496 src1_note = NULL_RTX;
1497 if (STACK_REG_P (*src2))
1498 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1500 src2_note = NULL_RTX;
1502 /* If either operand is not a stack register, then the dest
1503 must be top of stack. */
1505 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1506 emit_swap_insn (insn, regstack, *dest);
1509 /* Both operands are REG. If neither operand is already
1510 at the top of stack, choose to make the one that is the dest
1511 the new top of stack. */
1513 int src1_hard_regnum, src2_hard_regnum;
1515 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1516 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1517 gcc_assert (src1_hard_regnum != -1);
1518 gcc_assert (src2_hard_regnum != -1);
1520 if (src1_hard_regnum != FIRST_STACK_REG
1521 && src2_hard_regnum != FIRST_STACK_REG)
1522 emit_swap_insn (insn, regstack, *dest);
1525 if (STACK_REG_P (*src1))
1526 replace_reg (src1, get_hard_regnum (regstack, *src1));
1527 if (STACK_REG_P (*src2))
1528 replace_reg (src2, get_hard_regnum (regstack, *src2));
1532 rtx src1_reg = XEXP (src1_note, 0);
1534 /* If the register that dies is at the top of stack, then
1535 the destination is somewhere else - merely substitute it.
1536 But if the reg that dies is not at top of stack, then
1537 move the top of stack to the dead reg, as though we had
1538 done the insn and then a store-with-pop. */
1540 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1542 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1543 replace_reg (dest, get_hard_regnum (regstack, *dest));
1547 int regno = get_hard_regnum (regstack, src1_reg);
1549 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1550 replace_reg (dest, regno);
1552 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1553 = regstack->reg[regstack->top];
1556 CLEAR_HARD_REG_BIT (regstack->reg_set,
1557 REGNO (XEXP (src1_note, 0)));
1558 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1563 rtx src2_reg = XEXP (src2_note, 0);
1564 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1566 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1567 replace_reg (dest, get_hard_regnum (regstack, *dest));
1571 int regno = get_hard_regnum (regstack, src2_reg);
1573 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1574 replace_reg (dest, regno);
1576 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1577 = regstack->reg[regstack->top];
1580 CLEAR_HARD_REG_BIT (regstack->reg_set,
1581 REGNO (XEXP (src2_note, 0)));
1582 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1587 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1588 replace_reg (dest, get_hard_regnum (regstack, *dest));
1591 /* Keep operand 1 matching with destination. */
1592 if (COMMUTATIVE_ARITH_P (pat_src)
1593 && REG_P (*src1) && REG_P (*src2)
1594 && REGNO (*src1) != REGNO (*dest))
1596 int tmp = REGNO (*src1);
1597 replace_reg (src1, REGNO (*src2));
1598 replace_reg (src2, tmp);
1603 switch (XINT (pat_src, 1))
1607 case UNSPEC_FIST_FLOOR:
1608 case UNSPEC_FIST_CEIL:
1610 /* These insns only operate on the top of the stack. */
1612 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1613 emit_swap_insn (insn, regstack, *src1);
1615 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1617 if (STACK_REG_P (*dest))
1618 replace_reg (dest, FIRST_STACK_REG);
1622 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1624 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1627 replace_reg (src1, FIRST_STACK_REG);
1632 case UNSPEC_FRNDINT:
1635 case UNSPEC_FRNDINT_FLOOR:
1636 case UNSPEC_FRNDINT_CEIL:
1637 case UNSPEC_FRNDINT_TRUNC:
1638 case UNSPEC_FRNDINT_MASK_PM:
1640 /* These insns only operate on the top of the stack. */
1642 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1644 emit_swap_insn (insn, regstack, *src1);
1646 /* Input should never die, it is
1647 replaced with output. */
1648 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1649 gcc_assert (!src1_note);
1651 if (STACK_REG_P (*dest))
1652 replace_reg (dest, FIRST_STACK_REG);
1654 replace_reg (src1, FIRST_STACK_REG);
1659 case UNSPEC_FYL2XP1:
1660 /* These insns operate on the top two stack slots. */
1662 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1663 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1665 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1666 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1668 swap_to_top (insn, regstack, *src1, *src2);
1670 replace_reg (src1, FIRST_STACK_REG);
1671 replace_reg (src2, FIRST_STACK_REG + 1);
1674 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1676 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1678 /* Pop both input operands from the stack. */
1679 CLEAR_HARD_REG_BIT (regstack->reg_set,
1680 regstack->reg[regstack->top]);
1681 CLEAR_HARD_REG_BIT (regstack->reg_set,
1682 regstack->reg[regstack->top - 1]);
1685 /* Push the result back onto the stack. */
1686 regstack->reg[++regstack->top] = REGNO (*dest);
1687 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1688 replace_reg (dest, FIRST_STACK_REG);
1691 case UNSPEC_FSCALE_FRACT:
1692 case UNSPEC_FPREM_F:
1693 case UNSPEC_FPREM1_F:
1694 /* These insns operate on the top two stack slots.
1695 first part of double input, double output insn. */
1697 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1698 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1700 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1701 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1703 /* Inputs should never die, they are
1704 replaced with outputs. */
1705 gcc_assert (!src1_note);
1706 gcc_assert (!src2_note);
1708 swap_to_top (insn, regstack, *src1, *src2);
1710 /* Push the result back onto stack. Empty stack slot
1711 will be filled in second part of insn. */
1712 if (STACK_REG_P (*dest))
1714 regstack->reg[regstack->top] = REGNO (*dest);
1715 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1716 replace_reg (dest, FIRST_STACK_REG);
1719 replace_reg (src1, FIRST_STACK_REG);
1720 replace_reg (src2, FIRST_STACK_REG + 1);
1723 case UNSPEC_FSCALE_EXP:
1724 case UNSPEC_FPREM_U:
1725 case UNSPEC_FPREM1_U:
1726 /* These insns operate on the top two stack slots./
1727 second part of double input, double output insn. */
1729 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1730 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1732 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1733 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1735 /* Inputs should never die, they are
1736 replaced with outputs. */
1737 gcc_assert (!src1_note);
1738 gcc_assert (!src2_note);
1740 swap_to_top (insn, regstack, *src1, *src2);
1742 /* Push the result back onto stack. Fill empty slot from
1743 first part of insn and fix top of stack pointer. */
1744 if (STACK_REG_P (*dest))
1746 regstack->reg[regstack->top - 1] = REGNO (*dest);
1747 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1748 replace_reg (dest, FIRST_STACK_REG + 1);
1751 replace_reg (src1, FIRST_STACK_REG);
1752 replace_reg (src2, FIRST_STACK_REG + 1);
1755 case UNSPEC_SINCOS_COS:
1756 case UNSPEC_TAN_ONE:
1757 case UNSPEC_XTRACT_FRACT:
1758 /* These insns operate on the top two stack slots,
1759 first part of one input, double output insn. */
1761 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1763 emit_swap_insn (insn, regstack, *src1);
1765 /* Input should never die, it is
1766 replaced with output. */
1767 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1768 gcc_assert (!src1_note);
1770 /* Push the result back onto stack. Empty stack slot
1771 will be filled in second part of insn. */
1772 if (STACK_REG_P (*dest))
1774 regstack->reg[regstack->top + 1] = REGNO (*dest);
1775 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1776 replace_reg (dest, FIRST_STACK_REG);
1779 replace_reg (src1, FIRST_STACK_REG);
1782 case UNSPEC_SINCOS_SIN:
1783 case UNSPEC_TAN_TAN:
1784 case UNSPEC_XTRACT_EXP:
1785 /* These insns operate on the top two stack slots,
1786 second part of one input, double output insn. */
1788 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1790 emit_swap_insn (insn, regstack, *src1);
1792 /* Input should never die, it is
1793 replaced with output. */
1794 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1795 gcc_assert (!src1_note);
1797 /* Push the result back onto stack. Fill empty slot from
1798 first part of insn and fix top of stack pointer. */
1799 if (STACK_REG_P (*dest))
1801 regstack->reg[regstack->top] = REGNO (*dest);
1802 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1803 replace_reg (dest, FIRST_STACK_REG + 1);
1808 replace_reg (src1, FIRST_STACK_REG);
1812 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1813 The combination matches the PPRO fcomi instruction. */
1815 pat_src = XVECEXP (pat_src, 0, 0);
1816 gcc_assert (GET_CODE (pat_src) == UNSPEC);
1817 gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW);
1821 /* Combined fcomp+fnstsw generated for doing well with
1822 CSE. When optimizing this would have been broken
1825 pat_src = XVECEXP (pat_src, 0, 0);
1826 gcc_assert (GET_CODE (pat_src) == COMPARE);
1828 compare_for_stack_reg (insn, regstack, pat_src);
1837 /* This insn requires the top of stack to be the destination. */
1839 src1 = get_true_reg (&XEXP (pat_src, 1));
1840 src2 = get_true_reg (&XEXP (pat_src, 2));
1842 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1843 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1845 /* If the comparison operator is an FP comparison operator,
1846 it is handled correctly by compare_for_stack_reg () who
1847 will move the destination to the top of stack. But if the
1848 comparison operator is not an FP comparison operator, we
1849 have to handle it here. */
1850 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1851 && REGNO (*dest) != regstack->reg[regstack->top])
1853 /* In case one of operands is the top of stack and the operands
1854 dies, it is safe to make it the destination operand by
1855 reversing the direction of cmove and avoid fxch. */
1856 if ((REGNO (*src1) == regstack->reg[regstack->top]
1858 || (REGNO (*src2) == regstack->reg[regstack->top]
1861 int idx1 = (get_hard_regnum (regstack, *src1)
1863 int idx2 = (get_hard_regnum (regstack, *src2)
1866 /* Make reg-stack believe that the operands are already
1867 swapped on the stack */
1868 regstack->reg[regstack->top - idx1] = REGNO (*src2);
1869 regstack->reg[regstack->top - idx2] = REGNO (*src1);
1871 /* Reverse condition to compensate the operand swap.
1872 i386 do have comparison always reversible. */
1873 PUT_CODE (XEXP (pat_src, 0),
1874 reversed_comparison_code (XEXP (pat_src, 0), insn));
1877 emit_swap_insn (insn, regstack, *dest);
1885 src_note[1] = src1_note;
1886 src_note[2] = src2_note;
1888 if (STACK_REG_P (*src1))
1889 replace_reg (src1, get_hard_regnum (regstack, *src1));
1890 if (STACK_REG_P (*src2))
1891 replace_reg (src2, get_hard_regnum (regstack, *src2));
1893 for (i = 1; i <= 2; i++)
1896 int regno = REGNO (XEXP (src_note[i], 0));
1898 /* If the register that dies is not at the top of
1899 stack, then move the top of stack to the dead reg.
1900 Top of stack should never die, as it is the
1902 gcc_assert (regno != regstack->reg[regstack->top]);
1903 remove_regno_note (insn, REG_DEAD, regno);
1904 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1909 /* Make dest the top of stack. Add dest to regstack if
1911 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1912 regstack->reg[++regstack->top] = REGNO (*dest);
1913 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1914 replace_reg (dest, FIRST_STACK_REG);
1927 return control_flow_insn_deleted;
1930 /* Substitute hard regnums for any stack regs in INSN, which has
1931 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1932 before the insn, and is updated with changes made here.
1934 There are several requirements and assumptions about the use of
1935 stack-like regs in asm statements. These rules are enforced by
1936 record_asm_stack_regs; see comments there for details. Any
1937 asm_operands left in the RTL at this point may be assume to meet the
1938 requirements, since record_asm_stack_regs removes any problem asm. */
1941 subst_asm_stack_regs (rtx insn, stack regstack)
1943 rtx body = PATTERN (insn);
1946 rtx *note_reg; /* Array of note contents */
1947 rtx **note_loc; /* Address of REG field of each note */
1948 enum reg_note *note_kind; /* The type of each note */
1950 rtx *clobber_reg = 0;
1951 rtx **clobber_loc = 0;
1953 struct stack_def temp_stack;
1958 int n_inputs, n_outputs;
1960 if (! check_asm_stack_operands (insn))
1963 /* Find out what the constraints required. If no constraint
1964 alternative matches, that is a compiler bug: we should have caught
1965 such an insn in check_asm_stack_operands. */
1966 extract_insn (insn);
1967 constrain_operands (1);
1968 alt = which_alternative;
1970 preprocess_constraints ();
1972 n_inputs = get_asm_operand_n_inputs (body);
1973 n_outputs = recog_data.n_operands - n_inputs;
1975 gcc_assert (alt >= 0);
1977 /* Strip SUBREGs here to make the following code simpler. */
1978 for (i = 0; i < recog_data.n_operands; i++)
1979 if (GET_CODE (recog_data.operand[i]) == SUBREG
1980 && REG_P (SUBREG_REG (recog_data.operand[i])))
1982 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
1983 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
1986 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
1988 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
1991 note_reg = alloca (i * sizeof (rtx));
1992 note_loc = alloca (i * sizeof (rtx *));
1993 note_kind = alloca (i * sizeof (enum reg_note));
1996 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1998 rtx reg = XEXP (note, 0);
1999 rtx *loc = & XEXP (note, 0);
2001 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2003 loc = & SUBREG_REG (reg);
2004 reg = SUBREG_REG (reg);
2007 if (STACK_REG_P (reg)
2008 && (REG_NOTE_KIND (note) == REG_DEAD
2009 || REG_NOTE_KIND (note) == REG_UNUSED))
2011 note_reg[n_notes] = reg;
2012 note_loc[n_notes] = loc;
2013 note_kind[n_notes] = REG_NOTE_KIND (note);
2018 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2022 if (GET_CODE (body) == PARALLEL)
2024 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
2025 clobber_loc = alloca (XVECLEN (body, 0) * sizeof (rtx *));
2027 for (i = 0; i < XVECLEN (body, 0); i++)
2028 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2030 rtx clobber = XVECEXP (body, 0, i);
2031 rtx reg = XEXP (clobber, 0);
2032 rtx *loc = & XEXP (clobber, 0);
2034 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2036 loc = & SUBREG_REG (reg);
2037 reg = SUBREG_REG (reg);
2040 if (STACK_REG_P (reg))
2042 clobber_reg[n_clobbers] = reg;
2043 clobber_loc[n_clobbers] = loc;
2049 temp_stack = *regstack;
2051 /* Put the input regs into the desired place in TEMP_STACK. */
2053 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2054 if (STACK_REG_P (recog_data.operand[i])
2055 && reg_class_subset_p (recog_op_alt[i][alt].cl,
2057 && recog_op_alt[i][alt].cl != FLOAT_REGS)
2059 /* If an operand needs to be in a particular reg in
2060 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2061 these constraints are for single register classes, and
2062 reload guaranteed that operand[i] is already in that class,
2063 we can just use REGNO (recog_data.operand[i]) to know which
2064 actual reg this operand needs to be in. */
2066 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2068 gcc_assert (regno >= 0);
2070 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2072 /* recog_data.operand[i] is not in the right place. Find
2073 it and swap it with whatever is already in I's place.
2074 K is where recog_data.operand[i] is now. J is where it
2078 k = temp_stack.top - (regno - FIRST_STACK_REG);
2080 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2082 temp = temp_stack.reg[k];
2083 temp_stack.reg[k] = temp_stack.reg[j];
2084 temp_stack.reg[j] = temp;
2088 /* Emit insns before INSN to make sure the reg-stack is in the right
2091 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2093 /* Make the needed input register substitutions. Do death notes and
2094 clobbers too, because these are for inputs, not outputs. */
2096 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2097 if (STACK_REG_P (recog_data.operand[i]))
2099 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2101 gcc_assert (regnum >= 0);
2103 replace_reg (recog_data.operand_loc[i], regnum);
2106 for (i = 0; i < n_notes; i++)
2107 if (note_kind[i] == REG_DEAD)
2109 int regnum = get_hard_regnum (regstack, note_reg[i]);
2111 gcc_assert (regnum >= 0);
2113 replace_reg (note_loc[i], regnum);
2116 for (i = 0; i < n_clobbers; i++)
2118 /* It's OK for a CLOBBER to reference a reg that is not live.
2119 Don't try to replace it in that case. */
2120 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2124 /* Sigh - clobbers always have QImode. But replace_reg knows
2125 that these regs can't be MODE_INT and will assert. Just put
2126 the right reg there without calling replace_reg. */
2128 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2132 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2134 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2135 if (STACK_REG_P (recog_data.operand[i]))
2137 /* An input reg is implicitly popped if it is tied to an
2138 output, or if there is a CLOBBER for it. */
2141 for (j = 0; j < n_clobbers; j++)
2142 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2145 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2147 /* recog_data.operand[i] might not be at the top of stack.
2148 But that's OK, because all we need to do is pop the
2149 right number of regs off of the top of the reg-stack.
2150 record_asm_stack_regs guaranteed that all implicitly
2151 popped regs were grouped at the top of the reg-stack. */
2153 CLEAR_HARD_REG_BIT (regstack->reg_set,
2154 regstack->reg[regstack->top]);
2159 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2160 Note that there isn't any need to substitute register numbers.
2161 ??? Explain why this is true. */
2163 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2165 /* See if there is an output for this hard reg. */
2168 for (j = 0; j < n_outputs; j++)
2169 if (STACK_REG_P (recog_data.operand[j])
2170 && REGNO (recog_data.operand[j]) == (unsigned) i)
2172 regstack->reg[++regstack->top] = i;
2173 SET_HARD_REG_BIT (regstack->reg_set, i);
2178 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2179 input that the asm didn't implicitly pop. If the asm didn't
2180 implicitly pop an input reg, that reg will still be live.
2182 Note that we can't use find_regno_note here: the register numbers
2183 in the death notes have already been substituted. */
2185 for (i = 0; i < n_outputs; i++)
2186 if (STACK_REG_P (recog_data.operand[i]))
2190 for (j = 0; j < n_notes; j++)
2191 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2192 && note_kind[j] == REG_UNUSED)
2194 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2200 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2201 if (STACK_REG_P (recog_data.operand[i]))
2205 for (j = 0; j < n_notes; j++)
2206 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2207 && note_kind[j] == REG_DEAD
2208 && TEST_HARD_REG_BIT (regstack->reg_set,
2209 REGNO (recog_data.operand[i])))
2211 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2218 /* Substitute stack hard reg numbers for stack virtual registers in
2219 INSN. Non-stack register numbers are not changed. REGSTACK is the
2220 current stack content. Insns may be emitted as needed to arrange the
2221 stack for the 387 based on the contents of the insn. Return whether
2222 a control flow insn was deleted in the process. */
2225 subst_stack_regs (rtx insn, stack regstack)
2227 rtx *note_link, note;
2228 bool control_flow_insn_deleted = false;
2233 int top = regstack->top;
2235 /* If there are any floating point parameters to be passed in
2236 registers for this call, make sure they are in the right
2241 straighten_stack (insn, regstack);
2243 /* Now mark the arguments as dead after the call. */
2245 while (regstack->top >= 0)
2247 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2253 /* Do the actual substitution if any stack regs are mentioned.
2254 Since we only record whether entire insn mentions stack regs, and
2255 subst_stack_regs_pat only works for patterns that contain stack regs,
2256 we must check each pattern in a parallel here. A call_value_pop could
2259 if (stack_regs_mentioned (insn))
2261 int n_operands = asm_noperands (PATTERN (insn));
2262 if (n_operands >= 0)
2264 /* This insn is an `asm' with operands. Decode the operands,
2265 decide how many are inputs, and do register substitution.
2266 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2268 subst_asm_stack_regs (insn, regstack);
2269 return control_flow_insn_deleted;
2272 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2273 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2275 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2277 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
2278 XVECEXP (PATTERN (insn), 0, i)
2279 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i));
2280 control_flow_insn_deleted
2281 |= subst_stack_regs_pat (insn, regstack,
2282 XVECEXP (PATTERN (insn), 0, i));
2286 control_flow_insn_deleted
2287 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2290 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2291 REG_UNUSED will already have been dealt with, so just return. */
2293 if (NOTE_P (insn) || INSN_DELETED_P (insn))
2294 return control_flow_insn_deleted;
2296 /* If this a noreturn call, we can't insert pop insns after it.
2297 Instead, reset the stack state to empty. */
2299 && find_reg_note (insn, REG_NORETURN, NULL))
2302 CLEAR_HARD_REG_SET (regstack->reg_set);
2303 return control_flow_insn_deleted;
2306 /* If there is a REG_UNUSED note on a stack register on this insn,
2307 the indicated reg must be popped. The REG_UNUSED note is removed,
2308 since the form of the newly emitted pop insn references the reg,
2309 making it no longer `unset'. */
2311 note_link = ®_NOTES (insn);
2312 for (note = *note_link; note; note = XEXP (note, 1))
2313 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2315 *note_link = XEXP (note, 1);
2316 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2319 note_link = &XEXP (note, 1);
2321 return control_flow_insn_deleted;
2324 /* Change the organization of the stack so that it fits a new basic
2325 block. Some registers might have to be popped, but there can never be
2326 a register live in the new block that is not now live.
2328 Insert any needed insns before or after INSN, as indicated by
2329 WHERE. OLD is the original stack layout, and NEW is the desired
2330 form. OLD is updated to reflect the code emitted, i.e., it will be
2331 the same as NEW upon return.
2333 This function will not preserve block_end[]. But that information
2334 is no longer needed once this has executed. */
2337 change_stack (rtx insn, stack old, stack new, enum emit_where where)
2342 /* Stack adjustments for the first insn in a block update the
2343 current_block's stack_in instead of inserting insns directly.
2344 compensate_edges will add the necessary code later. */
2347 && where == EMIT_BEFORE)
2349 BLOCK_INFO (current_block)->stack_in = *new;
2350 starting_stack_p = false;
2355 /* We will be inserting new insns "backwards". If we are to insert
2356 after INSN, find the next insn, and insert before it. */
2358 if (where == EMIT_AFTER)
2360 if (current_block && BB_END (current_block) == insn)
2362 insn = NEXT_INSN (insn);
2365 /* Pop any registers that are not needed in the new block. */
2367 /* If the destination block's stack already has a specified layout
2368 and contains two or more registers, use a more intelligent algorithm
2369 to pop registers that minimizes the number number of fxchs below. */
2372 bool slots[REG_STACK_SIZE];
2373 int pops[REG_STACK_SIZE];
2374 int next, dest, topsrc;
2376 /* First pass to determine the free slots. */
2377 for (reg = 0; reg <= new->top; reg++)
2378 slots[reg] = TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]);
2380 /* Second pass to allocate preferred slots. */
2382 for (reg = old->top; reg > new->top; reg--)
2383 if (TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2386 for (next = 0; next <= new->top; next++)
2387 if (!slots[next] && new->reg[next] == old->reg[reg])
2389 /* If this is a preference for the new top of stack, record
2390 the fact by remembering it's old->reg in topsrc. */
2391 if (next == new->top)
2402 /* Intentionally, avoid placing the top of stack in it's correct
2403 location, if we still need to permute the stack below and we
2404 can usefully place it somewhere else. This is the case if any
2405 slot is still unallocated, in which case we should place the
2406 top of stack there. */
2408 for (reg = 0; reg < new->top; reg++)
2412 slots[new->top] = false;
2417 /* Third pass allocates remaining slots and emits pop insns. */
2419 for (reg = old->top; reg > new->top; reg--)
2424 /* Find next free slot. */
2429 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode),
2435 /* The following loop attempts to maximize the number of times we
2436 pop the top of the stack, as this permits the use of the faster
2437 ffreep instruction on platforms that support it. */
2441 for (reg = 0; reg <= old->top; reg++)
2442 if (TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2446 while (old->top >= live)
2447 if (TEST_HARD_REG_BIT (new->reg_set, old->reg[old->top]))
2449 while (TEST_HARD_REG_BIT (new->reg_set, old->reg[next]))
2451 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode),
2455 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode),
2461 /* If the new block has never been processed, then it can inherit
2462 the old stack order. */
2464 new->top = old->top;
2465 memcpy (new->reg, old->reg, sizeof (new->reg));
2469 /* This block has been entered before, and we must match the
2470 previously selected stack order. */
2472 /* By now, the only difference should be the order of the stack,
2473 not their depth or liveliness. */
2475 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2478 gcc_assert (old->top == new->top);
2480 /* If the stack is not empty (new->top != -1), loop here emitting
2481 swaps until the stack is correct.
2483 The worst case number of swaps emitted is N + 2, where N is the
2484 depth of the stack. In some cases, the reg at the top of
2485 stack may be correct, but swapped anyway in order to fix
2486 other regs. But since we never swap any other reg away from
2487 its correct slot, this algorithm will converge. */
2492 /* Swap the reg at top of stack into the position it is
2493 supposed to be in, until the correct top of stack appears. */
2495 while (old->reg[old->top] != new->reg[new->top])
2497 for (reg = new->top; reg >= 0; reg--)
2498 if (new->reg[reg] == old->reg[old->top])
2501 gcc_assert (reg != -1);
2503 emit_swap_insn (insn, old,
2504 FP_MODE_REG (old->reg[reg], DFmode));
2507 /* See if any regs remain incorrect. If so, bring an
2508 incorrect reg to the top of stack, and let the while loop
2511 for (reg = new->top; reg >= 0; reg--)
2512 if (new->reg[reg] != old->reg[reg])
2514 emit_swap_insn (insn, old,
2515 FP_MODE_REG (old->reg[reg], DFmode));
2520 /* At this point there must be no differences. */
2522 for (reg = old->top; reg >= 0; reg--)
2523 gcc_assert (old->reg[reg] == new->reg[reg]);
2527 BB_END (current_block) = PREV_INSN (insn);
2530 /* Print stack configuration. */
2533 print_stack (FILE *file, stack s)
2539 fprintf (file, "uninitialized\n");
2540 else if (s->top == -1)
2541 fprintf (file, "empty\n");
2546 for (i = 0; i <= s->top; ++i)
2547 fprintf (file, "%d ", s->reg[i]);
2548 fputs ("]\n", file);
2552 /* This function was doing life analysis. We now let the regular live
2553 code do it's job, so we only need to check some extra invariants
2554 that reg-stack expects. Primary among these being that all registers
2555 are initialized before use.
2557 The function returns true when code was emitted to CFG edges and
2558 commit_edge_insertions needs to be called. */
2561 convert_regs_entry (void)
2563 tree params = DECL_ARGUMENTS (current_function_decl);
2565 HARD_REG_SET incoming_regs;
2572 /* Find out which registers were used as argument passing registers. */
2574 CLEAR_HARD_REG_SET (incoming_regs);
2575 for (p = params; p; p = TREE_CHAIN (p))
2577 inc_rtx = DECL_INCOMING_RTL (p);
2580 && IN_RANGE (REGNO (inc_rtx), FIRST_STACK_REG, LAST_STACK_REG))
2581 SET_HARD_REG_BIT (incoming_regs, REGNO (inc_rtx));
2584 /* Load something into remaining stack register live at function entry.
2585 Such live registers can be caused by uninitialized variables or
2586 functions not returning values on all paths. In order to keep
2587 the push/pop code happy, and to not scrog the register stack, we
2588 must put something in these registers. Use a QNaN.
2590 Note that we are inserting converted code here. This code is
2591 never seen by the convert_regs pass. */
2593 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs)
2595 basic_block block = e->dest;
2596 block_info bi = BLOCK_INFO (block);
2599 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2600 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2604 bi->stack_in.reg[++top] = reg;
2606 /* Skip argument passing registers. */
2607 if (TEST_HARD_REG_BIT (incoming_regs, reg))
2610 init = gen_rtx_SET (VOIDmode,
2611 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2613 insert_insn_on_edge (init, e);
2617 bi->stack_in.top = top;
2623 /* Construct the desired stack for function exit. This will either
2624 be `empty', or the function return value at top-of-stack. */
2627 convert_regs_exit (void)
2629 int value_reg_low, value_reg_high;
2633 retvalue = stack_result (current_function_decl);
2634 value_reg_low = value_reg_high = -1;
2637 value_reg_low = REGNO (retvalue);
2638 value_reg_high = value_reg_low
2639 + hard_regno_nregs[value_reg_low][GET_MODE (retvalue)] - 1;
2642 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2643 if (value_reg_low == -1)
2644 output_stack->top = -1;
2649 output_stack->top = value_reg_high - value_reg_low;
2650 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2652 output_stack->reg[value_reg_high - reg] = reg;
2653 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2658 /* Copy the stack info from the end of edge E's source block to the
2659 start of E's destination block. */
2662 propagate_stack (edge e)
2664 stack src_stack = &BLOCK_INFO (e->src)->stack_out;
2665 stack dest_stack = &BLOCK_INFO (e->dest)->stack_in;
2668 /* Preserve the order of the original stack, but check whether
2669 any pops are needed. */
2670 dest_stack->top = -1;
2671 for (reg = 0; reg <= src_stack->top; ++reg)
2672 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg]))
2673 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg];
2677 /* Adjust the stack of edge E's source block on exit to match the stack
2678 of it's target block upon input. The stack layouts of both blocks
2679 should have been defined by now. */
2682 compensate_edge (edge e)
2684 basic_block source = e->src, target = e->dest;
2685 stack target_stack = &BLOCK_INFO (target)->stack_in;
2686 stack source_stack = &BLOCK_INFO (source)->stack_out;
2687 struct stack_def regstack;
2691 fprintf (dump_file, "Edge %d->%d: ", source->index, target->index);
2693 gcc_assert (target_stack->top != -2);
2695 /* Check whether stacks are identical. */
2696 if (target_stack->top == source_stack->top)
2698 for (reg = target_stack->top; reg >= 0; --reg)
2699 if (target_stack->reg[reg] != source_stack->reg[reg])
2705 fprintf (dump_file, "no changes needed\n");
2712 fprintf (dump_file, "correcting stack to ");
2713 print_stack (dump_file, target_stack);
2716 /* Abnormal calls may appear to have values live in st(0), but the
2717 abnormal return path will not have actually loaded the values. */
2718 if (e->flags & EDGE_ABNORMAL_CALL)
2720 /* Assert that the lifetimes are as we expect -- one value
2721 live at st(0) on the end of the source block, and no
2722 values live at the beginning of the destination block.
2723 For complex return values, we may have st(1) live as well. */
2724 gcc_assert (source_stack->top == 0 || source_stack->top == 1);
2725 gcc_assert (target_stack->top == -1);
2729 /* Handle non-call EH edges specially. The normal return path have
2730 values in registers. These will be popped en masse by the unwind
2732 if (e->flags & EDGE_EH)
2734 gcc_assert (target_stack->top == -1);
2738 /* We don't support abnormal edges. Global takes care to
2739 avoid any live register across them, so we should never
2740 have to insert instructions on such edges. */
2741 gcc_assert (! (e->flags & EDGE_ABNORMAL));
2743 /* Make a copy of source_stack as change_stack is destructive. */
2744 regstack = *source_stack;
2746 /* It is better to output directly to the end of the block
2747 instead of to the edge, because emit_swap can do minimal
2748 insn scheduling. We can do this when there is only one
2749 edge out, and it is not abnormal. */
2750 if (EDGE_COUNT (source->succs) == 1)
2752 current_block = source;
2753 change_stack (BB_END (source), ®stack, target_stack,
2754 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER));
2760 current_block = NULL;
2763 /* ??? change_stack needs some point to emit insns after. */
2764 after = emit_note (NOTE_INSN_DELETED);
2766 change_stack (after, ®stack, target_stack, EMIT_BEFORE);
2771 insert_insn_on_edge (seq, e);
2777 /* Traverse all non-entry edges in the CFG, and emit the necessary
2778 edge compensation code to change the stack from stack_out of the
2779 source block to the stack_in of the destination block. */
2782 compensate_edges (void)
2784 bool inserted = false;
2787 starting_stack_p = false;
2790 if (bb != ENTRY_BLOCK_PTR)
2795 FOR_EACH_EDGE (e, ei, bb->succs)
2796 inserted |= compensate_edge (e);
2801 /* Select the better of two edges E1 and E2 to use to determine the
2802 stack layout for their shared destination basic block. This is
2803 typically the more frequently executed. The edge E1 may be NULL
2804 (in which case E2 is returned), but E2 is always non-NULL. */
2807 better_edge (edge e1, edge e2)
2812 if (EDGE_FREQUENCY (e1) > EDGE_FREQUENCY (e2))
2814 if (EDGE_FREQUENCY (e1) < EDGE_FREQUENCY (e2))
2817 if (e1->count > e2->count)
2819 if (e1->count < e2->count)
2822 /* Prefer critical edges to minimize inserting compensation code on
2825 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2))
2826 return EDGE_CRITICAL_P (e1) ? e1 : e2;
2828 /* Avoid non-deterministic behavior. */
2829 return (e1->src->index < e2->src->index) ? e1 : e2;
2832 /* Convert stack register references in one block. */
2835 convert_regs_1 (basic_block block)
2837 struct stack_def regstack;
2838 block_info bi = BLOCK_INFO (block);
2841 bool control_flow_insn_deleted = false;
2843 any_malformed_asm = false;
2845 /* Choose an initial stack layout, if one hasn't already been chosen. */
2846 if (bi->stack_in.top == -2)
2848 edge e, beste = NULL;
2851 /* Select the best incoming edge (typically the most frequent) to
2852 use as a template for this basic block. */
2853 FOR_EACH_EDGE (e, ei, block->preds)
2854 if (BLOCK_INFO (e->src)->done)
2855 beste = better_edge (beste, e);
2858 propagate_stack (beste);
2861 /* No predecessors. Create an arbitrary input stack. */
2862 bi->stack_in.top = -1;
2863 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2864 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2865 bi->stack_in.reg[++bi->stack_in.top] = reg;
2871 fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index);
2872 print_stack (dump_file, &bi->stack_in);
2875 /* Process all insns in this block. Keep track of NEXT so that we
2876 don't process insns emitted while substituting in INSN. */
2877 current_block = block;
2878 next = BB_HEAD (block);
2879 regstack = bi->stack_in;
2880 starting_stack_p = true;
2885 next = NEXT_INSN (insn);
2887 /* Ensure we have not missed a block boundary. */
2889 if (insn == BB_END (block))
2892 /* Don't bother processing unless there is a stack reg
2893 mentioned or if it's a CALL_INSN. */
2894 if (stack_regs_mentioned (insn)
2899 fprintf (dump_file, " insn %d input stack: ",
2901 print_stack (dump_file, ®stack);
2903 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack);
2904 starting_stack_p = false;
2911 fprintf (dump_file, "Expected live registers [");
2912 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2913 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2914 fprintf (dump_file, " %d", reg);
2915 fprintf (dump_file, " ]\nOutput stack: ");
2916 print_stack (dump_file, ®stack);
2919 insn = BB_END (block);
2921 insn = PREV_INSN (insn);
2923 /* If the function is declared to return a value, but it returns one
2924 in only some cases, some registers might come live here. Emit
2925 necessary moves for them. */
2927 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2929 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2930 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2935 fprintf (dump_file, "Emitting insn initializing reg %d\n", reg);
2937 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), not_a_num);
2938 insn = emit_insn_after (set, insn);
2939 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack);
2943 /* Amongst the insns possibly deleted during the substitution process above,
2944 might have been the only trapping insn in the block. We purge the now
2945 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
2946 called at the end of convert_regs. The order in which we process the
2947 blocks ensures that we never delete an already processed edge.
2949 Note that, at this point, the CFG may have been damaged by the emission
2950 of instructions after an abnormal call, which moves the basic block end
2951 (and is the reason why we call fixup_abnormal_edges later). So we must
2952 be sure that the trapping insn has been deleted before trying to purge
2953 dead edges, otherwise we risk purging valid edges.
2955 ??? We are normally supposed not to delete trapping insns, so we pretend
2956 that the insns deleted above don't actually trap. It would have been
2957 better to detect this earlier and avoid creating the EH edge in the first
2958 place, still, but we don't have enough information at that time. */
2960 if (control_flow_insn_deleted)
2961 purge_dead_edges (block);
2963 /* Something failed if the stack lives don't match. If we had malformed
2964 asms, we zapped the instruction itself, but that didn't produce the
2965 same pattern of register kills as before. */
2966 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2967 gcc_assert (any_malformed_asm);
2969 bi->stack_out = regstack;
2973 /* Convert registers in all blocks reachable from BLOCK. */
2976 convert_regs_2 (basic_block block)
2978 basic_block *stack, *sp;
2980 /* We process the blocks in a top-down manner, in a way such that one block
2981 is only processed after all its predecessors. The number of predecessors
2982 of every block has already been computed. */
2984 stack = XNEWVEC (basic_block, n_basic_blocks);
2996 /* Processing BLOCK is achieved by convert_regs_1, which may purge
2997 some dead EH outgoing edge after the deletion of the trapping
2998 insn inside the block. Since the number of predecessors of
2999 BLOCK's successors was computed based on the initial edge set,
3000 we check the necessity to process some of these successors
3001 before such an edge deletion may happen. However, there is
3002 a pitfall: if BLOCK is the only predecessor of a successor and
3003 the edge between them happens to be deleted, the successor
3004 becomes unreachable and should not be processed. The problem
3005 is that there is no way to preventively detect this case so we
3006 stack the successor in all cases and hand over the task of
3007 fixing up the discrepancy to convert_regs_1. */
3009 FOR_EACH_EDGE (e, ei, block->succs)
3010 if (! (e->flags & EDGE_DFS_BACK))
3012 BLOCK_INFO (e->dest)->predecessors--;
3013 if (!BLOCK_INFO (e->dest)->predecessors)
3017 convert_regs_1 (block);
3019 while (sp != stack);
3024 /* Traverse all basic blocks in a function, converting the register
3025 references in each insn from the "flat" register file that gcc uses,
3026 to the stack-like registers the 387 uses. */
3036 /* Initialize uninitialized registers on function entry. */
3037 inserted = convert_regs_entry ();
3039 /* Construct the desired stack for function exit. */
3040 convert_regs_exit ();
3041 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
3043 /* ??? Future: process inner loops first, and give them arbitrary
3044 initial stacks which emit_swap_insn can modify. This ought to
3045 prevent double fxch that often appears at the head of a loop. */
3047 /* Process all blocks reachable from all entry points. */
3048 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs)
3049 convert_regs_2 (e->dest);
3051 /* ??? Process all unreachable blocks. Though there's no excuse
3052 for keeping these even when not optimizing. */
3055 block_info bi = BLOCK_INFO (b);
3061 inserted |= compensate_edges ();
3063 clear_aux_for_blocks ();
3065 fixup_abnormal_edges ();
3067 commit_edge_insertions ();
3070 fputc ('\n', dump_file);
3073 /* Convert register usage from "flat" register file usage to a "stack
3074 register file. FILE is the dump file, if used.
3076 Construct a CFG and run life analysis. Then convert each insn one
3077 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
3078 code duplication created when the converter inserts pop insns on
3088 /* Clean up previous run. */
3089 if (stack_regs_mentioned_data != NULL)
3090 VEC_free (char, heap, stack_regs_mentioned_data);
3092 /* See if there is something to do. Flow analysis is quite
3093 expensive so we might save some compilation time. */
3094 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3095 if (regs_ever_live[i])
3097 if (i > LAST_STACK_REG)
3100 /* Ok, floating point instructions exist. If not optimizing,
3101 build the CFG and run life analysis.
3102 Also need to rebuild life when superblock scheduling is done
3103 as it don't update liveness yet. */
3105 || ((flag_sched2_use_superblocks || flag_sched2_use_traces)
3106 && flag_schedule_insns_after_reload))
3108 count_or_remove_death_notes (NULL, 1);
3109 life_analysis (PROP_DEATH_NOTES);
3111 mark_dfs_back_edges ();
3113 /* Set up block info for each basic block. */
3114 alloc_aux_for_blocks (sizeof (struct block_info_def));
3117 block_info bi = BLOCK_INFO (bb);
3122 FOR_EACH_EDGE (e, ei, bb->preds)
3123 if (!(e->flags & EDGE_DFS_BACK)
3124 && e->src != ENTRY_BLOCK_PTR)
3127 /* Set current register status at last instruction `uninitialized'. */
3128 bi->stack_in.top = -2;
3130 /* Copy live_at_end and live_at_start into temporaries. */
3131 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
3133 if (REGNO_REG_SET_P (bb->il.rtl->global_live_at_end, reg))
3134 SET_HARD_REG_BIT (bi->out_reg_set, reg);
3135 if (REGNO_REG_SET_P (bb->il.rtl->global_live_at_start, reg))
3136 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
3140 /* Create the replacement registers up front. */
3141 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3143 enum machine_mode mode;
3144 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
3146 mode = GET_MODE_WIDER_MODE (mode))
3147 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3148 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
3150 mode = GET_MODE_WIDER_MODE (mode))
3151 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3154 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
3156 /* A QNaN for initializing uninitialized variables.
3158 ??? We can't load from constant memory in PIC mode, because
3159 we're inserting these instructions before the prologue and
3160 the PIC register hasn't been set up. In that case, fall back
3161 on zero, which we can get from `ldz'. */
3164 not_a_num = CONST0_RTX (SFmode);
3167 not_a_num = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
3168 not_a_num = force_const_mem (SFmode, not_a_num);
3171 /* Allocate a cache for stack_regs_mentioned. */
3172 max_uid = get_max_uid ();
3173 stack_regs_mentioned_data = VEC_alloc (char, heap, max_uid + 1);
3174 memset (VEC_address (char, stack_regs_mentioned_data),
3175 0, sizeof (char) * max_uid + 1);
3179 free_aux_for_blocks ();
3182 #endif /* STACK_REGS */
3185 gate_handle_stack_regs (void)
3194 /* Convert register usage from flat register file usage to a stack
3197 rest_of_handle_stack_regs (void)
3200 if (reg_to_stack () && optimize)
3202 regstack_completed = 1;
3203 if (cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_POST_REGSTACK
3204 | (flag_crossjumping ? CLEANUP_CROSSJUMP : 0))
3205 && (flag_reorder_blocks || flag_reorder_blocks_and_partition))
3207 reorder_basic_blocks (0);
3208 cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_POST_REGSTACK);
3212 regstack_completed = 1;
3217 struct tree_opt_pass pass_stack_regs =
3220 gate_handle_stack_regs, /* gate */
3221 rest_of_handle_stack_regs, /* execute */
3224 0, /* static_pass_number */
3225 TV_REG_STACK, /* tv_id */
3226 0, /* properties_required */
3227 0, /* properties_provided */
3228 0, /* properties_destroyed */
3229 0, /* todo_flags_start */
3231 TODO_ggc_collect, /* todo_flags_finish */