1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
25 * The form of the input:
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
45 * The form of the output:
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
105 asm ("foo" : "=t" (a) : "f" (b));
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, ie, the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
116 The asm above would be written as
118 asm ("foo" : "=&t" (a) : "f" (b));
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
159 #include "function.h"
160 #include "insn-config.h"
162 #include "hard-reg-set.h"
167 #include "basic-block.h"
173 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
175 /* This is the basic stack record. TOP is an index into REG[] such
176 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
178 If TOP is -2, REG[] is not yet initialized. Stack initialization
179 consists of placing each live reg in array `reg' and setting `top'
182 REG_SET indicates which registers are live. */
184 typedef struct stack_def
186 int top; /* index to top stack element */
187 HARD_REG_SET reg_set; /* set of live registers */
188 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
191 /* This is used to carry information about basic blocks. It is
192 attached to the AUX field of the standard CFG block. */
194 typedef struct block_info_def
196 struct stack_def stack_in; /* Input stack configuration. */
197 struct stack_def stack_out; /* Output stack configuration. */
198 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
199 int done; /* True if block already converted. */
200 int predecesors; /* Number of predecesors that needs
204 #define BLOCK_INFO(B) ((block_info) (B)->aux)
206 /* Passed to change_stack to indicate where to emit insns. */
213 /* We use this array to cache info about insns, because otherwise we
214 spend too much time in stack_regs_mentioned_p.
216 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
217 the insn uses stack registers, two indicates the insn does not use
219 static varray_type stack_regs_mentioned_data;
221 /* The block we're currently working on. */
222 static basic_block current_block;
224 /* This is the register file for all register after conversion */
226 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
228 #define FP_MODE_REG(regno,mode) \
229 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)])
231 /* Used to initialize uninitialized registers. */
234 /* Forward declarations */
236 static int stack_regs_mentioned_p PARAMS ((rtx pat));
237 static void straighten_stack PARAMS ((rtx, stack));
238 static void pop_stack PARAMS ((stack, int));
239 static rtx *get_true_reg PARAMS ((rtx *));
241 static int check_asm_stack_operands PARAMS ((rtx));
242 static int get_asm_operand_n_inputs PARAMS ((rtx));
243 static rtx stack_result PARAMS ((tree));
244 static void replace_reg PARAMS ((rtx *, int));
245 static void remove_regno_note PARAMS ((rtx, enum reg_note,
247 static int get_hard_regnum PARAMS ((stack, rtx));
248 static rtx emit_pop_insn PARAMS ((rtx, stack, rtx,
250 static void emit_swap_insn PARAMS ((rtx, stack, rtx));
251 static void move_for_stack_reg PARAMS ((rtx, stack, rtx));
252 static int swap_rtx_condition_1 PARAMS ((rtx));
253 static int swap_rtx_condition PARAMS ((rtx));
254 static void compare_for_stack_reg PARAMS ((rtx, stack, rtx));
255 static void subst_stack_regs_pat PARAMS ((rtx, stack, rtx));
256 static void subst_asm_stack_regs PARAMS ((rtx, stack));
257 static void subst_stack_regs PARAMS ((rtx, stack));
258 static void change_stack PARAMS ((rtx, stack, stack,
260 static int convert_regs_entry PARAMS ((void));
261 static void convert_regs_exit PARAMS ((void));
262 static int convert_regs_1 PARAMS ((FILE *, basic_block));
263 static int convert_regs_2 PARAMS ((FILE *, basic_block));
264 static int convert_regs PARAMS ((FILE *));
265 static void print_stack PARAMS ((FILE *, stack));
266 static rtx next_flags_user PARAMS ((rtx));
267 static void record_label_references PARAMS ((rtx, rtx));
268 static bool compensate_edge PARAMS ((edge, FILE *));
270 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
273 stack_regs_mentioned_p (pat)
276 register const char *fmt;
279 if (STACK_REG_P (pat))
282 fmt = GET_RTX_FORMAT (GET_CODE (pat));
283 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
289 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
290 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
293 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
300 /* Return nonzero if INSN mentions stacked registers, else return zero. */
303 stack_regs_mentioned (insn)
306 unsigned int uid, max;
309 if (! INSN_P (insn) || !stack_regs_mentioned_data)
312 uid = INSN_UID (insn);
313 max = VARRAY_SIZE (stack_regs_mentioned_data);
316 /* Allocate some extra size to avoid too many reallocs, but
317 do not grow too quickly. */
318 max = uid + uid / 20;
319 VARRAY_GROW (stack_regs_mentioned_data, max);
322 test = VARRAY_CHAR (stack_regs_mentioned_data, uid);
325 /* This insn has yet to be examined. Do so now. */
326 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
327 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test;
333 static rtx ix86_flags_rtx;
336 next_flags_user (insn)
339 /* Search forward looking for the first use of this value.
340 Stop at block boundaries. */
342 while (insn != current_block->end)
344 insn = NEXT_INSN (insn);
346 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
349 if (GET_CODE (insn) == CALL_INSN)
355 /* Reorganise the stack into ascending numbers,
359 straighten_stack (insn, regstack)
363 struct stack_def temp_stack;
366 /* If there is only a single register on the stack, then the stack is
367 already in increasing order and no reorganization is needed.
369 Similarly if the stack is empty. */
370 if (regstack->top <= 0)
373 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
375 for (top = temp_stack.top = regstack->top; top >= 0; top--)
376 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
378 change_stack (insn, regstack, &temp_stack, EMIT_AFTER);
381 /* Pop a register from the stack */
384 pop_stack (regstack, regno)
388 int top = regstack->top;
390 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
392 /* If regno was not at the top of stack then adjust stack */
393 if (regstack->reg [top] != regno)
396 for (i = regstack->top; i >= 0; i--)
397 if (regstack->reg [i] == regno)
400 for (j = i; j < top; j++)
401 regstack->reg [j] = regstack->reg [j + 1];
407 /* Convert register usage from "flat" register file usage to a "stack
408 register file. FIRST is the first insn in the function, FILE is the
411 Construct a CFG and run life analysis. Then convert each insn one
412 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
413 code duplication created when the converter inserts pop insns on
417 reg_to_stack (first, file)
425 /* Clean up previous run. */
426 if (stack_regs_mentioned_data)
428 VARRAY_FREE (stack_regs_mentioned_data);
429 stack_regs_mentioned_data = 0;
435 /* See if there is something to do. Flow analysis is quite
436 expensive so we might save some compilation time. */
437 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
438 if (regs_ever_live[i])
440 if (i > LAST_STACK_REG)
443 /* Ok, floating point instructions exist. If not optimizing,
444 build the CFG and run life analysis. */
446 find_basic_blocks (first, max_reg_num (), file);
447 count_or_remove_death_notes (NULL, 1);
448 life_analysis (first, file, PROP_DEATH_NOTES);
449 mark_dfs_back_edges ();
451 /* Set up block info for each basic block. */
452 bi = (block_info) xcalloc ((n_basic_blocks + 1), sizeof (*bi));
453 for (i = n_basic_blocks - 1; i >= 0; --i)
456 basic_block bb = BASIC_BLOCK (i);
458 for (e = bb->pred; e; e=e->pred_next)
459 if (!(e->flags & EDGE_DFS_BACK)
460 && e->src != ENTRY_BLOCK_PTR)
461 BLOCK_INFO (bb)->predecesors++;
463 EXIT_BLOCK_PTR->aux = bi + n_basic_blocks;
465 /* Create the replacement registers up front. */
466 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
468 enum machine_mode mode;
469 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
471 mode = GET_MODE_WIDER_MODE (mode))
472 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
473 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
475 mode = GET_MODE_WIDER_MODE (mode))
476 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
479 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
481 /* A QNaN for initializing uninitialized variables.
483 ??? We can't load from constant memory in PIC mode, because
484 we're insertting these instructions before the prologue and
485 the PIC register hasn't been set up. In that case, fall back
486 on zero, which we can get from `ldz'. */
489 nan = CONST0_RTX (SFmode);
492 nan = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
493 nan = force_const_mem (SFmode, nan);
496 /* Allocate a cache for stack_regs_mentioned. */
497 max_uid = get_max_uid ();
498 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
499 "stack_regs_mentioned cache");
506 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
507 label's chain of references, and note which insn contains each
511 record_label_references (insn, pat)
514 register enum rtx_code code = GET_CODE (pat);
516 register const char *fmt;
518 if (code == LABEL_REF)
520 register rtx label = XEXP (pat, 0);
523 if (GET_CODE (label) != CODE_LABEL)
526 /* If this is an undefined label, LABEL_REFS (label) contains
528 if (INSN_UID (label) == 0)
531 /* Don't make a duplicate in the code_label's chain. */
533 for (ref = LABEL_REFS (label);
535 ref = LABEL_NEXTREF (ref))
536 if (CONTAINING_INSN (ref) == insn)
539 CONTAINING_INSN (pat) = insn;
540 LABEL_NEXTREF (pat) = LABEL_REFS (label);
541 LABEL_REFS (label) = pat;
546 fmt = GET_RTX_FORMAT (code);
547 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
550 record_label_references (insn, XEXP (pat, i));
554 for (j = 0; j < XVECLEN (pat, i); j++)
555 record_label_references (insn, XVECEXP (pat, i, j));
560 /* Return a pointer to the REG expression within PAT. If PAT is not a
561 REG, possible enclosed by a conversion rtx, return the inner part of
562 PAT that stopped the search. */
569 switch (GET_CODE (*pat))
572 /* Eliminate FP subregister accesses in favour of the
573 actual FP register in use. */
576 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
578 int regno_off = subreg_regno_offset (REGNO (subreg),
582 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
591 pat = & XEXP (*pat, 0);
595 /* There are many rules that an asm statement for stack-like regs must
596 follow. Those rules are explained at the top of this file: the rule
597 numbers below refer to that explanation. */
600 check_asm_stack_operands (insn)
605 int malformed_asm = 0;
606 rtx body = PATTERN (insn);
608 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
609 char implicitly_dies[FIRST_PSEUDO_REGISTER];
612 rtx *clobber_reg = 0;
613 int n_inputs, n_outputs;
615 /* Find out what the constraints require. If no constraint
616 alternative matches, this asm is malformed. */
618 constrain_operands (1);
619 alt = which_alternative;
621 preprocess_constraints ();
623 n_inputs = get_asm_operand_n_inputs (body);
624 n_outputs = recog_data.n_operands - n_inputs;
629 /* Avoid further trouble with this insn. */
630 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
634 /* Strip SUBREGs here to make the following code simpler. */
635 for (i = 0; i < recog_data.n_operands; i++)
636 if (GET_CODE (recog_data.operand[i]) == SUBREG
637 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
638 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
640 /* Set up CLOBBER_REG. */
644 if (GET_CODE (body) == PARALLEL)
646 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
648 for (i = 0; i < XVECLEN (body, 0); i++)
649 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
651 rtx clobber = XVECEXP (body, 0, i);
652 rtx reg = XEXP (clobber, 0);
654 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
655 reg = SUBREG_REG (reg);
657 if (STACK_REG_P (reg))
659 clobber_reg[n_clobbers] = reg;
665 /* Enforce rule #4: Output operands must specifically indicate which
666 reg an output appears in after an asm. "=f" is not allowed: the
667 operand constraints must select a class with a single reg.
669 Also enforce rule #5: Output operands must start at the top of
670 the reg-stack: output operands may not "skip" a reg. */
672 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
673 for (i = 0; i < n_outputs; i++)
674 if (STACK_REG_P (recog_data.operand[i]))
676 if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1)
678 error_for_asm (insn, "Output constraint %d must specify a single register", i);
685 for (j = 0; j < n_clobbers; j++)
686 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
688 error_for_asm (insn, "Output constraint %d cannot be specified together with \"%s\" clobber",
689 i, reg_names [REGNO (clobber_reg[j])]);
694 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
699 /* Search for first non-popped reg. */
700 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
701 if (! reg_used_as_output[i])
704 /* If there are any other popped regs, that's an error. */
705 for (; i < LAST_STACK_REG + 1; i++)
706 if (reg_used_as_output[i])
709 if (i != LAST_STACK_REG + 1)
711 error_for_asm (insn, "Output regs must be grouped at top of stack");
715 /* Enforce rule #2: All implicitly popped input regs must be closer
716 to the top of the reg-stack than any input that is not implicitly
719 memset (implicitly_dies, 0, sizeof (implicitly_dies));
720 for (i = n_outputs; i < n_outputs + n_inputs; i++)
721 if (STACK_REG_P (recog_data.operand[i]))
723 /* An input reg is implicitly popped if it is tied to an
724 output, or if there is a CLOBBER for it. */
727 for (j = 0; j < n_clobbers; j++)
728 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
731 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
732 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
735 /* Search for first non-popped reg. */
736 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
737 if (! implicitly_dies[i])
740 /* If there are any other popped regs, that's an error. */
741 for (; i < LAST_STACK_REG + 1; i++)
742 if (implicitly_dies[i])
745 if (i != LAST_STACK_REG + 1)
748 "Implicitly popped regs must be grouped at top of stack");
752 /* Enfore rule #3: If any input operand uses the "f" constraint, all
753 output constraints must use the "&" earlyclobber.
755 ??? Detect this more deterministically by having constrain_asm_operands
756 record any earlyclobber. */
758 for (i = n_outputs; i < n_outputs + n_inputs; i++)
759 if (recog_op_alt[i][alt].matches == -1)
763 for (j = 0; j < n_outputs; j++)
764 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
767 "Output operand %d must use `&' constraint", j);
774 /* Avoid further trouble with this insn. */
775 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
782 /* Calculate the number of inputs and outputs in BODY, an
783 asm_operands. N_OPERANDS is the total number of operands, and
784 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
788 get_asm_operand_n_inputs (body)
791 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
792 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
794 else if (GET_CODE (body) == ASM_OPERANDS)
795 return ASM_OPERANDS_INPUT_LENGTH (body);
797 else if (GET_CODE (body) == PARALLEL
798 && GET_CODE (XVECEXP (body, 0, 0)) == SET)
799 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
801 else if (GET_CODE (body) == PARALLEL
802 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
803 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
808 /* If current function returns its result in an fp stack register,
809 return the REG. Otherwise, return 0. */
817 /* If the value is supposed to be returned in memory, then clearly
818 it is not returned in a stack register. */
819 if (aggregate_value_p (DECL_RESULT (decl)))
822 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
825 #ifdef FUNCTION_OUTGOING_VALUE
827 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
829 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
833 return result != 0 && STACK_REG_P (result) ? result : 0;
838 * This section deals with stack register substitution, and forms the second
842 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
843 the desired hard REGNO. */
846 replace_reg (reg, regno)
850 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
851 || ! STACK_REG_P (*reg))
854 switch (GET_MODE_CLASS (GET_MODE (*reg)))
858 case MODE_COMPLEX_FLOAT:;
861 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
864 /* Remove a note of type NOTE, which must be found, for register
865 number REGNO from INSN. Remove only one such note. */
868 remove_regno_note (insn, note, regno)
873 register rtx *note_link, this;
875 note_link = ®_NOTES(insn);
876 for (this = *note_link; this; this = XEXP (this, 1))
877 if (REG_NOTE_KIND (this) == note
878 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
880 *note_link = XEXP (this, 1);
884 note_link = &XEXP (this, 1);
889 /* Find the hard register number of virtual register REG in REGSTACK.
890 The hard register number is relative to the top of the stack. -1 is
891 returned if the register is not found. */
894 get_hard_regnum (regstack, reg)
900 if (! STACK_REG_P (reg))
903 for (i = regstack->top; i >= 0; i--)
904 if (regstack->reg[i] == REGNO (reg))
907 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
910 /* Emit an insn to pop virtual register REG before or after INSN.
911 REGSTACK is the stack state after INSN and is updated to reflect this
912 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
913 is represented as a SET whose destination is the register to be popped
914 and source is the top of stack. A death note for the top of stack
915 cases the movdf pattern to pop. */
918 emit_pop_insn (insn, regstack, reg, where)
922 enum emit_where where;
924 rtx pop_insn, pop_rtx;
927 /* For complex types take care to pop both halves. These may survive in
928 CLOBBER and USE expressions. */
929 if (COMPLEX_MODE_P (GET_MODE (reg)))
931 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
932 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
935 if (get_hard_regnum (regstack, reg1) >= 0)
936 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
937 if (get_hard_regnum (regstack, reg2) >= 0)
938 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
944 hard_regno = get_hard_regnum (regstack, reg);
946 if (hard_regno < FIRST_STACK_REG)
949 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
950 FP_MODE_REG (FIRST_STACK_REG, DFmode));
952 if (where == EMIT_AFTER)
953 pop_insn = emit_insn_after (pop_rtx, insn);
955 pop_insn = emit_insn_before (pop_rtx, insn);
958 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
959 REG_NOTES (pop_insn));
961 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
962 = regstack->reg[regstack->top];
964 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
969 /* Emit an insn before or after INSN to swap virtual register REG with
970 the top of stack. REGSTACK is the stack state before the swap, and
971 is updated to reflect the swap. A swap insn is represented as a
972 PARALLEL of two patterns: each pattern moves one reg to the other.
974 If REG is already at the top of the stack, no insn is emitted. */
977 emit_swap_insn (insn, regstack, reg)
984 int tmp, other_reg; /* swap regno temps */
985 rtx i1; /* the stack-reg insn prior to INSN */
986 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
988 hard_regno = get_hard_regnum (regstack, reg);
990 if (hard_regno < FIRST_STACK_REG)
992 if (hard_regno == FIRST_STACK_REG)
995 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
997 tmp = regstack->reg[other_reg];
998 regstack->reg[other_reg] = regstack->reg[regstack->top];
999 regstack->reg[regstack->top] = tmp;
1001 /* Find the previous insn involving stack regs, but don't pass a
1004 if (current_block && insn != current_block->head)
1006 rtx tmp = PREV_INSN (insn);
1007 rtx limit = PREV_INSN (current_block->head);
1008 while (tmp != limit)
1010 if (GET_CODE (tmp) == CODE_LABEL
1011 || GET_CODE (tmp) == CALL_INSN
1012 || NOTE_INSN_BASIC_BLOCK_P (tmp)
1013 || (GET_CODE (tmp) == INSN
1014 && stack_regs_mentioned (tmp)))
1019 tmp = PREV_INSN (tmp);
1024 && (i1set = single_set (i1)) != NULL_RTX)
1026 rtx i1src = *get_true_reg (&SET_SRC (i1set));
1027 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
1029 /* If the previous register stack push was from the reg we are to
1030 swap with, omit the swap. */
1032 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG
1033 && GET_CODE (i1src) == REG
1034 && REGNO (i1src) == (unsigned) hard_regno - 1
1035 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1038 /* If the previous insn wrote to the reg we are to swap with,
1041 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == (unsigned) hard_regno
1042 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG
1043 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1047 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
1048 FP_MODE_REG (FIRST_STACK_REG, XFmode));
1051 emit_insn_after (swap_rtx, i1);
1052 else if (current_block)
1053 emit_insn_before (swap_rtx, current_block->head);
1055 emit_insn_before (swap_rtx, insn);
1058 /* Handle a move to or from a stack register in PAT, which is in INSN.
1059 REGSTACK is the current stack. */
1062 move_for_stack_reg (insn, regstack, pat)
1067 rtx *psrc = get_true_reg (&SET_SRC (pat));
1068 rtx *pdest = get_true_reg (&SET_DEST (pat));
1072 src = *psrc; dest = *pdest;
1074 if (STACK_REG_P (src) && STACK_REG_P (dest))
1076 /* Write from one stack reg to another. If SRC dies here, then
1077 just change the register mapping and delete the insn. */
1079 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1084 /* If this is a no-op move, there must not be a REG_DEAD note. */
1085 if (REGNO (src) == REGNO (dest))
1088 for (i = regstack->top; i >= 0; i--)
1089 if (regstack->reg[i] == REGNO (src))
1092 /* The source must be live, and the dest must be dead. */
1093 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1096 /* It is possible that the dest is unused after this insn.
1097 If so, just pop the src. */
1099 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1101 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
1107 regstack->reg[i] = REGNO (dest);
1109 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1110 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1117 /* The source reg does not die. */
1119 /* If this appears to be a no-op move, delete it, or else it
1120 will confuse the machine description output patterns. But if
1121 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1122 for REG_UNUSED will not work for deleted insns. */
1124 if (REGNO (src) == REGNO (dest))
1126 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1127 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1133 /* The destination ought to be dead */
1134 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1137 replace_reg (psrc, get_hard_regnum (regstack, src));
1139 regstack->reg[++regstack->top] = REGNO (dest);
1140 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1141 replace_reg (pdest, FIRST_STACK_REG);
1143 else if (STACK_REG_P (src))
1145 /* Save from a stack reg to MEM, or possibly integer reg. Since
1146 only top of stack may be saved, emit an exchange first if
1149 emit_swap_insn (insn, regstack, src);
1151 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1154 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1156 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1158 else if ((GET_MODE (src) == XFmode || GET_MODE (src) == TFmode)
1159 && regstack->top < REG_STACK_SIZE - 1)
1161 /* A 387 cannot write an XFmode value to a MEM without
1162 clobbering the source reg. The output code can handle
1163 this by reading back the value from the MEM.
1164 But it is more efficient to use a temp register if one is
1165 available. Push the source value here if the register
1166 stack is not full, and then write the value to memory via
1168 rtx push_rtx, push_insn;
1169 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1171 if (GET_MODE (src) == TFmode)
1172 push_rtx = gen_movtf (top_stack_reg, top_stack_reg);
1174 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1175 push_insn = emit_insn_before (push_rtx, insn);
1176 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1180 replace_reg (psrc, FIRST_STACK_REG);
1182 else if (STACK_REG_P (dest))
1184 /* Load from MEM, or possibly integer REG or constant, into the
1185 stack regs. The actual target is always the top of the
1186 stack. The stack mapping is changed to reflect that DEST is
1187 now at top of stack. */
1189 /* The destination ought to be dead */
1190 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1193 if (regstack->top >= REG_STACK_SIZE)
1196 regstack->reg[++regstack->top] = REGNO (dest);
1197 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1198 replace_reg (pdest, FIRST_STACK_REG);
1204 /* Swap the condition on a branch, if there is one. Return true if we
1205 found a condition to swap. False if the condition was not used as
1209 swap_rtx_condition_1 (pat)
1212 register const char *fmt;
1213 register int i, r = 0;
1215 if (GET_RTX_CLASS (GET_CODE (pat)) == '<')
1217 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1222 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1223 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1229 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1230 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1232 else if (fmt[i] == 'e')
1233 r |= swap_rtx_condition_1 (XEXP (pat, i));
1241 swap_rtx_condition (insn)
1244 rtx pat = PATTERN (insn);
1246 /* We're looking for a single set to cc0 or an HImode temporary. */
1248 if (GET_CODE (pat) == SET
1249 && GET_CODE (SET_DEST (pat)) == REG
1250 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1252 insn = next_flags_user (insn);
1253 if (insn == NULL_RTX)
1255 pat = PATTERN (insn);
1258 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're
1259 not doing anything with the cc value right now. We may be able to
1260 search for one though. */
1262 if (GET_CODE (pat) == SET
1263 && GET_CODE (SET_SRC (pat)) == UNSPEC
1264 && XINT (SET_SRC (pat), 1) == 9)
1266 rtx dest = SET_DEST (pat);
1268 /* Search forward looking for the first use of this value.
1269 Stop at block boundaries. */
1270 while (insn != current_block->end)
1272 insn = NEXT_INSN (insn);
1273 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1275 if (GET_CODE (insn) == CALL_INSN)
1279 /* So we've found the insn using this value. If it is anything
1280 other than sahf, aka unspec 10, or the value does not die
1281 (meaning we'd have to search further), then we must give up. */
1282 pat = PATTERN (insn);
1283 if (GET_CODE (pat) != SET
1284 || GET_CODE (SET_SRC (pat)) != UNSPEC
1285 || XINT (SET_SRC (pat), 1) != 10
1286 || ! dead_or_set_p (insn, dest))
1289 /* Now we are prepared to handle this as a normal cc0 setter. */
1290 insn = next_flags_user (insn);
1291 if (insn == NULL_RTX)
1293 pat = PATTERN (insn);
1296 if (swap_rtx_condition_1 (pat))
1299 INSN_CODE (insn) = -1;
1300 if (recog_memoized (insn) == -1)
1302 /* In case the flags don't die here, recurse to try fix
1303 following user too. */
1304 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1306 insn = next_flags_user (insn);
1307 if (!insn || !swap_rtx_condition (insn))
1312 swap_rtx_condition_1 (pat);
1320 /* Handle a comparison. Special care needs to be taken to avoid
1321 causing comparisons that a 387 cannot do correctly, such as EQ.
1323 Also, a pop insn may need to be emitted. The 387 does have an
1324 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1325 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1329 compare_for_stack_reg (insn, regstack, pat_src)
1335 rtx src1_note, src2_note;
1338 src1 = get_true_reg (&XEXP (pat_src, 0));
1339 src2 = get_true_reg (&XEXP (pat_src, 1));
1340 flags_user = next_flags_user (insn);
1342 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1343 registers that die in this insn - move those to stack top first. */
1344 if ((! STACK_REG_P (*src1)
1345 || (STACK_REG_P (*src2)
1346 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1347 && swap_rtx_condition (insn))
1350 temp = XEXP (pat_src, 0);
1351 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1352 XEXP (pat_src, 1) = temp;
1354 src1 = get_true_reg (&XEXP (pat_src, 0));
1355 src2 = get_true_reg (&XEXP (pat_src, 1));
1357 INSN_CODE (insn) = -1;
1360 /* We will fix any death note later. */
1362 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1364 if (STACK_REG_P (*src2))
1365 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1367 src2_note = NULL_RTX;
1369 emit_swap_insn (insn, regstack, *src1);
1371 replace_reg (src1, FIRST_STACK_REG);
1373 if (STACK_REG_P (*src2))
1374 replace_reg (src2, get_hard_regnum (regstack, *src2));
1378 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1379 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1382 /* If the second operand dies, handle that. But if the operands are
1383 the same stack register, don't bother, because only one death is
1384 needed, and it was just handled. */
1387 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1388 && REGNO (*src1) == REGNO (*src2)))
1390 /* As a special case, two regs may die in this insn if src2 is
1391 next to top of stack and the top of stack also dies. Since
1392 we have already popped src1, "next to top of stack" is really
1393 at top (FIRST_STACK_REG) now. */
1395 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1398 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1399 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1403 /* The 386 can only represent death of the first operand in
1404 the case handled above. In all other cases, emit a separate
1405 pop and remove the death note from here. */
1407 /* link_cc0_insns (insn); */
1409 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1411 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1417 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1418 is the current register layout. */
1421 subst_stack_regs_pat (insn, regstack, pat)
1428 switch (GET_CODE (pat))
1431 /* Deaths in USE insns can happen in non optimizing compilation.
1432 Handle them by popping the dying register. */
1433 src = get_true_reg (&XEXP (pat, 0));
1434 if (STACK_REG_P (*src)
1435 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1437 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1440 /* ??? Uninitialized USE should not happen. */
1441 else if (get_hard_regnum (regstack, *src) == -1)
1449 dest = get_true_reg (&XEXP (pat, 0));
1450 if (STACK_REG_P (*dest))
1452 note = find_reg_note (insn, REG_DEAD, *dest);
1454 if (pat != PATTERN (insn))
1456 /* The fix_truncdi_1 pattern wants to be able to allocate
1457 it's own scratch register. It does this by clobbering
1458 an fp reg so that it is assured of an empty reg-stack
1459 register. If the register is live, kill it now.
1460 Remove the DEAD/UNUSED note so we don't try to kill it
1464 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1467 note = find_reg_note (insn, REG_UNUSED, *dest);
1471 remove_note (insn, note);
1472 replace_reg (dest, LAST_STACK_REG);
1476 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1477 indicates an uninitialized value. Because reload removed
1478 all other clobbers, this must be due to a function
1479 returning without a value. Load up a NaN. */
1482 && get_hard_regnum (regstack, *dest) == -1)
1484 pat = gen_rtx_SET (VOIDmode,
1485 FP_MODE_REG (REGNO (*dest), SFmode),
1487 PATTERN (insn) = pat;
1488 move_for_stack_reg (insn, regstack, pat);
1490 if (! note && COMPLEX_MODE_P (GET_MODE (*dest))
1491 && get_hard_regnum (regstack, FP_MODE_REG (REGNO (*dest), DFmode)) == -1)
1493 pat = gen_rtx_SET (VOIDmode,
1494 FP_MODE_REG (REGNO (*dest) + 1, SFmode),
1496 PATTERN (insn) = pat;
1497 move_for_stack_reg (insn, regstack, pat);
1506 rtx *src1 = (rtx *) 0, *src2;
1507 rtx src1_note, src2_note;
1510 dest = get_true_reg (&SET_DEST (pat));
1511 src = get_true_reg (&SET_SRC (pat));
1512 pat_src = SET_SRC (pat);
1514 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1515 if (STACK_REG_P (*src)
1516 || (STACK_REG_P (*dest)
1517 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
1518 || GET_CODE (*src) == CONST_DOUBLE)))
1520 move_for_stack_reg (insn, regstack, pat);
1524 switch (GET_CODE (pat_src))
1527 compare_for_stack_reg (insn, regstack, pat_src);
1533 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest));
1536 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1537 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1540 replace_reg (dest, FIRST_STACK_REG);
1544 /* This is a `tstM2' case. */
1545 if (*dest != cc0_rtx)
1551 case FLOAT_TRUNCATE:
1555 /* These insns only operate on the top of the stack. DEST might
1556 be cc0_rtx if we're processing a tstM pattern. Also, it's
1557 possible that the tstM case results in a REG_DEAD note on the
1561 src1 = get_true_reg (&XEXP (pat_src, 0));
1563 emit_swap_insn (insn, regstack, *src1);
1565 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1567 if (STACK_REG_P (*dest))
1568 replace_reg (dest, FIRST_STACK_REG);
1572 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1574 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1577 replace_reg (src1, FIRST_STACK_REG);
1582 /* On i386, reversed forms of subM3 and divM3 exist for
1583 MODE_FLOAT, so the same code that works for addM3 and mulM3
1587 /* These insns can accept the top of stack as a destination
1588 from a stack reg or mem, or can use the top of stack as a
1589 source and some other stack register (possibly top of stack)
1590 as a destination. */
1592 src1 = get_true_reg (&XEXP (pat_src, 0));
1593 src2 = get_true_reg (&XEXP (pat_src, 1));
1595 /* We will fix any death note later. */
1597 if (STACK_REG_P (*src1))
1598 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1600 src1_note = NULL_RTX;
1601 if (STACK_REG_P (*src2))
1602 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1604 src2_note = NULL_RTX;
1606 /* If either operand is not a stack register, then the dest
1607 must be top of stack. */
1609 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1610 emit_swap_insn (insn, regstack, *dest);
1613 /* Both operands are REG. If neither operand is already
1614 at the top of stack, choose to make the one that is the dest
1615 the new top of stack. */
1617 int src1_hard_regnum, src2_hard_regnum;
1619 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1620 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1621 if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
1624 if (src1_hard_regnum != FIRST_STACK_REG
1625 && src2_hard_regnum != FIRST_STACK_REG)
1626 emit_swap_insn (insn, regstack, *dest);
1629 if (STACK_REG_P (*src1))
1630 replace_reg (src1, get_hard_regnum (regstack, *src1));
1631 if (STACK_REG_P (*src2))
1632 replace_reg (src2, get_hard_regnum (regstack, *src2));
1636 rtx src1_reg = XEXP (src1_note, 0);
1638 /* If the register that dies is at the top of stack, then
1639 the destination is somewhere else - merely substitute it.
1640 But if the reg that dies is not at top of stack, then
1641 move the top of stack to the dead reg, as though we had
1642 done the insn and then a store-with-pop. */
1644 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1646 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1647 replace_reg (dest, get_hard_regnum (regstack, *dest));
1651 int regno = get_hard_regnum (regstack, src1_reg);
1653 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1654 replace_reg (dest, regno);
1656 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1657 = regstack->reg[regstack->top];
1660 CLEAR_HARD_REG_BIT (regstack->reg_set,
1661 REGNO (XEXP (src1_note, 0)));
1662 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1667 rtx src2_reg = XEXP (src2_note, 0);
1668 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1670 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1671 replace_reg (dest, get_hard_regnum (regstack, *dest));
1675 int regno = get_hard_regnum (regstack, src2_reg);
1677 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1678 replace_reg (dest, regno);
1680 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1681 = regstack->reg[regstack->top];
1684 CLEAR_HARD_REG_BIT (regstack->reg_set,
1685 REGNO (XEXP (src2_note, 0)));
1686 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1691 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1692 replace_reg (dest, get_hard_regnum (regstack, *dest));
1695 /* Keep operand 1 maching with destination. */
1696 if (GET_RTX_CLASS (GET_CODE (pat_src)) == 'c'
1697 && REG_P (*src1) && REG_P (*src2)
1698 && REGNO (*src1) != REGNO (*dest))
1700 int tmp = REGNO (*src1);
1701 replace_reg (src1, REGNO (*src2));
1702 replace_reg (src2, tmp);
1707 switch (XINT (pat_src, 1))
1711 /* These insns only operate on the top of the stack. */
1713 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1715 emit_swap_insn (insn, regstack, *src1);
1717 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1719 if (STACK_REG_P (*dest))
1720 replace_reg (dest, FIRST_STACK_REG);
1724 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1726 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1729 replace_reg (src1, FIRST_STACK_REG);
1733 /* (unspec [(unspec [(compare ..)] 9)] 10)
1734 Unspec 9 is fnstsw; unspec 10 is sahf. The combination
1735 matches the PPRO fcomi instruction. */
1737 pat_src = XVECEXP (pat_src, 0, 0);
1738 if (GET_CODE (pat_src) != UNSPEC
1739 || XINT (pat_src, 1) != 9)
1744 /* (unspec [(compare ..)] 9) */
1745 /* Combined fcomp+fnstsw generated for doing well with
1746 CSE. When optimizing this would have been broken
1749 pat_src = XVECEXP (pat_src, 0, 0);
1750 if (GET_CODE (pat_src) != COMPARE)
1753 compare_for_stack_reg (insn, regstack, pat_src);
1762 /* This insn requires the top of stack to be the destination. */
1764 src1 = get_true_reg (&XEXP (pat_src, 1));
1765 src2 = get_true_reg (&XEXP (pat_src, 2));
1767 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1768 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1770 /* If the comparison operator is an FP comparison operator,
1771 it is handled correctly by compare_for_stack_reg () who
1772 will move the destination to the top of stack. But if the
1773 comparison operator is not an FP comparison operator, we
1774 have to handle it here. */
1775 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1776 && REGNO (*dest) != regstack->reg[regstack->top])
1778 /* In case one of operands is the top of stack and the operands
1779 dies, it is safe to make it the destination operand by reversing
1780 the direction of cmove and avoid fxch. */
1781 if ((REGNO (*src1) == regstack->reg[regstack->top]
1783 || (REGNO (*src2) == regstack->reg[regstack->top]
1786 int idx1 = (get_hard_regnum (regstack, *src1)
1788 int idx2 = (get_hard_regnum (regstack, *src2)
1791 /* Make reg-stack believe that the operands are already
1792 swapped on the stack */
1793 regstack->reg[regstack->top - idx1] = REGNO (*src2);
1794 regstack->reg[regstack->top - idx2] = REGNO (*src1);
1796 /* Reverse condition to compensate the operand swap.
1797 i386 do have comparison always reversible. */
1798 PUT_CODE (XEXP (pat_src, 0),
1799 reversed_comparison_code (XEXP (pat_src, 0), insn));
1802 emit_swap_insn (insn, regstack, *dest);
1810 src_note[1] = src1_note;
1811 src_note[2] = src2_note;
1813 if (STACK_REG_P (*src1))
1814 replace_reg (src1, get_hard_regnum (regstack, *src1));
1815 if (STACK_REG_P (*src2))
1816 replace_reg (src2, get_hard_regnum (regstack, *src2));
1818 for (i = 1; i <= 2; i++)
1821 int regno = REGNO (XEXP (src_note[i], 0));
1823 /* If the register that dies is not at the top of
1824 stack, then move the top of stack to the dead reg */
1825 if (regno != regstack->reg[regstack->top])
1827 remove_regno_note (insn, REG_DEAD, regno);
1828 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1832 /* Top of stack never dies, as it is the
1838 /* Make dest the top of stack. Add dest to regstack if
1840 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1841 regstack->reg[++regstack->top] = REGNO (*dest);
1842 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1843 replace_reg (dest, FIRST_STACK_REG);
1857 /* Substitute hard regnums for any stack regs in INSN, which has
1858 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1859 before the insn, and is updated with changes made here.
1861 There are several requirements and assumptions about the use of
1862 stack-like regs in asm statements. These rules are enforced by
1863 record_asm_stack_regs; see comments there for details. Any
1864 asm_operands left in the RTL at this point may be assume to meet the
1865 requirements, since record_asm_stack_regs removes any problem asm. */
1868 subst_asm_stack_regs (insn, regstack)
1872 rtx body = PATTERN (insn);
1875 rtx *note_reg; /* Array of note contents */
1876 rtx **note_loc; /* Address of REG field of each note */
1877 enum reg_note *note_kind; /* The type of each note */
1879 rtx *clobber_reg = 0;
1880 rtx **clobber_loc = 0;
1882 struct stack_def temp_stack;
1887 int n_inputs, n_outputs;
1889 if (! check_asm_stack_operands (insn))
1892 /* Find out what the constraints required. If no constraint
1893 alternative matches, that is a compiler bug: we should have caught
1894 such an insn in check_asm_stack_operands. */
1895 extract_insn (insn);
1896 constrain_operands (1);
1897 alt = which_alternative;
1899 preprocess_constraints ();
1901 n_inputs = get_asm_operand_n_inputs (body);
1902 n_outputs = recog_data.n_operands - n_inputs;
1907 /* Strip SUBREGs here to make the following code simpler. */
1908 for (i = 0; i < recog_data.n_operands; i++)
1909 if (GET_CODE (recog_data.operand[i]) == SUBREG
1910 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
1912 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
1913 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
1916 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
1918 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
1921 note_reg = (rtx *) alloca (i * sizeof (rtx));
1922 note_loc = (rtx **) alloca (i * sizeof (rtx *));
1923 note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note));
1926 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1928 rtx reg = XEXP (note, 0);
1929 rtx *loc = & XEXP (note, 0);
1931 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1933 loc = & SUBREG_REG (reg);
1934 reg = SUBREG_REG (reg);
1937 if (STACK_REG_P (reg)
1938 && (REG_NOTE_KIND (note) == REG_DEAD
1939 || REG_NOTE_KIND (note) == REG_UNUSED))
1941 note_reg[n_notes] = reg;
1942 note_loc[n_notes] = loc;
1943 note_kind[n_notes] = REG_NOTE_KIND (note);
1948 /* Set up CLOBBER_REG and CLOBBER_LOC. */
1952 if (GET_CODE (body) == PARALLEL)
1954 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
1955 clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx *));
1957 for (i = 0; i < XVECLEN (body, 0); i++)
1958 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
1960 rtx clobber = XVECEXP (body, 0, i);
1961 rtx reg = XEXP (clobber, 0);
1962 rtx *loc = & XEXP (clobber, 0);
1964 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1966 loc = & SUBREG_REG (reg);
1967 reg = SUBREG_REG (reg);
1970 if (STACK_REG_P (reg))
1972 clobber_reg[n_clobbers] = reg;
1973 clobber_loc[n_clobbers] = loc;
1979 temp_stack = *regstack;
1981 /* Put the input regs into the desired place in TEMP_STACK. */
1983 for (i = n_outputs; i < n_outputs + n_inputs; i++)
1984 if (STACK_REG_P (recog_data.operand[i])
1985 && reg_class_subset_p (recog_op_alt[i][alt].class,
1987 && recog_op_alt[i][alt].class != FLOAT_REGS)
1989 /* If an operand needs to be in a particular reg in
1990 FLOAT_REGS, the constraint was either 't' or 'u'. Since
1991 these constraints are for single register classes, and
1992 reload guaranteed that operand[i] is already in that class,
1993 we can just use REGNO (recog_data.operand[i]) to know which
1994 actual reg this operand needs to be in. */
1996 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2001 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2003 /* recog_data.operand[i] is not in the right place. Find
2004 it and swap it with whatever is already in I's place.
2005 K is where recog_data.operand[i] is now. J is where it
2009 k = temp_stack.top - (regno - FIRST_STACK_REG);
2011 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2013 temp = temp_stack.reg[k];
2014 temp_stack.reg[k] = temp_stack.reg[j];
2015 temp_stack.reg[j] = temp;
2019 /* Emit insns before INSN to make sure the reg-stack is in the right
2022 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2024 /* Make the needed input register substitutions. Do death notes and
2025 clobbers too, because these are for inputs, not outputs. */
2027 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2028 if (STACK_REG_P (recog_data.operand[i]))
2030 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2035 replace_reg (recog_data.operand_loc[i], regnum);
2038 for (i = 0; i < n_notes; i++)
2039 if (note_kind[i] == REG_DEAD)
2041 int regnum = get_hard_regnum (regstack, note_reg[i]);
2046 replace_reg (note_loc[i], regnum);
2049 for (i = 0; i < n_clobbers; i++)
2051 /* It's OK for a CLOBBER to reference a reg that is not live.
2052 Don't try to replace it in that case. */
2053 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2057 /* Sigh - clobbers always have QImode. But replace_reg knows
2058 that these regs can't be MODE_INT and will abort. Just put
2059 the right reg there without calling replace_reg. */
2061 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2065 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2067 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2068 if (STACK_REG_P (recog_data.operand[i]))
2070 /* An input reg is implicitly popped if it is tied to an
2071 output, or if there is a CLOBBER for it. */
2074 for (j = 0; j < n_clobbers; j++)
2075 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2078 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2080 /* recog_data.operand[i] might not be at the top of stack.
2081 But that's OK, because all we need to do is pop the
2082 right number of regs off of the top of the reg-stack.
2083 record_asm_stack_regs guaranteed that all implicitly
2084 popped regs were grouped at the top of the reg-stack. */
2086 CLEAR_HARD_REG_BIT (regstack->reg_set,
2087 regstack->reg[regstack->top]);
2092 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2093 Note that there isn't any need to substitute register numbers.
2094 ??? Explain why this is true. */
2096 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2098 /* See if there is an output for this hard reg. */
2101 for (j = 0; j < n_outputs; j++)
2102 if (STACK_REG_P (recog_data.operand[j])
2103 && REGNO (recog_data.operand[j]) == (unsigned) i)
2105 regstack->reg[++regstack->top] = i;
2106 SET_HARD_REG_BIT (regstack->reg_set, i);
2111 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2112 input that the asm didn't implicitly pop. If the asm didn't
2113 implicitly pop an input reg, that reg will still be live.
2115 Note that we can't use find_regno_note here: the register numbers
2116 in the death notes have already been substituted. */
2118 for (i = 0; i < n_outputs; i++)
2119 if (STACK_REG_P (recog_data.operand[i]))
2123 for (j = 0; j < n_notes; j++)
2124 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2125 && note_kind[j] == REG_UNUSED)
2127 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2133 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2134 if (STACK_REG_P (recog_data.operand[i]))
2138 for (j = 0; j < n_notes; j++)
2139 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2140 && note_kind[j] == REG_DEAD
2141 && TEST_HARD_REG_BIT (regstack->reg_set,
2142 REGNO (recog_data.operand[i])))
2144 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2151 /* Substitute stack hard reg numbers for stack virtual registers in
2152 INSN. Non-stack register numbers are not changed. REGSTACK is the
2153 current stack content. Insns may be emitted as needed to arrange the
2154 stack for the 387 based on the contents of the insn. */
2157 subst_stack_regs (insn, regstack)
2161 register rtx *note_link, note;
2164 if (GET_CODE (insn) == CALL_INSN)
2166 int top = regstack->top;
2168 /* If there are any floating point parameters to be passed in
2169 registers for this call, make sure they are in the right
2174 straighten_stack (PREV_INSN (insn), regstack);
2176 /* Now mark the arguments as dead after the call. */
2178 while (regstack->top >= 0)
2180 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2186 /* Do the actual substitution if any stack regs are mentioned.
2187 Since we only record whether entire insn mentions stack regs, and
2188 subst_stack_regs_pat only works for patterns that contain stack regs,
2189 we must check each pattern in a parallel here. A call_value_pop could
2192 if (stack_regs_mentioned (insn))
2194 int n_operands = asm_noperands (PATTERN (insn));
2195 if (n_operands >= 0)
2197 /* This insn is an `asm' with operands. Decode the operands,
2198 decide how many are inputs, and do register substitution.
2199 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2201 subst_asm_stack_regs (insn, regstack);
2205 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2206 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2208 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2209 subst_stack_regs_pat (insn, regstack,
2210 XVECEXP (PATTERN (insn), 0, i));
2213 subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2216 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2217 REG_UNUSED will already have been dealt with, so just return. */
2219 if (GET_CODE (insn) == NOTE)
2222 /* If there is a REG_UNUSED note on a stack register on this insn,
2223 the indicated reg must be popped. The REG_UNUSED note is removed,
2224 since the form of the newly emitted pop insn references the reg,
2225 making it no longer `unset'. */
2227 note_link = ®_NOTES(insn);
2228 for (note = *note_link; note; note = XEXP (note, 1))
2229 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2231 *note_link = XEXP (note, 1);
2232 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2235 note_link = &XEXP (note, 1);
2238 /* Change the organization of the stack so that it fits a new basic
2239 block. Some registers might have to be popped, but there can never be
2240 a register live in the new block that is not now live.
2242 Insert any needed insns before or after INSN, as indicated by
2243 WHERE. OLD is the original stack layout, and NEW is the desired
2244 form. OLD is updated to reflect the code emitted, ie, it will be
2245 the same as NEW upon return.
2247 This function will not preserve block_end[]. But that information
2248 is no longer needed once this has executed. */
2251 change_stack (insn, old, new, where)
2255 enum emit_where where;
2260 /* We will be inserting new insns "backwards". If we are to insert
2261 after INSN, find the next insn, and insert before it. */
2263 if (where == EMIT_AFTER)
2265 if (current_block && current_block->end == insn)
2267 insn = NEXT_INSN (insn);
2270 /* Pop any registers that are not needed in the new block. */
2272 for (reg = old->top; reg >= 0; reg--)
2273 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2274 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2279 /* If the new block has never been processed, then it can inherit
2280 the old stack order. */
2282 new->top = old->top;
2283 memcpy (new->reg, old->reg, sizeof (new->reg));
2287 /* This block has been entered before, and we must match the
2288 previously selected stack order. */
2290 /* By now, the only difference should be the order of the stack,
2291 not their depth or liveliness. */
2293 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2296 if (old->top != new->top)
2299 /* If the stack is not empty (new->top != -1), loop here emitting
2300 swaps until the stack is correct.
2302 The worst case number of swaps emitted is N + 2, where N is the
2303 depth of the stack. In some cases, the reg at the top of
2304 stack may be correct, but swapped anyway in order to fix
2305 other regs. But since we never swap any other reg away from
2306 its correct slot, this algorithm will converge. */
2311 /* Swap the reg at top of stack into the position it is
2312 supposed to be in, until the correct top of stack appears. */
2314 while (old->reg[old->top] != new->reg[new->top])
2316 for (reg = new->top; reg >= 0; reg--)
2317 if (new->reg[reg] == old->reg[old->top])
2323 emit_swap_insn (insn, old,
2324 FP_MODE_REG (old->reg[reg], DFmode));
2327 /* See if any regs remain incorrect. If so, bring an
2328 incorrect reg to the top of stack, and let the while loop
2331 for (reg = new->top; reg >= 0; reg--)
2332 if (new->reg[reg] != old->reg[reg])
2334 emit_swap_insn (insn, old,
2335 FP_MODE_REG (old->reg[reg], DFmode));
2340 /* At this point there must be no differences. */
2342 for (reg = old->top; reg >= 0; reg--)
2343 if (old->reg[reg] != new->reg[reg])
2348 current_block->end = PREV_INSN (insn);
2351 /* Print stack configuration. */
2354 print_stack (file, s)
2362 fprintf (file, "uninitialized\n");
2363 else if (s->top == -1)
2364 fprintf (file, "empty\n");
2369 for (i = 0; i <= s->top; ++i)
2370 fprintf (file, "%d ", s->reg[i]);
2371 fputs ("]\n", file);
2375 /* This function was doing life analysis. We now let the regular live
2376 code do it's job, so we only need to check some extra invariants
2377 that reg-stack expects. Primary among these being that all registers
2378 are initialized before use.
2380 The function returns true when code was emitted to CFG edges and
2381 commit_edge_insertions needs to be called. */
2384 convert_regs_entry ()
2386 int inserted = 0, i;
2389 for (i = n_basic_blocks - 1; i >= 0; --i)
2391 basic_block block = BASIC_BLOCK (i);
2392 block_info bi = BLOCK_INFO (block);
2395 /* Set current register status at last instruction `uninitialized'. */
2396 bi->stack_in.top = -2;
2398 /* Copy live_at_end and live_at_start into temporaries. */
2399 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
2401 if (REGNO_REG_SET_P (block->global_live_at_end, reg))
2402 SET_HARD_REG_BIT (bi->out_reg_set, reg);
2403 if (REGNO_REG_SET_P (block->global_live_at_start, reg))
2404 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
2408 /* Load something into each stack register live at function entry.
2409 Such live registers can be caused by uninitialized variables or
2410 functions not returning values on all paths. In order to keep
2411 the push/pop code happy, and to not scrog the register stack, we
2412 must put something in these registers. Use a QNaN.
2414 Note that we are insertting converted code here. This code is
2415 never seen by the convert_regs pass. */
2417 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2419 basic_block block = e->dest;
2420 block_info bi = BLOCK_INFO (block);
2423 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2424 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2428 bi->stack_in.reg[++top] = reg;
2430 init = gen_rtx_SET (VOIDmode,
2431 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2433 insert_insn_on_edge (init, e);
2437 bi->stack_in.top = top;
2443 /* Construct the desired stack for function exit. This will either
2444 be `empty', or the function return value at top-of-stack. */
2447 convert_regs_exit ()
2449 int value_reg_low, value_reg_high;
2453 retvalue = stack_result (current_function_decl);
2454 value_reg_low = value_reg_high = -1;
2457 value_reg_low = REGNO (retvalue);
2458 value_reg_high = value_reg_low
2459 + HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1;
2462 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2463 if (value_reg_low == -1)
2464 output_stack->top = -1;
2469 output_stack->top = value_reg_high - value_reg_low;
2470 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2472 output_stack->reg[reg - value_reg_low] = reg;
2473 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2478 /* Adjust the stack of this block on exit to match the stack of the
2479 target block, or copy stack info into the stack of the successor
2480 of the successor hasn't been processed yet. */
2482 compensate_edge (e, file)
2486 basic_block block = e->src, target = e->dest;
2487 block_info bi = BLOCK_INFO (block);
2488 struct stack_def regstack, tmpstack;
2489 stack target_stack = &BLOCK_INFO (target)->stack_in;
2492 current_block = block;
2493 regstack = bi->stack_out;
2495 fprintf (file, "Edge %d->%d: ", block->index, target->index);
2497 if (target_stack->top == -2)
2499 /* The target block hasn't had a stack order selected.
2500 We need merely ensure that no pops are needed. */
2501 for (reg = regstack.top; reg >= 0; --reg)
2502 if (!TEST_HARD_REG_BIT (target_stack->reg_set, regstack.reg[reg]))
2508 fprintf (file, "new block; copying stack position\n");
2510 /* change_stack kills values in regstack. */
2511 tmpstack = regstack;
2513 change_stack (block->end, &tmpstack, target_stack, EMIT_AFTER);
2518 fprintf (file, "new block; pops needed\n");
2522 if (target_stack->top == regstack.top)
2524 for (reg = target_stack->top; reg >= 0; --reg)
2525 if (target_stack->reg[reg] != regstack.reg[reg])
2531 fprintf (file, "no changes needed\n");
2538 fprintf (file, "correcting stack to ");
2539 print_stack (file, target_stack);
2543 /* Care for non-call EH edges specially. The normal return path have
2544 values in registers. These will be popped en masse by the unwind
2546 if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH)
2547 target_stack->top = -1;
2549 /* Other calls may appear to have values live in st(0), but the
2550 abnormal return path will not have actually loaded the values. */
2551 else if (e->flags & EDGE_ABNORMAL_CALL)
2553 /* Assert that the lifetimes are as we expect -- one value
2554 live at st(0) on the end of the source block, and no
2555 values live at the beginning of the destination block. */
2558 CLEAR_HARD_REG_SET (tmp);
2559 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1);
2563 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG);
2564 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2);
2568 target_stack->top = -1;
2571 /* It is better to output directly to the end of the block
2572 instead of to the edge, because emit_swap can do minimal
2573 insn scheduling. We can do this when there is only one
2574 edge out, and it is not abnormal. */
2575 else if (block->succ->succ_next == NULL && !(e->flags & EDGE_ABNORMAL))
2577 /* change_stack kills values in regstack. */
2578 tmpstack = regstack;
2580 change_stack (block->end, &tmpstack, target_stack,
2581 (GET_CODE (block->end) == JUMP_INSN
2582 ? EMIT_BEFORE : EMIT_AFTER));
2588 /* We don't support abnormal edges. Global takes care to
2589 avoid any live register across them, so we should never
2590 have to insert instructions on such edges. */
2591 if (e->flags & EDGE_ABNORMAL)
2594 current_block = NULL;
2597 /* ??? change_stack needs some point to emit insns after.
2598 Also needed to keep gen_sequence from returning a
2599 pattern as opposed to a sequence, which would lose
2601 after = emit_note (NULL, NOTE_INSN_DELETED);
2603 tmpstack = regstack;
2604 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE);
2606 seq = gen_sequence ();
2609 insert_insn_on_edge (seq, e);
2615 /* Convert stack register references in one block. */
2618 convert_regs_1 (file, block)
2622 struct stack_def regstack;
2623 block_info bi = BLOCK_INFO (block);
2626 edge e, beste = NULL;
2630 /* Find the edge we will copy stack from. It should be the most frequent
2631 one as it will get cheapest after compensation code is generated,
2632 if multiple such exists, take one with largest count, preffer critical
2633 one (as splitting critical edges is more expensive), or one with lowest
2634 index, to avoid random changes with different orders of the edges. */
2635 for (e = block->pred; e ; e = e->pred_next)
2637 if (e->flags & EDGE_DFS_BACK)
2641 else if (EDGE_FREQUENCY (beste) < EDGE_FREQUENCY (e))
2643 else if (EDGE_FREQUENCY (beste) > EDGE_FREQUENCY (e))
2645 else if (beste->count < e->count)
2647 else if (beste->count > e->count)
2649 else if ((EDGE_CRITICAL_P (e) != 0)
2650 != (EDGE_CRITICAL_P (beste) != 0))
2652 if (EDGE_CRITICAL_P (e))
2655 else if (e->src->index < beste->src->index)
2659 /* Entry block does have stack already initialized. */
2660 if (bi->stack_in.top == -2)
2661 inserted |= compensate_edge (beste, file);
2665 current_block = block;
2669 fprintf (file, "\nBasic block %d\nInput stack: ", block->index);
2670 print_stack (file, &bi->stack_in);
2673 /* Process all insns in this block. Keep track of NEXT so that we
2674 don't process insns emitted while substituting in INSN. */
2676 regstack = bi->stack_in;
2680 next = NEXT_INSN (insn);
2682 /* Ensure we have not missed a block boundary. */
2685 if (insn == block->end)
2688 /* Don't bother processing unless there is a stack reg
2689 mentioned or if it's a CALL_INSN. */
2690 if (stack_regs_mentioned (insn)
2691 || GET_CODE (insn) == CALL_INSN)
2695 fprintf (file, " insn %d input stack: ",
2697 print_stack (file, ®stack);
2699 subst_stack_regs (insn, ®stack);
2706 fprintf (file, "Expected live registers [");
2707 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2708 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2709 fprintf (file, " %d", reg);
2710 fprintf (file, " ]\nOutput stack: ");
2711 print_stack (file, ®stack);
2715 if (GET_CODE (insn) == JUMP_INSN)
2716 insn = PREV_INSN (insn);
2718 /* If the function is declared to return a value, but it returns one
2719 in only some cases, some registers might come live here. Emit
2720 necessary moves for them. */
2722 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2724 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2725 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2731 fprintf (file, "Emitting insn initializing reg %d\n",
2735 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode),
2737 insn = emit_insn_after (set, insn);
2738 subst_stack_regs (insn, ®stack);
2742 /* Something failed if the stack lives don't match. */
2743 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2746 bi->stack_out = regstack;
2748 /* Compensate the back edges, as those wasn't visited yet. */
2749 for (e = block->succ; e ; e = e->succ_next)
2751 if (e->flags & EDGE_DFS_BACK
2752 || (e->dest == EXIT_BLOCK_PTR))
2754 if (!BLOCK_INFO (e->dest)->done
2755 && e->dest != block)
2757 inserted |= compensate_edge (e, file);
2760 for (e = block->pred; e ; e = e->pred_next)
2762 if (e != beste && !(e->flags & EDGE_DFS_BACK)
2763 && e->src != ENTRY_BLOCK_PTR)
2765 if (!BLOCK_INFO (e->src)->done)
2767 inserted |= compensate_edge (e, file);
2774 /* Convert registers in all blocks reachable from BLOCK. */
2777 convert_regs_2 (file, block)
2781 basic_block *stack, *sp;
2784 stack = (basic_block *) xmalloc (sizeof (*stack) * n_basic_blocks);
2795 inserted |= convert_regs_1 (file, block);
2796 BLOCK_INFO (block)->done = 1;
2798 for (e = block->succ; e ; e = e->succ_next)
2799 if (! (e->flags & EDGE_DFS_BACK))
2801 BLOCK_INFO (e->dest)->predecesors--;
2802 if (!BLOCK_INFO (e->dest)->predecesors)
2806 while (sp != stack);
2811 /* Traverse all basic blocks in a function, converting the register
2812 references in each insn from the "flat" register file that gcc uses,
2813 to the stack-like registers the 387 uses. */
2822 /* Initialize uninitialized registers on function entry. */
2823 inserted = convert_regs_entry ();
2825 /* Construct the desired stack for function exit. */
2826 convert_regs_exit ();
2827 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
2829 /* ??? Future: process inner loops first, and give them arbitrary
2830 initial stacks which emit_swap_insn can modify. This ought to
2831 prevent double fxch that aften appears at the head of a loop. */
2833 /* Process all blocks reachable from all entry points. */
2834 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2835 inserted |= convert_regs_2 (file, e->dest);
2837 /* ??? Process all unreachable blocks. Though there's no excuse
2838 for keeping these even when not optimizing. */
2839 for (i = 0; i < n_basic_blocks; ++i)
2841 basic_block b = BASIC_BLOCK (i);
2842 block_info bi = BLOCK_INFO (b);
2848 /* Create an arbitrary input stack. */
2849 bi->stack_in.top = -1;
2850 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2851 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2852 bi->stack_in.reg[++bi->stack_in.top] = reg;
2854 inserted |= convert_regs_2 (file, b);
2859 commit_edge_insertions ();
2866 #endif /* STACK_REGS */