1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
25 * The form of the input:
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
45 * The form of the output:
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
105 asm ("foo" : "=t" (a) : "f" (b));
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, ie, the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
116 The asm above would be written as
118 asm ("foo" : "=&t" (a) : "f" (b));
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
156 #include "coretypes.h"
161 #include "function.h"
162 #include "insn-config.h"
164 #include "hard-reg-set.h"
169 #include "basic-block.h"
174 /* We use this array to cache info about insns, because otherwise we
175 spend too much time in stack_regs_mentioned_p.
177 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
178 the insn uses stack registers, two indicates the insn does not use
180 static GTY(()) varray_type stack_regs_mentioned_data;
184 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
186 /* This is the basic stack record. TOP is an index into REG[] such
187 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
189 If TOP is -2, REG[] is not yet initialized. Stack initialization
190 consists of placing each live reg in array `reg' and setting `top'
193 REG_SET indicates which registers are live. */
195 typedef struct stack_def
197 int top; /* index to top stack element */
198 HARD_REG_SET reg_set; /* set of live registers */
199 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
202 /* This is used to carry information about basic blocks. It is
203 attached to the AUX field of the standard CFG block. */
205 typedef struct block_info_def
207 struct stack_def stack_in; /* Input stack configuration. */
208 struct stack_def stack_out; /* Output stack configuration. */
209 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
210 int done; /* True if block already converted. */
211 int predecessors; /* Number of predecessors that needs
215 #define BLOCK_INFO(B) ((block_info) (B)->aux)
217 /* Passed to change_stack to indicate where to emit insns. */
224 /* The block we're currently working on. */
225 static basic_block current_block;
227 /* This is the register file for all register after conversion. */
229 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
231 #define FP_MODE_REG(regno,mode) \
232 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
234 /* Used to initialize uninitialized registers. */
237 /* Forward declarations */
239 static int stack_regs_mentioned_p (rtx pat);
240 static void straighten_stack (rtx, stack);
241 static void pop_stack (stack, int);
242 static rtx *get_true_reg (rtx *);
244 static int check_asm_stack_operands (rtx);
245 static int get_asm_operand_n_inputs (rtx);
246 static rtx stack_result (tree);
247 static void replace_reg (rtx *, int);
248 static void remove_regno_note (rtx, enum reg_note, unsigned int);
249 static int get_hard_regnum (stack, rtx);
250 static rtx emit_pop_insn (rtx, stack, rtx, enum emit_where);
251 static void emit_swap_insn (rtx, stack, rtx);
252 static void move_for_stack_reg (rtx, stack, rtx);
253 static int swap_rtx_condition_1 (rtx);
254 static int swap_rtx_condition (rtx);
255 static void compare_for_stack_reg (rtx, stack, rtx);
256 static void subst_stack_regs_pat (rtx, stack, rtx);
257 static void subst_asm_stack_regs (rtx, stack);
258 static void subst_stack_regs (rtx, stack);
259 static void change_stack (rtx, stack, stack, enum emit_where);
260 static int convert_regs_entry (void);
261 static void convert_regs_exit (void);
262 static int convert_regs_1 (FILE *, basic_block);
263 static int convert_regs_2 (FILE *, basic_block);
264 static int convert_regs (FILE *);
265 static void print_stack (FILE *, stack);
266 static rtx next_flags_user (rtx);
267 static void record_label_references (rtx, rtx);
268 static bool compensate_edge (edge, FILE *);
270 /* Return nonzero if any stack register is mentioned somewhere within PAT. */
273 stack_regs_mentioned_p (rtx pat)
278 if (STACK_REG_P (pat))
281 fmt = GET_RTX_FORMAT (GET_CODE (pat));
282 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
288 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
289 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
292 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
299 /* Return nonzero if INSN mentions stacked registers, else return zero. */
302 stack_regs_mentioned (rtx insn)
304 unsigned int uid, max;
307 if (! INSN_P (insn) || !stack_regs_mentioned_data)
310 uid = INSN_UID (insn);
311 max = VARRAY_SIZE (stack_regs_mentioned_data);
314 /* Allocate some extra size to avoid too many reallocs, but
315 do not grow too quickly. */
316 max = uid + uid / 20;
317 VARRAY_GROW (stack_regs_mentioned_data, max);
320 test = VARRAY_CHAR (stack_regs_mentioned_data, uid);
323 /* This insn has yet to be examined. Do so now. */
324 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
325 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test;
331 static rtx ix86_flags_rtx;
334 next_flags_user (rtx insn)
336 /* Search forward looking for the first use of this value.
337 Stop at block boundaries. */
339 while (insn != current_block->end)
341 insn = NEXT_INSN (insn);
343 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
346 if (GET_CODE (insn) == CALL_INSN)
352 /* Reorganize the stack into ascending numbers,
356 straighten_stack (rtx insn, stack regstack)
358 struct stack_def temp_stack;
361 /* If there is only a single register on the stack, then the stack is
362 already in increasing order and no reorganization is needed.
364 Similarly if the stack is empty. */
365 if (regstack->top <= 0)
368 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
370 for (top = temp_stack.top = regstack->top; top >= 0; top--)
371 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
373 change_stack (insn, regstack, &temp_stack, EMIT_AFTER);
376 /* Pop a register from the stack. */
379 pop_stack (stack regstack, int regno)
381 int top = regstack->top;
383 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
385 /* If regno was not at the top of stack then adjust stack. */
386 if (regstack->reg [top] != regno)
389 for (i = regstack->top; i >= 0; i--)
390 if (regstack->reg [i] == regno)
393 for (j = i; j < top; j++)
394 regstack->reg [j] = regstack->reg [j + 1];
400 /* Convert register usage from "flat" register file usage to a "stack
401 register file. FIRST is the first insn in the function, FILE is the
404 Construct a CFG and run life analysis. Then convert each insn one
405 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
406 code duplication created when the converter inserts pop insns on
410 reg_to_stack (rtx first, FILE *file)
416 /* Clean up previous run. */
417 stack_regs_mentioned_data = 0;
419 /* See if there is something to do. Flow analysis is quite
420 expensive so we might save some compilation time. */
421 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
422 if (regs_ever_live[i])
424 if (i > LAST_STACK_REG)
427 /* Ok, floating point instructions exist. If not optimizing,
428 build the CFG and run life analysis.
429 Also need to rebuild life when superblock scheduling is done
430 as it don't update liveness yet. */
432 || (flag_sched2_use_superblocks
433 && flag_schedule_insns_after_reload))
435 count_or_remove_death_notes (NULL, 1);
436 life_analysis (first, file, PROP_DEATH_NOTES);
438 mark_dfs_back_edges ();
440 /* Set up block info for each basic block. */
441 alloc_aux_for_blocks (sizeof (struct block_info_def));
442 FOR_EACH_BB_REVERSE (bb)
445 for (e = bb->pred; e; e = e->pred_next)
446 if (!(e->flags & EDGE_DFS_BACK)
447 && e->src != ENTRY_BLOCK_PTR)
448 BLOCK_INFO (bb)->predecessors++;
451 /* Create the replacement registers up front. */
452 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
454 enum machine_mode mode;
455 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
457 mode = GET_MODE_WIDER_MODE (mode))
458 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
459 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
461 mode = GET_MODE_WIDER_MODE (mode))
462 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
465 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
467 /* A QNaN for initializing uninitialized variables.
469 ??? We can't load from constant memory in PIC mode, because
470 we're inserting these instructions before the prologue and
471 the PIC register hasn't been set up. In that case, fall back
472 on zero, which we can get from `ldz'. */
475 nan = CONST0_RTX (SFmode);
478 nan = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
479 nan = force_const_mem (SFmode, nan);
482 /* Allocate a cache for stack_regs_mentioned. */
483 max_uid = get_max_uid ();
484 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
485 "stack_regs_mentioned cache");
489 free_aux_for_blocks ();
493 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
494 label's chain of references, and note which insn contains each
498 record_label_references (rtx insn, rtx pat)
500 enum rtx_code code = GET_CODE (pat);
504 if (code == LABEL_REF)
506 rtx label = XEXP (pat, 0);
509 if (GET_CODE (label) != CODE_LABEL)
512 /* If this is an undefined label, LABEL_REFS (label) contains
514 if (INSN_UID (label) == 0)
517 /* Don't make a duplicate in the code_label's chain. */
519 for (ref = LABEL_REFS (label);
521 ref = LABEL_NEXTREF (ref))
522 if (CONTAINING_INSN (ref) == insn)
525 CONTAINING_INSN (pat) = insn;
526 LABEL_NEXTREF (pat) = LABEL_REFS (label);
527 LABEL_REFS (label) = pat;
532 fmt = GET_RTX_FORMAT (code);
533 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
536 record_label_references (insn, XEXP (pat, i));
540 for (j = 0; j < XVECLEN (pat, i); j++)
541 record_label_references (insn, XVECEXP (pat, i, j));
546 /* Return a pointer to the REG expression within PAT. If PAT is not a
547 REG, possible enclosed by a conversion rtx, return the inner part of
548 PAT that stopped the search. */
551 get_true_reg (rtx *pat)
554 switch (GET_CODE (*pat))
557 /* Eliminate FP subregister accesses in favor of the
558 actual FP register in use. */
561 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
563 int regno_off = subreg_regno_offset (REGNO (subreg),
567 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
576 pat = & XEXP (*pat, 0);
580 /* Set if we find any malformed asms in a block. */
581 static bool any_malformed_asm;
583 /* There are many rules that an asm statement for stack-like regs must
584 follow. Those rules are explained at the top of this file: the rule
585 numbers below refer to that explanation. */
588 check_asm_stack_operands (rtx insn)
592 int malformed_asm = 0;
593 rtx body = PATTERN (insn);
595 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
596 char implicitly_dies[FIRST_PSEUDO_REGISTER];
599 rtx *clobber_reg = 0;
600 int n_inputs, n_outputs;
602 /* Find out what the constraints require. If no constraint
603 alternative matches, this asm is malformed. */
605 constrain_operands (1);
606 alt = which_alternative;
608 preprocess_constraints ();
610 n_inputs = get_asm_operand_n_inputs (body);
611 n_outputs = recog_data.n_operands - n_inputs;
616 /* Avoid further trouble with this insn. */
617 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
621 /* Strip SUBREGs here to make the following code simpler. */
622 for (i = 0; i < recog_data.n_operands; i++)
623 if (GET_CODE (recog_data.operand[i]) == SUBREG
624 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
625 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
627 /* Set up CLOBBER_REG. */
631 if (GET_CODE (body) == PARALLEL)
633 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
635 for (i = 0; i < XVECLEN (body, 0); i++)
636 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
638 rtx clobber = XVECEXP (body, 0, i);
639 rtx reg = XEXP (clobber, 0);
641 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
642 reg = SUBREG_REG (reg);
644 if (STACK_REG_P (reg))
646 clobber_reg[n_clobbers] = reg;
652 /* Enforce rule #4: Output operands must specifically indicate which
653 reg an output appears in after an asm. "=f" is not allowed: the
654 operand constraints must select a class with a single reg.
656 Also enforce rule #5: Output operands must start at the top of
657 the reg-stack: output operands may not "skip" a reg. */
659 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
660 for (i = 0; i < n_outputs; i++)
661 if (STACK_REG_P (recog_data.operand[i]))
663 if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1)
665 error_for_asm (insn, "output constraint %d must specify a single register", i);
672 for (j = 0; j < n_clobbers; j++)
673 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
675 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
676 i, reg_names [REGNO (clobber_reg[j])]);
681 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
686 /* Search for first non-popped reg. */
687 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
688 if (! reg_used_as_output[i])
691 /* If there are any other popped regs, that's an error. */
692 for (; i < LAST_STACK_REG + 1; i++)
693 if (reg_used_as_output[i])
696 if (i != LAST_STACK_REG + 1)
698 error_for_asm (insn, "output regs must be grouped at top of stack");
702 /* Enforce rule #2: All implicitly popped input regs must be closer
703 to the top of the reg-stack than any input that is not implicitly
706 memset (implicitly_dies, 0, sizeof (implicitly_dies));
707 for (i = n_outputs; i < n_outputs + n_inputs; i++)
708 if (STACK_REG_P (recog_data.operand[i]))
710 /* An input reg is implicitly popped if it is tied to an
711 output, or if there is a CLOBBER for it. */
714 for (j = 0; j < n_clobbers; j++)
715 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
718 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
719 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
722 /* Search for first non-popped reg. */
723 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
724 if (! implicitly_dies[i])
727 /* If there are any other popped regs, that's an error. */
728 for (; i < LAST_STACK_REG + 1; i++)
729 if (implicitly_dies[i])
732 if (i != LAST_STACK_REG + 1)
735 "implicitly popped regs must be grouped at top of stack");
739 /* Enforce rule #3: If any input operand uses the "f" constraint, all
740 output constraints must use the "&" earlyclobber.
742 ??? Detect this more deterministically by having constrain_asm_operands
743 record any earlyclobber. */
745 for (i = n_outputs; i < n_outputs + n_inputs; i++)
746 if (recog_op_alt[i][alt].matches == -1)
750 for (j = 0; j < n_outputs; j++)
751 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
754 "output operand %d must use `&' constraint", j);
761 /* Avoid further trouble with this insn. */
762 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
763 any_malformed_asm = true;
770 /* Calculate the number of inputs and outputs in BODY, an
771 asm_operands. N_OPERANDS is the total number of operands, and
772 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
776 get_asm_operand_n_inputs (rtx body)
778 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
779 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
781 else if (GET_CODE (body) == ASM_OPERANDS)
782 return ASM_OPERANDS_INPUT_LENGTH (body);
784 else if (GET_CODE (body) == PARALLEL
785 && GET_CODE (XVECEXP (body, 0, 0)) == SET)
786 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
788 else if (GET_CODE (body) == PARALLEL
789 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
790 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
795 /* If current function returns its result in an fp stack register,
796 return the REG. Otherwise, return 0. */
799 stack_result (tree decl)
803 /* If the value is supposed to be returned in memory, then clearly
804 it is not returned in a stack register. */
805 if (aggregate_value_p (DECL_RESULT (decl), decl))
808 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
811 #ifdef FUNCTION_OUTGOING_VALUE
813 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
815 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
819 return result != 0 && STACK_REG_P (result) ? result : 0;
824 * This section deals with stack register substitution, and forms the second
828 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
829 the desired hard REGNO. */
832 replace_reg (rtx *reg, int regno)
834 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
835 || ! STACK_REG_P (*reg))
838 switch (GET_MODE_CLASS (GET_MODE (*reg)))
842 case MODE_COMPLEX_FLOAT:;
845 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
848 /* Remove a note of type NOTE, which must be found, for register
849 number REGNO from INSN. Remove only one such note. */
852 remove_regno_note (rtx insn, enum reg_note note, unsigned int regno)
854 rtx *note_link, this;
856 note_link = ®_NOTES (insn);
857 for (this = *note_link; this; this = XEXP (this, 1))
858 if (REG_NOTE_KIND (this) == note
859 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
861 *note_link = XEXP (this, 1);
865 note_link = &XEXP (this, 1);
870 /* Find the hard register number of virtual register REG in REGSTACK.
871 The hard register number is relative to the top of the stack. -1 is
872 returned if the register is not found. */
875 get_hard_regnum (stack regstack, rtx reg)
879 if (! STACK_REG_P (reg))
882 for (i = regstack->top; i >= 0; i--)
883 if (regstack->reg[i] == REGNO (reg))
886 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
889 /* Emit an insn to pop virtual register REG before or after INSN.
890 REGSTACK is the stack state after INSN and is updated to reflect this
891 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
892 is represented as a SET whose destination is the register to be popped
893 and source is the top of stack. A death note for the top of stack
894 cases the movdf pattern to pop. */
897 emit_pop_insn (rtx insn, stack regstack, rtx reg, enum emit_where where)
899 rtx pop_insn, pop_rtx;
902 /* For complex types take care to pop both halves. These may survive in
903 CLOBBER and USE expressions. */
904 if (COMPLEX_MODE_P (GET_MODE (reg)))
906 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
907 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
910 if (get_hard_regnum (regstack, reg1) >= 0)
911 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
912 if (get_hard_regnum (regstack, reg2) >= 0)
913 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
919 hard_regno = get_hard_regnum (regstack, reg);
921 if (hard_regno < FIRST_STACK_REG)
924 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
925 FP_MODE_REG (FIRST_STACK_REG, DFmode));
927 if (where == EMIT_AFTER)
928 pop_insn = emit_insn_after (pop_rtx, insn);
930 pop_insn = emit_insn_before (pop_rtx, insn);
933 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
934 REG_NOTES (pop_insn));
936 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
937 = regstack->reg[regstack->top];
939 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
944 /* Emit an insn before or after INSN to swap virtual register REG with
945 the top of stack. REGSTACK is the stack state before the swap, and
946 is updated to reflect the swap. A swap insn is represented as a
947 PARALLEL of two patterns: each pattern moves one reg to the other.
949 If REG is already at the top of the stack, no insn is emitted. */
952 emit_swap_insn (rtx insn, stack regstack, rtx reg)
956 int tmp, other_reg; /* swap regno temps */
957 rtx i1; /* the stack-reg insn prior to INSN */
958 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
960 hard_regno = get_hard_regnum (regstack, reg);
962 if (hard_regno < FIRST_STACK_REG)
964 if (hard_regno == FIRST_STACK_REG)
967 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
969 tmp = regstack->reg[other_reg];
970 regstack->reg[other_reg] = regstack->reg[regstack->top];
971 regstack->reg[regstack->top] = tmp;
973 /* Find the previous insn involving stack regs, but don't pass a
976 if (current_block && insn != current_block->head)
978 rtx tmp = PREV_INSN (insn);
979 rtx limit = PREV_INSN (current_block->head);
982 if (GET_CODE (tmp) == CODE_LABEL
983 || GET_CODE (tmp) == CALL_INSN
984 || NOTE_INSN_BASIC_BLOCK_P (tmp)
985 || (GET_CODE (tmp) == INSN
986 && stack_regs_mentioned (tmp)))
991 tmp = PREV_INSN (tmp);
996 && (i1set = single_set (i1)) != NULL_RTX)
998 rtx i1src = *get_true_reg (&SET_SRC (i1set));
999 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
1001 /* If the previous register stack push was from the reg we are to
1002 swap with, omit the swap. */
1004 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG
1005 && GET_CODE (i1src) == REG
1006 && REGNO (i1src) == (unsigned) hard_regno - 1
1007 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1010 /* If the previous insn wrote to the reg we are to swap with,
1013 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == (unsigned) hard_regno
1014 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG
1015 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1019 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
1020 FP_MODE_REG (FIRST_STACK_REG, XFmode));
1023 emit_insn_after (swap_rtx, i1);
1024 else if (current_block)
1025 emit_insn_before (swap_rtx, current_block->head);
1027 emit_insn_before (swap_rtx, insn);
1030 /* Handle a move to or from a stack register in PAT, which is in INSN.
1031 REGSTACK is the current stack. */
1034 move_for_stack_reg (rtx insn, stack regstack, rtx pat)
1036 rtx *psrc = get_true_reg (&SET_SRC (pat));
1037 rtx *pdest = get_true_reg (&SET_DEST (pat));
1041 src = *psrc; dest = *pdest;
1043 if (STACK_REG_P (src) && STACK_REG_P (dest))
1045 /* Write from one stack reg to another. If SRC dies here, then
1046 just change the register mapping and delete the insn. */
1048 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1053 /* If this is a no-op move, there must not be a REG_DEAD note. */
1054 if (REGNO (src) == REGNO (dest))
1057 for (i = regstack->top; i >= 0; i--)
1058 if (regstack->reg[i] == REGNO (src))
1061 /* The source must be live, and the dest must be dead. */
1062 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1065 /* It is possible that the dest is unused after this insn.
1066 If so, just pop the src. */
1068 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1070 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
1076 regstack->reg[i] = REGNO (dest);
1078 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1079 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1086 /* The source reg does not die. */
1088 /* If this appears to be a no-op move, delete it, or else it
1089 will confuse the machine description output patterns. But if
1090 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1091 for REG_UNUSED will not work for deleted insns. */
1093 if (REGNO (src) == REGNO (dest))
1095 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1096 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1102 /* The destination ought to be dead. */
1103 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1106 replace_reg (psrc, get_hard_regnum (regstack, src));
1108 regstack->reg[++regstack->top] = REGNO (dest);
1109 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1110 replace_reg (pdest, FIRST_STACK_REG);
1112 else if (STACK_REG_P (src))
1114 /* Save from a stack reg to MEM, or possibly integer reg. Since
1115 only top of stack may be saved, emit an exchange first if
1118 emit_swap_insn (insn, regstack, src);
1120 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1123 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1125 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1127 else if ((GET_MODE (src) == XFmode)
1128 && regstack->top < REG_STACK_SIZE - 1)
1130 /* A 387 cannot write an XFmode value to a MEM without
1131 clobbering the source reg. The output code can handle
1132 this by reading back the value from the MEM.
1133 But it is more efficient to use a temp register if one is
1134 available. Push the source value here if the register
1135 stack is not full, and then write the value to memory via
1137 rtx push_rtx, push_insn;
1138 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1140 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1141 push_insn = emit_insn_before (push_rtx, insn);
1142 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1146 replace_reg (psrc, FIRST_STACK_REG);
1148 else if (STACK_REG_P (dest))
1150 /* Load from MEM, or possibly integer REG or constant, into the
1151 stack regs. The actual target is always the top of the
1152 stack. The stack mapping is changed to reflect that DEST is
1153 now at top of stack. */
1155 /* The destination ought to be dead. */
1156 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1159 if (regstack->top >= REG_STACK_SIZE)
1162 regstack->reg[++regstack->top] = REGNO (dest);
1163 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1164 replace_reg (pdest, FIRST_STACK_REG);
1170 /* Swap the condition on a branch, if there is one. Return true if we
1171 found a condition to swap. False if the condition was not used as
1175 swap_rtx_condition_1 (rtx pat)
1180 if (GET_RTX_CLASS (GET_CODE (pat)) == '<')
1182 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1187 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1188 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1194 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1195 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1197 else if (fmt[i] == 'e')
1198 r |= swap_rtx_condition_1 (XEXP (pat, i));
1206 swap_rtx_condition (rtx insn)
1208 rtx pat = PATTERN (insn);
1210 /* We're looking for a single set to cc0 or an HImode temporary. */
1212 if (GET_CODE (pat) == SET
1213 && GET_CODE (SET_DEST (pat)) == REG
1214 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1216 insn = next_flags_user (insn);
1217 if (insn == NULL_RTX)
1219 pat = PATTERN (insn);
1222 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're
1223 not doing anything with the cc value right now. We may be able to
1224 search for one though. */
1226 if (GET_CODE (pat) == SET
1227 && GET_CODE (SET_SRC (pat)) == UNSPEC
1228 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
1230 rtx dest = SET_DEST (pat);
1232 /* Search forward looking for the first use of this value.
1233 Stop at block boundaries. */
1234 while (insn != current_block->end)
1236 insn = NEXT_INSN (insn);
1237 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1239 if (GET_CODE (insn) == CALL_INSN)
1243 /* So we've found the insn using this value. If it is anything
1244 other than sahf, aka unspec 10, or the value does not die
1245 (meaning we'd have to search further), then we must give up. */
1246 pat = PATTERN (insn);
1247 if (GET_CODE (pat) != SET
1248 || GET_CODE (SET_SRC (pat)) != UNSPEC
1249 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
1250 || ! dead_or_set_p (insn, dest))
1253 /* Now we are prepared to handle this as a normal cc0 setter. */
1254 insn = next_flags_user (insn);
1255 if (insn == NULL_RTX)
1257 pat = PATTERN (insn);
1260 if (swap_rtx_condition_1 (pat))
1263 INSN_CODE (insn) = -1;
1264 if (recog_memoized (insn) == -1)
1266 /* In case the flags don't die here, recurse to try fix
1267 following user too. */
1268 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1270 insn = next_flags_user (insn);
1271 if (!insn || !swap_rtx_condition (insn))
1276 swap_rtx_condition_1 (pat);
1284 /* Handle a comparison. Special care needs to be taken to avoid
1285 causing comparisons that a 387 cannot do correctly, such as EQ.
1287 Also, a pop insn may need to be emitted. The 387 does have an
1288 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1289 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1293 compare_for_stack_reg (rtx insn, stack regstack, rtx pat_src)
1296 rtx src1_note, src2_note;
1299 src1 = get_true_reg (&XEXP (pat_src, 0));
1300 src2 = get_true_reg (&XEXP (pat_src, 1));
1301 flags_user = next_flags_user (insn);
1303 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1304 registers that die in this insn - move those to stack top first. */
1305 if ((! STACK_REG_P (*src1)
1306 || (STACK_REG_P (*src2)
1307 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1308 && swap_rtx_condition (insn))
1311 temp = XEXP (pat_src, 0);
1312 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1313 XEXP (pat_src, 1) = temp;
1315 src1 = get_true_reg (&XEXP (pat_src, 0));
1316 src2 = get_true_reg (&XEXP (pat_src, 1));
1318 INSN_CODE (insn) = -1;
1321 /* We will fix any death note later. */
1323 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1325 if (STACK_REG_P (*src2))
1326 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1328 src2_note = NULL_RTX;
1330 emit_swap_insn (insn, regstack, *src1);
1332 replace_reg (src1, FIRST_STACK_REG);
1334 if (STACK_REG_P (*src2))
1335 replace_reg (src2, get_hard_regnum (regstack, *src2));
1339 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1340 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1343 /* If the second operand dies, handle that. But if the operands are
1344 the same stack register, don't bother, because only one death is
1345 needed, and it was just handled. */
1348 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1349 && REGNO (*src1) == REGNO (*src2)))
1351 /* As a special case, two regs may die in this insn if src2 is
1352 next to top of stack and the top of stack also dies. Since
1353 we have already popped src1, "next to top of stack" is really
1354 at top (FIRST_STACK_REG) now. */
1356 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1359 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1360 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1364 /* The 386 can only represent death of the first operand in
1365 the case handled above. In all other cases, emit a separate
1366 pop and remove the death note from here. */
1368 /* link_cc0_insns (insn); */
1370 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1372 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1378 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1379 is the current register layout. */
1382 subst_stack_regs_pat (rtx insn, stack regstack, rtx pat)
1386 switch (GET_CODE (pat))
1389 /* Deaths in USE insns can happen in non optimizing compilation.
1390 Handle them by popping the dying register. */
1391 src = get_true_reg (&XEXP (pat, 0));
1392 if (STACK_REG_P (*src)
1393 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1395 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1398 /* ??? Uninitialized USE should not happen. */
1399 else if (get_hard_regnum (regstack, *src) == -1)
1407 dest = get_true_reg (&XEXP (pat, 0));
1408 if (STACK_REG_P (*dest))
1410 note = find_reg_note (insn, REG_DEAD, *dest);
1412 if (pat != PATTERN (insn))
1414 /* The fix_truncdi_1 pattern wants to be able to allocate
1415 it's own scratch register. It does this by clobbering
1416 an fp reg so that it is assured of an empty reg-stack
1417 register. If the register is live, kill it now.
1418 Remove the DEAD/UNUSED note so we don't try to kill it
1422 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1425 note = find_reg_note (insn, REG_UNUSED, *dest);
1429 remove_note (insn, note);
1430 replace_reg (dest, FIRST_STACK_REG + 1);
1434 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1435 indicates an uninitialized value. Because reload removed
1436 all other clobbers, this must be due to a function
1437 returning without a value. Load up a NaN. */
1440 && get_hard_regnum (regstack, *dest) == -1)
1442 pat = gen_rtx_SET (VOIDmode,
1443 FP_MODE_REG (REGNO (*dest), SFmode),
1445 PATTERN (insn) = pat;
1446 move_for_stack_reg (insn, regstack, pat);
1448 if (! note && COMPLEX_MODE_P (GET_MODE (*dest))
1449 && get_hard_regnum (regstack, FP_MODE_REG (REGNO (*dest), DFmode)) == -1)
1451 pat = gen_rtx_SET (VOIDmode,
1452 FP_MODE_REG (REGNO (*dest) + 1, SFmode),
1454 PATTERN (insn) = pat;
1455 move_for_stack_reg (insn, regstack, pat);
1464 rtx *src1 = (rtx *) 0, *src2;
1465 rtx src1_note, src2_note;
1468 dest = get_true_reg (&SET_DEST (pat));
1469 src = get_true_reg (&SET_SRC (pat));
1470 pat_src = SET_SRC (pat);
1472 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1473 if (STACK_REG_P (*src)
1474 || (STACK_REG_P (*dest)
1475 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
1476 || GET_CODE (*src) == CONST_DOUBLE)))
1478 move_for_stack_reg (insn, regstack, pat);
1482 switch (GET_CODE (pat_src))
1485 compare_for_stack_reg (insn, regstack, pat_src);
1491 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest));
1494 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1495 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1498 replace_reg (dest, FIRST_STACK_REG);
1502 /* This is a `tstM2' case. */
1503 if (*dest != cc0_rtx)
1509 case FLOAT_TRUNCATE:
1513 /* These insns only operate on the top of the stack. DEST might
1514 be cc0_rtx if we're processing a tstM pattern. Also, it's
1515 possible that the tstM case results in a REG_DEAD note on the
1519 src1 = get_true_reg (&XEXP (pat_src, 0));
1521 emit_swap_insn (insn, regstack, *src1);
1523 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1525 if (STACK_REG_P (*dest))
1526 replace_reg (dest, FIRST_STACK_REG);
1530 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1532 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1535 replace_reg (src1, FIRST_STACK_REG);
1540 /* On i386, reversed forms of subM3 and divM3 exist for
1541 MODE_FLOAT, so the same code that works for addM3 and mulM3
1545 /* These insns can accept the top of stack as a destination
1546 from a stack reg or mem, or can use the top of stack as a
1547 source and some other stack register (possibly top of stack)
1548 as a destination. */
1550 src1 = get_true_reg (&XEXP (pat_src, 0));
1551 src2 = get_true_reg (&XEXP (pat_src, 1));
1553 /* We will fix any death note later. */
1555 if (STACK_REG_P (*src1))
1556 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1558 src1_note = NULL_RTX;
1559 if (STACK_REG_P (*src2))
1560 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1562 src2_note = NULL_RTX;
1564 /* If either operand is not a stack register, then the dest
1565 must be top of stack. */
1567 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1568 emit_swap_insn (insn, regstack, *dest);
1571 /* Both operands are REG. If neither operand is already
1572 at the top of stack, choose to make the one that is the dest
1573 the new top of stack. */
1575 int src1_hard_regnum, src2_hard_regnum;
1577 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1578 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1579 if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
1582 if (src1_hard_regnum != FIRST_STACK_REG
1583 && src2_hard_regnum != FIRST_STACK_REG)
1584 emit_swap_insn (insn, regstack, *dest);
1587 if (STACK_REG_P (*src1))
1588 replace_reg (src1, get_hard_regnum (regstack, *src1));
1589 if (STACK_REG_P (*src2))
1590 replace_reg (src2, get_hard_regnum (regstack, *src2));
1594 rtx src1_reg = XEXP (src1_note, 0);
1596 /* If the register that dies is at the top of stack, then
1597 the destination is somewhere else - merely substitute it.
1598 But if the reg that dies is not at top of stack, then
1599 move the top of stack to the dead reg, as though we had
1600 done the insn and then a store-with-pop. */
1602 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1604 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1605 replace_reg (dest, get_hard_regnum (regstack, *dest));
1609 int regno = get_hard_regnum (regstack, src1_reg);
1611 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1612 replace_reg (dest, regno);
1614 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1615 = regstack->reg[regstack->top];
1618 CLEAR_HARD_REG_BIT (regstack->reg_set,
1619 REGNO (XEXP (src1_note, 0)));
1620 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1625 rtx src2_reg = XEXP (src2_note, 0);
1626 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1628 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1629 replace_reg (dest, get_hard_regnum (regstack, *dest));
1633 int regno = get_hard_regnum (regstack, src2_reg);
1635 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1636 replace_reg (dest, regno);
1638 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1639 = regstack->reg[regstack->top];
1642 CLEAR_HARD_REG_BIT (regstack->reg_set,
1643 REGNO (XEXP (src2_note, 0)));
1644 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1649 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1650 replace_reg (dest, get_hard_regnum (regstack, *dest));
1653 /* Keep operand 1 matching with destination. */
1654 if (GET_RTX_CLASS (GET_CODE (pat_src)) == 'c'
1655 && REG_P (*src1) && REG_P (*src2)
1656 && REGNO (*src1) != REGNO (*dest))
1658 int tmp = REGNO (*src1);
1659 replace_reg (src1, REGNO (*src2));
1660 replace_reg (src2, tmp);
1665 switch (XINT (pat_src, 1))
1669 case UNSPEC_FRNDINT:
1671 /* These insns only operate on the top of the stack. */
1673 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1675 emit_swap_insn (insn, regstack, *src1);
1677 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1679 if (STACK_REG_P (*dest))
1680 replace_reg (dest, FIRST_STACK_REG);
1684 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1686 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1689 replace_reg (src1, FIRST_STACK_REG);
1695 /* These insns operate on the top two stack slots. */
1697 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1698 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1700 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1701 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1704 struct stack_def temp_stack;
1705 int regno, j, k, temp;
1707 temp_stack = *regstack;
1709 /* Place operand 1 at the top of stack. */
1710 regno = get_hard_regnum (&temp_stack, *src1);
1713 if (regno != FIRST_STACK_REG)
1715 k = temp_stack.top - (regno - FIRST_STACK_REG);
1718 temp = temp_stack.reg[k];
1719 temp_stack.reg[k] = temp_stack.reg[j];
1720 temp_stack.reg[j] = temp;
1723 /* Place operand 2 next on the stack. */
1724 regno = get_hard_regnum (&temp_stack, *src2);
1727 if (regno != FIRST_STACK_REG + 1)
1729 k = temp_stack.top - (regno - FIRST_STACK_REG);
1730 j = temp_stack.top - 1;
1732 temp = temp_stack.reg[k];
1733 temp_stack.reg[k] = temp_stack.reg[j];
1734 temp_stack.reg[j] = temp;
1737 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
1740 replace_reg (src1, FIRST_STACK_REG);
1741 replace_reg (src2, FIRST_STACK_REG + 1);
1744 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1746 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1748 /* Pop both input operands from the stack. */
1749 CLEAR_HARD_REG_BIT (regstack->reg_set,
1750 regstack->reg[regstack->top]);
1751 CLEAR_HARD_REG_BIT (regstack->reg_set,
1752 regstack->reg[regstack->top - 1]);
1755 /* Push the result back onto the stack. */
1756 regstack->reg[++regstack->top] = REGNO (*dest);
1757 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1758 replace_reg (dest, FIRST_STACK_REG);
1762 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1763 The combination matches the PPRO fcomi instruction. */
1765 pat_src = XVECEXP (pat_src, 0, 0);
1766 if (GET_CODE (pat_src) != UNSPEC
1767 || XINT (pat_src, 1) != UNSPEC_FNSTSW)
1772 /* Combined fcomp+fnstsw generated for doing well with
1773 CSE. When optimizing this would have been broken
1776 pat_src = XVECEXP (pat_src, 0, 0);
1777 if (GET_CODE (pat_src) != COMPARE)
1780 compare_for_stack_reg (insn, regstack, pat_src);
1789 /* This insn requires the top of stack to be the destination. */
1791 src1 = get_true_reg (&XEXP (pat_src, 1));
1792 src2 = get_true_reg (&XEXP (pat_src, 2));
1794 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1795 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1797 /* If the comparison operator is an FP comparison operator,
1798 it is handled correctly by compare_for_stack_reg () who
1799 will move the destination to the top of stack. But if the
1800 comparison operator is not an FP comparison operator, we
1801 have to handle it here. */
1802 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1803 && REGNO (*dest) != regstack->reg[regstack->top])
1805 /* In case one of operands is the top of stack and the operands
1806 dies, it is safe to make it the destination operand by
1807 reversing the direction of cmove and avoid fxch. */
1808 if ((REGNO (*src1) == regstack->reg[regstack->top]
1810 || (REGNO (*src2) == regstack->reg[regstack->top]
1813 int idx1 = (get_hard_regnum (regstack, *src1)
1815 int idx2 = (get_hard_regnum (regstack, *src2)
1818 /* Make reg-stack believe that the operands are already
1819 swapped on the stack */
1820 regstack->reg[regstack->top - idx1] = REGNO (*src2);
1821 regstack->reg[regstack->top - idx2] = REGNO (*src1);
1823 /* Reverse condition to compensate the operand swap.
1824 i386 do have comparison always reversible. */
1825 PUT_CODE (XEXP (pat_src, 0),
1826 reversed_comparison_code (XEXP (pat_src, 0), insn));
1829 emit_swap_insn (insn, regstack, *dest);
1837 src_note[1] = src1_note;
1838 src_note[2] = src2_note;
1840 if (STACK_REG_P (*src1))
1841 replace_reg (src1, get_hard_regnum (regstack, *src1));
1842 if (STACK_REG_P (*src2))
1843 replace_reg (src2, get_hard_regnum (regstack, *src2));
1845 for (i = 1; i <= 2; i++)
1848 int regno = REGNO (XEXP (src_note[i], 0));
1850 /* If the register that dies is not at the top of
1851 stack, then move the top of stack to the dead reg */
1852 if (regno != regstack->reg[regstack->top])
1854 remove_regno_note (insn, REG_DEAD, regno);
1855 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1859 /* Top of stack never dies, as it is the
1865 /* Make dest the top of stack. Add dest to regstack if
1867 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1868 regstack->reg[++regstack->top] = REGNO (*dest);
1869 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1870 replace_reg (dest, FIRST_STACK_REG);
1884 /* Substitute hard regnums for any stack regs in INSN, which has
1885 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1886 before the insn, and is updated with changes made here.
1888 There are several requirements and assumptions about the use of
1889 stack-like regs in asm statements. These rules are enforced by
1890 record_asm_stack_regs; see comments there for details. Any
1891 asm_operands left in the RTL at this point may be assume to meet the
1892 requirements, since record_asm_stack_regs removes any problem asm. */
1895 subst_asm_stack_regs (rtx insn, stack regstack)
1897 rtx body = PATTERN (insn);
1900 rtx *note_reg; /* Array of note contents */
1901 rtx **note_loc; /* Address of REG field of each note */
1902 enum reg_note *note_kind; /* The type of each note */
1904 rtx *clobber_reg = 0;
1905 rtx **clobber_loc = 0;
1907 struct stack_def temp_stack;
1912 int n_inputs, n_outputs;
1914 if (! check_asm_stack_operands (insn))
1917 /* Find out what the constraints required. If no constraint
1918 alternative matches, that is a compiler bug: we should have caught
1919 such an insn in check_asm_stack_operands. */
1920 extract_insn (insn);
1921 constrain_operands (1);
1922 alt = which_alternative;
1924 preprocess_constraints ();
1926 n_inputs = get_asm_operand_n_inputs (body);
1927 n_outputs = recog_data.n_operands - n_inputs;
1932 /* Strip SUBREGs here to make the following code simpler. */
1933 for (i = 0; i < recog_data.n_operands; i++)
1934 if (GET_CODE (recog_data.operand[i]) == SUBREG
1935 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
1937 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
1938 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
1941 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
1943 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
1946 note_reg = alloca (i * sizeof (rtx));
1947 note_loc = alloca (i * sizeof (rtx *));
1948 note_kind = alloca (i * sizeof (enum reg_note));
1951 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1953 rtx reg = XEXP (note, 0);
1954 rtx *loc = & XEXP (note, 0);
1956 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1958 loc = & SUBREG_REG (reg);
1959 reg = SUBREG_REG (reg);
1962 if (STACK_REG_P (reg)
1963 && (REG_NOTE_KIND (note) == REG_DEAD
1964 || REG_NOTE_KIND (note) == REG_UNUSED))
1966 note_reg[n_notes] = reg;
1967 note_loc[n_notes] = loc;
1968 note_kind[n_notes] = REG_NOTE_KIND (note);
1973 /* Set up CLOBBER_REG and CLOBBER_LOC. */
1977 if (GET_CODE (body) == PARALLEL)
1979 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
1980 clobber_loc = alloca (XVECLEN (body, 0) * sizeof (rtx *));
1982 for (i = 0; i < XVECLEN (body, 0); i++)
1983 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
1985 rtx clobber = XVECEXP (body, 0, i);
1986 rtx reg = XEXP (clobber, 0);
1987 rtx *loc = & XEXP (clobber, 0);
1989 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1991 loc = & SUBREG_REG (reg);
1992 reg = SUBREG_REG (reg);
1995 if (STACK_REG_P (reg))
1997 clobber_reg[n_clobbers] = reg;
1998 clobber_loc[n_clobbers] = loc;
2004 temp_stack = *regstack;
2006 /* Put the input regs into the desired place in TEMP_STACK. */
2008 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2009 if (STACK_REG_P (recog_data.operand[i])
2010 && reg_class_subset_p (recog_op_alt[i][alt].class,
2012 && recog_op_alt[i][alt].class != FLOAT_REGS)
2014 /* If an operand needs to be in a particular reg in
2015 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2016 these constraints are for single register classes, and
2017 reload guaranteed that operand[i] is already in that class,
2018 we can just use REGNO (recog_data.operand[i]) to know which
2019 actual reg this operand needs to be in. */
2021 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2026 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2028 /* recog_data.operand[i] is not in the right place. Find
2029 it and swap it with whatever is already in I's place.
2030 K is where recog_data.operand[i] is now. J is where it
2034 k = temp_stack.top - (regno - FIRST_STACK_REG);
2036 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2038 temp = temp_stack.reg[k];
2039 temp_stack.reg[k] = temp_stack.reg[j];
2040 temp_stack.reg[j] = temp;
2044 /* Emit insns before INSN to make sure the reg-stack is in the right
2047 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2049 /* Make the needed input register substitutions. Do death notes and
2050 clobbers too, because these are for inputs, not outputs. */
2052 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2053 if (STACK_REG_P (recog_data.operand[i]))
2055 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2060 replace_reg (recog_data.operand_loc[i], regnum);
2063 for (i = 0; i < n_notes; i++)
2064 if (note_kind[i] == REG_DEAD)
2066 int regnum = get_hard_regnum (regstack, note_reg[i]);
2071 replace_reg (note_loc[i], regnum);
2074 for (i = 0; i < n_clobbers; i++)
2076 /* It's OK for a CLOBBER to reference a reg that is not live.
2077 Don't try to replace it in that case. */
2078 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2082 /* Sigh - clobbers always have QImode. But replace_reg knows
2083 that these regs can't be MODE_INT and will abort. Just put
2084 the right reg there without calling replace_reg. */
2086 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2090 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2092 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2093 if (STACK_REG_P (recog_data.operand[i]))
2095 /* An input reg is implicitly popped if it is tied to an
2096 output, or if there is a CLOBBER for it. */
2099 for (j = 0; j < n_clobbers; j++)
2100 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2103 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2105 /* recog_data.operand[i] might not be at the top of stack.
2106 But that's OK, because all we need to do is pop the
2107 right number of regs off of the top of the reg-stack.
2108 record_asm_stack_regs guaranteed that all implicitly
2109 popped regs were grouped at the top of the reg-stack. */
2111 CLEAR_HARD_REG_BIT (regstack->reg_set,
2112 regstack->reg[regstack->top]);
2117 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2118 Note that there isn't any need to substitute register numbers.
2119 ??? Explain why this is true. */
2121 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2123 /* See if there is an output for this hard reg. */
2126 for (j = 0; j < n_outputs; j++)
2127 if (STACK_REG_P (recog_data.operand[j])
2128 && REGNO (recog_data.operand[j]) == (unsigned) i)
2130 regstack->reg[++regstack->top] = i;
2131 SET_HARD_REG_BIT (regstack->reg_set, i);
2136 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2137 input that the asm didn't implicitly pop. If the asm didn't
2138 implicitly pop an input reg, that reg will still be live.
2140 Note that we can't use find_regno_note here: the register numbers
2141 in the death notes have already been substituted. */
2143 for (i = 0; i < n_outputs; i++)
2144 if (STACK_REG_P (recog_data.operand[i]))
2148 for (j = 0; j < n_notes; j++)
2149 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2150 && note_kind[j] == REG_UNUSED)
2152 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2158 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2159 if (STACK_REG_P (recog_data.operand[i]))
2163 for (j = 0; j < n_notes; j++)
2164 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2165 && note_kind[j] == REG_DEAD
2166 && TEST_HARD_REG_BIT (regstack->reg_set,
2167 REGNO (recog_data.operand[i])))
2169 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2176 /* Substitute stack hard reg numbers for stack virtual registers in
2177 INSN. Non-stack register numbers are not changed. REGSTACK is the
2178 current stack content. Insns may be emitted as needed to arrange the
2179 stack for the 387 based on the contents of the insn. */
2182 subst_stack_regs (rtx insn, stack regstack)
2184 rtx *note_link, note;
2187 if (GET_CODE (insn) == CALL_INSN)
2189 int top = regstack->top;
2191 /* If there are any floating point parameters to be passed in
2192 registers for this call, make sure they are in the right
2197 straighten_stack (PREV_INSN (insn), regstack);
2199 /* Now mark the arguments as dead after the call. */
2201 while (regstack->top >= 0)
2203 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2209 /* Do the actual substitution if any stack regs are mentioned.
2210 Since we only record whether entire insn mentions stack regs, and
2211 subst_stack_regs_pat only works for patterns that contain stack regs,
2212 we must check each pattern in a parallel here. A call_value_pop could
2215 if (stack_regs_mentioned (insn))
2217 int n_operands = asm_noperands (PATTERN (insn));
2218 if (n_operands >= 0)
2220 /* This insn is an `asm' with operands. Decode the operands,
2221 decide how many are inputs, and do register substitution.
2222 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2224 subst_asm_stack_regs (insn, regstack);
2228 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2229 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2231 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2232 subst_stack_regs_pat (insn, regstack,
2233 XVECEXP (PATTERN (insn), 0, i));
2236 subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2239 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2240 REG_UNUSED will already have been dealt with, so just return. */
2242 if (GET_CODE (insn) == NOTE || INSN_DELETED_P (insn))
2245 /* If there is a REG_UNUSED note on a stack register on this insn,
2246 the indicated reg must be popped. The REG_UNUSED note is removed,
2247 since the form of the newly emitted pop insn references the reg,
2248 making it no longer `unset'. */
2250 note_link = ®_NOTES (insn);
2251 for (note = *note_link; note; note = XEXP (note, 1))
2252 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2254 *note_link = XEXP (note, 1);
2255 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2258 note_link = &XEXP (note, 1);
2261 /* Change the organization of the stack so that it fits a new basic
2262 block. Some registers might have to be popped, but there can never be
2263 a register live in the new block that is not now live.
2265 Insert any needed insns before or after INSN, as indicated by
2266 WHERE. OLD is the original stack layout, and NEW is the desired
2267 form. OLD is updated to reflect the code emitted, ie, it will be
2268 the same as NEW upon return.
2270 This function will not preserve block_end[]. But that information
2271 is no longer needed once this has executed. */
2274 change_stack (rtx insn, stack old, stack new, enum emit_where where)
2279 /* We will be inserting new insns "backwards". If we are to insert
2280 after INSN, find the next insn, and insert before it. */
2282 if (where == EMIT_AFTER)
2284 if (current_block && current_block->end == insn)
2286 insn = NEXT_INSN (insn);
2289 /* Pop any registers that are not needed in the new block. */
2291 for (reg = old->top; reg >= 0; reg--)
2292 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2293 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2298 /* If the new block has never been processed, then it can inherit
2299 the old stack order. */
2301 new->top = old->top;
2302 memcpy (new->reg, old->reg, sizeof (new->reg));
2306 /* This block has been entered before, and we must match the
2307 previously selected stack order. */
2309 /* By now, the only difference should be the order of the stack,
2310 not their depth or liveliness. */
2312 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2315 if (old->top != new->top)
2318 /* If the stack is not empty (new->top != -1), loop here emitting
2319 swaps until the stack is correct.
2321 The worst case number of swaps emitted is N + 2, where N is the
2322 depth of the stack. In some cases, the reg at the top of
2323 stack may be correct, but swapped anyway in order to fix
2324 other regs. But since we never swap any other reg away from
2325 its correct slot, this algorithm will converge. */
2330 /* Swap the reg at top of stack into the position it is
2331 supposed to be in, until the correct top of stack appears. */
2333 while (old->reg[old->top] != new->reg[new->top])
2335 for (reg = new->top; reg >= 0; reg--)
2336 if (new->reg[reg] == old->reg[old->top])
2342 emit_swap_insn (insn, old,
2343 FP_MODE_REG (old->reg[reg], DFmode));
2346 /* See if any regs remain incorrect. If so, bring an
2347 incorrect reg to the top of stack, and let the while loop
2350 for (reg = new->top; reg >= 0; reg--)
2351 if (new->reg[reg] != old->reg[reg])
2353 emit_swap_insn (insn, old,
2354 FP_MODE_REG (old->reg[reg], DFmode));
2359 /* At this point there must be no differences. */
2361 for (reg = old->top; reg >= 0; reg--)
2362 if (old->reg[reg] != new->reg[reg])
2367 current_block->end = PREV_INSN (insn);
2370 /* Print stack configuration. */
2373 print_stack (FILE *file, stack s)
2379 fprintf (file, "uninitialized\n");
2380 else if (s->top == -1)
2381 fprintf (file, "empty\n");
2386 for (i = 0; i <= s->top; ++i)
2387 fprintf (file, "%d ", s->reg[i]);
2388 fputs ("]\n", file);
2392 /* This function was doing life analysis. We now let the regular live
2393 code do it's job, so we only need to check some extra invariants
2394 that reg-stack expects. Primary among these being that all registers
2395 are initialized before use.
2397 The function returns true when code was emitted to CFG edges and
2398 commit_edge_insertions needs to be called. */
2401 convert_regs_entry (void)
2407 FOR_EACH_BB_REVERSE (block)
2409 block_info bi = BLOCK_INFO (block);
2412 /* Set current register status at last instruction `uninitialized'. */
2413 bi->stack_in.top = -2;
2415 /* Copy live_at_end and live_at_start into temporaries. */
2416 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
2418 if (REGNO_REG_SET_P (block->global_live_at_end, reg))
2419 SET_HARD_REG_BIT (bi->out_reg_set, reg);
2420 if (REGNO_REG_SET_P (block->global_live_at_start, reg))
2421 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
2425 /* Load something into each stack register live at function entry.
2426 Such live registers can be caused by uninitialized variables or
2427 functions not returning values on all paths. In order to keep
2428 the push/pop code happy, and to not scrog the register stack, we
2429 must put something in these registers. Use a QNaN.
2431 Note that we are inserting converted code here. This code is
2432 never seen by the convert_regs pass. */
2434 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2436 basic_block block = e->dest;
2437 block_info bi = BLOCK_INFO (block);
2440 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2441 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2445 bi->stack_in.reg[++top] = reg;
2447 init = gen_rtx_SET (VOIDmode,
2448 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2450 insert_insn_on_edge (init, e);
2454 bi->stack_in.top = top;
2460 /* Construct the desired stack for function exit. This will either
2461 be `empty', or the function return value at top-of-stack. */
2464 convert_regs_exit (void)
2466 int value_reg_low, value_reg_high;
2470 retvalue = stack_result (current_function_decl);
2471 value_reg_low = value_reg_high = -1;
2474 value_reg_low = REGNO (retvalue);
2475 value_reg_high = value_reg_low
2476 + HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1;
2479 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2480 if (value_reg_low == -1)
2481 output_stack->top = -1;
2486 output_stack->top = value_reg_high - value_reg_low;
2487 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2489 output_stack->reg[value_reg_high - reg] = reg;
2490 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2495 /* Adjust the stack of this block on exit to match the stack of the
2496 target block, or copy stack info into the stack of the successor
2497 of the successor hasn't been processed yet. */
2499 compensate_edge (edge e, FILE *file)
2501 basic_block block = e->src, target = e->dest;
2502 block_info bi = BLOCK_INFO (block);
2503 struct stack_def regstack, tmpstack;
2504 stack target_stack = &BLOCK_INFO (target)->stack_in;
2507 current_block = block;
2508 regstack = bi->stack_out;
2510 fprintf (file, "Edge %d->%d: ", block->index, target->index);
2512 if (target_stack->top == -2)
2514 /* The target block hasn't had a stack order selected.
2515 We need merely ensure that no pops are needed. */
2516 for (reg = regstack.top; reg >= 0; --reg)
2517 if (!TEST_HARD_REG_BIT (target_stack->reg_set, regstack.reg[reg]))
2523 fprintf (file, "new block; copying stack position\n");
2525 /* change_stack kills values in regstack. */
2526 tmpstack = regstack;
2528 change_stack (block->end, &tmpstack, target_stack, EMIT_AFTER);
2533 fprintf (file, "new block; pops needed\n");
2537 if (target_stack->top == regstack.top)
2539 for (reg = target_stack->top; reg >= 0; --reg)
2540 if (target_stack->reg[reg] != regstack.reg[reg])
2546 fprintf (file, "no changes needed\n");
2553 fprintf (file, "correcting stack to ");
2554 print_stack (file, target_stack);
2558 /* Care for non-call EH edges specially. The normal return path have
2559 values in registers. These will be popped en masse by the unwind
2561 if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH)
2562 target_stack->top = -1;
2564 /* Other calls may appear to have values live in st(0), but the
2565 abnormal return path will not have actually loaded the values. */
2566 else if (e->flags & EDGE_ABNORMAL_CALL)
2568 /* Assert that the lifetimes are as we expect -- one value
2569 live at st(0) on the end of the source block, and no
2570 values live at the beginning of the destination block. */
2573 CLEAR_HARD_REG_SET (tmp);
2574 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1);
2578 /* We are sure that there is st(0) live, otherwise we won't compensate.
2579 For complex return values, we may have st(1) live as well. */
2580 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG);
2581 if (TEST_HARD_REG_BIT (regstack.reg_set, FIRST_STACK_REG + 1))
2582 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG + 1);
2583 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2);
2587 target_stack->top = -1;
2590 /* It is better to output directly to the end of the block
2591 instead of to the edge, because emit_swap can do minimal
2592 insn scheduling. We can do this when there is only one
2593 edge out, and it is not abnormal. */
2594 else if (block->succ->succ_next == NULL && !(e->flags & EDGE_ABNORMAL))
2596 /* change_stack kills values in regstack. */
2597 tmpstack = regstack;
2599 change_stack (block->end, &tmpstack, target_stack,
2600 (GET_CODE (block->end) == JUMP_INSN
2601 ? EMIT_BEFORE : EMIT_AFTER));
2607 /* We don't support abnormal edges. Global takes care to
2608 avoid any live register across them, so we should never
2609 have to insert instructions on such edges. */
2610 if (e->flags & EDGE_ABNORMAL)
2613 current_block = NULL;
2616 /* ??? change_stack needs some point to emit insns after. */
2617 after = emit_note (NOTE_INSN_DELETED);
2619 tmpstack = regstack;
2620 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE);
2625 insert_insn_on_edge (seq, e);
2631 /* Convert stack register references in one block. */
2634 convert_regs_1 (FILE *file, basic_block block)
2636 struct stack_def regstack;
2637 block_info bi = BLOCK_INFO (block);
2638 int deleted, inserted, reg;
2640 edge e, beste = NULL;
2644 any_malformed_asm = false;
2646 /* Find the edge we will copy stack from. It should be the most frequent
2647 one as it will get cheapest after compensation code is generated,
2648 if multiple such exists, take one with largest count, prefer critical
2649 one (as splitting critical edges is more expensive), or one with lowest
2650 index, to avoid random changes with different orders of the edges. */
2651 for (e = block->pred; e ; e = e->pred_next)
2653 if (e->flags & EDGE_DFS_BACK)
2657 else if (EDGE_FREQUENCY (beste) < EDGE_FREQUENCY (e))
2659 else if (EDGE_FREQUENCY (beste) > EDGE_FREQUENCY (e))
2661 else if (beste->count < e->count)
2663 else if (beste->count > e->count)
2665 else if ((EDGE_CRITICAL_P (e) != 0)
2666 != (EDGE_CRITICAL_P (beste) != 0))
2668 if (EDGE_CRITICAL_P (e))
2671 else if (e->src->index < beste->src->index)
2675 /* Initialize stack at block entry. */
2676 if (bi->stack_in.top == -2)
2679 inserted |= compensate_edge (beste, file);
2682 /* No predecessors. Create an arbitrary input stack. */
2685 bi->stack_in.top = -1;
2686 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2687 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2688 bi->stack_in.reg[++bi->stack_in.top] = reg;
2692 /* Entry blocks do have stack already initialized. */
2695 current_block = block;
2699 fprintf (file, "\nBasic block %d\nInput stack: ", block->index);
2700 print_stack (file, &bi->stack_in);
2703 /* Process all insns in this block. Keep track of NEXT so that we
2704 don't process insns emitted while substituting in INSN. */
2706 regstack = bi->stack_in;
2710 next = NEXT_INSN (insn);
2712 /* Ensure we have not missed a block boundary. */
2715 if (insn == block->end)
2718 /* Don't bother processing unless there is a stack reg
2719 mentioned or if it's a CALL_INSN. */
2720 if (stack_regs_mentioned (insn)
2721 || GET_CODE (insn) == CALL_INSN)
2725 fprintf (file, " insn %d input stack: ",
2727 print_stack (file, ®stack);
2729 subst_stack_regs (insn, ®stack);
2730 deleted |= (GET_CODE (insn) == NOTE || INSN_DELETED_P (insn));
2737 fprintf (file, "Expected live registers [");
2738 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2739 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2740 fprintf (file, " %d", reg);
2741 fprintf (file, " ]\nOutput stack: ");
2742 print_stack (file, ®stack);
2746 if (GET_CODE (insn) == JUMP_INSN)
2747 insn = PREV_INSN (insn);
2749 /* If the function is declared to return a value, but it returns one
2750 in only some cases, some registers might come live here. Emit
2751 necessary moves for them. */
2753 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2755 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2756 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2762 fprintf (file, "Emitting insn initializing reg %d\n",
2766 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode),
2768 insn = emit_insn_after (set, insn);
2769 subst_stack_regs (insn, ®stack);
2770 deleted |= (GET_CODE (insn) == NOTE || INSN_DELETED_P (insn));
2774 /* Amongst the insns possibly deleted during the substitution process above,
2775 might have been the only trapping insn in the block. We purge the now
2776 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
2777 called at the end of convert_regs. The order in which we process the
2778 blocks ensures that we never delete an already processed edge.
2780 ??? We are normally supposed not to delete trapping insns, so we pretend
2781 that the insns deleted above don't actually trap. It would have been
2782 better to detect this earlier and avoid creating the EH edge in the first
2783 place, still, but we don't have enough information at that time. */
2786 purge_dead_edges (block);
2788 /* Something failed if the stack lives don't match. If we had malformed
2789 asms, we zapped the instruction itself, but that didn't produce the
2790 same pattern of register kills as before. */
2791 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2792 if (!any_malformed_asm)
2795 bi->stack_out = regstack;
2797 /* Compensate the back edges, as those wasn't visited yet. */
2798 for (e = block->succ; e ; e = e->succ_next)
2800 if (e->flags & EDGE_DFS_BACK
2801 || (e->dest == EXIT_BLOCK_PTR))
2803 if (!BLOCK_INFO (e->dest)->done
2804 && e->dest != block)
2806 inserted |= compensate_edge (e, file);
2809 for (e = block->pred; e ; e = e->pred_next)
2811 if (e != beste && !(e->flags & EDGE_DFS_BACK)
2812 && e->src != ENTRY_BLOCK_PTR)
2814 if (!BLOCK_INFO (e->src)->done)
2816 inserted |= compensate_edge (e, file);
2823 /* Convert registers in all blocks reachable from BLOCK. */
2826 convert_regs_2 (FILE *file, basic_block block)
2828 basic_block *stack, *sp;
2831 /* We process the blocks in a top-down manner, in a way such that one block
2832 is only processed after all its predecessors. The number of predecessors
2833 of every block has already been computed. */
2835 stack = xmalloc (sizeof (*stack) * n_basic_blocks);
2847 /* Processing BLOCK is achieved by convert_regs_1, which may purge
2848 some dead EH outgoing edge after the deletion of the trapping
2849 insn inside the block. Since the number of predecessors of
2850 BLOCK's successors was computed based on the initial edge set,
2851 we check the necessity to process some of these successors
2852 before such an edge deletion may happen. However, there is
2853 a pitfall: if BLOCK is the only predecessor of a successor and
2854 the edge between them happens to be deleted, the successor
2855 becomes unreachable and should not be processed. The problem
2856 is that there is no way to preventively detect this case so we
2857 stack the successor in all cases and hand over the task of
2858 fixing up the discrepancy to convert_regs_1. */
2860 for (e = block->succ; e ; e = e->succ_next)
2861 if (! (e->flags & EDGE_DFS_BACK))
2863 BLOCK_INFO (e->dest)->predecessors--;
2864 if (!BLOCK_INFO (e->dest)->predecessors)
2868 inserted |= convert_regs_1 (file, block);
2869 BLOCK_INFO (block)->done = 1;
2871 while (sp != stack);
2876 /* Traverse all basic blocks in a function, converting the register
2877 references in each insn from the "flat" register file that gcc uses,
2878 to the stack-like registers the 387 uses. */
2881 convert_regs (FILE *file)
2887 /* Initialize uninitialized registers on function entry. */
2888 inserted = convert_regs_entry ();
2890 /* Construct the desired stack for function exit. */
2891 convert_regs_exit ();
2892 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
2894 /* ??? Future: process inner loops first, and give them arbitrary
2895 initial stacks which emit_swap_insn can modify. This ought to
2896 prevent double fxch that aften appears at the head of a loop. */
2898 /* Process all blocks reachable from all entry points. */
2899 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2900 inserted |= convert_regs_2 (file, e->dest);
2902 /* ??? Process all unreachable blocks. Though there's no excuse
2903 for keeping these even when not optimizing. */
2906 block_info bi = BLOCK_INFO (b);
2909 inserted |= convert_regs_2 (file, b);
2911 clear_aux_for_blocks ();
2913 fixup_abnormal_edges ();
2915 commit_edge_insertions ();
2922 #endif /* STACK_REGS */
2924 #include "gt-reg-stack.h"