1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
25 * The form of the input:
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
45 * The form of the output:
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
105 asm ("foo" : "=t" (a) : "f" (b));
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, ie, the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
116 The asm above would be written as
118 asm ("foo" : "=&t" (a) : "f" (b));
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
156 #include "coretypes.h"
161 #include "function.h"
162 #include "insn-config.h"
164 #include "hard-reg-set.h"
169 #include "basic-block.h"
174 /* We use this array to cache info about insns, because otherwise we
175 spend too much time in stack_regs_mentioned_p.
177 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
178 the insn uses stack registers, two indicates the insn does not use
180 static GTY(()) varray_type stack_regs_mentioned_data;
184 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
186 /* This is the basic stack record. TOP is an index into REG[] such
187 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
189 If TOP is -2, REG[] is not yet initialized. Stack initialization
190 consists of placing each live reg in array `reg' and setting `top'
193 REG_SET indicates which registers are live. */
195 typedef struct stack_def
197 int top; /* index to top stack element */
198 HARD_REG_SET reg_set; /* set of live registers */
199 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
202 /* This is used to carry information about basic blocks. It is
203 attached to the AUX field of the standard CFG block. */
205 typedef struct block_info_def
207 struct stack_def stack_in; /* Input stack configuration. */
208 struct stack_def stack_out; /* Output stack configuration. */
209 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
210 int done; /* True if block already converted. */
211 int predecessors; /* Number of predecessors that needs
215 #define BLOCK_INFO(B) ((block_info) (B)->aux)
217 /* Passed to change_stack to indicate where to emit insns. */
224 /* The block we're currently working on. */
225 static basic_block current_block;
227 /* This is the register file for all register after conversion. */
229 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
231 #define FP_MODE_REG(regno,mode) \
232 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
234 /* Used to initialize uninitialized registers. */
237 /* Forward declarations */
239 static int stack_regs_mentioned_p (rtx pat);
240 static void straighten_stack (rtx, stack);
241 static void pop_stack (stack, int);
242 static rtx *get_true_reg (rtx *);
244 static int check_asm_stack_operands (rtx);
245 static int get_asm_operand_n_inputs (rtx);
246 static rtx stack_result (tree);
247 static void replace_reg (rtx *, int);
248 static void remove_regno_note (rtx, enum reg_note, unsigned int);
249 static int get_hard_regnum (stack, rtx);
250 static rtx emit_pop_insn (rtx, stack, rtx, enum emit_where);
251 static void emit_swap_insn (rtx, stack, rtx);
252 static void swap_to_top(rtx, stack, rtx, rtx);
253 static bool move_for_stack_reg (rtx, stack, rtx);
254 static int swap_rtx_condition_1 (rtx);
255 static int swap_rtx_condition (rtx);
256 static void compare_for_stack_reg (rtx, stack, rtx);
257 static bool subst_stack_regs_pat (rtx, stack, rtx);
258 static void subst_asm_stack_regs (rtx, stack);
259 static bool subst_stack_regs (rtx, stack);
260 static void change_stack (rtx, stack, stack, enum emit_where);
261 static int convert_regs_entry (void);
262 static void convert_regs_exit (void);
263 static int convert_regs_1 (FILE *, basic_block);
264 static int convert_regs_2 (FILE *, basic_block);
265 static int convert_regs (FILE *);
266 static void print_stack (FILE *, stack);
267 static rtx next_flags_user (rtx);
268 static void record_label_references (rtx, rtx);
269 static bool compensate_edge (edge, FILE *);
271 /* Return nonzero if any stack register is mentioned somewhere within PAT. */
274 stack_regs_mentioned_p (rtx pat)
279 if (STACK_REG_P (pat))
282 fmt = GET_RTX_FORMAT (GET_CODE (pat));
283 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
289 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
290 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
293 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
300 /* Return nonzero if INSN mentions stacked registers, else return zero. */
303 stack_regs_mentioned (rtx insn)
305 unsigned int uid, max;
308 if (! INSN_P (insn) || !stack_regs_mentioned_data)
311 uid = INSN_UID (insn);
312 max = VARRAY_SIZE (stack_regs_mentioned_data);
315 /* Allocate some extra size to avoid too many reallocs, but
316 do not grow too quickly. */
317 max = uid + uid / 20;
318 VARRAY_GROW (stack_regs_mentioned_data, max);
321 test = VARRAY_CHAR (stack_regs_mentioned_data, uid);
324 /* This insn has yet to be examined. Do so now. */
325 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
326 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test;
332 static rtx ix86_flags_rtx;
335 next_flags_user (rtx insn)
337 /* Search forward looking for the first use of this value.
338 Stop at block boundaries. */
340 while (insn != BB_END (current_block))
342 insn = NEXT_INSN (insn);
344 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
347 if (GET_CODE (insn) == CALL_INSN)
353 /* Reorganize the stack into ascending numbers,
357 straighten_stack (rtx insn, stack regstack)
359 struct stack_def temp_stack;
362 /* If there is only a single register on the stack, then the stack is
363 already in increasing order and no reorganization is needed.
365 Similarly if the stack is empty. */
366 if (regstack->top <= 0)
369 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
371 for (top = temp_stack.top = regstack->top; top >= 0; top--)
372 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
374 change_stack (insn, regstack, &temp_stack, EMIT_AFTER);
377 /* Pop a register from the stack. */
380 pop_stack (stack regstack, int regno)
382 int top = regstack->top;
384 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
386 /* If regno was not at the top of stack then adjust stack. */
387 if (regstack->reg [top] != regno)
390 for (i = regstack->top; i >= 0; i--)
391 if (regstack->reg [i] == regno)
394 for (j = i; j < top; j++)
395 regstack->reg [j] = regstack->reg [j + 1];
401 /* Convert register usage from "flat" register file usage to a "stack
402 register file. FIRST is the first insn in the function, FILE is the
405 Construct a CFG and run life analysis. Then convert each insn one
406 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
407 code duplication created when the converter inserts pop insns on
411 reg_to_stack (rtx first, FILE *file)
417 /* Clean up previous run. */
418 stack_regs_mentioned_data = 0;
420 /* See if there is something to do. Flow analysis is quite
421 expensive so we might save some compilation time. */
422 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
423 if (regs_ever_live[i])
425 if (i > LAST_STACK_REG)
428 /* Ok, floating point instructions exist. If not optimizing,
429 build the CFG and run life analysis.
430 Also need to rebuild life when superblock scheduling is done
431 as it don't update liveness yet. */
433 || (flag_sched2_use_superblocks
434 && flag_schedule_insns_after_reload))
436 count_or_remove_death_notes (NULL, 1);
437 life_analysis (first, file, PROP_DEATH_NOTES);
439 mark_dfs_back_edges ();
441 /* Set up block info for each basic block. */
442 alloc_aux_for_blocks (sizeof (struct block_info_def));
443 FOR_EACH_BB_REVERSE (bb)
446 for (e = bb->pred; e; e = e->pred_next)
447 if (!(e->flags & EDGE_DFS_BACK)
448 && e->src != ENTRY_BLOCK_PTR)
449 BLOCK_INFO (bb)->predecessors++;
452 /* Create the replacement registers up front. */
453 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
455 enum machine_mode mode;
456 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
458 mode = GET_MODE_WIDER_MODE (mode))
459 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
460 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
462 mode = GET_MODE_WIDER_MODE (mode))
463 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
466 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
468 /* A QNaN for initializing uninitialized variables.
470 ??? We can't load from constant memory in PIC mode, because
471 we're inserting these instructions before the prologue and
472 the PIC register hasn't been set up. In that case, fall back
473 on zero, which we can get from `ldz'. */
476 nan = CONST0_RTX (SFmode);
479 nan = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
480 nan = force_const_mem (SFmode, nan);
483 /* Allocate a cache for stack_regs_mentioned. */
484 max_uid = get_max_uid ();
485 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
486 "stack_regs_mentioned cache");
490 free_aux_for_blocks ();
494 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
495 label's chain of references, and note which insn contains each
499 record_label_references (rtx insn, rtx pat)
501 enum rtx_code code = GET_CODE (pat);
505 if (code == LABEL_REF)
507 rtx label = XEXP (pat, 0);
510 if (GET_CODE (label) != CODE_LABEL)
513 /* If this is an undefined label, LABEL_REFS (label) contains
515 if (INSN_UID (label) == 0)
518 /* Don't make a duplicate in the code_label's chain. */
520 for (ref = LABEL_REFS (label);
522 ref = LABEL_NEXTREF (ref))
523 if (CONTAINING_INSN (ref) == insn)
526 CONTAINING_INSN (pat) = insn;
527 LABEL_NEXTREF (pat) = LABEL_REFS (label);
528 LABEL_REFS (label) = pat;
533 fmt = GET_RTX_FORMAT (code);
534 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
537 record_label_references (insn, XEXP (pat, i));
541 for (j = 0; j < XVECLEN (pat, i); j++)
542 record_label_references (insn, XVECEXP (pat, i, j));
547 /* Return a pointer to the REG expression within PAT. If PAT is not a
548 REG, possible enclosed by a conversion rtx, return the inner part of
549 PAT that stopped the search. */
552 get_true_reg (rtx *pat)
555 switch (GET_CODE (*pat))
558 /* Eliminate FP subregister accesses in favor of the
559 actual FP register in use. */
562 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
564 int regno_off = subreg_regno_offset (REGNO (subreg),
568 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
577 pat = & XEXP (*pat, 0);
581 if (!flag_unsafe_math_optimizations)
583 pat = & XEXP (*pat, 0);
588 /* Set if we find any malformed asms in a block. */
589 static bool any_malformed_asm;
591 /* There are many rules that an asm statement for stack-like regs must
592 follow. Those rules are explained at the top of this file: the rule
593 numbers below refer to that explanation. */
596 check_asm_stack_operands (rtx insn)
600 int malformed_asm = 0;
601 rtx body = PATTERN (insn);
603 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
604 char implicitly_dies[FIRST_PSEUDO_REGISTER];
607 rtx *clobber_reg = 0;
608 int n_inputs, n_outputs;
610 /* Find out what the constraints require. If no constraint
611 alternative matches, this asm is malformed. */
613 constrain_operands (1);
614 alt = which_alternative;
616 preprocess_constraints ();
618 n_inputs = get_asm_operand_n_inputs (body);
619 n_outputs = recog_data.n_operands - n_inputs;
624 /* Avoid further trouble with this insn. */
625 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
629 /* Strip SUBREGs here to make the following code simpler. */
630 for (i = 0; i < recog_data.n_operands; i++)
631 if (GET_CODE (recog_data.operand[i]) == SUBREG
632 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
633 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
635 /* Set up CLOBBER_REG. */
639 if (GET_CODE (body) == PARALLEL)
641 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
643 for (i = 0; i < XVECLEN (body, 0); i++)
644 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
646 rtx clobber = XVECEXP (body, 0, i);
647 rtx reg = XEXP (clobber, 0);
649 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
650 reg = SUBREG_REG (reg);
652 if (STACK_REG_P (reg))
654 clobber_reg[n_clobbers] = reg;
660 /* Enforce rule #4: Output operands must specifically indicate which
661 reg an output appears in after an asm. "=f" is not allowed: the
662 operand constraints must select a class with a single reg.
664 Also enforce rule #5: Output operands must start at the top of
665 the reg-stack: output operands may not "skip" a reg. */
667 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
668 for (i = 0; i < n_outputs; i++)
669 if (STACK_REG_P (recog_data.operand[i]))
671 if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1)
673 error_for_asm (insn, "output constraint %d must specify a single register", i);
680 for (j = 0; j < n_clobbers; j++)
681 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
683 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
684 i, reg_names [REGNO (clobber_reg[j])]);
689 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
694 /* Search for first non-popped reg. */
695 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
696 if (! reg_used_as_output[i])
699 /* If there are any other popped regs, that's an error. */
700 for (; i < LAST_STACK_REG + 1; i++)
701 if (reg_used_as_output[i])
704 if (i != LAST_STACK_REG + 1)
706 error_for_asm (insn, "output regs must be grouped at top of stack");
710 /* Enforce rule #2: All implicitly popped input regs must be closer
711 to the top of the reg-stack than any input that is not implicitly
714 memset (implicitly_dies, 0, sizeof (implicitly_dies));
715 for (i = n_outputs; i < n_outputs + n_inputs; i++)
716 if (STACK_REG_P (recog_data.operand[i]))
718 /* An input reg is implicitly popped if it is tied to an
719 output, or if there is a CLOBBER for it. */
722 for (j = 0; j < n_clobbers; j++)
723 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
726 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
727 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
730 /* Search for first non-popped reg. */
731 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
732 if (! implicitly_dies[i])
735 /* If there are any other popped regs, that's an error. */
736 for (; i < LAST_STACK_REG + 1; i++)
737 if (implicitly_dies[i])
740 if (i != LAST_STACK_REG + 1)
743 "implicitly popped regs must be grouped at top of stack");
747 /* Enforce rule #3: If any input operand uses the "f" constraint, all
748 output constraints must use the "&" earlyclobber.
750 ??? Detect this more deterministically by having constrain_asm_operands
751 record any earlyclobber. */
753 for (i = n_outputs; i < n_outputs + n_inputs; i++)
754 if (recog_op_alt[i][alt].matches == -1)
758 for (j = 0; j < n_outputs; j++)
759 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
762 "output operand %d must use `&' constraint", j);
769 /* Avoid further trouble with this insn. */
770 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
771 any_malformed_asm = true;
778 /* Calculate the number of inputs and outputs in BODY, an
779 asm_operands. N_OPERANDS is the total number of operands, and
780 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
784 get_asm_operand_n_inputs (rtx body)
786 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
787 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
789 else if (GET_CODE (body) == ASM_OPERANDS)
790 return ASM_OPERANDS_INPUT_LENGTH (body);
792 else if (GET_CODE (body) == PARALLEL
793 && GET_CODE (XVECEXP (body, 0, 0)) == SET)
794 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
796 else if (GET_CODE (body) == PARALLEL
797 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
798 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
803 /* If current function returns its result in an fp stack register,
804 return the REG. Otherwise, return 0. */
807 stack_result (tree decl)
811 /* If the value is supposed to be returned in memory, then clearly
812 it is not returned in a stack register. */
813 if (aggregate_value_p (DECL_RESULT (decl), decl))
816 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
819 #ifdef FUNCTION_OUTGOING_VALUE
821 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
823 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
827 return result != 0 && STACK_REG_P (result) ? result : 0;
832 * This section deals with stack register substitution, and forms the second
836 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
837 the desired hard REGNO. */
840 replace_reg (rtx *reg, int regno)
842 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
843 || ! STACK_REG_P (*reg))
846 switch (GET_MODE_CLASS (GET_MODE (*reg)))
850 case MODE_COMPLEX_FLOAT:;
853 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
856 /* Remove a note of type NOTE, which must be found, for register
857 number REGNO from INSN. Remove only one such note. */
860 remove_regno_note (rtx insn, enum reg_note note, unsigned int regno)
862 rtx *note_link, this;
864 note_link = ®_NOTES (insn);
865 for (this = *note_link; this; this = XEXP (this, 1))
866 if (REG_NOTE_KIND (this) == note
867 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
869 *note_link = XEXP (this, 1);
873 note_link = &XEXP (this, 1);
878 /* Find the hard register number of virtual register REG in REGSTACK.
879 The hard register number is relative to the top of the stack. -1 is
880 returned if the register is not found. */
883 get_hard_regnum (stack regstack, rtx reg)
887 if (! STACK_REG_P (reg))
890 for (i = regstack->top; i >= 0; i--)
891 if (regstack->reg[i] == REGNO (reg))
894 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
897 /* Emit an insn to pop virtual register REG before or after INSN.
898 REGSTACK is the stack state after INSN and is updated to reflect this
899 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
900 is represented as a SET whose destination is the register to be popped
901 and source is the top of stack. A death note for the top of stack
902 cases the movdf pattern to pop. */
905 emit_pop_insn (rtx insn, stack regstack, rtx reg, enum emit_where where)
907 rtx pop_insn, pop_rtx;
910 /* For complex types take care to pop both halves. These may survive in
911 CLOBBER and USE expressions. */
912 if (COMPLEX_MODE_P (GET_MODE (reg)))
914 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
915 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
918 if (get_hard_regnum (regstack, reg1) >= 0)
919 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
920 if (get_hard_regnum (regstack, reg2) >= 0)
921 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
927 hard_regno = get_hard_regnum (regstack, reg);
929 if (hard_regno < FIRST_STACK_REG)
932 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
933 FP_MODE_REG (FIRST_STACK_REG, DFmode));
935 if (where == EMIT_AFTER)
936 pop_insn = emit_insn_after (pop_rtx, insn);
938 pop_insn = emit_insn_before (pop_rtx, insn);
941 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
942 REG_NOTES (pop_insn));
944 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
945 = regstack->reg[regstack->top];
947 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
952 /* Emit an insn before or after INSN to swap virtual register REG with
953 the top of stack. REGSTACK is the stack state before the swap, and
954 is updated to reflect the swap. A swap insn is represented as a
955 PARALLEL of two patterns: each pattern moves one reg to the other.
957 If REG is already at the top of the stack, no insn is emitted. */
960 emit_swap_insn (rtx insn, stack regstack, rtx reg)
964 int tmp, other_reg; /* swap regno temps */
965 rtx i1; /* the stack-reg insn prior to INSN */
966 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
968 hard_regno = get_hard_regnum (regstack, reg);
970 if (hard_regno < FIRST_STACK_REG)
972 if (hard_regno == FIRST_STACK_REG)
975 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
977 tmp = regstack->reg[other_reg];
978 regstack->reg[other_reg] = regstack->reg[regstack->top];
979 regstack->reg[regstack->top] = tmp;
981 /* Find the previous insn involving stack regs, but don't pass a
984 if (current_block && insn != BB_HEAD (current_block))
986 rtx tmp = PREV_INSN (insn);
987 rtx limit = PREV_INSN (BB_HEAD (current_block));
990 if (GET_CODE (tmp) == CODE_LABEL
991 || GET_CODE (tmp) == CALL_INSN
992 || NOTE_INSN_BASIC_BLOCK_P (tmp)
993 || (GET_CODE (tmp) == INSN
994 && stack_regs_mentioned (tmp)))
999 tmp = PREV_INSN (tmp);
1004 && (i1set = single_set (i1)) != NULL_RTX)
1006 rtx i1src = *get_true_reg (&SET_SRC (i1set));
1007 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
1009 /* If the previous register stack push was from the reg we are to
1010 swap with, omit the swap. */
1012 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG
1013 && GET_CODE (i1src) == REG
1014 && REGNO (i1src) == (unsigned) hard_regno - 1
1015 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1018 /* If the previous insn wrote to the reg we are to swap with,
1021 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == (unsigned) hard_regno
1022 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG
1023 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1027 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
1028 FP_MODE_REG (FIRST_STACK_REG, XFmode));
1031 emit_insn_after (swap_rtx, i1);
1032 else if (current_block)
1033 emit_insn_before (swap_rtx, BB_HEAD (current_block));
1035 emit_insn_before (swap_rtx, insn);
1038 /* Emit an insns before INSN to swap virtual register SRC1 with
1039 the top of stack and virtual register SRC2 with second stack
1040 slot. REGSTACK is the stack state before the swaps, and
1041 is updated to reflect the swaps. A swap insn is represented as a
1042 PARALLEL of two patterns: each pattern moves one reg to the other.
1044 If SRC1 and/or SRC2 are already at the right place, no swap insn
1048 swap_to_top (rtx insn, stack regstack, rtx src1, rtx src2)
1050 struct stack_def temp_stack;
1051 int regno, j, k, temp;
1053 temp_stack = *regstack;
1055 /* Place operand 1 at the top of stack. */
1056 regno = get_hard_regnum (&temp_stack, src1);
1059 if (regno != FIRST_STACK_REG)
1061 k = temp_stack.top - (regno - FIRST_STACK_REG);
1064 temp = temp_stack.reg[k];
1065 temp_stack.reg[k] = temp_stack.reg[j];
1066 temp_stack.reg[j] = temp;
1069 /* Place operand 2 next on the stack. */
1070 regno = get_hard_regnum (&temp_stack, src2);
1073 if (regno != FIRST_STACK_REG + 1)
1075 k = temp_stack.top - (regno - FIRST_STACK_REG);
1076 j = temp_stack.top - 1;
1078 temp = temp_stack.reg[k];
1079 temp_stack.reg[k] = temp_stack.reg[j];
1080 temp_stack.reg[j] = temp;
1083 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
1086 /* Handle a move to or from a stack register in PAT, which is in INSN.
1087 REGSTACK is the current stack. Return whether a control flow insn
1088 was deleted in the process. */
1091 move_for_stack_reg (rtx insn, stack regstack, rtx pat)
1093 rtx *psrc = get_true_reg (&SET_SRC (pat));
1094 rtx *pdest = get_true_reg (&SET_DEST (pat));
1097 bool control_flow_insn_deleted = false;
1099 src = *psrc; dest = *pdest;
1101 if (STACK_REG_P (src) && STACK_REG_P (dest))
1103 /* Write from one stack reg to another. If SRC dies here, then
1104 just change the register mapping and delete the insn. */
1106 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1111 /* If this is a no-op move, there must not be a REG_DEAD note. */
1112 if (REGNO (src) == REGNO (dest))
1115 for (i = regstack->top; i >= 0; i--)
1116 if (regstack->reg[i] == REGNO (src))
1119 /* The source must be live, and the dest must be dead. */
1120 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1123 /* It is possible that the dest is unused after this insn.
1124 If so, just pop the src. */
1126 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1127 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
1130 regstack->reg[i] = REGNO (dest);
1131 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1132 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1135 control_flow_insn_deleted |= control_flow_insn_p (insn);
1137 return control_flow_insn_deleted;
1140 /* The source reg does not die. */
1142 /* If this appears to be a no-op move, delete it, or else it
1143 will confuse the machine description output patterns. But if
1144 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1145 for REG_UNUSED will not work for deleted insns. */
1147 if (REGNO (src) == REGNO (dest))
1149 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1150 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1152 control_flow_insn_deleted |= control_flow_insn_p (insn);
1154 return control_flow_insn_deleted;
1157 /* The destination ought to be dead. */
1158 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1161 replace_reg (psrc, get_hard_regnum (regstack, src));
1163 regstack->reg[++regstack->top] = REGNO (dest);
1164 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1165 replace_reg (pdest, FIRST_STACK_REG);
1167 else if (STACK_REG_P (src))
1169 /* Save from a stack reg to MEM, or possibly integer reg. Since
1170 only top of stack may be saved, emit an exchange first if
1173 emit_swap_insn (insn, regstack, src);
1175 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1178 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1180 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1182 else if ((GET_MODE (src) == XFmode)
1183 && regstack->top < REG_STACK_SIZE - 1)
1185 /* A 387 cannot write an XFmode value to a MEM without
1186 clobbering the source reg. The output code can handle
1187 this by reading back the value from the MEM.
1188 But it is more efficient to use a temp register if one is
1189 available. Push the source value here if the register
1190 stack is not full, and then write the value to memory via
1192 rtx push_rtx, push_insn;
1193 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1195 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1196 push_insn = emit_insn_before (push_rtx, insn);
1197 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1201 replace_reg (psrc, FIRST_STACK_REG);
1203 else if (STACK_REG_P (dest))
1205 /* Load from MEM, or possibly integer REG or constant, into the
1206 stack regs. The actual target is always the top of the
1207 stack. The stack mapping is changed to reflect that DEST is
1208 now at top of stack. */
1210 /* The destination ought to be dead. */
1211 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1214 if (regstack->top >= REG_STACK_SIZE)
1217 regstack->reg[++regstack->top] = REGNO (dest);
1218 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1219 replace_reg (pdest, FIRST_STACK_REG);
1224 return control_flow_insn_deleted;
1227 /* Swap the condition on a branch, if there is one. Return true if we
1228 found a condition to swap. False if the condition was not used as
1232 swap_rtx_condition_1 (rtx pat)
1237 if (COMPARISON_P (pat))
1239 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1244 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1245 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1251 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1252 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1254 else if (fmt[i] == 'e')
1255 r |= swap_rtx_condition_1 (XEXP (pat, i));
1263 swap_rtx_condition (rtx insn)
1265 rtx pat = PATTERN (insn);
1267 /* We're looking for a single set to cc0 or an HImode temporary. */
1269 if (GET_CODE (pat) == SET
1270 && GET_CODE (SET_DEST (pat)) == REG
1271 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1273 insn = next_flags_user (insn);
1274 if (insn == NULL_RTX)
1276 pat = PATTERN (insn);
1279 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're
1280 not doing anything with the cc value right now. We may be able to
1281 search for one though. */
1283 if (GET_CODE (pat) == SET
1284 && GET_CODE (SET_SRC (pat)) == UNSPEC
1285 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
1287 rtx dest = SET_DEST (pat);
1289 /* Search forward looking for the first use of this value.
1290 Stop at block boundaries. */
1291 while (insn != BB_END (current_block))
1293 insn = NEXT_INSN (insn);
1294 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1296 if (GET_CODE (insn) == CALL_INSN)
1300 /* So we've found the insn using this value. If it is anything
1301 other than sahf, aka unspec 10, or the value does not die
1302 (meaning we'd have to search further), then we must give up. */
1303 pat = PATTERN (insn);
1304 if (GET_CODE (pat) != SET
1305 || GET_CODE (SET_SRC (pat)) != UNSPEC
1306 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
1307 || ! dead_or_set_p (insn, dest))
1310 /* Now we are prepared to handle this as a normal cc0 setter. */
1311 insn = next_flags_user (insn);
1312 if (insn == NULL_RTX)
1314 pat = PATTERN (insn);
1317 if (swap_rtx_condition_1 (pat))
1320 INSN_CODE (insn) = -1;
1321 if (recog_memoized (insn) == -1)
1323 /* In case the flags don't die here, recurse to try fix
1324 following user too. */
1325 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1327 insn = next_flags_user (insn);
1328 if (!insn || !swap_rtx_condition (insn))
1333 swap_rtx_condition_1 (pat);
1341 /* Handle a comparison. Special care needs to be taken to avoid
1342 causing comparisons that a 387 cannot do correctly, such as EQ.
1344 Also, a pop insn may need to be emitted. The 387 does have an
1345 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1346 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1350 compare_for_stack_reg (rtx insn, stack regstack, rtx pat_src)
1353 rtx src1_note, src2_note;
1356 src1 = get_true_reg (&XEXP (pat_src, 0));
1357 src2 = get_true_reg (&XEXP (pat_src, 1));
1358 flags_user = next_flags_user (insn);
1360 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1361 registers that die in this insn - move those to stack top first. */
1362 if ((! STACK_REG_P (*src1)
1363 || (STACK_REG_P (*src2)
1364 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1365 && swap_rtx_condition (insn))
1368 temp = XEXP (pat_src, 0);
1369 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1370 XEXP (pat_src, 1) = temp;
1372 src1 = get_true_reg (&XEXP (pat_src, 0));
1373 src2 = get_true_reg (&XEXP (pat_src, 1));
1375 INSN_CODE (insn) = -1;
1378 /* We will fix any death note later. */
1380 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1382 if (STACK_REG_P (*src2))
1383 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1385 src2_note = NULL_RTX;
1387 emit_swap_insn (insn, regstack, *src1);
1389 replace_reg (src1, FIRST_STACK_REG);
1391 if (STACK_REG_P (*src2))
1392 replace_reg (src2, get_hard_regnum (regstack, *src2));
1396 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1397 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1400 /* If the second operand dies, handle that. But if the operands are
1401 the same stack register, don't bother, because only one death is
1402 needed, and it was just handled. */
1405 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1406 && REGNO (*src1) == REGNO (*src2)))
1408 /* As a special case, two regs may die in this insn if src2 is
1409 next to top of stack and the top of stack also dies. Since
1410 we have already popped src1, "next to top of stack" is really
1411 at top (FIRST_STACK_REG) now. */
1413 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1416 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1417 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1421 /* The 386 can only represent death of the first operand in
1422 the case handled above. In all other cases, emit a separate
1423 pop and remove the death note from here. */
1425 /* link_cc0_insns (insn); */
1427 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1429 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1435 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1436 is the current register layout. Return whether a control flow insn
1437 was deleted in the process. */
1440 subst_stack_regs_pat (rtx insn, stack regstack, rtx pat)
1443 bool control_flow_insn_deleted = false;
1445 switch (GET_CODE (pat))
1448 /* Deaths in USE insns can happen in non optimizing compilation.
1449 Handle them by popping the dying register. */
1450 src = get_true_reg (&XEXP (pat, 0));
1451 if (STACK_REG_P (*src)
1452 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1454 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1455 return control_flow_insn_deleted;
1457 /* ??? Uninitialized USE should not happen. */
1458 else if (get_hard_regnum (regstack, *src) == -1)
1466 dest = get_true_reg (&XEXP (pat, 0));
1467 if (STACK_REG_P (*dest))
1469 note = find_reg_note (insn, REG_DEAD, *dest);
1471 if (pat != PATTERN (insn))
1473 /* The fix_truncdi_1 pattern wants to be able to allocate
1474 it's own scratch register. It does this by clobbering
1475 an fp reg so that it is assured of an empty reg-stack
1476 register. If the register is live, kill it now.
1477 Remove the DEAD/UNUSED note so we don't try to kill it
1481 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1484 note = find_reg_note (insn, REG_UNUSED, *dest);
1488 remove_note (insn, note);
1489 replace_reg (dest, FIRST_STACK_REG + 1);
1493 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1494 indicates an uninitialized value. Because reload removed
1495 all other clobbers, this must be due to a function
1496 returning without a value. Load up a NaN. */
1499 && get_hard_regnum (regstack, *dest) == -1)
1501 pat = gen_rtx_SET (VOIDmode,
1502 FP_MODE_REG (REGNO (*dest), SFmode),
1504 PATTERN (insn) = pat;
1505 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1507 if (! note && COMPLEX_MODE_P (GET_MODE (*dest))
1508 && get_hard_regnum (regstack, FP_MODE_REG (REGNO (*dest), DFmode)) == -1)
1510 pat = gen_rtx_SET (VOIDmode,
1511 FP_MODE_REG (REGNO (*dest) + 1, SFmode),
1513 PATTERN (insn) = pat;
1514 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1523 rtx *src1 = (rtx *) 0, *src2;
1524 rtx src1_note, src2_note;
1527 dest = get_true_reg (&SET_DEST (pat));
1528 src = get_true_reg (&SET_SRC (pat));
1529 pat_src = SET_SRC (pat);
1531 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1532 if (STACK_REG_P (*src)
1533 || (STACK_REG_P (*dest)
1534 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
1535 || GET_CODE (*src) == CONST_DOUBLE)))
1537 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1541 switch (GET_CODE (pat_src))
1544 compare_for_stack_reg (insn, regstack, pat_src);
1550 for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)];
1553 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1554 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1557 replace_reg (dest, FIRST_STACK_REG);
1561 /* This is a `tstM2' case. */
1562 if (*dest != cc0_rtx)
1568 case FLOAT_TRUNCATE:
1572 /* These insns only operate on the top of the stack. DEST might
1573 be cc0_rtx if we're processing a tstM pattern. Also, it's
1574 possible that the tstM case results in a REG_DEAD note on the
1578 src1 = get_true_reg (&XEXP (pat_src, 0));
1580 emit_swap_insn (insn, regstack, *src1);
1582 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1584 if (STACK_REG_P (*dest))
1585 replace_reg (dest, FIRST_STACK_REG);
1589 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1591 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1594 replace_reg (src1, FIRST_STACK_REG);
1599 /* On i386, reversed forms of subM3 and divM3 exist for
1600 MODE_FLOAT, so the same code that works for addM3 and mulM3
1604 /* These insns can accept the top of stack as a destination
1605 from a stack reg or mem, or can use the top of stack as a
1606 source and some other stack register (possibly top of stack)
1607 as a destination. */
1609 src1 = get_true_reg (&XEXP (pat_src, 0));
1610 src2 = get_true_reg (&XEXP (pat_src, 1));
1612 /* We will fix any death note later. */
1614 if (STACK_REG_P (*src1))
1615 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1617 src1_note = NULL_RTX;
1618 if (STACK_REG_P (*src2))
1619 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1621 src2_note = NULL_RTX;
1623 /* If either operand is not a stack register, then the dest
1624 must be top of stack. */
1626 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1627 emit_swap_insn (insn, regstack, *dest);
1630 /* Both operands are REG. If neither operand is already
1631 at the top of stack, choose to make the one that is the dest
1632 the new top of stack. */
1634 int src1_hard_regnum, src2_hard_regnum;
1636 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1637 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1638 if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
1641 if (src1_hard_regnum != FIRST_STACK_REG
1642 && src2_hard_regnum != FIRST_STACK_REG)
1643 emit_swap_insn (insn, regstack, *dest);
1646 if (STACK_REG_P (*src1))
1647 replace_reg (src1, get_hard_regnum (regstack, *src1));
1648 if (STACK_REG_P (*src2))
1649 replace_reg (src2, get_hard_regnum (regstack, *src2));
1653 rtx src1_reg = XEXP (src1_note, 0);
1655 /* If the register that dies is at the top of stack, then
1656 the destination is somewhere else - merely substitute it.
1657 But if the reg that dies is not at top of stack, then
1658 move the top of stack to the dead reg, as though we had
1659 done the insn and then a store-with-pop. */
1661 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1663 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1664 replace_reg (dest, get_hard_regnum (regstack, *dest));
1668 int regno = get_hard_regnum (regstack, src1_reg);
1670 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1671 replace_reg (dest, regno);
1673 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1674 = regstack->reg[regstack->top];
1677 CLEAR_HARD_REG_BIT (regstack->reg_set,
1678 REGNO (XEXP (src1_note, 0)));
1679 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1684 rtx src2_reg = XEXP (src2_note, 0);
1685 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1687 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1688 replace_reg (dest, get_hard_regnum (regstack, *dest));
1692 int regno = get_hard_regnum (regstack, src2_reg);
1694 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1695 replace_reg (dest, regno);
1697 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1698 = regstack->reg[regstack->top];
1701 CLEAR_HARD_REG_BIT (regstack->reg_set,
1702 REGNO (XEXP (src2_note, 0)));
1703 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1708 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1709 replace_reg (dest, get_hard_regnum (regstack, *dest));
1712 /* Keep operand 1 matching with destination. */
1713 if (COMMUTATIVE_ARITH_P (pat_src)
1714 && REG_P (*src1) && REG_P (*src2)
1715 && REGNO (*src1) != REGNO (*dest))
1717 int tmp = REGNO (*src1);
1718 replace_reg (src1, REGNO (*src2));
1719 replace_reg (src2, tmp);
1724 switch (XINT (pat_src, 1))
1728 case UNSPEC_FRNDINT:
1730 /* These insns only operate on the top of the stack. */
1732 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1734 emit_swap_insn (insn, regstack, *src1);
1736 /* Input should never die, it is
1737 replaced with output. */
1738 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1742 if (STACK_REG_P (*dest))
1743 replace_reg (dest, FIRST_STACK_REG);
1745 replace_reg (src1, FIRST_STACK_REG);
1750 /* These insns operate on the top two stack slots. */
1752 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1753 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1755 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1756 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1758 swap_to_top (insn, regstack, *src1, *src2);
1760 replace_reg (src1, FIRST_STACK_REG);
1761 replace_reg (src2, FIRST_STACK_REG + 1);
1764 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1766 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1768 /* Pop both input operands from the stack. */
1769 CLEAR_HARD_REG_BIT (regstack->reg_set,
1770 regstack->reg[regstack->top]);
1771 CLEAR_HARD_REG_BIT (regstack->reg_set,
1772 regstack->reg[regstack->top - 1]);
1775 /* Push the result back onto the stack. */
1776 regstack->reg[++regstack->top] = REGNO (*dest);
1777 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1778 replace_reg (dest, FIRST_STACK_REG);
1781 case UNSPEC_FSCALE_FRACT:
1782 /* These insns operate on the top two stack slots.
1783 first part of double input, double output insn. */
1785 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1786 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1788 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1789 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1791 /* Inputs should never die, they are
1792 replaced with outputs. */
1793 if ((src1_note) || (src2_note))
1796 swap_to_top (insn, regstack, *src1, *src2);
1798 /* Push the result back onto stack. Empty stack slot
1799 will be filled in second part of insn. */
1800 if (STACK_REG_P (*dest)) {
1801 regstack->reg[regstack->top] = REGNO (*dest);
1802 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1803 replace_reg (dest, FIRST_STACK_REG);
1806 replace_reg (src1, FIRST_STACK_REG);
1807 replace_reg (src2, FIRST_STACK_REG + 1);
1810 case UNSPEC_FSCALE_EXP:
1811 /* These insns operate on the top two stack slots./
1812 second part of double input, double output insn. */
1814 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1815 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1817 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1818 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1820 /* Inputs should never die, they are
1821 replaced with outputs. */
1822 if ((src1_note) || (src2_note))
1825 swap_to_top (insn, regstack, *src1, *src2);
1827 /* Push the result back onto stack. Fill empty slot from
1828 first part of insn and fix top of stack pointer. */
1829 if (STACK_REG_P (*dest)) {
1830 regstack->reg[regstack->top - 1] = REGNO (*dest);
1831 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1832 replace_reg (dest, FIRST_STACK_REG + 1);
1835 replace_reg (src1, FIRST_STACK_REG);
1836 replace_reg (src2, FIRST_STACK_REG + 1);
1839 case UNSPEC_SINCOS_COS:
1840 case UNSPEC_TAN_ONE:
1841 case UNSPEC_XTRACT_FRACT:
1842 /* These insns operate on the top two stack slots,
1843 first part of one input, double output insn. */
1845 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1847 emit_swap_insn (insn, regstack, *src1);
1849 /* Input should never die, it is
1850 replaced with output. */
1851 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1855 /* Push the result back onto stack. Empty stack slot
1856 will be filled in second part of insn. */
1857 if (STACK_REG_P (*dest)) {
1858 regstack->reg[regstack->top + 1] = REGNO (*dest);
1859 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1860 replace_reg (dest, FIRST_STACK_REG);
1863 replace_reg (src1, FIRST_STACK_REG);
1866 case UNSPEC_SINCOS_SIN:
1867 case UNSPEC_TAN_TAN:
1868 case UNSPEC_XTRACT_EXP:
1869 /* These insns operate on the top two stack slots,
1870 second part of one input, double output insn. */
1872 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1874 emit_swap_insn (insn, regstack, *src1);
1876 /* Input should never die, it is
1877 replaced with output. */
1878 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1882 /* Push the result back onto stack. Fill empty slot from
1883 first part of insn and fix top of stack pointer. */
1884 if (STACK_REG_P (*dest)) {
1885 regstack->reg[regstack->top] = REGNO (*dest);
1886 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1887 replace_reg (dest, FIRST_STACK_REG + 1);
1892 replace_reg (src1, FIRST_STACK_REG);
1896 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1897 The combination matches the PPRO fcomi instruction. */
1899 pat_src = XVECEXP (pat_src, 0, 0);
1900 if (GET_CODE (pat_src) != UNSPEC
1901 || XINT (pat_src, 1) != UNSPEC_FNSTSW)
1906 /* Combined fcomp+fnstsw generated for doing well with
1907 CSE. When optimizing this would have been broken
1910 pat_src = XVECEXP (pat_src, 0, 0);
1911 if (GET_CODE (pat_src) != COMPARE)
1914 compare_for_stack_reg (insn, regstack, pat_src);
1923 /* This insn requires the top of stack to be the destination. */
1925 src1 = get_true_reg (&XEXP (pat_src, 1));
1926 src2 = get_true_reg (&XEXP (pat_src, 2));
1928 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1929 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1931 /* If the comparison operator is an FP comparison operator,
1932 it is handled correctly by compare_for_stack_reg () who
1933 will move the destination to the top of stack. But if the
1934 comparison operator is not an FP comparison operator, we
1935 have to handle it here. */
1936 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1937 && REGNO (*dest) != regstack->reg[regstack->top])
1939 /* In case one of operands is the top of stack and the operands
1940 dies, it is safe to make it the destination operand by
1941 reversing the direction of cmove and avoid fxch. */
1942 if ((REGNO (*src1) == regstack->reg[regstack->top]
1944 || (REGNO (*src2) == regstack->reg[regstack->top]
1947 int idx1 = (get_hard_regnum (regstack, *src1)
1949 int idx2 = (get_hard_regnum (regstack, *src2)
1952 /* Make reg-stack believe that the operands are already
1953 swapped on the stack */
1954 regstack->reg[regstack->top - idx1] = REGNO (*src2);
1955 regstack->reg[regstack->top - idx2] = REGNO (*src1);
1957 /* Reverse condition to compensate the operand swap.
1958 i386 do have comparison always reversible. */
1959 PUT_CODE (XEXP (pat_src, 0),
1960 reversed_comparison_code (XEXP (pat_src, 0), insn));
1963 emit_swap_insn (insn, regstack, *dest);
1971 src_note[1] = src1_note;
1972 src_note[2] = src2_note;
1974 if (STACK_REG_P (*src1))
1975 replace_reg (src1, get_hard_regnum (regstack, *src1));
1976 if (STACK_REG_P (*src2))
1977 replace_reg (src2, get_hard_regnum (regstack, *src2));
1979 for (i = 1; i <= 2; i++)
1982 int regno = REGNO (XEXP (src_note[i], 0));
1984 /* If the register that dies is not at the top of
1985 stack, then move the top of stack to the dead reg */
1986 if (regno != regstack->reg[regstack->top])
1988 remove_regno_note (insn, REG_DEAD, regno);
1989 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1993 /* Top of stack never dies, as it is the
1999 /* Make dest the top of stack. Add dest to regstack if
2001 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
2002 regstack->reg[++regstack->top] = REGNO (*dest);
2003 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2004 replace_reg (dest, FIRST_STACK_REG);
2017 return control_flow_insn_deleted;
2020 /* Substitute hard regnums for any stack regs in INSN, which has
2021 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
2022 before the insn, and is updated with changes made here.
2024 There are several requirements and assumptions about the use of
2025 stack-like regs in asm statements. These rules are enforced by
2026 record_asm_stack_regs; see comments there for details. Any
2027 asm_operands left in the RTL at this point may be assume to meet the
2028 requirements, since record_asm_stack_regs removes any problem asm. */
2031 subst_asm_stack_regs (rtx insn, stack regstack)
2033 rtx body = PATTERN (insn);
2036 rtx *note_reg; /* Array of note contents */
2037 rtx **note_loc; /* Address of REG field of each note */
2038 enum reg_note *note_kind; /* The type of each note */
2040 rtx *clobber_reg = 0;
2041 rtx **clobber_loc = 0;
2043 struct stack_def temp_stack;
2048 int n_inputs, n_outputs;
2050 if (! check_asm_stack_operands (insn))
2053 /* Find out what the constraints required. If no constraint
2054 alternative matches, that is a compiler bug: we should have caught
2055 such an insn in check_asm_stack_operands. */
2056 extract_insn (insn);
2057 constrain_operands (1);
2058 alt = which_alternative;
2060 preprocess_constraints ();
2062 n_inputs = get_asm_operand_n_inputs (body);
2063 n_outputs = recog_data.n_operands - n_inputs;
2068 /* Strip SUBREGs here to make the following code simpler. */
2069 for (i = 0; i < recog_data.n_operands; i++)
2070 if (GET_CODE (recog_data.operand[i]) == SUBREG
2071 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
2073 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
2074 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
2077 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2079 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
2082 note_reg = alloca (i * sizeof (rtx));
2083 note_loc = alloca (i * sizeof (rtx *));
2084 note_kind = alloca (i * sizeof (enum reg_note));
2087 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2089 rtx reg = XEXP (note, 0);
2090 rtx *loc = & XEXP (note, 0);
2092 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
2094 loc = & SUBREG_REG (reg);
2095 reg = SUBREG_REG (reg);
2098 if (STACK_REG_P (reg)
2099 && (REG_NOTE_KIND (note) == REG_DEAD
2100 || REG_NOTE_KIND (note) == REG_UNUSED))
2102 note_reg[n_notes] = reg;
2103 note_loc[n_notes] = loc;
2104 note_kind[n_notes] = REG_NOTE_KIND (note);
2109 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2113 if (GET_CODE (body) == PARALLEL)
2115 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
2116 clobber_loc = alloca (XVECLEN (body, 0) * sizeof (rtx *));
2118 for (i = 0; i < XVECLEN (body, 0); i++)
2119 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2121 rtx clobber = XVECEXP (body, 0, i);
2122 rtx reg = XEXP (clobber, 0);
2123 rtx *loc = & XEXP (clobber, 0);
2125 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
2127 loc = & SUBREG_REG (reg);
2128 reg = SUBREG_REG (reg);
2131 if (STACK_REG_P (reg))
2133 clobber_reg[n_clobbers] = reg;
2134 clobber_loc[n_clobbers] = loc;
2140 temp_stack = *regstack;
2142 /* Put the input regs into the desired place in TEMP_STACK. */
2144 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2145 if (STACK_REG_P (recog_data.operand[i])
2146 && reg_class_subset_p (recog_op_alt[i][alt].class,
2148 && recog_op_alt[i][alt].class != FLOAT_REGS)
2150 /* If an operand needs to be in a particular reg in
2151 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2152 these constraints are for single register classes, and
2153 reload guaranteed that operand[i] is already in that class,
2154 we can just use REGNO (recog_data.operand[i]) to know which
2155 actual reg this operand needs to be in. */
2157 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2162 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2164 /* recog_data.operand[i] is not in the right place. Find
2165 it and swap it with whatever is already in I's place.
2166 K is where recog_data.operand[i] is now. J is where it
2170 k = temp_stack.top - (regno - FIRST_STACK_REG);
2172 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2174 temp = temp_stack.reg[k];
2175 temp_stack.reg[k] = temp_stack.reg[j];
2176 temp_stack.reg[j] = temp;
2180 /* Emit insns before INSN to make sure the reg-stack is in the right
2183 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2185 /* Make the needed input register substitutions. Do death notes and
2186 clobbers too, because these are for inputs, not outputs. */
2188 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2189 if (STACK_REG_P (recog_data.operand[i]))
2191 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2196 replace_reg (recog_data.operand_loc[i], regnum);
2199 for (i = 0; i < n_notes; i++)
2200 if (note_kind[i] == REG_DEAD)
2202 int regnum = get_hard_regnum (regstack, note_reg[i]);
2207 replace_reg (note_loc[i], regnum);
2210 for (i = 0; i < n_clobbers; i++)
2212 /* It's OK for a CLOBBER to reference a reg that is not live.
2213 Don't try to replace it in that case. */
2214 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2218 /* Sigh - clobbers always have QImode. But replace_reg knows
2219 that these regs can't be MODE_INT and will abort. Just put
2220 the right reg there without calling replace_reg. */
2222 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2226 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2228 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2229 if (STACK_REG_P (recog_data.operand[i]))
2231 /* An input reg is implicitly popped if it is tied to an
2232 output, or if there is a CLOBBER for it. */
2235 for (j = 0; j < n_clobbers; j++)
2236 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2239 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2241 /* recog_data.operand[i] might not be at the top of stack.
2242 But that's OK, because all we need to do is pop the
2243 right number of regs off of the top of the reg-stack.
2244 record_asm_stack_regs guaranteed that all implicitly
2245 popped regs were grouped at the top of the reg-stack. */
2247 CLEAR_HARD_REG_BIT (regstack->reg_set,
2248 regstack->reg[regstack->top]);
2253 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2254 Note that there isn't any need to substitute register numbers.
2255 ??? Explain why this is true. */
2257 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2259 /* See if there is an output for this hard reg. */
2262 for (j = 0; j < n_outputs; j++)
2263 if (STACK_REG_P (recog_data.operand[j])
2264 && REGNO (recog_data.operand[j]) == (unsigned) i)
2266 regstack->reg[++regstack->top] = i;
2267 SET_HARD_REG_BIT (regstack->reg_set, i);
2272 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2273 input that the asm didn't implicitly pop. If the asm didn't
2274 implicitly pop an input reg, that reg will still be live.
2276 Note that we can't use find_regno_note here: the register numbers
2277 in the death notes have already been substituted. */
2279 for (i = 0; i < n_outputs; i++)
2280 if (STACK_REG_P (recog_data.operand[i]))
2284 for (j = 0; j < n_notes; j++)
2285 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2286 && note_kind[j] == REG_UNUSED)
2288 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2294 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2295 if (STACK_REG_P (recog_data.operand[i]))
2299 for (j = 0; j < n_notes; j++)
2300 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2301 && note_kind[j] == REG_DEAD
2302 && TEST_HARD_REG_BIT (regstack->reg_set,
2303 REGNO (recog_data.operand[i])))
2305 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2312 /* Substitute stack hard reg numbers for stack virtual registers in
2313 INSN. Non-stack register numbers are not changed. REGSTACK is the
2314 current stack content. Insns may be emitted as needed to arrange the
2315 stack for the 387 based on the contents of the insn. Return whether
2316 a control flow insn was deleted in the process. */
2319 subst_stack_regs (rtx insn, stack regstack)
2321 rtx *note_link, note;
2322 bool control_flow_insn_deleted = false;
2325 if (GET_CODE (insn) == CALL_INSN)
2327 int top = regstack->top;
2329 /* If there are any floating point parameters to be passed in
2330 registers for this call, make sure they are in the right
2335 straighten_stack (PREV_INSN (insn), regstack);
2337 /* Now mark the arguments as dead after the call. */
2339 while (regstack->top >= 0)
2341 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2347 /* Do the actual substitution if any stack regs are mentioned.
2348 Since we only record whether entire insn mentions stack regs, and
2349 subst_stack_regs_pat only works for patterns that contain stack regs,
2350 we must check each pattern in a parallel here. A call_value_pop could
2353 if (stack_regs_mentioned (insn))
2355 int n_operands = asm_noperands (PATTERN (insn));
2356 if (n_operands >= 0)
2358 /* This insn is an `asm' with operands. Decode the operands,
2359 decide how many are inputs, and do register substitution.
2360 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2362 subst_asm_stack_regs (insn, regstack);
2363 return control_flow_insn_deleted;
2366 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2367 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2369 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2371 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
2372 XVECEXP (PATTERN (insn), 0, i)
2373 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i));
2374 control_flow_insn_deleted
2375 |= subst_stack_regs_pat (insn, regstack,
2376 XVECEXP (PATTERN (insn), 0, i));
2380 control_flow_insn_deleted
2381 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2384 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2385 REG_UNUSED will already have been dealt with, so just return. */
2387 if (GET_CODE (insn) == NOTE || INSN_DELETED_P (insn))
2388 return control_flow_insn_deleted;
2390 /* If there is a REG_UNUSED note on a stack register on this insn,
2391 the indicated reg must be popped. The REG_UNUSED note is removed,
2392 since the form of the newly emitted pop insn references the reg,
2393 making it no longer `unset'. */
2395 note_link = ®_NOTES (insn);
2396 for (note = *note_link; note; note = XEXP (note, 1))
2397 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2399 *note_link = XEXP (note, 1);
2400 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2403 note_link = &XEXP (note, 1);
2405 return control_flow_insn_deleted;
2408 /* Change the organization of the stack so that it fits a new basic
2409 block. Some registers might have to be popped, but there can never be
2410 a register live in the new block that is not now live.
2412 Insert any needed insns before or after INSN, as indicated by
2413 WHERE. OLD is the original stack layout, and NEW is the desired
2414 form. OLD is updated to reflect the code emitted, ie, it will be
2415 the same as NEW upon return.
2417 This function will not preserve block_end[]. But that information
2418 is no longer needed once this has executed. */
2421 change_stack (rtx insn, stack old, stack new, enum emit_where where)
2426 /* We will be inserting new insns "backwards". If we are to insert
2427 after INSN, find the next insn, and insert before it. */
2429 if (where == EMIT_AFTER)
2431 if (current_block && BB_END (current_block) == insn)
2433 insn = NEXT_INSN (insn);
2436 /* Pop any registers that are not needed in the new block. */
2438 for (reg = old->top; reg >= 0; reg--)
2439 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2440 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2445 /* If the new block has never been processed, then it can inherit
2446 the old stack order. */
2448 new->top = old->top;
2449 memcpy (new->reg, old->reg, sizeof (new->reg));
2453 /* This block has been entered before, and we must match the
2454 previously selected stack order. */
2456 /* By now, the only difference should be the order of the stack,
2457 not their depth or liveliness. */
2459 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2462 if (old->top != new->top)
2465 /* If the stack is not empty (new->top != -1), loop here emitting
2466 swaps until the stack is correct.
2468 The worst case number of swaps emitted is N + 2, where N is the
2469 depth of the stack. In some cases, the reg at the top of
2470 stack may be correct, but swapped anyway in order to fix
2471 other regs. But since we never swap any other reg away from
2472 its correct slot, this algorithm will converge. */
2477 /* Swap the reg at top of stack into the position it is
2478 supposed to be in, until the correct top of stack appears. */
2480 while (old->reg[old->top] != new->reg[new->top])
2482 for (reg = new->top; reg >= 0; reg--)
2483 if (new->reg[reg] == old->reg[old->top])
2489 emit_swap_insn (insn, old,
2490 FP_MODE_REG (old->reg[reg], DFmode));
2493 /* See if any regs remain incorrect. If so, bring an
2494 incorrect reg to the top of stack, and let the while loop
2497 for (reg = new->top; reg >= 0; reg--)
2498 if (new->reg[reg] != old->reg[reg])
2500 emit_swap_insn (insn, old,
2501 FP_MODE_REG (old->reg[reg], DFmode));
2506 /* At this point there must be no differences. */
2508 for (reg = old->top; reg >= 0; reg--)
2509 if (old->reg[reg] != new->reg[reg])
2514 BB_END (current_block) = PREV_INSN (insn);
2517 /* Print stack configuration. */
2520 print_stack (FILE *file, stack s)
2526 fprintf (file, "uninitialized\n");
2527 else if (s->top == -1)
2528 fprintf (file, "empty\n");
2533 for (i = 0; i <= s->top; ++i)
2534 fprintf (file, "%d ", s->reg[i]);
2535 fputs ("]\n", file);
2539 /* This function was doing life analysis. We now let the regular live
2540 code do it's job, so we only need to check some extra invariants
2541 that reg-stack expects. Primary among these being that all registers
2542 are initialized before use.
2544 The function returns true when code was emitted to CFG edges and
2545 commit_edge_insertions needs to be called. */
2548 convert_regs_entry (void)
2554 FOR_EACH_BB_REVERSE (block)
2556 block_info bi = BLOCK_INFO (block);
2559 /* Set current register status at last instruction `uninitialized'. */
2560 bi->stack_in.top = -2;
2562 /* Copy live_at_end and live_at_start into temporaries. */
2563 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
2565 if (REGNO_REG_SET_P (block->global_live_at_end, reg))
2566 SET_HARD_REG_BIT (bi->out_reg_set, reg);
2567 if (REGNO_REG_SET_P (block->global_live_at_start, reg))
2568 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
2572 /* Load something into each stack register live at function entry.
2573 Such live registers can be caused by uninitialized variables or
2574 functions not returning values on all paths. In order to keep
2575 the push/pop code happy, and to not scrog the register stack, we
2576 must put something in these registers. Use a QNaN.
2578 Note that we are inserting converted code here. This code is
2579 never seen by the convert_regs pass. */
2581 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2583 basic_block block = e->dest;
2584 block_info bi = BLOCK_INFO (block);
2587 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2588 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2592 bi->stack_in.reg[++top] = reg;
2594 init = gen_rtx_SET (VOIDmode,
2595 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2597 insert_insn_on_edge (init, e);
2601 bi->stack_in.top = top;
2607 /* Construct the desired stack for function exit. This will either
2608 be `empty', or the function return value at top-of-stack. */
2611 convert_regs_exit (void)
2613 int value_reg_low, value_reg_high;
2617 retvalue = stack_result (current_function_decl);
2618 value_reg_low = value_reg_high = -1;
2621 value_reg_low = REGNO (retvalue);
2622 value_reg_high = value_reg_low
2623 + hard_regno_nregs[value_reg_low][GET_MODE (retvalue)] - 1;
2626 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2627 if (value_reg_low == -1)
2628 output_stack->top = -1;
2633 output_stack->top = value_reg_high - value_reg_low;
2634 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2636 output_stack->reg[value_reg_high - reg] = reg;
2637 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2642 /* Adjust the stack of this block on exit to match the stack of the
2643 target block, or copy stack info into the stack of the successor
2644 of the successor hasn't been processed yet. */
2646 compensate_edge (edge e, FILE *file)
2648 basic_block block = e->src, target = e->dest;
2649 block_info bi = BLOCK_INFO (block);
2650 struct stack_def regstack, tmpstack;
2651 stack target_stack = &BLOCK_INFO (target)->stack_in;
2654 current_block = block;
2655 regstack = bi->stack_out;
2657 fprintf (file, "Edge %d->%d: ", block->index, target->index);
2659 if (target_stack->top == -2)
2661 /* The target block hasn't had a stack order selected.
2662 We need merely ensure that no pops are needed. */
2663 for (reg = regstack.top; reg >= 0; --reg)
2664 if (!TEST_HARD_REG_BIT (target_stack->reg_set, regstack.reg[reg]))
2670 fprintf (file, "new block; copying stack position\n");
2672 /* change_stack kills values in regstack. */
2673 tmpstack = regstack;
2675 change_stack (BB_END (block), &tmpstack, target_stack, EMIT_AFTER);
2680 fprintf (file, "new block; pops needed\n");
2684 if (target_stack->top == regstack.top)
2686 for (reg = target_stack->top; reg >= 0; --reg)
2687 if (target_stack->reg[reg] != regstack.reg[reg])
2693 fprintf (file, "no changes needed\n");
2700 fprintf (file, "correcting stack to ");
2701 print_stack (file, target_stack);
2705 /* Care for non-call EH edges specially. The normal return path have
2706 values in registers. These will be popped en masse by the unwind
2708 if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH)
2709 target_stack->top = -1;
2711 /* Other calls may appear to have values live in st(0), but the
2712 abnormal return path will not have actually loaded the values. */
2713 else if (e->flags & EDGE_ABNORMAL_CALL)
2715 /* Assert that the lifetimes are as we expect -- one value
2716 live at st(0) on the end of the source block, and no
2717 values live at the beginning of the destination block. */
2720 CLEAR_HARD_REG_SET (tmp);
2721 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1);
2725 /* We are sure that there is st(0) live, otherwise we won't compensate.
2726 For complex return values, we may have st(1) live as well. */
2727 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG);
2728 if (TEST_HARD_REG_BIT (regstack.reg_set, FIRST_STACK_REG + 1))
2729 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG + 1);
2730 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2);
2734 target_stack->top = -1;
2737 /* It is better to output directly to the end of the block
2738 instead of to the edge, because emit_swap can do minimal
2739 insn scheduling. We can do this when there is only one
2740 edge out, and it is not abnormal. */
2741 else if (block->succ->succ_next == NULL && !(e->flags & EDGE_ABNORMAL))
2743 /* change_stack kills values in regstack. */
2744 tmpstack = regstack;
2746 change_stack (BB_END (block), &tmpstack, target_stack,
2747 (GET_CODE (BB_END (block)) == JUMP_INSN
2748 ? EMIT_BEFORE : EMIT_AFTER));
2754 /* We don't support abnormal edges. Global takes care to
2755 avoid any live register across them, so we should never
2756 have to insert instructions on such edges. */
2757 if (e->flags & EDGE_ABNORMAL)
2760 current_block = NULL;
2763 /* ??? change_stack needs some point to emit insns after. */
2764 after = emit_note (NOTE_INSN_DELETED);
2766 tmpstack = regstack;
2767 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE);
2772 insert_insn_on_edge (seq, e);
2778 /* Convert stack register references in one block. */
2781 convert_regs_1 (FILE *file, basic_block block)
2783 struct stack_def regstack;
2784 block_info bi = BLOCK_INFO (block);
2785 int deleted, inserted, reg;
2787 edge e, beste = NULL;
2788 bool control_flow_insn_deleted = false;
2792 any_malformed_asm = false;
2794 /* Find the edge we will copy stack from. It should be the most frequent
2795 one as it will get cheapest after compensation code is generated,
2796 if multiple such exists, take one with largest count, prefer critical
2797 one (as splitting critical edges is more expensive), or one with lowest
2798 index, to avoid random changes with different orders of the edges. */
2799 for (e = block->pred; e ; e = e->pred_next)
2801 if (e->flags & EDGE_DFS_BACK)
2805 else if (EDGE_FREQUENCY (beste) < EDGE_FREQUENCY (e))
2807 else if (EDGE_FREQUENCY (beste) > EDGE_FREQUENCY (e))
2809 else if (beste->count < e->count)
2811 else if (beste->count > e->count)
2813 else if ((EDGE_CRITICAL_P (e) != 0)
2814 != (EDGE_CRITICAL_P (beste) != 0))
2816 if (EDGE_CRITICAL_P (e))
2819 else if (e->src->index < beste->src->index)
2823 /* Initialize stack at block entry. */
2824 if (bi->stack_in.top == -2)
2827 inserted |= compensate_edge (beste, file);
2830 /* No predecessors. Create an arbitrary input stack. */
2833 bi->stack_in.top = -1;
2834 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2835 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2836 bi->stack_in.reg[++bi->stack_in.top] = reg;
2840 /* Entry blocks do have stack already initialized. */
2843 current_block = block;
2847 fprintf (file, "\nBasic block %d\nInput stack: ", block->index);
2848 print_stack (file, &bi->stack_in);
2851 /* Process all insns in this block. Keep track of NEXT so that we
2852 don't process insns emitted while substituting in INSN. */
2853 next = BB_HEAD (block);
2854 regstack = bi->stack_in;
2858 next = NEXT_INSN (insn);
2860 /* Ensure we have not missed a block boundary. */
2863 if (insn == BB_END (block))
2866 /* Don't bother processing unless there is a stack reg
2867 mentioned or if it's a CALL_INSN. */
2868 if (stack_regs_mentioned (insn)
2869 || GET_CODE (insn) == CALL_INSN)
2873 fprintf (file, " insn %d input stack: ",
2875 print_stack (file, ®stack);
2877 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack);
2884 fprintf (file, "Expected live registers [");
2885 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2886 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2887 fprintf (file, " %d", reg);
2888 fprintf (file, " ]\nOutput stack: ");
2889 print_stack (file, ®stack);
2892 insn = BB_END (block);
2893 if (GET_CODE (insn) == JUMP_INSN)
2894 insn = PREV_INSN (insn);
2896 /* If the function is declared to return a value, but it returns one
2897 in only some cases, some registers might come live here. Emit
2898 necessary moves for them. */
2900 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2902 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2903 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2909 fprintf (file, "Emitting insn initializing reg %d\n",
2913 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode),
2915 insn = emit_insn_after (set, insn);
2916 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack);
2920 /* Amongst the insns possibly deleted during the substitution process above,
2921 might have been the only trapping insn in the block. We purge the now
2922 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
2923 called at the end of convert_regs. The order in which we process the
2924 blocks ensures that we never delete an already processed edge.
2926 Note that, at this point, the CFG may have been damaged by the emission
2927 of instructions after an abnormal call, which moves the basic block end
2928 (and is the reason why we call fixup_abnormal_edges later). So we must
2929 be sure that the trapping insn has been deleted before trying to purge
2930 dead edges, otherwise we risk purging valid edges.
2932 ??? We are normally supposed not to delete trapping insns, so we pretend
2933 that the insns deleted above don't actually trap. It would have been
2934 better to detect this earlier and avoid creating the EH edge in the first
2935 place, still, but we don't have enough information at that time. */
2937 if (control_flow_insn_deleted)
2938 purge_dead_edges (block);
2940 /* Something failed if the stack lives don't match. If we had malformed
2941 asms, we zapped the instruction itself, but that didn't produce the
2942 same pattern of register kills as before. */
2943 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2944 if (!any_malformed_asm)
2947 bi->stack_out = regstack;
2949 /* Compensate the back edges, as those wasn't visited yet. */
2950 for (e = block->succ; e ; e = e->succ_next)
2952 if (e->flags & EDGE_DFS_BACK
2953 || (e->dest == EXIT_BLOCK_PTR))
2955 if (!BLOCK_INFO (e->dest)->done
2956 && e->dest != block)
2958 inserted |= compensate_edge (e, file);
2961 for (e = block->pred; e ; e = e->pred_next)
2963 if (e != beste && !(e->flags & EDGE_DFS_BACK)
2964 && e->src != ENTRY_BLOCK_PTR)
2966 if (!BLOCK_INFO (e->src)->done)
2968 inserted |= compensate_edge (e, file);
2975 /* Convert registers in all blocks reachable from BLOCK. */
2978 convert_regs_2 (FILE *file, basic_block block)
2980 basic_block *stack, *sp;
2983 /* We process the blocks in a top-down manner, in a way such that one block
2984 is only processed after all its predecessors. The number of predecessors
2985 of every block has already been computed. */
2987 stack = xmalloc (sizeof (*stack) * n_basic_blocks);
2999 /* Processing BLOCK is achieved by convert_regs_1, which may purge
3000 some dead EH outgoing edge after the deletion of the trapping
3001 insn inside the block. Since the number of predecessors of
3002 BLOCK's successors was computed based on the initial edge set,
3003 we check the necessity to process some of these successors
3004 before such an edge deletion may happen. However, there is
3005 a pitfall: if BLOCK is the only predecessor of a successor and
3006 the edge between them happens to be deleted, the successor
3007 becomes unreachable and should not be processed. The problem
3008 is that there is no way to preventively detect this case so we
3009 stack the successor in all cases and hand over the task of
3010 fixing up the discrepancy to convert_regs_1. */
3012 for (e = block->succ; e ; e = e->succ_next)
3013 if (! (e->flags & EDGE_DFS_BACK))
3015 BLOCK_INFO (e->dest)->predecessors--;
3016 if (!BLOCK_INFO (e->dest)->predecessors)
3020 inserted |= convert_regs_1 (file, block);
3021 BLOCK_INFO (block)->done = 1;
3023 while (sp != stack);
3028 /* Traverse all basic blocks in a function, converting the register
3029 references in each insn from the "flat" register file that gcc uses,
3030 to the stack-like registers the 387 uses. */
3033 convert_regs (FILE *file)
3039 /* Initialize uninitialized registers on function entry. */
3040 inserted = convert_regs_entry ();
3042 /* Construct the desired stack for function exit. */
3043 convert_regs_exit ();
3044 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
3046 /* ??? Future: process inner loops first, and give them arbitrary
3047 initial stacks which emit_swap_insn can modify. This ought to
3048 prevent double fxch that aften appears at the head of a loop. */
3050 /* Process all blocks reachable from all entry points. */
3051 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
3052 inserted |= convert_regs_2 (file, e->dest);
3054 /* ??? Process all unreachable blocks. Though there's no excuse
3055 for keeping these even when not optimizing. */
3058 block_info bi = BLOCK_INFO (b);
3061 inserted |= convert_regs_2 (file, b);
3063 clear_aux_for_blocks ();
3065 fixup_abnormal_edges ();
3067 commit_edge_insertions ();
3074 #endif /* STACK_REGS */
3076 #include "gt-reg-stack.h"