1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20 /* This pass converts stack-like registers from the "flat register
21 file" model that gcc uses, to a stack convention that the 387 uses.
23 * The form of the input:
25 On input, the function consists of insn that have had their
26 registers fully allocated to a set of "virtual" registers. Note that
27 the word "virtual" is used differently here than elsewhere in gcc: for
28 each virtual stack reg, there is a hard reg, but the mapping between
29 them is not known until this pass is run. On output, hard register
30 numbers have been substituted, and various pop and exchange insns have
31 been emitted. The hard register numbers and the virtual register
32 numbers completely overlap - before this pass, all stack register
33 numbers are virtual, and afterward they are all hard.
35 The virtual registers can be manipulated normally by gcc, and their
36 semantics are the same as for normal registers. After the hard
37 register numbers are substituted, the semantics of an insn containing
38 stack-like regs are not the same as for an insn with normal regs: for
39 instance, it is not safe to delete an insn that appears to be a no-op
40 move. In general, no insn containing hard regs should be changed
41 after this pass is done.
43 * The form of the output:
45 After this pass, hard register numbers represent the distance from
46 the current top of stack to the desired register. A reference to
47 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
48 represents the register just below that, and so forth. Also, REG_DEAD
49 notes indicate whether or not a stack register should be popped.
51 A "swap" insn looks like a parallel of two patterns, where each
52 pattern is a SET: one sets A to B, the other B to A.
54 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
55 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
56 will replace the existing stack top, not push a new value.
58 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
59 SET_SRC is REG or MEM.
61 The case where both the SET_SRC and SET_DEST FIRST_STACK_REG
62 appears ambiguous. As a special case, the presence of a REG_DEAD note
63 for FIRST_STACK_REG differentiates between a load insn and a pop.
65 If a REG_DEAD is present, the insn represents a "pop" that discards
66 the top of the register stack. If there is no REG_DEAD note, then the
67 insn represents a "dup" or a push of the current top of stack onto the
72 Existing REG_DEAD and REG_UNUSED notes for stack registers are
73 deleted and recreated from scratch. REG_DEAD is never created for a
74 SET_DEST, only REG_UNUSED.
76 Before life analysis, the mode of each insn is set based on whether
77 or not any stack registers are mentioned within that insn. VOIDmode
78 means that no regs are mentioned anyway, and QImode means that at
79 least one pattern within the insn mentions stack registers. This
80 information is valid until after reg_to_stack returns, and is used
85 There are several rules on the usage of stack-like regs in
86 asm_operands insns. These rules apply only to the operands that are
89 1. Given a set of input regs that die in an asm_operands, it is
90 necessary to know which are implicitly popped by the asm, and
91 which must be explicitly popped by gcc.
93 An input reg that is implicitly popped by the asm must be
94 explicitly clobbered, unless it is constrained to match an
97 2. For any input reg that is implicitly popped by an asm, it is
98 necessary to know how to adjust the stack to compensate for the pop.
99 If any non-popped input is closer to the top of the reg-stack than
100 the implicitly popped reg, it would not be possible to know what the
101 stack looked like - it's not clear how the rest of the stack "slides
104 All implicitly popped input regs must be closer to the top of
105 the reg-stack than any input that is not implicitly popped.
107 3. It is possible that if an input dies in an insn, reload might
108 use the input reg for an output reload. Consider this example:
110 asm ("foo" : "=t" (a) : "f" (b));
112 This asm says that input B is not popped by the asm, and that
113 the asm pushes a result onto the reg-stack, ie, the stack is one
114 deeper after the asm than it was before. But, it is possible that
115 reload will think that it can use the same reg for both the input and
116 the output, if input B dies in this insn.
118 If any input operand uses the "f" constraint, all output reg
119 constraints must use the "&" earlyclobber.
121 The asm above would be written as
123 asm ("foo" : "=&t" (a) : "f" (b));
125 4. Some operands need to be in particular places on the stack. All
126 output operands fall in this category - there is no other way to
127 know which regs the outputs appear in unless the user indicates
128 this in the constraints.
130 Output operands must specifically indicate which reg an output
131 appears in after an asm. "=f" is not allowed: the operand
132 constraints must select a class with a single reg.
134 5. Output operands may not be "inserted" between existing stack regs.
135 Since no 387 opcode uses a read/write operand, all output operands
136 are dead before the asm_operands, and are pushed by the asm_operands.
137 It makes no sense to push anywhere but the top of the reg-stack.
139 Output operands must start at the top of the reg-stack: output
140 operands may not "skip" a reg.
142 6. Some asm statements may need extra stack space for internal
143 calculations. This can be guaranteed by clobbering stack registers
144 unrelated to the inputs and outputs.
146 Here are a couple of reasonable asms to want to write. This asm
147 takes one input, which is internally popped, and produces two outputs.
149 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
151 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
152 and replaces them with one output. The user must code the "st(1)"
153 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
155 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
163 #include "insn-config.h"
165 #include "hard-reg-set.h"
170 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
172 /* True if the current function returns a real value. */
173 static int current_function_returns_real;
175 /* This is the basic stack record. TOP is an index into REG[] such
176 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
178 If TOP is -2 the stack is not yet initialized: reg_set indicates
179 which registers are live. Stack initialization consists of placing
180 each live reg in array `reg' and setting `top' appropriately. */
182 typedef struct stack_def
184 int top; /* index to top stack element */
185 HARD_REG_SET reg_set; /* set of live registers */
186 char reg[REG_STACK_SIZE]; /* register - stack mapping */
189 /* highest instruction uid */
190 static int max_uid = 0;
192 /* Number of basic blocks in the current function. */
195 /* Element N is first insn in basic block N.
196 This info lasts until we finish compiling the function. */
197 static rtx *block_begin;
199 /* Element N is last insn in basic block N.
200 This info lasts until we finish compiling the function. */
201 static rtx *block_end;
203 /* Element N is nonzero if control can drop into basic block N */
204 static char *block_drops_in;
206 /* Element N says all about the stack at entry block N */
207 static stack block_stack_in;
209 /* Element N says all about the stack life at the end of block N */
210 static HARD_REG_SET *block_out_reg_set;
212 /* This is where the BLOCK_NUM values are really stored. This is set
213 up by find_blocks and used there and in life_analysis. It can be used
214 later, but only to look up an insn that is the head or tail of some
215 block. life_analysis and the stack register conversion process can
216 add insns within a block. */
217 static short *block_number;
219 /* This is the register file for all register after conversion */
220 static rtx FP_mode_reg[FIRST_PSEUDO_REGISTER][(int) MAX_MACHINE_MODE];
222 /* Get the basic block number of an insn. See note at block_number
223 definition are validity of this information. */
225 #define BLOCK_NUM(INSN) \
226 (((INSN_UID (INSN) > max_uid) \
227 ? (short *)(abort() , 0) \
228 : block_number)[INSN_UID (INSN)])
230 extern rtx gen_jump ();
231 extern rtx gen_movdf ();
232 extern rtx find_regno_note ();
233 extern rtx emit_jump_insn_before ();
234 extern rtx emit_label_after ();
236 /* Forward declarations */
238 static void find_blocks ();
239 static void stack_reg_life_analysis ();
240 static void change_stack ();
241 static void convert_regs ();
242 static void dump_stack_info ();
244 /* Return non-zero if any stack register is mentioned somewhere within
248 stack_regs_mentioned_p (pat)
254 if (STACK_REG_P (pat))
257 fmt = GET_RTX_FORMAT (GET_CODE (pat));
258 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
264 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
265 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
268 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
275 /* Convert register usage from "flat" register file usage to a "stack
276 register file. FIRST is the first insn in the function, FILE is the
279 First compute the beginning and end of each basic block. Do a
280 register life analysis on the stack registers, recording the result
281 for the head and tail of each basic block. The convert each insn one
282 by one. Run a last jump_optimize() pass, if optimizing, to eliminate
283 any cross-jumping created when the converter inserts pop insns.*/
286 reg_to_stack (first, file)
292 int stack_reg_seen = 0;
293 enum machine_mode mode;
295 current_function_returns_real
296 = TREE_CODE (TREE_TYPE (DECL_RESULT (current_function_decl))) == REAL_TYPE;
298 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
299 mode = GET_MODE_WIDER_MODE (mode))
300 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
301 FP_mode_reg[i][(int) mode] = gen_rtx (REG, mode, i);
303 /* Count the basic blocks. Also find maximum insn uid. */
305 register RTX_CODE prev_code = JUMP_INSN;
306 register RTX_CODE code;
310 for (insn = first; insn; insn = NEXT_INSN (insn))
312 /* Note that this loop must select the same block boundaries
313 as code in find_blocks. */
315 if (INSN_UID (insn) > max_uid)
316 max_uid = INSN_UID (insn);
318 code = GET_CODE (insn);
320 if (code == CODE_LABEL
321 || (prev_code != INSN
322 && prev_code != CALL_INSN
323 && prev_code != CODE_LABEL
324 && (code == INSN || code == CALL_INSN || code == JUMP_INSN)))
327 /* Remember whether or not this insn mentions an FP regs.
328 Check JUMP_INSNs too, in case someone creates a funny PARALLEL. */
330 if ((GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
331 || GET_CODE (insn) == JUMP_INSN)
332 && stack_regs_mentioned_p (PATTERN (insn)))
335 PUT_MODE (insn, QImode);
338 PUT_MODE (insn, VOIDmode);
345 /* If no stack register reference exists in this insn, there isn't
346 anything to convert. */
348 if (! stack_reg_seen)
351 /* If there are stack registers, there must be at least one block. */
356 /* Allocate some tables that last till end of compiling this function
357 and some needed only in find_blocks and life_analysis. */
359 block_begin = (rtx *) alloca (blocks * sizeof (rtx));
360 block_end = (rtx *) alloca (blocks * sizeof (rtx));
361 block_drops_in = (char *) alloca (blocks);
363 block_stack_in = (stack) alloca (blocks * sizeof (struct stack_def));
364 block_out_reg_set = (HARD_REG_SET *) alloca (blocks * sizeof (HARD_REG_SET));
365 bzero (block_stack_in, blocks * sizeof (struct stack_def));
366 bzero (block_out_reg_set, blocks * sizeof (HARD_REG_SET));
368 block_number = (short *) alloca ((max_uid + 1) * sizeof (short));
371 stack_reg_life_analysis (first);
373 /* Dump the life analysis debug information before jump
374 optimization, as that will destroy the LABEL_REFS we keep the
378 dump_stack_info (file);
383 jump_optimize (first, 2, 0, 0);
386 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
387 label's chain of references, and note which insn contains each
391 record_label_references (insn, pat)
394 register enum rtx_code code = GET_CODE (pat);
398 if (code == LABEL_REF)
400 register rtx label = XEXP (pat, 0);
403 if (GET_CODE (label) != CODE_LABEL)
406 /* Don't make a duplicate in the code_label's chain. */
408 for (ref = LABEL_REFS (label); ref != label; ref = LABEL_NEXTREF (ref))
409 if (CONTAINING_INSN (ref) == insn)
412 CONTAINING_INSN (pat) = insn;
413 LABEL_NEXTREF (pat) = LABEL_REFS (label);
414 LABEL_REFS (label) = pat;
419 fmt = GET_RTX_FORMAT (code);
420 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
423 record_label_references (insn, XEXP (pat, i));
427 for (j = 0; j < XVECLEN (pat, i); j++)
428 record_label_references (insn, XVECEXP (pat, i, j));
433 /* Return a pointer to the REG expression within PAT. If PAT is not a
434 REG, possible enclosed by a conversion rtx, return the inner part of
435 PAT that stopped the search. */
441 while (GET_CODE (*pat) == SUBREG
442 || GET_CODE (*pat) == FLOAT
443 || GET_CODE (*pat) == FIX
444 || GET_CODE (*pat) == FLOAT_EXTEND
445 || GET_CODE (*pat) == FLOAT_TRUNCATE)
446 pat = & XEXP (*pat, 0);
451 /* If REG is a stack register that is marked dead in REGSTACK, then
452 record that it is now live. If REG is not DEST, add a death note to
453 INSN if there isn't one already. If DEST is not a reg, it is safe to
454 assume that it does not mention a reg anywhere within. */
457 record_note_if_dead (insn, regstack, reg, dest)
462 reg = * get_true_reg (& reg);
464 if (STACK_REG_P (reg))
466 if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (reg)))
468 if ((! REG_P (dest) || REGNO (dest) != REGNO (reg))
469 && ! find_regno_note (insn, REG_DEAD, REGNO (reg)))
470 REG_NOTES (insn) = gen_rtx (EXPR_LIST,
471 REG_DEAD, reg, REG_NOTES (insn));
473 SET_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
477 if (stack_regs_mentioned_p (reg))
481 /* Scan the OPERANDS and OPERAND_CONSTRAINTS of an asm_operands.
482 N_OPERANDS is the total number of operands. Return which alternative
483 matched, or -1 is no alternative matches.
485 OPERAND_MATCHES is an array which indicates which operand this
486 operand matches due to the constraints, or -1 if no match is required.
487 If two operands match by coincidence, but are not required to match by
488 the constraints, -1 is returned.
490 OPERAND_CLASS is an array which indicates the smallest class
491 required by the constraints. If the alternative that matches calls
492 for some class `class', and the operand matches a subclass of `class',
493 OPERAND_CLASS is set to `class' as required by the constraints, not to
494 the subclass. If an alternative allows more than one class,
495 OPERAND_CLASS is set to the smallest class that is a union of the
499 constrain_asm_operands (n_operands, operands, operand_constraints,
500 operand_matches, operand_class)
503 char **operand_constraints;
504 int *operand_matches;
505 enum reg_class *operand_class;
507 char **constraints = (char **) alloca (n_operands * sizeof (char *));
509 int this_alternative, this_operand;
513 for (j = 0; j < n_operands; j++)
514 constraints[j] = operand_constraints[j];
516 /* Compute the number of alternatives in the operands. reload has
517 already guaranteed that all operands have the same number of
521 for (q = constraints[0]; *q; q++)
522 n_alternatives += (*q == ',');
524 this_alternative = 0;
525 while (this_alternative < n_alternatives)
530 /* No operands match, no narrow class requirements yet. */
531 for (i = 0; i < n_operands; i++)
533 operand_matches[i] = -1;
534 operand_class[i] = NO_REGS;
537 for (this_operand = 0; this_operand < n_operands; this_operand++)
539 rtx op = operands[this_operand];
540 enum machine_mode mode = GET_MODE (op);
541 char *p = constraints[this_operand];
546 if (GET_CODE (op) == SUBREG)
548 if (GET_CODE (SUBREG_REG (op)) == REG
549 && REGNO (SUBREG_REG (op)) < FIRST_PSEUDO_REGISTER)
550 offset = SUBREG_WORD (op);
551 op = SUBREG_REG (op);
554 /* An empty constraint or empty alternative
555 allows anything which matched the pattern. */
556 if (*p == 0 || *p == ',')
559 while (*p && (c = *p++) != ',')
579 /* This operand must be the same as a previous one.
580 This kind of constraint is used for instructions such
581 as add when they take only two operands.
583 Note that the lower-numbered operand is passed first. */
585 if (operands_match_p (operands[c - '0'],
586 operands[this_operand]))
588 operand_matches[this_operand] = c - '0';
594 /* p is used for address_operands. Since this is an asm,
595 just to make sure that the operand is valid for Pmode. */
597 if (strict_memory_address_p (Pmode, op))
602 /* Anything goes unless it is a REG and really has a hard reg
603 but the hard reg is not in the class GENERAL_REGS. */
604 if (GENERAL_REGS == ALL_REGS
605 || GET_CODE (op) != REG
606 || reg_fits_class_p (op, GENERAL_REGS, offset, mode))
608 if (GET_CODE (op) == REG)
609 operand_class[this_operand]
610 = reg_class_subunion[(int) operand_class[this_operand]][(int) GENERAL_REGS];
616 if (GET_CODE (op) == REG
617 && (GENERAL_REGS == ALL_REGS
618 || reg_fits_class_p (op, GENERAL_REGS, offset, mode)))
620 operand_class[this_operand]
621 = reg_class_subunion[(int) operand_class[this_operand]][(int) GENERAL_REGS];
627 /* This is used for a MATCH_SCRATCH in the cases when we
628 don't actually need anything. So anything goes any time. */
633 if (GET_CODE (op) == MEM)
638 if (GET_CODE (op) == MEM
639 && (GET_CODE (XEXP (op, 0)) == PRE_DEC
640 || GET_CODE (XEXP (op, 0)) == POST_DEC))
645 if (GET_CODE (op) == MEM
646 && (GET_CODE (XEXP (op, 0)) == PRE_INC
647 || GET_CODE (XEXP (op, 0)) == POST_INC))
652 /* Match any CONST_DOUBLE, but only if
653 we can examine the bits of it reliably. */
654 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
655 || HOST_BITS_PER_INT != BITS_PER_WORD)
656 && GET_CODE (op) != VOIDmode && ! flag_pretend_float)
658 if (GET_CODE (op) == CONST_DOUBLE)
663 if (GET_CODE (op) == CONST_DOUBLE)
669 if (GET_CODE (op) == CONST_DOUBLE
670 && CONST_DOUBLE_OK_FOR_LETTER_P (op, c))
675 if (GET_CODE (op) == CONST_INT
676 || (GET_CODE (op) == CONST_DOUBLE
677 && GET_MODE (op) == VOIDmode))
686 if (GET_CODE (op) == CONST_INT
687 || (GET_CODE (op) == CONST_DOUBLE
688 && GET_MODE (op) == VOIDmode))
700 if (GET_CODE (op) == CONST_INT
701 && CONST_OK_FOR_LETTER_P (INTVAL (op), c))
705 #ifdef EXTRA_CONSTRAINT
711 if (EXTRA_CONSTRAINT (op, c))
717 if (GET_CODE (op) == MEM && ! offsettable_memref_p (op))
722 if (offsettable_memref_p (op))
727 if (GET_CODE (op) == REG
728 && reg_fits_class_p (op, REG_CLASS_FROM_LETTER (c),
731 operand_class[this_operand]
732 = reg_class_subunion[(int)operand_class[this_operand]][(int) REG_CLASS_FROM_LETTER (c)];
737 constraints[this_operand] = p;
738 /* If this operand did not win somehow,
739 this alternative loses. */
743 /* This alternative won; the operands are ok.
744 Change whichever operands this alternative says to change. */
751 /* For operands constrained to match another operand, copy the other
752 operand's class to this operand's class. */
753 for (j = 0; j < n_operands; j++)
754 if (operand_matches[j] >= 0)
755 operand_class[j] = operand_class[operand_matches[j]];
757 return this_alternative == n_alternatives ? -1 : this_alternative;
760 /* Record the life info of each stack reg in INSN, updating REGSTACK.
761 N_INPUTS is the number of inputs; N_OUTPUTS the outputs. CONSTRAINTS
762 is an array of the constraint strings used in the asm statement.
763 OPERANDS is an array of all operands for the insn, and is assumed to
764 contain all output operands, then all inputs operands.
766 There are many rules that an asm statement for stack-like regs must
767 follow. Those rules are explained at the top of this file: the rule
768 numbers below refer to that explanation. */
771 record_asm_reg_life (insn, regstack, operands, constraints,
777 int n_inputs, n_outputs;
780 int n_operands = n_inputs + n_outputs;
781 int first_input = n_outputs;
783 int malformed_asm = 0;
784 rtx body = PATTERN (insn);
786 int *operand_matches = (int *) alloca (n_operands * sizeof (int *));
788 enum reg_class *operand_class
789 = (enum reg_class *) alloca (n_operands * sizeof (enum reg_class *));
791 int reg_used_as_output[FIRST_PSEUDO_REGISTER];
792 int implicitly_dies[FIRST_PSEUDO_REGISTER];
796 /* Find out what the constraints required. If no constraint
797 alternative matches, that is a compiler bug: we should have caught
798 such an insn during reload. */
799 i = constrain_asm_operands (n_operands, operands, constraints,
800 operand_matches, operand_class);
804 /* Strip SUBREGs here to make the following code simpler. */
805 for (i = 0; i < n_operands; i++)
806 if (GET_CODE (operands[i]) == SUBREG
807 && GET_CODE (SUBREG_REG (operands[i])) == REG)
808 operands[i] = SUBREG_REG (operands[i]);
810 /* Set up CLOBBER_REG. */
813 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx *));
815 if (GET_CODE (body) == PARALLEL)
816 for (i = 0; i < XVECLEN (body, 0); i++)
817 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
819 rtx clobber = XVECEXP (body, 0, i);
820 rtx reg = XEXP (clobber, 0);
822 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
823 reg = SUBREG_REG (reg);
825 if (STACK_REG_P (reg))
827 clobber_reg[n_clobbers] = reg;
832 /* Enforce rule #4: Output operands must specifically indicate which
833 reg an output appears in after an asm. "=f" is not allowed: the
834 operand constraints must select a class with a single reg.
836 Also enforce rule #5: Output operands must start at the top of
837 the reg-stack: output operands may not "skip" a reg. */
839 bzero (reg_used_as_output, sizeof (reg_used_as_output));
840 for (i = 0; i < n_outputs; i++)
841 if (STACK_REG_P (operands[i]))
842 if (reg_class_size[operand_class[i]] != 1)
845 (insn, "Output constraint %d must specify a single register", i);
849 reg_used_as_output[REGNO (operands[i])] = 1;
852 /* Search for first non-popped reg. */
853 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
854 if (! reg_used_as_output[i])
857 /* If there are any other popped regs, that's an error. */
858 for (; i < LAST_STACK_REG + 1; i++)
859 if (reg_used_as_output[i])
862 if (i != LAST_STACK_REG + 1)
864 error_for_asm (insn, "Output regs must be grouped at top of stack");
868 /* Enforce rule #2: All implicitly popped input regs must be closer
869 to the top of the reg-stack than any input that is not implicitly
872 bzero (implicitly_dies, sizeof (implicitly_dies));
873 for (i = first_input; i < first_input + n_inputs; i++)
874 if (STACK_REG_P (operands[i]))
876 /* An input reg is implicitly popped if it is tied to an
877 output, or if there is a CLOBBER for it. */
880 for (j = 0; j < n_clobbers; j++)
881 if (operands_match_p (clobber_reg[j], operands[i]))
884 if (j < n_clobbers || operand_matches[i] >= 0)
885 implicitly_dies[REGNO (operands[i])] = 1;
888 /* Search for first non-popped reg. */
889 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
890 if (! implicitly_dies[i])
893 /* If there are any other popped regs, that's an error. */
894 for (; i < LAST_STACK_REG + 1; i++)
895 if (implicitly_dies[i])
898 if (i != LAST_STACK_REG + 1)
901 "Implicitly popped regs must be grouped at top of stack");
905 /* Enfore rule #3: If any input operand uses the "f" constraint, all
906 output constraints must use the "&" earlyclobber.
908 ??? Detect this more deterministically by having constraint_asm_operands
909 record any earlyclobber. */
911 for (i = first_input; i < first_input + n_inputs; i++)
912 if (operand_matches[i] == -1)
916 for (j = 0; j < n_outputs; j++)
917 if (operands_match_p (operands[j], operands[i]))
920 "Output operand %d must use `&' constraint", j);
927 /* Avoid further trouble with this insn. */
928 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
929 PUT_MODE (insn, VOIDmode);
933 /* Process all outputs */
934 for (i = 0; i < n_outputs; i++)
936 rtx op = operands[i];
938 if (! STACK_REG_P (op))
939 if (stack_regs_mentioned_p (op))
944 /* Each destination is dead before this insn. If the
945 destination is not used after this insn, record this with
948 if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (op)))
949 REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_UNUSED, op,
952 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (op));
955 /* Process all inputs */
956 for (i = first_input; i < first_input + n_inputs; i++)
958 if (! STACK_REG_P (operands[i]))
959 if (stack_regs_mentioned_p (operands[i]))
964 /* If an input is dead after the insn, record a death note.
965 But don't record a death note if there is already a death note,
966 or if the input is also an output. */
968 if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i]))
969 && operand_matches[i] == -1
970 && ! find_regno_note (insn, REG_DEAD, REGNO (operands[i])))
971 REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_DEAD, operands[i],
974 SET_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i]));
978 /* Scan PAT, which is part of INSN, and record the life & death of
979 stack registers in REGSTACK. If a register was dead, but is an input
980 operand in this insn, then mark the register live and record a death
983 If a register is dead after this insn, but is an output operand in
984 this insn, record a REG_UNUSED note.
986 This function does not know about SET_DESTs that are both input and
987 output (such as ZERO_EXTRACT) - this cannot happen on a 387. */
990 record_reg_life_pat (insn, regstack, pat)
997 /* We should have already handled any asm. */
998 if (GET_CODE (pat) == ASM_INPUT || GET_CODE (pat) == ASM_OPERANDS)
1001 if (GET_CODE (pat) != SET)
1004 dest = * get_true_reg (& SET_DEST (pat));
1006 /* The destination is dead before this insn. If the destination is
1007 not used after this insn, record this with REG_UNUSED. */
1009 if (STACK_REG_P (dest))
1011 /* ??? This check is unnecessary. */
1013 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1016 if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (dest)))
1017 REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_UNUSED, dest,
1020 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1023 if (dest != cc0_rtx && stack_regs_mentioned_p (dest))
1026 src = * get_true_reg (& SET_SRC (pat));
1028 switch (GET_CODE (src))
1030 /* ??? get_true_reg will make some of these cases redundant. */
1037 record_note_if_dead (insn, regstack, XEXP (src, 0), dest);
1038 record_note_if_dead (insn, regstack, XEXP (src, 1), dest);
1045 case FLOAT_TRUNCATE:
1047 case UNSIGNED_FLOAT:
1048 record_note_if_dead (insn, regstack, XEXP (src, 0), dest);
1053 src = XEXP (src, 0);
1054 if (GET_CODE (src) == FIX)
1055 record_note_if_dead (insn, regstack, XEXP (src, 0), dest);
1057 record_note_if_dead (insn, regstack, src, dest);
1062 abort (); /* we should have caught this already. */
1066 record_note_if_dead (insn, regstack, src, dest);
1070 /* If a stack register appears in the src RTL, it is a bug, and
1071 code should be added above to handle it. */
1073 if (stack_regs_mentioned_p (src))
1078 /* Calculate the number of inputs and outputs in BODY, an
1079 asm_operands. N_OPERANDS is the total number of operands, and
1080 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
1084 get_asm_operand_lengths (body, n_operands, n_inputs, n_outputs)
1087 int *n_inputs, *n_outputs;
1089 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
1090 *n_inputs = ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
1092 else if (GET_CODE (body) == ASM_OPERANDS)
1093 *n_inputs = ASM_OPERANDS_INPUT_LENGTH (body);
1095 else if (GET_CODE (body) == PARALLEL
1096 && GET_CODE (XVECEXP (body, 0, 0)) == SET)
1097 *n_inputs = ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
1099 else if (GET_CODE (body) == PARALLEL
1100 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
1101 *n_inputs = ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
1105 *n_outputs = n_operands - *n_inputs;
1108 /* Scan INSN, which is in BLOCK, and record the life & death of stack
1109 registers in REGSTACK. This function is called to process insns from
1110 the last insn in a block to the first. The actual scanning is done in
1111 record_reg_life_pat.
1113 If a register is live after a CALL_INSN, but is not a value return
1114 register for that CALL_INSN, then code is emitted to initialize that
1115 register. The block_end[] data is kept accurate.
1117 Existing death and unset notes for stack registers are deleted
1118 before processing the insn. */
1121 record_reg_life (insn, block, regstack)
1126 rtx note, *note_link;
1129 if ((GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
1130 || INSN_DELETED_P (insn))
1133 /* Strip death notes for stack regs from this insn */
1135 note_link = ®_NOTES(insn);
1136 for (note = *note_link; note; note = XEXP (note, 1))
1137 if (STACK_REG_P (XEXP (note, 0))
1138 && (REG_NOTE_KIND (note) == REG_DEAD
1139 || REG_NOTE_KIND (note) == REG_UNUSED))
1140 *note_link = XEXP (note, 1);
1142 note_link = &XEXP (note, 1);
1144 /* Process all patterns in the insn. */
1146 n_operands = asm_noperands (PATTERN (insn));
1147 if (n_operands >= 0)
1149 /* This insn is an `asm' with operands. Decode the operands,
1150 decide how many are inputs, and record the life information. */
1152 rtx operands[MAX_RECOG_OPERANDS];
1153 rtx body = PATTERN (insn);
1154 int n_inputs, n_outputs;
1155 char **constraints = (char **) alloca (n_operands * sizeof (char *));
1157 decode_asm_operands (body, operands, 0, constraints, 0);
1158 get_asm_operand_lengths (body, n_operands, &n_inputs, &n_outputs);
1159 record_asm_reg_life (insn, regstack, operands, constraints,
1160 n_inputs, n_outputs);
1164 if (GET_CODE (PATTERN (insn)) == PARALLEL)
1168 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1169 record_reg_life_pat (insn, regstack, XVECEXP (PATTERN (insn), 0, i));
1171 else if (GET_MODE (insn) == QImode)
1172 record_reg_life_pat (insn, regstack, PATTERN (insn));
1174 /* There might be a reg that is live after a function call.
1175 Initialize it to zero so that the program does not crash. See comment
1176 towards the end of stack_reg_life_analysis(). */
1178 if (GET_CODE (insn) == CALL_INSN)
1180 int reg = FIRST_FLOAT_REG;
1182 /* If a stack reg is mentioned in a CALL_INSN, it must be as the
1183 return value; conversely, if a float is returned, a stack reg
1184 must be mentioned. */
1186 if (stack_regs_mentioned_p (PATTERN (insn)))
1189 for (; reg <= LAST_STACK_REG; reg++)
1190 if (TEST_HARD_REG_BIT (regstack->reg_set, reg))
1194 /* The insn will use virtual register numbers, and so
1195 convert_regs is expected to process these. But BLOCK_NUM
1196 cannot be used on these insns, because they do not appear in
1199 pat = gen_rtx (SET, VOIDmode, FP_mode_reg[reg][(int) DFmode],
1200 CONST0_RTX (DFmode));
1201 init = emit_insn_after (pat, insn);
1202 PUT_MODE (init, QImode);
1204 CLEAR_HARD_REG_BIT (regstack->reg_set, reg);
1206 /* If the CALL_INSN was the end of a block, move the
1207 block_end to point to the new insn. */
1209 if (block_end[block] == insn)
1210 block_end[block] = init;
1213 /* Some regs do not survive a CALL */
1215 AND_COMPL_HARD_REG_SET (regstack->reg_set, call_used_reg_set);
1219 /* Find all basic blocks of the function, which starts with FIRST.
1220 For each JUMP_INSN, build the chain of LABEL_REFS on each CODE_LABEL. */
1228 register RTX_CODE prev_code = BARRIER;
1229 register RTX_CODE code;
1231 /* Record where all the blocks start and end.
1232 Record which basic blocks control can drop in to. */
1235 for (insn = first; insn; insn = NEXT_INSN (insn))
1237 /* Note that this loop must select the same block boundaries
1238 as code in reg_to_stack. */
1240 code = GET_CODE (insn);
1242 if (code == CODE_LABEL
1243 || (prev_code != INSN
1244 && prev_code != CALL_INSN
1245 && prev_code != CODE_LABEL
1246 && (code == INSN || code == CALL_INSN || code == JUMP_INSN)))
1248 block_begin[++block] = insn;
1249 block_end[block] = insn;
1250 block_drops_in[block] = prev_code != BARRIER;
1252 else if (code == INSN || code == CALL_INSN || code == JUMP_INSN)
1253 block_end[block] = insn;
1255 BLOCK_NUM (insn) = block;
1257 if (code == CODE_LABEL)
1258 LABEL_REFS (insn) = insn; /* delete old chain */
1264 if (block + 1 != blocks)
1267 /* generate all label references to the correspondending jump insn */
1268 for (block = 0; block < blocks; block++)
1270 insn = block_end[block];
1272 if (GET_CODE (insn) == JUMP_INSN)
1273 record_label_references (insn, PATTERN (insn));
1277 /* Determine the which registers are live at the start of each basic
1278 block of the function whose first insn is FIRST.
1280 First, if the function returns a real_type, mark the function
1281 return type as live at each return point, as the RTL may not give any
1282 hint that the register is live.
1284 Then, start with the last block and work back to the first block.
1285 Similarly, work backwards within each block, insn by insn, recording
1286 which regs are die and which are used (and therefore live) in the
1287 hard reg set of block_stack_in[].
1289 After processing each basic block, if there is a label at the start
1290 of the block, propagate the live registers to all jumps to this block.
1292 As a special case, if there are regs live in this block, that are
1293 not live in a block containing a jump to this label, and the block
1294 containing the jump has already been processed, we must propagate this
1295 block's entry register life back to the block containing the jump, and
1296 restart life analysis from there.
1298 In the worst case, this function may traverse the insns
1299 REG_STACK_SIZE times. This is necessary, since a jump towards the end
1300 of the insns may not know that a reg is live at a target that is early
1301 in the insns. So we back up and start over with the new reg live.
1303 If there are registers that are live at the start of the function,
1304 insns are emitted to initialize these registers. Something similar is
1305 done after CALL_INSNs in record_reg_life. */
1308 stack_reg_life_analysis (first)
1312 struct stack_def regstack;
1314 if (current_function_returns_real)
1316 /* Find all RETURN insns and mark them. */
1318 for (block = blocks - 1; block >= 0; block--)
1319 if (GET_CODE (block_end[block]) == JUMP_INSN
1320 && GET_CODE (PATTERN (block_end[block])) == RETURN)
1321 SET_HARD_REG_BIT (block_out_reg_set[block], FIRST_STACK_REG);
1323 /* Mark of the end of last block if we "fall off" the end of the
1324 function into the epilogue. */
1326 if (GET_CODE (block_end[blocks-1]) != JUMP_INSN
1327 || GET_CODE (PATTERN (block_end[blocks-1])) == RETURN)
1328 SET_HARD_REG_BIT (block_out_reg_set[blocks-1], FIRST_STACK_REG);
1331 /* now scan all blocks backward for stack register use */
1336 register rtx insn, prev;
1338 /* current register status at last instruction */
1340 COPY_HARD_REG_SET (regstack.reg_set, block_out_reg_set[block]);
1342 prev = block_end[block];
1346 prev = PREV_INSN (insn);
1348 /* If the insn is a CALL_INSN, we need to ensure that
1349 everything dies. But otherwise don't process unless there
1350 are some stack regs present. */
1352 if (GET_MODE (insn) == QImode || GET_CODE (insn) == CALL_INSN)
1353 record_reg_life (insn, block, ®stack);
1355 } while (insn != block_begin[block]);
1357 /* Set the state at the start of the block. Mark that no
1358 register mapping information known yet. */
1360 COPY_HARD_REG_SET (block_stack_in[block].reg_set, regstack.reg_set);
1361 block_stack_in[block].top = -2;
1363 /* If there is a label, propagate our register life to all jumps
1366 if (GET_CODE (insn) == CODE_LABEL)
1369 int must_restart = 0;
1371 for (label = LABEL_REFS (insn); label != insn;
1372 label = LABEL_NEXTREF (label))
1374 int jump_block = BLOCK_NUM (CONTAINING_INSN (label));
1376 if (jump_block < block)
1377 IOR_HARD_REG_SET (block_out_reg_set[jump_block],
1378 block_stack_in[block].reg_set);
1381 /* The block containing the jump has already been
1382 processed. If there are registers that were not known
1383 to be live then, but are live now, we must back up
1384 and restart life analysis from that point with the new
1385 life information. */
1387 GO_IF_HARD_REG_SUBSET (block_stack_in[block].reg_set,
1388 block_out_reg_set[jump_block],
1391 IOR_HARD_REG_SET (block_out_reg_set[jump_block],
1392 block_stack_in[block].reg_set);
1405 if (block_drops_in[block])
1406 IOR_HARD_REG_SET (block_out_reg_set[block-1],
1407 block_stack_in[block].reg_set);
1413 /* If any reg is live at the start of the first block of a
1414 function, then we must guarantee that the reg holds some value by
1415 generating our own "load" of that register. Otherwise a 387 would
1416 fault trying to access an empty register. */
1418 HARD_REG_SET empty_regs;
1419 CLEAR_HARD_REG_SET (empty_regs);
1420 GO_IF_HARD_REG_SUBSET (block_stack_in[0].reg_set, empty_regs,
1424 /* Load zero into each live register. The fact that a register
1425 appears live at the function start does not necessarily imply an error
1426 in the user program: it merely means that we could not determine that
1427 there wasn't such an error, just as -Wunused sometimes gives
1428 "incorrect" warnings. In those cases, these initializations will do
1431 Note that we are inserting virtual register references here:
1432 these insns must be processed by convert_regs later. Also, these
1433 insns will not be in block_number, so BLOCK_NUM() will fail for them. */
1435 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--)
1436 if (TEST_HARD_REG_BIT (block_stack_in[0].reg_set, reg))
1440 init_rtx = gen_rtx (SET, VOIDmode, FP_mode_reg[reg][(int) DFmode],
1441 CONST0_RTX (DFmode));
1442 block_begin[0] = emit_insn_after (init_rtx, first);
1443 PUT_MODE (block_begin[0], QImode);
1445 CLEAR_HARD_REG_BIT (block_stack_in[0].reg_set, reg);
1452 /*****************************************************************************
1453 This section deals with stack register substition, and forms the second
1455 *****************************************************************************/
1457 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
1458 the desired hard REGNO. */
1461 replace_reg (reg, regno)
1465 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
1466 || ! STACK_REG_P (*reg))
1469 if (GET_MODE_CLASS (GET_MODE (*reg)) != MODE_FLOAT)
1472 *reg = FP_mode_reg[regno][(int) GET_MODE (*reg)];
1475 /* Remove a note of type NOTE, which must be found, for register
1476 number REGNO from INSN. Remove only one such note. */
1479 remove_regno_note (insn, note, regno)
1484 register rtx *note_link, this;
1486 note_link = ®_NOTES(insn);
1487 for (this = *note_link; this; this = XEXP (this, 1))
1488 if (REG_NOTE_KIND (this) == note
1489 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
1491 *note_link = XEXP (this, 1);
1495 note_link = &XEXP (this, 1);
1500 /* Find the hard register number of virtual register REG in REGSTACK.
1501 The hard register number is relative to the top of the stack. -1 is
1502 returned if the register is not found. */
1505 get_hard_regnum (regstack, reg)
1511 if (! STACK_REG_P (reg))
1514 for (i = regstack->top; i >= 0; i--)
1515 if (regstack->reg[i] == REGNO (reg))
1518 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
1521 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
1522 the chain of insns. Doing so could confuse block_begin and block_end
1523 if this were the only insn in the block. */
1526 delete_insn_for_stacker (insn)
1529 PUT_CODE (insn, NOTE);
1530 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1531 NOTE_SOURCE_FILE (insn) = 0;
1532 INSN_DELETED_P (insn) = 1;
1535 /* Emit an insn to pop virtual register REG before or after INSN.
1536 REGSTACK is the stack state after INSN and is updated to reflect this
1537 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
1538 is represented as a SET whose destination is the register to be popped
1539 and source is the top of stack. A death note for the top of stack
1540 cases the movdf pattern to pop. */
1543 emit_pop_insn (insn, regstack, reg, when)
1549 rtx pop_insn, pop_rtx;
1552 hard_regno = get_hard_regnum (regstack, reg);
1554 if (hard_regno < FIRST_STACK_REG)
1557 pop_rtx = gen_rtx (SET, VOIDmode, FP_mode_reg[hard_regno][(int) DFmode],
1558 FP_mode_reg[FIRST_STACK_REG][(int) DFmode]);
1560 pop_insn = (*when) (pop_rtx, insn);
1561 PUT_MODE (pop_insn, VOIDmode);
1563 REG_NOTES (pop_insn) = gen_rtx (EXPR_LIST, REG_DEAD,
1564 FP_mode_reg[FIRST_STACK_REG][(int) DFmode],
1565 REG_NOTES (pop_insn));
1567 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
1568 = regstack->reg[regstack->top];
1570 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
1575 /* Emit an insn before or after INSN to swap virtual register REG with the
1576 top of stack. WHEN should be `emit_insn_before' or `emit_insn_before'
1577 REGSTACK is the stack state before the swap, and is updated to reflect
1578 the swap. A swap insn is represented as a PARALLEL of two patterns:
1579 each pattern moves one reg to the other.
1581 If REG is already at the top of the stack, no insn is emitted. */
1584 emit_hard_swap_insn (insn, regstack, hard_regno, when)
1591 rtx swap_rtx, swap_insn;
1594 if (hard_regno == FIRST_STACK_REG)
1597 swap_rtx = gen_swapdf (FP_mode_reg[hard_regno][(int) DFmode],
1598 FP_mode_reg[FIRST_STACK_REG][(int) DFmode]);
1599 swap_insn = (*when) (swap_rtx, insn);
1600 PUT_MODE (swap_insn, VOIDmode);
1602 other = regstack->top - (hard_regno - FIRST_STACK_REG);
1604 tmp = regstack->reg[other];
1605 regstack->reg[other] = regstack->reg[regstack->top];
1606 regstack->reg[regstack->top] = tmp;
1609 /* Emit an insn before or after INSN to swap virtual register REG with the
1610 top of stack. See comments before emit_hard_swap_insn. */
1613 emit_swap_insn (insn, regstack, reg, when)
1621 hard_regno = get_hard_regnum (regstack, reg);
1622 if (hard_regno < FIRST_STACK_REG)
1625 emit_hard_swap_insn (insn, regstack, hard_regno, when);
1628 /* Handle a move to or from a stack register in PAT, which is in INSN.
1629 REGSTACK is the current stack. */
1632 move_for_stack_reg (insn, regstack, pat)
1637 rtx *src = get_true_reg (&SET_SRC (pat));
1638 rtx *dest = get_true_reg (&SET_DEST (pat));
1641 if (STACK_REG_P (*src) && STACK_REG_P (*dest))
1643 /* Write from one stack reg to another. If SRC dies here, then
1644 just change the register mapping and delete the insn. */
1646 note = find_regno_note (insn, REG_DEAD, REGNO (*src));
1651 /* If this is a no-op move, there must not be a REG_DEAD note. */
1652 if (REGNO (*src) == REGNO (*dest))
1655 for (i = regstack->top; i >= 0; i--)
1656 if (regstack->reg[i] == REGNO (*src))
1659 /* The source must be live, and the dest must be dead. */
1660 if (i < 0 || get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG)
1663 /* It is possible that the dest is unused after this insn.
1664 If so, just pop the src. */
1666 if (find_regno_note (insn, REG_UNUSED, REGNO (*dest)))
1668 emit_pop_insn (insn, regstack, *src, emit_insn_after);
1670 delete_insn_for_stacker (insn);
1674 regstack->reg[i] = REGNO (*dest);
1676 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1677 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src));
1679 delete_insn_for_stacker (insn);
1684 /* The source reg does not die. */
1686 /* If this appears to be a no-op move, delete it, or else it
1687 will confuse the machine description output patterns. But if
1688 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1689 for REG_UNUSED will not work for deleted insns. */
1691 if (REGNO (*src) == REGNO (*dest))
1693 if (find_regno_note (insn, REG_UNUSED, REGNO (*dest)))
1694 emit_pop_insn (insn, regstack, *dest, emit_insn_after);
1696 delete_insn_for_stacker (insn);
1700 /* The destination ought to be dead */
1701 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG)
1704 replace_reg (src, get_hard_regnum (regstack, *src));
1706 regstack->reg[++regstack->top] = REGNO (*dest);
1707 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1708 replace_reg (dest, FIRST_STACK_REG);
1710 else if (STACK_REG_P (*src))
1712 /* Save from a stack reg to MEM, or possibly integer reg. Since
1713 only top of stack may be saved, emit an exchange first if
1716 emit_swap_insn (insn, regstack, *src, emit_insn_before);
1718 note = find_regno_note (insn, REG_DEAD, REGNO (*src));
1721 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1723 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src));
1726 replace_reg (src, FIRST_STACK_REG);
1728 else if (STACK_REG_P (*dest))
1730 /* Load from MEM, or possibly integer REG or constant, into the
1731 stack regs. The actual target is always the top of the
1732 stack. The stack mapping is changed to reflect that DEST is
1733 now at top of stack. */
1735 /* The destination ought to be dead */
1736 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG)
1739 if (regstack->top >= REG_STACK_SIZE)
1742 regstack->reg[++regstack->top] = REGNO (*dest);
1743 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1744 replace_reg (dest, FIRST_STACK_REG);
1750 /* Handle a comparison. Special care needs to be taken to avoid
1751 causing comparisons that a 387 cannot do correctly, such as EQ.
1753 Also, a pop insn may need to be emitted. The 387 does have an
1754 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1755 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1759 compare_for_stack_reg (insn, regstack, pat)
1765 rtx src1_note, src2_note;
1767 src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
1768 src2 = get_true_reg (&XEXP (SET_SRC (pat), 1));
1770 /* The first argument must always be a stack reg. */
1773 if (! STACK_REG_P (*src1))
1776 /* We will fix any death note later. */
1778 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1780 if (STACK_REG_P (*src2))
1781 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1785 emit_swap_insn (insn, regstack, *src1, emit_insn_before);
1787 replace_reg (src1, FIRST_STACK_REG);
1789 if (STACK_REG_P (*src2))
1790 replace_reg (src2, get_hard_regnum (regstack, *src2));
1794 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (XEXP (src1_note, 0)));
1795 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1799 /* If the second operand dies, handle that. But if the operands are
1800 the same stack register, don't bother, because only one death is
1801 needed, and it was just handled. */
1804 && ! (STACK_REG_P (*src1)
1805 && STACK_REG_P (*src2)
1806 && REGNO (*src1) == REGNO (*src2)))
1808 /* As a special case, two regs may die in this insn if src2 is
1809 next to top of stack and the top of stack also dies. Since
1810 we have already popped src1, "next to top of stack" is really
1811 at top (FIRST_STACK_REG) now. */
1813 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1816 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (XEXP (src2_note, 0)));
1817 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1822 /* The 386 can only represent death of the first operand in
1823 the case handled above. In all other cases, emit a separate
1824 pop and remove the death note from here. */
1826 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1828 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1834 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1835 is the current register layout. */
1838 subst_stack_regs_pat (insn, regstack, pat)
1844 rtx *src1 = 0, *src2;
1845 rtx src1_note, src2_note;
1847 if (GET_CODE (pat) != SET)
1850 dest = get_true_reg (&SET_DEST (pat));
1851 src = get_true_reg (&SET_SRC (pat));
1853 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1855 if (*dest != cc0_rtx
1856 && (STACK_REG_P (*src)
1857 || (STACK_REG_P (*dest)
1858 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
1859 || GET_CODE (*src) == CONST_DOUBLE))))
1860 move_for_stack_reg (insn, regstack, pat);
1862 switch (GET_CODE (SET_SRC (pat)))
1865 compare_for_stack_reg (insn, regstack, pat);
1869 regstack->reg[++regstack->top] = REGNO (*dest);
1870 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1871 replace_reg (dest, FIRST_STACK_REG);
1875 /* This is a `tstM2' case. */
1876 if (*dest != cc0_rtx)
1886 /* These insns only operate on the top of the stack. DEST might
1887 be cc0_rtx if we're processing a tstM pattern. Also, it's
1888 possible that the tstM case results in a REG_DEAD note on the
1892 src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
1894 emit_swap_insn (insn, regstack, *src1, emit_insn_before);
1896 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1898 if (STACK_REG_P (*dest))
1899 replace_reg (dest, FIRST_STACK_REG);
1903 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1905 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1908 replace_reg (src1, FIRST_STACK_REG);
1914 /* On i386, reversed forms of subM3 and divM3 exist for
1915 MODE_FLOAT, so the same code that works for addM3 and mulM3
1919 /* These insns can accept the top of stack as a destination
1920 from a stack reg or mem, or can use the top of stack as a
1921 source and some other stack register (possibly top of stack)
1922 as a destination. */
1924 src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
1925 src2 = get_true_reg (&XEXP (SET_SRC (pat), 1));
1927 /* We will fix any death note later. */
1929 if (STACK_REG_P (*src1))
1930 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1933 if (STACK_REG_P (*src2))
1934 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1938 /* If either operand is not a stack register, then the dest
1939 must be top of stack. */
1941 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1942 emit_swap_insn (insn, regstack, *dest, emit_insn_before);
1945 /* Both operands are REG. If neither operand is already
1946 at the top of stack, choose to make the one that is the dest
1947 the new top of stack.
1949 ??? A later optimization here would be to look forward
1950 in the insns and see which source reg will be needed at top
1951 of stack soonest. */
1953 int src1_hard_regnum, src2_hard_regnum;
1955 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1956 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1957 if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
1960 if (src1_hard_regnum != FIRST_STACK_REG
1961 && src2_hard_regnum != FIRST_STACK_REG)
1962 emit_swap_insn (insn, regstack, *dest, emit_insn_before);
1965 if (STACK_REG_P (*src1))
1966 replace_reg (src1, get_hard_regnum (regstack, *src1));
1967 if (STACK_REG_P (*src2))
1968 replace_reg (src2, get_hard_regnum (regstack, *src2));
1972 /* If the register that dies is at the top of stack, then
1973 the destination is somewhere else - merely substitute it.
1974 But if the reg that dies is not at top of stack, then
1975 move the top of stack to the dead reg, as though we had
1976 done the insn and then a store-with-pop. */
1978 if (REGNO (XEXP (src1_note, 0)) == regstack->reg[regstack->top])
1980 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1981 replace_reg (dest, get_hard_regnum (regstack, *dest));
1985 int regno = get_hard_regnum (regstack, XEXP (src1_note, 0));
1987 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1988 replace_reg (dest, regno);
1990 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1991 = regstack->reg[regstack->top];
1994 CLEAR_HARD_REG_BIT (regstack->reg_set,
1995 REGNO (XEXP (src1_note, 0)));
1996 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
2001 if (REGNO (XEXP (src2_note, 0)) == regstack->reg[regstack->top])
2003 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2004 replace_reg (dest, get_hard_regnum (regstack, *dest));
2008 int regno = get_hard_regnum (regstack, XEXP (src2_note, 0));
2010 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2011 replace_reg (dest, regno);
2013 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
2014 = regstack->reg[regstack->top];
2017 CLEAR_HARD_REG_BIT (regstack->reg_set,
2018 REGNO (XEXP (src2_note, 0)));
2019 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
2024 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2025 replace_reg (dest, get_hard_regnum (regstack, *dest));
2035 /* Substitute hard regnums for any stack regs in INSN, which has
2036 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
2037 before the insn, and is updated with changes made here. CONSTAINTS is
2038 an array of the constraint strings used in the asm statement.
2040 OPERANDS is an array of the operands, and OPERANDS_LOC is a
2041 parallel array of where the operands were found. The output operands
2042 all preceed the input operands.
2044 There are several requirements and assumptions about the use of
2045 stack-like regs in asm statements. These rules are enforced by
2046 record_asm_stack_regs; see comments there for details. Any
2047 asm_operands left in the RTL at this point may be assume to meet the
2048 requirements, since record_asm_stack_regs removes any problem asm. */
2051 subst_asm_stack_regs (insn, regstack, operands, operands_loc, constraints,
2052 n_inputs, n_outputs)
2055 rtx *operands, **operands_loc;
2057 int n_inputs, n_outputs;
2059 int n_operands = n_inputs + n_outputs;
2060 int first_input = n_outputs;
2061 rtx body = PATTERN (insn);
2063 int *operand_matches = (int *) alloca (n_operands * sizeof (int *));
2064 enum reg_class *operand_class
2065 = (enum reg_class *) alloca (n_operands * sizeof (enum reg_class *));
2067 rtx *note_reg; /* Array of note contents */
2068 rtx **note_loc; /* Address of REG field of each note */
2069 enum reg_note *note_kind; /* The type of each note */
2074 struct stack_def temp_stack;
2080 /* Find out what the constraints required. If no constraint
2081 alternative matches, that is a compiler bug: we should have caught
2082 such an insn during the life analysis pass (and reload should have
2083 caught it regardless). */
2085 i = constrain_asm_operands (n_operands, operands, constraints,
2086 operand_matches, operand_class);
2090 /* Strip SUBREGs here to make the following code simpler. */
2091 for (i = 0; i < n_operands; i++)
2092 if (GET_CODE (operands[i]) == SUBREG
2093 && GET_CODE (SUBREG_REG (operands[i])) == REG)
2095 operands_loc[i] = & SUBREG_REG (operands[i]);
2096 operands[i] = SUBREG_REG (operands[i]);
2099 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2101 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
2104 note_reg = (rtx *) alloca (i * sizeof (rtx));
2105 note_loc = (rtx **) alloca (i * sizeof (rtx *));
2106 note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note));
2109 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2111 rtx reg = XEXP (note, 0);
2112 rtx *loc = & XEXP (note, 0);
2114 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
2116 loc = & SUBREG_REG (reg);
2117 reg = SUBREG_REG (reg);
2120 if (STACK_REG_P (reg)
2121 && (REG_NOTE_KIND (note) == REG_DEAD
2122 || REG_NOTE_KIND (note) == REG_UNUSED))
2124 note_reg[n_notes] = reg;
2125 note_loc[n_notes] = loc;
2126 note_kind[n_notes] = REG_NOTE_KIND (note);
2131 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2134 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx *));
2135 clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx **));
2137 if (GET_CODE (body) == PARALLEL)
2138 for (i = 0; i < XVECLEN (body, 0); i++)
2139 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2141 rtx clobber = XVECEXP (body, 0, i);
2142 rtx reg = XEXP (clobber, 0);
2143 rtx *loc = & XEXP (clobber, 0);
2145 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
2147 loc = & SUBREG_REG (reg);
2148 reg = SUBREG_REG (reg);
2151 if (STACK_REG_P (reg))
2153 clobber_reg[n_clobbers] = reg;
2154 clobber_loc[n_clobbers] = loc;
2159 bcopy (regstack, &temp_stack, sizeof (temp_stack));
2161 /* Put the input regs into the desired place in TEMP_STACK. */
2163 for (i = first_input; i < first_input + n_inputs; i++)
2164 if (STACK_REG_P (operands[i])
2165 && reg_class_subset_p (operand_class[i], FLOAT_REGS)
2166 && operand_class[i] != FLOAT_REGS)
2168 /* If an operand needs to be in a particular reg in
2169 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2170 these constraints are for single register classes, and reload
2171 guaranteed that operand[i] is already in that class, we can
2172 just use REGNO (operands[i]) to know which actual reg this
2173 operand needs to be in. */
2175 int regno = get_hard_regnum (&temp_stack, operands[i]);
2180 if (regno != REGNO (operands[i]))
2182 /* operands[i] is not in the right place. Find it
2183 and swap it with whatever is already in I's place.
2184 K is where operands[i] is now. J is where it should
2188 k = temp_stack.top - (regno - FIRST_STACK_REG);
2190 - (REGNO (operands[i]) - FIRST_STACK_REG));
2192 temp = temp_stack.reg[k];
2193 temp_stack.reg[k] = temp_stack.reg[j];
2194 temp_stack.reg[j] = temp;
2198 /* emit insns before INSN to make sure the reg-stack is in the right
2201 change_stack (insn, regstack, &temp_stack, emit_insn_before);
2203 /* Make the needed input register substitutions. Do death notes and
2204 clobbers too, because these are for inputs, not outputs. */
2206 for (i = first_input; i < first_input + n_inputs; i++)
2207 if (STACK_REG_P (operands[i]))
2209 int regnum = get_hard_regnum (regstack, operands[i]);
2214 replace_reg (operands_loc[i], regnum);
2217 for (i = 0; i < n_notes; i++)
2218 if (note_kind[i] == REG_DEAD)
2220 int regnum = get_hard_regnum (regstack, note_reg[i]);
2225 replace_reg (note_loc[i], regnum);
2228 for (i = 0; i < n_clobbers; i++)
2230 /* It's OK for a CLOBBER to reference a reg that is not live.
2231 Don't try to replace it in that case. */
2232 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2236 /* Sigh - clobbers always have QImode. But replace_reg knows
2237 that these regs can't be MODE_INT and will abort. Just put
2238 the right reg there without calling replace_reg. */
2240 *clobber_loc[i] = FP_mode_reg[regnum][(int) DFmode];
2244 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2246 for (i = first_input; i < first_input + n_inputs; i++)
2247 if (STACK_REG_P (operands[i]))
2249 /* An input reg is implicitly popped if it is tied to an
2250 output, or if there is a CLOBBER for it. */
2253 for (j = 0; j < n_clobbers; j++)
2254 if (operands_match_p (clobber_reg[j], operands[i]))
2257 if (j < n_clobbers || operand_matches[i] >= 0)
2259 /* operands[i] might not be at the top of stack. But that's OK,
2260 because all we need to do is pop the right number of regs
2261 off of the top of the reg-stack. record_asm_stack_regs
2262 guaranteed that all implicitly popped regs were grouped
2263 at the top of the reg-stack. */
2265 CLEAR_HARD_REG_BIT (regstack->reg_set,
2266 regstack->reg[regstack->top]);
2271 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2272 Note that there isn't any need to substitute register numbers.
2273 ??? Explain why this is true. */
2275 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2277 /* See if there is an output for this hard reg. */
2280 for (j = 0; j < n_outputs; j++)
2281 if (STACK_REG_P (operands[j]) && REGNO (operands[j]) == i)
2283 regstack->reg[++regstack->top] = i;
2284 SET_HARD_REG_BIT (regstack->reg_set, i);
2289 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2290 input that the asm didn't implicitly pop. If the asm didn't
2291 implicitly pop a reg, that reg will still be live.
2293 Note that we can't use find_regno_note here: the register numbers
2294 in the death notes have already been substituted. */
2296 for (i = 0; i < n_outputs + n_inputs; i++)
2297 if (STACK_REG_P (operands[i]))
2301 for (j = 0; j < n_notes; j++)
2302 if (REGNO (operands[i]) == REGNO (note_reg[j])
2303 && (note_kind[j] == REG_UNUSED
2304 || (note_kind[j] == REG_DEAD
2305 && TEST_HARD_REG_BIT (regstack->reg_set,
2306 REGNO (operands[i])))))
2308 insn = emit_pop_insn (insn, regstack, operands[i],
2315 /* Substitute stack hard reg numbers for stack virtual registers in
2316 INSN. Non-stack register numbers are not changed. REGSTACK is the
2317 current stack content. Insns may be emitted as needed to arrange the
2318 stack for the 387 based on the contents of the insn. */
2321 subst_stack_regs (insn, regstack)
2325 register rtx *note_link, note;
2329 if ((GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
2330 || INSN_DELETED_P (insn))
2333 /* The stack should be empty at a call. */
2335 if (GET_CODE (insn) == CALL_INSN)
2336 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
2337 if (TEST_HARD_REG_BIT (regstack->reg_set, i))
2340 /* Do the actual substitution if any stack regs are mentioned.
2341 Since we only record whether entire insn mentions stack regs, and
2342 subst_stack_regs_pat only works for patterns that contain stack regs,
2343 we must check each pattern in a parallel here. A call_value_pop could
2346 if (GET_MODE (insn) == QImode)
2348 n_operands = asm_noperands (PATTERN (insn));
2349 if (n_operands >= 0)
2351 /* This insn is an `asm' with operands. Decode the operands,
2352 decide how many are inputs, and do register substitution.
2353 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2355 rtx operands[MAX_RECOG_OPERANDS];
2356 rtx *operands_loc[MAX_RECOG_OPERANDS];
2357 rtx body = PATTERN (insn);
2358 int n_inputs, n_outputs;
2360 = (char **) alloca (n_operands * sizeof (char *));
2362 decode_asm_operands (body, operands, operands_loc, constraints, 0);
2363 get_asm_operand_lengths (body, n_operands, &n_inputs, &n_outputs);
2364 subst_asm_stack_regs (insn, regstack, operands, operands_loc,
2365 constraints, n_inputs, n_outputs);
2369 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2370 for (i = 0; i < XVECLEN (PATTERN (insn) , 0); i++)
2372 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2373 subst_stack_regs_pat (insn, regstack,
2374 XVECEXP (PATTERN (insn), 0, i));
2377 subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2380 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2381 REG_UNUSED will already have been dealt with, so just return. */
2383 if (INSN_DELETED_P (insn))
2386 /* If there is a REG_UNUSED note on a stack register on this insn,
2387 the indicated reg must be popped. The REG_UNUSED note is removed,
2388 since the form of the newly emitted pop insn references the reg,
2389 making it no longer `unset'. */
2391 note_link = ®_NOTES(insn);
2392 for (note = *note_link; note; note = XEXP (note, 1))
2393 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2395 *note_link = XEXP (note, 1);
2396 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), emit_insn_after);
2399 note_link = &XEXP (note, 1);
2402 /* Change the organization of the stack so that it fits a new basic
2403 block. Some registers might have to be popped, but there can never be
2404 a register live in the new block that is not now live.
2406 Insert any needed insns before or after INSN. WHEN is emit_insn_before
2407 or emit_insn_after. OLD is the original stack layout, and NEW is
2408 the desired form. OLD is updated to reflect the code emitted, ie, it
2409 will be the same as NEW upon return.
2411 This function will not preserve block_end[]. But that information
2412 is no longer needed once this has executed. */
2415 change_stack (insn, old, new, when)
2423 /* We will be inserting new insns "backwards", by calling emit_insn_before.
2424 If we are to insert after INSN, find the next insn, and insert before
2427 if (when == emit_insn_after)
2428 insn = NEXT_INSN (insn);
2430 /* Pop any registers that are not needed in the new block. */
2432 for (reg = old->top; reg >= 0; reg--)
2433 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2434 emit_pop_insn (insn, old, FP_mode_reg[old->reg[reg]][(int) DFmode],
2439 /* If the new block has never been processed, then it can inherit
2440 the old stack order. */
2442 new->top = old->top;
2443 bcopy (old->reg, new->reg, sizeof (new->reg));
2447 /* This block has been entered before, and we must match the
2448 previously selected stack order. */
2450 /* By now, the only difference should be the order of the stack,
2451 not their depth or liveliness. */
2453 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2459 if (old->top != new->top)
2462 /* Loop here emitting swaps until the stack is correct. The
2463 worst case number of swaps emitted is N + 2, where N is the
2464 depth of the stack. In some cases, the reg at the top of
2465 stack may be correct, but swapped anyway in order to fix
2466 other regs. But since we never swap any other reg away from
2467 its correct slot, this algorithm will converge. */
2471 /* Swap the reg at top of stack into the position it is
2472 supposed to be in, until the correct top of stack appears. */
2474 while (old->reg[old->top] != new->reg[new->top])
2476 for (reg = new->top; reg >= 0; reg--)
2477 if (new->reg[reg] == old->reg[old->top])
2483 emit_swap_insn (insn, old,
2484 FP_mode_reg[old->reg[reg]][(int) DFmode],
2488 /* See if any regs remain incorrect. If so, bring an
2489 incorrect reg to the top of stack, and let the while loop
2492 for (reg = new->top; reg >= 0; reg--)
2493 if (new->reg[reg] != old->reg[reg])
2495 emit_swap_insn (insn, old,
2496 FP_mode_reg[old->reg[reg]][(int) DFmode],
2502 /* At this point there must be no differences. */
2504 for (reg = old->top; reg >= 0; reg--)
2505 if (old->reg[reg] != new->reg[reg])
2510 /* Check PAT, which points to RTL in INSN, for a LABEL_REF. If it is
2511 found, ensure that a jump from INSN to the code_label to which the
2512 label_ref points ends up with the same stack as that at the
2513 code_label. Do this by inserting insns just before the code_label to
2514 pop and rotate the stack until it is in the correct order. REGSTACK
2515 is the order of the register stack in INSN.
2517 Any code that is emitted here must not be later processed as part
2518 of any block, as it will already contain hard register numbers. */
2521 goto_block_pat (insn, regstack, pat)
2527 rtx new_jump, new_label, new_barrier;
2530 struct stack_def temp_stack;
2533 if (GET_CODE (pat) != LABEL_REF)
2536 char *fmt = GET_RTX_FORMAT (GET_CODE (pat));
2538 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
2541 goto_block_pat (insn, regstack, XEXP (pat, i));
2543 for (j = 0; j < XVECLEN (pat, i); j++)
2544 goto_block_pat (insn, regstack, XVECEXP (pat, i, j));
2549 label = XEXP (pat, 0);
2550 if (GET_CODE (label) != CODE_LABEL)
2553 /* First, see if in fact anything needs to be done to the stack at all. */
2555 label_stack = &block_stack_in[BLOCK_NUM (label)];
2557 if (label_stack->top == -2)
2559 /* If the target block hasn't had a stack order selected, then
2560 we need merely ensure that no pops are needed. */
2562 for (reg = regstack->top; reg >= 0; reg--)
2563 if (! TEST_HARD_REG_BIT (label_stack->reg_set, regstack->reg[reg]))
2568 /* change_stack will not emit any code in this case. */
2570 change_stack (label, regstack, label_stack, emit_insn_after);
2574 else if (label_stack->top == regstack->top)
2576 for (reg = label_stack->top; reg >= 0; reg--)
2577 if (label_stack->reg[reg] != regstack->reg[reg])
2584 /* At least one insn will need to be inserted before label. Insert
2585 a jump around the code we are about to emit. Emit a label for the new
2586 code, and point the original insn at this new label. We can't use
2587 redirect_jump here, because we're using fld[4] of the code labels as
2588 LABEL_REF chains, no NUSES counters. */
2590 new_jump = emit_jump_insn_before (gen_jump (label), label);
2591 record_label_references (new_jump, PATTERN (new_jump));
2592 JUMP_LABEL (new_jump) = label;
2594 new_barrier = emit_barrier_after (new_jump);
2596 new_label = gen_label_rtx ();
2597 emit_label_after (new_label, new_barrier);
2598 LABEL_REFS (new_label) = new_label;
2600 /* The old label_ref will no longer point to the code_label if now uses,
2601 so strip the label_ref from the code_label's chain of references. */
2603 for (ref = &LABEL_REFS (label); *ref != label; ref = &LABEL_NEXTREF (*ref))
2610 *ref = LABEL_NEXTREF (*ref);
2612 XEXP (pat, 0) = new_label;
2613 record_label_references (insn, PATTERN (insn));
2615 if (JUMP_LABEL (insn) == label)
2616 JUMP_LABEL (insn) = new_label;
2618 /* Now emit the needed code. */
2620 temp_stack = *regstack;
2622 change_stack (new_label, &temp_stack, label_stack, emit_insn_after);
2625 /* Traverse all basic blocks in a function, converting the register
2626 refereces in each insn from the "flat" register file that gcc uses, to
2627 the stack-like registers the 387 uses. */
2632 register int block, reg;
2633 register rtx insn, next;
2634 struct stack_def regstack;
2636 for (block = 0; block < blocks; block++)
2638 if (block_stack_in[block].top == -2)
2640 /* This block has not been previously encountered. Choose a
2641 default mapping for any stack regs live on entry */
2643 block_stack_in[block].top = -1;
2645 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--)
2646 if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, reg))
2647 block_stack_in[block].reg[++block_stack_in[block].top] = reg;
2650 /* Process all insns in this block. Keep track of `next' here,
2651 so that we don't process any insns emitted while making
2652 substitutions in INSN. */
2654 next = block_begin[block];
2655 regstack = block_stack_in[block];
2659 next = NEXT_INSN (insn);
2661 /* Don't bother processing unless there is a stack reg
2664 ??? For now, process CALL_INSNs too to make sure that the
2665 stack regs are dead after a call. Remove this eventually. */
2667 if (GET_MODE (insn) == QImode || GET_CODE (insn) == CALL_INSN)
2668 subst_stack_regs (insn, ®stack);
2670 } while (insn != block_end[block]);
2672 /* Something failed if the stack life doesn't match. */
2674 GO_IF_HARD_REG_EQUAL (regstack.reg_set, block_out_reg_set[block], win);
2680 /* Adjust the stack of this block on exit to match the stack of
2681 the target block, or copy stack information into stack of
2682 jump target if the target block's stack order hasn't been set
2685 if (GET_CODE (insn) == JUMP_INSN)
2686 goto_block_pat (insn, ®stack, PATTERN (insn));
2688 /* Likewise handle the case where we fall into the next block. */
2690 if ((block < blocks - 1) && block_drops_in[block+1])
2691 change_stack (insn, ®stack, &block_stack_in[block+1],
2695 /* If the last basic block is the end of a loop, and that loop has
2696 regs live at its start, then the last basic block will have regs live
2697 at its end that need to be popped before the function returns. */
2699 for (reg = regstack.top; reg >= 0; reg--)
2700 if (! current_function_returns_real
2701 || regstack.reg[reg] != FIRST_STACK_REG)
2702 insn = emit_pop_insn (insn, ®stack,
2703 FP_mode_reg[regstack.reg[reg]][(int) DFmode],
2707 /* Check expression PAT, which is in INSN, for label references. if
2708 one is found, print the block number of destination to FILE. */
2711 print_blocks (file, insn, pat)
2715 register RTX_CODE code = GET_CODE (pat);
2719 if (code == LABEL_REF)
2721 register rtx label = XEXP (pat, 0);
2723 if (GET_CODE (label) != CODE_LABEL)
2726 fprintf (file, " %d", BLOCK_NUM (label));
2731 fmt = GET_RTX_FORMAT (code);
2732 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2735 print_blocks (file, insn, XEXP (pat, i));
2739 for (j = 0; j < XVECLEN (pat, i); j++)
2740 print_blocks (file, insn, XVECEXP (pat, i, j));
2745 /* Write information about stack registers and stack blocks into FILE.
2746 This is part of making a debugging dump. */
2748 dump_stack_info (file)
2753 fprintf (file, "\n%d stack blocks.\n", blocks);
2754 for (block = 0; block < blocks; block++)
2756 register rtx head, jump, end;
2759 fprintf (file, "\nStack block %d: first insn %d, last %d.\n",
2760 block, INSN_UID (block_begin[block]),
2761 INSN_UID (block_end[block]));
2763 head = block_begin[block];
2765 fprintf (file, "Reached from blocks: ");
2766 if (GET_CODE (head) == CODE_LABEL)
2767 for (jump = LABEL_REFS (head);
2769 jump = LABEL_NEXTREF (jump))
2771 register int from_block = BLOCK_NUM (CONTAINING_INSN (jump));
2772 fprintf (file, " %d", from_block);
2774 if (block_drops_in[block])
2775 fprintf (file, " previous");
2777 fprintf (file, "\nlive stack registers on block entry: ");
2778 for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG ; regno++)
2780 if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, regno))
2781 fprintf (file, "%d ", regno);
2784 fprintf (file, "\nlive stack registers on block exit: ");
2785 for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG ; regno++)
2787 if (TEST_HARD_REG_BIT (block_out_reg_set[block], regno))
2788 fprintf (file, "%d ", regno);
2791 end = block_end[block];
2793 fprintf (file, "\nJumps to blocks: ");
2794 if (GET_CODE (end) == JUMP_INSN)
2795 print_blocks (file, end, PATTERN (end));
2797 if (block + 1 < blocks && block_drops_in[block+1])
2798 fprintf (file, " next");
2799 else if (block + 1 == blocks
2800 || (GET_CODE (end) == JUMP_INSN
2801 && GET_CODE (PATTERN (end)) == RETURN))
2802 fprintf (file, " return");
2804 fprintf (file, "\n");
2807 #endif /* STACK_REGS */