1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
25 * The form of the input:
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
45 * The form of the output:
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
105 asm ("foo" : "=t" (a) : "f" (b));
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, ie, the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
116 The asm above would be written as
118 asm ("foo" : "=&t" (a) : "f" (b));
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
159 #include "function.h"
160 #include "insn-config.h"
162 #include "hard-reg-set.h"
167 #include "basic-block.h"
172 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
174 /* This is the basic stack record. TOP is an index into REG[] such
175 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
177 If TOP is -2, REG[] is not yet initialized. Stack initialization
178 consists of placing each live reg in array `reg' and setting `top'
181 REG_SET indicates which registers are live. */
183 typedef struct stack_def
185 int top; /* index to top stack element */
186 HARD_REG_SET reg_set; /* set of live registers */
187 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
190 /* This is used to carry information about basic blocks. It is
191 attached to the AUX field of the standard CFG block. */
193 typedef struct block_info_def
195 struct stack_def stack_in; /* Input stack configuration. */
196 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
197 int done; /* True if block already converted. */
200 #define BLOCK_INFO(B) ((block_info) (B)->aux)
202 /* Passed to change_stack to indicate where to emit insns. */
209 /* We use this array to cache info about insns, because otherwise we
210 spend too much time in stack_regs_mentioned_p.
212 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
213 the insn uses stack registers, two indicates the insn does not use
215 static varray_type stack_regs_mentioned_data;
217 /* The block we're currently working on. */
218 static basic_block current_block;
220 /* This is the register file for all register after conversion */
222 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
224 #define FP_MODE_REG(regno,mode) \
225 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)])
227 /* Used to initialize uninitialized registers. */
230 /* Forward declarations */
232 static int stack_regs_mentioned_p PARAMS ((rtx pat));
233 static void straighten_stack PARAMS ((rtx, stack));
234 static void pop_stack PARAMS ((stack, int));
235 static rtx *get_true_reg PARAMS ((rtx *));
237 static int check_asm_stack_operands PARAMS ((rtx));
238 static int get_asm_operand_n_inputs PARAMS ((rtx));
239 static rtx stack_result PARAMS ((tree));
240 static void replace_reg PARAMS ((rtx *, int));
241 static void remove_regno_note PARAMS ((rtx, enum reg_note,
243 static int get_hard_regnum PARAMS ((stack, rtx));
244 static void delete_insn_for_stacker PARAMS ((rtx));
245 static rtx emit_pop_insn PARAMS ((rtx, stack, rtx,
247 static void emit_swap_insn PARAMS ((rtx, stack, rtx));
248 static void move_for_stack_reg PARAMS ((rtx, stack, rtx));
249 static int swap_rtx_condition_1 PARAMS ((rtx));
250 static int swap_rtx_condition PARAMS ((rtx));
251 static void compare_for_stack_reg PARAMS ((rtx, stack, rtx));
252 static void subst_stack_regs_pat PARAMS ((rtx, stack, rtx));
253 static void subst_asm_stack_regs PARAMS ((rtx, stack));
254 static void subst_stack_regs PARAMS ((rtx, stack));
255 static void change_stack PARAMS ((rtx, stack, stack,
257 static int convert_regs_entry PARAMS ((void));
258 static void convert_regs_exit PARAMS ((void));
259 static int convert_regs_1 PARAMS ((FILE *, basic_block));
260 static int convert_regs_2 PARAMS ((FILE *, basic_block));
261 static int convert_regs PARAMS ((FILE *));
262 static void print_stack PARAMS ((FILE *, stack));
263 static rtx next_flags_user PARAMS ((rtx));
264 static void record_label_references PARAMS ((rtx, rtx));
266 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
269 stack_regs_mentioned_p (pat)
272 register const char *fmt;
275 if (STACK_REG_P (pat))
278 fmt = GET_RTX_FORMAT (GET_CODE (pat));
279 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
285 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
286 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
289 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
296 /* Return nonzero if INSN mentions stacked registers, else return zero. */
299 stack_regs_mentioned (insn)
302 unsigned int uid, max;
308 uid = INSN_UID (insn);
309 max = VARRAY_SIZE (stack_regs_mentioned_data);
312 /* Allocate some extra size to avoid too many reallocs, but
313 do not grow too quickly. */
314 max = uid + uid / 20;
315 VARRAY_GROW (stack_regs_mentioned_data, max);
318 test = VARRAY_CHAR (stack_regs_mentioned_data, uid);
321 /* This insn has yet to be examined. Do so now. */
322 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
323 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test;
329 static rtx ix86_flags_rtx;
332 next_flags_user (insn)
335 /* Search forward looking for the first use of this value.
336 Stop at block boundaries. */
338 while (insn != current_block->end)
340 insn = NEXT_INSN (insn);
342 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
345 if (GET_CODE (insn) == CALL_INSN)
351 /* Reorganise the stack into ascending numbers,
355 straighten_stack (insn, regstack)
359 struct stack_def temp_stack;
362 /* If there is only a single register on the stack, then the stack is
363 already in increasing order and no reorganization is needed.
365 Similarly if the stack is empty. */
366 if (regstack->top <= 0)
369 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
371 for (top = temp_stack.top = regstack->top; top >= 0; top--)
372 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
374 change_stack (insn, regstack, &temp_stack, EMIT_AFTER);
377 /* Pop a register from the stack */
380 pop_stack (regstack, regno)
384 int top = regstack->top;
386 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
388 /* If regno was not at the top of stack then adjust stack */
389 if (regstack->reg [top] != regno)
392 for (i = regstack->top; i >= 0; i--)
393 if (regstack->reg [i] == regno)
396 for (j = i; j < top; j++)
397 regstack->reg [j] = regstack->reg [j + 1];
403 /* Convert register usage from "flat" register file usage to a "stack
404 register file. FIRST is the first insn in the function, FILE is the
407 Construct a CFG and run life analysis. Then convert each insn one
408 by one. Run a last jump_optimize pass, if optimizing, to eliminate
409 code duplication created when the converter inserts pop insns on
413 reg_to_stack (first, file)
421 /* See if there is something to do. Flow analysis is quite
422 expensive so we might save some compilation time. */
423 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
424 if (regs_ever_live[i])
426 if (i > LAST_STACK_REG)
429 /* Ok, floating point instructions exist. If not optimizing,
430 build the CFG and run life analysis. */
431 find_basic_blocks (first, max_reg_num (), file);
432 count_or_remove_death_notes (NULL, 1);
433 life_analysis (first, file, PROP_DEATH_NOTES);
435 /* Set up block info for each basic block. */
436 bi = (block_info) xcalloc ((n_basic_blocks + 1), sizeof (*bi));
437 for (i = n_basic_blocks - 1; i >= 0; --i)
438 BASIC_BLOCK (i)->aux = bi + i;
439 EXIT_BLOCK_PTR->aux = bi + n_basic_blocks;
441 /* Create the replacement registers up front. */
442 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
444 enum machine_mode mode;
445 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
447 mode = GET_MODE_WIDER_MODE (mode))
448 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
449 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
451 mode = GET_MODE_WIDER_MODE (mode))
452 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
455 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
457 /* A QNaN for initializing uninitialized variables.
459 ??? We can't load from constant memory in PIC mode, because
460 we're insertting these instructions before the prologue and
461 the PIC register hasn't been set up. In that case, fall back
462 on zero, which we can get from `ldz'. */
465 nan = CONST0_RTX (SFmode);
468 nan = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
469 nan = force_const_mem (SFmode, nan);
472 /* Allocate a cache for stack_regs_mentioned. */
473 max_uid = get_max_uid ();
474 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
475 "stack_regs_mentioned cache");
477 if (convert_regs (file) && optimize)
479 jump_optimize (first, JUMP_CROSS_JUMP_DEATH_MATTERS,
480 !JUMP_NOOP_MOVES, !JUMP_AFTER_REGSCAN);
484 VARRAY_FREE (stack_regs_mentioned_data);
488 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
489 label's chain of references, and note which insn contains each
493 record_label_references (insn, pat)
496 register enum rtx_code code = GET_CODE (pat);
498 register const char *fmt;
500 if (code == LABEL_REF)
502 register rtx label = XEXP (pat, 0);
505 if (GET_CODE (label) != CODE_LABEL)
508 /* If this is an undefined label, LABEL_REFS (label) contains
510 if (INSN_UID (label) == 0)
513 /* Don't make a duplicate in the code_label's chain. */
515 for (ref = LABEL_REFS (label);
517 ref = LABEL_NEXTREF (ref))
518 if (CONTAINING_INSN (ref) == insn)
521 CONTAINING_INSN (pat) = insn;
522 LABEL_NEXTREF (pat) = LABEL_REFS (label);
523 LABEL_REFS (label) = pat;
528 fmt = GET_RTX_FORMAT (code);
529 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
532 record_label_references (insn, XEXP (pat, i));
536 for (j = 0; j < XVECLEN (pat, i); j++)
537 record_label_references (insn, XVECEXP (pat, i, j));
542 /* Return a pointer to the REG expression within PAT. If PAT is not a
543 REG, possible enclosed by a conversion rtx, return the inner part of
544 PAT that stopped the search. */
551 switch (GET_CODE (*pat))
554 /* Eliminate FP subregister accesses in favour of the
555 actual FP register in use. */
558 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
560 int regno_off = subreg_regno_offset (REGNO (subreg),
564 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
573 pat = & XEXP (*pat, 0);
577 /* There are many rules that an asm statement for stack-like regs must
578 follow. Those rules are explained at the top of this file: the rule
579 numbers below refer to that explanation. */
582 check_asm_stack_operands (insn)
587 int malformed_asm = 0;
588 rtx body = PATTERN (insn);
590 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
591 char implicitly_dies[FIRST_PSEUDO_REGISTER];
594 rtx *clobber_reg = 0;
595 int n_inputs, n_outputs;
597 /* Find out what the constraints require. If no constraint
598 alternative matches, this asm is malformed. */
600 constrain_operands (1);
601 alt = which_alternative;
603 preprocess_constraints ();
605 n_inputs = get_asm_operand_n_inputs (body);
606 n_outputs = recog_data.n_operands - n_inputs;
611 /* Avoid further trouble with this insn. */
612 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
616 /* Strip SUBREGs here to make the following code simpler. */
617 for (i = 0; i < recog_data.n_operands; i++)
618 if (GET_CODE (recog_data.operand[i]) == SUBREG
619 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
620 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
622 /* Set up CLOBBER_REG. */
626 if (GET_CODE (body) == PARALLEL)
628 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
630 for (i = 0; i < XVECLEN (body, 0); i++)
631 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
633 rtx clobber = XVECEXP (body, 0, i);
634 rtx reg = XEXP (clobber, 0);
636 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
637 reg = SUBREG_REG (reg);
639 if (STACK_REG_P (reg))
641 clobber_reg[n_clobbers] = reg;
647 /* Enforce rule #4: Output operands must specifically indicate which
648 reg an output appears in after an asm. "=f" is not allowed: the
649 operand constraints must select a class with a single reg.
651 Also enforce rule #5: Output operands must start at the top of
652 the reg-stack: output operands may not "skip" a reg. */
654 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
655 for (i = 0; i < n_outputs; i++)
656 if (STACK_REG_P (recog_data.operand[i]))
658 if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1)
660 error_for_asm (insn, "Output constraint %d must specify a single register", i);
664 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
668 /* Search for first non-popped reg. */
669 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
670 if (! reg_used_as_output[i])
673 /* If there are any other popped regs, that's an error. */
674 for (; i < LAST_STACK_REG + 1; i++)
675 if (reg_used_as_output[i])
678 if (i != LAST_STACK_REG + 1)
680 error_for_asm (insn, "Output regs must be grouped at top of stack");
684 /* Enforce rule #2: All implicitly popped input regs must be closer
685 to the top of the reg-stack than any input that is not implicitly
688 memset (implicitly_dies, 0, sizeof (implicitly_dies));
689 for (i = n_outputs; i < n_outputs + n_inputs; i++)
690 if (STACK_REG_P (recog_data.operand[i]))
692 /* An input reg is implicitly popped if it is tied to an
693 output, or if there is a CLOBBER for it. */
696 for (j = 0; j < n_clobbers; j++)
697 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
700 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
701 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
704 /* Search for first non-popped reg. */
705 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
706 if (! implicitly_dies[i])
709 /* If there are any other popped regs, that's an error. */
710 for (; i < LAST_STACK_REG + 1; i++)
711 if (implicitly_dies[i])
714 if (i != LAST_STACK_REG + 1)
717 "Implicitly popped regs must be grouped at top of stack");
721 /* Enfore rule #3: If any input operand uses the "f" constraint, all
722 output constraints must use the "&" earlyclobber.
724 ??? Detect this more deterministically by having constrain_asm_operands
725 record any earlyclobber. */
727 for (i = n_outputs; i < n_outputs + n_inputs; i++)
728 if (recog_op_alt[i][alt].matches == -1)
732 for (j = 0; j < n_outputs; j++)
733 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
736 "Output operand %d must use `&' constraint", j);
743 /* Avoid further trouble with this insn. */
744 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
751 /* Calculate the number of inputs and outputs in BODY, an
752 asm_operands. N_OPERANDS is the total number of operands, and
753 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
757 get_asm_operand_n_inputs (body)
760 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
761 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
763 else if (GET_CODE (body) == ASM_OPERANDS)
764 return ASM_OPERANDS_INPUT_LENGTH (body);
766 else if (GET_CODE (body) == PARALLEL
767 && GET_CODE (XVECEXP (body, 0, 0)) == SET)
768 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
770 else if (GET_CODE (body) == PARALLEL
771 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
772 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
777 /* If current function returns its result in an fp stack register,
778 return the REG. Otherwise, return 0. */
786 /* If the value is supposed to be returned in memory, then clearly
787 it is not returned in a stack register. */
788 if (aggregate_value_p (DECL_RESULT (decl)))
791 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
794 #ifdef FUNCTION_OUTGOING_VALUE
796 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
798 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
802 return result != 0 && STACK_REG_P (result) ? result : 0;
807 * This section deals with stack register substitution, and forms the second
811 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
812 the desired hard REGNO. */
815 replace_reg (reg, regno)
819 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
820 || ! STACK_REG_P (*reg))
823 switch (GET_MODE_CLASS (GET_MODE (*reg)))
827 case MODE_COMPLEX_FLOAT:;
830 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
833 /* Remove a note of type NOTE, which must be found, for register
834 number REGNO from INSN. Remove only one such note. */
837 remove_regno_note (insn, note, regno)
842 register rtx *note_link, this;
844 note_link = ®_NOTES(insn);
845 for (this = *note_link; this; this = XEXP (this, 1))
846 if (REG_NOTE_KIND (this) == note
847 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
849 *note_link = XEXP (this, 1);
853 note_link = &XEXP (this, 1);
858 /* Find the hard register number of virtual register REG in REGSTACK.
859 The hard register number is relative to the top of the stack. -1 is
860 returned if the register is not found. */
863 get_hard_regnum (regstack, reg)
869 if (! STACK_REG_P (reg))
872 for (i = regstack->top; i >= 0; i--)
873 if (regstack->reg[i] == REGNO (reg))
876 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
879 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
880 the chain of insns. Doing so could confuse block_begin and block_end
881 if this were the only insn in the block. */
884 delete_insn_for_stacker (insn)
887 PUT_CODE (insn, NOTE);
888 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
889 NOTE_SOURCE_FILE (insn) = 0;
892 /* Emit an insn to pop virtual register REG before or after INSN.
893 REGSTACK is the stack state after INSN and is updated to reflect this
894 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
895 is represented as a SET whose destination is the register to be popped
896 and source is the top of stack. A death note for the top of stack
897 cases the movdf pattern to pop. */
900 emit_pop_insn (insn, regstack, reg, where)
904 enum emit_where where;
906 rtx pop_insn, pop_rtx;
909 /* For complex types take care to pop both halves. These may survive in
910 CLOBBER and USE expressions. */
911 if (COMPLEX_MODE_P (GET_MODE (reg)))
913 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
914 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
917 if (get_hard_regnum (regstack, reg1) >= 0)
918 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
919 if (get_hard_regnum (regstack, reg2) >= 0)
920 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
926 hard_regno = get_hard_regnum (regstack, reg);
928 if (hard_regno < FIRST_STACK_REG)
931 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
932 FP_MODE_REG (FIRST_STACK_REG, DFmode));
934 if (where == EMIT_AFTER)
935 pop_insn = emit_block_insn_after (pop_rtx, insn, current_block);
937 pop_insn = emit_block_insn_before (pop_rtx, insn, current_block);
940 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
941 REG_NOTES (pop_insn));
943 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
944 = regstack->reg[regstack->top];
946 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
951 /* Emit an insn before or after INSN to swap virtual register REG with
952 the top of stack. REGSTACK is the stack state before the swap, and
953 is updated to reflect the swap. A swap insn is represented as a
954 PARALLEL of two patterns: each pattern moves one reg to the other.
956 If REG is already at the top of the stack, no insn is emitted. */
959 emit_swap_insn (insn, regstack, reg)
966 int tmp, other_reg; /* swap regno temps */
967 rtx i1; /* the stack-reg insn prior to INSN */
968 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
970 hard_regno = get_hard_regnum (regstack, reg);
972 if (hard_regno < FIRST_STACK_REG)
974 if (hard_regno == FIRST_STACK_REG)
977 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
979 tmp = regstack->reg[other_reg];
980 regstack->reg[other_reg] = regstack->reg[regstack->top];
981 regstack->reg[regstack->top] = tmp;
983 /* Find the previous insn involving stack regs, but don't pass a
986 if (current_block && insn != current_block->head)
988 rtx tmp = PREV_INSN (insn);
989 rtx limit = PREV_INSN (current_block->head);
992 if (GET_CODE (tmp) == CODE_LABEL
993 || NOTE_INSN_BASIC_BLOCK_P (tmp)
994 || (GET_CODE (tmp) == INSN
995 && stack_regs_mentioned (tmp)))
1000 tmp = PREV_INSN (tmp);
1005 && (i1set = single_set (i1)) != NULL_RTX)
1007 rtx i1src = *get_true_reg (&SET_SRC (i1set));
1008 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
1010 /* If the previous register stack push was from the reg we are to
1011 swap with, omit the swap. */
1013 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG
1014 && GET_CODE (i1src) == REG && REGNO (i1src) == hard_regno - 1
1015 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1018 /* If the previous insn wrote to the reg we are to swap with,
1021 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == hard_regno
1022 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG
1023 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1027 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
1028 FP_MODE_REG (FIRST_STACK_REG, XFmode));
1031 emit_block_insn_after (swap_rtx, i1, current_block);
1032 else if (current_block)
1033 emit_block_insn_before (swap_rtx, current_block->head, current_block);
1035 emit_insn_before (swap_rtx, insn);
1038 /* Handle a move to or from a stack register in PAT, which is in INSN.
1039 REGSTACK is the current stack. */
1042 move_for_stack_reg (insn, regstack, pat)
1047 rtx *psrc = get_true_reg (&SET_SRC (pat));
1048 rtx *pdest = get_true_reg (&SET_DEST (pat));
1052 src = *psrc; dest = *pdest;
1054 if (STACK_REG_P (src) && STACK_REG_P (dest))
1056 /* Write from one stack reg to another. If SRC dies here, then
1057 just change the register mapping and delete the insn. */
1059 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1064 /* If this is a no-op move, there must not be a REG_DEAD note. */
1065 if (REGNO (src) == REGNO (dest))
1068 for (i = regstack->top; i >= 0; i--)
1069 if (regstack->reg[i] == REGNO (src))
1072 /* The source must be live, and the dest must be dead. */
1073 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1076 /* It is possible that the dest is unused after this insn.
1077 If so, just pop the src. */
1079 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1081 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
1083 delete_insn_for_stacker (insn);
1087 regstack->reg[i] = REGNO (dest);
1089 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1090 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1092 delete_insn_for_stacker (insn);
1097 /* The source reg does not die. */
1099 /* If this appears to be a no-op move, delete it, or else it
1100 will confuse the machine description output patterns. But if
1101 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1102 for REG_UNUSED will not work for deleted insns. */
1104 if (REGNO (src) == REGNO (dest))
1106 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1107 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1109 delete_insn_for_stacker (insn);
1113 /* The destination ought to be dead */
1114 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1117 replace_reg (psrc, get_hard_regnum (regstack, src));
1119 regstack->reg[++regstack->top] = REGNO (dest);
1120 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1121 replace_reg (pdest, FIRST_STACK_REG);
1123 else if (STACK_REG_P (src))
1125 /* Save from a stack reg to MEM, or possibly integer reg. Since
1126 only top of stack may be saved, emit an exchange first if
1129 emit_swap_insn (insn, regstack, src);
1131 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1134 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1136 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1138 else if ((GET_MODE (src) == XFmode || GET_MODE (src) == TFmode)
1139 && regstack->top < REG_STACK_SIZE - 1)
1141 /* A 387 cannot write an XFmode value to a MEM without
1142 clobbering the source reg. The output code can handle
1143 this by reading back the value from the MEM.
1144 But it is more efficient to use a temp register if one is
1145 available. Push the source value here if the register
1146 stack is not full, and then write the value to memory via
1148 rtx push_rtx, push_insn;
1149 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1151 if (GET_MODE (src) == TFmode)
1152 push_rtx = gen_movtf (top_stack_reg, top_stack_reg);
1154 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1155 push_insn = emit_insn_before (push_rtx, insn);
1156 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1160 replace_reg (psrc, FIRST_STACK_REG);
1162 else if (STACK_REG_P (dest))
1164 /* Load from MEM, or possibly integer REG or constant, into the
1165 stack regs. The actual target is always the top of the
1166 stack. The stack mapping is changed to reflect that DEST is
1167 now at top of stack. */
1169 /* The destination ought to be dead */
1170 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1173 if (regstack->top >= REG_STACK_SIZE)
1176 regstack->reg[++regstack->top] = REGNO (dest);
1177 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1178 replace_reg (pdest, FIRST_STACK_REG);
1184 /* Swap the condition on a branch, if there is one. Return true if we
1185 found a condition to swap. False if the condition was not used as
1189 swap_rtx_condition_1 (pat)
1192 register const char *fmt;
1193 register int i, r = 0;
1195 if (GET_RTX_CLASS (GET_CODE (pat)) == '<')
1197 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1202 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1203 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1209 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1210 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1212 else if (fmt[i] == 'e')
1213 r |= swap_rtx_condition_1 (XEXP (pat, i));
1221 swap_rtx_condition (insn)
1224 rtx pat = PATTERN (insn);
1226 /* We're looking for a single set to cc0 or an HImode temporary. */
1228 if (GET_CODE (pat) == SET
1229 && GET_CODE (SET_DEST (pat)) == REG
1230 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1232 insn = next_flags_user (insn);
1233 if (insn == NULL_RTX)
1235 pat = PATTERN (insn);
1238 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're
1239 not doing anything with the cc value right now. We may be able to
1240 search for one though. */
1242 if (GET_CODE (pat) == SET
1243 && GET_CODE (SET_SRC (pat)) == UNSPEC
1244 && XINT (SET_SRC (pat), 1) == 9)
1246 rtx dest = SET_DEST (pat);
1248 /* Search forward looking for the first use of this value.
1249 Stop at block boundaries. */
1250 while (insn != current_block->end)
1252 insn = NEXT_INSN (insn);
1253 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1255 if (GET_CODE (insn) == CALL_INSN)
1259 /* So we've found the insn using this value. If it is anything
1260 other than sahf, aka unspec 10, or the value does not die
1261 (meaning we'd have to search further), then we must give up. */
1262 pat = PATTERN (insn);
1263 if (GET_CODE (pat) != SET
1264 || GET_CODE (SET_SRC (pat)) != UNSPEC
1265 || XINT (SET_SRC (pat), 1) != 10
1266 || ! dead_or_set_p (insn, dest))
1269 /* Now we are prepared to handle this as a normal cc0 setter. */
1270 insn = next_flags_user (insn);
1271 if (insn == NULL_RTX)
1273 pat = PATTERN (insn);
1276 if (swap_rtx_condition_1 (pat))
1279 INSN_CODE (insn) = -1;
1280 if (recog_memoized (insn) == -1)
1282 /* In case the flags don't die here, recurse to try fix
1283 following user too. */
1284 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1286 insn = next_flags_user (insn);
1287 if (!insn || !swap_rtx_condition (insn))
1292 swap_rtx_condition_1 (pat);
1300 /* Handle a comparison. Special care needs to be taken to avoid
1301 causing comparisons that a 387 cannot do correctly, such as EQ.
1303 Also, a pop insn may need to be emitted. The 387 does have an
1304 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1305 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1309 compare_for_stack_reg (insn, regstack, pat_src)
1315 rtx src1_note, src2_note;
1318 src1 = get_true_reg (&XEXP (pat_src, 0));
1319 src2 = get_true_reg (&XEXP (pat_src, 1));
1320 flags_user = next_flags_user (insn);
1322 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1323 registers that die in this insn - move those to stack top first. */
1324 if ((! STACK_REG_P (*src1)
1325 || (STACK_REG_P (*src2)
1326 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1327 && swap_rtx_condition (insn))
1330 temp = XEXP (pat_src, 0);
1331 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1332 XEXP (pat_src, 1) = temp;
1334 src1 = get_true_reg (&XEXP (pat_src, 0));
1335 src2 = get_true_reg (&XEXP (pat_src, 1));
1337 INSN_CODE (insn) = -1;
1340 /* We will fix any death note later. */
1342 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1344 if (STACK_REG_P (*src2))
1345 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1347 src2_note = NULL_RTX;
1349 emit_swap_insn (insn, regstack, *src1);
1351 replace_reg (src1, FIRST_STACK_REG);
1353 if (STACK_REG_P (*src2))
1354 replace_reg (src2, get_hard_regnum (regstack, *src2));
1358 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1359 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1362 /* If the second operand dies, handle that. But if the operands are
1363 the same stack register, don't bother, because only one death is
1364 needed, and it was just handled. */
1367 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1368 && REGNO (*src1) == REGNO (*src2)))
1370 /* As a special case, two regs may die in this insn if src2 is
1371 next to top of stack and the top of stack also dies. Since
1372 we have already popped src1, "next to top of stack" is really
1373 at top (FIRST_STACK_REG) now. */
1375 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1378 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1379 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1383 /* The 386 can only represent death of the first operand in
1384 the case handled above. In all other cases, emit a separate
1385 pop and remove the death note from here. */
1387 /* link_cc0_insns (insn); */
1389 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1391 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1397 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1398 is the current register layout. */
1401 subst_stack_regs_pat (insn, regstack, pat)
1408 switch (GET_CODE (pat))
1411 /* Deaths in USE insns can happen in non optimizing compilation.
1412 Handle them by popping the dying register. */
1413 src = get_true_reg (&XEXP (pat, 0));
1414 if (STACK_REG_P (*src)
1415 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1417 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1420 /* ??? Uninitialized USE should not happen. */
1421 else if (get_hard_regnum (regstack, *src) == -1)
1429 dest = get_true_reg (&XEXP (pat, 0));
1430 if (STACK_REG_P (*dest))
1432 note = find_reg_note (insn, REG_DEAD, *dest);
1434 if (pat != PATTERN (insn))
1436 /* The fix_truncdi_1 pattern wants to be able to allocate
1437 it's own scratch register. It does this by clobbering
1438 an fp reg so that it is assured of an empty reg-stack
1439 register. If the register is live, kill it now.
1440 Remove the DEAD/UNUSED note so we don't try to kill it
1444 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1447 note = find_reg_note (insn, REG_UNUSED, *dest);
1451 remove_note (insn, note);
1452 replace_reg (dest, LAST_STACK_REG);
1456 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1457 indicates an uninitialized value. Because reload removed
1458 all other clobbers, this must be due to a function
1459 returning without a value. Load up a NaN. */
1462 && get_hard_regnum (regstack, *dest) == -1)
1464 pat = gen_rtx_SET (VOIDmode,
1465 FP_MODE_REG (REGNO (*dest), SFmode),
1467 PATTERN (insn) = pat;
1468 move_for_stack_reg (insn, regstack, pat);
1470 if (! note && COMPLEX_MODE_P (GET_MODE (*dest))
1471 && get_hard_regnum (regstack, FP_MODE_REG (REGNO (*dest), DFmode)) == -1)
1473 pat = gen_rtx_SET (VOIDmode,
1474 FP_MODE_REG (REGNO (*dest) + 1, SFmode),
1476 PATTERN (insn) = pat;
1477 move_for_stack_reg (insn, regstack, pat);
1486 rtx *src1 = (rtx *) NULL_PTR, *src2;
1487 rtx src1_note, src2_note;
1490 dest = get_true_reg (&SET_DEST (pat));
1491 src = get_true_reg (&SET_SRC (pat));
1492 pat_src = SET_SRC (pat);
1494 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1495 if (STACK_REG_P (*src)
1496 || (STACK_REG_P (*dest)
1497 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
1498 || GET_CODE (*src) == CONST_DOUBLE)))
1500 move_for_stack_reg (insn, regstack, pat);
1504 switch (GET_CODE (pat_src))
1507 compare_for_stack_reg (insn, regstack, pat_src);
1513 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest));
1516 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1517 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1520 replace_reg (dest, FIRST_STACK_REG);
1524 /* This is a `tstM2' case. */
1525 if (*dest != cc0_rtx)
1531 case FLOAT_TRUNCATE:
1535 /* These insns only operate on the top of the stack. DEST might
1536 be cc0_rtx if we're processing a tstM pattern. Also, it's
1537 possible that the tstM case results in a REG_DEAD note on the
1541 src1 = get_true_reg (&XEXP (pat_src, 0));
1543 emit_swap_insn (insn, regstack, *src1);
1545 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1547 if (STACK_REG_P (*dest))
1548 replace_reg (dest, FIRST_STACK_REG);
1552 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1554 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1557 replace_reg (src1, FIRST_STACK_REG);
1562 /* On i386, reversed forms of subM3 and divM3 exist for
1563 MODE_FLOAT, so the same code that works for addM3 and mulM3
1567 /* These insns can accept the top of stack as a destination
1568 from a stack reg or mem, or can use the top of stack as a
1569 source and some other stack register (possibly top of stack)
1570 as a destination. */
1572 src1 = get_true_reg (&XEXP (pat_src, 0));
1573 src2 = get_true_reg (&XEXP (pat_src, 1));
1575 /* We will fix any death note later. */
1577 if (STACK_REG_P (*src1))
1578 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1580 src1_note = NULL_RTX;
1581 if (STACK_REG_P (*src2))
1582 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1584 src2_note = NULL_RTX;
1586 /* If either operand is not a stack register, then the dest
1587 must be top of stack. */
1589 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1590 emit_swap_insn (insn, regstack, *dest);
1593 /* Both operands are REG. If neither operand is already
1594 at the top of stack, choose to make the one that is the dest
1595 the new top of stack. */
1597 int src1_hard_regnum, src2_hard_regnum;
1599 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1600 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1601 if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
1604 if (src1_hard_regnum != FIRST_STACK_REG
1605 && src2_hard_regnum != FIRST_STACK_REG)
1606 emit_swap_insn (insn, regstack, *dest);
1609 if (STACK_REG_P (*src1))
1610 replace_reg (src1, get_hard_regnum (regstack, *src1));
1611 if (STACK_REG_P (*src2))
1612 replace_reg (src2, get_hard_regnum (regstack, *src2));
1616 rtx src1_reg = XEXP (src1_note, 0);
1618 /* If the register that dies is at the top of stack, then
1619 the destination is somewhere else - merely substitute it.
1620 But if the reg that dies is not at top of stack, then
1621 move the top of stack to the dead reg, as though we had
1622 done the insn and then a store-with-pop. */
1624 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1626 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1627 replace_reg (dest, get_hard_regnum (regstack, *dest));
1631 int regno = get_hard_regnum (regstack, src1_reg);
1633 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1634 replace_reg (dest, regno);
1636 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1637 = regstack->reg[regstack->top];
1640 CLEAR_HARD_REG_BIT (regstack->reg_set,
1641 REGNO (XEXP (src1_note, 0)));
1642 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1647 rtx src2_reg = XEXP (src2_note, 0);
1648 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1650 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1651 replace_reg (dest, get_hard_regnum (regstack, *dest));
1655 int regno = get_hard_regnum (regstack, src2_reg);
1657 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1658 replace_reg (dest, regno);
1660 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1661 = regstack->reg[regstack->top];
1664 CLEAR_HARD_REG_BIT (regstack->reg_set,
1665 REGNO (XEXP (src2_note, 0)));
1666 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1671 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1672 replace_reg (dest, get_hard_regnum (regstack, *dest));
1675 /* Keep operand 1 maching with destination. */
1676 if (GET_RTX_CLASS (GET_CODE (pat_src)) == 'c'
1677 && REG_P (*src1) && REG_P (*src2)
1678 && REGNO (*src1) != REGNO (*dest))
1680 int tmp = REGNO (*src1);
1681 replace_reg (src1, REGNO (*src2));
1682 replace_reg (src2, tmp);
1687 switch (XINT (pat_src, 1))
1691 /* These insns only operate on the top of the stack. */
1693 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1695 emit_swap_insn (insn, regstack, *src1);
1697 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1699 if (STACK_REG_P (*dest))
1700 replace_reg (dest, FIRST_STACK_REG);
1704 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1706 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1709 replace_reg (src1, FIRST_STACK_REG);
1713 /* (unspec [(unspec [(compare ..)] 9)] 10)
1714 Unspec 9 is fnstsw; unspec 10 is sahf. The combination
1715 matches the PPRO fcomi instruction. */
1717 pat_src = XVECEXP (pat_src, 0, 0);
1718 if (GET_CODE (pat_src) != UNSPEC
1719 || XINT (pat_src, 1) != 9)
1724 /* (unspec [(compare ..)] 9) */
1725 /* Combined fcomp+fnstsw generated for doing well with
1726 CSE. When optimizing this would have been broken
1729 pat_src = XVECEXP (pat_src, 0, 0);
1730 if (GET_CODE (pat_src) != COMPARE)
1733 compare_for_stack_reg (insn, regstack, pat_src);
1742 /* This insn requires the top of stack to be the destination. */
1744 /* If the comparison operator is an FP comparison operator,
1745 it is handled correctly by compare_for_stack_reg () who
1746 will move the destination to the top of stack. But if the
1747 comparison operator is not an FP comparison operator, we
1748 have to handle it here. */
1749 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1750 && REGNO (*dest) != regstack->reg[regstack->top])
1751 emit_swap_insn (insn, regstack, *dest);
1753 src1 = get_true_reg (&XEXP (pat_src, 1));
1754 src2 = get_true_reg (&XEXP (pat_src, 2));
1756 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1757 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1764 src_note[1] = src1_note;
1765 src_note[2] = src2_note;
1767 if (STACK_REG_P (*src1))
1768 replace_reg (src1, get_hard_regnum (regstack, *src1));
1769 if (STACK_REG_P (*src2))
1770 replace_reg (src2, get_hard_regnum (regstack, *src2));
1772 for (i = 1; i <= 2; i++)
1775 int regno = REGNO (XEXP (src_note[i], 0));
1777 /* If the register that dies is not at the top of
1778 stack, then move the top of stack to the dead reg */
1779 if (regno != regstack->reg[regstack->top])
1781 remove_regno_note (insn, REG_DEAD, regno);
1782 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1787 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
1788 replace_reg (&XEXP (src_note[i], 0), FIRST_STACK_REG);
1794 /* Make dest the top of stack. Add dest to regstack if
1796 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1797 regstack->reg[++regstack->top] = REGNO (*dest);
1798 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1799 replace_reg (dest, FIRST_STACK_REG);
1813 /* Substitute hard regnums for any stack regs in INSN, which has
1814 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1815 before the insn, and is updated with changes made here.
1817 There are several requirements and assumptions about the use of
1818 stack-like regs in asm statements. These rules are enforced by
1819 record_asm_stack_regs; see comments there for details. Any
1820 asm_operands left in the RTL at this point may be assume to meet the
1821 requirements, since record_asm_stack_regs removes any problem asm. */
1824 subst_asm_stack_regs (insn, regstack)
1828 rtx body = PATTERN (insn);
1831 rtx *note_reg; /* Array of note contents */
1832 rtx **note_loc; /* Address of REG field of each note */
1833 enum reg_note *note_kind; /* The type of each note */
1835 rtx *clobber_reg = 0;
1836 rtx **clobber_loc = 0;
1838 struct stack_def temp_stack;
1843 int n_inputs, n_outputs;
1845 if (! check_asm_stack_operands (insn))
1848 /* Find out what the constraints required. If no constraint
1849 alternative matches, that is a compiler bug: we should have caught
1850 such an insn in check_asm_stack_operands. */
1851 extract_insn (insn);
1852 constrain_operands (1);
1853 alt = which_alternative;
1855 preprocess_constraints ();
1857 n_inputs = get_asm_operand_n_inputs (body);
1858 n_outputs = recog_data.n_operands - n_inputs;
1863 /* Strip SUBREGs here to make the following code simpler. */
1864 for (i = 0; i < recog_data.n_operands; i++)
1865 if (GET_CODE (recog_data.operand[i]) == SUBREG
1866 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
1868 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
1869 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
1872 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
1874 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
1877 note_reg = (rtx *) alloca (i * sizeof (rtx));
1878 note_loc = (rtx **) alloca (i * sizeof (rtx *));
1879 note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note));
1882 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1884 rtx reg = XEXP (note, 0);
1885 rtx *loc = & XEXP (note, 0);
1887 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1889 loc = & SUBREG_REG (reg);
1890 reg = SUBREG_REG (reg);
1893 if (STACK_REG_P (reg)
1894 && (REG_NOTE_KIND (note) == REG_DEAD
1895 || REG_NOTE_KIND (note) == REG_UNUSED))
1897 note_reg[n_notes] = reg;
1898 note_loc[n_notes] = loc;
1899 note_kind[n_notes] = REG_NOTE_KIND (note);
1904 /* Set up CLOBBER_REG and CLOBBER_LOC. */
1908 if (GET_CODE (body) == PARALLEL)
1910 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
1911 clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx *));
1913 for (i = 0; i < XVECLEN (body, 0); i++)
1914 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
1916 rtx clobber = XVECEXP (body, 0, i);
1917 rtx reg = XEXP (clobber, 0);
1918 rtx *loc = & XEXP (clobber, 0);
1920 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1922 loc = & SUBREG_REG (reg);
1923 reg = SUBREG_REG (reg);
1926 if (STACK_REG_P (reg))
1928 clobber_reg[n_clobbers] = reg;
1929 clobber_loc[n_clobbers] = loc;
1935 temp_stack = *regstack;
1937 /* Put the input regs into the desired place in TEMP_STACK. */
1939 for (i = n_outputs; i < n_outputs + n_inputs; i++)
1940 if (STACK_REG_P (recog_data.operand[i])
1941 && reg_class_subset_p (recog_op_alt[i][alt].class,
1943 && recog_op_alt[i][alt].class != FLOAT_REGS)
1945 /* If an operand needs to be in a particular reg in
1946 FLOAT_REGS, the constraint was either 't' or 'u'. Since
1947 these constraints are for single register classes, and
1948 reload guaranteed that operand[i] is already in that class,
1949 we can just use REGNO (recog_data.operand[i]) to know which
1950 actual reg this operand needs to be in. */
1952 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
1957 if (regno != REGNO (recog_data.operand[i]))
1959 /* recog_data.operand[i] is not in the right place. Find
1960 it and swap it with whatever is already in I's place.
1961 K is where recog_data.operand[i] is now. J is where it
1965 k = temp_stack.top - (regno - FIRST_STACK_REG);
1967 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
1969 temp = temp_stack.reg[k];
1970 temp_stack.reg[k] = temp_stack.reg[j];
1971 temp_stack.reg[j] = temp;
1975 /* Emit insns before INSN to make sure the reg-stack is in the right
1978 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
1980 /* Make the needed input register substitutions. Do death notes and
1981 clobbers too, because these are for inputs, not outputs. */
1983 for (i = n_outputs; i < n_outputs + n_inputs; i++)
1984 if (STACK_REG_P (recog_data.operand[i]))
1986 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
1991 replace_reg (recog_data.operand_loc[i], regnum);
1994 for (i = 0; i < n_notes; i++)
1995 if (note_kind[i] == REG_DEAD)
1997 int regnum = get_hard_regnum (regstack, note_reg[i]);
2002 replace_reg (note_loc[i], regnum);
2005 for (i = 0; i < n_clobbers; i++)
2007 /* It's OK for a CLOBBER to reference a reg that is not live.
2008 Don't try to replace it in that case. */
2009 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2013 /* Sigh - clobbers always have QImode. But replace_reg knows
2014 that these regs can't be MODE_INT and will abort. Just put
2015 the right reg there without calling replace_reg. */
2017 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2021 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2023 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2024 if (STACK_REG_P (recog_data.operand[i]))
2026 /* An input reg is implicitly popped if it is tied to an
2027 output, or if there is a CLOBBER for it. */
2030 for (j = 0; j < n_clobbers; j++)
2031 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2034 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2036 /* recog_data.operand[i] might not be at the top of stack.
2037 But that's OK, because all we need to do is pop the
2038 right number of regs off of the top of the reg-stack.
2039 record_asm_stack_regs guaranteed that all implicitly
2040 popped regs were grouped at the top of the reg-stack. */
2042 CLEAR_HARD_REG_BIT (regstack->reg_set,
2043 regstack->reg[regstack->top]);
2048 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2049 Note that there isn't any need to substitute register numbers.
2050 ??? Explain why this is true. */
2052 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2054 /* See if there is an output for this hard reg. */
2057 for (j = 0; j < n_outputs; j++)
2058 if (STACK_REG_P (recog_data.operand[j])
2059 && REGNO (recog_data.operand[j]) == i)
2061 regstack->reg[++regstack->top] = i;
2062 SET_HARD_REG_BIT (regstack->reg_set, i);
2067 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2068 input that the asm didn't implicitly pop. If the asm didn't
2069 implicitly pop an input reg, that reg will still be live.
2071 Note that we can't use find_regno_note here: the register numbers
2072 in the death notes have already been substituted. */
2074 for (i = 0; i < n_outputs; i++)
2075 if (STACK_REG_P (recog_data.operand[i]))
2079 for (j = 0; j < n_notes; j++)
2080 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2081 && note_kind[j] == REG_UNUSED)
2083 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2089 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2090 if (STACK_REG_P (recog_data.operand[i]))
2094 for (j = 0; j < n_notes; j++)
2095 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2096 && note_kind[j] == REG_DEAD
2097 && TEST_HARD_REG_BIT (regstack->reg_set,
2098 REGNO (recog_data.operand[i])))
2100 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2107 /* Substitute stack hard reg numbers for stack virtual registers in
2108 INSN. Non-stack register numbers are not changed. REGSTACK is the
2109 current stack content. Insns may be emitted as needed to arrange the
2110 stack for the 387 based on the contents of the insn. */
2113 subst_stack_regs (insn, regstack)
2117 register rtx *note_link, note;
2120 if (GET_CODE (insn) == CALL_INSN)
2122 int top = regstack->top;
2124 /* If there are any floating point parameters to be passed in
2125 registers for this call, make sure they are in the right
2130 straighten_stack (PREV_INSN (insn), regstack);
2132 /* Now mark the arguments as dead after the call. */
2134 while (regstack->top >= 0)
2136 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2142 /* Do the actual substitution if any stack regs are mentioned.
2143 Since we only record whether entire insn mentions stack regs, and
2144 subst_stack_regs_pat only works for patterns that contain stack regs,
2145 we must check each pattern in a parallel here. A call_value_pop could
2148 if (stack_regs_mentioned (insn))
2150 int n_operands = asm_noperands (PATTERN (insn));
2151 if (n_operands >= 0)
2153 /* This insn is an `asm' with operands. Decode the operands,
2154 decide how many are inputs, and do register substitution.
2155 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2157 subst_asm_stack_regs (insn, regstack);
2161 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2162 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2164 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2165 subst_stack_regs_pat (insn, regstack,
2166 XVECEXP (PATTERN (insn), 0, i));
2169 subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2172 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2173 REG_UNUSED will already have been dealt with, so just return. */
2175 if (GET_CODE (insn) == NOTE)
2178 /* If there is a REG_UNUSED note on a stack register on this insn,
2179 the indicated reg must be popped. The REG_UNUSED note is removed,
2180 since the form of the newly emitted pop insn references the reg,
2181 making it no longer `unset'. */
2183 note_link = ®_NOTES(insn);
2184 for (note = *note_link; note; note = XEXP (note, 1))
2185 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2187 *note_link = XEXP (note, 1);
2188 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2191 note_link = &XEXP (note, 1);
2194 /* Change the organization of the stack so that it fits a new basic
2195 block. Some registers might have to be popped, but there can never be
2196 a register live in the new block that is not now live.
2198 Insert any needed insns before or after INSN, as indicated by
2199 WHERE. OLD is the original stack layout, and NEW is the desired
2200 form. OLD is updated to reflect the code emitted, ie, it will be
2201 the same as NEW upon return.
2203 This function will not preserve block_end[]. But that information
2204 is no longer needed once this has executed. */
2207 change_stack (insn, old, new, where)
2211 enum emit_where where;
2216 /* We will be inserting new insns "backwards". If we are to insert
2217 after INSN, find the next insn, and insert before it. */
2219 if (where == EMIT_AFTER)
2221 if (current_block && current_block->end == insn)
2223 insn = NEXT_INSN (insn);
2226 /* Pop any registers that are not needed in the new block. */
2228 for (reg = old->top; reg >= 0; reg--)
2229 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2230 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2235 /* If the new block has never been processed, then it can inherit
2236 the old stack order. */
2238 new->top = old->top;
2239 memcpy (new->reg, old->reg, sizeof (new->reg));
2243 /* This block has been entered before, and we must match the
2244 previously selected stack order. */
2246 /* By now, the only difference should be the order of the stack,
2247 not their depth or liveliness. */
2249 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2252 if (old->top != new->top)
2255 /* If the stack is not empty (new->top != -1), loop here emitting
2256 swaps until the stack is correct.
2258 The worst case number of swaps emitted is N + 2, where N is the
2259 depth of the stack. In some cases, the reg at the top of
2260 stack may be correct, but swapped anyway in order to fix
2261 other regs. But since we never swap any other reg away from
2262 its correct slot, this algorithm will converge. */
2267 /* Swap the reg at top of stack into the position it is
2268 supposed to be in, until the correct top of stack appears. */
2270 while (old->reg[old->top] != new->reg[new->top])
2272 for (reg = new->top; reg >= 0; reg--)
2273 if (new->reg[reg] == old->reg[old->top])
2279 emit_swap_insn (insn, old,
2280 FP_MODE_REG (old->reg[reg], DFmode));
2283 /* See if any regs remain incorrect. If so, bring an
2284 incorrect reg to the top of stack, and let the while loop
2287 for (reg = new->top; reg >= 0; reg--)
2288 if (new->reg[reg] != old->reg[reg])
2290 emit_swap_insn (insn, old,
2291 FP_MODE_REG (old->reg[reg], DFmode));
2296 /* At this point there must be no differences. */
2298 for (reg = old->top; reg >= 0; reg--)
2299 if (old->reg[reg] != new->reg[reg])
2304 current_block->end = PREV_INSN (insn);
2307 /* Print stack configuration. */
2310 print_stack (file, s)
2318 fprintf (file, "uninitialized\n");
2319 else if (s->top == -1)
2320 fprintf (file, "empty\n");
2325 for (i = 0; i <= s->top; ++i)
2326 fprintf (file, "%d ", s->reg[i]);
2327 fputs ("]\n", file);
2331 /* This function was doing life analysis. We now let the regular live
2332 code do it's job, so we only need to check some extra invariants
2333 that reg-stack expects. Primary among these being that all registers
2334 are initialized before use.
2336 The function returns true when code was emitted to CFG edges and
2337 commit_edge_insertions needs to be called. */
2340 convert_regs_entry ()
2342 int inserted = 0, i;
2345 for (i = n_basic_blocks - 1; i >= 0; --i)
2347 basic_block block = BASIC_BLOCK (i);
2348 block_info bi = BLOCK_INFO (block);
2351 /* Set current register status at last instruction `uninitialized'. */
2352 bi->stack_in.top = -2;
2354 /* Copy live_at_end and live_at_start into temporaries. */
2355 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
2357 if (REGNO_REG_SET_P (block->global_live_at_end, reg))
2358 SET_HARD_REG_BIT (bi->out_reg_set, reg);
2359 if (REGNO_REG_SET_P (block->global_live_at_start, reg))
2360 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
2364 /* Load something into each stack register live at function entry.
2365 Such live registers can be caused by uninitialized variables or
2366 functions not returning values on all paths. In order to keep
2367 the push/pop code happy, and to not scrog the register stack, we
2368 must put something in these registers. Use a QNaN.
2370 Note that we are insertting converted code here. This code is
2371 never seen by the convert_regs pass. */
2373 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2375 basic_block block = e->dest;
2376 block_info bi = BLOCK_INFO (block);
2379 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2380 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2384 bi->stack_in.reg[++top] = reg;
2386 init = gen_rtx_SET (VOIDmode,
2387 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2389 insert_insn_on_edge (init, e);
2393 bi->stack_in.top = top;
2399 /* Construct the desired stack for function exit. This will either
2400 be `empty', or the function return value at top-of-stack. */
2403 convert_regs_exit ()
2405 int value_reg_low, value_reg_high;
2409 retvalue = stack_result (current_function_decl);
2410 value_reg_low = value_reg_high = -1;
2413 value_reg_low = REGNO (retvalue);
2414 value_reg_high = value_reg_low
2415 + HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1;
2418 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2419 if (value_reg_low == -1)
2420 output_stack->top = -1;
2425 output_stack->top = value_reg_high - value_reg_low;
2426 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2428 output_stack->reg[reg - value_reg_low] = reg;
2429 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2434 /* Convert stack register references in one block. */
2437 convert_regs_1 (file, block)
2441 struct stack_def regstack, tmpstack;
2442 block_info bi = BLOCK_INFO (block);
2447 current_block = block;
2451 fprintf (file, "\nBasic block %d\nInput stack: ", block->index);
2452 print_stack (file, &bi->stack_in);
2455 /* Process all insns in this block. Keep track of NEXT so that we
2456 don't process insns emitted while substituting in INSN. */
2458 regstack = bi->stack_in;
2462 next = NEXT_INSN (insn);
2464 /* Ensure we have not missed a block boundary. */
2467 if (insn == block->end)
2470 /* Don't bother processing unless there is a stack reg
2471 mentioned or if it's a CALL_INSN. */
2472 if (stack_regs_mentioned (insn)
2473 || GET_CODE (insn) == CALL_INSN)
2477 fprintf (file, " insn %d input stack: ",
2479 print_stack (file, ®stack);
2481 subst_stack_regs (insn, ®stack);
2488 fprintf (file, "Expected live registers [");
2489 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2490 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2491 fprintf (file, " %d", reg);
2492 fprintf (file, " ]\nOutput stack: ");
2493 print_stack (file, ®stack);
2497 if (GET_CODE (insn) == JUMP_INSN)
2498 insn = PREV_INSN (insn);
2500 /* If the function is declared to return a value, but it returns one
2501 in only some cases, some registers might come live here. Emit
2502 necessary moves for them. */
2504 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2506 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2507 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2513 fprintf (file, "Emitting insn initializing reg %d\n",
2517 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode),
2519 insn = emit_block_insn_after (set, insn, block);
2520 subst_stack_regs (insn, ®stack);
2524 /* Something failed if the stack lives don't match. */
2525 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2529 /* Adjust the stack of this block on exit to match the stack of the
2530 target block, or copy stack info into the stack of the successor
2531 of the successor hasn't been processed yet. */
2533 for (e = block->succ; e ; e = e->succ_next)
2535 basic_block target = e->dest;
2536 stack target_stack = &BLOCK_INFO (target)->stack_in;
2539 fprintf (file, "Edge to block %d: ", target->index);
2541 if (target_stack->top == -2)
2543 /* The target block hasn't had a stack order selected.
2544 We need merely ensure that no pops are needed. */
2545 for (reg = regstack.top; reg >= 0; --reg)
2546 if (! TEST_HARD_REG_BIT (target_stack->reg_set,
2553 fprintf (file, "new block; copying stack position\n");
2555 /* change_stack kills values in regstack. */
2556 tmpstack = regstack;
2558 change_stack (block->end, &tmpstack,
2559 target_stack, EMIT_AFTER);
2564 fprintf (file, "new block; pops needed\n");
2568 if (target_stack->top == regstack.top)
2570 for (reg = target_stack->top; reg >= 0; --reg)
2571 if (target_stack->reg[reg] != regstack.reg[reg])
2577 fprintf (file, "no changes needed\n");
2584 fprintf (file, "correcting stack to ");
2585 print_stack (file, target_stack);
2589 /* Care for non-call EH edges specially. The normal return path have
2590 values in registers. These will be popped en masse by the unwind
2592 if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH)
2593 target_stack->top = -1;
2595 /* Other calls may appear to have values live in st(0), but the
2596 abnormal return path will not have actually loaded the values. */
2597 else if (e->flags & EDGE_ABNORMAL_CALL)
2599 /* Assert that the lifetimes are as we expect -- one value
2600 live at st(0) on the end of the source block, and no
2601 values live at the beginning of the destination block. */
2604 CLEAR_HARD_REG_SET (tmp);
2605 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1);
2609 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG);
2610 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2);
2614 target_stack->top = -1;
2617 /* It is better to output directly to the end of the block
2618 instead of to the edge, because emit_swap can do minimal
2619 insn scheduling. We can do this when there is only one
2620 edge out, and it is not abnormal. */
2621 else if (block->succ->succ_next == NULL
2622 && ! (e->flags & EDGE_ABNORMAL))
2624 /* change_stack kills values in regstack. */
2625 tmpstack = regstack;
2627 change_stack (block->end, &tmpstack, target_stack,
2628 (GET_CODE (block->end) == JUMP_INSN
2629 ? EMIT_BEFORE : EMIT_AFTER));
2635 /* We don't support abnormal edges. Global takes care to
2636 avoid any live register across them, so we should never
2637 have to insert instructions on such edges. */
2638 if (e->flags & EDGE_ABNORMAL)
2641 current_block = NULL;
2644 /* ??? change_stack needs some point to emit insns after.
2645 Also needed to keep gen_sequence from returning a
2646 pattern as opposed to a sequence, which would lose
2648 after = emit_note (NULL, NOTE_INSN_DELETED);
2650 tmpstack = regstack;
2651 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE);
2653 seq = gen_sequence ();
2656 insert_insn_on_edge (seq, e);
2658 current_block = block;
2665 /* Convert registers in all blocks reachable from BLOCK. */
2668 convert_regs_2 (file, block)
2672 basic_block *stack, *sp;
2675 stack = (basic_block *) xmalloc (sizeof (*stack) * n_basic_blocks);
2679 BLOCK_INFO (block)->done = 1;
2687 inserted |= convert_regs_1 (file, block);
2689 for (e = block->succ; e ; e = e->succ_next)
2690 if (! BLOCK_INFO (e->dest)->done)
2693 BLOCK_INFO (e->dest)->done = 1;
2696 while (sp != stack);
2701 /* Traverse all basic blocks in a function, converting the register
2702 references in each insn from the "flat" register file that gcc uses,
2703 to the stack-like registers the 387 uses. */
2712 /* Initialize uninitialized registers on function entry. */
2713 inserted = convert_regs_entry ();
2715 /* Construct the desired stack for function exit. */
2716 convert_regs_exit ();
2717 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
2719 /* ??? Future: process inner loops first, and give them arbitrary
2720 initial stacks which emit_swap_insn can modify. This ought to
2721 prevent double fxch that aften appears at the head of a loop. */
2723 /* Process all blocks reachable from all entry points. */
2724 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2725 inserted |= convert_regs_2 (file, e->dest);
2727 /* ??? Process all unreachable blocks. Though there's no excuse
2728 for keeping these even when not optimizing. */
2729 for (i = 0; i < n_basic_blocks; ++i)
2731 basic_block b = BASIC_BLOCK (i);
2732 block_info bi = BLOCK_INFO (b);
2738 /* Create an arbitrary input stack. */
2739 bi->stack_in.top = -1;
2740 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2741 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2742 bi->stack_in.reg[++bi->stack_in.top] = reg;
2744 inserted |= convert_regs_2 (file, b);
2749 commit_edge_insertions ();
2756 #endif /* STACK_REGS */