1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 93, 94, 95, 96, 97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 /* This pass converts stack-like registers from the "flat register
22 file" model that gcc uses, to a stack convention that the 387 uses.
24 * The form of the input:
26 On input, the function consists of insn that have had their
27 registers fully allocated to a set of "virtual" registers. Note that
28 the word "virtual" is used differently here than elsewhere in gcc: for
29 each virtual stack reg, there is a hard reg, but the mapping between
30 them is not known until this pass is run. On output, hard register
31 numbers have been substituted, and various pop and exchange insns have
32 been emitted. The hard register numbers and the virtual register
33 numbers completely overlap - before this pass, all stack register
34 numbers are virtual, and afterward they are all hard.
36 The virtual registers can be manipulated normally by gcc, and their
37 semantics are the same as for normal registers. After the hard
38 register numbers are substituted, the semantics of an insn containing
39 stack-like regs are not the same as for an insn with normal regs: for
40 instance, it is not safe to delete an insn that appears to be a no-op
41 move. In general, no insn containing hard regs should be changed
42 after this pass is done.
44 * The form of the output:
46 After this pass, hard register numbers represent the distance from
47 the current top of stack to the desired register. A reference to
48 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
49 represents the register just below that, and so forth. Also, REG_DEAD
50 notes indicate whether or not a stack register should be popped.
52 A "swap" insn looks like a parallel of two patterns, where each
53 pattern is a SET: one sets A to B, the other B to A.
55 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
56 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
57 will replace the existing stack top, not push a new value.
59 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
60 SET_SRC is REG or MEM.
62 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
63 appears ambiguous. As a special case, the presence of a REG_DEAD note
64 for FIRST_STACK_REG differentiates between a load insn and a pop.
66 If a REG_DEAD is present, the insn represents a "pop" that discards
67 the top of the register stack. If there is no REG_DEAD note, then the
68 insn represents a "dup" or a push of the current top of stack onto the
73 Existing REG_DEAD and REG_UNUSED notes for stack registers are
74 deleted and recreated from scratch. REG_DEAD is never created for a
75 SET_DEST, only REG_UNUSED.
77 Before life analysis, the mode of each insn is set based on whether
78 or not any stack registers are mentioned within that insn. VOIDmode
79 means that no regs are mentioned anyway, and QImode means that at
80 least one pattern within the insn mentions stack registers. This
81 information is valid until after reg_to_stack returns, and is used
86 There are several rules on the usage of stack-like regs in
87 asm_operands insns. These rules apply only to the operands that are
90 1. Given a set of input regs that die in an asm_operands, it is
91 necessary to know which are implicitly popped by the asm, and
92 which must be explicitly popped by gcc.
94 An input reg that is implicitly popped by the asm must be
95 explicitly clobbered, unless it is constrained to match an
98 2. For any input reg that is implicitly popped by an asm, it is
99 necessary to know how to adjust the stack to compensate for the pop.
100 If any non-popped input is closer to the top of the reg-stack than
101 the implicitly popped reg, it would not be possible to know what the
102 stack looked like - it's not clear how the rest of the stack "slides
105 All implicitly popped input regs must be closer to the top of
106 the reg-stack than any input that is not implicitly popped.
108 3. It is possible that if an input dies in an insn, reload might
109 use the input reg for an output reload. Consider this example:
111 asm ("foo" : "=t" (a) : "f" (b));
113 This asm says that input B is not popped by the asm, and that
114 the asm pushes a result onto the reg-stack, ie, the stack is one
115 deeper after the asm than it was before. But, it is possible that
116 reload will think that it can use the same reg for both the input and
117 the output, if input B dies in this insn.
119 If any input operand uses the "f" constraint, all output reg
120 constraints must use the "&" earlyclobber.
122 The asm above would be written as
124 asm ("foo" : "=&t" (a) : "f" (b));
126 4. Some operands need to be in particular places on the stack. All
127 output operands fall in this category - there is no other way to
128 know which regs the outputs appear in unless the user indicates
129 this in the constraints.
131 Output operands must specifically indicate which reg an output
132 appears in after an asm. "=f" is not allowed: the operand
133 constraints must select a class with a single reg.
135 5. Output operands may not be "inserted" between existing stack regs.
136 Since no 387 opcode uses a read/write operand, all output operands
137 are dead before the asm_operands, and are pushed by the asm_operands.
138 It makes no sense to push anywhere but the top of the reg-stack.
140 Output operands must start at the top of the reg-stack: output
141 operands may not "skip" a reg.
143 6. Some asm statements may need extra stack space for internal
144 calculations. This can be guaranteed by clobbering stack registers
145 unrelated to the inputs and outputs.
147 Here are a couple of reasonable asms to want to write. This asm
148 takes one input, which is internally popped, and produces two outputs.
150 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
152 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
153 and replaces them with one output. The user must code the "st(1)"
154 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
156 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
164 #include "insn-config.h"
166 #include "hard-reg-set.h"
168 #include "insn-flags.h"
172 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
174 /* This is the basic stack record. TOP is an index into REG[] such
175 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
177 If TOP is -2, REG[] is not yet initialized. Stack initialization
178 consists of placing each live reg in array `reg' and setting `top'
181 REG_SET indicates which registers are live. */
183 typedef struct stack_def
185 int top; /* index to top stack element */
186 HARD_REG_SET reg_set; /* set of live registers */
187 char reg[REG_STACK_SIZE]; /* register - stack mapping */
190 /* highest instruction uid */
191 static int max_uid = 0;
193 /* Number of basic blocks in the current function. */
196 /* Element N is first insn in basic block N.
197 This info lasts until we finish compiling the function. */
198 static rtx *block_begin;
200 /* Element N is last insn in basic block N.
201 This info lasts until we finish compiling the function. */
202 static rtx *block_end;
204 /* Element N is nonzero if control can drop into basic block N */
205 static char *block_drops_in;
207 /* Element N says all about the stack at entry block N */
208 static stack block_stack_in;
210 /* Element N says all about the stack life at the end of block N */
211 static HARD_REG_SET *block_out_reg_set;
213 /* This is where the BLOCK_NUM values are really stored. This is set
214 up by find_blocks and used there and in life_analysis. It can be used
215 later, but only to look up an insn that is the head or tail of some
216 block. life_analysis and the stack register conversion process can
217 add insns within a block. */
218 static int *block_number;
220 /* This is the register file for all register after conversion */
222 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
224 #define FP_MODE_REG(regno,mode) \
225 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)])
227 /* Get the basic block number of an insn. See note at block_number
228 definition are validity of this information. */
230 #define BLOCK_NUM(INSN) \
231 ((INSN_UID (INSN) > max_uid) \
232 ? (abort() , -1) : block_number[INSN_UID (INSN)])
234 extern rtx forced_labels;
236 /* Forward declarations */
238 static void mark_regs_pat PROTO((rtx, HARD_REG_SET *));
239 static void straighten_stack PROTO((rtx, stack));
240 static void pop_stack PROTO((stack, int));
241 static void record_label_references PROTO((rtx, rtx));
242 static rtx *get_true_reg PROTO((rtx *));
243 static int constrain_asm_operands PROTO((int, rtx *, char **, int *,
246 static void record_asm_reg_life PROTO((rtx,stack, rtx *, char **,
248 static void record_reg_life_pat PROTO((rtx, HARD_REG_SET *,
249 HARD_REG_SET *, int));
250 static void get_asm_operand_lengths PROTO((rtx, int, int *, int *));
251 static void record_reg_life PROTO((rtx, int, stack));
252 static void find_blocks PROTO((rtx));
253 static rtx stack_result PROTO((tree));
254 static void stack_reg_life_analysis PROTO((rtx, HARD_REG_SET *));
255 static void replace_reg PROTO((rtx *, int));
256 static void remove_regno_note PROTO((rtx, enum reg_note, int));
257 static int get_hard_regnum PROTO((stack, rtx));
258 static void delete_insn_for_stacker PROTO((rtx));
259 static rtx emit_pop_insn PROTO((rtx, stack, rtx, rtx (*) ()));
260 static void emit_swap_insn PROTO((rtx, stack, rtx));
261 static void move_for_stack_reg PROTO((rtx, stack, rtx));
262 static void swap_rtx_condition PROTO((rtx));
263 static void compare_for_stack_reg PROTO((rtx, stack, rtx));
264 static void subst_stack_regs_pat PROTO((rtx, stack, rtx));
265 static void subst_asm_stack_regs PROTO((rtx, stack, rtx *, rtx **,
267 static void subst_stack_regs PROTO((rtx, stack));
268 static void change_stack PROTO((rtx, stack, stack, rtx (*) ()));
270 static void goto_block_pat PROTO((rtx, stack, rtx));
271 static void convert_regs PROTO((void));
272 static void print_blocks PROTO((FILE *, rtx, rtx));
273 static void dump_stack_info PROTO((FILE *));
275 /* Mark all registers needed for this pattern. */
278 mark_regs_pat (pat, set)
282 enum machine_mode mode;
286 if (GET_CODE (pat) == SUBREG)
288 mode = GET_MODE (pat);
289 regno = SUBREG_WORD (pat);
290 regno += REGNO (SUBREG_REG (pat));
293 regno = REGNO (pat), mode = GET_MODE (pat);
295 for (count = HARD_REGNO_NREGS (regno, mode);
296 count; count--, regno++)
297 SET_HARD_REG_BIT (*set, regno);
300 /* Reorganise the stack into ascending numbers,
304 straighten_stack (insn, regstack)
308 struct stack_def temp_stack;
311 temp_stack.reg_set = regstack->reg_set;
313 for (top = temp_stack.top = regstack->top; top >= 0; top--)
314 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
316 change_stack (insn, regstack, &temp_stack, emit_insn_after);
319 /* Pop a register from the stack */
322 pop_stack (regstack, regno)
326 int top = regstack->top;
328 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
330 /* If regno was not at the top of stack then adjust stack */
331 if (regstack->reg [top] != regno)
334 for (i = regstack->top; i >= 0; i--)
335 if (regstack->reg [i] == regno)
338 for (j = i; j < top; j++)
339 regstack->reg [j] = regstack->reg [j + 1];
345 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
348 stack_regs_mentioned_p (pat)
354 if (STACK_REG_P (pat))
357 fmt = GET_RTX_FORMAT (GET_CODE (pat));
358 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
364 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
365 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
368 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
375 /* Convert register usage from "flat" register file usage to a "stack
376 register file. FIRST is the first insn in the function, FILE is the
379 First compute the beginning and end of each basic block. Do a
380 register life analysis on the stack registers, recording the result
381 for the head and tail of each basic block. The convert each insn one
382 by one. Run a last jump_optimize() pass, if optimizing, to eliminate
383 any cross-jumping created when the converter inserts pop insns.*/
386 reg_to_stack (first, file)
392 int stack_reg_seen = 0;
393 enum machine_mode mode;
394 HARD_REG_SET stackentry;
396 CLEAR_HARD_REG_SET (stackentry);
399 static int initialised;
403 initialised = 1; /* This array can not have been previously
404 initialised, because the rtx's are
405 thrown away between compilations of
408 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
410 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
411 mode = GET_MODE_WIDER_MODE (mode))
412 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
413 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); mode != VOIDmode;
414 mode = GET_MODE_WIDER_MODE (mode))
415 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
420 /* Count the basic blocks. Also find maximum insn uid. */
422 register RTX_CODE prev_code = BARRIER;
423 register RTX_CODE code;
424 register int before_function_beg = 1;
428 for (insn = first; insn; insn = NEXT_INSN (insn))
430 /* Note that this loop must select the same block boundaries
431 as code in find_blocks. Also note that this code is not the
432 same as that used in flow.c. */
434 if (INSN_UID (insn) > max_uid)
435 max_uid = INSN_UID (insn);
437 code = GET_CODE (insn);
439 if (code == CODE_LABEL
440 || (prev_code != INSN
441 && prev_code != CALL_INSN
442 && prev_code != CODE_LABEL
443 && GET_RTX_CLASS (code) == 'i'))
446 if (code == NOTE && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG)
447 before_function_beg = 0;
449 /* Remember whether or not this insn mentions an FP regs.
450 Check JUMP_INSNs too, in case someone creates a funny PARALLEL. */
452 if (GET_RTX_CLASS (code) == 'i'
453 && stack_regs_mentioned_p (PATTERN (insn)))
456 PUT_MODE (insn, QImode);
458 /* Note any register passing parameters. */
460 if (before_function_beg && code == INSN
461 && GET_CODE (PATTERN (insn)) == USE)
462 record_reg_life_pat (PATTERN (insn), (HARD_REG_SET *) 0,
466 PUT_MODE (insn, VOIDmode);
468 if (code == CODE_LABEL)
469 LABEL_REFS (insn) = insn; /* delete old chain */
476 /* If no stack register reference exists in this insn, there isn't
477 anything to convert. */
479 if (! stack_reg_seen)
482 /* If there are stack registers, there must be at least one block. */
487 /* Allocate some tables that last till end of compiling this function
488 and some needed only in find_blocks and life_analysis. */
490 block_begin = (rtx *) alloca (blocks * sizeof (rtx));
491 block_end = (rtx *) alloca (blocks * sizeof (rtx));
492 block_drops_in = (char *) alloca (blocks);
494 block_stack_in = (stack) alloca (blocks * sizeof (struct stack_def));
495 block_out_reg_set = (HARD_REG_SET *) alloca (blocks * sizeof (HARD_REG_SET));
496 bzero ((char *) block_stack_in, blocks * sizeof (struct stack_def));
497 bzero ((char *) block_out_reg_set, blocks * sizeof (HARD_REG_SET));
499 block_number = (int *) alloca ((max_uid + 1) * sizeof (int));
502 stack_reg_life_analysis (first, &stackentry);
504 /* Dump the life analysis debug information before jump
505 optimization, as that will destroy the LABEL_REFS we keep the
509 dump_stack_info (file);
514 jump_optimize (first, 2, 0, 0);
517 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
518 label's chain of references, and note which insn contains each
522 record_label_references (insn, pat)
525 register enum rtx_code code = GET_CODE (pat);
529 if (code == LABEL_REF)
531 register rtx label = XEXP (pat, 0);
534 if (GET_CODE (label) != CODE_LABEL)
537 /* If this is an undefined label, LABEL_REFS (label) contains
539 if (INSN_UID (label) == 0)
542 /* Don't make a duplicate in the code_label's chain. */
544 for (ref = LABEL_REFS (label);
546 ref = LABEL_NEXTREF (ref))
547 if (CONTAINING_INSN (ref) == insn)
550 CONTAINING_INSN (pat) = insn;
551 LABEL_NEXTREF (pat) = LABEL_REFS (label);
552 LABEL_REFS (label) = pat;
557 fmt = GET_RTX_FORMAT (code);
558 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
561 record_label_references (insn, XEXP (pat, i));
565 for (j = 0; j < XVECLEN (pat, i); j++)
566 record_label_references (insn, XVECEXP (pat, i, j));
571 /* Return a pointer to the REG expression within PAT. If PAT is not a
572 REG, possible enclosed by a conversion rtx, return the inner part of
573 PAT that stopped the search. */
580 switch (GET_CODE (*pat))
583 /* eliminate FP subregister accesses in favour of the
584 actual FP register in use. */
587 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
589 *pat = FP_MODE_REG (REGNO (subreg) + SUBREG_WORD (*pat),
598 pat = & XEXP (*pat, 0);
602 /* Scan the OPERANDS and OPERAND_CONSTRAINTS of an asm_operands.
603 N_OPERANDS is the total number of operands. Return which alternative
604 matched, or -1 is no alternative matches.
606 OPERAND_MATCHES is an array which indicates which operand this
607 operand matches due to the constraints, or -1 if no match is required.
608 If two operands match by coincidence, but are not required to match by
609 the constraints, -1 is returned.
611 OPERAND_CLASS is an array which indicates the smallest class
612 required by the constraints. If the alternative that matches calls
613 for some class `class', and the operand matches a subclass of `class',
614 OPERAND_CLASS is set to `class' as required by the constraints, not to
615 the subclass. If an alternative allows more than one class,
616 OPERAND_CLASS is set to the smallest class that is a union of the
620 constrain_asm_operands (n_operands, operands, operand_constraints,
621 operand_matches, operand_class)
624 char **operand_constraints;
625 int *operand_matches;
626 enum reg_class *operand_class;
628 char **constraints = (char **) alloca (n_operands * sizeof (char *));
630 int this_alternative, this_operand;
634 for (j = 0; j < n_operands; j++)
635 constraints[j] = operand_constraints[j];
637 /* Compute the number of alternatives in the operands. reload has
638 already guaranteed that all operands have the same number of
646 for (q = constraints[0]; *q; q++)
647 n_alternatives += (*q == ',');
650 this_alternative = 0;
651 while (this_alternative < n_alternatives)
656 /* No operands match, no narrow class requirements yet. */
657 for (i = 0; i < n_operands; i++)
659 operand_matches[i] = -1;
660 operand_class[i] = NO_REGS;
663 for (this_operand = 0; this_operand < n_operands; this_operand++)
665 rtx op = operands[this_operand];
666 enum machine_mode mode = GET_MODE (op);
667 char *p = constraints[this_operand];
672 if (GET_CODE (op) == SUBREG)
674 if (GET_CODE (SUBREG_REG (op)) == REG
675 && REGNO (SUBREG_REG (op)) < FIRST_PSEUDO_REGISTER)
676 offset = SUBREG_WORD (op);
677 op = SUBREG_REG (op);
680 /* An empty constraint or empty alternative
681 allows anything which matched the pattern. */
682 if (*p == 0 || *p == ',')
685 while (*p && (c = *p++) != ',')
699 /* Ignore rest of this alternative. */
700 while (*p && *p != ',') p++;
709 /* This operand must be the same as a previous one.
710 This kind of constraint is used for instructions such
711 as add when they take only two operands.
713 Note that the lower-numbered operand is passed first. */
715 if (operands_match_p (operands[c - '0'],
716 operands[this_operand]))
718 operand_matches[this_operand] = c - '0';
724 /* p is used for address_operands. Since this is an asm,
725 just to make sure that the operand is valid for Pmode. */
727 if (strict_memory_address_p (Pmode, op))
732 /* Anything goes unless it is a REG and really has a hard reg
733 but the hard reg is not in the class GENERAL_REGS. */
734 if (GENERAL_REGS == ALL_REGS
735 || GET_CODE (op) != REG
736 || reg_fits_class_p (op, GENERAL_REGS, offset, mode))
738 if (GET_CODE (op) == REG)
739 operand_class[this_operand]
740 = reg_class_subunion[(int) operand_class[this_operand]][(int) GENERAL_REGS];
746 if (GET_CODE (op) == REG
747 && (GENERAL_REGS == ALL_REGS
748 || reg_fits_class_p (op, GENERAL_REGS, offset, mode)))
750 operand_class[this_operand]
751 = reg_class_subunion[(int) operand_class[this_operand]][(int) GENERAL_REGS];
757 /* This is used for a MATCH_SCRATCH in the cases when we
758 don't actually need anything. So anything goes any time. */
763 if (GET_CODE (op) == MEM)
768 if (GET_CODE (op) == MEM
769 && (GET_CODE (XEXP (op, 0)) == PRE_DEC
770 || GET_CODE (XEXP (op, 0)) == POST_DEC))
775 if (GET_CODE (op) == MEM
776 && (GET_CODE (XEXP (op, 0)) == PRE_INC
777 || GET_CODE (XEXP (op, 0)) == POST_INC))
782 /* Match any CONST_DOUBLE, but only if
783 we can examine the bits of it reliably. */
784 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
785 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
786 && GET_CODE (op) != VOIDmode && ! flag_pretend_float)
788 if (GET_CODE (op) == CONST_DOUBLE)
793 if (GET_CODE (op) == CONST_DOUBLE)
799 if (GET_CODE (op) == CONST_DOUBLE
800 && CONST_DOUBLE_OK_FOR_LETTER_P (op, c))
805 if (GET_CODE (op) == CONST_INT
806 || (GET_CODE (op) == CONST_DOUBLE
807 && GET_MODE (op) == VOIDmode))
816 if (GET_CODE (op) == CONST_INT
817 || (GET_CODE (op) == CONST_DOUBLE
818 && GET_MODE (op) == VOIDmode))
830 if (GET_CODE (op) == CONST_INT
831 && CONST_OK_FOR_LETTER_P (INTVAL (op), c))
835 #ifdef EXTRA_CONSTRAINT
841 if (EXTRA_CONSTRAINT (op, c))
847 if (GET_CODE (op) == MEM && ! offsettable_memref_p (op))
852 if (offsettable_memref_p (op))
857 if (GET_CODE (op) == REG
858 && reg_fits_class_p (op, REG_CLASS_FROM_LETTER (c),
861 operand_class[this_operand]
862 = reg_class_subunion[(int)operand_class[this_operand]][(int) REG_CLASS_FROM_LETTER (c)];
867 constraints[this_operand] = p;
868 /* If this operand did not win somehow,
869 this alternative loses. */
873 /* This alternative won; the operands are ok.
874 Change whichever operands this alternative says to change. */
881 /* For operands constrained to match another operand, copy the other
882 operand's class to this operand's class. */
883 for (j = 0; j < n_operands; j++)
884 if (operand_matches[j] >= 0)
885 operand_class[j] = operand_class[operand_matches[j]];
887 return this_alternative == n_alternatives ? -1 : this_alternative;
890 /* Record the life info of each stack reg in INSN, updating REGSTACK.
891 N_INPUTS is the number of inputs; N_OUTPUTS the outputs. CONSTRAINTS
892 is an array of the constraint strings used in the asm statement.
893 OPERANDS is an array of all operands for the insn, and is assumed to
894 contain all output operands, then all inputs operands.
896 There are many rules that an asm statement for stack-like regs must
897 follow. Those rules are explained at the top of this file: the rule
898 numbers below refer to that explanation. */
901 record_asm_reg_life (insn, regstack, operands, constraints,
907 int n_inputs, n_outputs;
910 int n_operands = n_inputs + n_outputs;
911 int first_input = n_outputs;
913 int malformed_asm = 0;
914 rtx body = PATTERN (insn);
916 int *operand_matches = (int *) alloca (n_operands * sizeof (int *));
918 enum reg_class *operand_class
919 = (enum reg_class *) alloca (n_operands * sizeof (enum reg_class *));
921 int reg_used_as_output[FIRST_PSEUDO_REGISTER];
922 int implicitly_dies[FIRST_PSEUDO_REGISTER];
926 /* Find out what the constraints require. If no constraint
927 alternative matches, this asm is malformed. */
928 i = constrain_asm_operands (n_operands, operands, constraints,
929 operand_matches, operand_class);
933 /* Strip SUBREGs here to make the following code simpler. */
934 for (i = 0; i < n_operands; i++)
935 if (GET_CODE (operands[i]) == SUBREG
936 && GET_CODE (SUBREG_REG (operands[i])) == REG)
937 operands[i] = SUBREG_REG (operands[i]);
939 /* Set up CLOBBER_REG. */
943 if (GET_CODE (body) == PARALLEL)
945 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx *));
947 for (i = 0; i < XVECLEN (body, 0); i++)
948 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
950 rtx clobber = XVECEXP (body, 0, i);
951 rtx reg = XEXP (clobber, 0);
953 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
954 reg = SUBREG_REG (reg);
956 if (STACK_REG_P (reg))
958 clobber_reg[n_clobbers] = reg;
964 /* Enforce rule #4: Output operands must specifically indicate which
965 reg an output appears in after an asm. "=f" is not allowed: the
966 operand constraints must select a class with a single reg.
968 Also enforce rule #5: Output operands must start at the top of
969 the reg-stack: output operands may not "skip" a reg. */
971 bzero ((char *) reg_used_as_output, sizeof (reg_used_as_output));
972 for (i = 0; i < n_outputs; i++)
973 if (STACK_REG_P (operands[i]))
975 if (reg_class_size[(int) operand_class[i]] != 1)
977 error_for_asm (insn, "Output constraint %d must specify a single register", i);
981 reg_used_as_output[REGNO (operands[i])] = 1;
985 /* Search for first non-popped reg. */
986 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
987 if (! reg_used_as_output[i])
990 /* If there are any other popped regs, that's an error. */
991 for (; i < LAST_STACK_REG + 1; i++)
992 if (reg_used_as_output[i])
995 if (i != LAST_STACK_REG + 1)
997 error_for_asm (insn, "Output regs must be grouped at top of stack");
1001 /* Enforce rule #2: All implicitly popped input regs must be closer
1002 to the top of the reg-stack than any input that is not implicitly
1005 bzero ((char *) implicitly_dies, sizeof (implicitly_dies));
1006 for (i = first_input; i < first_input + n_inputs; i++)
1007 if (STACK_REG_P (operands[i]))
1009 /* An input reg is implicitly popped if it is tied to an
1010 output, or if there is a CLOBBER for it. */
1013 for (j = 0; j < n_clobbers; j++)
1014 if (operands_match_p (clobber_reg[j], operands[i]))
1017 if (j < n_clobbers || operand_matches[i] >= 0)
1018 implicitly_dies[REGNO (operands[i])] = 1;
1021 /* Search for first non-popped reg. */
1022 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
1023 if (! implicitly_dies[i])
1026 /* If there are any other popped regs, that's an error. */
1027 for (; i < LAST_STACK_REG + 1; i++)
1028 if (implicitly_dies[i])
1031 if (i != LAST_STACK_REG + 1)
1033 error_for_asm (insn,
1034 "Implicitly popped regs must be grouped at top of stack");
1038 /* Enfore rule #3: If any input operand uses the "f" constraint, all
1039 output constraints must use the "&" earlyclobber.
1041 ??? Detect this more deterministically by having constraint_asm_operands
1042 record any earlyclobber. */
1044 for (i = first_input; i < first_input + n_inputs; i++)
1045 if (operand_matches[i] == -1)
1049 for (j = 0; j < n_outputs; j++)
1050 if (operands_match_p (operands[j], operands[i]))
1052 error_for_asm (insn,
1053 "Output operand %d must use `&' constraint", j);
1060 /* Avoid further trouble with this insn. */
1061 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
1062 PUT_MODE (insn, VOIDmode);
1066 /* Process all outputs */
1067 for (i = 0; i < n_outputs; i++)
1069 rtx op = operands[i];
1071 if (! STACK_REG_P (op))
1073 if (stack_regs_mentioned_p (op))
1079 /* Each destination is dead before this insn. If the
1080 destination is not used after this insn, record this with
1083 if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (op)))
1084 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_UNUSED, op,
1087 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (op));
1090 /* Process all inputs */
1091 for (i = first_input; i < first_input + n_inputs; i++)
1093 if (! STACK_REG_P (operands[i]))
1095 if (stack_regs_mentioned_p (operands[i]))
1101 /* If an input is dead after the insn, record a death note.
1102 But don't record a death note if there is already a death note,
1103 or if the input is also an output. */
1105 if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i]))
1106 && operand_matches[i] == -1
1107 && find_regno_note (insn, REG_DEAD, REGNO (operands[i])) == NULL_RTX)
1108 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, operands[i],
1111 SET_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i]));
1115 /* Scan PAT, which is part of INSN, and record registers appearing in
1116 a SET_DEST in DEST, and other registers in SRC.
1118 This function does not know about SET_DESTs that are both input and
1119 output (such as ZERO_EXTRACT) - this cannot happen on a 387. */
1122 record_reg_life_pat (pat, src, dest, douse)
1124 HARD_REG_SET *src, *dest;
1130 if (STACK_REG_P (pat)
1131 || (GET_CODE (pat) == SUBREG && STACK_REG_P (SUBREG_REG (pat))))
1134 mark_regs_pat (pat, src);
1137 mark_regs_pat (pat, dest);
1142 if (GET_CODE (pat) == SET)
1144 record_reg_life_pat (XEXP (pat, 0), NULL_PTR, dest, 0);
1145 record_reg_life_pat (XEXP (pat, 1), src, NULL_PTR, 0);
1149 /* We don't need to consider either of these cases. */
1150 if ((GET_CODE (pat) == USE && !douse) || GET_CODE (pat) == CLOBBER)
1153 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1154 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1160 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1161 record_reg_life_pat (XVECEXP (pat, i, j), src, dest, 0);
1163 else if (fmt[i] == 'e')
1164 record_reg_life_pat (XEXP (pat, i), src, dest, 0);
1168 /* Calculate the number of inputs and outputs in BODY, an
1169 asm_operands. N_OPERANDS is the total number of operands, and
1170 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
1174 get_asm_operand_lengths (body, n_operands, n_inputs, n_outputs)
1177 int *n_inputs, *n_outputs;
1179 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
1180 *n_inputs = ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
1182 else if (GET_CODE (body) == ASM_OPERANDS)
1183 *n_inputs = ASM_OPERANDS_INPUT_LENGTH (body);
1185 else if (GET_CODE (body) == PARALLEL
1186 && GET_CODE (XVECEXP (body, 0, 0)) == SET)
1187 *n_inputs = ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
1189 else if (GET_CODE (body) == PARALLEL
1190 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
1191 *n_inputs = ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
1195 *n_outputs = n_operands - *n_inputs;
1198 /* Scan INSN, which is in BLOCK, and record the life & death of stack
1199 registers in REGSTACK. This function is called to process insns from
1200 the last insn in a block to the first. The actual scanning is done in
1201 record_reg_life_pat.
1203 If a register is live after a CALL_INSN, but is not a value return
1204 register for that CALL_INSN, then code is emitted to initialize that
1205 register. The block_end[] data is kept accurate.
1207 Existing death and unset notes for stack registers are deleted
1208 before processing the insn. */
1211 record_reg_life (insn, block, regstack)
1216 rtx note, *note_link;
1219 if ((GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
1220 || INSN_DELETED_P (insn))
1223 /* Strip death notes for stack regs from this insn */
1225 note_link = ®_NOTES(insn);
1226 for (note = *note_link; note; note = XEXP (note, 1))
1227 if (STACK_REG_P (XEXP (note, 0))
1228 && (REG_NOTE_KIND (note) == REG_DEAD
1229 || REG_NOTE_KIND (note) == REG_UNUSED))
1230 *note_link = XEXP (note, 1);
1232 note_link = &XEXP (note, 1);
1234 /* Process all patterns in the insn. */
1236 n_operands = asm_noperands (PATTERN (insn));
1237 if (n_operands >= 0)
1239 /* This insn is an `asm' with operands. Decode the operands,
1240 decide how many are inputs, and record the life information. */
1242 rtx operands[MAX_RECOG_OPERANDS];
1243 rtx body = PATTERN (insn);
1244 int n_inputs, n_outputs;
1245 char **constraints = (char **) alloca (n_operands * sizeof (char *));
1247 decode_asm_operands (body, operands, NULL_PTR, constraints, NULL_PTR);
1248 get_asm_operand_lengths (body, n_operands, &n_inputs, &n_outputs);
1249 record_asm_reg_life (insn, regstack, operands, constraints,
1250 n_inputs, n_outputs);
1255 HARD_REG_SET src, dest;
1258 CLEAR_HARD_REG_SET (src);
1259 CLEAR_HARD_REG_SET (dest);
1261 if (GET_CODE (insn) == CALL_INSN)
1262 for (note = CALL_INSN_FUNCTION_USAGE (insn);
1264 note = XEXP (note, 1))
1265 if (GET_CODE (XEXP (note, 0)) == USE)
1266 record_reg_life_pat (SET_DEST (XEXP (note, 0)), &src, NULL_PTR, 0);
1268 record_reg_life_pat (PATTERN (insn), &src, &dest, 0);
1269 for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++)
1270 if (! TEST_HARD_REG_BIT (regstack->reg_set, regno))
1272 if (TEST_HARD_REG_BIT (src, regno)
1273 && ! TEST_HARD_REG_BIT (dest, regno))
1274 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD,
1275 FP_MODE_REG (regno, DFmode),
1277 else if (TEST_HARD_REG_BIT (dest, regno))
1278 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_UNUSED,
1279 FP_MODE_REG (regno, DFmode),
1283 if (GET_CODE (insn) == CALL_INSN)
1287 /* There might be a reg that is live after a function call.
1288 Initialize it to zero so that the program does not crash. See
1289 comment towards the end of stack_reg_life_analysis(). */
1291 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
1292 if (! TEST_HARD_REG_BIT (dest, reg)
1293 && TEST_HARD_REG_BIT (regstack->reg_set, reg))
1297 /* The insn will use virtual register numbers, and so
1298 convert_regs is expected to process these. But BLOCK_NUM
1299 cannot be used on these insns, because they do not appear in
1302 pat = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, DFmode),
1303 CONST0_RTX (DFmode));
1304 init = emit_insn_after (pat, insn);
1305 PUT_MODE (init, QImode);
1307 CLEAR_HARD_REG_BIT (regstack->reg_set, reg);
1309 /* If the CALL_INSN was the end of a block, move the
1310 block_end to point to the new insn. */
1312 if (block_end[block] == insn)
1313 block_end[block] = init;
1316 /* Some regs do not survive a CALL */
1317 AND_COMPL_HARD_REG_SET (regstack->reg_set, call_used_reg_set);
1320 AND_COMPL_HARD_REG_SET (regstack->reg_set, dest);
1321 IOR_HARD_REG_SET (regstack->reg_set, src);
1325 /* Find all basic blocks of the function, which starts with FIRST.
1326 For each JUMP_INSN, build the chain of LABEL_REFS on each CODE_LABEL. */
1334 register RTX_CODE prev_code = BARRIER;
1335 register RTX_CODE code;
1336 rtx label_value_list = 0;
1338 /* Record where all the blocks start and end.
1339 Record which basic blocks control can drop in to. */
1342 for (insn = first; insn; insn = NEXT_INSN (insn))
1344 /* Note that this loop must select the same block boundaries
1345 as code in reg_to_stack, but that these are not the same
1346 as those selected in flow.c. */
1348 code = GET_CODE (insn);
1350 if (code == CODE_LABEL
1351 || (prev_code != INSN
1352 && prev_code != CALL_INSN
1353 && prev_code != CODE_LABEL
1354 && GET_RTX_CLASS (code) == 'i'))
1356 block_begin[++block] = insn;
1357 block_end[block] = insn;
1358 block_drops_in[block] = prev_code != BARRIER;
1360 else if (GET_RTX_CLASS (code) == 'i')
1361 block_end[block] = insn;
1363 if (GET_RTX_CLASS (code) == 'i')
1367 /* Make a list of all labels referred to other than by jumps. */
1368 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1369 if (REG_NOTE_KIND (note) == REG_LABEL)
1370 label_value_list = gen_rtx_EXPR_LIST (VOIDmode, XEXP (note, 0),
1374 block_number[INSN_UID (insn)] = block;
1380 if (block + 1 != blocks)
1383 /* generate all label references to the corresponding jump insn */
1384 for (block = 0; block < blocks; block++)
1386 insn = block_end[block];
1388 if (GET_CODE (insn) == JUMP_INSN)
1390 rtx pat = PATTERN (insn);
1393 if (computed_jump_p (insn))
1395 for (x = label_value_list; x; x = XEXP (x, 1))
1396 record_label_references (insn,
1397 gen_rtx_LABEL_REF (VOIDmode,
1400 for (x = forced_labels; x; x = XEXP (x, 1))
1401 record_label_references (insn,
1402 gen_rtx_LABEL_REF (VOIDmode,
1406 record_label_references (insn, pat);
1411 /* If current function returns its result in an fp stack register,
1412 return the REG. Otherwise, return 0. */
1418 rtx result = DECL_RTL (DECL_RESULT (decl));
1421 && ! (GET_CODE (result) == REG
1422 && REGNO (result) < FIRST_PSEUDO_REGISTER))
1424 #ifdef FUNCTION_OUTGOING_VALUE
1426 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
1428 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
1432 return result != 0 && STACK_REG_P (result) ? result : 0;
1435 /* Determine the which registers are live at the start of each basic
1436 block of the function whose first insn is FIRST.
1438 First, if the function returns a real_type, mark the function
1439 return type as live at each return point, as the RTL may not give any
1440 hint that the register is live.
1442 Then, start with the last block and work back to the first block.
1443 Similarly, work backwards within each block, insn by insn, recording
1444 which regs are dead and which are used (and therefore live) in the
1445 hard reg set of block_stack_in[].
1447 After processing each basic block, if there is a label at the start
1448 of the block, propagate the live registers to all jumps to this block.
1450 As a special case, if there are regs live in this block, that are
1451 not live in a block containing a jump to this label, and the block
1452 containing the jump has already been processed, we must propagate this
1453 block's entry register life back to the block containing the jump, and
1454 restart life analysis from there.
1456 In the worst case, this function may traverse the insns
1457 REG_STACK_SIZE times. This is necessary, since a jump towards the end
1458 of the insns may not know that a reg is live at a target that is early
1459 in the insns. So we back up and start over with the new reg live.
1461 If there are registers that are live at the start of the function,
1462 insns are emitted to initialize these registers. Something similar is
1463 done after CALL_INSNs in record_reg_life. */
1466 stack_reg_life_analysis (first, stackentry)
1468 HARD_REG_SET *stackentry;
1471 struct stack_def regstack;
1476 if ((retvalue = stack_result (current_function_decl)))
1478 /* Find all RETURN insns and mark them. */
1480 for (block = blocks - 1; --block >= 0;)
1481 if (GET_CODE (block_end[block]) == JUMP_INSN
1482 && GET_CODE (PATTERN (block_end[block])) == RETURN)
1483 mark_regs_pat (retvalue, block_out_reg_set+block);
1485 /* Mark off the end of last block if we "fall off" the end of the
1486 function into the epilogue. */
1488 if (GET_CODE (block_end[blocks-1]) != JUMP_INSN
1489 || GET_CODE (PATTERN (block_end[blocks-1])) == RETURN)
1490 mark_regs_pat (retvalue, block_out_reg_set+blocks-1);
1494 /* now scan all blocks backward for stack register use */
1499 register rtx insn, prev;
1501 /* current register status at last instruction */
1503 COPY_HARD_REG_SET (regstack.reg_set, block_out_reg_set[block]);
1505 prev = block_end[block];
1509 prev = PREV_INSN (insn);
1511 /* If the insn is a CALL_INSN, we need to ensure that
1512 everything dies. But otherwise don't process unless there
1513 are some stack regs present. */
1515 if (GET_MODE (insn) == QImode || GET_CODE (insn) == CALL_INSN)
1516 record_reg_life (insn, block, ®stack);
1518 } while (insn != block_begin[block]);
1520 /* Set the state at the start of the block. Mark that no
1521 register mapping information known yet. */
1523 COPY_HARD_REG_SET (block_stack_in[block].reg_set, regstack.reg_set);
1524 block_stack_in[block].top = -2;
1526 /* If there is a label, propagate our register life to all jumps
1529 if (GET_CODE (insn) == CODE_LABEL)
1532 int must_restart = 0;
1534 for (label = LABEL_REFS (insn); label != insn;
1535 label = LABEL_NEXTREF (label))
1537 int jump_block = BLOCK_NUM (CONTAINING_INSN (label));
1539 if (jump_block < block)
1540 IOR_HARD_REG_SET (block_out_reg_set[jump_block],
1541 block_stack_in[block].reg_set);
1544 /* The block containing the jump has already been
1545 processed. If there are registers that were not known
1546 to be live then, but are live now, we must back up
1547 and restart life analysis from that point with the new
1548 life information. */
1550 GO_IF_HARD_REG_SUBSET (block_stack_in[block].reg_set,
1551 block_out_reg_set[jump_block],
1554 IOR_HARD_REG_SET (block_out_reg_set[jump_block],
1555 block_stack_in[block].reg_set);
1569 if (block_drops_in[block])
1570 IOR_HARD_REG_SET (block_out_reg_set[block-1],
1571 block_stack_in[block].reg_set);
1576 /* If any reg is live at the start of the first block of a
1577 function, then we must guarantee that the reg holds some value by
1578 generating our own "load" of that register. Otherwise a 387 would
1579 fault trying to access an empty register. */
1581 /* Load zero into each live register. The fact that a register
1582 appears live at the function start necessarily implies an error
1583 in the user program: it means that (unless the offending code is *never*
1584 executed) this program is using uninitialised floating point
1585 variables. In order to keep broken code like this happy, we initialise
1586 those variables with zero.
1588 Note that we are inserting virtual register references here:
1589 these insns must be processed by convert_regs later. Also, these
1590 insns will not be in block_number, so BLOCK_NUM() will fail for them. */
1592 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--)
1593 if (TEST_HARD_REG_BIT (block_stack_in[0].reg_set, reg)
1594 && ! TEST_HARD_REG_BIT (*stackentry, reg))
1598 init_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG(reg, DFmode),
1599 CONST0_RTX (DFmode));
1600 block_begin[0] = emit_insn_after (init_rtx, first);
1601 PUT_MODE (block_begin[0], QImode);
1603 CLEAR_HARD_REG_BIT (block_stack_in[0].reg_set, reg);
1607 /*****************************************************************************
1608 This section deals with stack register substitution, and forms the second
1610 *****************************************************************************/
1612 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
1613 the desired hard REGNO. */
1616 replace_reg (reg, regno)
1620 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
1621 || ! STACK_REG_P (*reg))
1624 switch (GET_MODE_CLASS (GET_MODE (*reg)))
1628 case MODE_COMPLEX_FLOAT:;
1631 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
1634 /* Remove a note of type NOTE, which must be found, for register
1635 number REGNO from INSN. Remove only one such note. */
1638 remove_regno_note (insn, note, regno)
1643 register rtx *note_link, this;
1645 note_link = ®_NOTES(insn);
1646 for (this = *note_link; this; this = XEXP (this, 1))
1647 if (REG_NOTE_KIND (this) == note
1648 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
1650 *note_link = XEXP (this, 1);
1654 note_link = &XEXP (this, 1);
1659 /* Find the hard register number of virtual register REG in REGSTACK.
1660 The hard register number is relative to the top of the stack. -1 is
1661 returned if the register is not found. */
1664 get_hard_regnum (regstack, reg)
1670 if (! STACK_REG_P (reg))
1673 for (i = regstack->top; i >= 0; i--)
1674 if (regstack->reg[i] == REGNO (reg))
1677 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
1680 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
1681 the chain of insns. Doing so could confuse block_begin and block_end
1682 if this were the only insn in the block. */
1685 delete_insn_for_stacker (insn)
1688 PUT_CODE (insn, NOTE);
1689 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1690 NOTE_SOURCE_FILE (insn) = 0;
1693 /* Emit an insn to pop virtual register REG before or after INSN.
1694 REGSTACK is the stack state after INSN and is updated to reflect this
1695 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
1696 is represented as a SET whose destination is the register to be popped
1697 and source is the top of stack. A death note for the top of stack
1698 cases the movdf pattern to pop. */
1701 emit_pop_insn (insn, regstack, reg, when)
1707 rtx pop_insn, pop_rtx;
1710 hard_regno = get_hard_regnum (regstack, reg);
1712 if (hard_regno < FIRST_STACK_REG)
1715 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
1716 FP_MODE_REG (FIRST_STACK_REG, DFmode));
1718 pop_insn = (*when) (pop_rtx, insn);
1719 /* ??? This used to be VOIDmode, but that seems wrong. */
1720 PUT_MODE (pop_insn, QImode);
1722 REG_NOTES (pop_insn) = gen_rtx_EXPR_LIST (REG_DEAD,
1723 FP_MODE_REG (FIRST_STACK_REG, DFmode),
1724 REG_NOTES (pop_insn));
1726 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
1727 = regstack->reg[regstack->top];
1729 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
1734 /* Emit an insn before or after INSN to swap virtual register REG with the
1735 top of stack. WHEN should be `emit_insn_before' or `emit_insn_before'
1736 REGSTACK is the stack state before the swap, and is updated to reflect
1737 the swap. A swap insn is represented as a PARALLEL of two patterns:
1738 each pattern moves one reg to the other.
1740 If REG is already at the top of the stack, no insn is emitted. */
1743 emit_swap_insn (insn, regstack, reg)
1750 rtx swap_rtx, swap_insn;
1751 int tmp, other_reg; /* swap regno temps */
1752 rtx i1; /* the stack-reg insn prior to INSN */
1753 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
1755 hard_regno = get_hard_regnum (regstack, reg);
1757 if (hard_regno < FIRST_STACK_REG)
1759 if (hard_regno == FIRST_STACK_REG)
1762 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
1764 tmp = regstack->reg[other_reg];
1765 regstack->reg[other_reg] = regstack->reg[regstack->top];
1766 regstack->reg[regstack->top] = tmp;
1768 /* Find the previous insn involving stack regs, but don't go past
1769 any labels, calls or jumps. */
1770 i1 = prev_nonnote_insn (insn);
1771 while (i1 && GET_CODE (i1) == INSN && GET_MODE (i1) != QImode)
1772 i1 = prev_nonnote_insn (i1);
1775 i1set = single_set (i1);
1779 rtx i1src = *get_true_reg (&SET_SRC (i1set));
1780 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
1782 /* If the previous register stack push was from the reg we are to
1783 swap with, omit the swap. */
1785 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG
1786 && GET_CODE (i1src) == REG && REGNO (i1src) == hard_regno - 1
1787 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1790 /* If the previous insn wrote to the reg we are to swap with,
1793 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == hard_regno
1794 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG
1795 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1799 if (GET_RTX_CLASS (GET_CODE (i1)) == 'i' && sets_cc0_p (PATTERN (i1)))
1801 i1 = next_nonnote_insn (i1);
1806 swap_rtx = gen_swapdf (FP_MODE_REG (hard_regno, DFmode),
1807 FP_MODE_REG (FIRST_STACK_REG, DFmode));
1808 swap_insn = emit_insn_after (swap_rtx, i1);
1809 /* ??? This used to be VOIDmode, but that seems wrong. */
1810 PUT_MODE (swap_insn, QImode);
1813 /* Handle a move to or from a stack register in PAT, which is in INSN.
1814 REGSTACK is the current stack. */
1817 move_for_stack_reg (insn, regstack, pat)
1822 rtx *psrc = get_true_reg (&SET_SRC (pat));
1823 rtx *pdest = get_true_reg (&SET_DEST (pat));
1827 src = *psrc; dest = *pdest;
1829 if (STACK_REG_P (src) && STACK_REG_P (dest))
1831 /* Write from one stack reg to another. If SRC dies here, then
1832 just change the register mapping and delete the insn. */
1834 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1839 /* If this is a no-op move, there must not be a REG_DEAD note. */
1840 if (REGNO (src) == REGNO (dest))
1843 for (i = regstack->top; i >= 0; i--)
1844 if (regstack->reg[i] == REGNO (src))
1847 /* The source must be live, and the dest must be dead. */
1848 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1851 /* It is possible that the dest is unused after this insn.
1852 If so, just pop the src. */
1854 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1856 emit_pop_insn (insn, regstack, src, emit_insn_after);
1858 delete_insn_for_stacker (insn);
1862 regstack->reg[i] = REGNO (dest);
1864 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1865 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1867 delete_insn_for_stacker (insn);
1872 /* The source reg does not die. */
1874 /* If this appears to be a no-op move, delete it, or else it
1875 will confuse the machine description output patterns. But if
1876 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1877 for REG_UNUSED will not work for deleted insns. */
1879 if (REGNO (src) == REGNO (dest))
1881 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1882 emit_pop_insn (insn, regstack, dest, emit_insn_after);
1884 delete_insn_for_stacker (insn);
1888 /* The destination ought to be dead */
1889 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1892 replace_reg (psrc, get_hard_regnum (regstack, src));
1894 regstack->reg[++regstack->top] = REGNO (dest);
1895 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1896 replace_reg (pdest, FIRST_STACK_REG);
1898 else if (STACK_REG_P (src))
1900 /* Save from a stack reg to MEM, or possibly integer reg. Since
1901 only top of stack may be saved, emit an exchange first if
1904 emit_swap_insn (insn, regstack, src);
1906 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1909 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1911 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1913 else if (GET_MODE (src) == XFmode && regstack->top < REG_STACK_SIZE - 1)
1915 /* A 387 cannot write an XFmode value to a MEM without
1916 clobbering the source reg. The output code can handle
1917 this by reading back the value from the MEM.
1918 But it is more efficient to use a temp register if one is
1919 available. Push the source value here if the register
1920 stack is not full, and then write the value to memory via
1922 rtx push_rtx, push_insn;
1923 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, XFmode);
1925 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1926 push_insn = emit_insn_before (push_rtx, insn);
1927 PUT_MODE (push_insn, QImode);
1928 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1932 replace_reg (psrc, FIRST_STACK_REG);
1934 else if (STACK_REG_P (dest))
1936 /* Load from MEM, or possibly integer REG or constant, into the
1937 stack regs. The actual target is always the top of the
1938 stack. The stack mapping is changed to reflect that DEST is
1939 now at top of stack. */
1941 /* The destination ought to be dead */
1942 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1945 if (regstack->top >= REG_STACK_SIZE)
1948 regstack->reg[++regstack->top] = REGNO (dest);
1949 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1950 replace_reg (pdest, FIRST_STACK_REG);
1957 swap_rtx_condition (pat)
1963 if (GET_RTX_CLASS (GET_CODE (pat)) == '<')
1965 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1969 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1970 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1976 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1977 swap_rtx_condition (XVECEXP (pat, i, j));
1979 else if (fmt[i] == 'e')
1980 swap_rtx_condition (XEXP (pat, i));
1984 /* Handle a comparison. Special care needs to be taken to avoid
1985 causing comparisons that a 387 cannot do correctly, such as EQ.
1987 Also, a pop insn may need to be emitted. The 387 does have an
1988 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1989 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1993 compare_for_stack_reg (insn, regstack, pat)
1999 rtx src1_note, src2_note;
2003 src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
2004 src2 = get_true_reg (&XEXP (SET_SRC (pat), 1));
2005 cc0_user = next_cc0_user (insn);
2007 /* If the insn that uses cc0 is an FP-conditional move, then the destination
2008 must be the top of stack */
2009 if (GET_CODE (PATTERN (cc0_user)) == SET
2010 && SET_DEST (PATTERN (cc0_user)) != pc_rtx
2011 && GET_CODE (SET_SRC (PATTERN (cc0_user))) == IF_THEN_ELSE
2012 && (GET_MODE_CLASS (GET_MODE (SET_DEST (PATTERN (cc0_user))))
2017 dest = get_true_reg (&SET_DEST (PATTERN (cc0_user)));
2020 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
2021 && REGNO (*dest) != regstack->reg[regstack->top])
2023 emit_swap_insn (insn, regstack, *dest);
2029 /* ??? If fxch turns out to be cheaper than fstp, give priority to
2030 registers that die in this insn - move those to stack top first. */
2031 if (! STACK_REG_P (*src1)
2032 || (STACK_REG_P (*src2)
2033 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
2037 temp = XEXP (SET_SRC (pat), 0);
2038 XEXP (SET_SRC (pat), 0) = XEXP (SET_SRC (pat), 1);
2039 XEXP (SET_SRC (pat), 1) = temp;
2041 src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
2042 src2 = get_true_reg (&XEXP (SET_SRC (pat), 1));
2044 next = next_cc0_user (insn);
2045 if (next == NULL_RTX)
2048 swap_rtx_condition (PATTERN (next));
2049 INSN_CODE (next) = -1;
2050 INSN_CODE (insn) = -1;
2053 /* We will fix any death note later. */
2055 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
2057 if (STACK_REG_P (*src2))
2058 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
2060 src2_note = NULL_RTX;
2063 emit_swap_insn (insn, regstack, *src1);
2065 replace_reg (src1, FIRST_STACK_REG);
2067 if (STACK_REG_P (*src2))
2068 replace_reg (src2, get_hard_regnum (regstack, *src2));
2072 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
2073 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
2076 /* If the second operand dies, handle that. But if the operands are
2077 the same stack register, don't bother, because only one death is
2078 needed, and it was just handled. */
2081 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
2082 && REGNO (*src1) == REGNO (*src2)))
2084 /* As a special case, two regs may die in this insn if src2 is
2085 next to top of stack and the top of stack also dies. Since
2086 we have already popped src1, "next to top of stack" is really
2087 at top (FIRST_STACK_REG) now. */
2089 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
2092 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
2093 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
2097 /* The 386 can only represent death of the first operand in
2098 the case handled above. In all other cases, emit a separate
2099 pop and remove the death note from here. */
2101 link_cc0_insns (insn);
2103 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
2105 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
2111 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
2112 is the current register layout. */
2115 subst_stack_regs_pat (insn, regstack, pat)
2121 rtx *src1 = (rtx *) NULL_PTR, *src2;
2122 rtx src1_note, src2_note;
2124 if (GET_CODE (pat) != SET)
2127 dest = get_true_reg (&SET_DEST (pat));
2128 src = get_true_reg (&SET_SRC (pat));
2130 /* See if this is a `movM' pattern, and handle elsewhere if so. */
2132 if (*dest != cc0_rtx
2133 && (STACK_REG_P (*src)
2134 || (STACK_REG_P (*dest)
2135 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
2136 || GET_CODE (*src) == CONST_DOUBLE))))
2137 move_for_stack_reg (insn, regstack, pat);
2139 switch (GET_CODE (SET_SRC (pat)))
2142 compare_for_stack_reg (insn, regstack, pat);
2148 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest));
2151 regstack->reg[++regstack->top] = REGNO (*dest) + count;
2152 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
2155 replace_reg (dest, FIRST_STACK_REG);
2159 /* This is a `tstM2' case. */
2160 if (*dest != cc0_rtx)
2167 case FLOAT_TRUNCATE:
2171 /* These insns only operate on the top of the stack. DEST might
2172 be cc0_rtx if we're processing a tstM pattern. Also, it's
2173 possible that the tstM case results in a REG_DEAD note on the
2177 src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
2179 emit_swap_insn (insn, regstack, *src1);
2181 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
2183 if (STACK_REG_P (*dest))
2184 replace_reg (dest, FIRST_STACK_REG);
2188 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
2190 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
2193 replace_reg (src1, FIRST_STACK_REG);
2199 /* On i386, reversed forms of subM3 and divM3 exist for
2200 MODE_FLOAT, so the same code that works for addM3 and mulM3
2204 /* These insns can accept the top of stack as a destination
2205 from a stack reg or mem, or can use the top of stack as a
2206 source and some other stack register (possibly top of stack)
2207 as a destination. */
2209 src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
2210 src2 = get_true_reg (&XEXP (SET_SRC (pat), 1));
2212 /* We will fix any death note later. */
2214 if (STACK_REG_P (*src1))
2215 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
2217 src1_note = NULL_RTX;
2218 if (STACK_REG_P (*src2))
2219 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
2221 src2_note = NULL_RTX;
2223 /* If either operand is not a stack register, then the dest
2224 must be top of stack. */
2226 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
2227 emit_swap_insn (insn, regstack, *dest);
2230 /* Both operands are REG. If neither operand is already
2231 at the top of stack, choose to make the one that is the dest
2232 the new top of stack. */
2234 int src1_hard_regnum, src2_hard_regnum;
2236 src1_hard_regnum = get_hard_regnum (regstack, *src1);
2237 src2_hard_regnum = get_hard_regnum (regstack, *src2);
2238 if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
2241 if (src1_hard_regnum != FIRST_STACK_REG
2242 && src2_hard_regnum != FIRST_STACK_REG)
2243 emit_swap_insn (insn, regstack, *dest);
2246 if (STACK_REG_P (*src1))
2247 replace_reg (src1, get_hard_regnum (regstack, *src1));
2248 if (STACK_REG_P (*src2))
2249 replace_reg (src2, get_hard_regnum (regstack, *src2));
2253 /* If the register that dies is at the top of stack, then
2254 the destination is somewhere else - merely substitute it.
2255 But if the reg that dies is not at top of stack, then
2256 move the top of stack to the dead reg, as though we had
2257 done the insn and then a store-with-pop. */
2259 if (REGNO (XEXP (src1_note, 0)) == regstack->reg[regstack->top])
2261 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2262 replace_reg (dest, get_hard_regnum (regstack, *dest));
2266 int regno = get_hard_regnum (regstack, XEXP (src1_note, 0));
2268 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2269 replace_reg (dest, regno);
2271 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
2272 = regstack->reg[regstack->top];
2275 CLEAR_HARD_REG_BIT (regstack->reg_set,
2276 REGNO (XEXP (src1_note, 0)));
2277 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
2282 if (REGNO (XEXP (src2_note, 0)) == regstack->reg[regstack->top])
2284 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2285 replace_reg (dest, get_hard_regnum (regstack, *dest));
2289 int regno = get_hard_regnum (regstack, XEXP (src2_note, 0));
2291 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2292 replace_reg (dest, regno);
2294 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
2295 = regstack->reg[regstack->top];
2298 CLEAR_HARD_REG_BIT (regstack->reg_set,
2299 REGNO (XEXP (src2_note, 0)));
2300 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
2305 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2306 replace_reg (dest, get_hard_regnum (regstack, *dest));
2312 switch (XINT (SET_SRC (pat), 1))
2316 /* These insns only operate on the top of the stack. */
2318 src1 = get_true_reg (&XVECEXP (SET_SRC (pat), 0, 0));
2320 emit_swap_insn (insn, regstack, *src1);
2322 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
2324 if (STACK_REG_P (*dest))
2325 replace_reg (dest, FIRST_STACK_REG);
2329 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
2331 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
2334 replace_reg (src1, FIRST_STACK_REG);
2344 /* This insn requires the top of stack to be the destination. */
2346 src1 = get_true_reg (&XEXP (SET_SRC (pat), 1));
2347 src2 = get_true_reg (&XEXP (SET_SRC (pat), 2));
2349 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
2350 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
2357 src_note[1] = src1_note;
2358 src_note[2] = src2_note;
2360 if (STACK_REG_P (*src1))
2361 replace_reg (src1, get_hard_regnum (regstack, *src1));
2362 if (STACK_REG_P (*src2))
2363 replace_reg (src2, get_hard_regnum (regstack, *src2));
2365 for (i = 1; i <= 2; i++)
2368 /* If the register that dies is not at the top of stack, then
2369 move the top of stack to the dead reg */
2370 if (REGNO (XEXP (src_note[i], 0))
2371 != regstack->reg[regstack->top])
2373 remove_regno_note (insn, REG_DEAD,
2374 REGNO (XEXP (src_note [i], 0)));
2375 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
2380 CLEAR_HARD_REG_BIT (regstack->reg_set,
2381 REGNO (XEXP (src_note[i], 0)));
2382 replace_reg (&XEXP (src_note[i], 0), FIRST_STACK_REG);
2388 /* Make dest the top of stack. Add dest to regstack if not present. */
2389 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
2390 regstack->reg[++regstack->top] = REGNO (*dest);
2391 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2392 replace_reg (dest, FIRST_STACK_REG);
2401 /* Substitute hard regnums for any stack regs in INSN, which has
2402 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
2403 before the insn, and is updated with changes made here. CONSTRAINTS is
2404 an array of the constraint strings used in the asm statement.
2406 OPERANDS is an array of the operands, and OPERANDS_LOC is a
2407 parallel array of where the operands were found. The output operands
2408 all precede the input operands.
2410 There are several requirements and assumptions about the use of
2411 stack-like regs in asm statements. These rules are enforced by
2412 record_asm_stack_regs; see comments there for details. Any
2413 asm_operands left in the RTL at this point may be assume to meet the
2414 requirements, since record_asm_stack_regs removes any problem asm. */
2417 subst_asm_stack_regs (insn, regstack, operands, operands_loc, constraints,
2418 n_inputs, n_outputs)
2421 rtx *operands, **operands_loc;
2423 int n_inputs, n_outputs;
2425 int n_operands = n_inputs + n_outputs;
2426 int first_input = n_outputs;
2427 rtx body = PATTERN (insn);
2429 int *operand_matches = (int *) alloca (n_operands * sizeof (int *));
2430 enum reg_class *operand_class
2431 = (enum reg_class *) alloca (n_operands * sizeof (enum reg_class *));
2433 rtx *note_reg; /* Array of note contents */
2434 rtx **note_loc; /* Address of REG field of each note */
2435 enum reg_note *note_kind; /* The type of each note */
2440 struct stack_def temp_stack;
2446 /* Find out what the constraints required. If no constraint
2447 alternative matches, that is a compiler bug: we should have caught
2448 such an insn during the life analysis pass (and reload should have
2449 caught it regardless). */
2451 i = constrain_asm_operands (n_operands, operands, constraints,
2452 operand_matches, operand_class);
2456 /* Strip SUBREGs here to make the following code simpler. */
2457 for (i = 0; i < n_operands; i++)
2458 if (GET_CODE (operands[i]) == SUBREG
2459 && GET_CODE (SUBREG_REG (operands[i])) == REG)
2461 operands_loc[i] = & SUBREG_REG (operands[i]);
2462 operands[i] = SUBREG_REG (operands[i]);
2465 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2467 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
2470 note_reg = (rtx *) alloca (i * sizeof (rtx));
2471 note_loc = (rtx **) alloca (i * sizeof (rtx *));
2472 note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note));
2475 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2477 rtx reg = XEXP (note, 0);
2478 rtx *loc = & XEXP (note, 0);
2480 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
2482 loc = & SUBREG_REG (reg);
2483 reg = SUBREG_REG (reg);
2486 if (STACK_REG_P (reg)
2487 && (REG_NOTE_KIND (note) == REG_DEAD
2488 || REG_NOTE_KIND (note) == REG_UNUSED))
2490 note_reg[n_notes] = reg;
2491 note_loc[n_notes] = loc;
2492 note_kind[n_notes] = REG_NOTE_KIND (note);
2497 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2501 if (GET_CODE (body) == PARALLEL)
2503 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx *));
2504 clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx **));
2506 for (i = 0; i < XVECLEN (body, 0); i++)
2507 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2509 rtx clobber = XVECEXP (body, 0, i);
2510 rtx reg = XEXP (clobber, 0);
2511 rtx *loc = & XEXP (clobber, 0);
2513 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
2515 loc = & SUBREG_REG (reg);
2516 reg = SUBREG_REG (reg);
2519 if (STACK_REG_P (reg))
2521 clobber_reg[n_clobbers] = reg;
2522 clobber_loc[n_clobbers] = loc;
2528 bcopy ((char *) regstack, (char *) &temp_stack, sizeof (temp_stack));
2530 /* Put the input regs into the desired place in TEMP_STACK. */
2532 for (i = first_input; i < first_input + n_inputs; i++)
2533 if (STACK_REG_P (operands[i])
2534 && reg_class_subset_p (operand_class[i], FLOAT_REGS)
2535 && operand_class[i] != FLOAT_REGS)
2537 /* If an operand needs to be in a particular reg in
2538 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2539 these constraints are for single register classes, and reload
2540 guaranteed that operand[i] is already in that class, we can
2541 just use REGNO (operands[i]) to know which actual reg this
2542 operand needs to be in. */
2544 int regno = get_hard_regnum (&temp_stack, operands[i]);
2549 if (regno != REGNO (operands[i]))
2551 /* operands[i] is not in the right place. Find it
2552 and swap it with whatever is already in I's place.
2553 K is where operands[i] is now. J is where it should
2557 k = temp_stack.top - (regno - FIRST_STACK_REG);
2559 - (REGNO (operands[i]) - FIRST_STACK_REG));
2561 temp = temp_stack.reg[k];
2562 temp_stack.reg[k] = temp_stack.reg[j];
2563 temp_stack.reg[j] = temp;
2567 /* emit insns before INSN to make sure the reg-stack is in the right
2570 change_stack (insn, regstack, &temp_stack, emit_insn_before);
2572 /* Make the needed input register substitutions. Do death notes and
2573 clobbers too, because these are for inputs, not outputs. */
2575 for (i = first_input; i < first_input + n_inputs; i++)
2576 if (STACK_REG_P (operands[i]))
2578 int regnum = get_hard_regnum (regstack, operands[i]);
2583 replace_reg (operands_loc[i], regnum);
2586 for (i = 0; i < n_notes; i++)
2587 if (note_kind[i] == REG_DEAD)
2589 int regnum = get_hard_regnum (regstack, note_reg[i]);
2594 replace_reg (note_loc[i], regnum);
2597 for (i = 0; i < n_clobbers; i++)
2599 /* It's OK for a CLOBBER to reference a reg that is not live.
2600 Don't try to replace it in that case. */
2601 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2605 /* Sigh - clobbers always have QImode. But replace_reg knows
2606 that these regs can't be MODE_INT and will abort. Just put
2607 the right reg there without calling replace_reg. */
2609 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2613 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2615 for (i = first_input; i < first_input + n_inputs; i++)
2616 if (STACK_REG_P (operands[i]))
2618 /* An input reg is implicitly popped if it is tied to an
2619 output, or if there is a CLOBBER for it. */
2622 for (j = 0; j < n_clobbers; j++)
2623 if (operands_match_p (clobber_reg[j], operands[i]))
2626 if (j < n_clobbers || operand_matches[i] >= 0)
2628 /* operands[i] might not be at the top of stack. But that's OK,
2629 because all we need to do is pop the right number of regs
2630 off of the top of the reg-stack. record_asm_stack_regs
2631 guaranteed that all implicitly popped regs were grouped
2632 at the top of the reg-stack. */
2634 CLEAR_HARD_REG_BIT (regstack->reg_set,
2635 regstack->reg[regstack->top]);
2640 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2641 Note that there isn't any need to substitute register numbers.
2642 ??? Explain why this is true. */
2644 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2646 /* See if there is an output for this hard reg. */
2649 for (j = 0; j < n_outputs; j++)
2650 if (STACK_REG_P (operands[j]) && REGNO (operands[j]) == i)
2652 regstack->reg[++regstack->top] = i;
2653 SET_HARD_REG_BIT (regstack->reg_set, i);
2658 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2659 input that the asm didn't implicitly pop. If the asm didn't
2660 implicitly pop an input reg, that reg will still be live.
2662 Note that we can't use find_regno_note here: the register numbers
2663 in the death notes have already been substituted. */
2665 for (i = 0; i < n_outputs; i++)
2666 if (STACK_REG_P (operands[i]))
2670 for (j = 0; j < n_notes; j++)
2671 if (REGNO (operands[i]) == REGNO (note_reg[j])
2672 && note_kind[j] == REG_UNUSED)
2674 insn = emit_pop_insn (insn, regstack, operands[i],
2680 for (i = first_input; i < first_input + n_inputs; i++)
2681 if (STACK_REG_P (operands[i]))
2685 for (j = 0; j < n_notes; j++)
2686 if (REGNO (operands[i]) == REGNO (note_reg[j])
2687 && note_kind[j] == REG_DEAD
2688 && TEST_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i])))
2690 insn = emit_pop_insn (insn, regstack, operands[i],
2697 /* Substitute stack hard reg numbers for stack virtual registers in
2698 INSN. Non-stack register numbers are not changed. REGSTACK is the
2699 current stack content. Insns may be emitted as needed to arrange the
2700 stack for the 387 based on the contents of the insn. */
2703 subst_stack_regs (insn, regstack)
2707 register rtx *note_link, note;
2711 if (GET_CODE (insn) == CALL_INSN)
2713 int top = regstack->top;
2715 /* If there are any floating point parameters to be passed in
2716 registers for this call, make sure they are in the right
2721 straighten_stack (PREV_INSN (insn), regstack);
2723 /* Now mark the arguments as dead after the call. */
2725 while (regstack->top >= 0)
2727 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2733 /* Do the actual substitution if any stack regs are mentioned.
2734 Since we only record whether entire insn mentions stack regs, and
2735 subst_stack_regs_pat only works for patterns that contain stack regs,
2736 we must check each pattern in a parallel here. A call_value_pop could
2739 if (GET_MODE (insn) == QImode)
2741 n_operands = asm_noperands (PATTERN (insn));
2742 if (n_operands >= 0)
2744 /* This insn is an `asm' with operands. Decode the operands,
2745 decide how many are inputs, and do register substitution.
2746 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2748 rtx operands[MAX_RECOG_OPERANDS];
2749 rtx *operands_loc[MAX_RECOG_OPERANDS];
2750 rtx body = PATTERN (insn);
2751 int n_inputs, n_outputs;
2753 = (char **) alloca (n_operands * sizeof (char *));
2755 decode_asm_operands (body, operands, operands_loc,
2756 constraints, NULL_PTR);
2757 get_asm_operand_lengths (body, n_operands, &n_inputs, &n_outputs);
2758 subst_asm_stack_regs (insn, regstack, operands, operands_loc,
2759 constraints, n_inputs, n_outputs);
2763 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2764 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2766 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2767 subst_stack_regs_pat (insn, regstack,
2768 XVECEXP (PATTERN (insn), 0, i));
2771 subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2774 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2775 REG_UNUSED will already have been dealt with, so just return. */
2777 if (GET_CODE (insn) == NOTE)
2780 /* If there is a REG_UNUSED note on a stack register on this insn,
2781 the indicated reg must be popped. The REG_UNUSED note is removed,
2782 since the form of the newly emitted pop insn references the reg,
2783 making it no longer `unset'. */
2785 note_link = ®_NOTES(insn);
2786 for (note = *note_link; note; note = XEXP (note, 1))
2787 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2789 *note_link = XEXP (note, 1);
2790 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), emit_insn_after);
2793 note_link = &XEXP (note, 1);
2796 /* Change the organization of the stack so that it fits a new basic
2797 block. Some registers might have to be popped, but there can never be
2798 a register live in the new block that is not now live.
2800 Insert any needed insns before or after INSN. WHEN is emit_insn_before
2801 or emit_insn_after. OLD is the original stack layout, and NEW is
2802 the desired form. OLD is updated to reflect the code emitted, ie, it
2803 will be the same as NEW upon return.
2805 This function will not preserve block_end[]. But that information
2806 is no longer needed once this has executed. */
2809 change_stack (insn, old, new, when)
2817 /* We will be inserting new insns "backwards", by calling emit_insn_before.
2818 If we are to insert after INSN, find the next insn, and insert before
2821 if (when == emit_insn_after)
2822 insn = NEXT_INSN (insn);
2824 /* Pop any registers that are not needed in the new block. */
2826 for (reg = old->top; reg >= 0; reg--)
2827 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2828 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2833 /* If the new block has never been processed, then it can inherit
2834 the old stack order. */
2836 new->top = old->top;
2837 bcopy (old->reg, new->reg, sizeof (new->reg));
2841 /* This block has been entered before, and we must match the
2842 previously selected stack order. */
2844 /* By now, the only difference should be the order of the stack,
2845 not their depth or liveliness. */
2847 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2853 if (old->top != new->top)
2856 /* Loop here emitting swaps until the stack is correct. The
2857 worst case number of swaps emitted is N + 2, where N is the
2858 depth of the stack. In some cases, the reg at the top of
2859 stack may be correct, but swapped anyway in order to fix
2860 other regs. But since we never swap any other reg away from
2861 its correct slot, this algorithm will converge. */
2865 /* Swap the reg at top of stack into the position it is
2866 supposed to be in, until the correct top of stack appears. */
2868 while (old->reg[old->top] != new->reg[new->top])
2870 for (reg = new->top; reg >= 0; reg--)
2871 if (new->reg[reg] == old->reg[old->top])
2877 emit_swap_insn (insn, old,
2878 FP_MODE_REG (old->reg[reg], DFmode));
2881 /* See if any regs remain incorrect. If so, bring an
2882 incorrect reg to the top of stack, and let the while loop
2885 for (reg = new->top; reg >= 0; reg--)
2886 if (new->reg[reg] != old->reg[reg])
2888 emit_swap_insn (insn, old,
2889 FP_MODE_REG (old->reg[reg], DFmode));
2894 /* At this point there must be no differences. */
2896 for (reg = old->top; reg >= 0; reg--)
2897 if (old->reg[reg] != new->reg[reg])
2902 /* Check PAT, which points to RTL in INSN, for a LABEL_REF. If it is
2903 found, ensure that a jump from INSN to the code_label to which the
2904 label_ref points ends up with the same stack as that at the
2905 code_label. Do this by inserting insns just before the code_label to
2906 pop and rotate the stack until it is in the correct order. REGSTACK
2907 is the order of the register stack in INSN.
2909 Any code that is emitted here must not be later processed as part
2910 of any block, as it will already contain hard register numbers. */
2913 goto_block_pat (insn, regstack, pat)
2919 rtx new_jump, new_label, new_barrier;
2922 struct stack_def temp_stack;
2925 switch (GET_CODE (pat))
2928 straighten_stack (PREV_INSN (insn), regstack);
2933 char *fmt = GET_RTX_FORMAT (GET_CODE (pat));
2935 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
2938 goto_block_pat (insn, regstack, XEXP (pat, i));
2940 for (j = 0; j < XVECLEN (pat, i); j++)
2941 goto_block_pat (insn, regstack, XVECEXP (pat, i, j));
2948 label = XEXP (pat, 0);
2949 if (GET_CODE (label) != CODE_LABEL)
2952 /* First, see if in fact anything needs to be done to the stack at all. */
2953 if (INSN_UID (label) <= 0)
2956 label_stack = &block_stack_in[BLOCK_NUM (label)];
2958 if (label_stack->top == -2)
2960 /* If the target block hasn't had a stack order selected, then
2961 we need merely ensure that no pops are needed. */
2963 for (reg = regstack->top; reg >= 0; reg--)
2964 if (! TEST_HARD_REG_BIT (label_stack->reg_set, regstack->reg[reg]))
2969 /* change_stack will not emit any code in this case. */
2971 change_stack (label, regstack, label_stack, emit_insn_after);
2975 else if (label_stack->top == regstack->top)
2977 for (reg = label_stack->top; reg >= 0; reg--)
2978 if (label_stack->reg[reg] != regstack->reg[reg])
2985 /* At least one insn will need to be inserted before label. Insert
2986 a jump around the code we are about to emit. Emit a label for the new
2987 code, and point the original insn at this new label. We can't use
2988 redirect_jump here, because we're using fld[4] of the code labels as
2989 LABEL_REF chains, no NUSES counters. */
2991 new_jump = emit_jump_insn_before (gen_jump (label), label);
2992 record_label_references (new_jump, PATTERN (new_jump));
2993 JUMP_LABEL (new_jump) = label;
2995 new_barrier = emit_barrier_after (new_jump);
2997 new_label = gen_label_rtx ();
2998 emit_label_after (new_label, new_barrier);
2999 LABEL_REFS (new_label) = new_label;
3001 /* The old label_ref will no longer point to the code_label if now uses,
3002 so strip the label_ref from the code_label's chain of references. */
3004 for (ref = &LABEL_REFS (label); *ref != label; ref = &LABEL_NEXTREF (*ref))
3011 *ref = LABEL_NEXTREF (*ref);
3013 XEXP (pat, 0) = new_label;
3014 record_label_references (insn, PATTERN (insn));
3016 if (JUMP_LABEL (insn) == label)
3017 JUMP_LABEL (insn) = new_label;
3019 /* Now emit the needed code. */
3021 temp_stack = *regstack;
3023 change_stack (new_label, &temp_stack, label_stack, emit_insn_after);
3026 /* Traverse all basic blocks in a function, converting the register
3027 references in each insn from the "flat" register file that gcc uses, to
3028 the stack-like registers the 387 uses. */
3033 register int block, reg;
3034 register rtx insn, next;
3035 struct stack_def regstack;
3037 for (block = 0; block < blocks; block++)
3039 if (block_stack_in[block].top == -2)
3041 /* This block has not been previously encountered. Choose a
3042 default mapping for any stack regs live on entry */
3044 block_stack_in[block].top = -1;
3046 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--)
3047 if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, reg))
3048 block_stack_in[block].reg[++block_stack_in[block].top] = reg;
3051 /* Process all insns in this block. Keep track of `next' here,
3052 so that we don't process any insns emitted while making
3053 substitutions in INSN. */
3055 next = block_begin[block];
3056 regstack = block_stack_in[block];
3060 next = NEXT_INSN (insn);
3062 /* Don't bother processing unless there is a stack reg
3063 mentioned or if it's a CALL_INSN (register passing of
3064 floating point values). */
3066 if (GET_MODE (insn) == QImode || GET_CODE (insn) == CALL_INSN)
3067 subst_stack_regs (insn, ®stack);
3069 } while (insn != block_end[block]);
3071 /* Something failed if the stack life doesn't match. */
3073 GO_IF_HARD_REG_EQUAL (regstack.reg_set, block_out_reg_set[block], win);
3079 /* Adjust the stack of this block on exit to match the stack of
3080 the target block, or copy stack information into stack of
3081 jump target if the target block's stack order hasn't been set
3084 if (GET_CODE (insn) == JUMP_INSN)
3085 goto_block_pat (insn, ®stack, PATTERN (insn));
3087 /* Likewise handle the case where we fall into the next block. */
3089 if ((block < blocks - 1) && block_drops_in[block+1])
3090 change_stack (insn, ®stack, &block_stack_in[block+1],
3094 /* If the last basic block is the end of a loop, and that loop has
3095 regs live at its start, then the last basic block will have regs live
3096 at its end that need to be popped before the function returns. */
3099 int value_reg_low, value_reg_high;
3100 value_reg_low = value_reg_high = -1;
3103 if ((retvalue = stack_result (current_function_decl)))
3105 value_reg_low = REGNO (retvalue);
3106 value_reg_high = value_reg_low +
3107 HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1;
3111 for (reg = regstack.top; reg >= 0; reg--)
3112 if (regstack.reg[reg] < value_reg_low
3113 || regstack.reg[reg] > value_reg_high)
3114 insn = emit_pop_insn (insn, ®stack,
3115 FP_MODE_REG (regstack.reg[reg], DFmode),
3118 straighten_stack (insn, ®stack);
3121 /* Check expression PAT, which is in INSN, for label references. if
3122 one is found, print the block number of destination to FILE. */
3125 print_blocks (file, insn, pat)
3129 register RTX_CODE code = GET_CODE (pat);
3133 if (code == LABEL_REF)
3135 register rtx label = XEXP (pat, 0);
3137 if (GET_CODE (label) != CODE_LABEL)
3140 fprintf (file, " %d", BLOCK_NUM (label));
3145 fmt = GET_RTX_FORMAT (code);
3146 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3149 print_blocks (file, insn, XEXP (pat, i));
3153 for (j = 0; j < XVECLEN (pat, i); j++)
3154 print_blocks (file, insn, XVECEXP (pat, i, j));
3159 /* Write information about stack registers and stack blocks into FILE.
3160 This is part of making a debugging dump. */
3163 dump_stack_info (file)
3168 fprintf (file, "\n%d stack blocks.\n", blocks);
3169 for (block = 0; block < blocks; block++)
3171 register rtx head, jump, end;
3174 fprintf (file, "\nStack block %d: first insn %d, last %d.\n",
3175 block, INSN_UID (block_begin[block]),
3176 INSN_UID (block_end[block]));
3178 head = block_begin[block];
3180 fprintf (file, "Reached from blocks: ");
3181 if (GET_CODE (head) == CODE_LABEL)
3182 for (jump = LABEL_REFS (head);
3184 jump = LABEL_NEXTREF (jump))
3186 register int from_block = BLOCK_NUM (CONTAINING_INSN (jump));
3187 fprintf (file, " %d", from_block);
3189 if (block_drops_in[block])
3190 fprintf (file, " previous");
3192 fprintf (file, "\nlive stack registers on block entry: ");
3193 for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++)
3195 if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, regno))
3196 fprintf (file, "%d ", regno);
3199 fprintf (file, "\nlive stack registers on block exit: ");
3200 for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++)
3202 if (TEST_HARD_REG_BIT (block_out_reg_set[block], regno))
3203 fprintf (file, "%d ", regno);
3206 end = block_end[block];
3208 fprintf (file, "\nJumps to blocks: ");
3209 if (GET_CODE (end) == JUMP_INSN)
3210 print_blocks (file, end, PATTERN (end));
3212 if (block + 1 < blocks && block_drops_in[block+1])
3213 fprintf (file, " next");
3214 else if (block + 1 == blocks
3215 || (GET_CODE (end) == JUMP_INSN
3216 && GET_CODE (PATTERN (end)) == RETURN))
3217 fprintf (file, " return");
3219 fprintf (file, "\n");
3222 #endif /* STACK_REGS */